diff --git a/llvm/lib/Transforms/InstCombine/InstCombineAddSub.cpp b/llvm/lib/Transforms/InstCombine/InstCombineAddSub.cpp
--- a/llvm/lib/Transforms/InstCombine/InstCombineAddSub.cpp
+++ b/llvm/lib/Transforms/InstCombine/InstCombineAddSub.cpp
@@ -2275,6 +2275,34 @@
   // Try to eliminate fneg if at least 1 arm of the select is negated.
   Value *Cond;
   if (match(Op, m_OneUse(m_Select(m_Value(Cond), m_Value(X), m_Value(Y))))) {
+    // The 'fneg' with nsz flag can propagate it's flag to 'select',
+    // when select satisfies that TrueVal = -FalseVal.
+    // fneg nsz (select cond ? X : -X) ->  fneg nsz (select nsz cond ? X : -X)
+    // fneg nsz (select cond ? -X : X) ->  fneg nsz (select nsz cond ? -X : X)
+    if (I.hasNoSignedZeros()) {
+      CmpInst::Predicate Pred;
+      // This conditions similar with (X <  +/-0.0) ? -X : X --> fabs(X),
+      // except 'select' hasNoSignedZeros(). We propagate 'nsz' from 'fneg' to
+      // 'select', so that it can be fold to 'fabs' in visitSelectInst.
+      if (match(Cond, m_FCmp(Pred, m_Specific(Y), m_AnyZeroFP())) &&
+          match(X, m_FNeg(m_Specific(Y))) &&
+          (Pred == FCmpInst::FCMP_OLT || Pred == FCmpInst::FCMP_OLE ||
+           Pred == FCmpInst::FCMP_ULT || Pred == FCmpInst::FCMP_ULE)) {
+        auto *Sel = dyn_cast<SelectInst>(Op);
+        Sel->setHasNoSignedZeros(true);
+        return nullptr;
+      }
+      // Similar to the above, deal with (X >  +/-0.0) ? X : -X --> fabs(X).
+      if (match(Cond, m_FCmp(Pred, m_Specific(X), m_AnyZeroFP())) &&
+          match(Y, m_FNeg(m_Specific(X))) &&
+          (Pred == FCmpInst::FCMP_OGT || Pred == FCmpInst::FCMP_OGE ||
+           Pred == FCmpInst::FCMP_UGT || Pred == FCmpInst::FCMP_UGE)) {
+        auto *Sel = dyn_cast<SelectInst>(Op);
+        Sel->setHasNoSignedZeros(true);
+        return nullptr;
+      }
+    }
+
     // Unlike most transforms, this one is not safe to propagate nsz unless
     // it is present on the original select. (We are conservatively intersecting
     // the nsz flags from the select and root fneg instruction.)
diff --git a/llvm/test/Transforms/InstCombine/fneg.ll b/llvm/test/Transforms/InstCombine/fneg.ll
--- a/llvm/test/Transforms/InstCombine/fneg.ll
+++ b/llvm/test/Transforms/InstCombine/fneg.ll
@@ -714,13 +714,10 @@
   ret float %fneg1
 }
 
-; TODO: This should reduce to fneg-of-fabs.
-
 define float @fnabs(float %a) {
 ; CHECK-LABEL: @fnabs(
-; CHECK-NEXT:    [[CMP:%.*]] = fcmp olt float [[A:%.*]], 0.000000e+00
-; CHECK-NEXT:    [[A_NEG:%.*]] = fneg fast float [[A]]
-; CHECK-NEXT:    [[FNEG1:%.*]] = select fast i1 [[CMP]], float [[A]], float [[A_NEG]]
+; CHECK-NEXT:    [[TMP1:%.*]] = call nsz float @llvm.fabs.f32(float [[A:%.*]])
+; CHECK-NEXT:    [[FNEG1:%.*]] = fneg fast float [[TMP1]]
 ; CHECK-NEXT:    ret float [[FNEG1]]
 ;
   %fneg = fneg float %a