diff --git a/lld/ELF/Arch/AArch64.cpp b/lld/ELF/Arch/AArch64.cpp --- a/lld/ELF/Arch/AArch64.cpp +++ b/lld/ELF/Arch/AArch64.cpp @@ -255,9 +255,11 @@ bool AArch64::needsThunk(RelExpr expr, RelType type, const InputFile *file, uint64_t branchAddr, const Symbol &s, int64_t a) const { - // If s is an undefined weak symbol and does not have a PLT entry then it - // will be resolved as a branch to the next instruction. - if (s.isUndefWeak() && !s.isInPlt()) + // If s is an undefined weak symbol and does not have a PLT entry then it will + // be resolved as a branch to the next instruction. If it is hidden, its + // binding has been converted to local, so we just check isUndefined() here. A + // undefined non-weak symbol will have been errored. + if (s.isUndefined() && !s.isInPlt()) return false; // ELF for the ARM 64-bit architecture, section Call and Jump relocations // only permits range extension thunks for R_AARCH64_CALL26 and diff --git a/lld/ELF/InputSection.cpp b/lld/ELF/InputSection.cpp --- a/lld/ELF/InputSection.cpp +++ b/lld/ELF/InputSection.cpp @@ -729,11 +729,13 @@ if (expr == R_ARM_PCA) // Some PC relative ARM (Thumb) relocations align down the place. p = p & 0xfffffffc; - if (sym.isUndefWeak()) { + if (sym.isUndefined()) { // On ARM and AArch64 a branch to an undefined weak resolves to the next // instruction, otherwise the place. On RISCV, resolve an undefined weak // to the same instruction to cause an infinite loop (making the user // aware of the issue) while ensuring no overflow. + // Note: if the symbol is hidden, its binding has been converted to local, + // so we just check isUndefined() here. if (config->emachine == EM_ARM) dest = getARMUndefinedRelativeWeakVA(type, a, p); else if (config->emachine == EM_AARCH64) diff --git a/lld/test/ELF/aarch64-undefined-weak.s b/lld/test/ELF/aarch64-undefined-weak.s --- a/lld/test/ELF/aarch64-undefined-weak.s +++ b/lld/test/ELF/aarch64-undefined-weak.s @@ -10,6 +10,9 @@ // is not generated. .weak target +.weak undefweak2 +.hidden undefweak2 + .text .global _start _start: @@ -36,6 +39,9 @@ // R_AARCH64_PLT32 .word target@PLT - . +bl_undefweak2: + bl undefweak2 + // CHECK: Disassembly of section .text: // CHECK-EMPTY: // CHECK-NEXT: 0000000010010120 <_start>: @@ -51,3 +57,5 @@ // CHECK-NEXT: 10010144: 00 00 00 00 .word 0x00000000 // CHECK-NEXT: 10010148: 00 00 00 00 .word 0x00000000 // CHECK-NEXT: 1001014c: 00 00 .short 0x0000 +// CHECK-LABEL: : +// CHECK-NEXT: bl {{.*}}