diff --git a/mlir/include/mlir/Dialect/Arithmetic/IR/ArithmeticBase.td b/mlir/include/mlir/Dialect/Arithmetic/IR/ArithmeticBase.td --- a/mlir/include/mlir/Dialect/Arithmetic/IR/ArithmeticBase.td +++ b/mlir/include/mlir/Dialect/Arithmetic/IR/ArithmeticBase.td @@ -9,8 +9,8 @@ #ifndef ARITHMETIC_BASE #define ARITHMETIC_BASE -include "mlir/IR/OpBase.td" include "mlir/IR/EnumAttr.td" +include "mlir/IR/OpBase.td" def Arithmetic_Dialect : Dialect { let name = "arith"; diff --git a/mlir/include/mlir/Dialect/LLVMIR/LLVMOpBase.td b/mlir/include/mlir/Dialect/LLVMIR/LLVMOpBase.td --- a/mlir/include/mlir/Dialect/LLVMIR/LLVMOpBase.td +++ b/mlir/include/mlir/Dialect/LLVMIR/LLVMOpBase.td @@ -14,8 +14,8 @@ #ifndef LLVMIR_OP_BASE #define LLVMIR_OP_BASE -include "mlir/IR/OpBase.td" include "mlir/IR/EnumAttr.td" +include "mlir/IR/OpBase.td" include "mlir/Interfaces/SideEffectInterfaces.td" //===----------------------------------------------------------------------===// diff --git a/mlir/include/mlir/Dialect/Vector/IR/VectorOps.td b/mlir/include/mlir/Dialect/Vector/IR/VectorOps.td --- a/mlir/include/mlir/Dialect/Vector/IR/VectorOps.td +++ b/mlir/include/mlir/Dialect/Vector/IR/VectorOps.td @@ -13,11 +13,11 @@ #ifndef VECTOR_OPS #define VECTOR_OPS +include "mlir/IR/EnumAttr.td" include "mlir/Interfaces/InferTypeOpInterface.td" include "mlir/Interfaces/SideEffectInterfaces.td" include "mlir/Interfaces/VectorInterfaces.td" include "mlir/Interfaces/ViewLikeInterface.td" -include "mlir/IR/EnumAttr.td" def Vector_Dialect : Dialect { let name = "vector"; diff --git a/mlir/test/mlir-tblgen/op-attribute.td b/mlir/test/mlir-tblgen/op-attribute.td --- a/mlir/test/mlir-tblgen/op-attribute.td +++ b/mlir/test/mlir-tblgen/op-attribute.td @@ -3,8 +3,8 @@ // RUN: mlir-tblgen -print-records -I %S/../../include %s | FileCheck %s --check-prefix=RECORD include "mlir/IR/AttrTypeBase.td" -include "mlir/IR/OpBase.td" include "mlir/IR/EnumAttr.td" +include "mlir/IR/OpBase.td" def Test_Dialect : Dialect { let name = "test"; diff --git a/mlir/unittests/TableGen/enums.td b/mlir/unittests/TableGen/enums.td --- a/mlir/unittests/TableGen/enums.td +++ b/mlir/unittests/TableGen/enums.td @@ -6,8 +6,8 @@ // //===----------------------------------------------------------------------===// -include "mlir/IR/OpBase.td" include "mlir/IR/EnumAttr.td" +include "mlir/IR/OpBase.td" def CaseA: StrEnumAttrCase<"CaseA">; def CaseB: StrEnumAttrCase<"CaseB", 10>;