diff --git a/llvm/lib/Target/PowerPC/PPCInstrInfo.td b/llvm/lib/Target/PowerPC/PPCInstrInfo.td --- a/llvm/lib/Target/PowerPC/PPCInstrInfo.td +++ b/llvm/lib/Target/PowerPC/PPCInstrInfo.td @@ -633,514 +633,6 @@ } -//===----------------------------------------------------------------------===// -// PowerPC Operand Definitions. - -// In the default PowerPC assembler syntax, registers are specified simply -// by number, so they cannot be distinguished from immediate values (without -// looking at the opcode). This means that the default operand matching logic -// for the asm parser does not work, and we need to specify custom matchers. -// Since those can only be specified with RegisterOperand classes and not -// directly on the RegisterClass, all instructions patterns used by the asm -// parser need to use a RegisterOperand (instead of a RegisterClass) for -// all their register operands. -// For this purpose, we define one RegisterOperand for each RegisterClass, -// using the same name as the class, just in lower case. - -def PPCRegGPRCAsmOperand : AsmOperandClass { - let Name = "RegGPRC"; let PredicateMethod = "isRegNumber"; -} -def gprc : RegisterOperand { - let ParserMatchClass = PPCRegGPRCAsmOperand; -} -def PPCRegG8RCAsmOperand : AsmOperandClass { - let Name = "RegG8RC"; let PredicateMethod = "isRegNumber"; -} -def g8rc : RegisterOperand { - let ParserMatchClass = PPCRegG8RCAsmOperand; -} -def PPCRegG8pRCAsmOperand : AsmOperandClass { - let Name = "RegG8pRC"; let PredicateMethod = "isEvenRegNumber"; -} -def g8prc : RegisterOperand { - let ParserMatchClass = PPCRegG8pRCAsmOperand; -} -def PPCRegGPRCNoR0AsmOperand : AsmOperandClass { - let Name = "RegGPRCNoR0"; let PredicateMethod = "isRegNumber"; -} -def gprc_nor0 : RegisterOperand { - let ParserMatchClass = PPCRegGPRCNoR0AsmOperand; -} -def PPCRegG8RCNoX0AsmOperand : AsmOperandClass { - let Name = "RegG8RCNoX0"; let PredicateMethod = "isRegNumber"; -} -def g8rc_nox0 : RegisterOperand { - let ParserMatchClass = PPCRegG8RCNoX0AsmOperand; -} -def PPCRegF8RCAsmOperand : AsmOperandClass { - let Name = "RegF8RC"; let PredicateMethod = "isRegNumber"; -} -def f8rc : RegisterOperand { - let ParserMatchClass = PPCRegF8RCAsmOperand; -} -def PPCRegF4RCAsmOperand : AsmOperandClass { - let Name = "RegF4RC"; let PredicateMethod = "isRegNumber"; -} -def f4rc : RegisterOperand { - let ParserMatchClass = PPCRegF4RCAsmOperand; -} -def PPCRegVRRCAsmOperand : AsmOperandClass { - let Name = "RegVRRC"; let PredicateMethod = "isRegNumber"; -} -def vrrc : RegisterOperand { - let ParserMatchClass = PPCRegVRRCAsmOperand; -} -def PPCRegVFRCAsmOperand : AsmOperandClass { - let Name = "RegVFRC"; let PredicateMethod = "isRegNumber"; -} -def vfrc : RegisterOperand { - let ParserMatchClass = PPCRegVFRCAsmOperand; -} -def PPCRegCRBITRCAsmOperand : AsmOperandClass { - let Name = "RegCRBITRC"; let PredicateMethod = "isCRBitNumber"; -} -def crbitrc : RegisterOperand { - let ParserMatchClass = PPCRegCRBITRCAsmOperand; -} -def PPCRegCRRCAsmOperand : AsmOperandClass { - let Name = "RegCRRC"; let PredicateMethod = "isCCRegNumber"; -} -def crrc : RegisterOperand { - let ParserMatchClass = PPCRegCRRCAsmOperand; -} -def PPCRegSPERCAsmOperand : AsmOperandClass { - let Name = "RegSPERC"; let PredicateMethod = "isRegNumber"; -} -def sperc : RegisterOperand { - let ParserMatchClass = PPCRegSPERCAsmOperand; -} -def PPCRegSPE4RCAsmOperand : AsmOperandClass { - let Name = "RegSPE4RC"; let PredicateMethod = "isRegNumber"; -} -def spe4rc : RegisterOperand { - let ParserMatchClass = PPCRegSPE4RCAsmOperand; -} - -def PPCU1ImmAsmOperand : AsmOperandClass { - let Name = "U1Imm"; let PredicateMethod = "isU1Imm"; - let RenderMethod = "addImmOperands"; -} -def u1imm : Operand { - let PrintMethod = "printU1ImmOperand"; - let ParserMatchClass = PPCU1ImmAsmOperand; - let OperandType = "OPERAND_IMMEDIATE"; -} - -def PPCU2ImmAsmOperand : AsmOperandClass { - let Name = "U2Imm"; let PredicateMethod = "isU2Imm"; - let RenderMethod = "addImmOperands"; -} -def u2imm : Operand { - let PrintMethod = "printU2ImmOperand"; - let ParserMatchClass = PPCU2ImmAsmOperand; - let OperandType = "OPERAND_IMMEDIATE"; -} - -def PPCATBitsAsHintAsmOperand : AsmOperandClass { - let Name = "ATBitsAsHint"; let PredicateMethod = "isATBitsAsHint"; - let RenderMethod = "addImmOperands"; // Irrelevant, predicate always fails. -} -def atimm : Operand { - let PrintMethod = "printATBitsAsHint"; - let ParserMatchClass = PPCATBitsAsHintAsmOperand; - let OperandType = "OPERAND_IMMEDIATE"; -} - -def PPCU3ImmAsmOperand : AsmOperandClass { - let Name = "U3Imm"; let PredicateMethod = "isU3Imm"; - let RenderMethod = "addImmOperands"; -} -def u3imm : Operand { - let PrintMethod = "printU3ImmOperand"; - let ParserMatchClass = PPCU3ImmAsmOperand; - let OperandType = "OPERAND_IMMEDIATE"; -} - -def PPCU4ImmAsmOperand : AsmOperandClass { - let Name = "U4Imm"; let PredicateMethod = "isU4Imm"; - let RenderMethod = "addImmOperands"; -} -def u4imm : Operand { - let PrintMethod = "printU4ImmOperand"; - let ParserMatchClass = PPCU4ImmAsmOperand; - let OperandType = "OPERAND_IMMEDIATE"; -} -def PPCS5ImmAsmOperand : AsmOperandClass { - let Name = "S5Imm"; let PredicateMethod = "isS5Imm"; - let RenderMethod = "addImmOperands"; -} -def s5imm : Operand { - let PrintMethod = "printS5ImmOperand"; - let ParserMatchClass = PPCS5ImmAsmOperand; - let DecoderMethod = "decodeSImmOperand<5>"; - let OperandType = "OPERAND_IMMEDIATE"; -} -def PPCU5ImmAsmOperand : AsmOperandClass { - let Name = "U5Imm"; let PredicateMethod = "isU5Imm"; - let RenderMethod = "addImmOperands"; -} -def u5imm : Operand { - let PrintMethod = "printU5ImmOperand"; - let ParserMatchClass = PPCU5ImmAsmOperand; - let DecoderMethod = "decodeUImmOperand<5>"; - let OperandType = "OPERAND_IMMEDIATE"; -} -def PPCU6ImmAsmOperand : AsmOperandClass { - let Name = "U6Imm"; let PredicateMethod = "isU6Imm"; - let RenderMethod = "addImmOperands"; -} -def u6imm : Operand { - let PrintMethod = "printU6ImmOperand"; - let ParserMatchClass = PPCU6ImmAsmOperand; - let DecoderMethod = "decodeUImmOperand<6>"; - let OperandType = "OPERAND_IMMEDIATE"; -} -def PPCU7ImmAsmOperand : AsmOperandClass { - let Name = "U7Imm"; let PredicateMethod = "isU7Imm"; - let RenderMethod = "addImmOperands"; -} -def u7imm : Operand { - let PrintMethod = "printU7ImmOperand"; - let ParserMatchClass = PPCU7ImmAsmOperand; - let DecoderMethod = "decodeUImmOperand<7>"; - let OperandType = "OPERAND_IMMEDIATE"; -} -def PPCU8ImmAsmOperand : AsmOperandClass { - let Name = "U8Imm"; let PredicateMethod = "isU8Imm"; - let RenderMethod = "addImmOperands"; -} -def u8imm : Operand { - let PrintMethod = "printU8ImmOperand"; - let ParserMatchClass = PPCU8ImmAsmOperand; - let DecoderMethod = "decodeUImmOperand<8>"; - let OperandType = "OPERAND_IMMEDIATE"; -} -def PPCU10ImmAsmOperand : AsmOperandClass { - let Name = "U10Imm"; let PredicateMethod = "isU10Imm"; - let RenderMethod = "addImmOperands"; -} -def u10imm : Operand { - let PrintMethod = "printU10ImmOperand"; - let ParserMatchClass = PPCU10ImmAsmOperand; - let DecoderMethod = "decodeUImmOperand<10>"; - let OperandType = "OPERAND_IMMEDIATE"; -} -def PPCU12ImmAsmOperand : AsmOperandClass { - let Name = "U12Imm"; let PredicateMethod = "isU12Imm"; - let RenderMethod = "addImmOperands"; -} -def u12imm : Operand { - let PrintMethod = "printU12ImmOperand"; - let ParserMatchClass = PPCU12ImmAsmOperand; - let DecoderMethod = "decodeUImmOperand<12>"; - let OperandType = "OPERAND_IMMEDIATE"; -} -def PPCS16ImmAsmOperand : AsmOperandClass { - let Name = "S16Imm"; let PredicateMethod = "isS16Imm"; - let RenderMethod = "addS16ImmOperands"; -} -def s16imm : Operand { - let PrintMethod = "printS16ImmOperand"; - let EncoderMethod = "getImm16Encoding"; - let ParserMatchClass = PPCS16ImmAsmOperand; - let DecoderMethod = "decodeSImmOperand<16>"; - let OperandType = "OPERAND_IMMEDIATE"; -} -def PPCU16ImmAsmOperand : AsmOperandClass { - let Name = "U16Imm"; let PredicateMethod = "isU16Imm"; - let RenderMethod = "addU16ImmOperands"; -} -def u16imm : Operand { - let PrintMethod = "printU16ImmOperand"; - let EncoderMethod = "getImm16Encoding"; - let ParserMatchClass = PPCU16ImmAsmOperand; - let DecoderMethod = "decodeUImmOperand<16>"; - let OperandType = "OPERAND_IMMEDIATE"; -} -def PPCS17ImmAsmOperand : AsmOperandClass { - let Name = "S17Imm"; let PredicateMethod = "isS17Imm"; - let RenderMethod = "addS16ImmOperands"; -} -def s17imm : Operand { - // This operand type is used for addis/lis to allow the assembler parser - // to accept immediates in the range -65536..65535 for compatibility with - // the GNU assembler. The operand is treated as 16-bit otherwise. - let PrintMethod = "printS16ImmOperand"; - let EncoderMethod = "getImm16Encoding"; - let ParserMatchClass = PPCS17ImmAsmOperand; - let DecoderMethod = "decodeSImmOperand<16>"; - let OperandType = "OPERAND_IMMEDIATE"; -} -def PPCS34ImmAsmOperand : AsmOperandClass { - let Name = "S34Imm"; - let PredicateMethod = "isS34Imm"; - let RenderMethod = "addImmOperands"; -} -def s34imm : Operand { - let PrintMethod = "printS34ImmOperand"; - let EncoderMethod = "getImm34EncodingNoPCRel"; - let ParserMatchClass = PPCS34ImmAsmOperand; - let DecoderMethod = "decodeSImmOperand<34>"; - let OperandType = "OPERAND_IMMEDIATE"; -} -def s34imm_pcrel : Operand { - let PrintMethod = "printS34ImmOperand"; - let EncoderMethod = "getImm34EncodingPCRel"; - let ParserMatchClass = PPCS34ImmAsmOperand; - let DecoderMethod = "decodeSImmOperand<34>"; - let OperandType = "OPERAND_IMMEDIATE"; -} -def PPCImmZeroAsmOperand : AsmOperandClass { - let Name = "ImmZero"; - let PredicateMethod = "isImmZero"; - let RenderMethod = "addImmOperands"; -} -def immZero : Operand { - let PrintMethod = "printImmZeroOperand"; - let ParserMatchClass = PPCImmZeroAsmOperand; - let DecoderMethod = "decodeImmZeroOperand"; - let OperandType = "OPERAND_IMMEDIATE"; -} - -def fpimm0 : PatLeaf<(fpimm), [{ return N->isExactlyValue(+0.0); }]>; - -def PPCDirectBrAsmOperand : AsmOperandClass { - let Name = "DirectBr"; let PredicateMethod = "isDirectBr"; - let RenderMethod = "addBranchTargetOperands"; -} -def directbrtarget : Operand { - let PrintMethod = "printBranchOperand"; - let EncoderMethod = "getDirectBrEncoding"; - let DecoderMethod = "decodeDirectBrTarget"; - let ParserMatchClass = PPCDirectBrAsmOperand; - let OperandType = "OPERAND_PCREL"; -} -def absdirectbrtarget : Operand { - let PrintMethod = "printAbsBranchOperand"; - let EncoderMethod = "getAbsDirectBrEncoding"; - let ParserMatchClass = PPCDirectBrAsmOperand; -} -def PPCCondBrAsmOperand : AsmOperandClass { - let Name = "CondBr"; let PredicateMethod = "isCondBr"; - let RenderMethod = "addBranchTargetOperands"; -} -def condbrtarget : Operand { - let PrintMethod = "printBranchOperand"; - let EncoderMethod = "getCondBrEncoding"; - let DecoderMethod = "decodeCondBrTarget"; - let ParserMatchClass = PPCCondBrAsmOperand; - let OperandType = "OPERAND_PCREL"; -} -def abscondbrtarget : Operand { - let PrintMethod = "printAbsBranchOperand"; - let EncoderMethod = "getAbsCondBrEncoding"; - let ParserMatchClass = PPCCondBrAsmOperand; -} -def calltarget : Operand { - let PrintMethod = "printBranchOperand"; - let EncoderMethod = "getDirectBrEncoding"; - let DecoderMethod = "decodeDirectBrTarget"; - let ParserMatchClass = PPCDirectBrAsmOperand; - let OperandType = "OPERAND_PCREL"; -} -def abscalltarget : Operand { - let PrintMethod = "printAbsBranchOperand"; - let EncoderMethod = "getAbsDirectBrEncoding"; - let ParserMatchClass = PPCDirectBrAsmOperand; -} -def PPCCRBitMaskOperand : AsmOperandClass { - let Name = "CRBitMask"; let PredicateMethod = "isCRBitMask"; -} -def crbitm: Operand { - let PrintMethod = "printcrbitm"; - let EncoderMethod = "get_crbitm_encoding"; - let DecoderMethod = "decodeCRBitMOperand"; - let ParserMatchClass = PPCCRBitMaskOperand; -} -// Address operands -// A version of ptr_rc which excludes R0 (or X0 in 64-bit mode). -def PPCRegGxRCNoR0Operand : AsmOperandClass { - let Name = "RegGxRCNoR0"; let PredicateMethod = "isRegNumber"; -} -def ptr_rc_nor0 : Operand, PointerLikeRegClass<1> { - let ParserMatchClass = PPCRegGxRCNoR0Operand; -} - -// New addressing modes with 34 bit immediates. -def PPCDispRI34Operand : AsmOperandClass { - let Name = "DispRI34"; let PredicateMethod = "isS34Imm"; - let RenderMethod = "addImmOperands"; -} -def dispRI34 : Operand { - let ParserMatchClass = PPCDispRI34Operand; -} -def memri34 : Operand { // memri, imm is a 34-bit value. - let PrintMethod = "printMemRegImm34"; - let MIOperandInfo = (ops dispRI34:$imm, ptr_rc_nor0:$reg); - let EncoderMethod = "getMemRI34Encoding"; - let DecoderMethod = "decodeMemRI34Operands"; -} -// memri, imm is a 34-bit value for pc-relative instructions where -// base register is set to zero. -def memri34_pcrel : Operand { // memri, imm is a 34-bit value. - let PrintMethod = "printMemRegImm34PCRel"; - let MIOperandInfo = (ops dispRI34:$imm, immZero:$reg); - let EncoderMethod = "getMemRI34PCRelEncoding"; - let DecoderMethod = "decodeMemRI34PCRelOperands"; -} - -// A version of ptr_rc usable with the asm parser. -def PPCRegGxRCOperand : AsmOperandClass { - let Name = "RegGxRC"; let PredicateMethod = "isRegNumber"; -} -def ptr_rc_idx : Operand, PointerLikeRegClass<0> { - let ParserMatchClass = PPCRegGxRCOperand; -} - -def PPCDispRIOperand : AsmOperandClass { - let Name = "DispRI"; let PredicateMethod = "isS16Imm"; - let RenderMethod = "addS16ImmOperands"; -} -def dispRI : Operand { - let ParserMatchClass = PPCDispRIOperand; -} -def PPCDispRIXOperand : AsmOperandClass { - let Name = "DispRIX"; let PredicateMethod = "isS16ImmX4"; - let RenderMethod = "addS16ImmOperands"; -} -def dispRIX : Operand { - let ParserMatchClass = PPCDispRIXOperand; -} -def PPCDispRIHashOperand : AsmOperandClass { - let Name = "DispRIHash"; let PredicateMethod = "isHashImmX8"; - let RenderMethod = "addImmOperands"; -} -def dispRIHash : Operand { - let ParserMatchClass = PPCDispRIHashOperand; -} -def PPCDispRIX16Operand : AsmOperandClass { - let Name = "DispRIX16"; let PredicateMethod = "isS16ImmX16"; - let RenderMethod = "addS16ImmOperands"; -} -def dispRIX16 : Operand { - let ParserMatchClass = PPCDispRIX16Operand; -} -def PPCDispSPE8Operand : AsmOperandClass { - let Name = "DispSPE8"; let PredicateMethod = "isU8ImmX8"; - let RenderMethod = "addImmOperands"; -} -def dispSPE8 : Operand { - let ParserMatchClass = PPCDispSPE8Operand; -} -def PPCDispSPE4Operand : AsmOperandClass { - let Name = "DispSPE4"; let PredicateMethod = "isU7ImmX4"; - let RenderMethod = "addImmOperands"; -} -def dispSPE4 : Operand { - let ParserMatchClass = PPCDispSPE4Operand; -} -def PPCDispSPE2Operand : AsmOperandClass { - let Name = "DispSPE2"; let PredicateMethod = "isU6ImmX2"; - let RenderMethod = "addImmOperands"; -} -def dispSPE2 : Operand { - let ParserMatchClass = PPCDispSPE2Operand; -} - -def memri : Operand { - let PrintMethod = "printMemRegImm"; - let MIOperandInfo = (ops dispRI:$imm, ptr_rc_nor0:$reg); - let EncoderMethod = "getMemRIEncoding"; - let DecoderMethod = "decodeMemRIOperands"; - let OperandType = "OPERAND_MEMORY"; -} -def memrr : Operand { - let PrintMethod = "printMemRegReg"; - let MIOperandInfo = (ops ptr_rc_nor0:$ptrreg, ptr_rc_idx:$offreg); - let OperandType = "OPERAND_MEMORY"; -} -def memrix : Operand { // memri where the imm is 4-aligned. - let PrintMethod = "printMemRegImm"; - let MIOperandInfo = (ops dispRIX:$imm, ptr_rc_nor0:$reg); - let EncoderMethod = "getMemRIXEncoding"; - let DecoderMethod = "decodeMemRIXOperands"; - let OperandType = "OPERAND_MEMORY"; -} -def memrihash : Operand { - // memrihash 8-aligned for ROP Protection Instructions. - let PrintMethod = "printMemRegImmHash"; - let MIOperandInfo = (ops dispRIHash:$imm, ptr_rc_nor0:$reg); - let EncoderMethod = "getMemRIHashEncoding"; - let DecoderMethod = "decodeMemRIHashOperands"; - let OperandType = "OPERAND_MEMORY"; -} -def memrix16 : Operand { // memri, imm is 16-aligned, 12-bit, Inst{16:27} - let PrintMethod = "printMemRegImm"; - let MIOperandInfo = (ops dispRIX16:$imm, ptr_rc_nor0:$reg); - let EncoderMethod = "getMemRIX16Encoding"; - let DecoderMethod = "decodeMemRIX16Operands"; - let OperandType = "OPERAND_MEMORY"; -} -def spe8dis : Operand { // SPE displacement where the imm is 8-aligned. - let PrintMethod = "printMemRegImm"; - let MIOperandInfo = (ops dispSPE8:$imm, ptr_rc_nor0:$reg); - let EncoderMethod = "getSPE8DisEncoding"; - let DecoderMethod = "decodeSPE8Operands"; - let OperandType = "OPERAND_MEMORY"; -} -def spe4dis : Operand { // SPE displacement where the imm is 4-aligned. - let PrintMethod = "printMemRegImm"; - let MIOperandInfo = (ops dispSPE4:$imm, ptr_rc_nor0:$reg); - let EncoderMethod = "getSPE4DisEncoding"; - let DecoderMethod = "decodeSPE4Operands"; - let OperandType = "OPERAND_MEMORY"; -} -def spe2dis : Operand { // SPE displacement where the imm is 2-aligned. - let PrintMethod = "printMemRegImm"; - let MIOperandInfo = (ops dispSPE2:$imm, ptr_rc_nor0:$reg); - let EncoderMethod = "getSPE2DisEncoding"; - let DecoderMethod = "decodeSPE2Operands"; - let OperandType = "OPERAND_MEMORY"; -} - -// A single-register address. This is used with the SjLj -// pseudo-instructions which translates to LD/LWZ. These instructions requires -// G8RC_NOX0 registers. -def memr : Operand { - let MIOperandInfo = (ops ptr_rc_nor0:$ptrreg); - let OperandType = "OPERAND_MEMORY"; -} -def PPCTLSRegOperand : AsmOperandClass { - let Name = "TLSReg"; let PredicateMethod = "isTLSReg"; - let RenderMethod = "addTLSRegOperands"; -} -def tlsreg32 : Operand { - let EncoderMethod = "getTLSRegEncoding"; - let ParserMatchClass = PPCTLSRegOperand; -} -def tlsgd32 : Operand {} -def tlscall32 : Operand { - let PrintMethod = "printTLSCall"; - let MIOperandInfo = (ops calltarget:$func, tlsgd32:$sym); - let EncoderMethod = "getTLSCallEncoding"; -} - -// PowerPC Predicate operand. -def pred : Operand { - let PrintMethod = "printPredicateOperand"; - let MIOperandInfo = (ops i32imm:$bibo, crrc:$reg); -} - // Define PowerPC specific addressing mode. // d-form diff --git a/llvm/lib/Target/PowerPC/PPCInstrP10.td b/llvm/lib/Target/PowerPC/PPCInstrP10.td --- a/llvm/lib/Target/PowerPC/PPCInstrP10.td +++ b/llvm/lib/Target/PowerPC/PPCInstrP10.td @@ -752,36 +752,6 @@ } } -def PPCRegACCRCAsmOperand : AsmOperandClass { - let Name = "RegACCRC"; let PredicateMethod = "isACCRegNumber"; -} - -def acc : RegisterOperand { - let ParserMatchClass = PPCRegACCRCAsmOperand; -} - -def uacc : RegisterOperand { - let ParserMatchClass = PPCRegACCRCAsmOperand; -} - -def PPCRegVSRpRCAsmOperand : AsmOperandClass { - let Name = "RegVSRpRC"; let PredicateMethod = "isVSRpEvenRegNumber"; -} - -def vsrprc : RegisterOperand { - let ParserMatchClass = PPCRegVSRpRCAsmOperand; -} - -def PPCRegVSRpEvenRCAsmOperand : AsmOperandClass { - let Name = "RegVSRpEvenRC"; let PredicateMethod = "isVSRpEvenRegNumber"; -} - -def vsrpevenrc : RegisterOperand { - let ParserMatchClass = PPCRegVSRpEvenRCAsmOperand; - let EncoderMethod = "getVSRpEvenEncoding"; - let DecoderMethod = "decodeVSRpEvenOperands"; -} - class DQForm_XTp5_RA17_MEM opcode, bits<4> xo, dag OOL, dag IOL, string asmstr, InstrItinClass itin, list pattern> : I { diff --git a/llvm/lib/Target/PowerPC/PPCInstrVSX.td b/llvm/lib/Target/PowerPC/PPCInstrVSX.td --- a/llvm/lib/Target/PowerPC/PPCInstrVSX.td +++ b/llvm/lib/Target/PowerPC/PPCInstrVSX.td @@ -51,35 +51,6 @@ // ** printing (for example: xxswapd for xxpermdi with 0x2 as the imm). ** // **************************************************************************** -def PPCRegVSRCAsmOperand : AsmOperandClass { - let Name = "RegVSRC"; let PredicateMethod = "isVSRegNumber"; -} -def vsrc : RegisterOperand { - let ParserMatchClass = PPCRegVSRCAsmOperand; -} - -def PPCRegVSFRCAsmOperand : AsmOperandClass { - let Name = "RegVSFRC"; let PredicateMethod = "isVSRegNumber"; -} -def vsfrc : RegisterOperand { - let ParserMatchClass = PPCRegVSFRCAsmOperand; -} - -def PPCRegVSSRCAsmOperand : AsmOperandClass { - let Name = "RegVSSRC"; let PredicateMethod = "isVSRegNumber"; -} -def vssrc : RegisterOperand { - let ParserMatchClass = PPCRegVSSRCAsmOperand; -} - -def PPCRegSPILLTOVSRRCAsmOperand : AsmOperandClass { - let Name = "RegSPILLTOVSRRC"; let PredicateMethod = "isVSRegNumber"; -} - -def spilltovsrrc : RegisterOperand { - let ParserMatchClass = PPCRegSPILLTOVSRRCAsmOperand; -} - def SDT_PPCldvsxlh : SDTypeProfile<1, 1, [ SDTCisVT<0, v4f32>, SDTCisPtrTy<1> ]>; diff --git a/llvm/lib/Target/PowerPC/PPCRegisterInfo.td b/llvm/lib/Target/PowerPC/PPCRegisterInfo.td --- a/llvm/lib/Target/PowerPC/PPCRegisterInfo.td +++ b/llvm/lib/Target/PowerPC/PPCRegisterInfo.td @@ -444,3 +444,570 @@ } include "PPCRegisterInfoMMA.td" + +//===----------------------------------------------------------------------===// +// PowerPC Operand Definitions. + +// In the default PowerPC assembler syntax, registers are specified simply +// by number, so they cannot be distinguished from immediate values (without +// looking at the opcode). This means that the default operand matching logic +// for the asm parser does not work, and we need to specify custom matchers. +// Since those can only be specified with RegisterOperand classes and not +// directly on the RegisterClass, all instructions patterns used by the asm +// parser need to use a RegisterOperand (instead of a RegisterClass) for +// all their register operands. +// For this purpose, we define one RegisterOperand for each RegisterClass, +// using the same name as the class, just in lower case. + +def PPCRegGPRCAsmOperand : AsmOperandClass { + let Name = "RegGPRC"; let PredicateMethod = "isRegNumber"; +} +def gprc : RegisterOperand { + let ParserMatchClass = PPCRegGPRCAsmOperand; +} +def PPCRegG8RCAsmOperand : AsmOperandClass { + let Name = "RegG8RC"; let PredicateMethod = "isRegNumber"; +} +def g8rc : RegisterOperand { + let ParserMatchClass = PPCRegG8RCAsmOperand; +} +def PPCRegG8pRCAsmOperand : AsmOperandClass { + let Name = "RegG8pRC"; let PredicateMethod = "isEvenRegNumber"; +} +def g8prc : RegisterOperand { + let ParserMatchClass = PPCRegG8pRCAsmOperand; +} +def PPCRegGPRCNoR0AsmOperand : AsmOperandClass { + let Name = "RegGPRCNoR0"; let PredicateMethod = "isRegNumber"; +} +def gprc_nor0 : RegisterOperand { + let ParserMatchClass = PPCRegGPRCNoR0AsmOperand; +} +def PPCRegG8RCNoX0AsmOperand : AsmOperandClass { + let Name = "RegG8RCNoX0"; let PredicateMethod = "isRegNumber"; +} +def g8rc_nox0 : RegisterOperand { + let ParserMatchClass = PPCRegG8RCNoX0AsmOperand; +} +def PPCRegF8RCAsmOperand : AsmOperandClass { + let Name = "RegF8RC"; let PredicateMethod = "isRegNumber"; +} +def f8rc : RegisterOperand { + let ParserMatchClass = PPCRegF8RCAsmOperand; +} +def PPCRegF4RCAsmOperand : AsmOperandClass { + let Name = "RegF4RC"; let PredicateMethod = "isRegNumber"; +} +def f4rc : RegisterOperand { + let ParserMatchClass = PPCRegF4RCAsmOperand; +} +def PPCRegVRRCAsmOperand : AsmOperandClass { + let Name = "RegVRRC"; let PredicateMethod = "isRegNumber"; +} +def vrrc : RegisterOperand { + let ParserMatchClass = PPCRegVRRCAsmOperand; +} +def PPCRegVFRCAsmOperand : AsmOperandClass { + let Name = "RegVFRC"; let PredicateMethod = "isRegNumber"; +} +def vfrc : RegisterOperand { + let ParserMatchClass = PPCRegVFRCAsmOperand; +} +def PPCRegCRBITRCAsmOperand : AsmOperandClass { + let Name = "RegCRBITRC"; let PredicateMethod = "isCRBitNumber"; +} +def crbitrc : RegisterOperand { + let ParserMatchClass = PPCRegCRBITRCAsmOperand; +} +def PPCRegCRRCAsmOperand : AsmOperandClass { + let Name = "RegCRRC"; let PredicateMethod = "isCCRegNumber"; +} +def crrc : RegisterOperand { + let ParserMatchClass = PPCRegCRRCAsmOperand; +} +def PPCRegSPERCAsmOperand : AsmOperandClass { + let Name = "RegSPERC"; let PredicateMethod = "isRegNumber"; +} +def sperc : RegisterOperand { + let ParserMatchClass = PPCRegSPERCAsmOperand; +} +def PPCRegSPE4RCAsmOperand : AsmOperandClass { + let Name = "RegSPE4RC"; let PredicateMethod = "isRegNumber"; +} +def spe4rc : RegisterOperand { + let ParserMatchClass = PPCRegSPE4RCAsmOperand; +} + +def PPCU1ImmAsmOperand : AsmOperandClass { + let Name = "U1Imm"; let PredicateMethod = "isU1Imm"; + let RenderMethod = "addImmOperands"; +} +def u1imm : Operand { + let PrintMethod = "printU1ImmOperand"; + let ParserMatchClass = PPCU1ImmAsmOperand; + let OperandType = "OPERAND_IMMEDIATE"; +} + +def PPCU2ImmAsmOperand : AsmOperandClass { + let Name = "U2Imm"; let PredicateMethod = "isU2Imm"; + let RenderMethod = "addImmOperands"; +} +def u2imm : Operand { + let PrintMethod = "printU2ImmOperand"; + let ParserMatchClass = PPCU2ImmAsmOperand; + let OperandType = "OPERAND_IMMEDIATE"; +} + +def PPCATBitsAsHintAsmOperand : AsmOperandClass { + let Name = "ATBitsAsHint"; let PredicateMethod = "isATBitsAsHint"; + let RenderMethod = "addImmOperands"; // Irrelevant, predicate always fails. +} +def atimm : Operand { + let PrintMethod = "printATBitsAsHint"; + let ParserMatchClass = PPCATBitsAsHintAsmOperand; + let OperandType = "OPERAND_IMMEDIATE"; +} + +def PPCU3ImmAsmOperand : AsmOperandClass { + let Name = "U3Imm"; let PredicateMethod = "isU3Imm"; + let RenderMethod = "addImmOperands"; +} +def u3imm : Operand { + let PrintMethod = "printU3ImmOperand"; + let ParserMatchClass = PPCU3ImmAsmOperand; + let OperandType = "OPERAND_IMMEDIATE"; +} + +def PPCU4ImmAsmOperand : AsmOperandClass { + let Name = "U4Imm"; let PredicateMethod = "isU4Imm"; + let RenderMethod = "addImmOperands"; +} +def u4imm : Operand { + let PrintMethod = "printU4ImmOperand"; + let ParserMatchClass = PPCU4ImmAsmOperand; + let OperandType = "OPERAND_IMMEDIATE"; +} +def PPCS5ImmAsmOperand : AsmOperandClass { + let Name = "S5Imm"; let PredicateMethod = "isS5Imm"; + let RenderMethod = "addImmOperands"; +} +def s5imm : Operand { + let PrintMethod = "printS5ImmOperand"; + let ParserMatchClass = PPCS5ImmAsmOperand; + let DecoderMethod = "decodeSImmOperand<5>"; + let OperandType = "OPERAND_IMMEDIATE"; +} +def PPCU5ImmAsmOperand : AsmOperandClass { + let Name = "U5Imm"; let PredicateMethod = "isU5Imm"; + let RenderMethod = "addImmOperands"; +} +def u5imm : Operand { + let PrintMethod = "printU5ImmOperand"; + let ParserMatchClass = PPCU5ImmAsmOperand; + let DecoderMethod = "decodeUImmOperand<5>"; + let OperandType = "OPERAND_IMMEDIATE"; +} +def PPCU6ImmAsmOperand : AsmOperandClass { + let Name = "U6Imm"; let PredicateMethod = "isU6Imm"; + let RenderMethod = "addImmOperands"; +} +def u6imm : Operand { + let PrintMethod = "printU6ImmOperand"; + let ParserMatchClass = PPCU6ImmAsmOperand; + let DecoderMethod = "decodeUImmOperand<6>"; + let OperandType = "OPERAND_IMMEDIATE"; +} +def PPCU7ImmAsmOperand : AsmOperandClass { + let Name = "U7Imm"; let PredicateMethod = "isU7Imm"; + let RenderMethod = "addImmOperands"; +} +def u7imm : Operand { + let PrintMethod = "printU7ImmOperand"; + let ParserMatchClass = PPCU7ImmAsmOperand; + let DecoderMethod = "decodeUImmOperand<7>"; + let OperandType = "OPERAND_IMMEDIATE"; +} +def PPCU8ImmAsmOperand : AsmOperandClass { + let Name = "U8Imm"; let PredicateMethod = "isU8Imm"; + let RenderMethod = "addImmOperands"; +} +def u8imm : Operand { + let PrintMethod = "printU8ImmOperand"; + let ParserMatchClass = PPCU8ImmAsmOperand; + let DecoderMethod = "decodeUImmOperand<8>"; + let OperandType = "OPERAND_IMMEDIATE"; +} +def PPCU10ImmAsmOperand : AsmOperandClass { + let Name = "U10Imm"; let PredicateMethod = "isU10Imm"; + let RenderMethod = "addImmOperands"; +} +def u10imm : Operand { + let PrintMethod = "printU10ImmOperand"; + let ParserMatchClass = PPCU10ImmAsmOperand; + let DecoderMethod = "decodeUImmOperand<10>"; + let OperandType = "OPERAND_IMMEDIATE"; +} +def PPCU12ImmAsmOperand : AsmOperandClass { + let Name = "U12Imm"; let PredicateMethod = "isU12Imm"; + let RenderMethod = "addImmOperands"; +} +def u12imm : Operand { + let PrintMethod = "printU12ImmOperand"; + let ParserMatchClass = PPCU12ImmAsmOperand; + let DecoderMethod = "decodeUImmOperand<12>"; + let OperandType = "OPERAND_IMMEDIATE"; +} +def PPCS16ImmAsmOperand : AsmOperandClass { + let Name = "S16Imm"; let PredicateMethod = "isS16Imm"; + let RenderMethod = "addS16ImmOperands"; +} +def s16imm : Operand { + let PrintMethod = "printS16ImmOperand"; + let EncoderMethod = "getImm16Encoding"; + let ParserMatchClass = PPCS16ImmAsmOperand; + let DecoderMethod = "decodeSImmOperand<16>"; + let OperandType = "OPERAND_IMMEDIATE"; +} +def PPCU16ImmAsmOperand : AsmOperandClass { + let Name = "U16Imm"; let PredicateMethod = "isU16Imm"; + let RenderMethod = "addU16ImmOperands"; +} +def u16imm : Operand { + let PrintMethod = "printU16ImmOperand"; + let EncoderMethod = "getImm16Encoding"; + let ParserMatchClass = PPCU16ImmAsmOperand; + let DecoderMethod = "decodeUImmOperand<16>"; + let OperandType = "OPERAND_IMMEDIATE"; +} +def PPCS17ImmAsmOperand : AsmOperandClass { + let Name = "S17Imm"; let PredicateMethod = "isS17Imm"; + let RenderMethod = "addS16ImmOperands"; +} +def s17imm : Operand { + // This operand type is used for addis/lis to allow the assembler parser + // to accept immediates in the range -65536..65535 for compatibility with + // the GNU assembler. The operand is treated as 16-bit otherwise. + let PrintMethod = "printS16ImmOperand"; + let EncoderMethod = "getImm16Encoding"; + let ParserMatchClass = PPCS17ImmAsmOperand; + let DecoderMethod = "decodeSImmOperand<16>"; + let OperandType = "OPERAND_IMMEDIATE"; +} +def PPCS34ImmAsmOperand : AsmOperandClass { + let Name = "S34Imm"; + let PredicateMethod = "isS34Imm"; + let RenderMethod = "addImmOperands"; +} +def s34imm : Operand { + let PrintMethod = "printS34ImmOperand"; + let EncoderMethod = "getImm34EncodingNoPCRel"; + let ParserMatchClass = PPCS34ImmAsmOperand; + let DecoderMethod = "decodeSImmOperand<34>"; + let OperandType = "OPERAND_IMMEDIATE"; +} +def s34imm_pcrel : Operand { + let PrintMethod = "printS34ImmOperand"; + let EncoderMethod = "getImm34EncodingPCRel"; + let ParserMatchClass = PPCS34ImmAsmOperand; + let DecoderMethod = "decodeSImmOperand<34>"; + let OperandType = "OPERAND_IMMEDIATE"; +} +def PPCImmZeroAsmOperand : AsmOperandClass { + let Name = "ImmZero"; + let PredicateMethod = "isImmZero"; + let RenderMethod = "addImmOperands"; +} +def immZero : Operand { + let PrintMethod = "printImmZeroOperand"; + let ParserMatchClass = PPCImmZeroAsmOperand; + let DecoderMethod = "decodeImmZeroOperand"; + let OperandType = "OPERAND_IMMEDIATE"; +} + +def fpimm0 : PatLeaf<(fpimm), [{ return N->isExactlyValue(+0.0); }]>; + +def PPCDirectBrAsmOperand : AsmOperandClass { + let Name = "DirectBr"; let PredicateMethod = "isDirectBr"; + let RenderMethod = "addBranchTargetOperands"; +} +def directbrtarget : Operand { + let PrintMethod = "printBranchOperand"; + let EncoderMethod = "getDirectBrEncoding"; + let DecoderMethod = "decodeDirectBrTarget"; + let ParserMatchClass = PPCDirectBrAsmOperand; + let OperandType = "OPERAND_PCREL"; +} +def absdirectbrtarget : Operand { + let PrintMethod = "printAbsBranchOperand"; + let EncoderMethod = "getAbsDirectBrEncoding"; + let ParserMatchClass = PPCDirectBrAsmOperand; +} +def PPCCondBrAsmOperand : AsmOperandClass { + let Name = "CondBr"; let PredicateMethod = "isCondBr"; + let RenderMethod = "addBranchTargetOperands"; +} +def condbrtarget : Operand { + let PrintMethod = "printBranchOperand"; + let EncoderMethod = "getCondBrEncoding"; + let DecoderMethod = "decodeCondBrTarget"; + let ParserMatchClass = PPCCondBrAsmOperand; + let OperandType = "OPERAND_PCREL"; +} +def abscondbrtarget : Operand { + let PrintMethod = "printAbsBranchOperand"; + let EncoderMethod = "getAbsCondBrEncoding"; + let ParserMatchClass = PPCCondBrAsmOperand; +} +def calltarget : Operand { + let PrintMethod = "printBranchOperand"; + let EncoderMethod = "getDirectBrEncoding"; + let DecoderMethod = "decodeDirectBrTarget"; + let ParserMatchClass = PPCDirectBrAsmOperand; + let OperandType = "OPERAND_PCREL"; +} +def abscalltarget : Operand { + let PrintMethod = "printAbsBranchOperand"; + let EncoderMethod = "getAbsDirectBrEncoding"; + let ParserMatchClass = PPCDirectBrAsmOperand; +} +def PPCCRBitMaskOperand : AsmOperandClass { + let Name = "CRBitMask"; let PredicateMethod = "isCRBitMask"; +} +def crbitm: Operand { + let PrintMethod = "printcrbitm"; + let EncoderMethod = "get_crbitm_encoding"; + let DecoderMethod = "decodeCRBitMOperand"; + let ParserMatchClass = PPCCRBitMaskOperand; +} +// Address operands +// A version of ptr_rc which excludes R0 (or X0 in 64-bit mode). +def PPCRegGxRCNoR0Operand : AsmOperandClass { + let Name = "RegGxRCNoR0"; let PredicateMethod = "isRegNumber"; +} +def ptr_rc_nor0 : Operand, PointerLikeRegClass<1> { + let ParserMatchClass = PPCRegGxRCNoR0Operand; +} + +// New addressing modes with 34 bit immediates. +def PPCDispRI34Operand : AsmOperandClass { + let Name = "DispRI34"; let PredicateMethod = "isS34Imm"; + let RenderMethod = "addImmOperands"; +} +def dispRI34 : Operand { + let ParserMatchClass = PPCDispRI34Operand; +} +def memri34 : Operand { // memri, imm is a 34-bit value. + let PrintMethod = "printMemRegImm34"; + let MIOperandInfo = (ops dispRI34:$imm, ptr_rc_nor0:$reg); + let EncoderMethod = "getMemRI34Encoding"; + let DecoderMethod = "decodeMemRI34Operands"; +} +// memri, imm is a 34-bit value for pc-relative instructions where +// base register is set to zero. +def memri34_pcrel : Operand { // memri, imm is a 34-bit value. + let PrintMethod = "printMemRegImm34PCRel"; + let MIOperandInfo = (ops dispRI34:$imm, immZero:$reg); + let EncoderMethod = "getMemRI34PCRelEncoding"; + let DecoderMethod = "decodeMemRI34PCRelOperands"; +} + +// A version of ptr_rc usable with the asm parser. +def PPCRegGxRCOperand : AsmOperandClass { + let Name = "RegGxRC"; let PredicateMethod = "isRegNumber"; +} +def ptr_rc_idx : Operand, PointerLikeRegClass<0> { + let ParserMatchClass = PPCRegGxRCOperand; +} + +def PPCDispRIOperand : AsmOperandClass { + let Name = "DispRI"; let PredicateMethod = "isS16Imm"; + let RenderMethod = "addS16ImmOperands"; +} +def dispRI : Operand { + let ParserMatchClass = PPCDispRIOperand; +} +def PPCDispRIXOperand : AsmOperandClass { + let Name = "DispRIX"; let PredicateMethod = "isS16ImmX4"; + let RenderMethod = "addS16ImmOperands"; +} +def dispRIX : Operand { + let ParserMatchClass = PPCDispRIXOperand; +} +def PPCDispRIHashOperand : AsmOperandClass { + let Name = "DispRIHash"; let PredicateMethod = "isHashImmX8"; + let RenderMethod = "addImmOperands"; +} +def dispRIHash : Operand { + let ParserMatchClass = PPCDispRIHashOperand; +} +def PPCDispRIX16Operand : AsmOperandClass { + let Name = "DispRIX16"; let PredicateMethod = "isS16ImmX16"; + let RenderMethod = "addS16ImmOperands"; +} +def dispRIX16 : Operand { + let ParserMatchClass = PPCDispRIX16Operand; +} +def PPCDispSPE8Operand : AsmOperandClass { + let Name = "DispSPE8"; let PredicateMethod = "isU8ImmX8"; + let RenderMethod = "addImmOperands"; +} +def dispSPE8 : Operand { + let ParserMatchClass = PPCDispSPE8Operand; +} +def PPCDispSPE4Operand : AsmOperandClass { + let Name = "DispSPE4"; let PredicateMethod = "isU7ImmX4"; + let RenderMethod = "addImmOperands"; +} +def dispSPE4 : Operand { + let ParserMatchClass = PPCDispSPE4Operand; +} +def PPCDispSPE2Operand : AsmOperandClass { + let Name = "DispSPE2"; let PredicateMethod = "isU6ImmX2"; + let RenderMethod = "addImmOperands"; +} +def dispSPE2 : Operand { + let ParserMatchClass = PPCDispSPE2Operand; +} + +def memri : Operand { + let PrintMethod = "printMemRegImm"; + let MIOperandInfo = (ops dispRI:$imm, ptr_rc_nor0:$reg); + let EncoderMethod = "getMemRIEncoding"; + let DecoderMethod = "decodeMemRIOperands"; + let OperandType = "OPERAND_MEMORY"; +} +def memrr : Operand { + let PrintMethod = "printMemRegReg"; + let MIOperandInfo = (ops ptr_rc_nor0:$ptrreg, ptr_rc_idx:$offreg); + let OperandType = "OPERAND_MEMORY"; +} +def memrix : Operand { // memri where the imm is 4-aligned. + let PrintMethod = "printMemRegImm"; + let MIOperandInfo = (ops dispRIX:$imm, ptr_rc_nor0:$reg); + let EncoderMethod = "getMemRIXEncoding"; + let DecoderMethod = "decodeMemRIXOperands"; + let OperandType = "OPERAND_MEMORY"; +} +def memrihash : Operand { + // memrihash 8-aligned for ROP Protection Instructions. + let PrintMethod = "printMemRegImmHash"; + let MIOperandInfo = (ops dispRIHash:$imm, ptr_rc_nor0:$reg); + let EncoderMethod = "getMemRIHashEncoding"; + let DecoderMethod = "decodeMemRIHashOperands"; + let OperandType = "OPERAND_MEMORY"; +} +def memrix16 : Operand { // memri, imm is 16-aligned, 12-bit, Inst{16:27} + let PrintMethod = "printMemRegImm"; + let MIOperandInfo = (ops dispRIX16:$imm, ptr_rc_nor0:$reg); + let EncoderMethod = "getMemRIX16Encoding"; + let DecoderMethod = "decodeMemRIX16Operands"; + let OperandType = "OPERAND_MEMORY"; +} +def spe8dis : Operand { // SPE displacement where the imm is 8-aligned. + let PrintMethod = "printMemRegImm"; + let MIOperandInfo = (ops dispSPE8:$imm, ptr_rc_nor0:$reg); + let EncoderMethod = "getSPE8DisEncoding"; + let DecoderMethod = "decodeSPE8Operands"; + let OperandType = "OPERAND_MEMORY"; +} +def spe4dis : Operand { // SPE displacement where the imm is 4-aligned. + let PrintMethod = "printMemRegImm"; + let MIOperandInfo = (ops dispSPE4:$imm, ptr_rc_nor0:$reg); + let EncoderMethod = "getSPE4DisEncoding"; + let DecoderMethod = "decodeSPE4Operands"; + let OperandType = "OPERAND_MEMORY"; +} +def spe2dis : Operand { // SPE displacement where the imm is 2-aligned. + let PrintMethod = "printMemRegImm"; + let MIOperandInfo = (ops dispSPE2:$imm, ptr_rc_nor0:$reg); + let EncoderMethod = "getSPE2DisEncoding"; + let DecoderMethod = "decodeSPE2Operands"; + let OperandType = "OPERAND_MEMORY"; +} + +// A single-register address. This is used with the SjLj +// pseudo-instructions which translates to LD/LWZ. These instructions requires +// G8RC_NOX0 registers. +def memr : Operand { + let MIOperandInfo = (ops ptr_rc_nor0:$ptrreg); + let OperandType = "OPERAND_MEMORY"; +} +def PPCTLSRegOperand : AsmOperandClass { + let Name = "TLSReg"; let PredicateMethod = "isTLSReg"; + let RenderMethod = "addTLSRegOperands"; +} +def tlsreg32 : Operand { + let EncoderMethod = "getTLSRegEncoding"; + let ParserMatchClass = PPCTLSRegOperand; +} +def tlsgd32 : Operand {} +def tlscall32 : Operand { + let PrintMethod = "printTLSCall"; + let MIOperandInfo = (ops calltarget:$func, tlsgd32:$sym); + let EncoderMethod = "getTLSCallEncoding"; +} + +// PowerPC Predicate operand. +def pred : Operand { + let PrintMethod = "printPredicateOperand"; + let MIOperandInfo = (ops i32imm:$bibo, crrc:$reg); +} + +def PPCRegVSRCAsmOperand : AsmOperandClass { + let Name = "RegVSRC"; let PredicateMethod = "isVSRegNumber"; +} +def vsrc : RegisterOperand { + let ParserMatchClass = PPCRegVSRCAsmOperand; +} + +def PPCRegVSFRCAsmOperand : AsmOperandClass { + let Name = "RegVSFRC"; let PredicateMethod = "isVSRegNumber"; +} +def vsfrc : RegisterOperand { + let ParserMatchClass = PPCRegVSFRCAsmOperand; +} + +def PPCRegVSSRCAsmOperand : AsmOperandClass { + let Name = "RegVSSRC"; let PredicateMethod = "isVSRegNumber"; +} +def vssrc : RegisterOperand { + let ParserMatchClass = PPCRegVSSRCAsmOperand; +} + +def PPCRegSPILLTOVSRRCAsmOperand : AsmOperandClass { + let Name = "RegSPILLTOVSRRC"; let PredicateMethod = "isVSRegNumber"; +} + +def spilltovsrrc : RegisterOperand { + let ParserMatchClass = PPCRegSPILLTOVSRRCAsmOperand; +} + +def PPCRegVSRpRCAsmOperand : AsmOperandClass { + let Name = "RegVSRpRC"; let PredicateMethod = "isVSRpEvenRegNumber"; +} + +def vsrprc : RegisterOperand { + let ParserMatchClass = PPCRegVSRpRCAsmOperand; +} + +def PPCRegVSRpEvenRCAsmOperand : AsmOperandClass { + let Name = "RegVSRpEvenRC"; let PredicateMethod = "isVSRpEvenRegNumber"; +} + +def vsrpevenrc : RegisterOperand { + let ParserMatchClass = PPCRegVSRpEvenRCAsmOperand; + let EncoderMethod = "getVSRpEvenEncoding"; + let DecoderMethod = "decodeVSRpEvenOperands"; +} + +def PPCRegACCRCAsmOperand : AsmOperandClass { + let Name = "RegACCRC"; let PredicateMethod = "isACCRegNumber"; +} + +def acc : RegisterOperand { + let ParserMatchClass = PPCRegACCRCAsmOperand; +} + +def uacc : RegisterOperand { + let ParserMatchClass = PPCRegACCRCAsmOperand; +}