Support the min of module flags when linking, use for AArch64 BTI/PAC-RET

[danielkiss]

Summary

LTO objects might compiled with different mbranch-protection flags which will cause an error in the linker.
Such a setup is allowed in the normal build with this change that is possible.

[tschuett]

This would silently reduce protection, when incompatible modules are linked?

[danielkiss]

In D123493#3442303, @tschuett wrote:

This would silently reduce protection, when incompatible modules are linked?

Yes, but that happens also with the normal linker too by default.

[pcc]

Can we add logic to llvm/lib/IR/AutoUpgrade.cpp to change Error to Min if we see one of these module flags? I think that should allow old bitcode to continue working.

[danielkiss]

In D123493#3443152, @pcc wrote:

Can we add logic to llvm/lib/IR/AutoUpgrade.cpp to change Error to Min if we see one of these module flags? I think that should allow old bitcode to continue working.

Thanks, I added the support there. Surprisingly the AutoUpgrade did not run in the linker.

[pcc]

LGTM but please add a test for the autoupgrader.

[danielkiss]

Thanks, test is added.

[MaskRay]

This behavior requires that all participating modules have the module flag. In the absence of the module flag, what should be behavior be?

For module flags like "sign-return-address", I see that you just emit the flag unconditionally (which can be zero).

[danielkiss]

In D123493#3569025, @MaskRay wrote:

This behavior requires that all participating modules have the module flag. In the absence of the module flag, what should be behavior be?

For module flags like "sign-return-address", I see that you just emit the flag unconditionally (which can be zero).

Absence of the "branch-target-enforcement" and "sign-return-address"` means features are off. So the flag merger will take an existing flag and the feature could be turned on, which is bad.
AutoUpdater should insert the attributes with zero value if they are missing.

clang/lib/CodeGen/CodeGenModule.cpp

void CodeGenModule::Release() {
   if (CodeGenOpts.IBTSeal)
     getModule().addModuleFlag(llvm::Module::Override, "ibt-seal", 1);
 
   // Add module metadata for return address signing (ignoring
   // non-leaf/all) and stack tagging. These are actually turned on by function
   // attributes, but we use module metadata to emit build attributes. This is
   // needed for LTO, where the function attributes are inside bitcode
   // serialised into a global variable by the time build attributes are
-  // emitted, so we can't access them.
+  // emitted, so we can't access them. LTO objects could be compiled with
+  // different flags therefore module flags are set to "Min" behavior to achieve
+  // the same end result of the normal build where e.g BTI is off if any object
+  // doesn't support it.
   if (Context.getTargetInfo().hasFeature("ptrauth") &&
       LangOpts.getSignReturnAddressScope() !=
           LangOptions::SignReturnAddressScopeKind::None)
     getModule().addModuleFlag(llvm::Module::Override,
                               "sign-return-address-buildattr", 1);
   if (LangOpts.Sanitize.has(SanitizerKind::MemtagStack))
     getModule().addModuleFlag(llvm::Module::Override,
                               "tag-stack-memory-buildattr", 1);
 
   if (Arch == llvm::Triple::thumb || Arch == llvm::Triple::thumbeb ||
       Arch == llvm::Triple::arm || Arch == llvm::Triple::armeb ||
       Arch == llvm::Triple::aarch64 || Arch == llvm::Triple::aarch64_32 ||
       Arch == llvm::Triple::aarch64_be) {
-    getModule().addModuleFlag(llvm::Module::Error, "branch-target-enforcement",
+    getModule().addModuleFlag(llvm::Module::Min, "branch-target-enforcement",
                               LangOpts.BranchTargetEnforcement);
 
-    getModule().addModuleFlag(llvm::Module::Error, "sign-return-address",
+    getModule().addModuleFlag(llvm::Module::Min, "sign-return-address",
                               LangOpts.hasSignReturnAddress());
 
-    getModule().addModuleFlag(llvm::Module::Error, "sign-return-address-all",
+    getModule().addModuleFlag(llvm::Module::Min, "sign-return-address-all",
                               LangOpts.isSignReturnAddressScopeAll());
 
-    getModule().addModuleFlag(llvm::Module::Error,
+    getModule().addModuleFlag(llvm::Module::Min,
                               "sign-return-address-with-bkey",
                               !LangOpts.isSignReturnAddressWithAKey());
   }
 
   if (!CodeGenOpts.MemoryProfileOutput.empty()) {
     llvm::LLVMContext &Ctx = TheModule.getContext();
     getModule().addModuleFlag(
         llvm::Module::Error, "MemProfProfileFilename",

clang/test/CodeGen/aarch64-sign-return-address.c

 // CHECK-LABEL: @foo() #[[#ATTR:]]
 
 // CHECK-NOT:  attributes #[[#ATTR]] = { {{.*}} "sign-return-address"
 // CHECK-NOT:  attributes #[[#ATTR]] = { {{.*}} "sign-return-address-key"
 // CHECK-NOT:  attributes #[[#ATTR]] = { {{.*}} "branch-target-enforcement"
 
 // Check module attributes
 
-// NONE:  !{i32 1, !"branch-target-enforcement", i32 0}
-// ALL:   !{i32 1, !"branch-target-enforcement", i32 0}
-// PART:  !{i32 1, !"branch-target-enforcement", i32 0}
-// BTE:   !{i32 1, !"branch-target-enforcement", i32 1}
-// B-KEY: !{i32 1, !"branch-target-enforcement", i32 0}
-
-// NONE:  !{i32 1, !"sign-return-address", i32 0}
-// ALL:   !{i32 1, !"sign-return-address", i32 1}
-// PART:  !{i32 1, !"sign-return-address", i32 1}
-// BTE:   !{i32 1, !"sign-return-address", i32 0}
-// B-KEY: !{i32 1, !"sign-return-address", i32 1}
-
-// NONE:  !{i32 1, !"sign-return-address-all", i32 0}
-// ALL:   !{i32 1, !"sign-return-address-all", i32 1}
-// PART:  !{i32 1, !"sign-return-address-all", i32 0}
-// BTE:   !{i32 1, !"sign-return-address-all", i32 0}
-// B-KEY: !{i32 1, !"sign-return-address-all", i32 0}
-
-// NONE:  !{i32 1, !"sign-return-address-with-bkey", i32 0}
-// ALL:   !{i32 1, !"sign-return-address-with-bkey", i32 0}
-// PART:  !{i32 1, !"sign-return-address-with-bkey", i32 0}
-// BTE:   !{i32 1, !"sign-return-address-with-bkey", i32 0}
-// B-KEY: !{i32 1, !"sign-return-address-with-bkey", i32 1}
+// NONE:  !{i32 8, !"branch-target-enforcement", i32 0}
+// ALL:   !{i32 8, !"branch-target-enforcement", i32 0}
+// PART:  !{i32 8, !"branch-target-enforcement", i32 0}
+// BTE:   !{i32 8, !"branch-target-enforcement", i32 1}
+// B-KEY: !{i32 8, !"branch-target-enforcement", i32 0}
+
+// NONE:  !{i32 8, !"sign-return-address", i32 0}
+// ALL:   !{i32 8, !"sign-return-address", i32 1}
+// PART:  !{i32 8, !"sign-return-address", i32 1}
+// BTE:   !{i32 8, !"sign-return-address", i32 0}
+// B-KEY: !{i32 8, !"sign-return-address", i32 1}
+
+// NONE:  !{i32 8, !"sign-return-address-all", i32 0}
+// ALL:   !{i32 8, !"sign-return-address-all", i32 1}
+// PART:  !{i32 8, !"sign-return-address-all", i32 0}
+// BTE:   !{i32 8, !"sign-return-address-all", i32 0}
+// B-KEY: !{i32 8, !"sign-return-address-all", i32 0}
+
+// NONE:  !{i32 8, !"sign-return-address-with-bkey", i32 0}
+// ALL:   !{i32 8, !"sign-return-address-with-bkey", i32 0}
+// PART:  !{i32 8, !"sign-return-address-with-bkey", i32 0}
+// BTE:   !{i32 8, !"sign-return-address-with-bkey", i32 0}
+// B-KEY: !{i32 8, !"sign-return-address-with-bkey", i32 1}
 
 void foo() {}

clang/test/CodeGen/arm-branch-protection-attr-2.c

 // CHECK-LABEL: @foo() #[[#ATTR:]]
 
 // CHECK-NOT:  attributes #[[#ATTR]] = { {{.*}} "sign-return-address"
 // CHECK-NOT:  attributes #[[#ATTR]] = { {{.*}} "sign-return-address-key"
 // CHECK-NOT:  attributes #[[#ATTR]] = { {{.*}} "branch-target-enforcement"
 
 // Check module attributes
 
-// NONE:  !{i32 1, !"branch-target-enforcement", i32 0}
-// PART:  !{i32 1, !"branch-target-enforcement", i32 0}
-// ALL:   !{i32 1, !"branch-target-enforcement", i32 0}
-// BTE:   !{i32 1, !"branch-target-enforcement", i32 1}
-
-// NONE:  !{i32 1, !"sign-return-address", i32 0}
-// PART:  !{i32 1, !"sign-return-address", i32 1}
-// ALL:   !{i32 1, !"sign-return-address", i32 1}
-// BTE:   !{i32 1, !"sign-return-address", i32 0}
-
-// NONE:  !{i32 1, !"sign-return-address-all", i32 0}
-// PART:  !{i32 1, !"sign-return-address-all", i32 0}
-// ALL:   !{i32 1, !"sign-return-address-all", i32 1}
-// BTE:   !{i32 1, !"sign-return-address-all", i32 0}
+// NONE:  !{i32 8, !"branch-target-enforcement", i32 0}
+// PART:  !{i32 8, !"branch-target-enforcement", i32 0}
+// ALL:   !{i32 8, !"branch-target-enforcement", i32 0}
+// BTE:   !{i32 8, !"branch-target-enforcement", i32 1}
+
+// NONE:  !{i32 8, !"sign-return-address", i32 0}
+// PART:  !{i32 8, !"sign-return-address", i32 1}
+// ALL:   !{i32 8, !"sign-return-address", i32 1}
+// BTE:   !{i32 8, !"sign-return-address", i32 0}
+
+// NONE:  !{i32 8, !"sign-return-address-all", i32 0}
+// PART:  !{i32 8, !"sign-return-address-all", i32 0}
+// ALL:   !{i32 8, !"sign-return-address-all", i32 1}
+// BTE:   !{i32 8, !"sign-return-address-all", i32 0}
 
 void foo() {}

clang/test/Frontend/arm-ignore-branch-protection-option.c

 
 /// Check there are no branch protection function attributes
 
 // CHECK-NOT:  attributes { {{.*}} "sign-return-address"
 // CHECK-NOT:  attributes { {{.*}} "sign-return-address-key"
 // CHECK-NOT:  attributes { {{.*}} "branch-target-enforcement"
 
 /// Check that there are branch protection module attributes despite the warning.
-// CHECK: !{i32 1, !"branch-target-enforcement", i32 1}
+// CHECK: !{i32 8, !"branch-target-enforcement", i32 1}

llvm/include/llvm/IR/Module.h

enum ModFlagBehavior {
     /// Appends the two values, which are required to be metadata
     /// nodes. However, duplicate entries in the second list are dropped
     /// during the append operation.
     AppendUnique = 6,
 
     /// Takes the max of the two values, which are required to be integers.
     Max = 7,
 
+    /// Takes the min of the two values, which are required to be integers.
+    Min = 8,
+
     // Markers:
     ModFlagBehaviorFirstVal = Error,
-    ModFlagBehaviorLastVal = Max
+    ModFlagBehaviorLastVal = Min
   };
 
   /// Checks if Metadata represents a valid ModFlagBehavior, and stores the
   /// converted result in MFB.
   static bool isValidModFlagBehavior(Metadata *MD, ModFlagBehavior &MFB);
 
   /// Check if the given module flag metadata represents a valid module flag,
   /// and store the flag behavior, the key string and the value metadata.

llvm/lib/IR/AutoUpgrade.cpp

if (ID->getString() == "PIC Level" || ID->getString() == "PIE Level") {
               ConstantAsMetadata::get(ConstantInt::get(Int32Ty, Module::Max)),
               MDString::get(M.getContext(), ID->getString()),
               Op->getOperand(2)};
           ModFlags->setOperand(I, MDNode::get(M.getContext(), Ops));
           Changed = true;
         }
       }
     }
+
+    // Upgrade branch protection and return address signing module flags. The
+    // module flag behavior for these fields were Error and now they are Min.
+    if (ID->getString() == "branch-target-enforcement" ||
+        ID->getString().startswith("sign-return-address")) {
+      if (auto *Behavior =
+              mdconst::dyn_extract_or_null<ConstantInt>(Op->getOperand(0))) {
+        if (Behavior->getLimitedValue() == Module::Error) {
+          Type *Int32Ty = Type::getInt32Ty(M.getContext());
+          Metadata *Ops[3] = {
+              ConstantAsMetadata::get(ConstantInt::get(Int32Ty, Module::Min)),
+              Op->getOperand(1), Op->getOperand(2)};
+          ModFlags->setOperand(I, MDNode::get(M.getContext(), Ops));
+          Changed = true;
+        }
+      }
+    }
+
     // Upgrade Objective-C Image Info Section. Removed the whitespce in the
     // section name so that llvm-lto will not complain about mismatching
     // module flags that is functionally the same.
     if (ID->getString() == "Objective-C Image Info Section") {
       if (auto *Value = dyn_cast_or_null<MDString>(Op->getOperand(2))) {
         SmallVector<StringRef, 4> ValueComp;
         Value->getString().split(ValueComp, " ");
         if (ValueComp.size() != 1) {

llvm/lib/IR/Verifier.cpp

Verifier::visitModuleFlag(const MDNode *Op,
   // Check the values for behaviors with additional requirements.
   switch (MFB) {
   case Module::Error:
   case Module::Warning:
   case Module::Override:
     // These behavior types accept any value.
     break;
 
+  case Module::Min: {
+    Check(mdconst::dyn_extract_or_null<ConstantInt>(Op->getOperand(2)),
+          "invalid value for 'min' module flag (expected constant integer)",
+          Op->getOperand(2));
+    break;
+  }
+
   case Module::Max: {
     Check(mdconst::dyn_extract_or_null<ConstantInt>(Op->getOperand(2)),
           "invalid value for 'max' module flag (expected constant integer)",
           Op->getOperand(2));
     break;
   }
 
   case Module::Require: {

llvm/lib/Linker/IRMover.cpp

 //===- lib/Linker/IRMover.cpp ---------------------------------------------===//
 //
 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
 // See https://llvm.org/LICENSE.txt for license information.
 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
 //
 //===----------------------------------------------------------------------===//
 
 #include "llvm/Linker/IRMover.h"
 #include "LinkDiagnosticInfo.h"
 #include "llvm/ADT/SetVector.h"
 #include "llvm/ADT/SmallPtrSet.h"
 #include "llvm/ADT/SmallString.h"
 #include "llvm/ADT/Triple.h"
+#include "llvm/IR/AutoUpgrade.h"
 #include "llvm/IR/Constants.h"
 #include "llvm/IR/DebugInfoMetadata.h"
 #include "llvm/IR/DiagnosticPrinter.h"
 #include "llvm/IR/Function.h"
 #include "llvm/IR/GVMaterializer.h"
 #include "llvm/IR/GlobalValue.h"
 #include "llvm/IR/Intrinsics.h"
 #include "llvm/IR/Module.h"

 
 /// Merge the linker flags in Src into the Dest module.
 Error IRLinker::linkModuleFlagsMetadata() {
   // If the source module has no module flags, we are done.
   const NamedMDNode *SrcModFlags = SrcM->getModuleFlagsMetadata();
   if (!SrcModFlags)
     return Error::success();
 
+  // Check for module flag for updates before do anything.
+  UpgradeModuleFlags(*SrcM);
+
   // If the destination module doesn't have module flags yet, then just copy
   // over the source module's flags.
   NamedMDNode *DstModFlags = DstM.getOrInsertModuleFlagsMetadata();
   if (DstModFlags->getNumOperands() == 0) {
     for (unsigned I = 0, E = SrcModFlags->getNumOperands(); I != E; ++I)
       DstModFlags->addOperand(SrcModFlags->getOperand(I));
 
     return Error::success();
for (unsigned I = 0, E = SrcModFlags->getNumOperands(); I != E; ++I) {
     } else if (SrcBehaviorValue == Module::Override) {
       // Update the destination flag to that of the source.
       overrideDstValue();
       continue;
     }
 
     // Diagnose inconsistent merge behavior types.
     if (SrcBehaviorValue != DstBehaviorValue) {
+      bool MinAndWarn = (SrcBehaviorValue == Module::Min &&
+                         DstBehaviorValue == Module::Warning) ||
+                        (DstBehaviorValue == Module::Min &&
+                         SrcBehaviorValue == Module::Warning);
       bool MaxAndWarn = (SrcBehaviorValue == Module::Max &&
                          DstBehaviorValue == Module::Warning) ||
                         (DstBehaviorValue == Module::Max &&
                          SrcBehaviorValue == Module::Warning);
-      if (!MaxAndWarn)
+      if (!(MaxAndWarn || MinAndWarn))
         return stringErr("linking module flags '" + ID->getString() +
                          "': IDs have conflicting behaviors in '" +
                          SrcM->getModuleIdentifier() + "' and '" +
                          DstM.getModuleIdentifier() + "'");
     }
 
     auto replaceDstValue = [&](MDNode *New) {
       Metadata *FlagOps[] = {DstOp->getOperand(0), ID, New};
if ((DstBehaviorValue == Module::Warning ||
           << "linking module flags '" << ID->getString()
           << "': IDs have conflicting values ('" << *SrcOp->getOperand(2)
           << "' from " << SrcM->getModuleIdentifier() << " with '"
           << *DstOp->getOperand(2) << "' from " << DstM.getModuleIdentifier()
           << ')';
       emitWarning(Str);
     }
 
+    // Choose the minimum if either source or destination request Min behavior.
+    if (DstBehaviorValue == Module::Min || SrcBehaviorValue == Module::Min) {
+      ConstantInt *DstValue =
+          mdconst::extract<ConstantInt>(DstOp->getOperand(2));
+      ConstantInt *SrcValue =
+          mdconst::extract<ConstantInt>(SrcOp->getOperand(2));
+
+      // The resulting flag should have a Min behavior, and contain the minimum
+      // value from between the source and destination values.
+      Metadata *FlagOps[] = {
+          (DstBehaviorValue != Module::Min ? SrcOp : DstOp)->getOperand(0), ID,
+          (SrcValue->getZExtValue() < DstValue->getZExtValue() ? SrcOp : DstOp)
+              ->getOperand(2)};
+      MDNode *Flag = MDNode::get(DstM.getContext(), FlagOps);
+      DstModFlags->setOperand(DstIndex, Flag);
+      Flags[ID].first = Flag;
+      continue;
+    }
+
     // Choose the maximum if either source or destination request Max behavior.
     if (DstBehaviorValue == Module::Max || SrcBehaviorValue == Module::Max) {
       ConstantInt *DstValue =
           mdconst::extract<ConstantInt>(DstOp->getOperand(2));
       ConstantInt *SrcValue =
           mdconst::extract<ConstantInt>(SrcOp->getOperand(2));
 
       // The resulting flag should have a Max behavior, and contain the maximum

llvm/test/Bitcode/upgrade-branch-protection.ll

+;; Test that module flags "branch-target-enforcement" and "sign-return-address"  can be upgraded to
+;; are upgraded from Error to Min.
+
+; RUN: llvm-as %s -o - | llvm-dis - | FileCheck %s
+
+!llvm.module.flags = !{!0, !1, !2, !3}
+
+!0 = !{i32 1, !"branch-target-enforcement", i32 1}
+!1 = !{i32 1, !"sign-return-address", i32 1}
+!2 = !{i32 1, !"sign-return-address-all", i32 1}
+!3 = !{i32 1, !"sign-return-address-with-bkey", i32 1}
+
+;CHECK: !0 = !{i32 8, !"branch-target-enforcement", i32 1}
+;CHECK: !1 = !{i32 8, !"sign-return-address", i32 1}
+;CHECK: !2 = !{i32 8, !"sign-return-address-all", i32 1}
+;CHECK: !3 = !{i32 8, !"sign-return-address-with-bkey", i32 1}
 No newline at end of file

llvm/test/CodeGen/AArch64/debug-info-sve-dbg-declare.mir

--- |
   !llvm.ident = !{!10}
 
   !0 = distinct !DICompileUnit(language: DW_LANG_C99, file: !1, producer: "clang version 12.0.0 (https://github.com/llvm/llvm-project.git b19275ba870a06c5ef0428af6264ffd28c7cde9e)", isOptimized: false, runtimeVersion: 0, emissionKind: FullDebug, enums: !2, splitDebugInlining: false, nameTableKind: None)
   !1 = !DIFile(filename: "t.c", directory: "/tmp/")
   !2 = !{}
   !3 = !{i32 7, !"Dwarf Version", i32 4}
   !4 = !{i32 2, !"Debug Info Version", i32 3}
   !5 = !{i32 1, !"wchar_size", i32 4}
-  !6 = !{i32 1, !"branch-target-enforcement", i32 0}
-  !7 = !{i32 1, !"sign-return-address", i32 0}
-  !8 = !{i32 1, !"sign-return-address-all", i32 0}
-  !9 = !{i32 1, !"sign-return-address-with-bkey", i32 0}
+  !6 = !{i32 8, !"branch-target-enforcement", i32 0}
+  !7 = !{i32 8, !"sign-return-address", i32 0}
+  !8 = !{i32 8, !"sign-return-address-all", i32 0}
+  !9 = !{i32 8, !"sign-return-address-with-bkey", i32 0}
   !10 = !{!"clang version 12.0.0 (https://github.com/llvm/llvm-project.git b19275ba870a06c5ef0428af6264ffd28c7cde9e)"}
   !11 = distinct !DISubprogram(name: "foo", scope: !1, file: !1, line: 4, type: !12, scopeLine: 4, flags: DIFlagPrototyped, spFlags: DISPFlagDefinition, unit: !0, retainedNodes: !2)
   !12 = !DISubroutineType(types: !13)
   !13 = !{!14, !14, !14, !21, !21, !27}
   !15 = !DIFile(filename: "lib/clang/12.0.0/include/arm_sve.h", directory: "/tmp")
   !14 = !DIDerivedType(tag: DW_TAG_typedef, name: "svint32_t", file: !15, line: 34, baseType: !16)
   !16 = !DIDerivedType(tag: DW_TAG_typedef, name: "__SVInt32_t", file: !1, baseType: !17)
   !17 = !DICompositeType(tag: DW_TAG_array_type, baseType: !18, flags: DIFlagVector, elements: !19)

llvm/test/CodeGen/AArch64/live-debugvalues-sve.mir

--- |
   !llvm.ident = !{!10}
 
   !0 = distinct !DICompileUnit(language: DW_LANG_C99, file: !1, producer: "clang version 12.0.0 (https://github.com/llvm/llvm-project.git b19275ba870a06c5ef0428af6264ffd28c7cde9e)", isOptimized: true, runtimeVersion: 0, emissionKind: FullDebug, enums: !2, splitDebugInlining: false, nameTableKind: None)
   !1 = !DIFile(filename: "t.c", directory: "/tmp/")
   !2 = !{}
   !3 = !{i32 7, !"Dwarf Version", i32 4}
   !4 = !{i32 2, !"Debug Info Version", i32 3}
   !5 = !{i32 1, !"wchar_size", i32 4}
-  !6 = !{i32 1, !"branch-target-enforcement", i32 0}
-  !7 = !{i32 1, !"sign-return-address", i32 0}
-  !8 = !{i32 1, !"sign-return-address-all", i32 0}
-  !9 = !{i32 1, !"sign-return-address-with-bkey", i32 0}
+  !6 = !{i32 8, !"branch-target-enforcement", i32 0}
+  !7 = !{i32 8, !"sign-return-address", i32 0}
+  !8 = !{i32 8, !"sign-return-address-all", i32 0}
+  !9 = !{i32 8, !"sign-return-address-with-bkey", i32 0}
   !10 = !{!"clang version 12.0.0 (https://github.com/llvm/llvm-project.git b19275ba870a06c5ef0428af6264ffd28c7cde9e)"}
   !11 = distinct !DISubprogram(name: "foo", scope: !1, file: !1, line: 6, type: !12, scopeLine: 6, flags: DIFlagPrototyped | DIFlagAllCallsDescribed, spFlags: DISPFlagDefinition | DISPFlagOptimized, unit: !0, retainedNodes: !26)
   !12 = !DISubroutineType(types: !13)
   !13 = !{!14, !21, !21, !18}
   !14 = !DIDerivedType(tag: DW_TAG_typedef, name: "svint32x2_t", file: !15, line: 59, baseType: !16)
   !15 = !DIFile(filename: "lib/clang/12.0.0/include/arm_sve.h", directory: "/tmp")
   !16 = !DIDerivedType(tag: DW_TAG_typedef, name: "__clang_svint32x2_t", file: !1, baseType: !17)
   !17 = !DICompositeType(tag: DW_TAG_array_type, baseType: !18, flags: DIFlagVector, elements: !19)

llvm/test/CodeGen/AArch64/memsize-remarks.ll

 
 !llvm.module.flags = !{!0, !1, !2, !3, !4, !5, !6, !7, !8, !9}
 !llvm.dbg.cu = !{!10}
 !llvm.ident = !{!13}
 
 !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 12, i32 0]}
 !1 = !{i32 2, !"Debug Info Version", i32 3}
 !2 = !{i32 1, !"wchar_size", i32 4}
-!3 = !{i32 1, !"branch-target-enforcement", i32 0}
-!4 = !{i32 1, !"sign-return-address", i32 0}
-!5 = !{i32 1, !"sign-return-address-all", i32 0}
-!6 = !{i32 1, !"sign-return-address-with-bkey", i32 0}
+!3 = !{i32 8, !"branch-target-enforcement", i32 0}
+!4 = !{i32 8, !"sign-return-address", i32 0}
+!5 = !{i32 8, !"sign-return-address-all", i32 0}
+!6 = !{i32 8, !"sign-return-address-with-bkey", i32 0}
 !7 = !{i32 7, !"PIC Level", i32 2}
 !8 = !{i32 7, !"uwtable", i32 1}
 !9 = !{i32 7, !"frame-pointer", i32 1}
 !10 = distinct !DICompileUnit(language: DW_LANG_C99, file: !11, producer: "clang", isOptimized: false, runtimeVersion: 0, emissionKind: NoDebug, enums: !12, splitDebugInlining: false, nameTableKind: None, sysroot: "/")
 !11 = !DIFile(filename: "memsize.c", directory: "")
 !12 = !{}
 !13 = !{!"clang"}
 !14 = distinct !DISubprogram(name: "memcpy_dynamic", scope: !11, file: !11, line: 3, type: !15, scopeLine: 3, flags: DIFlagPrototyped, spFlags: DISPFlagDefinition, unit: !10, retainedNodes: !12)

llvm/test/CodeGen/AArch64/note-gnu-property-pac-bti-0.ll

 ; RUN: llc -mtriple=aarch64-linux %s               -o - | \
 ; RUN:   FileCheck %s --check-prefix=ASM
 ; RUN: llc -mtriple=aarch64-linux %s -filetype=obj -o - |  \
 ; RUN:   llvm-readelf --notes - | FileCheck %s --check-prefix=OBJ
 @x = common dso_local global i32 0, align 4
 
 attributes #0 = { "branch-target-enforcement"="true" }
 
 !llvm.module.flags = !{!0, !1, !2, !3}
 
-!0 = !{i32 1, !"branch-target-enforcement", i32 1}
-!1 = !{i32 1, !"sign-return-address", i32 1}
-!2 = !{i32 1, !"sign-return-address-all", i32 0}
-!3 = !{i32 1, !"sign-return-address-with-bkey", i32 0}
+!0 = !{i32 8, !"branch-target-enforcement", i32 1}
+!1 = !{i32 8, !"sign-return-address", i32 1}
+!2 = !{i32 8, !"sign-return-address-all", i32 0}
+!3 = !{i32 8, !"sign-return-address-with-bkey", i32 0}
 
 ; Both attributes present in a file with no functions.
 ; ASM:      .word 3221225472
 ; ASM-NEXT: .word 4
 ; ASM-NEXT: .word 3
 
 ; OBJ: Properties: aarch64 feature: BTI, PAC

llvm/test/CodeGen/AArch64/note-gnu-property-pac-bti-1.ll

 ; RUN: llc -mtriple=aarch64-linux %s               -o - | \
 ; RUN:   FileCheck %s --check-prefix=ASM
 ; RUN: llc -mtriple=aarch64-linux %s -filetype=obj -o - |  \
 ; RUN:   llvm-readelf --notes - | FileCheck %s --check-prefix=OBJ
 
 define dso_local i32 @f() {
 entry:
   ret i32 0
 }
 
 !llvm.module.flags = !{!0, !1, !2, !3}
 
-!0 = !{i32 1, !"branch-target-enforcement", i32 1}
-!1 = !{i32 1, !"sign-return-address", i32 0}
-!2 = !{i32 1, !"sign-return-address-all", i32 0}
-!3 = !{i32 1, !"sign-return-address-with-bkey", i32 0}
+!0 = !{i32 8, !"branch-target-enforcement", i32 1}
+!1 = !{i32 8, !"sign-return-address", i32 0}
+!2 = !{i32 8, !"sign-return-address-all", i32 0}
+!3 = !{i32 8, !"sign-return-address-with-bkey", i32 0}
 
 ; BTI attribute present
 ; ASM:      .word 3221225472
 ; ASM-NEXT: .word 4
 ; ASM-NEXT: .word 1
 
 ; OBJ: Properties: aarch64 feature: BTI

llvm/test/CodeGen/AArch64/note-gnu-property-pac-bti-2.ll

 ; RUN: llc -mtriple=aarch64-linux %s               -o - | \
 ; RUN:   FileCheck %s --check-prefix=ASM
 ; RUN: llc -mtriple=aarch64-linux %s -filetype=obj -o - |  \
 ; RUN:   llvm-readelf --notes - | FileCheck %s --check-prefix=OBJ
 
 define dso_local i32 @f() {
 entry:
   ret i32 0
 }
 
 !llvm.module.flags = !{!0, !1, !2, !3}
 
-!0 = !{i32 1, !"branch-target-enforcement", i32 0}
-!1 = !{i32 1, !"sign-return-address", i32 1}
-!2 = !{i32 1, !"sign-return-address-all", i32 0}
-!3 = !{i32 1, !"sign-return-address-with-bkey", i32 0}
+!0 = !{i32 8, !"branch-target-enforcement", i32 0}
+!1 = !{i32 8, !"sign-return-address", i32 1}
+!2 = !{i32 8, !"sign-return-address-all", i32 0}
+!3 = !{i32 8, !"sign-return-address-with-bkey", i32 0}
 
 ; PAC attribute present
 ; ASM:      .word 3221225472
 ; ASM-NEXT: .word 4
 ; ASM-NEXT: .word 2
 
 ; OBJ: Properties: aarch64 feature: PAC

llvm/test/CodeGen/AArch64/note-gnu-property-pac-bti-3.ll

 ; RUN: llc -mtriple=aarch64-linux %s               -o - | \
 ; RUN:   FileCheck %s --check-prefix=ASM
 ; RUN: llc -mtriple=aarch64-linux %s -filetype=obj -o - |  \
 ; RUN:   llvm-readelf --notes - | FileCheck %s --check-prefix=OBJ
 
 define dso_local i32 @f() {
 entry:
   ret i32 0
 }
 
 !llvm.module.flags = !{!0, !1, !2, !3}
 
-!0 = !{i32 1, !"branch-target-enforcement", i32 1}
-!1 = !{i32 1, !"sign-return-address", i32 1}
-!2 = !{i32 1, !"sign-return-address-all", i32 0}
-!3 = !{i32 1, !"sign-return-address-with-bkey", i32 0}
+!0 = !{i32 8, !"branch-target-enforcement", i32 1}
+!1 = !{i32 8, !"sign-return-address", i32 1}
+!2 = !{i32 8, !"sign-return-address-all", i32 0}
+!3 = !{i32 8, !"sign-return-address-with-bkey", i32 0}
 
 ; Both attribute present
 ; ASM:      .word 3221225472
 ; ASM-NEXT: .word 4
 ; ASM-NEXT: .word 3
 
 ; OBJ: Properties: aarch64 feature: BTI, PAC

llvm/test/CodeGen/AArch64/note-gnu-property-pac-bti-4.ll

 }
 
 attributes #0 = { "branch-target-enforcement"="true" "sign-return-address"="non-leaf" }
 
 attributes #1 = { "branch-target-enforcement"="true" }
 
 !llvm.module.flags = !{!0, !1, !2, !3}
 
-!0 = !{i32 1, !"branch-target-enforcement", i32 0}
-!1 = !{i32 1, !"sign-return-address", i32 0}
-!2 = !{i32 1, !"sign-return-address-all", i32 0}
-!3 = !{i32 1, !"sign-return-address-with-bkey", i32 0}
+!0 = !{i32 8, !"branch-target-enforcement", i32 0}
+!1 = !{i32 8, !"sign-return-address", i32 0}
+!2 = !{i32 8, !"sign-return-address-all", i32 0}
+!3 = !{i32 8, !"sign-return-address-with-bkey", i32 0}
 
 ; Note is not emited if module has no properties
 ; ASM-NOT: .note.gnu.property
 No newline at end of file

llvm/test/CodeGen/AArch64/pacbti-llvm-generated-funcs-2.ll

 attributes #0 = { norecurse nounwind readnone "sign-return-address"="all" "sign-return-address-key"="b_key" }
 attributes #1 = { noinline }
 attributes #2 = { nofree noinline norecurse nounwind writeonly }
 
 !llvm.module.flags = !{!0, !1, !2, !3, !4, !5}
 
 !0 = !{i32 2, !"Debug Info Version", i32 3}
 !1 = !{i32 1, !"wchar_size", i32 4}
-!2 = !{i32 1, !"branch-target-enforcement", i32 0}
-!3 = !{i32 1, !"sign-return-address", i32 1}
-!4 = !{i32 1, !"sign-return-address-all", i32 1}
-!5 = !{i32 1, !"sign-return-address-with-bkey", i32 1}
+!2 = !{i32 8, !"branch-target-enforcement", i32 0}
+!3 = !{i32 8, !"sign-return-address", i32 1}
+!4 = !{i32 8, !"sign-return-address-all", i32 1}
+!5 = !{i32 8, !"sign-return-address-with-bkey", i32 1}

llvm/test/CodeGen/AArch64/pacbti-module-attrs.ll

 attributes #2 = { nounwind "branch-target-enforcement"="false" "sign-return-address"="non-leaf" "sign-return-address-key"="a_key" }
 attributes #3 = { nounwind "branch-target-enforcement"="false" "sign-return-address"="non-leaf" "sign-return-address-key"="b_key" }
 attributes #4 = { nounwind "branch-target-enforcement"="false" "sign-return-address"="all" "sign-return-address-key"="a_key" }
 attributes #5 = { nounwind }
 
 !llvm.module.flags = !{!0, !1, !2, !3, !4}
 
 !0 = !{i32 1, !"wchar_size", i32 4}
-!1 = !{i32 1, !"branch-target-enforcement", i32 1}
-!2 = !{i32 1, !"sign-return-address", i32 1}
-!3 = !{i32 1, !"sign-return-address-all", i32 0}
-!4 = !{i32 1, !"sign-return-address-with-bkey", i32 0}
+!1 = !{i32 8, !"branch-target-enforcement", i32 1}
+!2 = !{i32 8, !"sign-return-address", i32 1}
+!3 = !{i32 8, !"sign-return-address-all", i32 0}
+!4 = !{i32 8, !"sign-return-address-with-bkey", i32 0}

llvm/test/CodeGen/AArch64/setjmp-bti-no-enforcement.ll

 }
 
 declare i32 @setjmp(i8* noundef) #0
 declare void @notsetjmp()
 
 attributes #0 = { returns_twice }
 
 ; !llvm.module.flags = !{!0}
-; !0 = !{i32 1, !"branch-target-enforcement", i32 1}
+; !0 = !{i32 8, !"branch-target-enforcement", i32 1}

llvm/test/CodeGen/AArch64/setjmp-bti-outliner.ll

 ; NOBTI:         b       setjmp
 ; NOBTI:       OUTLINED_FUNCTION_1:
 ; NOBTI-LABEL:   ret
 
 attributes #0 = { returns_twice }
 
 !llvm.module.flags = !{!0}
 
-!0 = !{i32 1, !"branch-target-enforcement", i32 1}
+!0 = !{i32 8, !"branch-target-enforcement", i32 1}

llvm/test/CodeGen/AArch64/setjmp-bti.ll

 }
 
 declare i32 @setjmp(i8* noundef) #0
 declare void @notsetjmp()
 
 attributes #0 = { returns_twice }
 
 !llvm.module.flags = !{!0}
-!0 = !{i32 1, !"branch-target-enforcement", i32 1}
+!0 = !{i32 8, !"branch-target-enforcement", i32 1}

llvm/test/CodeGen/ARM/pacbti-module-attrs.ll

 define i32 @foo(i32 %a) {
 entry:
   %add = add nsw i32 %a, 1
   ret i32 %add
 }
 
 !llvm.module.flags = !{!0, !1, !2}
 
-!0 = !{i32 1, !"branch-target-enforcement", i32 1}
-!1 = !{i32 1, !"sign-return-address", i32 1}
-!2 = !{i32 1, !"sign-return-address-all", i32 0}
+!0 = !{i32 8, !"branch-target-enforcement", i32 1}
+!1 = !{i32 8, !"sign-return-address", i32 1}
+!2 = !{i32 8, !"sign-return-address-all", i32 0}

llvm/test/CodeGen/ARM/setjmp-bti-basic.ll

 
 declare void @bar(i32)
 declare i32 @setjmp(i64*) #0
 
 attributes #0 = { returns_twice }
 
 !llvm.module.flags = !{!0}
 
-!0 = !{i32 1, !"branch-target-enforcement", i32 1}
+!0 = !{i32 8, !"branch-target-enforcement", i32 1}

llvm/test/CodeGen/ARM/setjmp-bti-outliner.ll

 
 declare void @h(i32, i32, i32*)
 declare i32 @setjmp(i64*) #0
 
 attributes #0 = { returns_twice }
 
 !llvm.module.flags = !{!0}
 
-!0 = !{i32 1, !"branch-target-enforcement", i32 1}
+!0 = !{i32 8, !"branch-target-enforcement", i32 1}

llvm/test/CodeGen/Thumb2/LowOverheadLoops/skip-vpt-debug.mir

--- |
   !1 = !DIFile(filename: "skip-vpt-debug.c", directory: "/home/vicspe01")
   !2 = !{}
   !3 = !{i32 7, !"Dwarf Version", i32 4}
   !4 = !{i32 2, !"Debug Info Version", i32 3}
   !5 = !{i32 1, !"wchar_size", i32 4}
   !6 = !{i32 1, !"static_rwdata", i32 1}
   !7 = !{i32 1, !"enumsize_buildattr", i32 2}
   !8 = !{i32 1, !"armlib_unavailable", i32 0}
-  !9 = !{i32 1, !"branch-target-enforcement", i32 0}
-  !10 = !{i32 1, !"sign-return-address", i32 0}
-  !11 = !{i32 1, !"sign-return-address-all", i32 0}
+  !9 = !{i32 8, !"branch-target-enforcement", i32 0}
+  !10 = !{i32 8, !"sign-return-address", i32 0}
+  !11 = !{i32 8, !"sign-return-address-all", i32 0}
   !12 = !{!"Component: ARM Compiler 6.17.0.0 (permissive) Tool: armclang [00000000]"}
   !13 = distinct !DISubprogram(name: "arm_max_no_idx_f32", scope: !1, file: !1, line: 5, type: !14, scopeLine: 6, flags: DIFlagPrototyped | DIFlagAllCallsDescribed, spFlags: DISPFlagDefinition | DISPFlagOptimized, unit: !0, retainedNodes: !23)
   !14 = !DISubroutineType(types: !15)
   !15 = !{null, !16, !20, !22}
   !16 = !DIDerivedType(tag: DW_TAG_pointer_type, baseType: !17, size: 32)
   !17 = !DIDerivedType(tag: DW_TAG_const_type, baseType: !18)
   !18 = !DIDerivedType(tag: DW_TAG_typedef, name: "float32_t", file: !1, line: 1, baseType: !19)
   !19 = !DIBasicType(name: "float", size: 32, encoding: DW_ATE_float)

llvm/test/CodeGen/Thumb2/bti-const-island-multiple-jump-tables.mir

--- |
   declare dso_local void @h1(i32)
 
   declare dso_local void @h2(i32)
 
   attributes #0 = { nounwind "disable-tail-calls"="false" "frame-pointer"="none" "no-jump-tables"="false" "target-cpu"="generic" "target-features"="+armv8.1-m.main,+fp-armv8d16sp,+fp16,+fullfp16,+hwdiv,+lob,+ras,+thumb-mode,+vfp2sp,+vfp3d16sp,+vfp4d16sp" }
 
   !llvm.module.flags = !{!0}
 
-  !0 = !{i32 1, !"branch-target-enforcement", i32 1}
+  !0 = !{i32 8, !"branch-target-enforcement", i32 1}
 
 ...
 ---
 name:            f
 alignment:       4
 exposesReturnsTwice: false
 legalized:       false
 regBankSelected: false

llvm/test/CodeGen/Thumb2/bti-const-island.mir

switch i32 %argc, label %bb39.i [
       i32 77, label %bb37.i
       i32 100, label %bb5.i
       i32 101, label %bb42.i
       i32 116, label %bb42.i
     ]
   }
 
   !llvm.module.flags = !{!0}
-  !0 = !{i32 1, !"branch-target-enforcement", i32 1}
+  !0 = !{i32 8, !"branch-target-enforcement", i32 1}
 
 ...
 ---
 name:            test
 alignment:       4
 tracksRegLiveness: true
 liveins:
   - { reg: '$r0' }

llvm/test/CodeGen/Thumb2/bti-entry-blocks.ll

 ; CHECK: bti
 ; CHECK: movs r0, #2
 ; CHECK-NEXT: bx lr
 entry:
   ret i32 2
 }
 
 !llvm.module.flags = !{!1}
-!1 = !{i32 1, !"branch-target-enforcement", i32 1}
+!1 = !{i32 8, !"branch-target-enforcement", i32 1}

llvm/test/CodeGen/Thumb2/bti-indirect-branches.ll

lpad:
   br label %return
 
 return:
   %retval.0 = phi i32 [ 1, %lpad ], [ 0, %entry ]
   ret i32 %retval.0
 }
 
 !llvm.module.flags = !{!1}
-!1 = !{i32 1, !"branch-target-enforcement", i32 1}
+!1 = !{i32 8, !"branch-target-enforcement", i32 1}

llvm/test/CodeGen/Thumb2/bti-jump-table.mir

sw.epilog:
     br label %return
 
   return:
     %ret = phi i32 [ 0, %sw.epilog ], [ 2, %bb2 ], [ 3, %bb3 ], [ 4, %bb4 ], [ 1, %entry ]
     ret i32 %ret
   }
 
   !llvm.module.flags = !{!0}
-  !0 = !{i32 1, !"branch-target-enforcement", i32 1}
+  !0 = !{i32 8, !"branch-target-enforcement", i32 1}
 
 ...
 ---
 name:            table_switch
 alignment:       4
 tracksRegLiveness: true
 liveins:
   - { reg: '$r0' }

llvm/test/CodeGen/Thumb2/bti-outliner-1.ll

 }
 
 attributes #0 = { minsize nofree norecurse nounwind optsize  }
 attributes #1 = { minsize nofree norecurse nounwind optsize "branch-target-enforcement"="false" }
 attributes #2 = { minsize nofree norecurse nounwind optsize "branch-target-enforcement"="true"  }
 
 !llvm.module.flags = !{!0}
 
-!0 = !{i32 1, !"branch-target-enforcement", i32 0}
+!0 = !{i32 8, !"branch-target-enforcement", i32 0}

llvm/test/CodeGen/Thumb2/bti-outliner-2.ll

 ; CHECK:       bti
 
 attributes #0 = { minsize nofree norecurse nounwind optsize  }
 attributes #1 = { minsize nofree norecurse nounwind optsize "branch-target-enforcement"="false" }
 attributes #2 = { minsize nofree norecurse nounwind optsize "branch-target-enforcement"="true"  }
 
 !llvm.module.flags = !{!0}
 
-!0 = !{i32 1, !"branch-target-enforcement", i32 1}
+!0 = !{i32 8, !"branch-target-enforcement", i32 1}

llvm/test/CodeGen/Thumb2/bti-outliner-cost-1.ll

 
 ; CHECK-LABEL: OUTLINED_FUNCTION_0:
 ; CHECK-NOT:   bti
 
 attributes #0 = { minsize nofree norecurse nounwind optsize  }
 
 !llvm.module.flags = !{!0}
 
-!0 = !{i32 1, !"branch-target-enforcement", i32 0}
+!0 = !{i32 8, !"branch-target-enforcement", i32 0}

llvm/test/CodeGen/Thumb2/bti-outliner-cost-2.ll

 ; CHECK-NOT:   bl OUTLINED_FUNCTION
 
 ; CHECK-NOT: OUTLINED_FUNCTION
 
 attributes #0 = { minsize nofree norecurse nounwind optsize  }
 
 !llvm.module.flags = !{!0}
 
-!0 = !{i32 1, !"branch-target-enforcement", i32 1}
+!0 = !{i32 8, !"branch-target-enforcement", i32 1}

llvm/test/CodeGen/Thumb2/bti-pac-replace-1.mir

entry:
     %sub = add nsw i32 %call, -1
     ret i32 %sub
   }
 
   declare dso_local i32 @_Z1gi(i32)
 
   !llvm.module.flags = !{!0, !1, !2}
 
-  !0 = !{i32 1, !"branch-target-enforcement", i32 1}
-  !1 = !{i32 1, !"sign-return-address", i32 1}
-  !2 = !{i32 1, !"sign-return-address-all", i32 0}
+  !0 = !{i32 8, !"branch-target-enforcement", i32 1}
+  !1 = !{i32 8, !"sign-return-address", i32 1}
+  !2 = !{i32 8, !"sign-return-address-all", i32 0}
 
 ...
 ---
 name:            _Z1fi
 alignment:       4
 exposesReturnsTwice: false
 legalized:       false
 regBankSelected: false
bb.0.entry:
     $sp = frame-destroy t2LDMIA_UPD $sp, 14 /* CC::al */, $noreg, def $r7, def $lr
     t2AUT implicit $r12, implicit $lr, implicit $sp
     tBX_RET 14 /* CC::al */, $noreg, implicit killed $r0
 
 ...
 # Check PAC is replaces with PACBTI and it has the frame-setup flag
 # CHECK-LABEL: bb.0.entry:
 # CHECK:       frame-setup t2PACBTI
 No newline at end of file

llvm/test/CodeGen/Thumb2/bti-pac-replace-2.ll

 ; RUN: llc --force-dwarf-frame-section %s -o - | FileCheck %s
 ; RUN: llc --filetype=obj %s -o - | llvm-readelf -u - | FileCheck %s --check-prefix=UNWIND
 target datalayout = "e-m:e-p:32:32-Fi8-i64:64-v128:64:128-a:0:32-n32-S64"
 target triple = "thumbv8.1m.main-arm-unknown-eabi"
 
 define hidden i32 @_Z1fi(i32 %x) {
 entry:
   %add = add nsw i32 %x, 1
   %call = tail call i32 @_Z1gi(i32 %add)
   %sub = add nsw i32 %call, -1
   ret i32 %sub
 }
 
 declare dso_local i32 @_Z1gi(i32)
 
 !llvm.module.flags = !{!0, !1, !2}
-!0 = !{i32 1, !"branch-target-enforcement", i32 1}
-!1 = !{i32 1, !"sign-return-address", i32 1}
-!2 = !{i32 1, !"sign-return-address-all", i32 0}
+!0 = !{i32 8, !"branch-target-enforcement", i32 1}
+!1 = !{i32 8, !"sign-return-address", i32 1}
+!2 = !{i32 8, !"sign-return-address-all", i32 0}
 
 ; Check the function starts with `pacbti` and correct unwind info is emitted
 ; CHECK-LABEL: _Z1fi:
 ; ...
 ; CHECK:       pacbti   r12, lr, sp
 ; CHECK-NEXT:  .save    {r7, lr}
 ; CHECK-NEXT:  push     {r7, lr}
 ; CHECK-NEXT:  .cfi_def_cfa_offset 8

llvm/test/CodeGen/Thumb2/pacbti-m-basic.ll

 
 declare dso_local i32 @g(i32) local_unnamed_addr
 
 attributes #0 = { "cmse_nonsecure_entry" "target-features"="+8msecext,+armv8.1-m.main"}
 attributes #1 = { "cmse_nonsecure_entry" "target-features"="+8msecext,+armv8-m.main,+fp-armv8d16"}
 
 !llvm.module.flags = !{!0, !1, !2}
 
-!0 = !{i32 1, !"branch-target-enforcement", i32 0}
-!1 = !{i32 1, !"sign-return-address", i32 1}
-!2 = !{i32 1, !"sign-return-address-all", i32 0}
+!0 = !{i32 8, !"branch-target-enforcement", i32 0}
+!1 = !{i32 8, !"sign-return-address", i32 1}
+!2 = !{i32 8, !"sign-return-address-all", i32 0}
 
 ; UNWIND-LABEL: FunctionAddress: 0x0
 ; UNWIND:       0x00      ; vsp = vsp + 4
 ; UNWIND-NEXT:  0xB4      ; pop ra_auth_code
 ; UNWIND-NEXT:  0x84 0x08 ; pop {r7, lr}
 ; UNWIND-NEXT:  0xB0      ; finish
 ; UNWIND-NEXT:  0xB0      ; finish
 

llvm/test/CodeGen/Thumb2/pacbti-m-indirect-tail-call.ll

 ; CHECK2-NEXT:  bx lr
 
 declare dso_local i32 @g(i32) local_unnamed_addr #0
 
 attributes #0 = { nounwind }
 
 !llvm.module.flags = !{!0, !1, !2}
 
-!0 = !{i32 1, !"branch-target-enforcement", i32 0}
-!1 = !{i32 1, !"sign-return-address", i32 1}
-!2 = !{i32 1, !"sign-return-address-all", i32 0}
+!0 = !{i32 8, !"branch-target-enforcement", i32 0}
+!1 = !{i32 8, !"sign-return-address", i32 1}
+!2 = !{i32 8, !"sign-return-address-all", i32 0}

llvm/test/CodeGen/Thumb2/pacbti-m-outliner-1.ll

 ; CHECK-NOT: aut
 ; CHECK-NOT: r12
 ; CHECK: bx lr
 
 attributes #0 = { minsize nofree norecurse nounwind optsize uwtable}
 
 !llvm.module.flags = !{!0, !1, !2}
 
-!0 = !{i32 1, !"branch-target-enforcement", i32 0}
-!1 = !{i32 1, !"sign-return-address", i32 1}
-!2 = !{i32 1, !"sign-return-address-all", i32 0}
+!0 = !{i32 8, !"branch-target-enforcement", i32 0}
+!1 = !{i32 8, !"sign-return-address", i32 1}
+!2 = !{i32 8, !"sign-return-address-all", i32 0}
 
 ; UNWIND-LABEL: FunctionAddress: 0x0
 ; UNWIND:       0xB4      ; pop ra_auth_code
 ; UNWIND-NEXT:  0x84 0x00 ; pop {lr}
 ; UNWIND-NEXT:  0x01      ; vsp = vsp + 8
 ; UNWIND-NEXT:  0xB0      ; finish
 
 ; UNWIND-LABEL: FunctionAddress: 0x20

llvm/test/CodeGen/Thumb2/pacbti-m-outliner-2.ll

 ; CHECK-NOT: aut
 ; CHECK-NOT: r12
 ; CHECK:     bx lr
 
 attributes #0 = { minsize nofree norecurse nounwind optsize}
 
 !llvm.module.flags = !{!0, !1, !2}
 
-!0 = !{i32 1, !"branch-target-enforcement", i32 0}
-!1 = !{i32 1, !"sign-return-address", i32 1}
-!2 = !{i32 1, !"sign-return-address-all", i32 0}
+!0 = !{i32 8, !"branch-target-enforcement", i32 0}
+!1 = !{i32 8, !"sign-return-address", i32 1}
+!2 = !{i32 8, !"sign-return-address-all", i32 0}

llvm/test/CodeGen/Thumb2/pacbti-m-outliner-3.ll

 ; CHECK-NEXT:  .cfi_undefined ra_auth_code
 ; CHECK-NEXT:  aut   r12, lr, sp
 ; CHECK-NEXT:  bx    lr
 
 attributes #0 = { minsize noinline norecurse nounwind optsize readnone uwtable }
 
 !llvm.module.flags = !{!0, !1, !2}
 
-!0 = !{i32 1, !"branch-target-enforcement", i32 0}
-!1 = !{i32 1, !"sign-return-address", i32 1}
-!2 = !{i32 1, !"sign-return-address-all", i32 0}
+!0 = !{i32 8, !"branch-target-enforcement", i32 0}
+!1 = !{i32 8, !"sign-return-address", i32 1}
+!2 = !{i32 8, !"sign-return-address-all", i32 0}
 
 
 ; UNWIND-LABEL: FunctionAddress: 0x4
 ; UNWIND:       0x00      ; vsp = vsp + 4
 ; UNWIND-NEXT:  0xB4      ; pop ra_auth_code
 ; UNWIND-NEXT:  0xAA      ; pop {r4, r5, r6, lr}
 
 ; UNWIND-LABEL: FunctionAddress: 0x30

llvm/test/CodeGen/Thumb2/pacbti-m-outliner-4.ll

 
 attributes #0 = { minsize noinline optsize "denormal-fp-math"="preserve-sign,preserve-sign" "denormal-fp-math-f32"="ieee,ieee" "disable-tail-calls"="false" "frame-pointer"="none" "less-precise-fpmad"="false" "min-legal-vector-width"="0" "no-infs-fp-math"="true" "no-jump-tables"="false" "no-nans-fp-math"="true" "no-signed-zeros-fp-math"="true" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="cortex-m3" "target-features"="+armv7-m,+hwdiv,+thumb-mode" "unsafe-fp-math"="false" "use-soft-float"="false" }
 attributes #1 = { nounwind }
 attributes #2 = { noreturn }
 
 
 !llvm.module.flags = !{!0, !1, !2}
 
-!0 = !{i32 1, !"branch-target-enforcement", i32 0}
-!1 = !{i32 1, !"sign-return-address", i32 1}
-!2 = !{i32 1, !"sign-return-address-all", i32 0}
+!0 = !{i32 8, !"branch-target-enforcement", i32 0}
+!1 = !{i32 8, !"sign-return-address", i32 1}
+!2 = !{i32 8, !"sign-return-address-all", i32 0}
 
 
 ; UNWIND-LABEL: FunctionAddress: 0x0
 ; UNWIND:       Opcodes
 ; UNWIND-NEXT:  0x00      ; vsp = vsp + 4
 ; UNWIND-NEXT:  0xB4      ; pop ra_auth_code
 ; UNWIND-NEXT:  0x84 0x08 ; pop {r7, lr}
 ; UNWIND-NEXT:  0xB0      ; finish

llvm/test/CodeGen/Thumb2/pacbti-m-outliner-5.ll

entry:
   ret i32 %add7
 }
 
 attributes #0 = { minsize nofree norecurse nounwind optsize }
 attributes #1 = { minsize nofree norecurse nounwind optsize "sign-return-address"="none" }
 
 !llvm.module.flags = !{!0, !1, !2}
 
-!0 = !{i32 1, !"branch-target-enforcement", i32 0}
-!1 = !{i32 1, !"sign-return-address", i32 1}
-!2 = !{i32 1, !"sign-return-address-all", i32 0}
+!0 = !{i32 8, !"branch-target-enforcement", i32 0}
+!1 = !{i32 8, !"sign-return-address", i32 1}
+!2 = !{i32 8, !"sign-return-address-all", i32 0}

llvm/test/CodeGen/Thumb2/pacbti-m-overalign.ll

 ; CHECK-NEXT: aut     r12, lr, sp
 ; CHECK-NEXT: bx      lr
 
 
 declare dso_local i32 @_Z1giPi(i32, i32*) local_unnamed_addr
 
 !llvm.module.flags = !{!0, !1, !2}
 
-!0 = !{i32 1, !"branch-target-enforcement", i32 0}
-!1 = !{i32 1, !"sign-return-address", i32 1}
-!2 = !{i32 1, !"sign-return-address-all", i32 0}
+!0 = !{i32 8, !"branch-target-enforcement", i32 0}
+!1 = !{i32 8, !"sign-return-address", i32 1}
+!2 = !{i32 8, !"sign-return-address-all", i32 0}
 
 ; UNWIND-LABEL:        FunctionAddress: 0x0
 ; UNWIND:          0x97      ; vsp = r7
 ; UNWIND:          0x42      ; vsp = vsp - 12
 ; UNWIND:          0xB4      ; pop ra_auth_code
 ; UNWIND:          0x84 0x0D ; pop {r4, r6, r7, lr}

llvm/test/CodeGen/Thumb2/pacbti-m-unsupported-arch.ll

 ; CHECK-PACBTI-LABEL: f:
 ; CHECK-PACBTI:       pacbti
 declare dso_local i32 @g(i32)
 
 attributes #0 = { noinline nounwind }
 
 !llvm.module.flags = !{!0, !1, !2}
 
-!0 = !{i32 1, !"branch-target-enforcement", i32 1}
-!1 = !{i32 1, !"sign-return-address", i32 1}
-!2 = !{i32 1, !"sign-return-address-all", i32 0}
+!0 = !{i32 8, !"branch-target-enforcement", i32 1}
+!1 = !{i32 8, !"sign-return-address", i32 1}
+!2 = !{i32 8, !"sign-return-address-all", i32 0}

llvm/test/CodeGen/Thumb2/pacbti-m-varargs-1.ll

 declare void @llvm.va_start(i8*) #1
 declare void @llvm.va_end(i8*) #1
 
 attributes #0 = { nounwind optsize}
 attributes #1 = { nounwind }
 
 !llvm.module.flags = !{!0, !1, !2}
 
-!0 = !{i32 1, !"branch-target-enforcement", i32 0}
-!1 = !{i32 1, !"sign-return-address", i32 1}
-!2 = !{i32 1, !"sign-return-address-all", i32 0}
+!0 = !{i32 8, !"branch-target-enforcement", i32 0}
+!1 = !{i32 8, !"sign-return-address", i32 1}
+!2 = !{i32 8, !"sign-return-address-all", i32 0}

llvm/test/CodeGen/Thumb2/pacbti-m-varargs-2.ll

 
 declare dso_local i32 @_Z1gi(i32) local_unnamed_addr
 
 attributes #0 = { optsize }
 attributes #1 = { nounwind }
 
 !llvm.module.flags = !{!0, !1, !2}
 
-!0 = !{i32 1, !"branch-target-enforcement", i32 0}
-!1 = !{i32 1, !"sign-return-address", i32 1}
-!2 = !{i32 1, !"sign-return-address-all", i32 0}
+!0 = !{i32 8, !"branch-target-enforcement", i32 0}
+!1 = !{i32 8, !"sign-return-address", i32 1}
+!2 = !{i32 8, !"sign-return-address-all", i32 0}
 
 ; UNWIND-LABEL: FunctionAddress
 ; UNWIND:       0x01      ; vsp = vsp + 8
 ; UNWIND-NEXT:  0xB4      ; pop ra_auth_code
 ; UNWIND-NEXT:  0x84 0x0B ; pop {r4, r5, r7, lr}
 ; UNWIND-NEXT:  0x02      ; vsp = vsp + 12

llvm/test/CodeGen/Thumb2/pacbti-m-vla.ll

 ; CHECK-NEXT: bx     lr
 
 declare dso_local i32 @g(i32, i32*) local_unnamed_addr #0
 
 attributes #0 = { nounwind }
 
 !llvm.module.flags = !{!0, !1, !2}
 
-!0 = !{i32 1, !"branch-target-enforcement", i32 0}
-!1 = !{i32 1, !"sign-return-address", i32 1}
-!2 = !{i32 1, !"sign-return-address-all", i32 0}
+!0 = !{i32 8, !"branch-target-enforcement", i32 0}
+!1 = !{i32 8, !"sign-return-address", i32 1}
+!2 = !{i32 8, !"sign-return-address-all", i32 0}

llvm/test/DebugInfo/AArch64/debugline-endsequence.ll

 !2 = !{}
 !3 = distinct !DICompileUnit(language: DW_LANG_C99, file: !4, producer: "LLVM", isOptimized: true, runtimeVersion: 0, emissionKind: FullDebug, enums: !2, nameTableKind: None, sysroot: "/")
 !4 = !DIFile(filename: "<stdin>", directory: "/")
 !5 = !{!"Apple clang version 13.0.0 (clang-1300.0.29.3)"}
 !6 = !{i32 2, !"SDK Version", [2 x i32] [i32 11, i32 3]}
 !7 = !{i32 7, !"Dwarf Version", i32 4}
 !8 = !{i32 2, !"Debug Info Version", i32 3}
 !9 = !{i32 1, !"wchar_size", i32 4}
-!10 = !{i32 1, !"branch-target-enforcement", i32 0}
-!11 = !{i32 1, !"sign-return-address", i32 0}
-!12 = !{i32 1, !"sign-return-address-all", i32 0}
-!13 = !{i32 1, !"sign-return-address-with-bkey", i32 0}
+!10 = !{i32 8, !"branch-target-enforcement", i32 0}
+!11 = !{i32 8, !"sign-return-address", i32 0}
+!12 = !{i32 8, !"sign-return-address-all", i32 0}
+!13 = !{i32 8, !"sign-return-address-with-bkey", i32 0}
 !14 = !{i32 7, !"PIC Level", i32 2}
 !15 = distinct !DISubprogram(name: "f1", scope: !1, file: !1, line: 1, type: !16, scopeLine: 1, spFlags: DISPFlagDefinition, unit: !0, retainedNodes: !2)
 !16 = !DISubroutineType(types: !17)
 !17 = !{null}
 !18 = !DILocation(line: 2, column: 1, scope: !15)
 !19 = distinct !DISubprogram(name: "f4", scope: !1, file: !1, line: 4, type: !16, scopeLine: 4, spFlags: DISPFlagDefinition, unit: !0, retainedNodes: !2)
 !20 = !DILocation(line: 5, column: 1, scope: !19)
 !21 = distinct !DISubprogram(name: "f2", scope: !4, file: !4, line: 1, type: !16, scopeLine: 1, spFlags: DISPFlagDefinition, unit: !3, retainedNodes: !2)
 !22 = !DILocation(line: 2, column: 1, scope: !21)

llvm/test/Instrumentation/InstrProfiling/debug-info-correlate-coverage.ll

 !llvm.module.flags = !{!2, !3, !4, !5, !6, !7, !8, !9, !10}
 !llvm.ident = !{!11}
 
 !0 = distinct !DICompileUnit(language: DW_LANG_C_plus_plus_14, file: !1, producer: "clang version 14.0.0", isOptimized: false, runtimeVersion: 0, emissionKind: FullDebug, splitDebugInlining: false, nameTableKind: None)
 !1 = !DIFile(filename: "debug-info-correlate-coverage.cpp", directory: "")
 !2 = !{i32 7, !"Dwarf Version", i32 4}
 !3 = !{i32 2, !"Debug Info Version", i32 3}
 !4 = !{i32 1, !"wchar_size", i32 4}
-!5 = !{i32 1, !"branch-target-enforcement", i32 0}
-!6 = !{i32 1, !"sign-return-address", i32 0}
-!7 = !{i32 1, !"sign-return-address-all", i32 0}
-!8 = !{i32 1, !"sign-return-address-with-bkey", i32 0}
+!5 = !{i32 8, !"branch-target-enforcement", i32 0}
+!6 = !{i32 8, !"sign-return-address", i32 0}
+!7 = !{i32 8, !"sign-return-address-all", i32 0}
+!8 = !{i32 8, !"sign-return-address-with-bkey", i32 0}
 !9 = !{i32 7, !"uwtable", i32 1}
 !10 = !{i32 7, !"frame-pointer", i32 1}
 !11 = !{!"clang version 14.0.0"}
 !12 = distinct !DISubprogram(name: "foo", linkageName: "_Z3foov", scope: !13, file: !13, line: 1, type: !14, scopeLine: 1, flags: DIFlagPrototyped, spFlags: DISPFlagDefinition, unit: !0, retainedNodes: !16)
 !13 = !DIFile(filename: "debug-info-correlate-coverage.cpp", directory: "")
 !14 = !DISubroutineType(types: !15)
 !15 = !{null}
 !16 = !{}

llvm/test/Instrumentation/InstrProfiling/debug-info-correlate.ll

 !llvm.module.flags = !{!2, !3, !4, !5, !6, !7, !8, !9, !10}
 !llvm.ident = !{!11}
 
 !0 = distinct !DICompileUnit(language: DW_LANG_C_plus_plus_14, file: !1, producer: "clang version 14.0.0", isOptimized: false, runtimeVersion: 0, emissionKind: FullDebug, splitDebugInlining: false, nameTableKind: None)
 !1 = !DIFile(filename: "debug-info-correlate.cpp", directory: "")
 !2 = !{i32 7, !"Dwarf Version", i32 4}
 !3 = !{i32 2, !"Debug Info Version", i32 3}
 !4 = !{i32 1, !"wchar_size", i32 4}
-!5 = !{i32 1, !"branch-target-enforcement", i32 0}
-!6 = !{i32 1, !"sign-return-address", i32 0}
-!7 = !{i32 1, !"sign-return-address-all", i32 0}
-!8 = !{i32 1, !"sign-return-address-with-bkey", i32 0}
+!5 = !{i32 8, !"branch-target-enforcement", i32 0}
+!6 = !{i32 8, !"sign-return-address", i32 0}
+!7 = !{i32 8, !"sign-return-address-all", i32 0}
+!8 = !{i32 8, !"sign-return-address-with-bkey", i32 0}
 !9 = !{i32 7, !"uwtable", i32 1}
 !10 = !{i32 7, !"frame-pointer", i32 1}
 !11 = !{!"clang version 14.0.0"}
 !12 = distinct !DISubprogram(name: "foo", linkageName: "_Z3foov", scope: !13, file: !13, line: 1, type: !14, scopeLine: 1, flags: DIFlagPrototyped, spFlags: DISPFlagDefinition, unit: !0, retainedNodes: !16)
 !13 = !DIFile(filename: "debug-info-correlate.cpp", directory: "")
 !14 = !DISubroutineType(types: !15)
 !15 = !{null}
 !16 = !{}

llvm/test/LTO/AArch64/Inputs/foo.ll

+target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128"
+target triple = "aarch64-unknown-linux-gnu"
+
+define dso_local i32 @foo() #0 {
+entry:
+  ret i32 42
+}
+
+attributes #0 = { noinline nounwind optnone uwtable }
+
+!llvm.module.flags = !{!0, !1, !2, !3}
+
+!0 = !{i32 8, !"branch-target-enforcement", i32 1}
+!1 = !{i32 8, !"sign-return-address", i32 1}
+!2 = !{i32 8, !"sign-return-address-all", i32 1}
+!3 = !{i32 8, !"sign-return-address-with-bkey", i32 1}

llvm/test/LTO/AArch64/link-branch-target-enforcement.ll

+; Testcase to check that module with different branch-target-enforcement can
+; be mixed.
+;
+; RUN: llvm-as %s -o %t1.bc
+; RUN: llvm-as %p/Inputs/foo.ll -o %t2.bc
+; RUN: llvm-lto -exported-symbol main \
+; RUN:          -exported-symbol foo \
+; RUN:          -filetype=obj \
+; RUN:           %t1.bc %t2.bc \
+; RUN:           -o %t1.exe 2>&1 | FileCheck --allow-empty %s
+; RUN: llvm-objdump -d %t1.exe | FileCheck --check-prefix=CHECK-DUMP %s
+; RUN: llvm-readelf -n %t1.exe | FileCheck --check-prefix=CHECK-PROP %s
+
+target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128"
+target triple = "aarch64-unknown-linux-gnu"
+
+declare i32 @foo();
+
+define i32 @main() {
+entry:
+  %add = call i32 @foo()
+  ret i32 %add
+}
+
+!llvm.module.flags = !{!0, !1, !2, !3 }
+!0 = !{i32 8, !"branch-target-enforcement", i32 0}
+!1 = !{i32 8, !"sign-return-address", i32 1}
+!2 = !{i32 8, !"sign-return-address-all", i32 0}
+!3 = !{i32 8, !"sign-return-address-with-bkey", i32 0}
+
+; CHECK-NOT: linking module flags 'branch-target-enforcement': IDs have conflicting values in
+; CHECK-DUMP: <main>:
+; CHECK-DUMP:      bl      0x8 <main+0x8>
+; CHECK-DUMP: <foo>:
+
+; `main` doesn't support BTI while `foo` does, so in the binary
+; we should see only PAC which is supported by both.
+; CHECK-PROP:   Properties: aarch64 feature: PAC
 No newline at end of file

llvm/test/LTO/AArch64/lit.local.cfg

+if not 'AArch64' in config.root.targets:
+  config.unsupported = True

llvm/test/Verifier/module-flags-1.ll

 !17 = !{i32 5, !"flag-3", i32 57}
 ; CHECK-NOT: invalid value for 'append'-type module flag (expected a metadata node)
 !18 = !{i32 5, !"flag-4", !{i32 57}}
 
 ; Check that any 'max' module flags are valid.
 ; CHECK: invalid value for 'max' module flag (expected constant integer)
 !19 = !{i32 7, !"max", !"max"}
 
+; Check that any 'min' module flags are valid.
+; CHECK: invalid value for 'min' module flag (expected constant integer)
+!20 = !{i32 8, !"min", !"min"}
+
 ; Check that any 'require' module flags are valid.
 ; CHECK: invalid requirement on flag, flag is not present in module
 !11 = !{i32 3, !"bar", !{!"no-such-flag", i32 52}}
 ; CHECK: invalid requirement on flag, flag does not have the required value
 !12 = !{i32 1, !"flag-0", i32 53}
 !13 = !{i32 3, !"bar", !{!"flag-0", i32 54}}
 ; CHECK-NOT: invalid requirement on flag, flag is not present in module
 ; CHECK-NOT: invalid requirement on flag, flag does not have the required value
 !14 = !{i32 1, !"flag-1", i32 55}
 !15 = !{i32 3, !"bar", !{!"flag-1", i32 55}}
 
 !llvm.module.flags = !{
   !0, !1, !2, !3, !4, !5, !6, !7, !8, !9, !10, !11, !12, !13, !14, !15,
-  !16, !17, !18, !19 }
+  !16, !17, !18, !19, !20 }