diff --git a/llvm/lib/Target/AArch64/AArch64InstrInfo.td b/llvm/lib/Target/AArch64/AArch64InstrInfo.td --- a/llvm/lib/Target/AArch64/AArch64InstrInfo.td +++ b/llvm/lib/Target/AArch64/AArch64InstrInfo.td @@ -4780,11 +4780,13 @@ defm FABD : SIMDFPThreeScalar<1, 1, 0b010, "fabd", int_aarch64_sisd_fabd>; def : Pat<(v1f64 (int_aarch64_neon_fabd (v1f64 FPR64:$Rn), (v1f64 FPR64:$Rm))), (FABD64 FPR64:$Rn, FPR64:$Rm)>; -let Predicates = [HasFullFP16] in { +let Predicates = [HasNEON, HasFullFP16] in { def : Pat<(fabs (fsub f16:$Rn, f16:$Rm)), (FABD16 f16:$Rn, f16:$Rm)>; } +let Predicates = [HasNEON] in { def : Pat<(fabs (fsub f32:$Rn, f32:$Rm)), (FABD32 f32:$Rn, f32:$Rm)>; def : Pat<(fabs (fsub f64:$Rn, f64:$Rm)), (FABD64 f64:$Rn, f64:$Rm)>; +} defm FACGE : SIMDThreeScalarFPCmp<1, 0, 0b101, "facge", int_aarch64_neon_facge>; defm FACGT : SIMDThreeScalarFPCmp<1, 1, 0b101, "facgt", diff --git a/llvm/test/CodeGen/AArch64/fabd-no-neon.ll b/llvm/test/CodeGen/AArch64/fabd-no-neon.ll --- a/llvm/test/CodeGen/AArch64/fabd-no-neon.ll +++ b/llvm/test/CodeGen/AArch64/fabd-no-neon.ll @@ -5,7 +5,7 @@ ; RUN: llc -mtriple=aarch64 -mattr=+fullfp16,-neon < %s | FileCheck %s --check-prefix NEON-DISABLED ; Note: We need to use -filetype=obj to trigger verifyInstructionPredicates() ; checks since it is not called when emitting assembly output. -; FIXME: llc -mtriple=aarch64 -mattr=+fullfp16,-neon -o /dev/null %s -filetype=obj +; RUN: llc -mtriple=aarch64 -mattr=+fullfp16,-neon -o /dev/null %s -filetype=obj declare half @llvm.fabs.f16(half) declare float @llvm.fabs.f32(float) @@ -19,7 +19,8 @@ ; ; NEON-DISABLED-LABEL: fabd16: ; NEON-DISABLED: // %bb.0: -; NEON-DISABLED-NEXT: fabd h0, h0, h1 +; NEON-DISABLED-NEXT: fsub h0, h0, h1 +; NEON-DISABLED-NEXT: fabs h0, h0 ; NEON-DISABLED-NEXT: ret %sub = fsub half %f1, %f2 %abs = tail call half @llvm.fabs.f16(half %sub) @@ -34,7 +35,8 @@ ; ; NEON-DISABLED-LABEL: fabd32: ; NEON-DISABLED: // %bb.0: -; NEON-DISABLED-NEXT: fabd s0, s0, s1 +; NEON-DISABLED-NEXT: fsub s0, s0, s1 +; NEON-DISABLED-NEXT: fabs s0, s0 ; NEON-DISABLED-NEXT: ret %sub = fsub float %f1, %f2 %abs = tail call float @llvm.fabs.f32(float %sub) @@ -49,7 +51,8 @@ ; ; NEON-DISABLED-LABEL: fabd64: ; NEON-DISABLED: // %bb.0: -; NEON-DISABLED-NEXT: fabd d0, d0, d1 +; NEON-DISABLED-NEXT: fsub d0, d0, d1 +; NEON-DISABLED-NEXT: fabs d0, d0 ; NEON-DISABLED-NEXT: ret %sub = fsub double %f1, %f2 %abs = tail call double @llvm.fabs.f64(double %sub)