Index: llvm/lib/Target/AMDGPU/AMDGPUSubtarget.cpp =================================================================== --- llvm/lib/Target/AMDGPU/AMDGPUSubtarget.cpp +++ llvm/lib/Target/AMDGPU/AMDGPUSubtarget.cpp @@ -652,7 +652,8 @@ return 16; // Assume all implicit inputs are used by default - return AMDGPU::getIntegerAttribute(F, "amdgpu-implicitarg-num-bytes", 56); + unsigned NBytes = (AMDGPU::getAmdhsaCodeObjectVersion() >= 5) ? 256 : 56; + return AMDGPU::getIntegerAttribute(F, "amdgpu-implicitarg-num-bytes", NBytes); } uint64_t AMDGPUSubtarget::getExplicitKernArgSize(const Function &F, Index: llvm/test/CodeGen/AMDGPU/llvm.amdgcn.implicitarg.ptr.ll =================================================================== --- llvm/test/CodeGen/AMDGPU/llvm.amdgcn.implicitarg.ptr.ll +++ llvm/test/CodeGen/AMDGPU/llvm.amdgcn.implicitarg.ptr.ll @@ -1,7 +1,8 @@ ; RUN: llc -mtriple=amdgcn-amd-amdhsa --amdhsa-code-object-version=2 -mcpu=kaveri -verify-machineinstrs < %s | FileCheck -check-prefixes=GCN,HSA %s +; RUN: llc -mtriple=amdgcn-amd-amdhsa --amdhsa-code-object-version=5 -mcpu=kaveri -verify-machineinstrs < %s | FileCheck -check-prefix=COV5 %s ; RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=tahiti -verify-machineinstrs < %s | FileCheck -check-prefixes=GCN,MESA %s -; GCN-LABEL: {{^}}kernel_implicitarg_ptr_empty: +; CHECK-LABEL: {{^}}kernel_implicitarg_ptr_empty: ; HSA: enable_sgpr_kernarg_segment_ptr = 1 ; HSA: kernarg_segment_byte_size = 56 ; HSA: kernarg_segment_alignment = 4 @@ -11,6 +12,8 @@ ; MESA: kernarg_segment_alignment = 4 ; HSA: s_load_dword s0, s[4:5], 0x0 + +; COV5: .amdhsa_kernarg_size 256 define amdgpu_kernel void @kernel_implicitarg_ptr_empty() #0 { %implicitarg.ptr = call i8 addrspace(4)* @llvm.amdgcn.implicitarg.ptr() %cast = bitcast i8 addrspace(4)* %implicitarg.ptr to i32 addrspace(4)* @@ -18,7 +21,7 @@ ret void } -; GCN-LABEL: {{^}}kernel_implicitarg_ptr_empty_0implicit: +; CHECK-LABEL: {{^}}kernel_implicitarg_ptr_empty_0implicit: ; HSA: enable_sgpr_kernarg_segment_ptr = 0 ; HSA: kernarg_segment_byte_size = 0 ; HSA: kernarg_segment_alignment = 4 @@ -31,6 +34,8 @@ ; HSA: s_load_dword s0, [[NULL]], 0x0 ; MESA: s_load_dword s0, s[4:5], 0x0 + +; COV5: .amdhsa_kernarg_size 0 define amdgpu_kernel void @kernel_implicitarg_ptr_empty_0implicit() #3 { %implicitarg.ptr = call i8 addrspace(4)* @llvm.amdgcn.implicitarg.ptr() %cast = bitcast i8 addrspace(4)* %implicitarg.ptr to i32 addrspace(4)* @@ -38,7 +43,7 @@ ret void } -; GCN-LABEL: {{^}}opencl_kernel_implicitarg_ptr_empty: +; CHECK-LABEL: {{^}}opencl_kernel_implicitarg_ptr_empty: ; GCN: enable_sgpr_kernarg_segment_ptr = 1 ; HSA: kernarg_segment_byte_size = 48 @@ -48,6 +53,8 @@ ; MESA: kernarg_segment_alignment = 4 ; HSA: s_load_dword s0, s[4:5], 0x0 + +; COV5: .amdhsa_kernarg_size 48 define amdgpu_kernel void @opencl_kernel_implicitarg_ptr_empty() #1 { %implicitarg.ptr = call i8 addrspace(4)* @llvm.amdgcn.implicitarg.ptr() %cast = bitcast i8 addrspace(4)* %implicitarg.ptr to i32 addrspace(4)* @@ -55,7 +62,7 @@ ret void } -; GCN-LABEL: {{^}}kernel_implicitarg_ptr: +; CHECK-LABEL: {{^}}kernel_implicitarg_ptr: ; GCN: enable_sgpr_kernarg_segment_ptr = 1 ; HSA: kernarg_segment_byte_size = 168 @@ -65,6 +72,8 @@ ; MESA: kernarg_segment_alignment = 4 ; HSA: s_load_dword s0, s[4:5], 0x1c + +; COV5: .amdhsa_kernarg_size 368 define amdgpu_kernel void @kernel_implicitarg_ptr([112 x i8]) #0 { %implicitarg.ptr = call i8 addrspace(4)* @llvm.amdgcn.implicitarg.ptr() %cast = bitcast i8 addrspace(4)* %implicitarg.ptr to i32 addrspace(4)* @@ -72,7 +81,7 @@ ret void } -; GCN-LABEL: {{^}}opencl_kernel_implicitarg_ptr: +; CHECK-LABEL: {{^}}opencl_kernel_implicitarg_ptr: ; GCN: enable_sgpr_kernarg_segment_ptr = 1 ; HSA: kernarg_segment_byte_size = 160 @@ -82,6 +91,8 @@ ; MESA: kernarg_segment_alignment = 4 ; HSA: s_load_dword s0, s[4:5], 0x1c + +; COV5: .amdhsa_kernarg_size 160 define amdgpu_kernel void @opencl_kernel_implicitarg_ptr([112 x i8]) #1 { %implicitarg.ptr = call i8 addrspace(4)* @llvm.amdgcn.implicitarg.ptr() %cast = bitcast i8 addrspace(4)* %implicitarg.ptr to i32 addrspace(4)* @@ -89,7 +100,7 @@ ret void } -; GCN-LABEL: {{^}}func_implicitarg_ptr: +; CHECK-LABEL: {{^}}func_implicitarg_ptr: ; GCN: s_waitcnt ; GCN: s_load_dword s{{[0-9]+}}, s[8:9], 0x0 ; GCN-NEXT: s_waitcnt @@ -101,7 +112,7 @@ ret void } -; GCN-LABEL: {{^}}opencl_func_implicitarg_ptr: +; CHECK-LABEL: {{^}}opencl_func_implicitarg_ptr: ; GCN: s_waitcnt ; GCN: s_load_dword s{{[0-9]+}}, s[8:9], 0x0 ; GCN-NEXT: s_waitcnt @@ -113,7 +124,7 @@ ret void } -; GCN-LABEL: {{^}}kernel_call_implicitarg_ptr_func_empty: +; CHECK-LABEL: {{^}}kernel_call_implicitarg_ptr_func_empty: ; HSA: enable_sgpr_kernarg_segment_ptr = 1 ; HSA: kernarg_segment_byte_size = 56 ; HSA: kernarg_segment_alignment = 4 @@ -124,12 +135,14 @@ ; GCN: s_mov_b64 s[8:9], s[4:5] ; GCN: s_swappc_b64 + +; COV5: .amdhsa_kernarg_size 256 define amdgpu_kernel void @kernel_call_implicitarg_ptr_func_empty() #0 { call void @func_implicitarg_ptr() ret void } -; GCN-LABEL: {{^}}kernel_call_implicitarg_ptr_func_empty_implicit0: +; CHECK-LABEL: {{^}}kernel_call_implicitarg_ptr_func_empty_implicit0: ; HSA: enable_sgpr_kernarg_segment_ptr = 0 ; HSA: kernarg_segment_byte_size = 0 ; HSA: kernarg_segment_alignment = 4 @@ -141,12 +154,14 @@ ; HSA: s_mov_b64 s[8:9], 0{{$}} ; MESA: s_mov_b64 s[8:9], s[4:5]{{$}} ; GCN: s_swappc_b64 + +; COV5: .amdhsa_kernarg_size 0 define amdgpu_kernel void @kernel_call_implicitarg_ptr_func_empty_implicit0() #3 { call void @func_implicitarg_ptr() ret void } -; GCN-LABEL: {{^}}opencl_kernel_call_implicitarg_ptr_func_empty: +; CHECK-LABEL: {{^}}opencl_kernel_call_implicitarg_ptr_func_empty: ; GCN: enable_sgpr_kernarg_segment_ptr = 1 ; HSA: kernarg_segment_byte_size = 48 ; HSA: kernarg_segment_alignment = 4 @@ -155,16 +170,20 @@ ; GCN-NOT: s4 ; GCN-NOT: s5 ; GCN: s_swappc_b64 + +; COV5: .amdhsa_kernarg_size 48 define amdgpu_kernel void @opencl_kernel_call_implicitarg_ptr_func_empty() #1 { call void @func_implicitarg_ptr() ret void } -; GCN-LABEL: {{^}}kernel_call_implicitarg_ptr_func: +; CHECK-LABEL: {{^}}kernel_call_implicitarg_ptr_func: ; GCN: enable_sgpr_kernarg_segment_ptr = 1 ; HSA: kernarg_segment_byte_size = 168 ; HSA: kernarg_segment_alignment = 4 + + ; MESA: kernarg_segment_byte_size = 128 ; MESA: kernarg_segment_alignment = 4 @@ -173,12 +192,14 @@ ; GCN: s_addc_u32 s9, s5, 0{{$}} ; GCN: s_swappc_b64 + +; COV5: .amdhsa_kernarg_size 368 define amdgpu_kernel void @kernel_call_implicitarg_ptr_func([112 x i8]) #0 { call void @func_implicitarg_ptr() ret void } -; GCN-LABEL: {{^}}opencl_kernel_call_implicitarg_ptr_func: +; CHECK-LABEL: {{^}}opencl_kernel_call_implicitarg_ptr_func: ; GCN: enable_sgpr_kernarg_segment_ptr = 1 ; HSA: kernarg_segment_byte_size = 160 ; HSA: kernarg_segment_alignment = 4 @@ -188,12 +209,14 @@ ; GCN: s_add_u32 s8, s4, 0x70 ; GCN: s_addc_u32 s9, s5, 0{{$}} ; GCN: s_swappc_b64 + +; COV5: .amdhsa_kernarg_size 160 define amdgpu_kernel void @opencl_kernel_call_implicitarg_ptr_func([112 x i8]) #1 { call void @func_implicitarg_ptr() ret void } -; GCN-LABEL: {{^}}func_call_implicitarg_ptr_func: +; CHECK-LABEL: {{^}}func_call_implicitarg_ptr_func: ; GCN-NOT: s8 ; GCN-NOT: s9 ; GCN-NOT: s[8:9] @@ -204,7 +227,7 @@ ret void } -; GCN-LABEL: {{^}}opencl_func_call_implicitarg_ptr_func: +; CHECK-LABEL: {{^}}opencl_func_call_implicitarg_ptr_func: ; GCN-NOT: s8 ; GCN-NOT: s9 ; GCN-NOT: s[8:9] @@ -215,7 +238,7 @@ ret void } -; GCN-LABEL: {{^}}func_kernarg_implicitarg_ptr: +; CHECK-LABEL: {{^}}func_kernarg_implicitarg_ptr: ; GCN: s_waitcnt ; GCN-DAG: s_mov_b64 [[NULL:s\[[0-9]+:[0-9]+\]]], 0 ; GCN-DAG: s_load_dword s{{[0-9]+}}, [[NULL]], 0x0 @@ -231,7 +254,7 @@ ret void } -; GCN-LABEL: {{^}}opencl_func_kernarg_implicitarg_ptr: +; CHECK-LABEL: {{^}}opencl_func_kernarg_implicitarg_ptr: ; GCN: s_waitcnt ; GCN-DAG: s_mov_b64 [[NULL:s\[[0-9]+:[0-9]+\]]], 0 ; GCN-DAG: s_load_dword s{{[0-9]+}}, [[NULL]], 0x0 @@ -247,7 +270,7 @@ ret void } -; GCN-LABEL: {{^}}kernel_call_kernarg_implicitarg_ptr_func: +; CHECK-LABEL: {{^}}kernel_call_kernarg_implicitarg_ptr_func: ; GCN: s_add_u32 s8, s4, 0x70 ; GCN: s_addc_u32 s9, s5, 0 ; GCN: s_swappc_b64 @@ -256,10 +279,12 @@ ret void } -; GCN-LABEL: {{^}}kernel_implicitarg_no_struct_align_padding: +; CHECK-LABEL: {{^}}kernel_implicitarg_no_struct_align_padding: ; HSA: kernarg_segment_byte_size = 120 ; MESA: kernarg_segment_byte_size = 84 ; GCN: kernarg_segment_alignment = 6 + +; COV5: .amdhsa_kernarg_size 120 define amdgpu_kernel void @kernel_implicitarg_no_struct_align_padding(<16 x i32>, i32) #1 { %implicitarg.ptr = call i8 addrspace(4)* @llvm.amdgcn.implicitarg.ptr() %cast = bitcast i8 addrspace(4)* %implicitarg.ptr to i32 addrspace(4)* @@ -267,7 +292,6 @@ ret void } - ; HSA-LABEL: Kernels: ; HSA-LABEL: - Name: kernel_implicitarg_ptr_empty ; HSA: CodeProps: @@ -318,6 +342,55 @@ ; HSA: KernargSegmentSize: 120 ; HSA: KernargSegmentAlign: 64 +; COV5-LABEL: amdhsa.kernels: +; COV5: .kernarg_segment_align: 8 +; COV5-NEXT: .kernarg_segment_size: 256 +; COV5-LABEL: .name: kernel_implicitarg_ptr_empty + +; COV5: .kernarg_segment_align: 4 +; COV5-NEXT: .kernarg_segment_size: 0 +; COV5-LABEL: .name: kernel_implicitarg_ptr_empty_0implicit + +; COV5: .kernarg_segment_align: 8 +; COV5-NEXT: .kernarg_segment_size: 48 +; COV5-LABEL: .name: opencl_kernel_implicitarg_ptr_empty + +; COV5: .kernarg_segment_align: 8 +; COV5-NEXT: .kernarg_segment_size: 368 +; COV5-LABEL: .name: kernel_implicitarg_ptr + +; COV5: .kernarg_segment_align: 8 +; COV5-NEXT: .kernarg_segment_size: 160 +; COV5-LABEL: .name: opencl_kernel_implicitarg_ptr + +; COV5: .kernarg_segment_align: 8 +; COV5-NEXT: .kernarg_segment_size: 256 +; COV5-LABEL: .name: kernel_call_implicitarg_ptr_func_empty + +; COV5: .kernarg_segment_align: 4 +; COV5-NEXT: .kernarg_segment_size: 0 +; COV5-LABEL: .name: kernel_call_implicitarg_ptr_func_empty_implicit0 + +; COV5: .kernarg_segment_align: 8 +; COV5-NEXT: .kernarg_segment_size: 48 +; COV5-LABEL: .name: opencl_kernel_call_implicitarg_ptr_func_empty + +; COV5: .kernarg_segment_align: 8 +; COV5-NEXT: .kernarg_segment_size: 368 +; COV5-LABEL: .name: kernel_call_implicitarg_ptr_func + +; COV5: .kernarg_segment_align: 8 +; COV5-NEXT: .kernarg_segment_size: 160 +; COV5-LABEL: .name: opencl_kernel_call_implicitarg_ptr_func + +; COV5: .kernarg_segment_align: 8 +; COV5-NEXT: .kernarg_segment_size: 368 +; COV5-LABEL: .name: kernel_call_kernarg_implicitarg_ptr_func + +; COV5: .kernarg_segment_align: 64 +; COV5-NEXT: .kernarg_segment_size: 120 +; COV5-LABEL: .name: kernel_implicitarg_no_struct_align_padding + declare i8 addrspace(4)* @llvm.amdgcn.implicitarg.ptr() #2 declare i8 addrspace(4)* @llvm.amdgcn.kernarg.segment.ptr() #2