diff --git a/llvm/lib/Target/RISCV/CMakeLists.txt b/llvm/lib/Target/RISCV/CMakeLists.txt
--- a/llvm/lib/Target/RISCV/CMakeLists.txt
+++ b/llvm/lib/Target/RISCV/CMakeLists.txt
@@ -31,6 +31,7 @@
RISCVISelDAGToDAG.cpp
RISCVISelLowering.cpp
RISCVLegalizerInfo.cpp
+ RISCVMachineFunctionInfo.cpp
RISCVMCInstLower.cpp
RISCVMergeBaseOffset.cpp
RISCVRedundantCopyElimination.cpp
diff --git a/llvm/lib/Target/RISCV/RISCVMachineFunctionInfo.h b/llvm/lib/Target/RISCV/RISCVMachineFunctionInfo.h
--- a/llvm/lib/Target/RISCV/RISCVMachineFunctionInfo.h
+++ b/llvm/lib/Target/RISCV/RISCVMachineFunctionInfo.h
@@ -14,11 +14,34 @@
#define LLVM_LIB_TARGET_RISCV_RISCVMACHINEFUNCTIONINFO_H
#include "RISCVSubtarget.h"
+#include "llvm/CodeGen/MIRYamlMapping.h"
#include "llvm/CodeGen/MachineFrameInfo.h"
#include "llvm/CodeGen/MachineFunction.h"
namespace llvm {
+class RISCVMachineFunctionInfo;
+
+namespace yaml {
+struct RISCVMachineFunctionInfo final : public yaml::MachineFunctionInfo {
+ int VarArgsFrameIndex;
+ int VarArgsSaveSize;
+
+ RISCVMachineFunctionInfo() = default;
+ RISCVMachineFunctionInfo(const llvm::RISCVMachineFunctionInfo &MFI);
+
+ void mappingImpl(yaml::IO &YamlIO) override;
+ ~RISCVMachineFunctionInfo() = default;
+};
+
+template <> struct MappingTraits<RISCVMachineFunctionInfo> {
+ static void mapping(IO &YamlIO, RISCVMachineFunctionInfo &MFI) {
+ YamlIO.mapOptional("varArgsFrameIndex", MFI.VarArgsFrameIndex);
+ YamlIO.mapOptional("varArgsSaveSize", MFI.VarArgsSaveSize);
+ }
+};
+} // end namespace yaml
+
/// RISCVMachineFunctionInfo - This class is derived from MachineFunctionInfo
/// and contains private RISCV-specific information for each MachineFunction.
class RISCVMachineFunctionInfo : public MachineFunctionInfo {
@@ -74,6 +97,8 @@
unsigned getCalleeSavedStackSize() const { return CalleeSavedStackSize; }
void setCalleeSavedStackSize(unsigned Size) { CalleeSavedStackSize = Size; }
+
+ void initializeBaseYamlFields(const yaml::RISCVMachineFunctionInfo &YamlMFI);
};
} // end namespace llvm
diff --git a/llvm/lib/Target/RISCV/RISCVMachineFunctionInfo.cpp b/llvm/lib/Target/RISCV/RISCVMachineFunctionInfo.cpp
new file mode 100644
--- /dev/null
+++ b/llvm/lib/Target/RISCV/RISCVMachineFunctionInfo.cpp
@@ -0,0 +1,30 @@
+//=- RISCVMachineFunctionInfo.cpp - RISCV machine function info ---*- C++ -*-=//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===----------------------------------------------------------------------===//
+//
+// This file contains the RISCV implementation of TargetFrameLowering class.
+//
+//===----------------------------------------------------------------------===//
+
+#include "RISCVMachineFunctionInfo.h"
+
+using namespace llvm;
+
+yaml::RISCVMachineFunctionInfo::RISCVMachineFunctionInfo(
+ const llvm::RISCVMachineFunctionInfo &MFI)
+ : VarArgsFrameIndex(MFI.getVarArgsFrameIndex()),
+ VarArgsSaveSize(MFI.getVarArgsSaveSize()) {}
+
+void yaml::RISCVMachineFunctionInfo::mappingImpl(yaml::IO &YamlIO) {
+ MappingTraits<RISCVMachineFunctionInfo>::mapping(YamlIO, *this);
+}
+
+void RISCVMachineFunctionInfo::initializeBaseYamlFields(
+ const yaml::RISCVMachineFunctionInfo &YamlMFI) {
+ VarArgsFrameIndex = YamlMFI.VarArgsFrameIndex;
+ VarArgsSaveSize = YamlMFI.VarArgsSaveSize;
+}
diff --git a/llvm/lib/Target/RISCV/RISCVTargetMachine.h b/llvm/lib/Target/RISCV/RISCVTargetMachine.h
--- a/llvm/lib/Target/RISCV/RISCVTargetMachine.h
+++ b/llvm/lib/Target/RISCV/RISCVTargetMachine.h
@@ -46,6 +46,14 @@
virtual bool isNoopAddrSpaceCast(unsigned SrcAS,
unsigned DstAS) const override;
+
+ yaml::MachineFunctionInfo *createDefaultFuncInfoYAML() const override;
+ yaml::MachineFunctionInfo *
+ convertFuncInfoToYAML(const MachineFunction &MF) const override;
+ bool parseMachineFunctionInfo(const yaml::MachineFunctionInfo &,
+ PerFunctionMIParsingState &PFS,
+ SMDiagnostic &Error,
+ SMRange &SourceRange) const override;
};
} // namespace llvm
diff --git a/llvm/lib/Target/RISCV/RISCVTargetMachine.cpp b/llvm/lib/Target/RISCV/RISCVTargetMachine.cpp
--- a/llvm/lib/Target/RISCV/RISCVTargetMachine.cpp
+++ b/llvm/lib/Target/RISCV/RISCVTargetMachine.cpp
@@ -13,6 +13,7 @@
#include "RISCVTargetMachine.h"
#include "MCTargetDesc/RISCVBaseInfo.h"
#include "RISCV.h"
+#include "RISCVMachineFunctionInfo.h"
#include "RISCVTargetObjectFile.h"
#include "RISCVTargetTransformInfo.h"
#include "TargetInfo/RISCVTargetInfo.h"
@@ -22,6 +23,8 @@
#include "llvm/CodeGen/GlobalISel/InstructionSelect.h"
#include "llvm/CodeGen/GlobalISel/Legalizer.h"
#include "llvm/CodeGen/GlobalISel/RegBankSelect.h"
+#include "llvm/CodeGen/MIRParser/MIParser.h"
+#include "llvm/CodeGen/MIRYamlMapping.h"
#include "llvm/CodeGen/Passes.h"
#include "llvm/CodeGen/TargetLoweringObjectFileImpl.h"
#include "llvm/CodeGen/TargetPassConfig.h"
@@ -219,3 +222,24 @@
if (TM->getOptLevel() != CodeGenOpt::None && EnableRedundantCopyElimination)
addPass(createRISCVRedundantCopyEliminationPass());
}
+
+yaml::MachineFunctionInfo *
+RISCVTargetMachine::createDefaultFuncInfoYAML() const {
+ return new yaml::RISCVMachineFunctionInfo();
+}
+
+yaml::MachineFunctionInfo *
+RISCVTargetMachine::convertFuncInfoToYAML(const MachineFunction &MF) const {
+ const auto *MFI = MF.getInfo<RISCVMachineFunctionInfo>();
+ return new yaml::RISCVMachineFunctionInfo(*MFI);
+}
+
+bool RISCVTargetMachine::parseMachineFunctionInfo(
+ const yaml::MachineFunctionInfo &MFI, PerFunctionMIParsingState &PFS,
+ SMDiagnostic &Error, SMRange &SourceRange) const {
+ const auto &YamlMFI =
+ static_cast<const yaml::RISCVMachineFunctionInfo &>(MFI);
+ MachineFunction &MF = PFS.MF;
+ MF.getInfo<RISCVMachineFunctionInfo>()->initializeBaseYamlFields(YamlMFI);
+ return false;
+}
diff --git a/llvm/test/CodeGen/MIR/RISCV/machine-function-info.mir b/llvm/test/CodeGen/MIR/RISCV/machine-function-info.mir
new file mode 100644
--- /dev/null
+++ b/llvm/test/CodeGen/MIR/RISCV/machine-function-info.mir
@@ -0,0 +1,139 @@
+# RUN: llc -mtriple=riscv64 -run-pass none %s -o - \
+# RUN: | FileCheck %s
+
+--- |
+ ; ModuleID = 'foo.ll'
+ source_filename = "foo.ll"
+ target datalayout = "e-m:e-p:64:64-i64:64-i128:128-n64-S128"
+ target triple = "riscv64"
+
+ define void @foo(i32 %0, ...) {
+ ret void
+ }
+
+...
+---
+name: foo
+alignment: 4
+exposesReturnsTwice: false
+legalized: false
+regBankSelected: false
+selected: false
+failedISel: false
+tracksRegLiveness: true
+hasWinCFI: false
+failsVerification: false
+tracksDebugUserValues: false
+registers:
+ - { id: 0, class: gpr, preferred-register: '' }
+ - { id: 1, class: gpr, preferred-register: '' }
+ - { id: 2, class: gpr, preferred-register: '' }
+ - { id: 3, class: gpr, preferred-register: '' }
+ - { id: 4, class: gpr, preferred-register: '' }
+ - { id: 5, class: gpr, preferred-register: '' }
+ - { id: 6, class: gpr, preferred-register: '' }
+ - { id: 7, class: gpr, preferred-register: '' }
+liveins:
+ - { reg: '$x11', virtual-reg: '%1' }
+ - { reg: '$x12', virtual-reg: '%2' }
+ - { reg: '$x13', virtual-reg: '%3' }
+ - { reg: '$x14', virtual-reg: '%4' }
+ - { reg: '$x15', virtual-reg: '%5' }
+ - { reg: '$x16', virtual-reg: '%6' }
+ - { reg: '$x17', virtual-reg: '%7' }
+frameInfo:
+ isFrameAddressTaken: false
+ isReturnAddressTaken: false
+ hasStackMap: false
+ hasPatchPoint: false
+ stackSize: 0
+ offsetAdjustment: 0
+ maxAlignment: 1
+ adjustsStack: false
+ hasCalls: false
+ stackProtector: ''
+ maxCallFrameSize: 4294967295
+ cvBytesOfCalleeSavedRegisters: 0
+ hasOpaqueSPAdjustment: false
+ hasVAStart: false
+ hasMustTailInVarArgFunc: false
+ hasTailCall: false
+ localFrameSize: 0
+ savePoint: ''
+ restorePoint: ''
+fixedStack:
+ - { id: 0, type: default, offset: -8, size: 8, alignment: 8, stack-id: default,
+ isImmutable: true, isAliased: false, callee-saved-register: '', callee-saved-restored: true,
+ debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
+ - { id: 1, type: default, offset: -16, size: 8, alignment: 16, stack-id: default,
+ isImmutable: true, isAliased: false, callee-saved-register: '', callee-saved-restored: true,
+ debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
+ - { id: 2, type: default, offset: -24, size: 8, alignment: 8, stack-id: default,
+ isImmutable: true, isAliased: false, callee-saved-register: '', callee-saved-restored: true,
+ debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
+ - { id: 3, type: default, offset: -32, size: 8, alignment: 16, stack-id: default,
+ isImmutable: true, isAliased: false, callee-saved-register: '', callee-saved-restored: true,
+ debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
+ - { id: 4, type: default, offset: -40, size: 8, alignment: 8, stack-id: default,
+ isImmutable: true, isAliased: false, callee-saved-register: '', callee-saved-restored: true,
+ debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
+ - { id: 5, type: default, offset: -48, size: 8, alignment: 16, stack-id: default,
+ isImmutable: true, isAliased: false, callee-saved-register: '', callee-saved-restored: true,
+ debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
+ - { id: 6, type: default, offset: -56, size: 8, alignment: 8, stack-id: default,
+ isImmutable: true, isAliased: false, callee-saved-register: '', callee-saved-restored: true,
+ debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
+ - { id: 7, type: default, offset: -64, size: 8, alignment: 16, stack-id: default,
+ isImmutable: true, isAliased: false, callee-saved-register: '', callee-saved-restored: true,
+ debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
+ - { id: 8, type: default, offset: -56, size: 8, alignment: 8, stack-id: default,
+ isImmutable: true, isAliased: false, callee-saved-register: '', callee-saved-restored: true,
+ debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
+stack: []
+callSites: []
+debugValueSubstitutions: []
+constants: []
+machineFunctionInfo:
+ varArgsFrameIndex: -1
+ varArgsSaveSize: 64
+body: |
+ bb.0 (%ir-block.1):
+ liveins: $x11, $x12, $x13, $x14, $x15, $x16, $x17
+ ; CHECK-LABEL: name: foo
+ ; CHECK: machineFunctionInfo:
+ ; CHECK-NEXT: varArgsFrameIndex: -1
+ ; CHECK-NEXT: varArgsSaveSize: 64
+ ; CHECK: liveins: $x11, $x12, $x13, $x14, $x15, $x16, $x17
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x17
+ ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr = COPY $x16
+ ; CHECK-NEXT: [[COPY2:%[0-9]+]]:gpr = COPY $x15
+ ; CHECK-NEXT: [[COPY3:%[0-9]+]]:gpr = COPY $x14
+ ; CHECK-NEXT: [[COPY4:%[0-9]+]]:gpr = COPY $x13
+ ; CHECK-NEXT: [[COPY5:%[0-9]+]]:gpr = COPY $x12
+ ; CHECK-NEXT: [[COPY6:%[0-9]+]]:gpr = COPY $x11
+ ; CHECK-NEXT: SD [[COPY]], %fixed-stack.8, 0 :: (store (s64))
+ ; CHECK-NEXT: SD [[COPY1]], %fixed-stack.7, 0 :: (store (s64) into %fixed-stack.7, align 16)
+ ; CHECK-NEXT: SD [[COPY2]], %fixed-stack.6, 0 :: (store (s64))
+ ; CHECK-NEXT: SD [[COPY3]], %fixed-stack.5, 0 :: (store (s64) into %fixed-stack.5, align 16)
+ ; CHECK-NEXT: SD [[COPY4]], %fixed-stack.4, 0 :: (store (s64))
+ ; CHECK-NEXT: SD [[COPY5]], %fixed-stack.3, 0 :: (store (s64) into %fixed-stack.3, align 16)
+ ; CHECK-NEXT: SD [[COPY6]], %fixed-stack.2, 0 :: (store (s64))
+ ; CHECK-NEXT: PseudoRET
+ %7:gpr = COPY $x17
+ %6:gpr = COPY $x16
+ %5:gpr = COPY $x15
+ %4:gpr = COPY $x14
+ %3:gpr = COPY $x13
+ %2:gpr = COPY $x12
+ %1:gpr = COPY $x11
+ SD %7, %fixed-stack.0, 0 :: (store (s64))
+ SD %6, %fixed-stack.1, 0 :: (store (s64) into %fixed-stack.1, align 16)
+ SD %5, %fixed-stack.2, 0 :: (store (s64))
+ SD %4, %fixed-stack.3, 0 :: (store (s64) into %fixed-stack.3, align 16)
+ SD %3, %fixed-stack.4, 0 :: (store (s64))
+ SD %2, %fixed-stack.5, 0 :: (store (s64) into %fixed-stack.5, align 16)
+ SD %1, %fixed-stack.6, 0 :: (store (s64))
+ PseudoRET
+
+...