diff --git a/lld/wasm/InputFiles.cpp b/lld/wasm/InputFiles.cpp --- a/lld/wasm/InputFiles.cpp +++ b/lld/wasm/InputFiles.cpp @@ -689,6 +689,7 @@ ++count; } LLVM_DEBUG(dbgs() << "Read " << count << " symbols\n"); + (void) count; } void ArchiveFile::addMember(const Archive::Symbol *sym) { diff --git a/lld/wasm/SyntheticSections.cpp b/lld/wasm/SyntheticSections.cpp --- a/lld/wasm/SyntheticSections.cpp +++ b/lld/wasm/SyntheticSections.cpp @@ -589,6 +589,7 @@ uint32_t tableIndex = config->tableBase; for (const FunctionSymbol *sym : indirectFunctions) { assert(sym->getTableIndex() == tableIndex); + (void) tableIndex; writeUleb128(os, sym->getFunctionIndex(), "function index"); ++tableIndex; } diff --git a/llvm/lib/Analysis/LoopInfo.cpp b/llvm/lib/Analysis/LoopInfo.cpp --- a/llvm/lib/Analysis/LoopInfo.cpp +++ b/llvm/lib/Analysis/LoopInfo.cpp @@ -736,6 +736,7 @@ bool Changed = FoundIB; for (unsigned NIters = 0; Changed; ++NIters) { assert(NIters < Unloop.getNumBlocks() && "runaway iterative algorithm"); + (void) NIters; // Iterate over the postorder list of blocks, propagating the nearest loop // from successors to predecessors as before. diff --git a/llvm/lib/CodeGen/MIRFSDiscriminator.cpp b/llvm/lib/CodeGen/MIRFSDiscriminator.cpp --- a/llvm/lib/CodeGen/MIRFSDiscriminator.cpp +++ b/llvm/lib/CodeGen/MIRFSDiscriminator.cpp @@ -135,6 +135,7 @@ if (Changed) { createFSDiscriminatorVariable(MF.getFunction().getParent()); LLVM_DEBUG(dbgs() << "Num of FS Discriminators: " << NumNewD << "\n"); + (void) NumNewD; } return Changed; diff --git a/llvm/lib/CodeGen/RegAllocPBQP.cpp b/llvm/lib/CodeGen/RegAllocPBQP.cpp --- a/llvm/lib/CodeGen/RegAllocPBQP.cpp +++ b/llvm/lib/CodeGen/RegAllocPBQP.cpp @@ -847,6 +847,7 @@ while (!PBQPAllocComplete) { LLVM_DEBUG(dbgs() << " PBQP Regalloc round " << Round << ":\n"); + (void) Round; PBQPRAGraph G(PBQPRAGraph::GraphMetadata(MF, LIS, MBFI)); initializeGraph(G, VRM, *VRegSpiller); diff --git a/llvm/lib/CodeGen/StackColoring.cpp b/llvm/lib/CodeGen/StackColoring.cpp --- a/llvm/lib/CodeGen/StackColoring.cpp +++ b/llvm/lib/CodeGen/StackColoring.cpp @@ -1143,6 +1143,9 @@ LLVM_DEBUG(dbgs() << "Fixed " << FixedMemOp << " machine memory operands.\n"); LLVM_DEBUG(dbgs() << "Fixed " << FixedDbg << " debug locations.\n"); LLVM_DEBUG(dbgs() << "Fixed " << FixedInstr << " machine instructions.\n"); + (void) FixedMemOp; + (void) FixedDbg; + (void) FixedInstr; } void StackColoring::removeInvalidSlotRanges() { diff --git a/llvm/lib/Target/AArch64/AArch64A53Fix835769.cpp b/llvm/lib/Target/AArch64/AArch64A53Fix835769.cpp --- a/llvm/lib/Target/AArch64/AArch64A53Fix835769.cpp +++ b/llvm/lib/Target/AArch64/AArch64A53Fix835769.cpp @@ -223,6 +223,7 @@ if (isFirstInstructionInSequence(PrevInstr) && isSecondInstructionInSequence(CurrInstr)) { LLVM_DEBUG(dbgs() << " ** pattern found at Idx " << Idx << "!\n"); + (void) Idx; Sequences.push_back(CurrInstr); } } diff --git a/llvm/lib/Target/X86/X86FastTileConfig.cpp b/llvm/lib/Target/X86/X86FastTileConfig.cpp --- a/llvm/lib/Target/X86/X86FastTileConfig.cpp +++ b/llvm/lib/Target/X86/X86FastTileConfig.cpp @@ -154,6 +154,7 @@ if (isAMXInstr(*II)) { assert((KeyAMXNum == 0) && "Too many Key AMX instruction!"); + (void) KeyAMXNum; KeyAMXNum++; KeyMI = &*II; } diff --git a/llvm/lib/Transforms/Instrumentation/PGOInstrumentation.cpp b/llvm/lib/Transforms/Instrumentation/PGOInstrumentation.cpp --- a/llvm/lib/Transforms/Instrumentation/PGOInstrumentation.cpp +++ b/llvm/lib/Transforms/Instrumentation/PGOInstrumentation.cpp @@ -1457,6 +1457,7 @@ } LLVM_DEBUG(dbgs() << "Populate counts in " << NumPasses << " passes.\n"); + (void) NumPasses; #ifndef NDEBUG // Assert every BB has a valid counter. for (auto &BB : F) { diff --git a/llvm/lib/Transforms/Scalar/GVN.cpp b/llvm/lib/Transforms/Scalar/GVN.cpp --- a/llvm/lib/Transforms/Scalar/GVN.cpp +++ b/llvm/lib/Transforms/Scalar/GVN.cpp @@ -2593,6 +2593,7 @@ unsigned Iteration = 0; while (ShouldContinue) { LLVM_DEBUG(dbgs() << "GVN iteration: " << Iteration << "\n"); + (void) Iteration; ShouldContinue = iterateOnFunction(F); Changed |= ShouldContinue; ++Iteration; diff --git a/llvm/lib/Transforms/Scalar/RewriteStatepointsForGC.cpp b/llvm/lib/Transforms/Scalar/RewriteStatepointsForGC.cpp --- a/llvm/lib/Transforms/Scalar/RewriteStatepointsForGC.cpp +++ b/llvm/lib/Transforms/Scalar/RewriteStatepointsForGC.cpp @@ -2087,6 +2087,7 @@ assert(PromotableAllocas.size() == Live.size() + NumRematerializedValues && "we must have the same allocas with lives"); + (void) NumRematerializedValues; if (!PromotableAllocas.empty()) { // Apply mem2reg to promote alloca to SSA PromoteMemToReg(PromotableAllocas, DT); diff --git a/llvm/lib/Transforms/Utils/SimplifyIndVar.cpp b/llvm/lib/Transforms/Utils/SimplifyIndVar.cpp --- a/llvm/lib/Transforms/Utils/SimplifyIndVar.cpp +++ b/llvm/lib/Transforms/Utils/SimplifyIndVar.cpp @@ -870,6 +870,7 @@ Instruction *IVOperand = UseOper.second; for (unsigned N = 0; IVOperand; ++N) { assert(N <= Simplified.size() && "runaway iteration"); + (void) N; Value *NewOper = foldIVUser(UseInst, IVOperand); if (!NewOper) diff --git a/llvm/tools/llvm-tli-checker/llvm-tli-checker.cpp b/llvm/tools/llvm-tli-checker/llvm-tli-checker.cpp --- a/llvm/tools/llvm-tli-checker/llvm-tli-checker.cpp +++ b/llvm/tools/llvm-tli-checker/llvm-tli-checker.cpp @@ -338,6 +338,7 @@ assert(TLIandSDKboth + TLIandSDKneither + TLIdoesSDKdoesnt + TLIdoesntSDKdoes == LibFunc::NumLibFuncs); + (void) TLIandSDKneither; outs() << "<< Total TLI yes SDK no: " << TLIdoesSDKdoesnt << "\n>> Total TLI no SDK yes: " << TLIdoesntSDKdoes << "\n== Total TLI yes SDK yes: " << TLIandSDKboth; diff --git a/llvm/utils/TableGen/CodeGenRegisters.cpp b/llvm/utils/TableGen/CodeGenRegisters.cpp --- a/llvm/utils/TableGen/CodeGenRegisters.cpp +++ b/llvm/utils/TableGen/CodeGenRegisters.cpp @@ -1814,6 +1814,7 @@ unsigned NumIters = 0; for (bool Changed = true; Changed; ++NumIters) { assert(NumIters <= NumNativeRegUnits && "Runaway register unit weights"); + (void) NumIters; Changed = false; for (auto &Reg : Registers) { CodeGenRegister::RegUnitList NormalUnits; diff --git a/llvm/utils/TableGen/DFAEmitter.cpp b/llvm/utils/TableGen/DFAEmitter.cpp --- a/llvm/utils/TableGen/DFAEmitter.cpp +++ b/llvm/utils/TableGen/DFAEmitter.cpp @@ -305,6 +305,7 @@ } LLVM_DEBUG(dbgs() << " NFA automaton has " << SeenStates.size() << " states with " << NumTransitions << " transitions.\n"); + (void) NumTransitions; const auto &ActionTypes = Transitions.back().getTypes(); OS << "// The type of an action in the " << Name << " automaton.\n"; diff --git a/llvm/utils/TableGen/GlobalISelEmitter.cpp b/llvm/utils/TableGen/GlobalISelEmitter.cpp --- a/llvm/utils/TableGen/GlobalISelEmitter.cpp +++ b/llvm/utils/TableGen/GlobalISelEmitter.cpp @@ -5534,6 +5534,7 @@ ProcessCurrentGroup(); LLVM_DEBUG(dbgs() << "NumGroups: " << NumGroups << "\n"); + (void) NumGroups; assert(CurrentGroup->empty() && "The last group wasn't properly processed"); return OptRules; } diff --git a/llvm/utils/TableGen/RegisterInfoEmitter.cpp b/llvm/utils/TableGen/RegisterInfoEmitter.cpp --- a/llvm/utils/TableGen/RegisterInfoEmitter.cpp +++ b/llvm/utils/TableGen/RegisterInfoEmitter.cpp @@ -753,7 +753,7 @@ } OS << " };\n\n"; - OS << " --IdxA; assert(IdxA < " << SubRegIndicesSize << ");\n" + OS << " --IdxA; assert(IdxA < " << SubRegIndicesSize << "); (void) IdxA;\n" << " --IdxB; assert(IdxB < " << SubRegIndicesSize << ");\n"; if (Rows.size() > 1) OS << " return Rows[RowMap[IdxA]][IdxB];\n";