diff --git a/bolt/include/bolt/Core/MCPlusBuilder.h b/bolt/include/bolt/Core/MCPlusBuilder.h --- a/bolt/include/bolt/Core/MCPlusBuilder.h +++ b/bolt/include/bolt/Core/MCPlusBuilder.h @@ -511,11 +511,6 @@ return 0; } - virtual bool isADD64rr(const MCInst &Inst) const { - llvm_unreachable("not implemented"); - return false; - } - virtual bool isSUB(const MCInst &Inst) const { llvm_unreachable("not implemented"); return false; diff --git a/bolt/lib/Target/AArch64/AArch64MCPlusBuilder.cpp b/bolt/lib/Target/AArch64/AArch64MCPlusBuilder.cpp --- a/bolt/lib/Target/AArch64/AArch64MCPlusBuilder.cpp +++ b/bolt/lib/Target/AArch64/AArch64MCPlusBuilder.cpp @@ -1103,8 +1103,6 @@ bool isMoveMem2Reg(const MCInst &Inst) const override { return false; } - bool isADD64rr(const MCInst &Inst) const override { return false; } - bool isLeave(const MCInst &Inst) const override { return false; } bool isPop(const MCInst &Inst) const override { return false; } diff --git a/bolt/lib/Target/X86/X86MCPlusBuilder.cpp b/bolt/lib/Target/X86/X86MCPlusBuilder.cpp --- a/bolt/lib/Target/X86/X86MCPlusBuilder.cpp +++ b/bolt/lib/Target/X86/X86MCPlusBuilder.cpp @@ -68,6 +68,13 @@ return Inst.getOpcode() == X86::MOVSX64rm32; } +bool isADD64rr(const MCInst &Inst) { return Inst.getOpcode() == X86::ADD64rr; } + +bool isADDri(const MCInst &Inst) { + return Inst.getOpcode() == X86::ADD64ri32 || + Inst.getOpcode() == X86::ADD64ri8; +} + class X86MCPlusBuilder : public MCPlusBuilder { public: X86MCPlusBuilder(const MCInstrAnalysis *Analysis, const MCInstrInfo *Info, @@ -296,19 +303,10 @@ return 0; } - bool isADD64rr(const MCInst &Inst) const override { - return Inst.getOpcode() == X86::ADD64rr; - } - bool isSUB(const MCInst &Inst) const override { return X86::isSUB(Inst.getOpcode()); } - bool isADDri(const MCInst &Inst) const { - return Inst.getOpcode() == X86::ADD64ri32 || - Inst.getOpcode() == X86::ADD64ri8; - } - bool isLEA64r(const MCInst &Inst) const override { return Inst.getOpcode() == X86::LEA64r; }