diff --git a/llvm/include/llvm/CodeGen/SelectionDAG.h b/llvm/include/llvm/CodeGen/SelectionDAG.h --- a/llvm/include/llvm/CodeGen/SelectionDAG.h +++ b/llvm/include/llvm/CodeGen/SelectionDAG.h @@ -905,6 +905,11 @@ /// Create a logical NOT operation as (XOR Val, BooleanOne). SDValue getLogicalNOT(const SDLoc &DL, SDValue Val, EVT VT); + /// Create a vector-predicated logical NOT operation as (VP_XOR Val, + /// BooleanOne, Mask, EVL). + SDValue getVPLogicalNOT(const SDLoc &DL, SDValue Val, SDValue Mask, + SDValue EVL, EVT VT); + /// Returns sum of the base pointer and offset. /// Unlike getObjectPtrOffset this does not set NoUnsignedWrap by default. SDValue getMemBasePlusOffset(SDValue Base, TypeSize Offset, const SDLoc &DL, diff --git a/llvm/include/llvm/CodeGen/TargetLowering.h b/llvm/include/llvm/CodeGen/TargetLowering.h --- a/llvm/include/llvm/CodeGen/TargetLowering.h +++ b/llvm/include/llvm/CodeGen/TargetLowering.h @@ -4745,28 +4745,32 @@ /// method accepts vectors as its arguments. SDValue expandVectorSplice(SDNode *Node, SelectionDAG &DAG) const; - /// Legalize a SETCC with given LHS and RHS and condition code CC on the - /// current target. + /// Legalize a SETCC or VP_SETCC with given LHS and RHS and condition code CC + /// on the current target. A VP_SETCC will additionally be given a Mask + /// and/or EVL not equal to SDValue(). /// /// If the SETCC has been legalized using AND / OR, then the legalized node /// will be stored in LHS. RHS and CC will be set to SDValue(). NeedInvert - /// will be set to false. + /// will be set to false. This will also hold if the VP_SETCC has been + /// legalized using VP_AND / VP_OR. /// - /// If the SETCC has been legalized by using getSetCCSwappedOperands(), - /// then the values of LHS and RHS will be swapped, CC will be set to the - /// new condition, and NeedInvert will be set to false. + /// If the SETCC / VP_SETCC has been legalized by using + /// getSetCCSwappedOperands(), then the values of LHS and RHS will be + /// swapped, CC will be set to the new condition, and NeedInvert will be set + /// to false. /// - /// If the SETCC has been legalized using the inverse condcode, then LHS and - /// RHS will be unchanged, CC will set to the inverted condcode, and - /// NeedInvert will be set to true. The caller must invert the result of the - /// SETCC with SelectionDAG::getLogicalNOT() or take equivalent action to swap - /// the effect of a true/false result. + /// If the SETCC / VP_SETCC has been legalized using the inverse condcode, + /// then LHS and RHS will be unchanged, CC will set to the inverted condcode, + /// and NeedInvert will be set to true. The caller must invert the result of + /// the SETCC with SelectionDAG::getLogicalNOT() or take equivalent action to + /// swap the effect of a true/false result. /// - /// \returns true if the SetCC has been legalized, false if it hasn't. + /// \returns true if the SETCC / VP_SETCC has been legalized, false if it + /// hasn't. bool LegalizeSetCCCondCode(SelectionDAG &DAG, EVT VT, SDValue &LHS, - SDValue &RHS, SDValue &CC, bool &NeedInvert, - const SDLoc &dl, SDValue &Chain, - bool IsSignaling = false) const; + SDValue &RHS, SDValue &CC, SDValue Mask, + SDValue EVL, bool &NeedInvert, const SDLoc &dl, + SDValue &Chain, bool IsSignaling = false) const; //===--------------------------------------------------------------------===// // Instruction Emitting Hooks diff --git a/llvm/include/llvm/IR/VPIntrinsics.def b/llvm/include/llvm/IR/VPIntrinsics.def --- a/llvm/include/llvm/IR/VPIntrinsics.def +++ b/llvm/include/llvm/IR/VPIntrinsics.def @@ -302,11 +302,11 @@ ///// Comparisons { // llvm.vp.fcmp(x,y,cc,mask,vlen) -BEGIN_REGISTER_VP(vp_fcmp, 3, 4, VP_FCMP, -1) +BEGIN_REGISTER_VP_INTRINSIC(vp_fcmp, 3, 4) VP_PROPERTY_FUNCTIONAL_OPC(FCmp) VP_PROPERTY_CMP(2, true) VP_PROPERTY_CONSTRAINEDFP(0, 1, experimental_constrained_fcmp) -END_REGISTER_VP(vp_fcmp, VP_FCMP) +END_REGISTER_VP_INTRINSIC(vp_fcmp) // llvm.vp.icmp(x,y,cc,mask,vlen) BEGIN_REGISTER_VP_INTRINSIC(vp_icmp, 3, 4) @@ -315,7 +315,7 @@ END_REGISTER_VP_INTRINSIC(vp_icmp) // VP_SETCC (ISel only) -BEGIN_REGISTER_VP_SDNODE(VP_SETCC, -1, vp_setcc, 3, 4) +BEGIN_REGISTER_VP_SDNODE(VP_SETCC, 0, vp_setcc, 3, 4) END_REGISTER_VP_SDNODE(VP_SETCC) ///// } Comparisons diff --git a/llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp b/llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp --- a/llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp +++ b/llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp @@ -3589,18 +3589,26 @@ Results.push_back(Tmp1); break; case ISD::SETCC: + case ISD::VP_SETCC: case ISD::STRICT_FSETCC: case ISD::STRICT_FSETCCS: { - bool IsStrict = Node->getOpcode() != ISD::SETCC; + bool IsVP = Node->getOpcode() == ISD::VP_SETCC; + bool IsStrict = Node->getOpcode() == ISD::STRICT_FSETCC || + Node->getOpcode() == ISD::STRICT_FSETCCS; bool IsSignaling = Node->getOpcode() == ISD::STRICT_FSETCCS; SDValue Chain = IsStrict ? Node->getOperand(0) : SDValue(); unsigned Offset = IsStrict ? 1 : 0; Tmp1 = Node->getOperand(0 + Offset); Tmp2 = Node->getOperand(1 + Offset); Tmp3 = Node->getOperand(2 + Offset); - bool Legalized = - TLI.LegalizeSetCCCondCode(DAG, Node->getValueType(0), Tmp1, Tmp2, Tmp3, - NeedInvert, dl, Chain, IsSignaling); + SDValue Mask, EVL; + if (IsVP) { + Mask = Node->getOperand(3 + Offset); + EVL = Node->getOperand(4 + Offset); + } + bool Legalized = TLI.LegalizeSetCCCondCode( + DAG, Node->getValueType(0), Tmp1, Tmp2, Tmp3, Mask, EVL, NeedInvert, dl, + Chain, IsSignaling); if (Legalized) { // If we expanded the SETCC by swapping LHS and RHS, or by inverting the @@ -3610,6 +3618,9 @@ Tmp1 = DAG.getNode(Node->getOpcode(), dl, Node->getVTList(), {Chain, Tmp1, Tmp2, Tmp3}, Node->getFlags()); Chain = Tmp1.getValue(1); + } else if (IsVP) { + Tmp1 = DAG.getNode(Node->getOpcode(), dl, Node->getValueType(0), + {Tmp1, Tmp2, Tmp3, Mask, EVL}, Node->getFlags()); } else { Tmp1 = DAG.getNode(Node->getOpcode(), dl, Node->getValueType(0), Tmp1, Tmp2, Tmp3, Node->getFlags()); @@ -3618,8 +3629,13 @@ // If we expanded the SETCC by inverting the condition code, then wrap // the existing SETCC in a NOT to restore the intended condition. - if (NeedInvert) - Tmp1 = DAG.getLogicalNOT(dl, Tmp1, Tmp1->getValueType(0)); + if (NeedInvert) { + if (!IsVP) + Tmp1 = DAG.getLogicalNOT(dl, Tmp1, Tmp1->getValueType(0)); + else + Tmp1 = + DAG.getVPLogicalNOT(dl, Tmp1, Mask, EVL, Tmp1->getValueType(0)); + } Results.push_back(Tmp1); if (IsStrict) @@ -3634,6 +3650,7 @@ // Otherwise, SETCC for the given comparison type must be completely // illegal; expand it into a SELECT_CC. + // FIXME: This drops the mask/evl for VP_SETCC. EVT VT = Node->getValueType(0); EVT Tmp1VT = Tmp1.getValueType(); Tmp1 = DAG.getNode(ISD::SELECT_CC, dl, VT, Tmp1, Tmp2, @@ -3694,7 +3711,7 @@ if (!Legalized) { Legalized = TLI.LegalizeSetCCCondCode( DAG, getSetCCResultType(Tmp1.getValueType()), Tmp1, Tmp2, CC, - NeedInvert, dl, Chain); + /*Mask*/ SDValue(), /*EVL*/ SDValue(), NeedInvert, dl, Chain); assert(Legalized && "Can't legalize SELECT_CC with legal condition!"); @@ -3727,9 +3744,9 @@ Tmp3 = Node->getOperand(3); // RHS Tmp4 = Node->getOperand(1); // CC - bool Legalized = - TLI.LegalizeSetCCCondCode(DAG, getSetCCResultType(Tmp2.getValueType()), - Tmp2, Tmp3, Tmp4, NeedInvert, dl, Chain); + bool Legalized = TLI.LegalizeSetCCCondCode( + DAG, getSetCCResultType(Tmp2.getValueType()), Tmp2, Tmp3, Tmp4, + /*Mask*/ SDValue(), /*EVL*/ SDValue(), NeedInvert, dl, Chain); (void)Legalized; assert(Legalized && "Can't legalize BR_CC with legal condition!"); diff --git a/llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp b/llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp --- a/llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp +++ b/llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp @@ -461,6 +461,12 @@ case ISD::VPID: { \ EVT LegalizeVT = LEGALPOS < 0 ? Node->getValueType(-(1 + LEGALPOS)) \ : Node->getOperand(LEGALPOS).getValueType(); \ + if (ISD::VPID == ISD::VP_SETCC) { \ + ISD::CondCode CCCode = cast(Node->getOperand(2))->get(); \ + Action = TLI.getCondCodeAction(CCCode, LegalizeVT.getSimpleVT()); \ + if (Action != TargetLowering::Legal) \ + break; \ + } \ Action = TLI.getOperationAction(Node->getOpcode(), LegalizeVT); \ } break; #include "llvm/IR/VPIntrinsics.def" @@ -744,6 +750,7 @@ ExpandFSUB(Node, Results); return; case ISD::SETCC: + case ISD::VP_SETCC: ExpandSETCC(Node, Results); return; case ISD::ABS: @@ -1417,6 +1424,7 @@ void VectorLegalizer::ExpandSETCC(SDNode *Node, SmallVectorImpl &Results) { bool NeedInvert = false; + bool IsVP = Node->getOpcode() == ISD::VP_SETCC; SDLoc dl(Node); MVT OpVT = Node->getOperand(0).getSimpleValueType(); ISD::CondCode CCCode = cast(Node->getOperand(2))->get(); @@ -1430,20 +1438,36 @@ SDValue LHS = Node->getOperand(0); SDValue RHS = Node->getOperand(1); SDValue CC = Node->getOperand(2); - bool Legalized = TLI.LegalizeSetCCCondCode(DAG, Node->getValueType(0), LHS, - RHS, CC, NeedInvert, dl, Chain); + SDValue Mask, EVL; + if (IsVP) { + Mask = Node->getOperand(3); + EVL = Node->getOperand(4); + } + + bool Legalized = + TLI.LegalizeSetCCCondCode(DAG, Node->getValueType(0), LHS, RHS, CC, Mask, + EVL, NeedInvert, dl, Chain); if (Legalized) { // If we expanded the SETCC by swapping LHS and RHS, or by inverting the // condition code, create a new SETCC node. - if (CC.getNode()) - LHS = DAG.getNode(ISD::SETCC, dl, Node->getValueType(0), LHS, RHS, CC, - Node->getFlags()); + if (CC.getNode()) { + if (!IsVP) + LHS = DAG.getNode(ISD::SETCC, dl, Node->getValueType(0), LHS, RHS, CC, + Node->getFlags()); + else + LHS = DAG.getNode(ISD::VP_SETCC, dl, Node->getValueType(0), + {LHS, RHS, CC, Mask, EVL}, Node->getFlags()); + } // If we expanded the SETCC by inverting the condition code, then wrap // the existing SETCC in a NOT to restore the intended condition. - if (NeedInvert) - LHS = DAG.getLogicalNOT(dl, LHS, LHS->getValueType(0)); + if (NeedInvert) { + if (!IsVP) + LHS = DAG.getLogicalNOT(dl, LHS, LHS->getValueType(0)); + else + LHS = DAG.getVPLogicalNOT(dl, LHS, Mask, EVL, LHS->getValueType(0)); + } } else { // Otherwise, SETCC for the given comparison type must be completely // illegal; expand it into a SELECT_CC. diff --git a/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp b/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp --- a/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp +++ b/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp @@ -1425,6 +1425,12 @@ return getNode(ISD::XOR, DL, VT, Val, TrueValue); } +SDValue SelectionDAG::getVPLogicalNOT(const SDLoc &DL, SDValue Val, + SDValue Mask, SDValue EVL, EVT VT) { + SDValue TrueValue = getBoolConstant(true, DL, VT, VT); + return getNode(ISD::VP_XOR, DL, VT, Val, TrueValue, Mask, EVL); +} + SDValue SelectionDAG::getBoolConstant(bool V, const SDLoc &DL, EVT VT, EVT OpVT) { if (!V) diff --git a/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp b/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp --- a/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp +++ b/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp @@ -9199,13 +9199,16 @@ bool TargetLowering::LegalizeSetCCCondCode(SelectionDAG &DAG, EVT VT, SDValue &LHS, SDValue &RHS, - SDValue &CC, bool &NeedInvert, + SDValue &CC, SDValue Mask, + SDValue EVL, bool &NeedInvert, const SDLoc &dl, SDValue &Chain, bool IsSignaling) const { const TargetLowering &TLI = DAG.getTargetLoweringInfo(); MVT OpVT = LHS.getSimpleValueType(); ISD::CondCode CCCode = cast(CC)->get(); NeedInvert = false; + assert(!EVL == !Mask && "VP Mask and EVL must either both be set or unset"); + bool IsNonVP = !EVL; switch (TLI.getCondCodeAction(CCCode, OpVT)) { default: llvm_unreachable("Unknown condition code action!"); @@ -9312,17 +9315,34 @@ if (CCCode != ISD::SETO && CCCode != ISD::SETUO) { // If we aren't the ordered or unorder operation, // then the pattern is (LHS CC1 RHS) Opc (LHS CC2 RHS). - SetCC1 = DAG.getSetCC(dl, VT, LHS, RHS, CC1, Chain, IsSignaling); - SetCC2 = DAG.getSetCC(dl, VT, LHS, RHS, CC2, Chain, IsSignaling); + if (IsNonVP) { + SetCC1 = DAG.getSetCC(dl, VT, LHS, RHS, CC1, Chain, IsSignaling); + SetCC2 = DAG.getSetCC(dl, VT, LHS, RHS, CC2, Chain, IsSignaling); + } else { + SetCC1 = DAG.getSetCCVP(dl, VT, LHS, RHS, CC1, Mask, EVL); + SetCC2 = DAG.getSetCCVP(dl, VT, LHS, RHS, CC2, Mask, EVL); + } } else { // Otherwise, the pattern is (LHS CC1 LHS) Opc (RHS CC2 RHS) - SetCC1 = DAG.getSetCC(dl, VT, LHS, LHS, CC1, Chain, IsSignaling); - SetCC2 = DAG.getSetCC(dl, VT, RHS, RHS, CC2, Chain, IsSignaling); + if (IsNonVP) { + SetCC1 = DAG.getSetCC(dl, VT, LHS, LHS, CC1, Chain, IsSignaling); + SetCC2 = DAG.getSetCC(dl, VT, RHS, RHS, CC2, Chain, IsSignaling); + } else { + SetCC1 = DAG.getSetCCVP(dl, VT, LHS, LHS, CC1, Mask, EVL); + SetCC2 = DAG.getSetCCVP(dl, VT, RHS, RHS, CC2, Mask, EVL); + } } if (Chain) Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, SetCC1.getValue(1), SetCC2.getValue(1)); - LHS = DAG.getNode(Opc, dl, VT, SetCC1, SetCC2); + if (IsNonVP) + LHS = DAG.getNode(Opc, dl, VT, SetCC1, SetCC2); + else { + // Transform the binary opcode to the VP equivalent. + assert((Opc == ISD::OR || Opc == ISD::AND) && "Unexpected opcode"); + Opc = Opc == ISD::OR ? ISD::VP_OR : ISD::VP_AND; + LHS = DAG.getNode(Opc, dl, VT, SetCC1, SetCC2, Mask, EVL); + } RHS = SDValue(); CC = SDValue(); return true; diff --git a/llvm/lib/Target/RISCV/RISCVInstrInfoVVLPatterns.td b/llvm/lib/Target/RISCV/RISCVInstrInfoVVLPatterns.td --- a/llvm/lib/Target/RISCV/RISCVInstrInfoVVLPatterns.td +++ b/llvm/lib/Target/RISCV/RISCVInstrInfoVVLPatterns.td @@ -577,6 +577,15 @@ VLOpFrag)), (!cast(inst_name#"_VV_"#fvti.LMul.MX) fvti.RegClass:$rs1, fvti.RegClass:$rs2, GPR:$vl, fvti.Log2SEW)>; + def : Pat<(fvti.Mask (riscv_setcc_vl (fvti.Vector fvti.RegClass:$rs1), + fvti.RegClass:$rs2, + cc, + (fvti.Mask V0), + VLOpFrag)), + (!cast(inst_name#"_VV_"#fvti.LMul.MX#"_MASK") + (fvti.Mask (IMPLICIT_DEF)), fvti.RegClass:$rs1, + fvti.RegClass:$rs2, (fvti.Mask V0), + GPR:$vl, fvti.Log2SEW)>; def : Pat<(fvti.Mask (riscv_setcc_vl (fvti.Vector fvti.RegClass:$rs1), (SplatFPOp fvti.ScalarRegClass:$rs2), cc, @@ -585,6 +594,15 @@ (!cast(inst_name#"_V"#fvti.ScalarSuffix#"_"#fvti.LMul.MX) fvti.RegClass:$rs1, fvti.ScalarRegClass:$rs2, GPR:$vl, fvti.Log2SEW)>; + def : Pat<(fvti.Mask (riscv_setcc_vl (fvti.Vector fvti.RegClass:$rs1), + (SplatFPOp fvti.ScalarRegClass:$rs2), + cc, + (fvti.Mask V0), + VLOpFrag)), + (!cast(inst_name#"_V"#fvti.ScalarSuffix#"_"#fvti.LMul.MX#"_MASK") + (fvti.Mask (IMPLICIT_DEF)), fvti.RegClass:$rs1, + fvti.ScalarRegClass:$rs2, (fvti.Mask V0), + GPR:$vl, fvti.Log2SEW)>; def : Pat<(fvti.Mask (riscv_setcc_vl (SplatFPOp fvti.ScalarRegClass:$rs2), (fvti.Vector fvti.RegClass:$rs1), cc, @@ -593,6 +611,15 @@ (!cast(swapped_op_inst_name#"_V"#fvti.ScalarSuffix#"_"#fvti.LMul.MX) fvti.RegClass:$rs1, fvti.ScalarRegClass:$rs2, GPR:$vl, fvti.Log2SEW)>; + def : Pat<(fvti.Mask (riscv_setcc_vl (SplatFPOp fvti.ScalarRegClass:$rs2), + (fvti.Vector fvti.RegClass:$rs1), + cc, + (fvti.Mask V0), + VLOpFrag)), + (!cast(swapped_op_inst_name#"_V"#fvti.ScalarSuffix#"_"#fvti.LMul.MX#"_MASK") + (fvti.Mask (IMPLICIT_DEF)), fvti.RegClass:$rs1, + fvti.ScalarRegClass:$rs2, (fvti.Mask V0), + GPR:$vl, fvti.Log2SEW)>; } } diff --git a/llvm/test/CodeGen/RISCV/rvv/fixed-vectors-setcc-fp-vp.ll b/llvm/test/CodeGen/RISCV/rvv/fixed-vectors-setcc-fp-vp.ll new file mode 100644 --- /dev/null +++ b/llvm/test/CodeGen/RISCV/rvv/fixed-vectors-setcc-fp-vp.ll @@ -0,0 +1,1115 @@ +; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py +; RUN: llc -mtriple=riscv32 -mattr=+v,+zfh,+experimental-zvfh -target-abi=ilp32d -riscv-v-vector-bits-min=128 \ +; RUN: -verify-machineinstrs < %s | FileCheck %s +; RUN: llc -mtriple=riscv64 -mattr=+v,+zfh,+experimental-zvfh -target-abi=lp64d -riscv-v-vector-bits-min=128 \ +; RUN: -verify-machineinstrs < %s | FileCheck %s + +declare <8 x i1> @llvm.vp.fcmp.v8f16(<8 x half>, <8 x half>, metadata, <8 x i1>, i32) + +define <8 x i1> @fcmp_oeq_vv_v8f16(<8 x half> %va, <8 x half> %vb, <8 x i1> %m, i32 zeroext %evl) { +; CHECK-LABEL: fcmp_oeq_vv_v8f16: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli zero, a0, e16, m1, ta, ma +; CHECK-NEXT: vmfeq.vv v0, v8, v9, v0.t +; CHECK-NEXT: ret + %v = call <8 x i1> @llvm.vp.fcmp.v8f16(<8 x half> %va, <8 x half> %vb, metadata !"oeq", <8 x i1> %m, i32 %evl) + ret <8 x i1> %v +} + +define <8 x i1> @fcmp_oeq_vf_v8f16(<8 x half> %va, half %b, <8 x i1> %m, i32 zeroext %evl) { +; CHECK-LABEL: fcmp_oeq_vf_v8f16: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli zero, a0, e16, m1, ta, ma +; CHECK-NEXT: vmfeq.vf v0, v8, fa0, v0.t +; CHECK-NEXT: ret + %elt.head = insertelement <8 x half> poison, half %b, i32 0 + %vb = shufflevector <8 x half> %elt.head, <8 x half> poison, <8 x i32> zeroinitializer + %v = call <8 x i1> @llvm.vp.fcmp.v8f16(<8 x half> %va, <8 x half> %vb, metadata !"oeq", <8 x i1> %m, i32 %evl) + ret <8 x i1> %v +} + +define <8 x i1> @fcmp_oeq_vf_swap_v8f16(<8 x half> %va, half %b, <8 x i1> %m, i32 zeroext %evl) { +; CHECK-LABEL: fcmp_oeq_vf_swap_v8f16: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli zero, a0, e16, m1, ta, ma +; CHECK-NEXT: vmfeq.vf v0, v8, fa0, v0.t +; CHECK-NEXT: ret + %elt.head = insertelement <8 x half> poison, half %b, i32 0 + %vb = shufflevector <8 x half> %elt.head, <8 x half> poison, <8 x i32> zeroinitializer + %v = call <8 x i1> @llvm.vp.fcmp.v8f16(<8 x half> %vb, <8 x half> %va, metadata !"oeq", <8 x i1> %m, i32 %evl) + ret <8 x i1> %v +} + +define <8 x i1> @fcmp_ogt_vv_v8f16(<8 x half> %va, <8 x half> %vb, <8 x i1> %m, i32 zeroext %evl) { +; CHECK-LABEL: fcmp_ogt_vv_v8f16: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli zero, a0, e16, m1, ta, ma +; CHECK-NEXT: vmflt.vv v0, v9, v8, v0.t +; CHECK-NEXT: ret + %v = call <8 x i1> @llvm.vp.fcmp.v8f16(<8 x half> %va, <8 x half> %vb, metadata !"ogt", <8 x i1> %m, i32 %evl) + ret <8 x i1> %v +} + +define <8 x i1> @fcmp_ogt_vf_v8f16(<8 x half> %va, half %b, <8 x i1> %m, i32 zeroext %evl) { +; CHECK-LABEL: fcmp_ogt_vf_v8f16: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli zero, a0, e16, m1, ta, ma +; CHECK-NEXT: vmfgt.vf v0, v8, fa0, v0.t +; CHECK-NEXT: ret + %elt.head = insertelement <8 x half> poison, half %b, i32 0 + %vb = shufflevector <8 x half> %elt.head, <8 x half> poison, <8 x i32> zeroinitializer + %v = call <8 x i1> @llvm.vp.fcmp.v8f16(<8 x half> %va, <8 x half> %vb, metadata !"ogt", <8 x i1> %m, i32 %evl) + ret <8 x i1> %v +} + +define <8 x i1> @fcmp_ogt_vf_swap_v8f16(<8 x half> %va, half %b, <8 x i1> %m, i32 zeroext %evl) { +; CHECK-LABEL: fcmp_ogt_vf_swap_v8f16: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli zero, a0, e16, m1, ta, ma +; CHECK-NEXT: vmflt.vf v0, v8, fa0, v0.t +; CHECK-NEXT: ret + %elt.head = insertelement <8 x half> poison, half %b, i32 0 + %vb = shufflevector <8 x half> %elt.head, <8 x half> poison, <8 x i32> zeroinitializer + %v = call <8 x i1> @llvm.vp.fcmp.v8f16(<8 x half> %vb, <8 x half> %va, metadata !"ogt", <8 x i1> %m, i32 %evl) + ret <8 x i1> %v +} + +define <8 x i1> @fcmp_oge_vv_v8f16(<8 x half> %va, <8 x half> %vb, <8 x i1> %m, i32 zeroext %evl) { +; CHECK-LABEL: fcmp_oge_vv_v8f16: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli zero, a0, e16, m1, ta, ma +; CHECK-NEXT: vmfle.vv v0, v9, v8, v0.t +; CHECK-NEXT: ret + %v = call <8 x i1> @llvm.vp.fcmp.v8f16(<8 x half> %va, <8 x half> %vb, metadata !"oge", <8 x i1> %m, i32 %evl) + ret <8 x i1> %v +} + +define <8 x i1> @fcmp_oge_vf_v8f16(<8 x half> %va, half %b, <8 x i1> %m, i32 zeroext %evl) { +; CHECK-LABEL: fcmp_oge_vf_v8f16: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli zero, a0, e16, m1, ta, ma +; CHECK-NEXT: vmfge.vf v0, v8, fa0, v0.t +; CHECK-NEXT: ret + %elt.head = insertelement <8 x half> poison, half %b, i32 0 + %vb = shufflevector <8 x half> %elt.head, <8 x half> poison, <8 x i32> zeroinitializer + %v = call <8 x i1> @llvm.vp.fcmp.v8f16(<8 x half> %va, <8 x half> %vb, metadata !"oge", <8 x i1> %m, i32 %evl) + ret <8 x i1> %v +} + +define <8 x i1> @fcmp_oge_vf_swap_v8f16(<8 x half> %va, half %b, <8 x i1> %m, i32 zeroext %evl) { +; CHECK-LABEL: fcmp_oge_vf_swap_v8f16: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli zero, a0, e16, m1, ta, ma +; CHECK-NEXT: vmfle.vf v0, v8, fa0, v0.t +; CHECK-NEXT: ret + %elt.head = insertelement <8 x half> poison, half %b, i32 0 + %vb = shufflevector <8 x half> %elt.head, <8 x half> poison, <8 x i32> zeroinitializer + %v = call <8 x i1> @llvm.vp.fcmp.v8f16(<8 x half> %vb, <8 x half> %va, metadata !"oge", <8 x i1> %m, i32 %evl) + ret <8 x i1> %v +} + +define <8 x i1> @fcmp_olt_vv_v8f16(<8 x half> %va, <8 x half> %vb, <8 x i1> %m, i32 zeroext %evl) { +; CHECK-LABEL: fcmp_olt_vv_v8f16: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli zero, a0, e16, m1, ta, ma +; CHECK-NEXT: vmflt.vv v0, v8, v9, v0.t +; CHECK-NEXT: ret + %v = call <8 x i1> @llvm.vp.fcmp.v8f16(<8 x half> %va, <8 x half> %vb, metadata !"olt", <8 x i1> %m, i32 %evl) + ret <8 x i1> %v +} + +define <8 x i1> @fcmp_olt_vf_v8f16(<8 x half> %va, half %b, <8 x i1> %m, i32 zeroext %evl) { +; CHECK-LABEL: fcmp_olt_vf_v8f16: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli zero, a0, e16, m1, ta, ma +; CHECK-NEXT: vmflt.vf v0, v8, fa0, v0.t +; CHECK-NEXT: ret + %elt.head = insertelement <8 x half> poison, half %b, i32 0 + %vb = shufflevector <8 x half> %elt.head, <8 x half> poison, <8 x i32> zeroinitializer + %v = call <8 x i1> @llvm.vp.fcmp.v8f16(<8 x half> %va, <8 x half> %vb, metadata !"olt", <8 x i1> %m, i32 %evl) + ret <8 x i1> %v +} + +define <8 x i1> @fcmp_olt_vf_swap_v8f16(<8 x half> %va, half %b, <8 x i1> %m, i32 zeroext %evl) { +; CHECK-LABEL: fcmp_olt_vf_swap_v8f16: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli zero, a0, e16, m1, ta, ma +; CHECK-NEXT: vmfgt.vf v0, v8, fa0, v0.t +; CHECK-NEXT: ret + %elt.head = insertelement <8 x half> poison, half %b, i32 0 + %vb = shufflevector <8 x half> %elt.head, <8 x half> poison, <8 x i32> zeroinitializer + %v = call <8 x i1> @llvm.vp.fcmp.v8f16(<8 x half> %vb, <8 x half> %va, metadata !"olt", <8 x i1> %m, i32 %evl) + ret <8 x i1> %v +} + +define <8 x i1> @fcmp_ole_vv_v8f16(<8 x half> %va, <8 x half> %vb, <8 x i1> %m, i32 zeroext %evl) { +; CHECK-LABEL: fcmp_ole_vv_v8f16: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli zero, a0, e16, m1, ta, ma +; CHECK-NEXT: vmfle.vv v0, v8, v9, v0.t +; CHECK-NEXT: ret + %v = call <8 x i1> @llvm.vp.fcmp.v8f16(<8 x half> %va, <8 x half> %vb, metadata !"ole", <8 x i1> %m, i32 %evl) + ret <8 x i1> %v +} + +define <8 x i1> @fcmp_ole_vf_v8f16(<8 x half> %va, half %b, <8 x i1> %m, i32 zeroext %evl) { +; CHECK-LABEL: fcmp_ole_vf_v8f16: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli zero, a0, e16, m1, ta, ma +; CHECK-NEXT: vmfle.vf v0, v8, fa0, v0.t +; CHECK-NEXT: ret + %elt.head = insertelement <8 x half> poison, half %b, i32 0 + %vb = shufflevector <8 x half> %elt.head, <8 x half> poison, <8 x i32> zeroinitializer + %v = call <8 x i1> @llvm.vp.fcmp.v8f16(<8 x half> %va, <8 x half> %vb, metadata !"ole", <8 x i1> %m, i32 %evl) + ret <8 x i1> %v +} + +define <8 x i1> @fcmp_ole_vf_swap_v8f16(<8 x half> %va, half %b, <8 x i1> %m, i32 zeroext %evl) { +; CHECK-LABEL: fcmp_ole_vf_swap_v8f16: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli zero, a0, e16, m1, ta, ma +; CHECK-NEXT: vmfge.vf v0, v8, fa0, v0.t +; CHECK-NEXT: ret + %elt.head = insertelement <8 x half> poison, half %b, i32 0 + %vb = shufflevector <8 x half> %elt.head, <8 x half> poison, <8 x i32> zeroinitializer + %v = call <8 x i1> @llvm.vp.fcmp.v8f16(<8 x half> %vb, <8 x half> %va, metadata !"ole", <8 x i1> %m, i32 %evl) + ret <8 x i1> %v +} + +define <8 x i1> @fcmp_one_vv_v8f16(<8 x half> %va, <8 x half> %vb, <8 x i1> %m, i32 zeroext %evl) { +; CHECK-LABEL: fcmp_one_vv_v8f16: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli zero, a0, e16, m1, ta, ma +; CHECK-NEXT: vmflt.vv v10, v8, v9, v0.t +; CHECK-NEXT: vmflt.vv v8, v9, v8, v0.t +; CHECK-NEXT: vsetvli zero, zero, e8, mf2, ta, mu +; CHECK-NEXT: vmor.mm v0, v8, v10 +; CHECK-NEXT: ret + %v = call <8 x i1> @llvm.vp.fcmp.v8f16(<8 x half> %va, <8 x half> %vb, metadata !"one", <8 x i1> %m, i32 %evl) + ret <8 x i1> %v +} + +define <8 x i1> @fcmp_one_vf_v8f16(<8 x half> %va, half %b, <8 x i1> %m, i32 zeroext %evl) { +; CHECK-LABEL: fcmp_one_vf_v8f16: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli zero, a0, e16, m1, ta, ma +; CHECK-NEXT: vmflt.vf v9, v8, fa0, v0.t +; CHECK-NEXT: vmfgt.vf v8, v8, fa0, v0.t +; CHECK-NEXT: vsetvli zero, zero, e8, mf2, ta, mu +; CHECK-NEXT: vmor.mm v0, v8, v9 +; CHECK-NEXT: ret + %elt.head = insertelement <8 x half> poison, half %b, i32 0 + %vb = shufflevector <8 x half> %elt.head, <8 x half> poison, <8 x i32> zeroinitializer + %v = call <8 x i1> @llvm.vp.fcmp.v8f16(<8 x half> %va, <8 x half> %vb, metadata !"one", <8 x i1> %m, i32 %evl) + ret <8 x i1> %v +} + +define <8 x i1> @fcmp_one_vf_swap_v8f16(<8 x half> %va, half %b, <8 x i1> %m, i32 zeroext %evl) { +; CHECK-LABEL: fcmp_one_vf_swap_v8f16: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli zero, a0, e16, m1, ta, ma +; CHECK-NEXT: vmfgt.vf v9, v8, fa0, v0.t +; CHECK-NEXT: vmflt.vf v8, v8, fa0, v0.t +; CHECK-NEXT: vsetvli zero, zero, e8, mf2, ta, mu +; CHECK-NEXT: vmor.mm v0, v8, v9 +; CHECK-NEXT: ret + %elt.head = insertelement <8 x half> poison, half %b, i32 0 + %vb = shufflevector <8 x half> %elt.head, <8 x half> poison, <8 x i32> zeroinitializer + %v = call <8 x i1> @llvm.vp.fcmp.v8f16(<8 x half> %vb, <8 x half> %va, metadata !"one", <8 x i1> %m, i32 %evl) + ret <8 x i1> %v +} + +define <8 x i1> @fcmp_ord_vv_v8f16(<8 x half> %va, <8 x half> %vb, <8 x i1> %m, i32 zeroext %evl) { +; CHECK-LABEL: fcmp_ord_vv_v8f16: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli zero, a0, e16, m1, ta, ma +; CHECK-NEXT: vmfeq.vv v9, v9, v9, v0.t +; CHECK-NEXT: vmfeq.vv v8, v8, v8, v0.t +; CHECK-NEXT: vsetvli zero, zero, e8, mf2, ta, mu +; CHECK-NEXT: vmand.mm v0, v8, v9 +; CHECK-NEXT: ret + %v = call <8 x i1> @llvm.vp.fcmp.v8f16(<8 x half> %va, <8 x half> %vb, metadata !"ord", <8 x i1> %m, i32 %evl) + ret <8 x i1> %v +} + +define <8 x i1> @fcmp_ord_vf_v8f16(<8 x half> %va, half %b, <8 x i1> %m, i32 zeroext %evl) { +; CHECK-LABEL: fcmp_ord_vf_v8f16: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetivli zero, 8, e16, m1, ta, mu +; CHECK-NEXT: vfmv.v.f v9, fa0 +; CHECK-NEXT: vsetvli zero, a0, e16, m1, ta, ma +; CHECK-NEXT: vmfeq.vf v9, v9, fa0, v0.t +; CHECK-NEXT: vmfeq.vv v8, v8, v8, v0.t +; CHECK-NEXT: vsetvli zero, zero, e8, mf2, ta, mu +; CHECK-NEXT: vmand.mm v0, v8, v9 +; CHECK-NEXT: ret + %elt.head = insertelement <8 x half> poison, half %b, i32 0 + %vb = shufflevector <8 x half> %elt.head, <8 x half> poison, <8 x i32> zeroinitializer + %v = call <8 x i1> @llvm.vp.fcmp.v8f16(<8 x half> %va, <8 x half> %vb, metadata !"ord", <8 x i1> %m, i32 %evl) + ret <8 x i1> %v +} + +define <8 x i1> @fcmp_ord_vf_swap_v8f16(<8 x half> %va, half %b, <8 x i1> %m, i32 zeroext %evl) { +; CHECK-LABEL: fcmp_ord_vf_swap_v8f16: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetivli zero, 8, e16, m1, ta, mu +; CHECK-NEXT: vfmv.v.f v9, fa0 +; CHECK-NEXT: vsetvli zero, a0, e16, m1, ta, ma +; CHECK-NEXT: vmfeq.vf v9, v9, fa0, v0.t +; CHECK-NEXT: vmfeq.vv v8, v8, v8, v0.t +; CHECK-NEXT: vsetvli zero, zero, e8, mf2, ta, mu +; CHECK-NEXT: vmand.mm v0, v9, v8 +; CHECK-NEXT: ret + %elt.head = insertelement <8 x half> poison, half %b, i32 0 + %vb = shufflevector <8 x half> %elt.head, <8 x half> poison, <8 x i32> zeroinitializer + %v = call <8 x i1> @llvm.vp.fcmp.v8f16(<8 x half> %vb, <8 x half> %va, metadata !"ord", <8 x i1> %m, i32 %evl) + ret <8 x i1> %v +} + +define <8 x i1> @fcmp_ueq_vv_v8f16(<8 x half> %va, <8 x half> %vb, <8 x i1> %m, i32 zeroext %evl) { +; CHECK-LABEL: fcmp_ueq_vv_v8f16: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli zero, a0, e16, m1, ta, ma +; CHECK-NEXT: vmflt.vv v10, v8, v9, v0.t +; CHECK-NEXT: vmflt.vv v8, v9, v8, v0.t +; CHECK-NEXT: vsetvli zero, zero, e8, mf2, ta, mu +; CHECK-NEXT: vmnor.mm v0, v8, v10 +; CHECK-NEXT: ret + %v = call <8 x i1> @llvm.vp.fcmp.v8f16(<8 x half> %va, <8 x half> %vb, metadata !"ueq", <8 x i1> %m, i32 %evl) + ret <8 x i1> %v +} + +define <8 x i1> @fcmp_ueq_vf_v8f16(<8 x half> %va, half %b, <8 x i1> %m, i32 zeroext %evl) { +; CHECK-LABEL: fcmp_ueq_vf_v8f16: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli zero, a0, e16, m1, ta, ma +; CHECK-NEXT: vmflt.vf v9, v8, fa0, v0.t +; CHECK-NEXT: vmfgt.vf v8, v8, fa0, v0.t +; CHECK-NEXT: vsetvli zero, zero, e8, mf2, ta, mu +; CHECK-NEXT: vmnor.mm v0, v8, v9 +; CHECK-NEXT: ret + %elt.head = insertelement <8 x half> poison, half %b, i32 0 + %vb = shufflevector <8 x half> %elt.head, <8 x half> poison, <8 x i32> zeroinitializer + %v = call <8 x i1> @llvm.vp.fcmp.v8f16(<8 x half> %va, <8 x half> %vb, metadata !"ueq", <8 x i1> %m, i32 %evl) + ret <8 x i1> %v +} + +define <8 x i1> @fcmp_ueq_vf_swap_v8f16(<8 x half> %va, half %b, <8 x i1> %m, i32 zeroext %evl) { +; CHECK-LABEL: fcmp_ueq_vf_swap_v8f16: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli zero, a0, e16, m1, ta, ma +; CHECK-NEXT: vmfgt.vf v9, v8, fa0, v0.t +; CHECK-NEXT: vmflt.vf v8, v8, fa0, v0.t +; CHECK-NEXT: vsetvli zero, zero, e8, mf2, ta, mu +; CHECK-NEXT: vmnor.mm v0, v8, v9 +; CHECK-NEXT: ret + %elt.head = insertelement <8 x half> poison, half %b, i32 0 + %vb = shufflevector <8 x half> %elt.head, <8 x half> poison, <8 x i32> zeroinitializer + %v = call <8 x i1> @llvm.vp.fcmp.v8f16(<8 x half> %vb, <8 x half> %va, metadata !"ueq", <8 x i1> %m, i32 %evl) + ret <8 x i1> %v +} + +define <8 x i1> @fcmp_ugt_vv_v8f16(<8 x half> %va, <8 x half> %vb, <8 x i1> %m, i32 zeroext %evl) { +; CHECK-LABEL: fcmp_ugt_vv_v8f16: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli zero, a0, e16, m1, ta, ma +; CHECK-NEXT: vmfle.vv v8, v8, v9, v0.t +; CHECK-NEXT: vsetvli zero, zero, e8, mf2, ta, mu +; CHECK-NEXT: vmnand.mm v0, v8, v8 +; CHECK-NEXT: ret + %v = call <8 x i1> @llvm.vp.fcmp.v8f16(<8 x half> %va, <8 x half> %vb, metadata !"ugt", <8 x i1> %m, i32 %evl) + ret <8 x i1> %v +} + +define <8 x i1> @fcmp_ugt_vf_v8f16(<8 x half> %va, half %b, <8 x i1> %m, i32 zeroext %evl) { +; CHECK-LABEL: fcmp_ugt_vf_v8f16: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli zero, a0, e16, m1, ta, ma +; CHECK-NEXT: vmfle.vf v8, v8, fa0, v0.t +; CHECK-NEXT: vsetvli zero, zero, e8, mf2, ta, mu +; CHECK-NEXT: vmnand.mm v0, v8, v8 +; CHECK-NEXT: ret + %elt.head = insertelement <8 x half> poison, half %b, i32 0 + %vb = shufflevector <8 x half> %elt.head, <8 x half> poison, <8 x i32> zeroinitializer + %v = call <8 x i1> @llvm.vp.fcmp.v8f16(<8 x half> %va, <8 x half> %vb, metadata !"ugt", <8 x i1> %m, i32 %evl) + ret <8 x i1> %v +} + +define <8 x i1> @fcmp_ugt_vf_swap_v8f16(<8 x half> %va, half %b, <8 x i1> %m, i32 zeroext %evl) { +; CHECK-LABEL: fcmp_ugt_vf_swap_v8f16: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli zero, a0, e16, m1, ta, ma +; CHECK-NEXT: vmfge.vf v8, v8, fa0, v0.t +; CHECK-NEXT: vsetvli zero, zero, e8, mf2, ta, mu +; CHECK-NEXT: vmnand.mm v0, v8, v8 +; CHECK-NEXT: ret + %elt.head = insertelement <8 x half> poison, half %b, i32 0 + %vb = shufflevector <8 x half> %elt.head, <8 x half> poison, <8 x i32> zeroinitializer + %v = call <8 x i1> @llvm.vp.fcmp.v8f16(<8 x half> %vb, <8 x half> %va, metadata !"ugt", <8 x i1> %m, i32 %evl) + ret <8 x i1> %v +} + +define <8 x i1> @fcmp_uge_vv_v8f16(<8 x half> %va, <8 x half> %vb, <8 x i1> %m, i32 zeroext %evl) { +; CHECK-LABEL: fcmp_uge_vv_v8f16: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli zero, a0, e16, m1, ta, ma +; CHECK-NEXT: vmflt.vv v8, v8, v9, v0.t +; CHECK-NEXT: vsetvli zero, zero, e8, mf2, ta, mu +; CHECK-NEXT: vmnand.mm v0, v8, v8 +; CHECK-NEXT: ret + %v = call <8 x i1> @llvm.vp.fcmp.v8f16(<8 x half> %va, <8 x half> %vb, metadata !"uge", <8 x i1> %m, i32 %evl) + ret <8 x i1> %v +} + +define <8 x i1> @fcmp_uge_vf_v8f16(<8 x half> %va, half %b, <8 x i1> %m, i32 zeroext %evl) { +; CHECK-LABEL: fcmp_uge_vf_v8f16: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli zero, a0, e16, m1, ta, ma +; CHECK-NEXT: vmflt.vf v8, v8, fa0, v0.t +; CHECK-NEXT: vsetvli zero, zero, e8, mf2, ta, mu +; CHECK-NEXT: vmnand.mm v0, v8, v8 +; CHECK-NEXT: ret + %elt.head = insertelement <8 x half> poison, half %b, i32 0 + %vb = shufflevector <8 x half> %elt.head, <8 x half> poison, <8 x i32> zeroinitializer + %v = call <8 x i1> @llvm.vp.fcmp.v8f16(<8 x half> %va, <8 x half> %vb, metadata !"uge", <8 x i1> %m, i32 %evl) + ret <8 x i1> %v +} + +define <8 x i1> @fcmp_uge_vf_swap_v8f16(<8 x half> %va, half %b, <8 x i1> %m, i32 zeroext %evl) { +; CHECK-LABEL: fcmp_uge_vf_swap_v8f16: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli zero, a0, e16, m1, ta, ma +; CHECK-NEXT: vmfgt.vf v8, v8, fa0, v0.t +; CHECK-NEXT: vsetvli zero, zero, e8, mf2, ta, mu +; CHECK-NEXT: vmnand.mm v0, v8, v8 +; CHECK-NEXT: ret + %elt.head = insertelement <8 x half> poison, half %b, i32 0 + %vb = shufflevector <8 x half> %elt.head, <8 x half> poison, <8 x i32> zeroinitializer + %v = call <8 x i1> @llvm.vp.fcmp.v8f16(<8 x half> %vb, <8 x half> %va, metadata !"uge", <8 x i1> %m, i32 %evl) + ret <8 x i1> %v +} + +define <8 x i1> @fcmp_ult_vv_v8f16(<8 x half> %va, <8 x half> %vb, <8 x i1> %m, i32 zeroext %evl) { +; CHECK-LABEL: fcmp_ult_vv_v8f16: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli zero, a0, e16, m1, ta, ma +; CHECK-NEXT: vmfle.vv v8, v9, v8, v0.t +; CHECK-NEXT: vsetvli zero, zero, e8, mf2, ta, mu +; CHECK-NEXT: vmnand.mm v0, v8, v8 +; CHECK-NEXT: ret + %v = call <8 x i1> @llvm.vp.fcmp.v8f16(<8 x half> %va, <8 x half> %vb, metadata !"ult", <8 x i1> %m, i32 %evl) + ret <8 x i1> %v +} + +define <8 x i1> @fcmp_ult_vf_v8f16(<8 x half> %va, half %b, <8 x i1> %m, i32 zeroext %evl) { +; CHECK-LABEL: fcmp_ult_vf_v8f16: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli zero, a0, e16, m1, ta, ma +; CHECK-NEXT: vmfge.vf v8, v8, fa0, v0.t +; CHECK-NEXT: vsetvli zero, zero, e8, mf2, ta, mu +; CHECK-NEXT: vmnand.mm v0, v8, v8 +; CHECK-NEXT: ret + %elt.head = insertelement <8 x half> poison, half %b, i32 0 + %vb = shufflevector <8 x half> %elt.head, <8 x half> poison, <8 x i32> zeroinitializer + %v = call <8 x i1> @llvm.vp.fcmp.v8f16(<8 x half> %va, <8 x half> %vb, metadata !"ult", <8 x i1> %m, i32 %evl) + ret <8 x i1> %v +} + +define <8 x i1> @fcmp_ult_vf_swap_v8f16(<8 x half> %va, half %b, <8 x i1> %m, i32 zeroext %evl) { +; CHECK-LABEL: fcmp_ult_vf_swap_v8f16: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli zero, a0, e16, m1, ta, ma +; CHECK-NEXT: vmfle.vf v8, v8, fa0, v0.t +; CHECK-NEXT: vsetvli zero, zero, e8, mf2, ta, mu +; CHECK-NEXT: vmnand.mm v0, v8, v8 +; CHECK-NEXT: ret + %elt.head = insertelement <8 x half> poison, half %b, i32 0 + %vb = shufflevector <8 x half> %elt.head, <8 x half> poison, <8 x i32> zeroinitializer + %v = call <8 x i1> @llvm.vp.fcmp.v8f16(<8 x half> %vb, <8 x half> %va, metadata !"ult", <8 x i1> %m, i32 %evl) + ret <8 x i1> %v +} + +define <8 x i1> @fcmp_ule_vv_v8f16(<8 x half> %va, <8 x half> %vb, <8 x i1> %m, i32 zeroext %evl) { +; CHECK-LABEL: fcmp_ule_vv_v8f16: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli zero, a0, e16, m1, ta, ma +; CHECK-NEXT: vmflt.vv v8, v9, v8, v0.t +; CHECK-NEXT: vsetvli zero, zero, e8, mf2, ta, mu +; CHECK-NEXT: vmnand.mm v0, v8, v8 +; CHECK-NEXT: ret + %v = call <8 x i1> @llvm.vp.fcmp.v8f16(<8 x half> %va, <8 x half> %vb, metadata !"ule", <8 x i1> %m, i32 %evl) + ret <8 x i1> %v +} + +define <8 x i1> @fcmp_ule_vf_v8f16(<8 x half> %va, half %b, <8 x i1> %m, i32 zeroext %evl) { +; CHECK-LABEL: fcmp_ule_vf_v8f16: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli zero, a0, e16, m1, ta, ma +; CHECK-NEXT: vmfgt.vf v8, v8, fa0, v0.t +; CHECK-NEXT: vsetvli zero, zero, e8, mf2, ta, mu +; CHECK-NEXT: vmnand.mm v0, v8, v8 +; CHECK-NEXT: ret + %elt.head = insertelement <8 x half> poison, half %b, i32 0 + %vb = shufflevector <8 x half> %elt.head, <8 x half> poison, <8 x i32> zeroinitializer + %v = call <8 x i1> @llvm.vp.fcmp.v8f16(<8 x half> %va, <8 x half> %vb, metadata !"ule", <8 x i1> %m, i32 %evl) + ret <8 x i1> %v +} + +define <8 x i1> @fcmp_ule_vf_swap_v8f16(<8 x half> %va, half %b, <8 x i1> %m, i32 zeroext %evl) { +; CHECK-LABEL: fcmp_ule_vf_swap_v8f16: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli zero, a0, e16, m1, ta, ma +; CHECK-NEXT: vmflt.vf v8, v8, fa0, v0.t +; CHECK-NEXT: vsetvli zero, zero, e8, mf2, ta, mu +; CHECK-NEXT: vmnand.mm v0, v8, v8 +; CHECK-NEXT: ret + %elt.head = insertelement <8 x half> poison, half %b, i32 0 + %vb = shufflevector <8 x half> %elt.head, <8 x half> poison, <8 x i32> zeroinitializer + %v = call <8 x i1> @llvm.vp.fcmp.v8f16(<8 x half> %vb, <8 x half> %va, metadata !"ule", <8 x i1> %m, i32 %evl) + ret <8 x i1> %v +} + +define <8 x i1> @fcmp_une_vv_v8f16(<8 x half> %va, <8 x half> %vb, <8 x i1> %m, i32 zeroext %evl) { +; CHECK-LABEL: fcmp_une_vv_v8f16: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli zero, a0, e16, m1, ta, ma +; CHECK-NEXT: vmfne.vv v0, v8, v9, v0.t +; CHECK-NEXT: ret + %v = call <8 x i1> @llvm.vp.fcmp.v8f16(<8 x half> %va, <8 x half> %vb, metadata !"une", <8 x i1> %m, i32 %evl) + ret <8 x i1> %v +} + +define <8 x i1> @fcmp_une_vf_v8f16(<8 x half> %va, half %b, <8 x i1> %m, i32 zeroext %evl) { +; CHECK-LABEL: fcmp_une_vf_v8f16: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli zero, a0, e16, m1, ta, ma +; CHECK-NEXT: vmfne.vf v0, v8, fa0, v0.t +; CHECK-NEXT: ret + %elt.head = insertelement <8 x half> poison, half %b, i32 0 + %vb = shufflevector <8 x half> %elt.head, <8 x half> poison, <8 x i32> zeroinitializer + %v = call <8 x i1> @llvm.vp.fcmp.v8f16(<8 x half> %va, <8 x half> %vb, metadata !"une", <8 x i1> %m, i32 %evl) + ret <8 x i1> %v +} + +define <8 x i1> @fcmp_une_vf_swap_v8f16(<8 x half> %va, half %b, <8 x i1> %m, i32 zeroext %evl) { +; CHECK-LABEL: fcmp_une_vf_swap_v8f16: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli zero, a0, e16, m1, ta, ma +; CHECK-NEXT: vmfne.vf v0, v8, fa0, v0.t +; CHECK-NEXT: ret + %elt.head = insertelement <8 x half> poison, half %b, i32 0 + %vb = shufflevector <8 x half> %elt.head, <8 x half> poison, <8 x i32> zeroinitializer + %v = call <8 x i1> @llvm.vp.fcmp.v8f16(<8 x half> %vb, <8 x half> %va, metadata !"une", <8 x i1> %m, i32 %evl) + ret <8 x i1> %v +} + +define <8 x i1> @fcmp_uno_vv_v8f16(<8 x half> %va, <8 x half> %vb, <8 x i1> %m, i32 zeroext %evl) { +; CHECK-LABEL: fcmp_uno_vv_v8f16: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli zero, a0, e16, m1, ta, ma +; CHECK-NEXT: vmfne.vv v9, v9, v9, v0.t +; CHECK-NEXT: vmfne.vv v8, v8, v8, v0.t +; CHECK-NEXT: vsetvli zero, zero, e8, mf2, ta, mu +; CHECK-NEXT: vmor.mm v0, v8, v9 +; CHECK-NEXT: ret + %v = call <8 x i1> @llvm.vp.fcmp.v8f16(<8 x half> %va, <8 x half> %vb, metadata !"uno", <8 x i1> %m, i32 %evl) + ret <8 x i1> %v +} + +define <8 x i1> @fcmp_uno_vf_v8f16(<8 x half> %va, half %b, <8 x i1> %m, i32 zeroext %evl) { +; CHECK-LABEL: fcmp_uno_vf_v8f16: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetivli zero, 8, e16, m1, ta, mu +; CHECK-NEXT: vfmv.v.f v9, fa0 +; CHECK-NEXT: vsetvli zero, a0, e16, m1, ta, ma +; CHECK-NEXT: vmfne.vf v9, v9, fa0, v0.t +; CHECK-NEXT: vmfne.vv v8, v8, v8, v0.t +; CHECK-NEXT: vsetvli zero, zero, e8, mf2, ta, mu +; CHECK-NEXT: vmor.mm v0, v8, v9 +; CHECK-NEXT: ret + %elt.head = insertelement <8 x half> poison, half %b, i32 0 + %vb = shufflevector <8 x half> %elt.head, <8 x half> poison, <8 x i32> zeroinitializer + %v = call <8 x i1> @llvm.vp.fcmp.v8f16(<8 x half> %va, <8 x half> %vb, metadata !"uno", <8 x i1> %m, i32 %evl) + ret <8 x i1> %v +} + +define <8 x i1> @fcmp_uno_vf_swap_v8f16(<8 x half> %va, half %b, <8 x i1> %m, i32 zeroext %evl) { +; CHECK-LABEL: fcmp_uno_vf_swap_v8f16: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetivli zero, 8, e16, m1, ta, mu +; CHECK-NEXT: vfmv.v.f v9, fa0 +; CHECK-NEXT: vsetvli zero, a0, e16, m1, ta, ma +; CHECK-NEXT: vmfne.vf v9, v9, fa0, v0.t +; CHECK-NEXT: vmfne.vv v8, v8, v8, v0.t +; CHECK-NEXT: vsetvli zero, zero, e8, mf2, ta, mu +; CHECK-NEXT: vmor.mm v0, v9, v8 +; CHECK-NEXT: ret + %elt.head = insertelement <8 x half> poison, half %b, i32 0 + %vb = shufflevector <8 x half> %elt.head, <8 x half> poison, <8 x i32> zeroinitializer + %v = call <8 x i1> @llvm.vp.fcmp.v8f16(<8 x half> %vb, <8 x half> %va, metadata !"uno", <8 x i1> %m, i32 %evl) + ret <8 x i1> %v +} + +declare <8 x i1> @llvm.vp.fcmp.v8f64(<8 x double>, <8 x double>, metadata, <8 x i1>, i32) + +define <8 x i1> @fcmp_oeq_vv_v8f64(<8 x double> %va, <8 x double> %vb, <8 x i1> %m, i32 zeroext %evl) { +; CHECK-LABEL: fcmp_oeq_vv_v8f64: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli zero, a0, e64, m4, ta, ma +; CHECK-NEXT: vmfeq.vv v16, v8, v12, v0.t +; CHECK-NEXT: vmv1r.v v0, v16 +; CHECK-NEXT: ret + %v = call <8 x i1> @llvm.vp.fcmp.v8f64(<8 x double> %va, <8 x double> %vb, metadata !"oeq", <8 x i1> %m, i32 %evl) + ret <8 x i1> %v +} + +define <8 x i1> @fcmp_oeq_vf_v8f64(<8 x double> %va, double %b, <8 x i1> %m, i32 zeroext %evl) { +; CHECK-LABEL: fcmp_oeq_vf_v8f64: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli zero, a0, e64, m4, ta, ma +; CHECK-NEXT: vmfeq.vf v12, v8, fa0, v0.t +; CHECK-NEXT: vmv1r.v v0, v12 +; CHECK-NEXT: ret + %elt.head = insertelement <8 x double> poison, double %b, i32 0 + %vb = shufflevector <8 x double> %elt.head, <8 x double> poison, <8 x i32> zeroinitializer + %v = call <8 x i1> @llvm.vp.fcmp.v8f64(<8 x double> %va, <8 x double> %vb, metadata !"oeq", <8 x i1> %m, i32 %evl) + ret <8 x i1> %v +} + +define <8 x i1> @fcmp_oeq_vf_swap_v8f64(<8 x double> %va, double %b, <8 x i1> %m, i32 zeroext %evl) { +; CHECK-LABEL: fcmp_oeq_vf_swap_v8f64: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli zero, a0, e64, m4, ta, ma +; CHECK-NEXT: vmfeq.vf v12, v8, fa0, v0.t +; CHECK-NEXT: vmv1r.v v0, v12 +; CHECK-NEXT: ret + %elt.head = insertelement <8 x double> poison, double %b, i32 0 + %vb = shufflevector <8 x double> %elt.head, <8 x double> poison, <8 x i32> zeroinitializer + %v = call <8 x i1> @llvm.vp.fcmp.v8f64(<8 x double> %vb, <8 x double> %va, metadata !"oeq", <8 x i1> %m, i32 %evl) + ret <8 x i1> %v +} + +define <8 x i1> @fcmp_ogt_vv_v8f64(<8 x double> %va, <8 x double> %vb, <8 x i1> %m, i32 zeroext %evl) { +; CHECK-LABEL: fcmp_ogt_vv_v8f64: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli zero, a0, e64, m4, ta, ma +; CHECK-NEXT: vmflt.vv v16, v12, v8, v0.t +; CHECK-NEXT: vmv1r.v v0, v16 +; CHECK-NEXT: ret + %v = call <8 x i1> @llvm.vp.fcmp.v8f64(<8 x double> %va, <8 x double> %vb, metadata !"ogt", <8 x i1> %m, i32 %evl) + ret <8 x i1> %v +} + +define <8 x i1> @fcmp_ogt_vf_v8f64(<8 x double> %va, double %b, <8 x i1> %m, i32 zeroext %evl) { +; CHECK-LABEL: fcmp_ogt_vf_v8f64: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli zero, a0, e64, m4, ta, ma +; CHECK-NEXT: vmfgt.vf v12, v8, fa0, v0.t +; CHECK-NEXT: vmv1r.v v0, v12 +; CHECK-NEXT: ret + %elt.head = insertelement <8 x double> poison, double %b, i32 0 + %vb = shufflevector <8 x double> %elt.head, <8 x double> poison, <8 x i32> zeroinitializer + %v = call <8 x i1> @llvm.vp.fcmp.v8f64(<8 x double> %va, <8 x double> %vb, metadata !"ogt", <8 x i1> %m, i32 %evl) + ret <8 x i1> %v +} + +define <8 x i1> @fcmp_ogt_vf_swap_v8f64(<8 x double> %va, double %b, <8 x i1> %m, i32 zeroext %evl) { +; CHECK-LABEL: fcmp_ogt_vf_swap_v8f64: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli zero, a0, e64, m4, ta, ma +; CHECK-NEXT: vmflt.vf v12, v8, fa0, v0.t +; CHECK-NEXT: vmv1r.v v0, v12 +; CHECK-NEXT: ret + %elt.head = insertelement <8 x double> poison, double %b, i32 0 + %vb = shufflevector <8 x double> %elt.head, <8 x double> poison, <8 x i32> zeroinitializer + %v = call <8 x i1> @llvm.vp.fcmp.v8f64(<8 x double> %vb, <8 x double> %va, metadata !"ogt", <8 x i1> %m, i32 %evl) + ret <8 x i1> %v +} + +define <8 x i1> @fcmp_oge_vv_v8f64(<8 x double> %va, <8 x double> %vb, <8 x i1> %m, i32 zeroext %evl) { +; CHECK-LABEL: fcmp_oge_vv_v8f64: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli zero, a0, e64, m4, ta, ma +; CHECK-NEXT: vmfle.vv v16, v12, v8, v0.t +; CHECK-NEXT: vmv1r.v v0, v16 +; CHECK-NEXT: ret + %v = call <8 x i1> @llvm.vp.fcmp.v8f64(<8 x double> %va, <8 x double> %vb, metadata !"oge", <8 x i1> %m, i32 %evl) + ret <8 x i1> %v +} + +define <8 x i1> @fcmp_oge_vf_v8f64(<8 x double> %va, double %b, <8 x i1> %m, i32 zeroext %evl) { +; CHECK-LABEL: fcmp_oge_vf_v8f64: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli zero, a0, e64, m4, ta, ma +; CHECK-NEXT: vmfge.vf v12, v8, fa0, v0.t +; CHECK-NEXT: vmv1r.v v0, v12 +; CHECK-NEXT: ret + %elt.head = insertelement <8 x double> poison, double %b, i32 0 + %vb = shufflevector <8 x double> %elt.head, <8 x double> poison, <8 x i32> zeroinitializer + %v = call <8 x i1> @llvm.vp.fcmp.v8f64(<8 x double> %va, <8 x double> %vb, metadata !"oge", <8 x i1> %m, i32 %evl) + ret <8 x i1> %v +} + +define <8 x i1> @fcmp_oge_vf_swap_v8f64(<8 x double> %va, double %b, <8 x i1> %m, i32 zeroext %evl) { +; CHECK-LABEL: fcmp_oge_vf_swap_v8f64: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli zero, a0, e64, m4, ta, ma +; CHECK-NEXT: vmfle.vf v12, v8, fa0, v0.t +; CHECK-NEXT: vmv1r.v v0, v12 +; CHECK-NEXT: ret + %elt.head = insertelement <8 x double> poison, double %b, i32 0 + %vb = shufflevector <8 x double> %elt.head, <8 x double> poison, <8 x i32> zeroinitializer + %v = call <8 x i1> @llvm.vp.fcmp.v8f64(<8 x double> %vb, <8 x double> %va, metadata !"oge", <8 x i1> %m, i32 %evl) + ret <8 x i1> %v +} + +define <8 x i1> @fcmp_olt_vv_v8f64(<8 x double> %va, <8 x double> %vb, <8 x i1> %m, i32 zeroext %evl) { +; CHECK-LABEL: fcmp_olt_vv_v8f64: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli zero, a0, e64, m4, ta, ma +; CHECK-NEXT: vmflt.vv v16, v8, v12, v0.t +; CHECK-NEXT: vmv1r.v v0, v16 +; CHECK-NEXT: ret + %v = call <8 x i1> @llvm.vp.fcmp.v8f64(<8 x double> %va, <8 x double> %vb, metadata !"olt", <8 x i1> %m, i32 %evl) + ret <8 x i1> %v +} + +define <8 x i1> @fcmp_olt_vf_v8f64(<8 x double> %va, double %b, <8 x i1> %m, i32 zeroext %evl) { +; CHECK-LABEL: fcmp_olt_vf_v8f64: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli zero, a0, e64, m4, ta, ma +; CHECK-NEXT: vmflt.vf v12, v8, fa0, v0.t +; CHECK-NEXT: vmv1r.v v0, v12 +; CHECK-NEXT: ret + %elt.head = insertelement <8 x double> poison, double %b, i32 0 + %vb = shufflevector <8 x double> %elt.head, <8 x double> poison, <8 x i32> zeroinitializer + %v = call <8 x i1> @llvm.vp.fcmp.v8f64(<8 x double> %va, <8 x double> %vb, metadata !"olt", <8 x i1> %m, i32 %evl) + ret <8 x i1> %v +} + +define <8 x i1> @fcmp_olt_vf_swap_v8f64(<8 x double> %va, double %b, <8 x i1> %m, i32 zeroext %evl) { +; CHECK-LABEL: fcmp_olt_vf_swap_v8f64: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli zero, a0, e64, m4, ta, ma +; CHECK-NEXT: vmfgt.vf v12, v8, fa0, v0.t +; CHECK-NEXT: vmv1r.v v0, v12 +; CHECK-NEXT: ret + %elt.head = insertelement <8 x double> poison, double %b, i32 0 + %vb = shufflevector <8 x double> %elt.head, <8 x double> poison, <8 x i32> zeroinitializer + %v = call <8 x i1> @llvm.vp.fcmp.v8f64(<8 x double> %vb, <8 x double> %va, metadata !"olt", <8 x i1> %m, i32 %evl) + ret <8 x i1> %v +} + +define <8 x i1> @fcmp_ole_vv_v8f64(<8 x double> %va, <8 x double> %vb, <8 x i1> %m, i32 zeroext %evl) { +; CHECK-LABEL: fcmp_ole_vv_v8f64: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli zero, a0, e64, m4, ta, ma +; CHECK-NEXT: vmfle.vv v16, v8, v12, v0.t +; CHECK-NEXT: vmv1r.v v0, v16 +; CHECK-NEXT: ret + %v = call <8 x i1> @llvm.vp.fcmp.v8f64(<8 x double> %va, <8 x double> %vb, metadata !"ole", <8 x i1> %m, i32 %evl) + ret <8 x i1> %v +} + +define <8 x i1> @fcmp_ole_vf_v8f64(<8 x double> %va, double %b, <8 x i1> %m, i32 zeroext %evl) { +; CHECK-LABEL: fcmp_ole_vf_v8f64: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli zero, a0, e64, m4, ta, ma +; CHECK-NEXT: vmfle.vf v12, v8, fa0, v0.t +; CHECK-NEXT: vmv1r.v v0, v12 +; CHECK-NEXT: ret + %elt.head = insertelement <8 x double> poison, double %b, i32 0 + %vb = shufflevector <8 x double> %elt.head, <8 x double> poison, <8 x i32> zeroinitializer + %v = call <8 x i1> @llvm.vp.fcmp.v8f64(<8 x double> %va, <8 x double> %vb, metadata !"ole", <8 x i1> %m, i32 %evl) + ret <8 x i1> %v +} + +define <8 x i1> @fcmp_ole_vf_swap_v8f64(<8 x double> %va, double %b, <8 x i1> %m, i32 zeroext %evl) { +; CHECK-LABEL: fcmp_ole_vf_swap_v8f64: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli zero, a0, e64, m4, ta, ma +; CHECK-NEXT: vmfge.vf v12, v8, fa0, v0.t +; CHECK-NEXT: vmv1r.v v0, v12 +; CHECK-NEXT: ret + %elt.head = insertelement <8 x double> poison, double %b, i32 0 + %vb = shufflevector <8 x double> %elt.head, <8 x double> poison, <8 x i32> zeroinitializer + %v = call <8 x i1> @llvm.vp.fcmp.v8f64(<8 x double> %vb, <8 x double> %va, metadata !"ole", <8 x i1> %m, i32 %evl) + ret <8 x i1> %v +} + +define <8 x i1> @fcmp_one_vv_v8f64(<8 x double> %va, <8 x double> %vb, <8 x i1> %m, i32 zeroext %evl) { +; CHECK-LABEL: fcmp_one_vv_v8f64: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli zero, a0, e64, m4, ta, ma +; CHECK-NEXT: vmflt.vv v16, v8, v12, v0.t +; CHECK-NEXT: vmflt.vv v17, v12, v8, v0.t +; CHECK-NEXT: vsetvli zero, zero, e8, mf2, ta, mu +; CHECK-NEXT: vmor.mm v0, v17, v16 +; CHECK-NEXT: ret + %v = call <8 x i1> @llvm.vp.fcmp.v8f64(<8 x double> %va, <8 x double> %vb, metadata !"one", <8 x i1> %m, i32 %evl) + ret <8 x i1> %v +} + +define <8 x i1> @fcmp_one_vf_v8f64(<8 x double> %va, double %b, <8 x i1> %m, i32 zeroext %evl) { +; CHECK-LABEL: fcmp_one_vf_v8f64: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli zero, a0, e64, m4, ta, ma +; CHECK-NEXT: vmflt.vf v12, v8, fa0, v0.t +; CHECK-NEXT: vmfgt.vf v13, v8, fa0, v0.t +; CHECK-NEXT: vsetvli zero, zero, e8, mf2, ta, mu +; CHECK-NEXT: vmor.mm v0, v13, v12 +; CHECK-NEXT: ret + %elt.head = insertelement <8 x double> poison, double %b, i32 0 + %vb = shufflevector <8 x double> %elt.head, <8 x double> poison, <8 x i32> zeroinitializer + %v = call <8 x i1> @llvm.vp.fcmp.v8f64(<8 x double> %va, <8 x double> %vb, metadata !"one", <8 x i1> %m, i32 %evl) + ret <8 x i1> %v +} + +define <8 x i1> @fcmp_one_vf_swap_v8f64(<8 x double> %va, double %b, <8 x i1> %m, i32 zeroext %evl) { +; CHECK-LABEL: fcmp_one_vf_swap_v8f64: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli zero, a0, e64, m4, ta, ma +; CHECK-NEXT: vmfgt.vf v12, v8, fa0, v0.t +; CHECK-NEXT: vmflt.vf v13, v8, fa0, v0.t +; CHECK-NEXT: vsetvli zero, zero, e8, mf2, ta, mu +; CHECK-NEXT: vmor.mm v0, v13, v12 +; CHECK-NEXT: ret + %elt.head = insertelement <8 x double> poison, double %b, i32 0 + %vb = shufflevector <8 x double> %elt.head, <8 x double> poison, <8 x i32> zeroinitializer + %v = call <8 x i1> @llvm.vp.fcmp.v8f64(<8 x double> %vb, <8 x double> %va, metadata !"one", <8 x i1> %m, i32 %evl) + ret <8 x i1> %v +} + +define <8 x i1> @fcmp_ord_vv_v8f64(<8 x double> %va, <8 x double> %vb, <8 x i1> %m, i32 zeroext %evl) { +; CHECK-LABEL: fcmp_ord_vv_v8f64: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli zero, a0, e64, m4, ta, ma +; CHECK-NEXT: vmfeq.vv v16, v12, v12, v0.t +; CHECK-NEXT: vmfeq.vv v12, v8, v8, v0.t +; CHECK-NEXT: vsetvli zero, zero, e8, mf2, ta, mu +; CHECK-NEXT: vmand.mm v0, v12, v16 +; CHECK-NEXT: ret + %v = call <8 x i1> @llvm.vp.fcmp.v8f64(<8 x double> %va, <8 x double> %vb, metadata !"ord", <8 x i1> %m, i32 %evl) + ret <8 x i1> %v +} + +define <8 x i1> @fcmp_ord_vf_v8f64(<8 x double> %va, double %b, <8 x i1> %m, i32 zeroext %evl) { +; CHECK-LABEL: fcmp_ord_vf_v8f64: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetivli zero, 8, e64, m4, ta, mu +; CHECK-NEXT: vfmv.v.f v12, fa0 +; CHECK-NEXT: vsetvli zero, a0, e64, m4, ta, ma +; CHECK-NEXT: vmfeq.vf v16, v12, fa0, v0.t +; CHECK-NEXT: vmfeq.vv v12, v8, v8, v0.t +; CHECK-NEXT: vsetvli zero, zero, e8, mf2, ta, mu +; CHECK-NEXT: vmand.mm v0, v12, v16 +; CHECK-NEXT: ret + %elt.head = insertelement <8 x double> poison, double %b, i32 0 + %vb = shufflevector <8 x double> %elt.head, <8 x double> poison, <8 x i32> zeroinitializer + %v = call <8 x i1> @llvm.vp.fcmp.v8f64(<8 x double> %va, <8 x double> %vb, metadata !"ord", <8 x i1> %m, i32 %evl) + ret <8 x i1> %v +} + +define <8 x i1> @fcmp_ord_vf_swap_v8f64(<8 x double> %va, double %b, <8 x i1> %m, i32 zeroext %evl) { +; CHECK-LABEL: fcmp_ord_vf_swap_v8f64: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetivli zero, 8, e64, m4, ta, mu +; CHECK-NEXT: vfmv.v.f v12, fa0 +; CHECK-NEXT: vsetvli zero, a0, e64, m4, ta, ma +; CHECK-NEXT: vmfeq.vf v16, v12, fa0, v0.t +; CHECK-NEXT: vmfeq.vv v12, v8, v8, v0.t +; CHECK-NEXT: vsetvli zero, zero, e8, mf2, ta, mu +; CHECK-NEXT: vmand.mm v0, v16, v12 +; CHECK-NEXT: ret + %elt.head = insertelement <8 x double> poison, double %b, i32 0 + %vb = shufflevector <8 x double> %elt.head, <8 x double> poison, <8 x i32> zeroinitializer + %v = call <8 x i1> @llvm.vp.fcmp.v8f64(<8 x double> %vb, <8 x double> %va, metadata !"ord", <8 x i1> %m, i32 %evl) + ret <8 x i1> %v +} + +define <8 x i1> @fcmp_ueq_vv_v8f64(<8 x double> %va, <8 x double> %vb, <8 x i1> %m, i32 zeroext %evl) { +; CHECK-LABEL: fcmp_ueq_vv_v8f64: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli zero, a0, e64, m4, ta, ma +; CHECK-NEXT: vmflt.vv v16, v8, v12, v0.t +; CHECK-NEXT: vmflt.vv v17, v12, v8, v0.t +; CHECK-NEXT: vsetvli zero, zero, e8, mf2, ta, mu +; CHECK-NEXT: vmnor.mm v0, v17, v16 +; CHECK-NEXT: ret + %v = call <8 x i1> @llvm.vp.fcmp.v8f64(<8 x double> %va, <8 x double> %vb, metadata !"ueq", <8 x i1> %m, i32 %evl) + ret <8 x i1> %v +} + +define <8 x i1> @fcmp_ueq_vf_v8f64(<8 x double> %va, double %b, <8 x i1> %m, i32 zeroext %evl) { +; CHECK-LABEL: fcmp_ueq_vf_v8f64: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli zero, a0, e64, m4, ta, ma +; CHECK-NEXT: vmflt.vf v12, v8, fa0, v0.t +; CHECK-NEXT: vmfgt.vf v13, v8, fa0, v0.t +; CHECK-NEXT: vsetvli zero, zero, e8, mf2, ta, mu +; CHECK-NEXT: vmnor.mm v0, v13, v12 +; CHECK-NEXT: ret + %elt.head = insertelement <8 x double> poison, double %b, i32 0 + %vb = shufflevector <8 x double> %elt.head, <8 x double> poison, <8 x i32> zeroinitializer + %v = call <8 x i1> @llvm.vp.fcmp.v8f64(<8 x double> %va, <8 x double> %vb, metadata !"ueq", <8 x i1> %m, i32 %evl) + ret <8 x i1> %v +} + +define <8 x i1> @fcmp_ueq_vf_swap_v8f64(<8 x double> %va, double %b, <8 x i1> %m, i32 zeroext %evl) { +; CHECK-LABEL: fcmp_ueq_vf_swap_v8f64: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli zero, a0, e64, m4, ta, ma +; CHECK-NEXT: vmfgt.vf v12, v8, fa0, v0.t +; CHECK-NEXT: vmflt.vf v13, v8, fa0, v0.t +; CHECK-NEXT: vsetvli zero, zero, e8, mf2, ta, mu +; CHECK-NEXT: vmnor.mm v0, v13, v12 +; CHECK-NEXT: ret + %elt.head = insertelement <8 x double> poison, double %b, i32 0 + %vb = shufflevector <8 x double> %elt.head, <8 x double> poison, <8 x i32> zeroinitializer + %v = call <8 x i1> @llvm.vp.fcmp.v8f64(<8 x double> %vb, <8 x double> %va, metadata !"ueq", <8 x i1> %m, i32 %evl) + ret <8 x i1> %v +} + +define <8 x i1> @fcmp_ugt_vv_v8f64(<8 x double> %va, <8 x double> %vb, <8 x i1> %m, i32 zeroext %evl) { +; CHECK-LABEL: fcmp_ugt_vv_v8f64: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli zero, a0, e64, m4, ta, ma +; CHECK-NEXT: vmfle.vv v16, v8, v12, v0.t +; CHECK-NEXT: vsetvli zero, zero, e8, mf2, ta, mu +; CHECK-NEXT: vmnand.mm v0, v16, v16 +; CHECK-NEXT: ret + %v = call <8 x i1> @llvm.vp.fcmp.v8f64(<8 x double> %va, <8 x double> %vb, metadata !"ugt", <8 x i1> %m, i32 %evl) + ret <8 x i1> %v +} + +define <8 x i1> @fcmp_ugt_vf_v8f64(<8 x double> %va, double %b, <8 x i1> %m, i32 zeroext %evl) { +; CHECK-LABEL: fcmp_ugt_vf_v8f64: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli zero, a0, e64, m4, ta, ma +; CHECK-NEXT: vmfle.vf v12, v8, fa0, v0.t +; CHECK-NEXT: vsetvli zero, zero, e8, mf2, ta, mu +; CHECK-NEXT: vmnand.mm v0, v12, v12 +; CHECK-NEXT: ret + %elt.head = insertelement <8 x double> poison, double %b, i32 0 + %vb = shufflevector <8 x double> %elt.head, <8 x double> poison, <8 x i32> zeroinitializer + %v = call <8 x i1> @llvm.vp.fcmp.v8f64(<8 x double> %va, <8 x double> %vb, metadata !"ugt", <8 x i1> %m, i32 %evl) + ret <8 x i1> %v +} + +define <8 x i1> @fcmp_ugt_vf_swap_v8f64(<8 x double> %va, double %b, <8 x i1> %m, i32 zeroext %evl) { +; CHECK-LABEL: fcmp_ugt_vf_swap_v8f64: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli zero, a0, e64, m4, ta, ma +; CHECK-NEXT: vmfge.vf v12, v8, fa0, v0.t +; CHECK-NEXT: vsetvli zero, zero, e8, mf2, ta, mu +; CHECK-NEXT: vmnand.mm v0, v12, v12 +; CHECK-NEXT: ret + %elt.head = insertelement <8 x double> poison, double %b, i32 0 + %vb = shufflevector <8 x double> %elt.head, <8 x double> poison, <8 x i32> zeroinitializer + %v = call <8 x i1> @llvm.vp.fcmp.v8f64(<8 x double> %vb, <8 x double> %va, metadata !"ugt", <8 x i1> %m, i32 %evl) + ret <8 x i1> %v +} + +define <8 x i1> @fcmp_uge_vv_v8f64(<8 x double> %va, <8 x double> %vb, <8 x i1> %m, i32 zeroext %evl) { +; CHECK-LABEL: fcmp_uge_vv_v8f64: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli zero, a0, e64, m4, ta, ma +; CHECK-NEXT: vmflt.vv v16, v8, v12, v0.t +; CHECK-NEXT: vsetvli zero, zero, e8, mf2, ta, mu +; CHECK-NEXT: vmnand.mm v0, v16, v16 +; CHECK-NEXT: ret + %v = call <8 x i1> @llvm.vp.fcmp.v8f64(<8 x double> %va, <8 x double> %vb, metadata !"uge", <8 x i1> %m, i32 %evl) + ret <8 x i1> %v +} + +define <8 x i1> @fcmp_uge_vf_v8f64(<8 x double> %va, double %b, <8 x i1> %m, i32 zeroext %evl) { +; CHECK-LABEL: fcmp_uge_vf_v8f64: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli zero, a0, e64, m4, ta, ma +; CHECK-NEXT: vmflt.vf v12, v8, fa0, v0.t +; CHECK-NEXT: vsetvli zero, zero, e8, mf2, ta, mu +; CHECK-NEXT: vmnand.mm v0, v12, v12 +; CHECK-NEXT: ret + %elt.head = insertelement <8 x double> poison, double %b, i32 0 + %vb = shufflevector <8 x double> %elt.head, <8 x double> poison, <8 x i32> zeroinitializer + %v = call <8 x i1> @llvm.vp.fcmp.v8f64(<8 x double> %va, <8 x double> %vb, metadata !"uge", <8 x i1> %m, i32 %evl) + ret <8 x i1> %v +} + +define <8 x i1> @fcmp_uge_vf_swap_v8f64(<8 x double> %va, double %b, <8 x i1> %m, i32 zeroext %evl) { +; CHECK-LABEL: fcmp_uge_vf_swap_v8f64: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli zero, a0, e64, m4, ta, ma +; CHECK-NEXT: vmfgt.vf v12, v8, fa0, v0.t +; CHECK-NEXT: vsetvli zero, zero, e8, mf2, ta, mu +; CHECK-NEXT: vmnand.mm v0, v12, v12 +; CHECK-NEXT: ret + %elt.head = insertelement <8 x double> poison, double %b, i32 0 + %vb = shufflevector <8 x double> %elt.head, <8 x double> poison, <8 x i32> zeroinitializer + %v = call <8 x i1> @llvm.vp.fcmp.v8f64(<8 x double> %vb, <8 x double> %va, metadata !"uge", <8 x i1> %m, i32 %evl) + ret <8 x i1> %v +} + +define <8 x i1> @fcmp_ult_vv_v8f64(<8 x double> %va, <8 x double> %vb, <8 x i1> %m, i32 zeroext %evl) { +; CHECK-LABEL: fcmp_ult_vv_v8f64: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli zero, a0, e64, m4, ta, ma +; CHECK-NEXT: vmfle.vv v16, v12, v8, v0.t +; CHECK-NEXT: vsetvli zero, zero, e8, mf2, ta, mu +; CHECK-NEXT: vmnand.mm v0, v16, v16 +; CHECK-NEXT: ret + %v = call <8 x i1> @llvm.vp.fcmp.v8f64(<8 x double> %va, <8 x double> %vb, metadata !"ult", <8 x i1> %m, i32 %evl) + ret <8 x i1> %v +} + +define <8 x i1> @fcmp_ult_vf_v8f64(<8 x double> %va, double %b, <8 x i1> %m, i32 zeroext %evl) { +; CHECK-LABEL: fcmp_ult_vf_v8f64: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli zero, a0, e64, m4, ta, ma +; CHECK-NEXT: vmfge.vf v12, v8, fa0, v0.t +; CHECK-NEXT: vsetvli zero, zero, e8, mf2, ta, mu +; CHECK-NEXT: vmnand.mm v0, v12, v12 +; CHECK-NEXT: ret + %elt.head = insertelement <8 x double> poison, double %b, i32 0 + %vb = shufflevector <8 x double> %elt.head, <8 x double> poison, <8 x i32> zeroinitializer + %v = call <8 x i1> @llvm.vp.fcmp.v8f64(<8 x double> %va, <8 x double> %vb, metadata !"ult", <8 x i1> %m, i32 %evl) + ret <8 x i1> %v +} + +define <8 x i1> @fcmp_ult_vf_swap_v8f64(<8 x double> %va, double %b, <8 x i1> %m, i32 zeroext %evl) { +; CHECK-LABEL: fcmp_ult_vf_swap_v8f64: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli zero, a0, e64, m4, ta, ma +; CHECK-NEXT: vmfle.vf v12, v8, fa0, v0.t +; CHECK-NEXT: vsetvli zero, zero, e8, mf2, ta, mu +; CHECK-NEXT: vmnand.mm v0, v12, v12 +; CHECK-NEXT: ret + %elt.head = insertelement <8 x double> poison, double %b, i32 0 + %vb = shufflevector <8 x double> %elt.head, <8 x double> poison, <8 x i32> zeroinitializer + %v = call <8 x i1> @llvm.vp.fcmp.v8f64(<8 x double> %vb, <8 x double> %va, metadata !"ult", <8 x i1> %m, i32 %evl) + ret <8 x i1> %v +} + +define <8 x i1> @fcmp_ule_vv_v8f64(<8 x double> %va, <8 x double> %vb, <8 x i1> %m, i32 zeroext %evl) { +; CHECK-LABEL: fcmp_ule_vv_v8f64: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli zero, a0, e64, m4, ta, ma +; CHECK-NEXT: vmflt.vv v16, v12, v8, v0.t +; CHECK-NEXT: vsetvli zero, zero, e8, mf2, ta, mu +; CHECK-NEXT: vmnand.mm v0, v16, v16 +; CHECK-NEXT: ret + %v = call <8 x i1> @llvm.vp.fcmp.v8f64(<8 x double> %va, <8 x double> %vb, metadata !"ule", <8 x i1> %m, i32 %evl) + ret <8 x i1> %v +} + +define <8 x i1> @fcmp_ule_vf_v8f64(<8 x double> %va, double %b, <8 x i1> %m, i32 zeroext %evl) { +; CHECK-LABEL: fcmp_ule_vf_v8f64: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli zero, a0, e64, m4, ta, ma +; CHECK-NEXT: vmfgt.vf v12, v8, fa0, v0.t +; CHECK-NEXT: vsetvli zero, zero, e8, mf2, ta, mu +; CHECK-NEXT: vmnand.mm v0, v12, v12 +; CHECK-NEXT: ret + %elt.head = insertelement <8 x double> poison, double %b, i32 0 + %vb = shufflevector <8 x double> %elt.head, <8 x double> poison, <8 x i32> zeroinitializer + %v = call <8 x i1> @llvm.vp.fcmp.v8f64(<8 x double> %va, <8 x double> %vb, metadata !"ule", <8 x i1> %m, i32 %evl) + ret <8 x i1> %v +} + +define <8 x i1> @fcmp_ule_vf_swap_v8f64(<8 x double> %va, double %b, <8 x i1> %m, i32 zeroext %evl) { +; CHECK-LABEL: fcmp_ule_vf_swap_v8f64: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli zero, a0, e64, m4, ta, ma +; CHECK-NEXT: vmflt.vf v12, v8, fa0, v0.t +; CHECK-NEXT: vsetvli zero, zero, e8, mf2, ta, mu +; CHECK-NEXT: vmnand.mm v0, v12, v12 +; CHECK-NEXT: ret + %elt.head = insertelement <8 x double> poison, double %b, i32 0 + %vb = shufflevector <8 x double> %elt.head, <8 x double> poison, <8 x i32> zeroinitializer + %v = call <8 x i1> @llvm.vp.fcmp.v8f64(<8 x double> %vb, <8 x double> %va, metadata !"ule", <8 x i1> %m, i32 %evl) + ret <8 x i1> %v +} + +define <8 x i1> @fcmp_une_vv_v8f64(<8 x double> %va, <8 x double> %vb, <8 x i1> %m, i32 zeroext %evl) { +; CHECK-LABEL: fcmp_une_vv_v8f64: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli zero, a0, e64, m4, ta, ma +; CHECK-NEXT: vmfne.vv v16, v8, v12, v0.t +; CHECK-NEXT: vmv1r.v v0, v16 +; CHECK-NEXT: ret + %v = call <8 x i1> @llvm.vp.fcmp.v8f64(<8 x double> %va, <8 x double> %vb, metadata !"une", <8 x i1> %m, i32 %evl) + ret <8 x i1> %v +} + +define <8 x i1> @fcmp_une_vf_v8f64(<8 x double> %va, double %b, <8 x i1> %m, i32 zeroext %evl) { +; CHECK-LABEL: fcmp_une_vf_v8f64: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli zero, a0, e64, m4, ta, ma +; CHECK-NEXT: vmfne.vf v12, v8, fa0, v0.t +; CHECK-NEXT: vmv1r.v v0, v12 +; CHECK-NEXT: ret + %elt.head = insertelement <8 x double> poison, double %b, i32 0 + %vb = shufflevector <8 x double> %elt.head, <8 x double> poison, <8 x i32> zeroinitializer + %v = call <8 x i1> @llvm.vp.fcmp.v8f64(<8 x double> %va, <8 x double> %vb, metadata !"une", <8 x i1> %m, i32 %evl) + ret <8 x i1> %v +} + +define <8 x i1> @fcmp_une_vf_swap_v8f64(<8 x double> %va, double %b, <8 x i1> %m, i32 zeroext %evl) { +; CHECK-LABEL: fcmp_une_vf_swap_v8f64: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli zero, a0, e64, m4, ta, ma +; CHECK-NEXT: vmfne.vf v12, v8, fa0, v0.t +; CHECK-NEXT: vmv1r.v v0, v12 +; CHECK-NEXT: ret + %elt.head = insertelement <8 x double> poison, double %b, i32 0 + %vb = shufflevector <8 x double> %elt.head, <8 x double> poison, <8 x i32> zeroinitializer + %v = call <8 x i1> @llvm.vp.fcmp.v8f64(<8 x double> %vb, <8 x double> %va, metadata !"une", <8 x i1> %m, i32 %evl) + ret <8 x i1> %v +} + +define <8 x i1> @fcmp_uno_vv_v8f64(<8 x double> %va, <8 x double> %vb, <8 x i1> %m, i32 zeroext %evl) { +; CHECK-LABEL: fcmp_uno_vv_v8f64: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli zero, a0, e64, m4, ta, ma +; CHECK-NEXT: vmfne.vv v16, v12, v12, v0.t +; CHECK-NEXT: vmfne.vv v12, v8, v8, v0.t +; CHECK-NEXT: vsetvli zero, zero, e8, mf2, ta, mu +; CHECK-NEXT: vmor.mm v0, v12, v16 +; CHECK-NEXT: ret + %v = call <8 x i1> @llvm.vp.fcmp.v8f64(<8 x double> %va, <8 x double> %vb, metadata !"uno", <8 x i1> %m, i32 %evl) + ret <8 x i1> %v +} + +define <8 x i1> @fcmp_uno_vf_v8f64(<8 x double> %va, double %b, <8 x i1> %m, i32 zeroext %evl) { +; CHECK-LABEL: fcmp_uno_vf_v8f64: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetivli zero, 8, e64, m4, ta, mu +; CHECK-NEXT: vfmv.v.f v12, fa0 +; CHECK-NEXT: vsetvli zero, a0, e64, m4, ta, ma +; CHECK-NEXT: vmfne.vf v16, v12, fa0, v0.t +; CHECK-NEXT: vmfne.vv v12, v8, v8, v0.t +; CHECK-NEXT: vsetvli zero, zero, e8, mf2, ta, mu +; CHECK-NEXT: vmor.mm v0, v12, v16 +; CHECK-NEXT: ret + %elt.head = insertelement <8 x double> poison, double %b, i32 0 + %vb = shufflevector <8 x double> %elt.head, <8 x double> poison, <8 x i32> zeroinitializer + %v = call <8 x i1> @llvm.vp.fcmp.v8f64(<8 x double> %va, <8 x double> %vb, metadata !"uno", <8 x i1> %m, i32 %evl) + ret <8 x i1> %v +} + +define <8 x i1> @fcmp_uno_vf_swap_v8f64(<8 x double> %va, double %b, <8 x i1> %m, i32 zeroext %evl) { +; CHECK-LABEL: fcmp_uno_vf_swap_v8f64: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetivli zero, 8, e64, m4, ta, mu +; CHECK-NEXT: vfmv.v.f v12, fa0 +; CHECK-NEXT: vsetvli zero, a0, e64, m4, ta, ma +; CHECK-NEXT: vmfne.vf v16, v12, fa0, v0.t +; CHECK-NEXT: vmfne.vv v12, v8, v8, v0.t +; CHECK-NEXT: vsetvli zero, zero, e8, mf2, ta, mu +; CHECK-NEXT: vmor.mm v0, v16, v12 +; CHECK-NEXT: ret + %elt.head = insertelement <8 x double> poison, double %b, i32 0 + %vb = shufflevector <8 x double> %elt.head, <8 x double> poison, <8 x i32> zeroinitializer + %v = call <8 x i1> @llvm.vp.fcmp.v8f64(<8 x double> %vb, <8 x double> %va, metadata !"uno", <8 x i1> %m, i32 %evl) + ret <8 x i1> %v +} diff --git a/llvm/test/CodeGen/RISCV/rvv/setcc-fp-vp.ll b/llvm/test/CodeGen/RISCV/rvv/setcc-fp-vp.ll new file mode 100644 --- /dev/null +++ b/llvm/test/CodeGen/RISCV/rvv/setcc-fp-vp.ll @@ -0,0 +1,2225 @@ +; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py +; RUN: llc -mtriple=riscv32 -mattr=+v,+zfh,+experimental-zvfh -target-abi=ilp32d \ +; RUN: -verify-machineinstrs < %s | FileCheck %s +; RUN: llc -mtriple=riscv64 -mattr=+v,+zfh,+experimental-zvfh -target-abi=lp64d \ +; RUN: -verify-machineinstrs < %s | FileCheck %s + +declare @llvm.vp.fcmp.nxv1f16(, , metadata, , i32) + +define @fcmp_oeq_vv_nxv1f16( %va, %vb, %m, i32 zeroext %evl) { +; CHECK-LABEL: fcmp_oeq_vv_nxv1f16: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli zero, a0, e16, mf4, ta, ma +; CHECK-NEXT: vmfeq.vv v0, v8, v9, v0.t +; CHECK-NEXT: ret + %v = call @llvm.vp.fcmp.nxv1f16( %va, %vb, metadata !"oeq", %m, i32 %evl) + ret %v +} + +define @fcmp_oeq_vf_nxv1f16( %va, half %b, %m, i32 zeroext %evl) { +; CHECK-LABEL: fcmp_oeq_vf_nxv1f16: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli zero, a0, e16, mf4, ta, ma +; CHECK-NEXT: vmfeq.vf v0, v8, fa0, v0.t +; CHECK-NEXT: ret + %elt.head = insertelement poison, half %b, i32 0 + %vb = shufflevector %elt.head, poison, zeroinitializer + %v = call @llvm.vp.fcmp.nxv1f16( %va, %vb, metadata !"oeq", %m, i32 %evl) + ret %v +} + +define @fcmp_oeq_vf_swap_nxv1f16( %va, half %b, %m, i32 zeroext %evl) { +; CHECK-LABEL: fcmp_oeq_vf_swap_nxv1f16: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli zero, a0, e16, mf4, ta, ma +; CHECK-NEXT: vmfeq.vf v0, v8, fa0, v0.t +; CHECK-NEXT: ret + %elt.head = insertelement poison, half %b, i32 0 + %vb = shufflevector %elt.head, poison, zeroinitializer + %v = call @llvm.vp.fcmp.nxv1f16( %vb, %va, metadata !"oeq", %m, i32 %evl) + ret %v +} + +define @fcmp_ogt_vv_nxv1f16( %va, %vb, %m, i32 zeroext %evl) { +; CHECK-LABEL: fcmp_ogt_vv_nxv1f16: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli zero, a0, e16, mf4, ta, ma +; CHECK-NEXT: vmflt.vv v0, v9, v8, v0.t +; CHECK-NEXT: ret + %v = call @llvm.vp.fcmp.nxv1f16( %va, %vb, metadata !"ogt", %m, i32 %evl) + ret %v +} + +define @fcmp_ogt_vf_nxv1f16( %va, half %b, %m, i32 zeroext %evl) { +; CHECK-LABEL: fcmp_ogt_vf_nxv1f16: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli zero, a0, e16, mf4, ta, ma +; CHECK-NEXT: vmfgt.vf v0, v8, fa0, v0.t +; CHECK-NEXT: ret + %elt.head = insertelement poison, half %b, i32 0 + %vb = shufflevector %elt.head, poison, zeroinitializer + %v = call @llvm.vp.fcmp.nxv1f16( %va, %vb, metadata !"ogt", %m, i32 %evl) + ret %v +} + +define @fcmp_ogt_vf_swap_nxv1f16( %va, half %b, %m, i32 zeroext %evl) { +; CHECK-LABEL: fcmp_ogt_vf_swap_nxv1f16: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli zero, a0, e16, mf4, ta, ma +; CHECK-NEXT: vmflt.vf v0, v8, fa0, v0.t +; CHECK-NEXT: ret + %elt.head = insertelement poison, half %b, i32 0 + %vb = shufflevector %elt.head, poison, zeroinitializer + %v = call @llvm.vp.fcmp.nxv1f16( %vb, %va, metadata !"ogt", %m, i32 %evl) + ret %v +} + +define @fcmp_oge_vv_nxv1f16( %va, %vb, %m, i32 zeroext %evl) { +; CHECK-LABEL: fcmp_oge_vv_nxv1f16: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli zero, a0, e16, mf4, ta, ma +; CHECK-NEXT: vmfle.vv v0, v9, v8, v0.t +; CHECK-NEXT: ret + %v = call @llvm.vp.fcmp.nxv1f16( %va, %vb, metadata !"oge", %m, i32 %evl) + ret %v +} + +define @fcmp_oge_vf_nxv1f16( %va, half %b, %m, i32 zeroext %evl) { +; CHECK-LABEL: fcmp_oge_vf_nxv1f16: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli zero, a0, e16, mf4, ta, ma +; CHECK-NEXT: vmfge.vf v0, v8, fa0, v0.t +; CHECK-NEXT: ret + %elt.head = insertelement poison, half %b, i32 0 + %vb = shufflevector %elt.head, poison, zeroinitializer + %v = call @llvm.vp.fcmp.nxv1f16( %va, %vb, metadata !"oge", %m, i32 %evl) + ret %v +} + +define @fcmp_oge_vf_swap_nxv1f16( %va, half %b, %m, i32 zeroext %evl) { +; CHECK-LABEL: fcmp_oge_vf_swap_nxv1f16: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli zero, a0, e16, mf4, ta, ma +; CHECK-NEXT: vmfle.vf v0, v8, fa0, v0.t +; CHECK-NEXT: ret + %elt.head = insertelement poison, half %b, i32 0 + %vb = shufflevector %elt.head, poison, zeroinitializer + %v = call @llvm.vp.fcmp.nxv1f16( %vb, %va, metadata !"oge", %m, i32 %evl) + ret %v +} + +define @fcmp_olt_vv_nxv1f16( %va, %vb, %m, i32 zeroext %evl) { +; CHECK-LABEL: fcmp_olt_vv_nxv1f16: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli zero, a0, e16, mf4, ta, ma +; CHECK-NEXT: vmflt.vv v0, v8, v9, v0.t +; CHECK-NEXT: ret + %v = call @llvm.vp.fcmp.nxv1f16( %va, %vb, metadata !"olt", %m, i32 %evl) + ret %v +} + +define @fcmp_olt_vf_nxv1f16( %va, half %b, %m, i32 zeroext %evl) { +; CHECK-LABEL: fcmp_olt_vf_nxv1f16: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli zero, a0, e16, mf4, ta, ma +; CHECK-NEXT: vmflt.vf v0, v8, fa0, v0.t +; CHECK-NEXT: ret + %elt.head = insertelement poison, half %b, i32 0 + %vb = shufflevector %elt.head, poison, zeroinitializer + %v = call @llvm.vp.fcmp.nxv1f16( %va, %vb, metadata !"olt", %m, i32 %evl) + ret %v +} + +define @fcmp_olt_vf_swap_nxv1f16( %va, half %b, %m, i32 zeroext %evl) { +; CHECK-LABEL: fcmp_olt_vf_swap_nxv1f16: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli zero, a0, e16, mf4, ta, ma +; CHECK-NEXT: vmfgt.vf v0, v8, fa0, v0.t +; CHECK-NEXT: ret + %elt.head = insertelement poison, half %b, i32 0 + %vb = shufflevector %elt.head, poison, zeroinitializer + %v = call @llvm.vp.fcmp.nxv1f16( %vb, %va, metadata !"olt", %m, i32 %evl) + ret %v +} + +define @fcmp_ole_vv_nxv1f16( %va, %vb, %m, i32 zeroext %evl) { +; CHECK-LABEL: fcmp_ole_vv_nxv1f16: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli zero, a0, e16, mf4, ta, ma +; CHECK-NEXT: vmfle.vv v0, v8, v9, v0.t +; CHECK-NEXT: ret + %v = call @llvm.vp.fcmp.nxv1f16( %va, %vb, metadata !"ole", %m, i32 %evl) + ret %v +} + +define @fcmp_ole_vf_nxv1f16( %va, half %b, %m, i32 zeroext %evl) { +; CHECK-LABEL: fcmp_ole_vf_nxv1f16: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli zero, a0, e16, mf4, ta, ma +; CHECK-NEXT: vmfle.vf v0, v8, fa0, v0.t +; CHECK-NEXT: ret + %elt.head = insertelement poison, half %b, i32 0 + %vb = shufflevector %elt.head, poison, zeroinitializer + %v = call @llvm.vp.fcmp.nxv1f16( %va, %vb, metadata !"ole", %m, i32 %evl) + ret %v +} + +define @fcmp_ole_vf_swap_nxv1f16( %va, half %b, %m, i32 zeroext %evl) { +; CHECK-LABEL: fcmp_ole_vf_swap_nxv1f16: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli zero, a0, e16, mf4, ta, ma +; CHECK-NEXT: vmfge.vf v0, v8, fa0, v0.t +; CHECK-NEXT: ret + %elt.head = insertelement poison, half %b, i32 0 + %vb = shufflevector %elt.head, poison, zeroinitializer + %v = call @llvm.vp.fcmp.nxv1f16( %vb, %va, metadata !"ole", %m, i32 %evl) + ret %v +} + +define @fcmp_one_vv_nxv1f16( %va, %vb, %m, i32 zeroext %evl) { +; CHECK-LABEL: fcmp_one_vv_nxv1f16: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli zero, a0, e16, mf4, ta, ma +; CHECK-NEXT: vmflt.vv v10, v8, v9, v0.t +; CHECK-NEXT: vmflt.vv v8, v9, v8, v0.t +; CHECK-NEXT: vsetvli zero, zero, e8, mf8, ta, mu +; CHECK-NEXT: vmor.mm v0, v8, v10 +; CHECK-NEXT: ret + %v = call @llvm.vp.fcmp.nxv1f16( %va, %vb, metadata !"one", %m, i32 %evl) + ret %v +} + +define @fcmp_one_vf_nxv1f16( %va, half %b, %m, i32 zeroext %evl) { +; CHECK-LABEL: fcmp_one_vf_nxv1f16: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli zero, a0, e16, mf4, ta, ma +; CHECK-NEXT: vmflt.vf v9, v8, fa0, v0.t +; CHECK-NEXT: vmfgt.vf v8, v8, fa0, v0.t +; CHECK-NEXT: vsetvli zero, zero, e8, mf8, ta, mu +; CHECK-NEXT: vmor.mm v0, v8, v9 +; CHECK-NEXT: ret + %elt.head = insertelement poison, half %b, i32 0 + %vb = shufflevector %elt.head, poison, zeroinitializer + %v = call @llvm.vp.fcmp.nxv1f16( %va, %vb, metadata !"one", %m, i32 %evl) + ret %v +} + +define @fcmp_one_vf_swap_nxv1f16( %va, half %b, %m, i32 zeroext %evl) { +; CHECK-LABEL: fcmp_one_vf_swap_nxv1f16: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli zero, a0, e16, mf4, ta, ma +; CHECK-NEXT: vmfgt.vf v9, v8, fa0, v0.t +; CHECK-NEXT: vmflt.vf v8, v8, fa0, v0.t +; CHECK-NEXT: vsetvli zero, zero, e8, mf8, ta, mu +; CHECK-NEXT: vmor.mm v0, v8, v9 +; CHECK-NEXT: ret + %elt.head = insertelement poison, half %b, i32 0 + %vb = shufflevector %elt.head, poison, zeroinitializer + %v = call @llvm.vp.fcmp.nxv1f16( %vb, %va, metadata !"one", %m, i32 %evl) + ret %v +} + +define @fcmp_ord_vv_nxv1f16( %va, %vb, %m, i32 zeroext %evl) { +; CHECK-LABEL: fcmp_ord_vv_nxv1f16: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli zero, a0, e16, mf4, ta, ma +; CHECK-NEXT: vmfeq.vv v9, v9, v9, v0.t +; CHECK-NEXT: vmfeq.vv v8, v8, v8, v0.t +; CHECK-NEXT: vsetvli zero, zero, e8, mf8, ta, mu +; CHECK-NEXT: vmand.mm v0, v8, v9 +; CHECK-NEXT: ret + %v = call @llvm.vp.fcmp.nxv1f16( %va, %vb, metadata !"ord", %m, i32 %evl) + ret %v +} + +define @fcmp_ord_vf_nxv1f16( %va, half %b, %m, i32 zeroext %evl) { +; CHECK-LABEL: fcmp_ord_vf_nxv1f16: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a1, zero, e16, mf4, ta, mu +; CHECK-NEXT: vfmv.v.f v9, fa0 +; CHECK-NEXT: vsetvli zero, a0, e16, mf4, ta, ma +; CHECK-NEXT: vmfeq.vf v9, v9, fa0, v0.t +; CHECK-NEXT: vmfeq.vv v8, v8, v8, v0.t +; CHECK-NEXT: vsetvli zero, zero, e8, mf8, ta, mu +; CHECK-NEXT: vmand.mm v0, v8, v9 +; CHECK-NEXT: ret + %elt.head = insertelement poison, half %b, i32 0 + %vb = shufflevector %elt.head, poison, zeroinitializer + %v = call @llvm.vp.fcmp.nxv1f16( %va, %vb, metadata !"ord", %m, i32 %evl) + ret %v +} + +define @fcmp_ord_vf_swap_nxv1f16( %va, half %b, %m, i32 zeroext %evl) { +; CHECK-LABEL: fcmp_ord_vf_swap_nxv1f16: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a1, zero, e16, mf4, ta, mu +; CHECK-NEXT: vfmv.v.f v9, fa0 +; CHECK-NEXT: vsetvli zero, a0, e16, mf4, ta, ma +; CHECK-NEXT: vmfeq.vf v9, v9, fa0, v0.t +; CHECK-NEXT: vmfeq.vv v8, v8, v8, v0.t +; CHECK-NEXT: vsetvli zero, zero, e8, mf8, ta, mu +; CHECK-NEXT: vmand.mm v0, v9, v8 +; CHECK-NEXT: ret + %elt.head = insertelement poison, half %b, i32 0 + %vb = shufflevector %elt.head, poison, zeroinitializer + %v = call @llvm.vp.fcmp.nxv1f16( %vb, %va, metadata !"ord", %m, i32 %evl) + ret %v +} + +define @fcmp_ueq_vv_nxv1f16( %va, %vb, %m, i32 zeroext %evl) { +; CHECK-LABEL: fcmp_ueq_vv_nxv1f16: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli zero, a0, e16, mf4, ta, ma +; CHECK-NEXT: vmflt.vv v10, v8, v9, v0.t +; CHECK-NEXT: vmflt.vv v8, v9, v8, v0.t +; CHECK-NEXT: vsetvli zero, zero, e8, mf8, ta, mu +; CHECK-NEXT: vmnor.mm v0, v8, v10 +; CHECK-NEXT: ret + %v = call @llvm.vp.fcmp.nxv1f16( %va, %vb, metadata !"ueq", %m, i32 %evl) + ret %v +} + +define @fcmp_ueq_vf_nxv1f16( %va, half %b, %m, i32 zeroext %evl) { +; CHECK-LABEL: fcmp_ueq_vf_nxv1f16: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli zero, a0, e16, mf4, ta, ma +; CHECK-NEXT: vmflt.vf v9, v8, fa0, v0.t +; CHECK-NEXT: vmfgt.vf v8, v8, fa0, v0.t +; CHECK-NEXT: vsetvli zero, zero, e8, mf8, ta, mu +; CHECK-NEXT: vmnor.mm v0, v8, v9 +; CHECK-NEXT: ret + %elt.head = insertelement poison, half %b, i32 0 + %vb = shufflevector %elt.head, poison, zeroinitializer + %v = call @llvm.vp.fcmp.nxv1f16( %va, %vb, metadata !"ueq", %m, i32 %evl) + ret %v +} + +define @fcmp_ueq_vf_swap_nxv1f16( %va, half %b, %m, i32 zeroext %evl) { +; CHECK-LABEL: fcmp_ueq_vf_swap_nxv1f16: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli zero, a0, e16, mf4, ta, ma +; CHECK-NEXT: vmfgt.vf v9, v8, fa0, v0.t +; CHECK-NEXT: vmflt.vf v8, v8, fa0, v0.t +; CHECK-NEXT: vsetvli zero, zero, e8, mf8, ta, mu +; CHECK-NEXT: vmnor.mm v0, v8, v9 +; CHECK-NEXT: ret + %elt.head = insertelement poison, half %b, i32 0 + %vb = shufflevector %elt.head, poison, zeroinitializer + %v = call @llvm.vp.fcmp.nxv1f16( %vb, %va, metadata !"ueq", %m, i32 %evl) + ret %v +} + +define @fcmp_ugt_vv_nxv1f16( %va, %vb, %m, i32 zeroext %evl) { +; CHECK-LABEL: fcmp_ugt_vv_nxv1f16: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli zero, a0, e16, mf4, ta, ma +; CHECK-NEXT: vmfle.vv v8, v8, v9, v0.t +; CHECK-NEXT: vsetvli zero, zero, e8, mf8, ta, mu +; CHECK-NEXT: vmnand.mm v0, v8, v8 +; CHECK-NEXT: ret + %v = call @llvm.vp.fcmp.nxv1f16( %va, %vb, metadata !"ugt", %m, i32 %evl) + ret %v +} + +define @fcmp_ugt_vf_nxv1f16( %va, half %b, %m, i32 zeroext %evl) { +; CHECK-LABEL: fcmp_ugt_vf_nxv1f16: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli zero, a0, e16, mf4, ta, ma +; CHECK-NEXT: vmfle.vf v8, v8, fa0, v0.t +; CHECK-NEXT: vsetvli zero, zero, e8, mf8, ta, mu +; CHECK-NEXT: vmnand.mm v0, v8, v8 +; CHECK-NEXT: ret + %elt.head = insertelement poison, half %b, i32 0 + %vb = shufflevector %elt.head, poison, zeroinitializer + %v = call @llvm.vp.fcmp.nxv1f16( %va, %vb, metadata !"ugt", %m, i32 %evl) + ret %v +} + +define @fcmp_ugt_vf_swap_nxv1f16( %va, half %b, %m, i32 zeroext %evl) { +; CHECK-LABEL: fcmp_ugt_vf_swap_nxv1f16: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli zero, a0, e16, mf4, ta, ma +; CHECK-NEXT: vmfge.vf v8, v8, fa0, v0.t +; CHECK-NEXT: vsetvli zero, zero, e8, mf8, ta, mu +; CHECK-NEXT: vmnand.mm v0, v8, v8 +; CHECK-NEXT: ret + %elt.head = insertelement poison, half %b, i32 0 + %vb = shufflevector %elt.head, poison, zeroinitializer + %v = call @llvm.vp.fcmp.nxv1f16( %vb, %va, metadata !"ugt", %m, i32 %evl) + ret %v +} + +define @fcmp_uge_vv_nxv1f16( %va, %vb, %m, i32 zeroext %evl) { +; CHECK-LABEL: fcmp_uge_vv_nxv1f16: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli zero, a0, e16, mf4, ta, ma +; CHECK-NEXT: vmflt.vv v8, v8, v9, v0.t +; CHECK-NEXT: vsetvli zero, zero, e8, mf8, ta, mu +; CHECK-NEXT: vmnand.mm v0, v8, v8 +; CHECK-NEXT: ret + %v = call @llvm.vp.fcmp.nxv1f16( %va, %vb, metadata !"uge", %m, i32 %evl) + ret %v +} + +define @fcmp_uge_vf_nxv1f16( %va, half %b, %m, i32 zeroext %evl) { +; CHECK-LABEL: fcmp_uge_vf_nxv1f16: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli zero, a0, e16, mf4, ta, ma +; CHECK-NEXT: vmflt.vf v8, v8, fa0, v0.t +; CHECK-NEXT: vsetvli zero, zero, e8, mf8, ta, mu +; CHECK-NEXT: vmnand.mm v0, v8, v8 +; CHECK-NEXT: ret + %elt.head = insertelement poison, half %b, i32 0 + %vb = shufflevector %elt.head, poison, zeroinitializer + %v = call @llvm.vp.fcmp.nxv1f16( %va, %vb, metadata !"uge", %m, i32 %evl) + ret %v +} + +define @fcmp_uge_vf_swap_nxv1f16( %va, half %b, %m, i32 zeroext %evl) { +; CHECK-LABEL: fcmp_uge_vf_swap_nxv1f16: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli zero, a0, e16, mf4, ta, ma +; CHECK-NEXT: vmfgt.vf v8, v8, fa0, v0.t +; CHECK-NEXT: vsetvli zero, zero, e8, mf8, ta, mu +; CHECK-NEXT: vmnand.mm v0, v8, v8 +; CHECK-NEXT: ret + %elt.head = insertelement poison, half %b, i32 0 + %vb = shufflevector %elt.head, poison, zeroinitializer + %v = call @llvm.vp.fcmp.nxv1f16( %vb, %va, metadata !"uge", %m, i32 %evl) + ret %v +} + +define @fcmp_ult_vv_nxv1f16( %va, %vb, %m, i32 zeroext %evl) { +; CHECK-LABEL: fcmp_ult_vv_nxv1f16: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli zero, a0, e16, mf4, ta, ma +; CHECK-NEXT: vmfle.vv v8, v9, v8, v0.t +; CHECK-NEXT: vsetvli zero, zero, e8, mf8, ta, mu +; CHECK-NEXT: vmnand.mm v0, v8, v8 +; CHECK-NEXT: ret + %v = call @llvm.vp.fcmp.nxv1f16( %va, %vb, metadata !"ult", %m, i32 %evl) + ret %v +} + +define @fcmp_ult_vf_nxv1f16( %va, half %b, %m, i32 zeroext %evl) { +; CHECK-LABEL: fcmp_ult_vf_nxv1f16: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli zero, a0, e16, mf4, ta, ma +; CHECK-NEXT: vmfge.vf v8, v8, fa0, v0.t +; CHECK-NEXT: vsetvli zero, zero, e8, mf8, ta, mu +; CHECK-NEXT: vmnand.mm v0, v8, v8 +; CHECK-NEXT: ret + %elt.head = insertelement poison, half %b, i32 0 + %vb = shufflevector %elt.head, poison, zeroinitializer + %v = call @llvm.vp.fcmp.nxv1f16( %va, %vb, metadata !"ult", %m, i32 %evl) + ret %v +} + +define @fcmp_ult_vf_swap_nxv1f16( %va, half %b, %m, i32 zeroext %evl) { +; CHECK-LABEL: fcmp_ult_vf_swap_nxv1f16: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli zero, a0, e16, mf4, ta, ma +; CHECK-NEXT: vmfle.vf v8, v8, fa0, v0.t +; CHECK-NEXT: vsetvli zero, zero, e8, mf8, ta, mu +; CHECK-NEXT: vmnand.mm v0, v8, v8 +; CHECK-NEXT: ret + %elt.head = insertelement poison, half %b, i32 0 + %vb = shufflevector %elt.head, poison, zeroinitializer + %v = call @llvm.vp.fcmp.nxv1f16( %vb, %va, metadata !"ult", %m, i32 %evl) + ret %v +} + +define @fcmp_ule_vv_nxv1f16( %va, %vb, %m, i32 zeroext %evl) { +; CHECK-LABEL: fcmp_ule_vv_nxv1f16: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli zero, a0, e16, mf4, ta, ma +; CHECK-NEXT: vmflt.vv v8, v9, v8, v0.t +; CHECK-NEXT: vsetvli zero, zero, e8, mf8, ta, mu +; CHECK-NEXT: vmnand.mm v0, v8, v8 +; CHECK-NEXT: ret + %v = call @llvm.vp.fcmp.nxv1f16( %va, %vb, metadata !"ule", %m, i32 %evl) + ret %v +} + +define @fcmp_ule_vf_nxv1f16( %va, half %b, %m, i32 zeroext %evl) { +; CHECK-LABEL: fcmp_ule_vf_nxv1f16: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli zero, a0, e16, mf4, ta, ma +; CHECK-NEXT: vmfgt.vf v8, v8, fa0, v0.t +; CHECK-NEXT: vsetvli zero, zero, e8, mf8, ta, mu +; CHECK-NEXT: vmnand.mm v0, v8, v8 +; CHECK-NEXT: ret + %elt.head = insertelement poison, half %b, i32 0 + %vb = shufflevector %elt.head, poison, zeroinitializer + %v = call @llvm.vp.fcmp.nxv1f16( %va, %vb, metadata !"ule", %m, i32 %evl) + ret %v +} + +define @fcmp_ule_vf_swap_nxv1f16( %va, half %b, %m, i32 zeroext %evl) { +; CHECK-LABEL: fcmp_ule_vf_swap_nxv1f16: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli zero, a0, e16, mf4, ta, ma +; CHECK-NEXT: vmflt.vf v8, v8, fa0, v0.t +; CHECK-NEXT: vsetvli zero, zero, e8, mf8, ta, mu +; CHECK-NEXT: vmnand.mm v0, v8, v8 +; CHECK-NEXT: ret + %elt.head = insertelement poison, half %b, i32 0 + %vb = shufflevector %elt.head, poison, zeroinitializer + %v = call @llvm.vp.fcmp.nxv1f16( %vb, %va, metadata !"ule", %m, i32 %evl) + ret %v +} + +define @fcmp_une_vv_nxv1f16( %va, %vb, %m, i32 zeroext %evl) { +; CHECK-LABEL: fcmp_une_vv_nxv1f16: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli zero, a0, e16, mf4, ta, ma +; CHECK-NEXT: vmfne.vv v0, v8, v9, v0.t +; CHECK-NEXT: ret + %v = call @llvm.vp.fcmp.nxv1f16( %va, %vb, metadata !"une", %m, i32 %evl) + ret %v +} + +define @fcmp_une_vf_nxv1f16( %va, half %b, %m, i32 zeroext %evl) { +; CHECK-LABEL: fcmp_une_vf_nxv1f16: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli zero, a0, e16, mf4, ta, ma +; CHECK-NEXT: vmfne.vf v0, v8, fa0, v0.t +; CHECK-NEXT: ret + %elt.head = insertelement poison, half %b, i32 0 + %vb = shufflevector %elt.head, poison, zeroinitializer + %v = call @llvm.vp.fcmp.nxv1f16( %va, %vb, metadata !"une", %m, i32 %evl) + ret %v +} + +define @fcmp_une_vf_swap_nxv1f16( %va, half %b, %m, i32 zeroext %evl) { +; CHECK-LABEL: fcmp_une_vf_swap_nxv1f16: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli zero, a0, e16, mf4, ta, ma +; CHECK-NEXT: vmfne.vf v0, v8, fa0, v0.t +; CHECK-NEXT: ret + %elt.head = insertelement poison, half %b, i32 0 + %vb = shufflevector %elt.head, poison, zeroinitializer + %v = call @llvm.vp.fcmp.nxv1f16( %vb, %va, metadata !"une", %m, i32 %evl) + ret %v +} + +define @fcmp_uno_vv_nxv1f16( %va, %vb, %m, i32 zeroext %evl) { +; CHECK-LABEL: fcmp_uno_vv_nxv1f16: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli zero, a0, e16, mf4, ta, ma +; CHECK-NEXT: vmfne.vv v9, v9, v9, v0.t +; CHECK-NEXT: vmfne.vv v8, v8, v8, v0.t +; CHECK-NEXT: vsetvli zero, zero, e8, mf8, ta, mu +; CHECK-NEXT: vmor.mm v0, v8, v9 +; CHECK-NEXT: ret + %v = call @llvm.vp.fcmp.nxv1f16( %va, %vb, metadata !"uno", %m, i32 %evl) + ret %v +} + +define @fcmp_uno_vf_nxv1f16( %va, half %b, %m, i32 zeroext %evl) { +; CHECK-LABEL: fcmp_uno_vf_nxv1f16: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a1, zero, e16, mf4, ta, mu +; CHECK-NEXT: vfmv.v.f v9, fa0 +; CHECK-NEXT: vsetvli zero, a0, e16, mf4, ta, ma +; CHECK-NEXT: vmfne.vf v9, v9, fa0, v0.t +; CHECK-NEXT: vmfne.vv v8, v8, v8, v0.t +; CHECK-NEXT: vsetvli zero, zero, e8, mf8, ta, mu +; CHECK-NEXT: vmor.mm v0, v8, v9 +; CHECK-NEXT: ret + %elt.head = insertelement poison, half %b, i32 0 + %vb = shufflevector %elt.head, poison, zeroinitializer + %v = call @llvm.vp.fcmp.nxv1f16( %va, %vb, metadata !"uno", %m, i32 %evl) + ret %v +} + +define @fcmp_uno_vf_swap_nxv1f16( %va, half %b, %m, i32 zeroext %evl) { +; CHECK-LABEL: fcmp_uno_vf_swap_nxv1f16: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a1, zero, e16, mf4, ta, mu +; CHECK-NEXT: vfmv.v.f v9, fa0 +; CHECK-NEXT: vsetvli zero, a0, e16, mf4, ta, ma +; CHECK-NEXT: vmfne.vf v9, v9, fa0, v0.t +; CHECK-NEXT: vmfne.vv v8, v8, v8, v0.t +; CHECK-NEXT: vsetvli zero, zero, e8, mf8, ta, mu +; CHECK-NEXT: vmor.mm v0, v9, v8 +; CHECK-NEXT: ret + %elt.head = insertelement poison, half %b, i32 0 + %vb = shufflevector %elt.head, poison, zeroinitializer + %v = call @llvm.vp.fcmp.nxv1f16( %vb, %va, metadata !"uno", %m, i32 %evl) + ret %v +} + +declare @llvm.vp.fcmp.nxv8f16(, , metadata, , i32) + +define @fcmp_oeq_vv_nxv8f16( %va, %vb, %m, i32 zeroext %evl) { +; CHECK-LABEL: fcmp_oeq_vv_nxv8f16: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli zero, a0, e16, m2, ta, ma +; CHECK-NEXT: vmfeq.vv v12, v8, v10, v0.t +; CHECK-NEXT: vmv1r.v v0, v12 +; CHECK-NEXT: ret + %v = call @llvm.vp.fcmp.nxv8f16( %va, %vb, metadata !"oeq", %m, i32 %evl) + ret %v +} + +define @fcmp_oeq_vf_nxv8f16( %va, half %b, %m, i32 zeroext %evl) { +; CHECK-LABEL: fcmp_oeq_vf_nxv8f16: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli zero, a0, e16, m2, ta, ma +; CHECK-NEXT: vmfeq.vf v10, v8, fa0, v0.t +; CHECK-NEXT: vmv1r.v v0, v10 +; CHECK-NEXT: ret + %elt.head = insertelement poison, half %b, i32 0 + %vb = shufflevector %elt.head, poison, zeroinitializer + %v = call @llvm.vp.fcmp.nxv8f16( %va, %vb, metadata !"oeq", %m, i32 %evl) + ret %v +} + +define @fcmp_oeq_vf_swap_nxv8f16( %va, half %b, %m, i32 zeroext %evl) { +; CHECK-LABEL: fcmp_oeq_vf_swap_nxv8f16: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli zero, a0, e16, m2, ta, ma +; CHECK-NEXT: vmfeq.vf v10, v8, fa0, v0.t +; CHECK-NEXT: vmv1r.v v0, v10 +; CHECK-NEXT: ret + %elt.head = insertelement poison, half %b, i32 0 + %vb = shufflevector %elt.head, poison, zeroinitializer + %v = call @llvm.vp.fcmp.nxv8f16( %vb, %va, metadata !"oeq", %m, i32 %evl) + ret %v +} + +define @fcmp_ogt_vv_nxv8f16( %va, %vb, %m, i32 zeroext %evl) { +; CHECK-LABEL: fcmp_ogt_vv_nxv8f16: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli zero, a0, e16, m2, ta, ma +; CHECK-NEXT: vmflt.vv v12, v10, v8, v0.t +; CHECK-NEXT: vmv1r.v v0, v12 +; CHECK-NEXT: ret + %v = call @llvm.vp.fcmp.nxv8f16( %va, %vb, metadata !"ogt", %m, i32 %evl) + ret %v +} + +define @fcmp_ogt_vf_nxv8f16( %va, half %b, %m, i32 zeroext %evl) { +; CHECK-LABEL: fcmp_ogt_vf_nxv8f16: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli zero, a0, e16, m2, ta, ma +; CHECK-NEXT: vmfgt.vf v10, v8, fa0, v0.t +; CHECK-NEXT: vmv1r.v v0, v10 +; CHECK-NEXT: ret + %elt.head = insertelement poison, half %b, i32 0 + %vb = shufflevector %elt.head, poison, zeroinitializer + %v = call @llvm.vp.fcmp.nxv8f16( %va, %vb, metadata !"ogt", %m, i32 %evl) + ret %v +} + +define @fcmp_ogt_vf_swap_nxv8f16( %va, half %b, %m, i32 zeroext %evl) { +; CHECK-LABEL: fcmp_ogt_vf_swap_nxv8f16: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli zero, a0, e16, m2, ta, ma +; CHECK-NEXT: vmflt.vf v10, v8, fa0, v0.t +; CHECK-NEXT: vmv1r.v v0, v10 +; CHECK-NEXT: ret + %elt.head = insertelement poison, half %b, i32 0 + %vb = shufflevector %elt.head, poison, zeroinitializer + %v = call @llvm.vp.fcmp.nxv8f16( %vb, %va, metadata !"ogt", %m, i32 %evl) + ret %v +} + +define @fcmp_oge_vv_nxv8f16( %va, %vb, %m, i32 zeroext %evl) { +; CHECK-LABEL: fcmp_oge_vv_nxv8f16: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli zero, a0, e16, m2, ta, ma +; CHECK-NEXT: vmfle.vv v12, v10, v8, v0.t +; CHECK-NEXT: vmv1r.v v0, v12 +; CHECK-NEXT: ret + %v = call @llvm.vp.fcmp.nxv8f16( %va, %vb, metadata !"oge", %m, i32 %evl) + ret %v +} + +define @fcmp_oge_vf_nxv8f16( %va, half %b, %m, i32 zeroext %evl) { +; CHECK-LABEL: fcmp_oge_vf_nxv8f16: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli zero, a0, e16, m2, ta, ma +; CHECK-NEXT: vmfge.vf v10, v8, fa0, v0.t +; CHECK-NEXT: vmv1r.v v0, v10 +; CHECK-NEXT: ret + %elt.head = insertelement poison, half %b, i32 0 + %vb = shufflevector %elt.head, poison, zeroinitializer + %v = call @llvm.vp.fcmp.nxv8f16( %va, %vb, metadata !"oge", %m, i32 %evl) + ret %v +} + +define @fcmp_oge_vf_swap_nxv8f16( %va, half %b, %m, i32 zeroext %evl) { +; CHECK-LABEL: fcmp_oge_vf_swap_nxv8f16: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli zero, a0, e16, m2, ta, ma +; CHECK-NEXT: vmfle.vf v10, v8, fa0, v0.t +; CHECK-NEXT: vmv1r.v v0, v10 +; CHECK-NEXT: ret + %elt.head = insertelement poison, half %b, i32 0 + %vb = shufflevector %elt.head, poison, zeroinitializer + %v = call @llvm.vp.fcmp.nxv8f16( %vb, %va, metadata !"oge", %m, i32 %evl) + ret %v +} + +define @fcmp_olt_vv_nxv8f16( %va, %vb, %m, i32 zeroext %evl) { +; CHECK-LABEL: fcmp_olt_vv_nxv8f16: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli zero, a0, e16, m2, ta, ma +; CHECK-NEXT: vmflt.vv v12, v8, v10, v0.t +; CHECK-NEXT: vmv1r.v v0, v12 +; CHECK-NEXT: ret + %v = call @llvm.vp.fcmp.nxv8f16( %va, %vb, metadata !"olt", %m, i32 %evl) + ret %v +} + +define @fcmp_olt_vf_nxv8f16( %va, half %b, %m, i32 zeroext %evl) { +; CHECK-LABEL: fcmp_olt_vf_nxv8f16: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli zero, a0, e16, m2, ta, ma +; CHECK-NEXT: vmflt.vf v10, v8, fa0, v0.t +; CHECK-NEXT: vmv1r.v v0, v10 +; CHECK-NEXT: ret + %elt.head = insertelement poison, half %b, i32 0 + %vb = shufflevector %elt.head, poison, zeroinitializer + %v = call @llvm.vp.fcmp.nxv8f16( %va, %vb, metadata !"olt", %m, i32 %evl) + ret %v +} + +define @fcmp_olt_vf_swap_nxv8f16( %va, half %b, %m, i32 zeroext %evl) { +; CHECK-LABEL: fcmp_olt_vf_swap_nxv8f16: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli zero, a0, e16, m2, ta, ma +; CHECK-NEXT: vmfgt.vf v10, v8, fa0, v0.t +; CHECK-NEXT: vmv1r.v v0, v10 +; CHECK-NEXT: ret + %elt.head = insertelement poison, half %b, i32 0 + %vb = shufflevector %elt.head, poison, zeroinitializer + %v = call @llvm.vp.fcmp.nxv8f16( %vb, %va, metadata !"olt", %m, i32 %evl) + ret %v +} + +define @fcmp_ole_vv_nxv8f16( %va, %vb, %m, i32 zeroext %evl) { +; CHECK-LABEL: fcmp_ole_vv_nxv8f16: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli zero, a0, e16, m2, ta, ma +; CHECK-NEXT: vmfle.vv v12, v8, v10, v0.t +; CHECK-NEXT: vmv1r.v v0, v12 +; CHECK-NEXT: ret + %v = call @llvm.vp.fcmp.nxv8f16( %va, %vb, metadata !"ole", %m, i32 %evl) + ret %v +} + +define @fcmp_ole_vf_nxv8f16( %va, half %b, %m, i32 zeroext %evl) { +; CHECK-LABEL: fcmp_ole_vf_nxv8f16: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli zero, a0, e16, m2, ta, ma +; CHECK-NEXT: vmfle.vf v10, v8, fa0, v0.t +; CHECK-NEXT: vmv1r.v v0, v10 +; CHECK-NEXT: ret + %elt.head = insertelement poison, half %b, i32 0 + %vb = shufflevector %elt.head, poison, zeroinitializer + %v = call @llvm.vp.fcmp.nxv8f16( %va, %vb, metadata !"ole", %m, i32 %evl) + ret %v +} + +define @fcmp_ole_vf_swap_nxv8f16( %va, half %b, %m, i32 zeroext %evl) { +; CHECK-LABEL: fcmp_ole_vf_swap_nxv8f16: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli zero, a0, e16, m2, ta, ma +; CHECK-NEXT: vmfge.vf v10, v8, fa0, v0.t +; CHECK-NEXT: vmv1r.v v0, v10 +; CHECK-NEXT: ret + %elt.head = insertelement poison, half %b, i32 0 + %vb = shufflevector %elt.head, poison, zeroinitializer + %v = call @llvm.vp.fcmp.nxv8f16( %vb, %va, metadata !"ole", %m, i32 %evl) + ret %v +} + +define @fcmp_one_vv_nxv8f16( %va, %vb, %m, i32 zeroext %evl) { +; CHECK-LABEL: fcmp_one_vv_nxv8f16: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli zero, a0, e16, m2, ta, ma +; CHECK-NEXT: vmflt.vv v12, v8, v10, v0.t +; CHECK-NEXT: vmflt.vv v13, v10, v8, v0.t +; CHECK-NEXT: vsetvli zero, zero, e8, m1, ta, mu +; CHECK-NEXT: vmor.mm v0, v13, v12 +; CHECK-NEXT: ret + %v = call @llvm.vp.fcmp.nxv8f16( %va, %vb, metadata !"one", %m, i32 %evl) + ret %v +} + +define @fcmp_one_vf_nxv8f16( %va, half %b, %m, i32 zeroext %evl) { +; CHECK-LABEL: fcmp_one_vf_nxv8f16: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli zero, a0, e16, m2, ta, ma +; CHECK-NEXT: vmflt.vf v10, v8, fa0, v0.t +; CHECK-NEXT: vmfgt.vf v11, v8, fa0, v0.t +; CHECK-NEXT: vsetvli zero, zero, e8, m1, ta, mu +; CHECK-NEXT: vmor.mm v0, v11, v10 +; CHECK-NEXT: ret + %elt.head = insertelement poison, half %b, i32 0 + %vb = shufflevector %elt.head, poison, zeroinitializer + %v = call @llvm.vp.fcmp.nxv8f16( %va, %vb, metadata !"one", %m, i32 %evl) + ret %v +} + +define @fcmp_one_vf_swap_nxv8f16( %va, half %b, %m, i32 zeroext %evl) { +; CHECK-LABEL: fcmp_one_vf_swap_nxv8f16: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli zero, a0, e16, m2, ta, ma +; CHECK-NEXT: vmfgt.vf v10, v8, fa0, v0.t +; CHECK-NEXT: vmflt.vf v11, v8, fa0, v0.t +; CHECK-NEXT: vsetvli zero, zero, e8, m1, ta, mu +; CHECK-NEXT: vmor.mm v0, v11, v10 +; CHECK-NEXT: ret + %elt.head = insertelement poison, half %b, i32 0 + %vb = shufflevector %elt.head, poison, zeroinitializer + %v = call @llvm.vp.fcmp.nxv8f16( %vb, %va, metadata !"one", %m, i32 %evl) + ret %v +} + +define @fcmp_ord_vv_nxv8f16( %va, %vb, %m, i32 zeroext %evl) { +; CHECK-LABEL: fcmp_ord_vv_nxv8f16: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli zero, a0, e16, m2, ta, ma +; CHECK-NEXT: vmfeq.vv v12, v10, v10, v0.t +; CHECK-NEXT: vmfeq.vv v10, v8, v8, v0.t +; CHECK-NEXT: vsetvli zero, zero, e8, m1, ta, mu +; CHECK-NEXT: vmand.mm v0, v10, v12 +; CHECK-NEXT: ret + %v = call @llvm.vp.fcmp.nxv8f16( %va, %vb, metadata !"ord", %m, i32 %evl) + ret %v +} + +define @fcmp_ord_vf_nxv8f16( %va, half %b, %m, i32 zeroext %evl) { +; CHECK-LABEL: fcmp_ord_vf_nxv8f16: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a1, zero, e16, m2, ta, mu +; CHECK-NEXT: vfmv.v.f v10, fa0 +; CHECK-NEXT: vsetvli zero, a0, e16, m2, ta, ma +; CHECK-NEXT: vmfeq.vf v12, v10, fa0, v0.t +; CHECK-NEXT: vmfeq.vv v10, v8, v8, v0.t +; CHECK-NEXT: vsetvli zero, zero, e8, m1, ta, mu +; CHECK-NEXT: vmand.mm v0, v10, v12 +; CHECK-NEXT: ret + %elt.head = insertelement poison, half %b, i32 0 + %vb = shufflevector %elt.head, poison, zeroinitializer + %v = call @llvm.vp.fcmp.nxv8f16( %va, %vb, metadata !"ord", %m, i32 %evl) + ret %v +} + +define @fcmp_ord_vf_swap_nxv8f16( %va, half %b, %m, i32 zeroext %evl) { +; CHECK-LABEL: fcmp_ord_vf_swap_nxv8f16: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a1, zero, e16, m2, ta, mu +; CHECK-NEXT: vfmv.v.f v10, fa0 +; CHECK-NEXT: vsetvli zero, a0, e16, m2, ta, ma +; CHECK-NEXT: vmfeq.vf v12, v10, fa0, v0.t +; CHECK-NEXT: vmfeq.vv v10, v8, v8, v0.t +; CHECK-NEXT: vsetvli zero, zero, e8, m1, ta, mu +; CHECK-NEXT: vmand.mm v0, v12, v10 +; CHECK-NEXT: ret + %elt.head = insertelement poison, half %b, i32 0 + %vb = shufflevector %elt.head, poison, zeroinitializer + %v = call @llvm.vp.fcmp.nxv8f16( %vb, %va, metadata !"ord", %m, i32 %evl) + ret %v +} + +define @fcmp_ueq_vv_nxv8f16( %va, %vb, %m, i32 zeroext %evl) { +; CHECK-LABEL: fcmp_ueq_vv_nxv8f16: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli zero, a0, e16, m2, ta, ma +; CHECK-NEXT: vmflt.vv v12, v8, v10, v0.t +; CHECK-NEXT: vmflt.vv v13, v10, v8, v0.t +; CHECK-NEXT: vsetvli zero, zero, e8, m1, ta, mu +; CHECK-NEXT: vmnor.mm v0, v13, v12 +; CHECK-NEXT: ret + %v = call @llvm.vp.fcmp.nxv8f16( %va, %vb, metadata !"ueq", %m, i32 %evl) + ret %v +} + +define @fcmp_ueq_vf_nxv8f16( %va, half %b, %m, i32 zeroext %evl) { +; CHECK-LABEL: fcmp_ueq_vf_nxv8f16: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli zero, a0, e16, m2, ta, ma +; CHECK-NEXT: vmflt.vf v10, v8, fa0, v0.t +; CHECK-NEXT: vmfgt.vf v11, v8, fa0, v0.t +; CHECK-NEXT: vsetvli zero, zero, e8, m1, ta, mu +; CHECK-NEXT: vmnor.mm v0, v11, v10 +; CHECK-NEXT: ret + %elt.head = insertelement poison, half %b, i32 0 + %vb = shufflevector %elt.head, poison, zeroinitializer + %v = call @llvm.vp.fcmp.nxv8f16( %va, %vb, metadata !"ueq", %m, i32 %evl) + ret %v +} + +define @fcmp_ueq_vf_swap_nxv8f16( %va, half %b, %m, i32 zeroext %evl) { +; CHECK-LABEL: fcmp_ueq_vf_swap_nxv8f16: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli zero, a0, e16, m2, ta, ma +; CHECK-NEXT: vmfgt.vf v10, v8, fa0, v0.t +; CHECK-NEXT: vmflt.vf v11, v8, fa0, v0.t +; CHECK-NEXT: vsetvli zero, zero, e8, m1, ta, mu +; CHECK-NEXT: vmnor.mm v0, v11, v10 +; CHECK-NEXT: ret + %elt.head = insertelement poison, half %b, i32 0 + %vb = shufflevector %elt.head, poison, zeroinitializer + %v = call @llvm.vp.fcmp.nxv8f16( %vb, %va, metadata !"ueq", %m, i32 %evl) + ret %v +} + +define @fcmp_ugt_vv_nxv8f16( %va, %vb, %m, i32 zeroext %evl) { +; CHECK-LABEL: fcmp_ugt_vv_nxv8f16: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli zero, a0, e16, m2, ta, ma +; CHECK-NEXT: vmfle.vv v12, v8, v10, v0.t +; CHECK-NEXT: vsetvli zero, zero, e8, m1, ta, mu +; CHECK-NEXT: vmnand.mm v0, v12, v12 +; CHECK-NEXT: ret + %v = call @llvm.vp.fcmp.nxv8f16( %va, %vb, metadata !"ugt", %m, i32 %evl) + ret %v +} + +define @fcmp_ugt_vf_nxv8f16( %va, half %b, %m, i32 zeroext %evl) { +; CHECK-LABEL: fcmp_ugt_vf_nxv8f16: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli zero, a0, e16, m2, ta, ma +; CHECK-NEXT: vmfle.vf v10, v8, fa0, v0.t +; CHECK-NEXT: vsetvli zero, zero, e8, m1, ta, mu +; CHECK-NEXT: vmnand.mm v0, v10, v10 +; CHECK-NEXT: ret + %elt.head = insertelement poison, half %b, i32 0 + %vb = shufflevector %elt.head, poison, zeroinitializer + %v = call @llvm.vp.fcmp.nxv8f16( %va, %vb, metadata !"ugt", %m, i32 %evl) + ret %v +} + +define @fcmp_ugt_vf_swap_nxv8f16( %va, half %b, %m, i32 zeroext %evl) { +; CHECK-LABEL: fcmp_ugt_vf_swap_nxv8f16: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli zero, a0, e16, m2, ta, ma +; CHECK-NEXT: vmfge.vf v10, v8, fa0, v0.t +; CHECK-NEXT: vsetvli zero, zero, e8, m1, ta, mu +; CHECK-NEXT: vmnand.mm v0, v10, v10 +; CHECK-NEXT: ret + %elt.head = insertelement poison, half %b, i32 0 + %vb = shufflevector %elt.head, poison, zeroinitializer + %v = call @llvm.vp.fcmp.nxv8f16( %vb, %va, metadata !"ugt", %m, i32 %evl) + ret %v +} + +define @fcmp_uge_vv_nxv8f16( %va, %vb, %m, i32 zeroext %evl) { +; CHECK-LABEL: fcmp_uge_vv_nxv8f16: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli zero, a0, e16, m2, ta, ma +; CHECK-NEXT: vmflt.vv v12, v8, v10, v0.t +; CHECK-NEXT: vsetvli zero, zero, e8, m1, ta, mu +; CHECK-NEXT: vmnand.mm v0, v12, v12 +; CHECK-NEXT: ret + %v = call @llvm.vp.fcmp.nxv8f16( %va, %vb, metadata !"uge", %m, i32 %evl) + ret %v +} + +define @fcmp_uge_vf_nxv8f16( %va, half %b, %m, i32 zeroext %evl) { +; CHECK-LABEL: fcmp_uge_vf_nxv8f16: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli zero, a0, e16, m2, ta, ma +; CHECK-NEXT: vmflt.vf v10, v8, fa0, v0.t +; CHECK-NEXT: vsetvli zero, zero, e8, m1, ta, mu +; CHECK-NEXT: vmnand.mm v0, v10, v10 +; CHECK-NEXT: ret + %elt.head = insertelement poison, half %b, i32 0 + %vb = shufflevector %elt.head, poison, zeroinitializer + %v = call @llvm.vp.fcmp.nxv8f16( %va, %vb, metadata !"uge", %m, i32 %evl) + ret %v +} + +define @fcmp_uge_vf_swap_nxv8f16( %va, half %b, %m, i32 zeroext %evl) { +; CHECK-LABEL: fcmp_uge_vf_swap_nxv8f16: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli zero, a0, e16, m2, ta, ma +; CHECK-NEXT: vmfgt.vf v10, v8, fa0, v0.t +; CHECK-NEXT: vsetvli zero, zero, e8, m1, ta, mu +; CHECK-NEXT: vmnand.mm v0, v10, v10 +; CHECK-NEXT: ret + %elt.head = insertelement poison, half %b, i32 0 + %vb = shufflevector %elt.head, poison, zeroinitializer + %v = call @llvm.vp.fcmp.nxv8f16( %vb, %va, metadata !"uge", %m, i32 %evl) + ret %v +} + +define @fcmp_ult_vv_nxv8f16( %va, %vb, %m, i32 zeroext %evl) { +; CHECK-LABEL: fcmp_ult_vv_nxv8f16: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli zero, a0, e16, m2, ta, ma +; CHECK-NEXT: vmfle.vv v12, v10, v8, v0.t +; CHECK-NEXT: vsetvli zero, zero, e8, m1, ta, mu +; CHECK-NEXT: vmnand.mm v0, v12, v12 +; CHECK-NEXT: ret + %v = call @llvm.vp.fcmp.nxv8f16( %va, %vb, metadata !"ult", %m, i32 %evl) + ret %v +} + +define @fcmp_ult_vf_nxv8f16( %va, half %b, %m, i32 zeroext %evl) { +; CHECK-LABEL: fcmp_ult_vf_nxv8f16: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli zero, a0, e16, m2, ta, ma +; CHECK-NEXT: vmfge.vf v10, v8, fa0, v0.t +; CHECK-NEXT: vsetvli zero, zero, e8, m1, ta, mu +; CHECK-NEXT: vmnand.mm v0, v10, v10 +; CHECK-NEXT: ret + %elt.head = insertelement poison, half %b, i32 0 + %vb = shufflevector %elt.head, poison, zeroinitializer + %v = call @llvm.vp.fcmp.nxv8f16( %va, %vb, metadata !"ult", %m, i32 %evl) + ret %v +} + +define @fcmp_ult_vf_swap_nxv8f16( %va, half %b, %m, i32 zeroext %evl) { +; CHECK-LABEL: fcmp_ult_vf_swap_nxv8f16: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli zero, a0, e16, m2, ta, ma +; CHECK-NEXT: vmfle.vf v10, v8, fa0, v0.t +; CHECK-NEXT: vsetvli zero, zero, e8, m1, ta, mu +; CHECK-NEXT: vmnand.mm v0, v10, v10 +; CHECK-NEXT: ret + %elt.head = insertelement poison, half %b, i32 0 + %vb = shufflevector %elt.head, poison, zeroinitializer + %v = call @llvm.vp.fcmp.nxv8f16( %vb, %va, metadata !"ult", %m, i32 %evl) + ret %v +} + +define @fcmp_ule_vv_nxv8f16( %va, %vb, %m, i32 zeroext %evl) { +; CHECK-LABEL: fcmp_ule_vv_nxv8f16: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli zero, a0, e16, m2, ta, ma +; CHECK-NEXT: vmflt.vv v12, v10, v8, v0.t +; CHECK-NEXT: vsetvli zero, zero, e8, m1, ta, mu +; CHECK-NEXT: vmnand.mm v0, v12, v12 +; CHECK-NEXT: ret + %v = call @llvm.vp.fcmp.nxv8f16( %va, %vb, metadata !"ule", %m, i32 %evl) + ret %v +} + +define @fcmp_ule_vf_nxv8f16( %va, half %b, %m, i32 zeroext %evl) { +; CHECK-LABEL: fcmp_ule_vf_nxv8f16: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli zero, a0, e16, m2, ta, ma +; CHECK-NEXT: vmfgt.vf v10, v8, fa0, v0.t +; CHECK-NEXT: vsetvli zero, zero, e8, m1, ta, mu +; CHECK-NEXT: vmnand.mm v0, v10, v10 +; CHECK-NEXT: ret + %elt.head = insertelement poison, half %b, i32 0 + %vb = shufflevector %elt.head, poison, zeroinitializer + %v = call @llvm.vp.fcmp.nxv8f16( %va, %vb, metadata !"ule", %m, i32 %evl) + ret %v +} + +define @fcmp_ule_vf_swap_nxv8f16( %va, half %b, %m, i32 zeroext %evl) { +; CHECK-LABEL: fcmp_ule_vf_swap_nxv8f16: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli zero, a0, e16, m2, ta, ma +; CHECK-NEXT: vmflt.vf v10, v8, fa0, v0.t +; CHECK-NEXT: vsetvli zero, zero, e8, m1, ta, mu +; CHECK-NEXT: vmnand.mm v0, v10, v10 +; CHECK-NEXT: ret + %elt.head = insertelement poison, half %b, i32 0 + %vb = shufflevector %elt.head, poison, zeroinitializer + %v = call @llvm.vp.fcmp.nxv8f16( %vb, %va, metadata !"ule", %m, i32 %evl) + ret %v +} + +define @fcmp_une_vv_nxv8f16( %va, %vb, %m, i32 zeroext %evl) { +; CHECK-LABEL: fcmp_une_vv_nxv8f16: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli zero, a0, e16, m2, ta, ma +; CHECK-NEXT: vmfne.vv v12, v8, v10, v0.t +; CHECK-NEXT: vmv1r.v v0, v12 +; CHECK-NEXT: ret + %v = call @llvm.vp.fcmp.nxv8f16( %va, %vb, metadata !"une", %m, i32 %evl) + ret %v +} + +define @fcmp_une_vf_nxv8f16( %va, half %b, %m, i32 zeroext %evl) { +; CHECK-LABEL: fcmp_une_vf_nxv8f16: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli zero, a0, e16, m2, ta, ma +; CHECK-NEXT: vmfne.vf v10, v8, fa0, v0.t +; CHECK-NEXT: vmv1r.v v0, v10 +; CHECK-NEXT: ret + %elt.head = insertelement poison, half %b, i32 0 + %vb = shufflevector %elt.head, poison, zeroinitializer + %v = call @llvm.vp.fcmp.nxv8f16( %va, %vb, metadata !"une", %m, i32 %evl) + ret %v +} + +define @fcmp_une_vf_swap_nxv8f16( %va, half %b, %m, i32 zeroext %evl) { +; CHECK-LABEL: fcmp_une_vf_swap_nxv8f16: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli zero, a0, e16, m2, ta, ma +; CHECK-NEXT: vmfne.vf v10, v8, fa0, v0.t +; CHECK-NEXT: vmv1r.v v0, v10 +; CHECK-NEXT: ret + %elt.head = insertelement poison, half %b, i32 0 + %vb = shufflevector %elt.head, poison, zeroinitializer + %v = call @llvm.vp.fcmp.nxv8f16( %vb, %va, metadata !"une", %m, i32 %evl) + ret %v +} + +define @fcmp_uno_vv_nxv8f16( %va, %vb, %m, i32 zeroext %evl) { +; CHECK-LABEL: fcmp_uno_vv_nxv8f16: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli zero, a0, e16, m2, ta, ma +; CHECK-NEXT: vmfne.vv v12, v10, v10, v0.t +; CHECK-NEXT: vmfne.vv v10, v8, v8, v0.t +; CHECK-NEXT: vsetvli zero, zero, e8, m1, ta, mu +; CHECK-NEXT: vmor.mm v0, v10, v12 +; CHECK-NEXT: ret + %v = call @llvm.vp.fcmp.nxv8f16( %va, %vb, metadata !"uno", %m, i32 %evl) + ret %v +} + +define @fcmp_uno_vf_nxv8f16( %va, half %b, %m, i32 zeroext %evl) { +; CHECK-LABEL: fcmp_uno_vf_nxv8f16: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a1, zero, e16, m2, ta, mu +; CHECK-NEXT: vfmv.v.f v10, fa0 +; CHECK-NEXT: vsetvli zero, a0, e16, m2, ta, ma +; CHECK-NEXT: vmfne.vf v12, v10, fa0, v0.t +; CHECK-NEXT: vmfne.vv v10, v8, v8, v0.t +; CHECK-NEXT: vsetvli zero, zero, e8, m1, ta, mu +; CHECK-NEXT: vmor.mm v0, v10, v12 +; CHECK-NEXT: ret + %elt.head = insertelement poison, half %b, i32 0 + %vb = shufflevector %elt.head, poison, zeroinitializer + %v = call @llvm.vp.fcmp.nxv8f16( %va, %vb, metadata !"uno", %m, i32 %evl) + ret %v +} + +define @fcmp_uno_vf_swap_nxv8f16( %va, half %b, %m, i32 zeroext %evl) { +; CHECK-LABEL: fcmp_uno_vf_swap_nxv8f16: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a1, zero, e16, m2, ta, mu +; CHECK-NEXT: vfmv.v.f v10, fa0 +; CHECK-NEXT: vsetvli zero, a0, e16, m2, ta, ma +; CHECK-NEXT: vmfne.vf v12, v10, fa0, v0.t +; CHECK-NEXT: vmfne.vv v10, v8, v8, v0.t +; CHECK-NEXT: vsetvli zero, zero, e8, m1, ta, mu +; CHECK-NEXT: vmor.mm v0, v12, v10 +; CHECK-NEXT: ret + %elt.head = insertelement poison, half %b, i32 0 + %vb = shufflevector %elt.head, poison, zeroinitializer + %v = call @llvm.vp.fcmp.nxv8f16( %vb, %va, metadata !"uno", %m, i32 %evl) + ret %v +} + +declare @llvm.vp.fcmp.nxv1f64(, , metadata, , i32) + +define @fcmp_oeq_vv_nxv1f64( %va, %vb, %m, i32 zeroext %evl) { +; CHECK-LABEL: fcmp_oeq_vv_nxv1f64: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli zero, a0, e64, m1, ta, ma +; CHECK-NEXT: vmfeq.vv v0, v8, v9, v0.t +; CHECK-NEXT: ret + %v = call @llvm.vp.fcmp.nxv1f64( %va, %vb, metadata !"oeq", %m, i32 %evl) + ret %v +} + +define @fcmp_oeq_vf_nxv1f64( %va, double %b, %m, i32 zeroext %evl) { +; CHECK-LABEL: fcmp_oeq_vf_nxv1f64: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli zero, a0, e64, m1, ta, ma +; CHECK-NEXT: vmfeq.vf v0, v8, fa0, v0.t +; CHECK-NEXT: ret + %elt.head = insertelement poison, double %b, i32 0 + %vb = shufflevector %elt.head, poison, zeroinitializer + %v = call @llvm.vp.fcmp.nxv1f64( %va, %vb, metadata !"oeq", %m, i32 %evl) + ret %v +} + +define @fcmp_oeq_vf_swap_nxv1f64( %va, double %b, %m, i32 zeroext %evl) { +; CHECK-LABEL: fcmp_oeq_vf_swap_nxv1f64: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli zero, a0, e64, m1, ta, ma +; CHECK-NEXT: vmfeq.vf v0, v8, fa0, v0.t +; CHECK-NEXT: ret + %elt.head = insertelement poison, double %b, i32 0 + %vb = shufflevector %elt.head, poison, zeroinitializer + %v = call @llvm.vp.fcmp.nxv1f64( %vb, %va, metadata !"oeq", %m, i32 %evl) + ret %v +} + +define @fcmp_ogt_vv_nxv1f64( %va, %vb, %m, i32 zeroext %evl) { +; CHECK-LABEL: fcmp_ogt_vv_nxv1f64: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli zero, a0, e64, m1, ta, ma +; CHECK-NEXT: vmflt.vv v0, v9, v8, v0.t +; CHECK-NEXT: ret + %v = call @llvm.vp.fcmp.nxv1f64( %va, %vb, metadata !"ogt", %m, i32 %evl) + ret %v +} + +define @fcmp_ogt_vf_nxv1f64( %va, double %b, %m, i32 zeroext %evl) { +; CHECK-LABEL: fcmp_ogt_vf_nxv1f64: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli zero, a0, e64, m1, ta, ma +; CHECK-NEXT: vmfgt.vf v0, v8, fa0, v0.t +; CHECK-NEXT: ret + %elt.head = insertelement poison, double %b, i32 0 + %vb = shufflevector %elt.head, poison, zeroinitializer + %v = call @llvm.vp.fcmp.nxv1f64( %va, %vb, metadata !"ogt", %m, i32 %evl) + ret %v +} + +define @fcmp_ogt_vf_swap_nxv1f64( %va, double %b, %m, i32 zeroext %evl) { +; CHECK-LABEL: fcmp_ogt_vf_swap_nxv1f64: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli zero, a0, e64, m1, ta, ma +; CHECK-NEXT: vmflt.vf v0, v8, fa0, v0.t +; CHECK-NEXT: ret + %elt.head = insertelement poison, double %b, i32 0 + %vb = shufflevector %elt.head, poison, zeroinitializer + %v = call @llvm.vp.fcmp.nxv1f64( %vb, %va, metadata !"ogt", %m, i32 %evl) + ret %v +} + +define @fcmp_oge_vv_nxv1f64( %va, %vb, %m, i32 zeroext %evl) { +; CHECK-LABEL: fcmp_oge_vv_nxv1f64: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli zero, a0, e64, m1, ta, ma +; CHECK-NEXT: vmfle.vv v0, v9, v8, v0.t +; CHECK-NEXT: ret + %v = call @llvm.vp.fcmp.nxv1f64( %va, %vb, metadata !"oge", %m, i32 %evl) + ret %v +} + +define @fcmp_oge_vf_nxv1f64( %va, double %b, %m, i32 zeroext %evl) { +; CHECK-LABEL: fcmp_oge_vf_nxv1f64: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli zero, a0, e64, m1, ta, ma +; CHECK-NEXT: vmfge.vf v0, v8, fa0, v0.t +; CHECK-NEXT: ret + %elt.head = insertelement poison, double %b, i32 0 + %vb = shufflevector %elt.head, poison, zeroinitializer + %v = call @llvm.vp.fcmp.nxv1f64( %va, %vb, metadata !"oge", %m, i32 %evl) + ret %v +} + +define @fcmp_oge_vf_swap_nxv1f64( %va, double %b, %m, i32 zeroext %evl) { +; CHECK-LABEL: fcmp_oge_vf_swap_nxv1f64: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli zero, a0, e64, m1, ta, ma +; CHECK-NEXT: vmfle.vf v0, v8, fa0, v0.t +; CHECK-NEXT: ret + %elt.head = insertelement poison, double %b, i32 0 + %vb = shufflevector %elt.head, poison, zeroinitializer + %v = call @llvm.vp.fcmp.nxv1f64( %vb, %va, metadata !"oge", %m, i32 %evl) + ret %v +} + +define @fcmp_olt_vv_nxv1f64( %va, %vb, %m, i32 zeroext %evl) { +; CHECK-LABEL: fcmp_olt_vv_nxv1f64: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli zero, a0, e64, m1, ta, ma +; CHECK-NEXT: vmflt.vv v0, v8, v9, v0.t +; CHECK-NEXT: ret + %v = call @llvm.vp.fcmp.nxv1f64( %va, %vb, metadata !"olt", %m, i32 %evl) + ret %v +} + +define @fcmp_olt_vf_nxv1f64( %va, double %b, %m, i32 zeroext %evl) { +; CHECK-LABEL: fcmp_olt_vf_nxv1f64: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli zero, a0, e64, m1, ta, ma +; CHECK-NEXT: vmflt.vf v0, v8, fa0, v0.t +; CHECK-NEXT: ret + %elt.head = insertelement poison, double %b, i32 0 + %vb = shufflevector %elt.head, poison, zeroinitializer + %v = call @llvm.vp.fcmp.nxv1f64( %va, %vb, metadata !"olt", %m, i32 %evl) + ret %v +} + +define @fcmp_olt_vf_swap_nxv1f64( %va, double %b, %m, i32 zeroext %evl) { +; CHECK-LABEL: fcmp_olt_vf_swap_nxv1f64: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli zero, a0, e64, m1, ta, ma +; CHECK-NEXT: vmfgt.vf v0, v8, fa0, v0.t +; CHECK-NEXT: ret + %elt.head = insertelement poison, double %b, i32 0 + %vb = shufflevector %elt.head, poison, zeroinitializer + %v = call @llvm.vp.fcmp.nxv1f64( %vb, %va, metadata !"olt", %m, i32 %evl) + ret %v +} + +define @fcmp_ole_vv_nxv1f64( %va, %vb, %m, i32 zeroext %evl) { +; CHECK-LABEL: fcmp_ole_vv_nxv1f64: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli zero, a0, e64, m1, ta, ma +; CHECK-NEXT: vmfle.vv v0, v8, v9, v0.t +; CHECK-NEXT: ret + %v = call @llvm.vp.fcmp.nxv1f64( %va, %vb, metadata !"ole", %m, i32 %evl) + ret %v +} + +define @fcmp_ole_vf_nxv1f64( %va, double %b, %m, i32 zeroext %evl) { +; CHECK-LABEL: fcmp_ole_vf_nxv1f64: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli zero, a0, e64, m1, ta, ma +; CHECK-NEXT: vmfle.vf v0, v8, fa0, v0.t +; CHECK-NEXT: ret + %elt.head = insertelement poison, double %b, i32 0 + %vb = shufflevector %elt.head, poison, zeroinitializer + %v = call @llvm.vp.fcmp.nxv1f64( %va, %vb, metadata !"ole", %m, i32 %evl) + ret %v +} + +define @fcmp_ole_vf_swap_nxv1f64( %va, double %b, %m, i32 zeroext %evl) { +; CHECK-LABEL: fcmp_ole_vf_swap_nxv1f64: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli zero, a0, e64, m1, ta, ma +; CHECK-NEXT: vmfge.vf v0, v8, fa0, v0.t +; CHECK-NEXT: ret + %elt.head = insertelement poison, double %b, i32 0 + %vb = shufflevector %elt.head, poison, zeroinitializer + %v = call @llvm.vp.fcmp.nxv1f64( %vb, %va, metadata !"ole", %m, i32 %evl) + ret %v +} + +define @fcmp_one_vv_nxv1f64( %va, %vb, %m, i32 zeroext %evl) { +; CHECK-LABEL: fcmp_one_vv_nxv1f64: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli zero, a0, e64, m1, ta, ma +; CHECK-NEXT: vmflt.vv v10, v8, v9, v0.t +; CHECK-NEXT: vmflt.vv v8, v9, v8, v0.t +; CHECK-NEXT: vsetvli zero, zero, e8, mf8, ta, mu +; CHECK-NEXT: vmor.mm v0, v8, v10 +; CHECK-NEXT: ret + %v = call @llvm.vp.fcmp.nxv1f64( %va, %vb, metadata !"one", %m, i32 %evl) + ret %v +} + +define @fcmp_one_vf_nxv1f64( %va, double %b, %m, i32 zeroext %evl) { +; CHECK-LABEL: fcmp_one_vf_nxv1f64: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli zero, a0, e64, m1, ta, ma +; CHECK-NEXT: vmflt.vf v9, v8, fa0, v0.t +; CHECK-NEXT: vmfgt.vf v8, v8, fa0, v0.t +; CHECK-NEXT: vsetvli zero, zero, e8, mf8, ta, mu +; CHECK-NEXT: vmor.mm v0, v8, v9 +; CHECK-NEXT: ret + %elt.head = insertelement poison, double %b, i32 0 + %vb = shufflevector %elt.head, poison, zeroinitializer + %v = call @llvm.vp.fcmp.nxv1f64( %va, %vb, metadata !"one", %m, i32 %evl) + ret %v +} + +define @fcmp_one_vf_swap_nxv1f64( %va, double %b, %m, i32 zeroext %evl) { +; CHECK-LABEL: fcmp_one_vf_swap_nxv1f64: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli zero, a0, e64, m1, ta, ma +; CHECK-NEXT: vmfgt.vf v9, v8, fa0, v0.t +; CHECK-NEXT: vmflt.vf v8, v8, fa0, v0.t +; CHECK-NEXT: vsetvli zero, zero, e8, mf8, ta, mu +; CHECK-NEXT: vmor.mm v0, v8, v9 +; CHECK-NEXT: ret + %elt.head = insertelement poison, double %b, i32 0 + %vb = shufflevector %elt.head, poison, zeroinitializer + %v = call @llvm.vp.fcmp.nxv1f64( %vb, %va, metadata !"one", %m, i32 %evl) + ret %v +} + +define @fcmp_ord_vv_nxv1f64( %va, %vb, %m, i32 zeroext %evl) { +; CHECK-LABEL: fcmp_ord_vv_nxv1f64: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli zero, a0, e64, m1, ta, ma +; CHECK-NEXT: vmfeq.vv v9, v9, v9, v0.t +; CHECK-NEXT: vmfeq.vv v8, v8, v8, v0.t +; CHECK-NEXT: vsetvli zero, zero, e8, mf8, ta, mu +; CHECK-NEXT: vmand.mm v0, v8, v9 +; CHECK-NEXT: ret + %v = call @llvm.vp.fcmp.nxv1f64( %va, %vb, metadata !"ord", %m, i32 %evl) + ret %v +} + +define @fcmp_ord_vf_nxv1f64( %va, double %b, %m, i32 zeroext %evl) { +; CHECK-LABEL: fcmp_ord_vf_nxv1f64: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a1, zero, e64, m1, ta, mu +; CHECK-NEXT: vfmv.v.f v9, fa0 +; CHECK-NEXT: vsetvli zero, a0, e64, m1, ta, ma +; CHECK-NEXT: vmfeq.vf v9, v9, fa0, v0.t +; CHECK-NEXT: vmfeq.vv v8, v8, v8, v0.t +; CHECK-NEXT: vsetvli zero, zero, e8, mf8, ta, mu +; CHECK-NEXT: vmand.mm v0, v8, v9 +; CHECK-NEXT: ret + %elt.head = insertelement poison, double %b, i32 0 + %vb = shufflevector %elt.head, poison, zeroinitializer + %v = call @llvm.vp.fcmp.nxv1f64( %va, %vb, metadata !"ord", %m, i32 %evl) + ret %v +} + +define @fcmp_ord_vf_swap_nxv1f64( %va, double %b, %m, i32 zeroext %evl) { +; CHECK-LABEL: fcmp_ord_vf_swap_nxv1f64: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a1, zero, e64, m1, ta, mu +; CHECK-NEXT: vfmv.v.f v9, fa0 +; CHECK-NEXT: vsetvli zero, a0, e64, m1, ta, ma +; CHECK-NEXT: vmfeq.vf v9, v9, fa0, v0.t +; CHECK-NEXT: vmfeq.vv v8, v8, v8, v0.t +; CHECK-NEXT: vsetvli zero, zero, e8, mf8, ta, mu +; CHECK-NEXT: vmand.mm v0, v9, v8 +; CHECK-NEXT: ret + %elt.head = insertelement poison, double %b, i32 0 + %vb = shufflevector %elt.head, poison, zeroinitializer + %v = call @llvm.vp.fcmp.nxv1f64( %vb, %va, metadata !"ord", %m, i32 %evl) + ret %v +} + +define @fcmp_ueq_vv_nxv1f64( %va, %vb, %m, i32 zeroext %evl) { +; CHECK-LABEL: fcmp_ueq_vv_nxv1f64: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli zero, a0, e64, m1, ta, ma +; CHECK-NEXT: vmflt.vv v10, v8, v9, v0.t +; CHECK-NEXT: vmflt.vv v8, v9, v8, v0.t +; CHECK-NEXT: vsetvli zero, zero, e8, mf8, ta, mu +; CHECK-NEXT: vmnor.mm v0, v8, v10 +; CHECK-NEXT: ret + %v = call @llvm.vp.fcmp.nxv1f64( %va, %vb, metadata !"ueq", %m, i32 %evl) + ret %v +} + +define @fcmp_ueq_vf_nxv1f64( %va, double %b, %m, i32 zeroext %evl) { +; CHECK-LABEL: fcmp_ueq_vf_nxv1f64: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli zero, a0, e64, m1, ta, ma +; CHECK-NEXT: vmflt.vf v9, v8, fa0, v0.t +; CHECK-NEXT: vmfgt.vf v8, v8, fa0, v0.t +; CHECK-NEXT: vsetvli zero, zero, e8, mf8, ta, mu +; CHECK-NEXT: vmnor.mm v0, v8, v9 +; CHECK-NEXT: ret + %elt.head = insertelement poison, double %b, i32 0 + %vb = shufflevector %elt.head, poison, zeroinitializer + %v = call @llvm.vp.fcmp.nxv1f64( %va, %vb, metadata !"ueq", %m, i32 %evl) + ret %v +} + +define @fcmp_ueq_vf_swap_nxv1f64( %va, double %b, %m, i32 zeroext %evl) { +; CHECK-LABEL: fcmp_ueq_vf_swap_nxv1f64: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli zero, a0, e64, m1, ta, ma +; CHECK-NEXT: vmfgt.vf v9, v8, fa0, v0.t +; CHECK-NEXT: vmflt.vf v8, v8, fa0, v0.t +; CHECK-NEXT: vsetvli zero, zero, e8, mf8, ta, mu +; CHECK-NEXT: vmnor.mm v0, v8, v9 +; CHECK-NEXT: ret + %elt.head = insertelement poison, double %b, i32 0 + %vb = shufflevector %elt.head, poison, zeroinitializer + %v = call @llvm.vp.fcmp.nxv1f64( %vb, %va, metadata !"ueq", %m, i32 %evl) + ret %v +} + +define @fcmp_ugt_vv_nxv1f64( %va, %vb, %m, i32 zeroext %evl) { +; CHECK-LABEL: fcmp_ugt_vv_nxv1f64: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli zero, a0, e64, m1, ta, ma +; CHECK-NEXT: vmfle.vv v8, v8, v9, v0.t +; CHECK-NEXT: vsetvli zero, zero, e8, mf8, ta, mu +; CHECK-NEXT: vmnand.mm v0, v8, v8 +; CHECK-NEXT: ret + %v = call @llvm.vp.fcmp.nxv1f64( %va, %vb, metadata !"ugt", %m, i32 %evl) + ret %v +} + +define @fcmp_ugt_vf_nxv1f64( %va, double %b, %m, i32 zeroext %evl) { +; CHECK-LABEL: fcmp_ugt_vf_nxv1f64: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli zero, a0, e64, m1, ta, ma +; CHECK-NEXT: vmfle.vf v8, v8, fa0, v0.t +; CHECK-NEXT: vsetvli zero, zero, e8, mf8, ta, mu +; CHECK-NEXT: vmnand.mm v0, v8, v8 +; CHECK-NEXT: ret + %elt.head = insertelement poison, double %b, i32 0 + %vb = shufflevector %elt.head, poison, zeroinitializer + %v = call @llvm.vp.fcmp.nxv1f64( %va, %vb, metadata !"ugt", %m, i32 %evl) + ret %v +} + +define @fcmp_ugt_vf_swap_nxv1f64( %va, double %b, %m, i32 zeroext %evl) { +; CHECK-LABEL: fcmp_ugt_vf_swap_nxv1f64: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli zero, a0, e64, m1, ta, ma +; CHECK-NEXT: vmfge.vf v8, v8, fa0, v0.t +; CHECK-NEXT: vsetvli zero, zero, e8, mf8, ta, mu +; CHECK-NEXT: vmnand.mm v0, v8, v8 +; CHECK-NEXT: ret + %elt.head = insertelement poison, double %b, i32 0 + %vb = shufflevector %elt.head, poison, zeroinitializer + %v = call @llvm.vp.fcmp.nxv1f64( %vb, %va, metadata !"ugt", %m, i32 %evl) + ret %v +} + +define @fcmp_uge_vv_nxv1f64( %va, %vb, %m, i32 zeroext %evl) { +; CHECK-LABEL: fcmp_uge_vv_nxv1f64: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli zero, a0, e64, m1, ta, ma +; CHECK-NEXT: vmflt.vv v8, v8, v9, v0.t +; CHECK-NEXT: vsetvli zero, zero, e8, mf8, ta, mu +; CHECK-NEXT: vmnand.mm v0, v8, v8 +; CHECK-NEXT: ret + %v = call @llvm.vp.fcmp.nxv1f64( %va, %vb, metadata !"uge", %m, i32 %evl) + ret %v +} + +define @fcmp_uge_vf_nxv1f64( %va, double %b, %m, i32 zeroext %evl) { +; CHECK-LABEL: fcmp_uge_vf_nxv1f64: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli zero, a0, e64, m1, ta, ma +; CHECK-NEXT: vmflt.vf v8, v8, fa0, v0.t +; CHECK-NEXT: vsetvli zero, zero, e8, mf8, ta, mu +; CHECK-NEXT: vmnand.mm v0, v8, v8 +; CHECK-NEXT: ret + %elt.head = insertelement poison, double %b, i32 0 + %vb = shufflevector %elt.head, poison, zeroinitializer + %v = call @llvm.vp.fcmp.nxv1f64( %va, %vb, metadata !"uge", %m, i32 %evl) + ret %v +} + +define @fcmp_uge_vf_swap_nxv1f64( %va, double %b, %m, i32 zeroext %evl) { +; CHECK-LABEL: fcmp_uge_vf_swap_nxv1f64: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli zero, a0, e64, m1, ta, ma +; CHECK-NEXT: vmfgt.vf v8, v8, fa0, v0.t +; CHECK-NEXT: vsetvli zero, zero, e8, mf8, ta, mu +; CHECK-NEXT: vmnand.mm v0, v8, v8 +; CHECK-NEXT: ret + %elt.head = insertelement poison, double %b, i32 0 + %vb = shufflevector %elt.head, poison, zeroinitializer + %v = call @llvm.vp.fcmp.nxv1f64( %vb, %va, metadata !"uge", %m, i32 %evl) + ret %v +} + +define @fcmp_ult_vv_nxv1f64( %va, %vb, %m, i32 zeroext %evl) { +; CHECK-LABEL: fcmp_ult_vv_nxv1f64: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli zero, a0, e64, m1, ta, ma +; CHECK-NEXT: vmfle.vv v8, v9, v8, v0.t +; CHECK-NEXT: vsetvli zero, zero, e8, mf8, ta, mu +; CHECK-NEXT: vmnand.mm v0, v8, v8 +; CHECK-NEXT: ret + %v = call @llvm.vp.fcmp.nxv1f64( %va, %vb, metadata !"ult", %m, i32 %evl) + ret %v +} + +define @fcmp_ult_vf_nxv1f64( %va, double %b, %m, i32 zeroext %evl) { +; CHECK-LABEL: fcmp_ult_vf_nxv1f64: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli zero, a0, e64, m1, ta, ma +; CHECK-NEXT: vmfge.vf v8, v8, fa0, v0.t +; CHECK-NEXT: vsetvli zero, zero, e8, mf8, ta, mu +; CHECK-NEXT: vmnand.mm v0, v8, v8 +; CHECK-NEXT: ret + %elt.head = insertelement poison, double %b, i32 0 + %vb = shufflevector %elt.head, poison, zeroinitializer + %v = call @llvm.vp.fcmp.nxv1f64( %va, %vb, metadata !"ult", %m, i32 %evl) + ret %v +} + +define @fcmp_ult_vf_swap_nxv1f64( %va, double %b, %m, i32 zeroext %evl) { +; CHECK-LABEL: fcmp_ult_vf_swap_nxv1f64: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli zero, a0, e64, m1, ta, ma +; CHECK-NEXT: vmfle.vf v8, v8, fa0, v0.t +; CHECK-NEXT: vsetvli zero, zero, e8, mf8, ta, mu +; CHECK-NEXT: vmnand.mm v0, v8, v8 +; CHECK-NEXT: ret + %elt.head = insertelement poison, double %b, i32 0 + %vb = shufflevector %elt.head, poison, zeroinitializer + %v = call @llvm.vp.fcmp.nxv1f64( %vb, %va, metadata !"ult", %m, i32 %evl) + ret %v +} + +define @fcmp_ule_vv_nxv1f64( %va, %vb, %m, i32 zeroext %evl) { +; CHECK-LABEL: fcmp_ule_vv_nxv1f64: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli zero, a0, e64, m1, ta, ma +; CHECK-NEXT: vmflt.vv v8, v9, v8, v0.t +; CHECK-NEXT: vsetvli zero, zero, e8, mf8, ta, mu +; CHECK-NEXT: vmnand.mm v0, v8, v8 +; CHECK-NEXT: ret + %v = call @llvm.vp.fcmp.nxv1f64( %va, %vb, metadata !"ule", %m, i32 %evl) + ret %v +} + +define @fcmp_ule_vf_nxv1f64( %va, double %b, %m, i32 zeroext %evl) { +; CHECK-LABEL: fcmp_ule_vf_nxv1f64: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli zero, a0, e64, m1, ta, ma +; CHECK-NEXT: vmfgt.vf v8, v8, fa0, v0.t +; CHECK-NEXT: vsetvli zero, zero, e8, mf8, ta, mu +; CHECK-NEXT: vmnand.mm v0, v8, v8 +; CHECK-NEXT: ret + %elt.head = insertelement poison, double %b, i32 0 + %vb = shufflevector %elt.head, poison, zeroinitializer + %v = call @llvm.vp.fcmp.nxv1f64( %va, %vb, metadata !"ule", %m, i32 %evl) + ret %v +} + +define @fcmp_ule_vf_swap_nxv1f64( %va, double %b, %m, i32 zeroext %evl) { +; CHECK-LABEL: fcmp_ule_vf_swap_nxv1f64: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli zero, a0, e64, m1, ta, ma +; CHECK-NEXT: vmflt.vf v8, v8, fa0, v0.t +; CHECK-NEXT: vsetvli zero, zero, e8, mf8, ta, mu +; CHECK-NEXT: vmnand.mm v0, v8, v8 +; CHECK-NEXT: ret + %elt.head = insertelement poison, double %b, i32 0 + %vb = shufflevector %elt.head, poison, zeroinitializer + %v = call @llvm.vp.fcmp.nxv1f64( %vb, %va, metadata !"ule", %m, i32 %evl) + ret %v +} + +define @fcmp_une_vv_nxv1f64( %va, %vb, %m, i32 zeroext %evl) { +; CHECK-LABEL: fcmp_une_vv_nxv1f64: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli zero, a0, e64, m1, ta, ma +; CHECK-NEXT: vmfne.vv v0, v8, v9, v0.t +; CHECK-NEXT: ret + %v = call @llvm.vp.fcmp.nxv1f64( %va, %vb, metadata !"une", %m, i32 %evl) + ret %v +} + +define @fcmp_une_vf_nxv1f64( %va, double %b, %m, i32 zeroext %evl) { +; CHECK-LABEL: fcmp_une_vf_nxv1f64: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli zero, a0, e64, m1, ta, ma +; CHECK-NEXT: vmfne.vf v0, v8, fa0, v0.t +; CHECK-NEXT: ret + %elt.head = insertelement poison, double %b, i32 0 + %vb = shufflevector %elt.head, poison, zeroinitializer + %v = call @llvm.vp.fcmp.nxv1f64( %va, %vb, metadata !"une", %m, i32 %evl) + ret %v +} + +define @fcmp_une_vf_swap_nxv1f64( %va, double %b, %m, i32 zeroext %evl) { +; CHECK-LABEL: fcmp_une_vf_swap_nxv1f64: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli zero, a0, e64, m1, ta, ma +; CHECK-NEXT: vmfne.vf v0, v8, fa0, v0.t +; CHECK-NEXT: ret + %elt.head = insertelement poison, double %b, i32 0 + %vb = shufflevector %elt.head, poison, zeroinitializer + %v = call @llvm.vp.fcmp.nxv1f64( %vb, %va, metadata !"une", %m, i32 %evl) + ret %v +} + +define @fcmp_uno_vv_nxv1f64( %va, %vb, %m, i32 zeroext %evl) { +; CHECK-LABEL: fcmp_uno_vv_nxv1f64: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli zero, a0, e64, m1, ta, ma +; CHECK-NEXT: vmfne.vv v9, v9, v9, v0.t +; CHECK-NEXT: vmfne.vv v8, v8, v8, v0.t +; CHECK-NEXT: vsetvli zero, zero, e8, mf8, ta, mu +; CHECK-NEXT: vmor.mm v0, v8, v9 +; CHECK-NEXT: ret + %v = call @llvm.vp.fcmp.nxv1f64( %va, %vb, metadata !"uno", %m, i32 %evl) + ret %v +} + +define @fcmp_uno_vf_nxv1f64( %va, double %b, %m, i32 zeroext %evl) { +; CHECK-LABEL: fcmp_uno_vf_nxv1f64: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a1, zero, e64, m1, ta, mu +; CHECK-NEXT: vfmv.v.f v9, fa0 +; CHECK-NEXT: vsetvli zero, a0, e64, m1, ta, ma +; CHECK-NEXT: vmfne.vf v9, v9, fa0, v0.t +; CHECK-NEXT: vmfne.vv v8, v8, v8, v0.t +; CHECK-NEXT: vsetvli zero, zero, e8, mf8, ta, mu +; CHECK-NEXT: vmor.mm v0, v8, v9 +; CHECK-NEXT: ret + %elt.head = insertelement poison, double %b, i32 0 + %vb = shufflevector %elt.head, poison, zeroinitializer + %v = call @llvm.vp.fcmp.nxv1f64( %va, %vb, metadata !"uno", %m, i32 %evl) + ret %v +} + +define @fcmp_uno_vf_swap_nxv1f64( %va, double %b, %m, i32 zeroext %evl) { +; CHECK-LABEL: fcmp_uno_vf_swap_nxv1f64: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a1, zero, e64, m1, ta, mu +; CHECK-NEXT: vfmv.v.f v9, fa0 +; CHECK-NEXT: vsetvli zero, a0, e64, m1, ta, ma +; CHECK-NEXT: vmfne.vf v9, v9, fa0, v0.t +; CHECK-NEXT: vmfne.vv v8, v8, v8, v0.t +; CHECK-NEXT: vsetvli zero, zero, e8, mf8, ta, mu +; CHECK-NEXT: vmor.mm v0, v9, v8 +; CHECK-NEXT: ret + %elt.head = insertelement poison, double %b, i32 0 + %vb = shufflevector %elt.head, poison, zeroinitializer + %v = call @llvm.vp.fcmp.nxv1f64( %vb, %va, metadata !"uno", %m, i32 %evl) + ret %v +} + +declare @llvm.vp.fcmp.nxv8f64(, , metadata, , i32) + +define @fcmp_oeq_vv_nxv8f64( %va, %vb, %m, i32 zeroext %evl) { +; CHECK-LABEL: fcmp_oeq_vv_nxv8f64: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli zero, a0, e64, m8, ta, ma +; CHECK-NEXT: vmfeq.vv v24, v8, v16, v0.t +; CHECK-NEXT: vmv1r.v v0, v24 +; CHECK-NEXT: ret + %v = call @llvm.vp.fcmp.nxv8f64( %va, %vb, metadata !"oeq", %m, i32 %evl) + ret %v +} + +define @fcmp_oeq_vf_nxv8f64( %va, double %b, %m, i32 zeroext %evl) { +; CHECK-LABEL: fcmp_oeq_vf_nxv8f64: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli zero, a0, e64, m8, ta, ma +; CHECK-NEXT: vmfeq.vf v16, v8, fa0, v0.t +; CHECK-NEXT: vmv1r.v v0, v16 +; CHECK-NEXT: ret + %elt.head = insertelement poison, double %b, i32 0 + %vb = shufflevector %elt.head, poison, zeroinitializer + %v = call @llvm.vp.fcmp.nxv8f64( %va, %vb, metadata !"oeq", %m, i32 %evl) + ret %v +} + +define @fcmp_oeq_vf_swap_nxv8f64( %va, double %b, %m, i32 zeroext %evl) { +; CHECK-LABEL: fcmp_oeq_vf_swap_nxv8f64: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli zero, a0, e64, m8, ta, ma +; CHECK-NEXT: vmfeq.vf v16, v8, fa0, v0.t +; CHECK-NEXT: vmv1r.v v0, v16 +; CHECK-NEXT: ret + %elt.head = insertelement poison, double %b, i32 0 + %vb = shufflevector %elt.head, poison, zeroinitializer + %v = call @llvm.vp.fcmp.nxv8f64( %vb, %va, metadata !"oeq", %m, i32 %evl) + ret %v +} + +define @fcmp_ogt_vv_nxv8f64( %va, %vb, %m, i32 zeroext %evl) { +; CHECK-LABEL: fcmp_ogt_vv_nxv8f64: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli zero, a0, e64, m8, ta, ma +; CHECK-NEXT: vmflt.vv v24, v16, v8, v0.t +; CHECK-NEXT: vmv1r.v v0, v24 +; CHECK-NEXT: ret + %v = call @llvm.vp.fcmp.nxv8f64( %va, %vb, metadata !"ogt", %m, i32 %evl) + ret %v +} + +define @fcmp_ogt_vf_nxv8f64( %va, double %b, %m, i32 zeroext %evl) { +; CHECK-LABEL: fcmp_ogt_vf_nxv8f64: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli zero, a0, e64, m8, ta, ma +; CHECK-NEXT: vmfgt.vf v16, v8, fa0, v0.t +; CHECK-NEXT: vmv1r.v v0, v16 +; CHECK-NEXT: ret + %elt.head = insertelement poison, double %b, i32 0 + %vb = shufflevector %elt.head, poison, zeroinitializer + %v = call @llvm.vp.fcmp.nxv8f64( %va, %vb, metadata !"ogt", %m, i32 %evl) + ret %v +} + +define @fcmp_ogt_vf_swap_nxv8f64( %va, double %b, %m, i32 zeroext %evl) { +; CHECK-LABEL: fcmp_ogt_vf_swap_nxv8f64: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli zero, a0, e64, m8, ta, ma +; CHECK-NEXT: vmflt.vf v16, v8, fa0, v0.t +; CHECK-NEXT: vmv1r.v v0, v16 +; CHECK-NEXT: ret + %elt.head = insertelement poison, double %b, i32 0 + %vb = shufflevector %elt.head, poison, zeroinitializer + %v = call @llvm.vp.fcmp.nxv8f64( %vb, %va, metadata !"ogt", %m, i32 %evl) + ret %v +} + +define @fcmp_oge_vv_nxv8f64( %va, %vb, %m, i32 zeroext %evl) { +; CHECK-LABEL: fcmp_oge_vv_nxv8f64: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli zero, a0, e64, m8, ta, ma +; CHECK-NEXT: vmfle.vv v24, v16, v8, v0.t +; CHECK-NEXT: vmv1r.v v0, v24 +; CHECK-NEXT: ret + %v = call @llvm.vp.fcmp.nxv8f64( %va, %vb, metadata !"oge", %m, i32 %evl) + ret %v +} + +define @fcmp_oge_vf_nxv8f64( %va, double %b, %m, i32 zeroext %evl) { +; CHECK-LABEL: fcmp_oge_vf_nxv8f64: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli zero, a0, e64, m8, ta, ma +; CHECK-NEXT: vmfge.vf v16, v8, fa0, v0.t +; CHECK-NEXT: vmv1r.v v0, v16 +; CHECK-NEXT: ret + %elt.head = insertelement poison, double %b, i32 0 + %vb = shufflevector %elt.head, poison, zeroinitializer + %v = call @llvm.vp.fcmp.nxv8f64( %va, %vb, metadata !"oge", %m, i32 %evl) + ret %v +} + +define @fcmp_oge_vf_swap_nxv8f64( %va, double %b, %m, i32 zeroext %evl) { +; CHECK-LABEL: fcmp_oge_vf_swap_nxv8f64: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli zero, a0, e64, m8, ta, ma +; CHECK-NEXT: vmfle.vf v16, v8, fa0, v0.t +; CHECK-NEXT: vmv1r.v v0, v16 +; CHECK-NEXT: ret + %elt.head = insertelement poison, double %b, i32 0 + %vb = shufflevector %elt.head, poison, zeroinitializer + %v = call @llvm.vp.fcmp.nxv8f64( %vb, %va, metadata !"oge", %m, i32 %evl) + ret %v +} + +define @fcmp_olt_vv_nxv8f64( %va, %vb, %m, i32 zeroext %evl) { +; CHECK-LABEL: fcmp_olt_vv_nxv8f64: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli zero, a0, e64, m8, ta, ma +; CHECK-NEXT: vmflt.vv v24, v8, v16, v0.t +; CHECK-NEXT: vmv1r.v v0, v24 +; CHECK-NEXT: ret + %v = call @llvm.vp.fcmp.nxv8f64( %va, %vb, metadata !"olt", %m, i32 %evl) + ret %v +} + +define @fcmp_olt_vf_nxv8f64( %va, double %b, %m, i32 zeroext %evl) { +; CHECK-LABEL: fcmp_olt_vf_nxv8f64: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli zero, a0, e64, m8, ta, ma +; CHECK-NEXT: vmflt.vf v16, v8, fa0, v0.t +; CHECK-NEXT: vmv1r.v v0, v16 +; CHECK-NEXT: ret + %elt.head = insertelement poison, double %b, i32 0 + %vb = shufflevector %elt.head, poison, zeroinitializer + %v = call @llvm.vp.fcmp.nxv8f64( %va, %vb, metadata !"olt", %m, i32 %evl) + ret %v +} + +define @fcmp_olt_vf_swap_nxv8f64( %va, double %b, %m, i32 zeroext %evl) { +; CHECK-LABEL: fcmp_olt_vf_swap_nxv8f64: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli zero, a0, e64, m8, ta, ma +; CHECK-NEXT: vmfgt.vf v16, v8, fa0, v0.t +; CHECK-NEXT: vmv1r.v v0, v16 +; CHECK-NEXT: ret + %elt.head = insertelement poison, double %b, i32 0 + %vb = shufflevector %elt.head, poison, zeroinitializer + %v = call @llvm.vp.fcmp.nxv8f64( %vb, %va, metadata !"olt", %m, i32 %evl) + ret %v +} + +define @fcmp_ole_vv_nxv8f64( %va, %vb, %m, i32 zeroext %evl) { +; CHECK-LABEL: fcmp_ole_vv_nxv8f64: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli zero, a0, e64, m8, ta, ma +; CHECK-NEXT: vmfle.vv v24, v8, v16, v0.t +; CHECK-NEXT: vmv1r.v v0, v24 +; CHECK-NEXT: ret + %v = call @llvm.vp.fcmp.nxv8f64( %va, %vb, metadata !"ole", %m, i32 %evl) + ret %v +} + +define @fcmp_ole_vf_nxv8f64( %va, double %b, %m, i32 zeroext %evl) { +; CHECK-LABEL: fcmp_ole_vf_nxv8f64: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli zero, a0, e64, m8, ta, ma +; CHECK-NEXT: vmfle.vf v16, v8, fa0, v0.t +; CHECK-NEXT: vmv1r.v v0, v16 +; CHECK-NEXT: ret + %elt.head = insertelement poison, double %b, i32 0 + %vb = shufflevector %elt.head, poison, zeroinitializer + %v = call @llvm.vp.fcmp.nxv8f64( %va, %vb, metadata !"ole", %m, i32 %evl) + ret %v +} + +define @fcmp_ole_vf_swap_nxv8f64( %va, double %b, %m, i32 zeroext %evl) { +; CHECK-LABEL: fcmp_ole_vf_swap_nxv8f64: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli zero, a0, e64, m8, ta, ma +; CHECK-NEXT: vmfge.vf v16, v8, fa0, v0.t +; CHECK-NEXT: vmv1r.v v0, v16 +; CHECK-NEXT: ret + %elt.head = insertelement poison, double %b, i32 0 + %vb = shufflevector %elt.head, poison, zeroinitializer + %v = call @llvm.vp.fcmp.nxv8f64( %vb, %va, metadata !"ole", %m, i32 %evl) + ret %v +} + +define @fcmp_one_vv_nxv8f64( %va, %vb, %m, i32 zeroext %evl) { +; CHECK-LABEL: fcmp_one_vv_nxv8f64: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli zero, a0, e64, m8, ta, ma +; CHECK-NEXT: vmflt.vv v24, v8, v16, v0.t +; CHECK-NEXT: vmflt.vv v25, v16, v8, v0.t +; CHECK-NEXT: vsetvli zero, zero, e8, m1, ta, mu +; CHECK-NEXT: vmor.mm v0, v25, v24 +; CHECK-NEXT: ret + %v = call @llvm.vp.fcmp.nxv8f64( %va, %vb, metadata !"one", %m, i32 %evl) + ret %v +} + +define @fcmp_one_vf_nxv8f64( %va, double %b, %m, i32 zeroext %evl) { +; CHECK-LABEL: fcmp_one_vf_nxv8f64: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli zero, a0, e64, m8, ta, ma +; CHECK-NEXT: vmflt.vf v16, v8, fa0, v0.t +; CHECK-NEXT: vmfgt.vf v17, v8, fa0, v0.t +; CHECK-NEXT: vsetvli zero, zero, e8, m1, ta, mu +; CHECK-NEXT: vmor.mm v0, v17, v16 +; CHECK-NEXT: ret + %elt.head = insertelement poison, double %b, i32 0 + %vb = shufflevector %elt.head, poison, zeroinitializer + %v = call @llvm.vp.fcmp.nxv8f64( %va, %vb, metadata !"one", %m, i32 %evl) + ret %v +} + +define @fcmp_one_vf_swap_nxv8f64( %va, double %b, %m, i32 zeroext %evl) { +; CHECK-LABEL: fcmp_one_vf_swap_nxv8f64: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli zero, a0, e64, m8, ta, ma +; CHECK-NEXT: vmfgt.vf v16, v8, fa0, v0.t +; CHECK-NEXT: vmflt.vf v17, v8, fa0, v0.t +; CHECK-NEXT: vsetvli zero, zero, e8, m1, ta, mu +; CHECK-NEXT: vmor.mm v0, v17, v16 +; CHECK-NEXT: ret + %elt.head = insertelement poison, double %b, i32 0 + %vb = shufflevector %elt.head, poison, zeroinitializer + %v = call @llvm.vp.fcmp.nxv8f64( %vb, %va, metadata !"one", %m, i32 %evl) + ret %v +} + +define @fcmp_ord_vv_nxv8f64( %va, %vb, %m, i32 zeroext %evl) { +; CHECK-LABEL: fcmp_ord_vv_nxv8f64: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli zero, a0, e64, m8, ta, ma +; CHECK-NEXT: vmfeq.vv v24, v16, v16, v0.t +; CHECK-NEXT: vmfeq.vv v16, v8, v8, v0.t +; CHECK-NEXT: vsetvli zero, zero, e8, m1, ta, mu +; CHECK-NEXT: vmand.mm v0, v16, v24 +; CHECK-NEXT: ret + %v = call @llvm.vp.fcmp.nxv8f64( %va, %vb, metadata !"ord", %m, i32 %evl) + ret %v +} + +define @fcmp_ord_vf_nxv8f64( %va, double %b, %m, i32 zeroext %evl) { +; CHECK-LABEL: fcmp_ord_vf_nxv8f64: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a1, zero, e64, m8, ta, mu +; CHECK-NEXT: vfmv.v.f v16, fa0 +; CHECK-NEXT: vsetvli zero, a0, e64, m8, ta, ma +; CHECK-NEXT: vmfeq.vf v24, v16, fa0, v0.t +; CHECK-NEXT: vmfeq.vv v16, v8, v8, v0.t +; CHECK-NEXT: vsetvli zero, zero, e8, m1, ta, mu +; CHECK-NEXT: vmand.mm v0, v16, v24 +; CHECK-NEXT: ret + %elt.head = insertelement poison, double %b, i32 0 + %vb = shufflevector %elt.head, poison, zeroinitializer + %v = call @llvm.vp.fcmp.nxv8f64( %va, %vb, metadata !"ord", %m, i32 %evl) + ret %v +} + +define @fcmp_ord_vf_swap_nxv8f64( %va, double %b, %m, i32 zeroext %evl) { +; CHECK-LABEL: fcmp_ord_vf_swap_nxv8f64: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a1, zero, e64, m8, ta, mu +; CHECK-NEXT: vfmv.v.f v16, fa0 +; CHECK-NEXT: vsetvli zero, a0, e64, m8, ta, ma +; CHECK-NEXT: vmfeq.vf v24, v16, fa0, v0.t +; CHECK-NEXT: vmfeq.vv v16, v8, v8, v0.t +; CHECK-NEXT: vsetvli zero, zero, e8, m1, ta, mu +; CHECK-NEXT: vmand.mm v0, v24, v16 +; CHECK-NEXT: ret + %elt.head = insertelement poison, double %b, i32 0 + %vb = shufflevector %elt.head, poison, zeroinitializer + %v = call @llvm.vp.fcmp.nxv8f64( %vb, %va, metadata !"ord", %m, i32 %evl) + ret %v +} + +define @fcmp_ueq_vv_nxv8f64( %va, %vb, %m, i32 zeroext %evl) { +; CHECK-LABEL: fcmp_ueq_vv_nxv8f64: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli zero, a0, e64, m8, ta, ma +; CHECK-NEXT: vmflt.vv v24, v8, v16, v0.t +; CHECK-NEXT: vmflt.vv v25, v16, v8, v0.t +; CHECK-NEXT: vsetvli zero, zero, e8, m1, ta, mu +; CHECK-NEXT: vmnor.mm v0, v25, v24 +; CHECK-NEXT: ret + %v = call @llvm.vp.fcmp.nxv8f64( %va, %vb, metadata !"ueq", %m, i32 %evl) + ret %v +} + +define @fcmp_ueq_vf_nxv8f64( %va, double %b, %m, i32 zeroext %evl) { +; CHECK-LABEL: fcmp_ueq_vf_nxv8f64: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli zero, a0, e64, m8, ta, ma +; CHECK-NEXT: vmflt.vf v16, v8, fa0, v0.t +; CHECK-NEXT: vmfgt.vf v17, v8, fa0, v0.t +; CHECK-NEXT: vsetvli zero, zero, e8, m1, ta, mu +; CHECK-NEXT: vmnor.mm v0, v17, v16 +; CHECK-NEXT: ret + %elt.head = insertelement poison, double %b, i32 0 + %vb = shufflevector %elt.head, poison, zeroinitializer + %v = call @llvm.vp.fcmp.nxv8f64( %va, %vb, metadata !"ueq", %m, i32 %evl) + ret %v +} + +define @fcmp_ueq_vf_swap_nxv8f64( %va, double %b, %m, i32 zeroext %evl) { +; CHECK-LABEL: fcmp_ueq_vf_swap_nxv8f64: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli zero, a0, e64, m8, ta, ma +; CHECK-NEXT: vmfgt.vf v16, v8, fa0, v0.t +; CHECK-NEXT: vmflt.vf v17, v8, fa0, v0.t +; CHECK-NEXT: vsetvli zero, zero, e8, m1, ta, mu +; CHECK-NEXT: vmnor.mm v0, v17, v16 +; CHECK-NEXT: ret + %elt.head = insertelement poison, double %b, i32 0 + %vb = shufflevector %elt.head, poison, zeroinitializer + %v = call @llvm.vp.fcmp.nxv8f64( %vb, %va, metadata !"ueq", %m, i32 %evl) + ret %v +} + +define @fcmp_ugt_vv_nxv8f64( %va, %vb, %m, i32 zeroext %evl) { +; CHECK-LABEL: fcmp_ugt_vv_nxv8f64: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli zero, a0, e64, m8, ta, ma +; CHECK-NEXT: vmfle.vv v24, v8, v16, v0.t +; CHECK-NEXT: vsetvli zero, zero, e8, m1, ta, mu +; CHECK-NEXT: vmnand.mm v0, v24, v24 +; CHECK-NEXT: ret + %v = call @llvm.vp.fcmp.nxv8f64( %va, %vb, metadata !"ugt", %m, i32 %evl) + ret %v +} + +define @fcmp_ugt_vf_nxv8f64( %va, double %b, %m, i32 zeroext %evl) { +; CHECK-LABEL: fcmp_ugt_vf_nxv8f64: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli zero, a0, e64, m8, ta, ma +; CHECK-NEXT: vmfle.vf v16, v8, fa0, v0.t +; CHECK-NEXT: vsetvli zero, zero, e8, m1, ta, mu +; CHECK-NEXT: vmnand.mm v0, v16, v16 +; CHECK-NEXT: ret + %elt.head = insertelement poison, double %b, i32 0 + %vb = shufflevector %elt.head, poison, zeroinitializer + %v = call @llvm.vp.fcmp.nxv8f64( %va, %vb, metadata !"ugt", %m, i32 %evl) + ret %v +} + +define @fcmp_ugt_vf_swap_nxv8f64( %va, double %b, %m, i32 zeroext %evl) { +; CHECK-LABEL: fcmp_ugt_vf_swap_nxv8f64: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli zero, a0, e64, m8, ta, ma +; CHECK-NEXT: vmfge.vf v16, v8, fa0, v0.t +; CHECK-NEXT: vsetvli zero, zero, e8, m1, ta, mu +; CHECK-NEXT: vmnand.mm v0, v16, v16 +; CHECK-NEXT: ret + %elt.head = insertelement poison, double %b, i32 0 + %vb = shufflevector %elt.head, poison, zeroinitializer + %v = call @llvm.vp.fcmp.nxv8f64( %vb, %va, metadata !"ugt", %m, i32 %evl) + ret %v +} + +define @fcmp_uge_vv_nxv8f64( %va, %vb, %m, i32 zeroext %evl) { +; CHECK-LABEL: fcmp_uge_vv_nxv8f64: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli zero, a0, e64, m8, ta, ma +; CHECK-NEXT: vmflt.vv v24, v8, v16, v0.t +; CHECK-NEXT: vsetvli zero, zero, e8, m1, ta, mu +; CHECK-NEXT: vmnand.mm v0, v24, v24 +; CHECK-NEXT: ret + %v = call @llvm.vp.fcmp.nxv8f64( %va, %vb, metadata !"uge", %m, i32 %evl) + ret %v +} + +define @fcmp_uge_vf_nxv8f64( %va, double %b, %m, i32 zeroext %evl) { +; CHECK-LABEL: fcmp_uge_vf_nxv8f64: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli zero, a0, e64, m8, ta, ma +; CHECK-NEXT: vmflt.vf v16, v8, fa0, v0.t +; CHECK-NEXT: vsetvli zero, zero, e8, m1, ta, mu +; CHECK-NEXT: vmnand.mm v0, v16, v16 +; CHECK-NEXT: ret + %elt.head = insertelement poison, double %b, i32 0 + %vb = shufflevector %elt.head, poison, zeroinitializer + %v = call @llvm.vp.fcmp.nxv8f64( %va, %vb, metadata !"uge", %m, i32 %evl) + ret %v +} + +define @fcmp_uge_vf_swap_nxv8f64( %va, double %b, %m, i32 zeroext %evl) { +; CHECK-LABEL: fcmp_uge_vf_swap_nxv8f64: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli zero, a0, e64, m8, ta, ma +; CHECK-NEXT: vmfgt.vf v16, v8, fa0, v0.t +; CHECK-NEXT: vsetvli zero, zero, e8, m1, ta, mu +; CHECK-NEXT: vmnand.mm v0, v16, v16 +; CHECK-NEXT: ret + %elt.head = insertelement poison, double %b, i32 0 + %vb = shufflevector %elt.head, poison, zeroinitializer + %v = call @llvm.vp.fcmp.nxv8f64( %vb, %va, metadata !"uge", %m, i32 %evl) + ret %v +} + +define @fcmp_ult_vv_nxv8f64( %va, %vb, %m, i32 zeroext %evl) { +; CHECK-LABEL: fcmp_ult_vv_nxv8f64: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli zero, a0, e64, m8, ta, ma +; CHECK-NEXT: vmfle.vv v24, v16, v8, v0.t +; CHECK-NEXT: vsetvli zero, zero, e8, m1, ta, mu +; CHECK-NEXT: vmnand.mm v0, v24, v24 +; CHECK-NEXT: ret + %v = call @llvm.vp.fcmp.nxv8f64( %va, %vb, metadata !"ult", %m, i32 %evl) + ret %v +} + +define @fcmp_ult_vf_nxv8f64( %va, double %b, %m, i32 zeroext %evl) { +; CHECK-LABEL: fcmp_ult_vf_nxv8f64: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli zero, a0, e64, m8, ta, ma +; CHECK-NEXT: vmfge.vf v16, v8, fa0, v0.t +; CHECK-NEXT: vsetvli zero, zero, e8, m1, ta, mu +; CHECK-NEXT: vmnand.mm v0, v16, v16 +; CHECK-NEXT: ret + %elt.head = insertelement poison, double %b, i32 0 + %vb = shufflevector %elt.head, poison, zeroinitializer + %v = call @llvm.vp.fcmp.nxv8f64( %va, %vb, metadata !"ult", %m, i32 %evl) + ret %v +} + +define @fcmp_ult_vf_swap_nxv8f64( %va, double %b, %m, i32 zeroext %evl) { +; CHECK-LABEL: fcmp_ult_vf_swap_nxv8f64: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli zero, a0, e64, m8, ta, ma +; CHECK-NEXT: vmfle.vf v16, v8, fa0, v0.t +; CHECK-NEXT: vsetvli zero, zero, e8, m1, ta, mu +; CHECK-NEXT: vmnand.mm v0, v16, v16 +; CHECK-NEXT: ret + %elt.head = insertelement poison, double %b, i32 0 + %vb = shufflevector %elt.head, poison, zeroinitializer + %v = call @llvm.vp.fcmp.nxv8f64( %vb, %va, metadata !"ult", %m, i32 %evl) + ret %v +} + +define @fcmp_ule_vv_nxv8f64( %va, %vb, %m, i32 zeroext %evl) { +; CHECK-LABEL: fcmp_ule_vv_nxv8f64: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli zero, a0, e64, m8, ta, ma +; CHECK-NEXT: vmflt.vv v24, v16, v8, v0.t +; CHECK-NEXT: vsetvli zero, zero, e8, m1, ta, mu +; CHECK-NEXT: vmnand.mm v0, v24, v24 +; CHECK-NEXT: ret + %v = call @llvm.vp.fcmp.nxv8f64( %va, %vb, metadata !"ule", %m, i32 %evl) + ret %v +} + +define @fcmp_ule_vf_nxv8f64( %va, double %b, %m, i32 zeroext %evl) { +; CHECK-LABEL: fcmp_ule_vf_nxv8f64: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli zero, a0, e64, m8, ta, ma +; CHECK-NEXT: vmfgt.vf v16, v8, fa0, v0.t +; CHECK-NEXT: vsetvli zero, zero, e8, m1, ta, mu +; CHECK-NEXT: vmnand.mm v0, v16, v16 +; CHECK-NEXT: ret + %elt.head = insertelement poison, double %b, i32 0 + %vb = shufflevector %elt.head, poison, zeroinitializer + %v = call @llvm.vp.fcmp.nxv8f64( %va, %vb, metadata !"ule", %m, i32 %evl) + ret %v +} + +define @fcmp_ule_vf_swap_nxv8f64( %va, double %b, %m, i32 zeroext %evl) { +; CHECK-LABEL: fcmp_ule_vf_swap_nxv8f64: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli zero, a0, e64, m8, ta, ma +; CHECK-NEXT: vmflt.vf v16, v8, fa0, v0.t +; CHECK-NEXT: vsetvli zero, zero, e8, m1, ta, mu +; CHECK-NEXT: vmnand.mm v0, v16, v16 +; CHECK-NEXT: ret + %elt.head = insertelement poison, double %b, i32 0 + %vb = shufflevector %elt.head, poison, zeroinitializer + %v = call @llvm.vp.fcmp.nxv8f64( %vb, %va, metadata !"ule", %m, i32 %evl) + ret %v +} + +define @fcmp_une_vv_nxv8f64( %va, %vb, %m, i32 zeroext %evl) { +; CHECK-LABEL: fcmp_une_vv_nxv8f64: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli zero, a0, e64, m8, ta, ma +; CHECK-NEXT: vmfne.vv v24, v8, v16, v0.t +; CHECK-NEXT: vmv1r.v v0, v24 +; CHECK-NEXT: ret + %v = call @llvm.vp.fcmp.nxv8f64( %va, %vb, metadata !"une", %m, i32 %evl) + ret %v +} + +define @fcmp_une_vf_nxv8f64( %va, double %b, %m, i32 zeroext %evl) { +; CHECK-LABEL: fcmp_une_vf_nxv8f64: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli zero, a0, e64, m8, ta, ma +; CHECK-NEXT: vmfne.vf v16, v8, fa0, v0.t +; CHECK-NEXT: vmv1r.v v0, v16 +; CHECK-NEXT: ret + %elt.head = insertelement poison, double %b, i32 0 + %vb = shufflevector %elt.head, poison, zeroinitializer + %v = call @llvm.vp.fcmp.nxv8f64( %va, %vb, metadata !"une", %m, i32 %evl) + ret %v +} + +define @fcmp_une_vf_swap_nxv8f64( %va, double %b, %m, i32 zeroext %evl) { +; CHECK-LABEL: fcmp_une_vf_swap_nxv8f64: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli zero, a0, e64, m8, ta, ma +; CHECK-NEXT: vmfne.vf v16, v8, fa0, v0.t +; CHECK-NEXT: vmv1r.v v0, v16 +; CHECK-NEXT: ret + %elt.head = insertelement poison, double %b, i32 0 + %vb = shufflevector %elt.head, poison, zeroinitializer + %v = call @llvm.vp.fcmp.nxv8f64( %vb, %va, metadata !"une", %m, i32 %evl) + ret %v +} + +define @fcmp_uno_vv_nxv8f64( %va, %vb, %m, i32 zeroext %evl) { +; CHECK-LABEL: fcmp_uno_vv_nxv8f64: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli zero, a0, e64, m8, ta, ma +; CHECK-NEXT: vmfne.vv v24, v16, v16, v0.t +; CHECK-NEXT: vmfne.vv v16, v8, v8, v0.t +; CHECK-NEXT: vsetvli zero, zero, e8, m1, ta, mu +; CHECK-NEXT: vmor.mm v0, v16, v24 +; CHECK-NEXT: ret + %v = call @llvm.vp.fcmp.nxv8f64( %va, %vb, metadata !"uno", %m, i32 %evl) + ret %v +} + +define @fcmp_uno_vf_nxv8f64( %va, double %b, %m, i32 zeroext %evl) { +; CHECK-LABEL: fcmp_uno_vf_nxv8f64: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a1, zero, e64, m8, ta, mu +; CHECK-NEXT: vfmv.v.f v16, fa0 +; CHECK-NEXT: vsetvli zero, a0, e64, m8, ta, ma +; CHECK-NEXT: vmfne.vf v24, v16, fa0, v0.t +; CHECK-NEXT: vmfne.vv v16, v8, v8, v0.t +; CHECK-NEXT: vsetvli zero, zero, e8, m1, ta, mu +; CHECK-NEXT: vmor.mm v0, v16, v24 +; CHECK-NEXT: ret + %elt.head = insertelement poison, double %b, i32 0 + %vb = shufflevector %elt.head, poison, zeroinitializer + %v = call @llvm.vp.fcmp.nxv8f64( %va, %vb, metadata !"uno", %m, i32 %evl) + ret %v +} + +define @fcmp_uno_vf_swap_nxv8f64( %va, double %b, %m, i32 zeroext %evl) { +; CHECK-LABEL: fcmp_uno_vf_swap_nxv8f64: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a1, zero, e64, m8, ta, mu +; CHECK-NEXT: vfmv.v.f v16, fa0 +; CHECK-NEXT: vsetvli zero, a0, e64, m8, ta, ma +; CHECK-NEXT: vmfne.vf v24, v16, fa0, v0.t +; CHECK-NEXT: vmfne.vv v16, v8, v8, v0.t +; CHECK-NEXT: vsetvli zero, zero, e8, m1, ta, mu +; CHECK-NEXT: vmor.mm v0, v24, v16 +; CHECK-NEXT: ret + %elt.head = insertelement poison, double %b, i32 0 + %vb = shufflevector %elt.head, poison, zeroinitializer + %v = call @llvm.vp.fcmp.nxv8f64( %vb, %va, metadata !"uno", %m, i32 %evl) + ret %v +}