Index: llvm/trunk/lib/Target/WebAssembly/InstPrinter/WebAssemblyInstPrinter.h =================================================================== --- llvm/trunk/lib/Target/WebAssembly/InstPrinter/WebAssemblyInstPrinter.h +++ llvm/trunk/lib/Target/WebAssembly/InstPrinter/WebAssemblyInstPrinter.h @@ -32,9 +32,6 @@ void printInst(const MCInst *MI, raw_ostream &OS, StringRef Annot, const MCSubtargetInfo &STI) override; - // Used by tblegen code. - void printOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O); - // Autogenerated by tblgen. void printInstruction(const MCInst *MI, raw_ostream &O); static const char *getRegisterName(unsigned RegNo); Index: llvm/trunk/lib/Target/WebAssembly/InstPrinter/WebAssemblyInstPrinter.cpp =================================================================== --- llvm/trunk/lib/Target/WebAssembly/InstPrinter/WebAssemblyInstPrinter.cpp +++ llvm/trunk/lib/Target/WebAssembly/InstPrinter/WebAssemblyInstPrinter.cpp @@ -44,16 +44,3 @@ printInstruction(MI, OS); printAnnotation(OS, Annot); } - -void WebAssemblyInstPrinter::printOperand(const MCInst *MI, unsigned OpNo, - raw_ostream &O) { - const MCOperand &Op = MI->getOperand(OpNo); - if (Op.isReg()) - O << getRegisterName(Op.getReg()); - else if (Op.isImm()) - O << '#' << Op.getImm(); - else { - assert(Op.isExpr() && "unknown operand kind in printOperand"); - Op.getExpr()->print(O, &MAI); - } -} Index: llvm/trunk/lib/Target/WebAssembly/WebAssemblyAsmPrinter.cpp =================================================================== --- llvm/trunk/lib/Target/WebAssembly/WebAssemblyAsmPrinter.cpp +++ llvm/trunk/lib/Target/WebAssembly/WebAssemblyAsmPrinter.cpp @@ -85,7 +85,6 @@ } void WebAssemblyAsmPrinter::EmitInstruction(const MachineInstr *MI) { - DEBUG(dbgs() << "EmitInstruction: " << *MI << '\n'); SmallString<128> Str; raw_svector_ostream OS(Str); Index: llvm/trunk/lib/Target/WebAssembly/WebAssemblyISD.def =================================================================== --- llvm/trunk/lib/Target/WebAssembly/WebAssemblyISD.def +++ llvm/trunk/lib/Target/WebAssembly/WebAssemblyISD.def @@ -1,19 +0,0 @@ -//- WebAssemblyISD.def - WebAssembly ISD ---------------------------*- C++ -*-// -// -// The LLVM Compiler Infrastructure -// -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. -// -//===----------------------------------------------------------------------===// -/// -/// \file -/// \brief This file describes the various WebAssembly ISD node types. -/// -//===----------------------------------------------------------------------===// - -// NOTE: NO INCLUDE GUARD DESIRED! - -HANDLE_NODETYPE(CALL) -HANDLE_NODETYPE(RETURN) -HANDLE_NODETYPE(ARGUMENT) Index: llvm/trunk/lib/Target/WebAssembly/WebAssemblyISelLowering.h =================================================================== --- llvm/trunk/lib/Target/WebAssembly/WebAssemblyISelLowering.h +++ llvm/trunk/lib/Target/WebAssembly/WebAssemblyISelLowering.h @@ -24,9 +24,9 @@ enum NodeType : unsigned { FIRST_NUMBER = ISD::BUILTIN_OP_END, -#define HANDLE_NODETYPE(NODE) NODE, -#include "WebAssemblyISD.def" -#undef HANDLE_NODETYPE + RETURN, + ARGUMENT, + // add memory opcodes starting at ISD::FIRST_TARGET_MEMORY_OPCODE here... }; @@ -52,9 +52,6 @@ const char *getTargetNodeName(unsigned Opcode) const override; - SDValue LowerCall(CallLoweringInfo &CLI, - SmallVectorImpl &InVals) const override; - bool CanLowerReturn(CallingConv::ID CallConv, MachineFunction &MF, bool isVarArg, const SmallVectorImpl &Outs, Index: llvm/trunk/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp =================================================================== --- llvm/trunk/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp +++ llvm/trunk/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp @@ -19,7 +19,6 @@ #include "WebAssemblyTargetMachine.h" #include "WebAssemblyTargetObjectFile.h" #include "llvm/CodeGen/Analysis.h" -#include "llvm/CodeGen/CallingConvLower.h" #include "llvm/CodeGen/MachineRegisterInfo.h" #include "llvm/CodeGen/SelectionDAG.h" #include "llvm/IR/DiagnosticInfo.h" @@ -165,13 +164,9 @@ const char * WebAssemblyTargetLowering::getTargetNodeName(unsigned Opcode) const { switch (static_cast(Opcode)) { - case WebAssemblyISD::FIRST_NUMBER: - break; -#define HANDLE_NODETYPE(NODE) \ - case WebAssemblyISD::NODE: \ - return "WebAssemblyISD::" #NODE; -#include "WebAssemblyISD.def" -#undef HANDLE_NODETYPE + case WebAssemblyISD::FIRST_NUMBER: break; + case WebAssemblyISD::RETURN: return "WebAssemblyISD::RETURN"; + case WebAssemblyISD::ARGUMENT: return "WebAssemblyISD::ARGUMENT"; } return nullptr; } @@ -190,6 +185,7 @@ DiagnosticInfoUnsupported(DL, *MF.getFunction(), msg, SDValue())); } +<<<<<<< HEAD SDValue WebAssemblyTargetLowering::LowerCall(CallLoweringInfo &CLI, SmallVectorImpl &InVals) const { @@ -209,6 +205,7 @@ SmallVectorImpl &Outs = CLI.Outs; SmallVectorImpl &OutVals = CLI.OutVals; + Type *retTy = CLI.RetTy; bool IsStructRet = (Outs.empty()) ? false : Outs[0].Flags.isSRet(); if (IsStructRet) fail(DL, DAG, "WebAssembly doesn't support struct return yet"); @@ -216,6 +213,7 @@ fail(DL, DAG, "WebAssembly doesn't support more than 1 returned value yet"); SmallVectorImpl &Ins = CLI.Ins; + ArgListTy &Args = CLI.getArgs(); bool IsVarArg = CLI.IsVarArg; if (IsVarArg) fail(DL, DAG, "WebAssembly doesn't support varargs yet"); @@ -225,33 +223,33 @@ unsigned NumBytes = CCInfo.getNextStackOffset(); auto PtrVT = getPointerTy(MF.getDataLayout()); - auto Zero = DAG.getConstant(0, DL, PtrVT, true); - auto NB = DAG.getConstant(NumBytes, DL, PtrVT, true); - Chain = DAG.getCALLSEQ_START(Chain, NB, DL); + auto Zero = DAG.getConstant(0, CLI.DL, PtrVT, true); + auto NB = DAG.getConstant(NumBytes, CLI.DL, PtrVT, true); + Chain = DAG.getCALLSEQ_START(Chain, NB, CLI.DL); SmallVector Ops; Ops.push_back(Chain); - Ops.push_back(Callee); - Ops.append(OutVals.begin(), OutVals.end()); + Ops.push_back(CLI.Callee); + Ops.append(CLI.OutVals.begin(), CLI.OutVals.end()); SmallVector Tys; - for (const auto &In : Ins) + for (const auto &In : CLI.Ins) Tys.push_back(In.VT); Tys.push_back(MVT::Other); - SDVTList TyList = DAG.getVTList(Tys); - SDValue Res = DAG.getNode(WebAssemblyISD::CALL, DL, TyList, Ops); - if (!Ins.empty()) { - InVals.push_back(Res); - Chain = Res.getValue(1); - } + SDVTList TyList = CLI.DAG.getVTList(Tys); + SDValue Res = CLI.DAG.getNode(WebAssemblyISD::CALL, CLI.DL, TyList, Ops); + InVals.push_back(Res); + Chain = Res.getValue(1); // FIXME: handle CLI.RetSExt and CLI.RetZExt? - Chain = DAG.getCALLSEQ_END(Chain, NB, Zero, SDValue(), DL); + Chain = CLI.DAG.getCALLSEQ_END(Chain, NB, Zero, SDValue(), CLI.DL); return Chain; } +======= +>>>>>>> parent of 03685a9... call bool WebAssemblyTargetLowering::CanLowerReturn( CallingConv::ID CallConv, MachineFunction &MF, bool IsVarArg, const SmallVectorImpl &Outs, LLVMContext &Context) const { Index: llvm/trunk/lib/Target/WebAssembly/WebAssemblyInstrCall.td =================================================================== --- llvm/trunk/lib/Target/WebAssembly/WebAssemblyInstrCall.td +++ llvm/trunk/lib/Target/WebAssembly/WebAssemblyInstrCall.td @@ -12,29 +12,6 @@ /// //===----------------------------------------------------------------------===// -// The call sequence start/end LLVM-isms isn't useful to WebAssembly since it's -// a virtual ISA. - -// FIXME make noop? -//def : Pat<(WebAssemblycallseq_start timm), (i32 (IMPLICIT_DEF))>; -//def : Pat<(WebAssemblycallseq_end timm, timm), (i32 (IMPLICIT_DEF))>; - -def SDT_WebAssemblyCallSeqStart : SDCallSeqStart<[SDTCisVT<0, iPTR>]>; -def SDT_WebAssemblyCallSeqEnd : - SDCallSeqEnd<[SDTCisVT<0, iPTR>, SDTCisVT<1, iPTR>]>; -def WebAssemblycallseq_start : - SDNode<"ISD::CALLSEQ_START", SDT_WebAssemblyCallSeqStart, - [SDNPHasChain, SDNPOutGlue]>; -def WebAssemblycallseq_end : - SDNode<"ISD::CALLSEQ_END", SDT_WebAssemblyCallSeqEnd, - [SDNPHasChain, SDNPOptInGlue, SDNPOutGlue]>; -def : Pseudo<(outs), (ins i64imm:$amt), - [(WebAssemblycallseq_start timm:$amt)], - "#ADJCALLSTACKDOWN $amt">; -def : Pseudo<(outs), (ins i64imm:$amt1, i64imm:$amt2), - [(WebAssemblycallseq_end timm:$amt1, timm:$amt2)], - "#ADJCALLSTACKUP $amt1 $amt2">; - /* * TODO(jfb): Add the following. * Index: llvm/trunk/lib/Target/WebAssembly/WebAssemblyInstrFormats.td =================================================================== --- llvm/trunk/lib/Target/WebAssembly/WebAssemblyInstrFormats.td +++ llvm/trunk/lib/Target/WebAssembly/WebAssemblyInstrFormats.td @@ -12,7 +12,7 @@ /// //===----------------------------------------------------------------------===// -// WebAssembly Instruction Format. +// WebAssembly Instruction Format class WebAssemblyInst : Instruction { field bits<0> Inst; // Instruction encoding. let Namespace = "WebAssembly"; @@ -20,7 +20,7 @@ let Constraints = cstr; } -// Normal instructions. +// Normal instructions class I pattern, string cstr = ""> : WebAssemblyInst { dag OutOperandList = oops; @@ -28,14 +28,6 @@ let Pattern = pattern; } -// Pseudo instructions. -class Pseudo pattern, string asmstr, - string cstr = ""> - : I { - let isPseudo = 1; - let AsmString = asmstr; -} - // Unary and binary instructions, for the local types that WebAssembly supports. multiclass UnaryInt { def _I32 : I<(outs Int32:$dst), (ins Int32:$src), Index: llvm/trunk/test/CodeGen/WebAssembly/call.ll =================================================================== --- llvm/trunk/test/CodeGen/WebAssembly/call.ll +++ llvm/trunk/test/CodeGen/WebAssembly/call.ll @@ -5,14 +5,13 @@ target datalayout = "e-p:32:32-i64:64-v128:8:128-n32:64-S128" target triple = "wasm32-unknown-unknown" -declare void @void_nullary() -declare void @int32_nullary() +declare void @nullary() -; CHECK-LABEL: call_void_nullary: +; CHECK-LABEL: call_nullary: ; CHECK-NEXT: (call @foo) ; CHECK-NEXT: (return) -define void @call_void_nullary() { - call void @void_nullary() +define void @call_nullary() { + call void @nullary() ret void }