diff --git a/llvm/lib/Target/AArch64/AArch64Subtarget.cpp
 b/llvm/lib/Target/AArch64/AArch64Subtarget.cpp
--- a/llvm/lib/Target/AArch64/AArch64Subtarget.cpp
+++ b/llvm/lib/Target/AArch64/AArch64Subtarget.cpp
@@ -79,14 +79,17 @@
     CacheLineSize = 64;
     break;
   case CortexA35:
+    MaxBytesForLoopAlignment = 8;
     break;
   case CortexA53:
   case CortexA55:
     PrefFunctionLogAlignment = 4;
+    MaxBytesForLoopAlignment = 8;
     break;
   case CortexA57:
     MaxInterleaveFactor = 4;
     PrefFunctionLogAlignment = 4;
+    MaxBytesForLoopAlignment = 8;
     break;
   case CortexA65:
     PrefFunctionLogAlignment = 3;
@@ -102,6 +105,7 @@
   case CortexX1:
   case CortexX1C:
     PrefFunctionLogAlignment = 4;
+    MaxBytesForLoopAlignment = 8;
     break;
   case CortexA510:
   case CortexA710: