diff --git a/llvm/lib/Target/AMDGPU/SIISelLowering.cpp b/llvm/lib/Target/AMDGPU/SIISelLowering.cpp
--- a/llvm/lib/Target/AMDGPU/SIISelLowering.cpp
+++ b/llvm/lib/Target/AMDGPU/SIISelLowering.cpp
@@ -2548,7 +2548,9 @@
     assert(VA.isRegLoc() && "Parameter must be in a register!");
 
     Register Reg = VA.getLocReg();
-    const TargetRegisterClass *RC = TRI->getMinimalPhysRegClass(Reg, VT);
+    const TargetRegisterClass *RC = AMDGPU::SGPR_32RegClass.contains(Reg)
+                                        ? &AMDGPU::SGPR_32RegClass
+                                        : &AMDGPU::VGPR_32RegClass;
     EVT ValVT = VA.getValVT();
 
     Reg = MF.addLiveIn(Reg, RC);