diff --git a/llvm/lib/Target/RISCV/RISCVInstrInfoC.td b/llvm/lib/Target/RISCV/RISCVInstrInfoC.td --- a/llvm/lib/Target/RISCV/RISCVInstrInfoC.td +++ b/llvm/lib/Target/RISCV/RISCVInstrInfoC.td @@ -695,6 +695,13 @@ // Assembler Pseudo Instructions //===----------------------------------------------------------------------===// +let Predicates = [HasStdExtC, HasRVCHints, HasStdExtZihintntl] in { +def : InstAlias<"c.ntl.p1", (C_ADD_HINT X0, X2)>; +def : InstAlias<"c.ntl.pall", (C_ADD_HINT X0, X3)>; +def : InstAlias<"c.ntl.s1", (C_ADD_HINT X0, X4)>; +def : InstAlias<"c.ntl.all", (C_ADD_HINT X0, X5)>; +} // Predicates = [HasStdExtC, HasRVCHints, HasStdExtZihintntl] + let EmitPriority = 0 in { let Predicates = [HasStdExtC, HasStdExtD] in def : InstAlias<"c.fld $rd, (${rs1})", (C_FLD FPR64C:$rd, GPRC:$rs1, 0)>; diff --git a/llvm/test/MC/RISCV/attribute-arch.s b/llvm/test/MC/RISCV/attribute-arch.s --- a/llvm/test/MC/RISCV/attribute-arch.s +++ b/llvm/test/MC/RISCV/attribute-arch.s @@ -175,3 +175,9 @@ .attribute arch, "rv32i_zk1p0" # CHECK: attribute 5, "rv32i2p0_zbkb1p0_zbkc1p0_zbkx1p0_zk1p0_zkn1p0_zknd1p0_zkne1p0_zknh1p0_zkr1p0_zkt1p0" + +.attribute arch, "rv32izihintntl0p2" +# CHECK: attribute 5, "rv32i2p0_zihintntl0p2" + +.attribute arch, "rv32iczihintntl0p2" +# CHECK: attribute 5, "rv32i2p0_c2p0_zihintntl0p2" diff --git a/llvm/test/MC/RISCV/rv32zihintntl-invalid.s b/llvm/test/MC/RISCV/rv32zihintntl-invalid.s new file mode 100644 --- /dev/null +++ b/llvm/test/MC/RISCV/rv32zihintntl-invalid.s @@ -0,0 +1,13 @@ +# RUN: not llvm-mc -triple riscv32 -mattr=+experimental-zihintntl < %s 2>&1 | FileCheck %s +# RUN: not llvm-mc -triple riscv64 -mattr=+experimental-zihintntl < %s 2>&1 | FileCheck %s + +ntl.p1 1 # CHECK: :[[@LINE]]:8: error: invalid operand for instruction +ntl.pall 2 # CHECK: :[[@LINE]]:10: error: invalid operand for instruction +ntl.s1 3 # CHECK: :[[@LINE]]:8: error: invalid operand for instruction +ntl.all 4 # CHECK: :[[@LINE]]:9: error: invalid operand for instruction + +ntl.p1 t0, t1 # CHECK: :[[@LINE]]:8: error: invalid operand for instruction +ntl.pall t0, t1 # CHECK: :[[@LINE]]:10: error: invalid operand for instruction +ntl.s1 t0, t1 # CHECK: :[[@LINE]]:8: error: invalid operand for instruction +ntl.all t0, t1 # CHECK: :[[@LINE]]:9: error: invalid operand for instruction + diff --git a/llvm/test/MC/RISCV/rv32zihintntlc-invalid.s b/llvm/test/MC/RISCV/rv32zihintntlc-invalid.s new file mode 100644 --- /dev/null +++ b/llvm/test/MC/RISCV/rv32zihintntlc-invalid.s @@ -0,0 +1,13 @@ +# RUN: not llvm-mc -triple riscv32 -mattr=+experimental-zihintntl,+c < %s 2>&1 | FileCheck %s +# RUN: not llvm-mc -triple riscv64 -mattr=+experimental-zihintntl,+c < %s 2>&1 | FileCheck %s + +c.ntl.p1 1 # CHECK: :[[@LINE]]:10: error: invalid operand for instruction +c.ntl.pall 2 # CHECK: :[[@LINE]]:12: error: invalid operand for instruction +c.ntl.s1 3 # CHECK: :[[@LINE]]:10: error: invalid operand for instruction +c.ntl.all 4 # CHECK: :[[@LINE]]:11: error: invalid operand for instruction + +c.ntl.p1 t0, t1 # CHECK: :[[@LINE]]:10: error: invalid operand for instruction +c.ntl.pall t0, t1 # CHECK: :[[@LINE]]:12: error: invalid operand for instruction +c.ntl.s1 t0, t1 # CHECK: :[[@LINE]]:10: error: invalid operand for instruction +c.ntl.all t0, t1 # CHECK: :[[@LINE]]:11: error: invalid operand for instruction + diff --git a/llvm/test/MC/RISCV/rv32zihintntlc-valid.s b/llvm/test/MC/RISCV/rv32zihintntlc-valid.s new file mode 100644 --- /dev/null +++ b/llvm/test/MC/RISCV/rv32zihintntlc-valid.s @@ -0,0 +1,42 @@ +# RUN: llvm-mc %s -triple=riscv32 -mattr=+experimental-zihintntl,+c -show-encoding \ +# RUN: | FileCheck -check-prefixes=CHECK-ASM,CHECK-ASM-AND-OBJ %s +# RUN: llvm-mc %s -triple=riscv64 -mattr=+experimental-zihintntl,+c -show-encoding \ +# RUN: | FileCheck -check-prefixes=CHECK-ASM,CHECK-ASM-AND-OBJ %s +# RUN: llvm-mc -filetype=obj -triple=riscv32 -mattr=+experimental-zihintntl,+c < %s \ +# RUN: | llvm-objdump --mattr=+experimental-zihintntl,+c -d -r - \ +# RUN: | FileCheck --check-prefix=CHECK-ASM-AND-OBJ %s +# RUN: llvm-mc -filetype=obj -triple=riscv64 -mattr=+experimental-zihintntl,+c < %s \ +# RUN: | llvm-objdump --mattr=+experimental-zihintntl,+c -d -r - \ +# RUN: | FileCheck --check-prefix=CHECK-ASM-AND-OBJ %s + +# CHECK-ASM-AND-OBJ: ntl.p1 +# CHECK-ASM: encoding: [0x33,0x00,0x20,0x00] +ntl.p1 + +# CHECK-ASM-AND-OBJ: ntl.pall +# CHECK-ASM: encoding: [0x33,0x00,0x30,0x00] +ntl.pall + +# CHECK-ASM-AND-OBJ: ntl.s1 +# CHECK-ASM: encoding: [0x33,0x00,0x40,0x00] +ntl.s1 + +# CHECK-ASM-AND-OBJ: ntl.all +# CHECK-ASM: encoding: [0x33,0x00,0x50,0x00] +ntl.all + +# CHECK-ASM-AND-OBJ: c.ntl.p1 +# CHECK-ASM: encoding: [0x0a,0x90] +c.ntl.p1 + +# CHECK-ASM-AND-OBJ: c.ntl.pall +# CHECK-ASM: encoding: [0x0e,0x90] +c.ntl.pall + +# CHECK-ASM-AND-OBJ: c.ntl.s1 +# CHECK-ASM: encoding: [0x12,0x90] +c.ntl.s1 + +# CHECK-ASM-AND-OBJ: c.ntl.all +# CHECK-ASM: encoding: [0x16,0x90] +c.ntl.all