diff --git a/llvm/lib/Target/AMDGPU/SIPeepholeSDWA.cpp b/llvm/lib/Target/AMDGPU/SIPeepholeSDWA.cpp
--- a/llvm/lib/Target/AMDGPU/SIPeepholeSDWA.cpp
+++ b/llvm/lib/Target/AMDGPU/SIPeepholeSDWA.cpp
@@ -242,13 +242,14 @@
 
 #endif
 
-static void copyRegOperand(MachineOperand &To, const MachineOperand &From) {
-  assert(To.isReg() && From.isReg());
+static void copyRegOperand(MachineOperand &To, const MachineOperand &From,
+                           const MachineOperand &Replaced) {
+  assert(To.isReg() && From.isReg() && Replaced.isReg());
   To.setReg(From.getReg());
   To.setSubReg(From.getSubReg());
   To.setIsUndef(From.isUndef());
   if (To.isUse()) {
-    To.setIsKill(From.isKill());
+    To.setIsKill(From.isKill() && Replaced.isKill());
   } else {
     To.setIsDead(From.isDead());
   }
@@ -401,7 +402,7 @@
     assert(isSameReg(*Src, *getReplacedOperand()) &&
            (IsPreserveSrc || (SrcSel && SrcMods)));
   }
-  copyRegOperand(*Src, *getTargetOperand());
+  copyRegOperand(*Src, *getTargetOperand(), *getReplacedOperand());
   if (!IsPreserveSrc) {
     SrcSel->setImm(getSrcSel());
     SrcMods->setImm(getSrcMods(TII, Src));
@@ -445,7 +446,7 @@
   assert(Operand &&
          Operand->isReg() &&
          isSameReg(*Operand, *getReplacedOperand()));
-  copyRegOperand(*Operand, *getTargetOperand());
+  copyRegOperand(*Operand, *getTargetOperand(), *getReplacedOperand());
   MachineOperand *DstSel= TII->getNamedOperand(MI, AMDGPU::OpName::dst_sel);
   assert(DstSel);
   DstSel->setImm(getDstSel());