diff --git a/flang/include/flang/Optimizer/Dialect/FIROps.td b/flang/include/flang/Optimizer/Dialect/FIROps.td --- a/flang/include/flang/Optimizer/Dialect/FIROps.td +++ b/flang/include/flang/Optimizer/Dialect/FIROps.td @@ -417,11 +417,9 @@ let results = (outs AnyType:$intype); let assemblyFormat = "type($intype) attr-dict"; - - let verifier = [{ - // allow `undef : ref` since it is a possible from transformations - return mlir::success(); - }]; + + // Note: we allow `undef : ref` since it is a possible from transformations. + let hasVerifier = 0; } def fir_ZeroOp : fir_OneResultOp<"zero_bits", [NoSideEffect]> { @@ -551,96 +549,8 @@ }] >]; - let parser = [{ - mlir::OpAsmParser::OperandType selector; - mlir::Type type; - if (parseSelector(parser, result, selector, type)) - return mlir::failure(); - - llvm::SmallVector ivalues; - llvm::SmallVector dests; - llvm::SmallVector> destArgs; - while (true) { - mlir::Attribute ivalue; // Integer or Unit - mlir::Block *dest; - llvm::SmallVector destArg; - mlir::NamedAttrList temp; - if (parser.parseAttribute(ivalue, "i", temp) || - parser.parseComma() || - parser.parseSuccessorAndUseList(dest, destArg)) - return mlir::failure(); - ivalues.push_back(ivalue); - dests.push_back(dest); - destArgs.push_back(destArg); - if (!parser.parseOptionalRSquare()) - break; - if (parser.parseComma()) - return mlir::failure(); - } - auto &bld = parser.getBuilder(); - result.addAttribute(getCasesAttr(), bld.getArrayAttr(ivalues)); - llvm::SmallVector argOffs; - int32_t sumArgs = 0; - const auto count = dests.size(); - for (std::remove_const_t i = 0; i != count; ++i) { - result.addSuccessors(dests[i]); - result.addOperands(destArgs[i]); - auto argSize = destArgs[i].size(); - argOffs.push_back(argSize); - sumArgs += argSize; - } - result.addAttribute(getOperandSegmentSizeAttr(), - bld.getI32VectorAttr({1, 0, sumArgs})); - result.addAttribute(getTargetOffsetAttr(), bld.getI32VectorAttr(argOffs)); - return mlir::success(); - }]; - - let printer = [{ - p << ' '; - p.printOperand(getSelector()); - p << " : " << getSelector().getType() << " ["; - auto cases = - (*this)->getAttrOfType(getCasesAttr()).getValue(); - auto count = getNumConditions(); - for (decltype(count) i = 0; i != count; ++i) { - if (i) - p << ", "; - auto &attr = cases[i]; - if (auto intAttr = attr.dyn_cast_or_null()) - p << intAttr.getValue(); - else - p.printAttribute(attr); - p << ", "; - printSuccessorAtIndex(p, i); - } - p << ']'; - p.printOptionalAttrDict((*this)->getAttrs(), {getCasesAttr(), - getCompareOffsetAttr(), getTargetOffsetAttr(), - getOperandSegmentSizeAttr()}); - }]; - - let verifier = [{ - if (!(getSelector().getType().isa() || - getSelector().getType().isa() || - getSelector().getType().isa())) - return emitOpError("must be an integer"); - auto cases = - (*this)->getAttrOfType(getCasesAttr()).getValue(); - auto count = getNumDest(); - if (count == 0) - return emitOpError("must have at least one successor"); - if (getNumConditions() != count) - return emitOpError("number of cases and targets don't match"); - if (targetOffsetSize() != count) - return emitOpError("incorrect number of successor operand groups"); - for (decltype(count) i = 0; i != count; ++i) { - auto &attr = cases[i]; - if (!(attr.isa() || attr.isa())) - return emitOpError("invalid case alternative"); - } - return mlir::success(); - }]; - + let hasCustomAssemblyFormat = 1; + let hasVerifier = 1; let extraClassDeclaration = extraSwitchClassDeclaration; } @@ -2103,9 +2013,8 @@ class region_Op traits = []> : fir_Op { - let printer = "return ::print(p, *this);"; - let verifier = "return ::verify(*this);"; - let parser = "return ::parse$cppClass(parser, result);"; + let hasCustomAssemblyFormat = 1; + let hasVerifier = 1; } def fir_DoLoopOp : region_Op<"do_loop", diff --git a/flang/lib/Optimizer/Dialect/FIROps.cpp b/flang/lib/Optimizer/Dialect/FIROps.cpp --- a/flang/lib/Optimizer/Dialect/FIROps.cpp +++ b/flang/lib/Optimizer/Dialect/FIROps.cpp @@ -1584,8 +1584,8 @@ result.addAttributes(attributes); } -static mlir::ParseResult parseIterWhileOp(mlir::OpAsmParser &parser, - mlir::OperationState &result) { +mlir::ParseResult IterWhileOp::parse(mlir::OpAsmParser &parser, + mlir::OperationState &result) { auto &builder = parser.getBuilder(); mlir::OpAsmParser::OperandType inductionVariable, lb, ub, step; if (parser.parseLParen() || parser.parseRegionArgument(inductionVariable) || @@ -1683,65 +1683,64 @@ return mlir::success(); } -static mlir::LogicalResult verify(fir::IterWhileOp op) { +mlir::LogicalResult fir::IterWhileOp::verify() { // Check that the body defines as single block argument for the induction // variable. - auto *body = op.getBody(); + auto *body = getBody(); if (!body->getArgument(1).getType().isInteger(1)) - return op.emitOpError( + return emitOpError( "expected body second argument to be an index argument for " "the induction variable"); if (!body->getArgument(0).getType().isIndex()) - return op.emitOpError( + return emitOpError( "expected body first argument to be an index argument for " "the induction variable"); - auto opNumResults = op.getNumResults(); - if (op.getFinalValue()) { + auto opNumResults = getNumResults(); + if (getFinalValue()) { // Result type must be "(index, i1, ...)". - if (!op.getResult(0).getType().isa()) - return op.emitOpError("result #0 expected to be index"); - if (!op.getResult(1).getType().isSignlessInteger(1)) - return op.emitOpError("result #1 expected to be i1"); + if (!getResult(0).getType().isa()) + return emitOpError("result #0 expected to be index"); + if (!getResult(1).getType().isSignlessInteger(1)) + return emitOpError("result #1 expected to be i1"); opNumResults--; } else { // iterate_while always returns the early exit induction value. // Result type must be "(i1, ...)" - if (!op.getResult(0).getType().isSignlessInteger(1)) - return op.emitOpError("result #0 expected to be i1"); + if (!getResult(0).getType().isSignlessInteger(1)) + return emitOpError("result #0 expected to be i1"); } if (opNumResults == 0) return mlir::failure(); - if (op.getNumIterOperands() != opNumResults) - return op.emitOpError( + if (getNumIterOperands() != opNumResults) + return emitOpError( "mismatch in number of loop-carried values and defined values"); - if (op.getNumRegionIterArgs() != opNumResults) - return op.emitOpError( + if (getNumRegionIterArgs() != opNumResults) + return emitOpError( "mismatch in number of basic block args and defined values"); - auto iterOperands = op.getIterOperands(); - auto iterArgs = op.getRegionIterArgs(); - auto opResults = - op.getFinalValue() ? op.getResults().drop_front() : op.getResults(); + auto iterOperands = getIterOperands(); + auto iterArgs = getRegionIterArgs(); + auto opResults = getFinalValue() ? getResults().drop_front() : getResults(); unsigned i = 0; for (auto e : llvm::zip(iterOperands, iterArgs, opResults)) { if (std::get<0>(e).getType() != std::get<2>(e).getType()) - return op.emitOpError() << "types mismatch between " << i - << "th iter operand and defined value"; + return emitOpError() << "types mismatch between " << i + << "th iter operand and defined value"; if (std::get<1>(e).getType() != std::get<2>(e).getType()) - return op.emitOpError() << "types mismatch between " << i - << "th iter region arg and defined value"; + return emitOpError() << "types mismatch between " << i + << "th iter region arg and defined value"; i++; } return mlir::success(); } -static void print(mlir::OpAsmPrinter &p, fir::IterWhileOp op) { - p << " (" << op.getInductionVar() << " = " << op.getLowerBound() << " to " - << op.getUpperBound() << " step " << op.getStep() << ") and ("; - assert(op.hasIterOperands()); - auto regionArgs = op.getRegionIterArgs(); - auto operands = op.getIterOperands(); +void fir::IterWhileOp::print(mlir::OpAsmPrinter &p) { + p << " (" << getInductionVar() << " = " << getLowerBound() << " to " + << getUpperBound() << " step " << getStep() << ") and ("; + assert(hasIterOperands()); + auto regionArgs = getRegionIterArgs(); + auto operands = getIterOperands(); p << regionArgs.front() << " = " << *operands.begin() << ")"; if (regionArgs.size() > 1) { p << " iter_args("; @@ -1750,15 +1749,15 @@ [&](auto it) { p << std::get<0>(it) << " = " << std::get<1>(it); }); p << ") -> ("; llvm::interleaveComma( - llvm::drop_begin(op.getResultTypes(), op.getFinalValue() ? 0 : 1), p); + llvm::drop_begin(getResultTypes(), getFinalValue() ? 0 : 1), p); p << ")"; - } else if (op.getFinalValue()) { - p << " -> (" << op.getResultTypes() << ')'; + } else if (getFinalValue()) { + p << " -> (" << getResultTypes() << ')'; } - p.printOptionalAttrDictWithKeyword(op->getAttrs(), - {op.getFinalValueAttrNameStr()}); + p.printOptionalAttrDictWithKeyword((*this)->getAttrs(), + {getFinalValueAttrNameStr()}); p << ' '; - p.printRegion(op.getRegion(), /*printEntryBlockArgs=*/false, + p.printRegion(getRegion(), /*printEntryBlockArgs=*/false, /*printBlockTerminators=*/true); } @@ -1909,7 +1908,7 @@ result.addAttributes(attributes); } -static mlir::ParseResult parseDoLoopOp(mlir::OpAsmParser &parser, +mlir::ParseResult fir::DoLoopOp::parse(mlir::OpAsmParser &parser, mlir::OperationState &result) { auto &builder = parser.getBuilder(); mlir::OpAsmParser::OperandType inductionVariable, lb, ub, step; @@ -1992,72 +1991,71 @@ return dyn_cast_or_null(containingInst); } -// Lifted from loop.loop -static mlir::LogicalResult verify(fir::DoLoopOp op) { +// Lifted from loloop +mlir::LogicalResult fir::DoLoopOp::verify() { // Check that the body defines as single block argument for the induction // variable. - auto *body = op.getBody(); + auto *body = getBody(); if (!body->getArgument(0).getType().isIndex()) - return op.emitOpError( + return emitOpError( "expected body first argument to be an index argument for " "the induction variable"); - auto opNumResults = op.getNumResults(); + auto opNumResults = getNumResults(); if (opNumResults == 0) return success(); - if (op.getFinalValue()) { - if (op.getUnordered()) - return op.emitOpError("unordered loop has no final value"); + if (getFinalValue()) { + if (getUnordered()) + return emitOpError("unordered loop has no final value"); opNumResults--; } - if (op.getNumIterOperands() != opNumResults) - return op.emitOpError( + if (getNumIterOperands() != opNumResults) + return emitOpError( "mismatch in number of loop-carried values and defined values"); - if (op.getNumRegionIterArgs() != opNumResults) - return op.emitOpError( + if (getNumRegionIterArgs() != opNumResults) + return emitOpError( "mismatch in number of basic block args and defined values"); - auto iterOperands = op.getIterOperands(); - auto iterArgs = op.getRegionIterArgs(); - auto opResults = - op.getFinalValue() ? op.getResults().drop_front() : op.getResults(); + auto iterOperands = getIterOperands(); + auto iterArgs = getRegionIterArgs(); + auto opResults = getFinalValue() ? getResults().drop_front() : getResults(); unsigned i = 0; for (auto e : llvm::zip(iterOperands, iterArgs, opResults)) { if (std::get<0>(e).getType() != std::get<2>(e).getType()) - return op.emitOpError() << "types mismatch between " << i - << "th iter operand and defined value"; + return emitOpError() << "types mismatch between " << i + << "th iter operand and defined value"; if (std::get<1>(e).getType() != std::get<2>(e).getType()) - return op.emitOpError() << "types mismatch between " << i - << "th iter region arg and defined value"; + return emitOpError() << "types mismatch between " << i + << "th iter region arg and defined value"; i++; } return success(); } -static void print(mlir::OpAsmPrinter &p, fir::DoLoopOp op) { +void fir::DoLoopOp::print(mlir::OpAsmPrinter &p) { bool printBlockTerminators = false; - p << ' ' << op.getInductionVar() << " = " << op.getLowerBound() << " to " - << op.getUpperBound() << " step " << op.getStep(); - if (op.getUnordered()) + p << ' ' << getInductionVar() << " = " << getLowerBound() << " to " + << getUpperBound() << " step " << getStep(); + if (getUnordered()) p << " unordered"; - if (op.hasIterOperands()) { + if (hasIterOperands()) { p << " iter_args("; - auto regionArgs = op.getRegionIterArgs(); - auto operands = op.getIterOperands(); + auto regionArgs = getRegionIterArgs(); + auto operands = getIterOperands(); llvm::interleaveComma(llvm::zip(regionArgs, operands), p, [&](auto it) { p << std::get<0>(it) << " = " << std::get<1>(it); }); - p << ") -> (" << op.getResultTypes() << ')'; + p << ") -> (" << getResultTypes() << ')'; printBlockTerminators = true; - } else if (op.getFinalValue()) { - p << " -> " << op.getResultTypes(); + } else if (getFinalValue()) { + p << " -> " << getResultTypes(); printBlockTerminators = true; } - p.printOptionalAttrDictWithKeyword(op->getAttrs(), + p.printOptionalAttrDictWithKeyword((*this)->getAttrs(), {"unordered", "finalValue"}); p << ' '; - p.printRegion(op.getRegion(), /*printEntryBlockArgs=*/false, + p.printRegion(getRegion(), /*printEntryBlockArgs=*/false, printBlockTerminators); } @@ -2325,6 +2323,98 @@ return attr.getNumElements(); } +template +static LogicalResult verifyIntegralSwitchTerminator(OpT op) { + if (!(op.getSelector().getType().template isa() || + op.getSelector().getType().template isa() || + op.getSelector().getType().template isa())) + return op.emitOpError("must be an integer"); + auto cases = + op->template getAttrOfType(op.getCasesAttr()).getValue(); + auto count = op.getNumDest(); + if (count == 0) + return op.emitOpError("must have at least one successor"); + if (op.getNumConditions() != count) + return op.emitOpError("number of cases and targets don't match"); + if (op.targetOffsetSize() != count) + return op.emitOpError("incorrect number of successor operand groups"); + for (decltype(count) i = 0; i != count; ++i) { + if (!(cases[i].template isa())) + return op.emitOpError("invalid case alternative"); + } + return mlir::success(); +} + +static mlir::ParseResult parseIntegralSwitchTerminator( + mlir::OpAsmParser &parser, mlir::OperationState &result, + llvm::StringRef casesAttr, llvm::StringRef operandSegmentAttr) { + mlir::OpAsmParser::OperandType selector; + mlir::Type type; + if (parseSelector(parser, result, selector, type)) + return mlir::failure(); + + llvm::SmallVector ivalues; + llvm::SmallVector dests; + llvm::SmallVector> destArgs; + while (true) { + mlir::Attribute ivalue; // Integer or Unit + mlir::Block *dest; + llvm::SmallVector destArg; + mlir::NamedAttrList temp; + if (parser.parseAttribute(ivalue, "i", temp) || parser.parseComma() || + parser.parseSuccessorAndUseList(dest, destArg)) + return mlir::failure(); + ivalues.push_back(ivalue); + dests.push_back(dest); + destArgs.push_back(destArg); + if (!parser.parseOptionalRSquare()) + break; + if (parser.parseComma()) + return mlir::failure(); + } + auto &bld = parser.getBuilder(); + result.addAttribute(casesAttr, bld.getArrayAttr(ivalues)); + llvm::SmallVector argOffs; + int32_t sumArgs = 0; + const auto count = dests.size(); + for (std::remove_const_t i = 0; i != count; ++i) { + result.addSuccessors(dests[i]); + result.addOperands(destArgs[i]); + auto argSize = destArgs[i].size(); + argOffs.push_back(argSize); + sumArgs += argSize; + } + result.addAttribute(operandSegmentAttr, + bld.getI32VectorAttr({1, 0, sumArgs})); + result.addAttribute(getTargetOffsetAttr(), bld.getI32VectorAttr(argOffs)); + return mlir::success(); +} + +template +static void printIntegralSwitchTerminator(OpT op, mlir::OpAsmPrinter &p) { + p << ' '; + p.printOperand(op.getSelector()); + p << " : " << op.getSelector().getType() << " ["; + auto cases = + op->template getAttrOfType(op.getCasesAttr()).getValue(); + auto count = op.getNumConditions(); + for (decltype(count) i = 0; i != count; ++i) { + if (i) + p << ", "; + auto &attr = cases[i]; + if (auto intAttr = attr.template dyn_cast_or_null()) + p << intAttr.getValue(); + else + p.printAttribute(attr); + p << ", "; + op.printSuccessorAtIndex(p, i); + } + p << ']'; + p.printOptionalAttrDict( + op->getAttrs(), {op.getCasesAttr(), getCompareOffsetAttr(), + getTargetOffsetAttr(), op.getOperandSegmentSizeAttr()}); +} + llvm::Optional fir::SelectOp::getCompareOperands(unsigned) { return {}; } @@ -2364,6 +2454,20 @@ getTargetOffsetAttr())); } +mlir::LogicalResult fir::SelectOp::verify() { + return verifyIntegralSwitchTerminator(*this); +} + +mlir::ParseResult fir::SelectOp::parse(mlir::OpAsmParser &parser, + mlir::OperationState &result) { + return parseIntegralSwitchTerminator(parser, result, getCasesAttr(), + getOperandSegmentSizeAttr()); +} + +void fir::SelectOp::print(mlir::OpAsmPrinter &p) { + printIntegralSwitchTerminator(*this, p); +} + //===----------------------------------------------------------------------===// // SelectCaseOp //===----------------------------------------------------------------------===// @@ -2684,6 +2788,20 @@ getTargetOffsetAttr())); } +LogicalResult fir::SelectRankOp::verify() { + return verifyIntegralSwitchTerminator(*this); +} + +mlir::ParseResult fir::SelectRankOp::parse(mlir::OpAsmParser &parser, + mlir::OperationState &result) { + return parseIntegralSwitchTerminator(parser, result, getCasesAttr(), + getOperandSegmentSizeAttr()); +} + +void fir::SelectRankOp::print(mlir::OpAsmPrinter &p) { + printIntegralSwitchTerminator(*this, p); +} + //===----------------------------------------------------------------------===// // SelectTypeOp //===----------------------------------------------------------------------===// @@ -3122,7 +3240,7 @@ } } -static mlir::ParseResult parseIfOp(OpAsmParser &parser, +mlir::ParseResult fir::IfOp::parse(OpAsmParser &parser, OperationState &result) { result.regions.reserve(2); mlir::Region *thenRegion = result.addRegion(); @@ -3154,32 +3272,32 @@ return mlir::success(); } -static LogicalResult verify(fir::IfOp op) { - if (op.getNumResults() != 0 && op.getElseRegion().empty()) - return op.emitOpError("must have an else block if defining values"); +LogicalResult fir::IfOp::verify() { + if (getNumResults() != 0 && getElseRegion().empty()) + return emitOpError("must have an else block if defining values"); return mlir::success(); } -static void print(mlir::OpAsmPrinter &p, fir::IfOp op) { +void fir::IfOp::print(mlir::OpAsmPrinter &p) { bool printBlockTerminators = false; - p << ' ' << op.getCondition(); - if (!op.getResults().empty()) { - p << " -> (" << op.getResultTypes() << ')'; + p << ' ' << getCondition(); + if (!getResults().empty()) { + p << " -> (" << getResultTypes() << ')'; printBlockTerminators = true; } p << ' '; - p.printRegion(op.getThenRegion(), /*printEntryBlockArgs=*/false, + p.printRegion(getThenRegion(), /*printEntryBlockArgs=*/false, printBlockTerminators); // Print the 'else' regions if it exists and has a block. - auto &otherReg = op.getElseRegion(); + auto &otherReg = getElseRegion(); if (!otherReg.empty()) { p << " else "; p.printRegion(otherReg, /*printEntryBlockArgs=*/false, printBlockTerminators); } - p.printOptionalAttrDict(op->getAttrs()); + p.printOptionalAttrDict((*this)->getAttrs()); } void fir::IfOp::resultToSourceOps(llvm::SmallVectorImpl &results, diff --git a/mlir/include/mlir/Dialect/GPU/GPUOps.td b/mlir/include/mlir/Dialect/GPU/GPUOps.td --- a/mlir/include/mlir/Dialect/GPU/GPUOps.td +++ b/mlir/include/mlir/Dialect/GPU/GPUOps.td @@ -901,7 +901,7 @@ `(` $dynamicSizes `)` (`` `[` $symbolOperands^ `]`)? attr-dict `:` type($memref) }]; - let verifier = [{ return ::verify(*this); }]; + let hasVerifier = 1; let hasCanonicalizer = 1; } diff --git a/mlir/include/mlir/IR/OpBase.td b/mlir/include/mlir/IR/OpBase.td --- a/mlir/include/mlir/IR/OpBase.td +++ b/mlir/include/mlir/IR/OpBase.td @@ -2460,12 +2460,6 @@ // provided. bit skipDefaultBuilders = 0; - // Custom parser and printer. - // NOTE: These fields are deprecated in favor of `assemblyFormat` or - // `hasCustomAssemblyFormat`, and are slated for deletion. - code parser = ?; - code printer = ?; - // Custom assembly format. /// This field corresponds to a declarative description of the assembly format /// for this operation. If populated, the `hasCustomAssemblyFormat` field is @@ -2495,12 +2489,6 @@ // region ops are verified. bit hasRegionVerifier = 0; - // A custom code block corresponding to the extra verification code of the - // operation. - // NOTE: This field is deprecated in favor of `hasVerifier` and is slated for - // deletion. - code verifier = ?; - // Whether this op has associated canonicalization patterns. bit hasCanonicalizer = 0; diff --git a/mlir/lib/Dialect/GPU/IR/GPUDialect.cpp b/mlir/lib/Dialect/GPU/IR/GPUDialect.cpp --- a/mlir/lib/Dialect/GPU/IR/GPUDialect.cpp +++ b/mlir/lib/Dialect/GPU/IR/GPUDialect.cpp @@ -1174,20 +1174,21 @@ // GPU_AllocOp //===----------------------------------------------------------------------===// -static LogicalResult verify(AllocOp op) { - auto memRefType = op.memref().getType().cast(); +LogicalResult AllocOp::verify() { + auto memRefType = memref().getType().cast(); - if (static_cast(op.dynamicSizes().size()) != + if (static_cast(dynamicSizes().size()) != memRefType.getNumDynamicDims()) - return op.emitOpError("dimension operand count does not equal memref " - "dynamic dimension count"); + return emitOpError("dimension operand count does not equal memref " + "dynamic dimension count"); unsigned numSymbols = 0; if (!memRefType.getLayout().isIdentity()) numSymbols = memRefType.getLayout().getAffineMap().getNumSymbols(); - if (op.symbolOperands().size() != numSymbols) - return op.emitOpError("symbol operand count does not equal memref symbol " - "count"); + if (symbolOperands().size() != numSymbols) { + return emitOpError( + "symbol operand count does not equal memref symbol count"); + } return success(); } diff --git a/mlir/tools/mlir-tblgen/OpDefinitionsGen.cpp b/mlir/tools/mlir-tblgen/OpDefinitionsGen.cpp --- a/mlir/tools/mlir-tblgen/OpDefinitionsGen.cpp +++ b/mlir/tools/mlir-tblgen/OpDefinitionsGen.cpp @@ -2137,59 +2137,28 @@ return; bool hasCppFormat = def.getValueAsBit("hasCustomAssemblyFormat"); - if (!hasStringAttribute(def, "parser") && !hasCppFormat) + if (!hasCppFormat) return; SmallVector paramList; paramList.emplace_back("::mlir::OpAsmParser &", "parser"); paramList.emplace_back("::mlir::OperationState &", "result"); - // If this uses the cpp format, only generate a declaration. - if (hasCppFormat) { - auto *method = opClass.declareStaticMethod("::mlir::ParseResult", "parse", - std::move(paramList)); - ERROR_IF_PRUNED(method, "parse", op); - return; - } - - PrintNote(op.getLoc(), - "`parser` and `printer` fields are deprecated and will be removed, " - "please use the `hasCustomAssemblyFormat` field instead"); - - auto *method = opClass.addStaticMethod("::mlir::ParseResult", "parse", - std::move(paramList)); + auto *method = opClass.declareStaticMethod("::mlir::ParseResult", "parse", + std::move(paramList)); ERROR_IF_PRUNED(method, "parse", op); - - FmtContext fctx; - fctx.addSubst("cppClass", opClass.getClassName()); - auto parser = def.getValueAsString("parser").ltrim().rtrim(" \t\v\f\r"); - method->body() << " " << tgfmt(parser, &fctx); } void OpEmitter::genPrinter() { if (hasStringAttribute(def, "assemblyFormat")) return; - // If this uses the cpp format, only generate a declaration. - if (def.getValueAsBit("hasCustomAssemblyFormat")) { - auto *method = opClass.declareMethod( - "void", "print", MethodParameter("::mlir::OpAsmPrinter &", "p")); - ERROR_IF_PRUNED(method, "print", op); + // Check to see if this op uses a c++ format. + if (!def.getValueAsBit("hasCustomAssemblyFormat")) return; - } - - auto *valueInit = def.getValueInit("printer"); - StringInit *stringInit = dyn_cast(valueInit); - if (!stringInit) - return; - - auto *method = opClass.addMethod( + auto *method = opClass.declareMethod( "void", "print", MethodParameter("::mlir::OpAsmPrinter &", "p")); ERROR_IF_PRUNED(method, "print", op); - FmtContext fctx; - fctx.addSubst("cppClass", opClass.getClassName()); - auto printer = stringInit->getValue().ltrim().rtrim(" \t\v\f\r"); - method->body() << " " << tgfmt(printer, &fctx); } /// Generate verification on native traits requiring attributes. @@ -2272,14 +2241,10 @@ // This may not act as their expectation because this doesn't call any // verifiers of native/interface traits. Needs to review those use cases and // see if we should use the mlir::verify() instead. - auto *valueInit = def.getValueInit("verifier"); - StringInit *stringInit = dyn_cast(valueInit); - bool hasCustomVerifyCodeBlock = stringInit && !stringInit->getValue().empty(); - auto *method = opClass.addMethod("::mlir::LogicalResult", "verifyInvariants"); ERROR_IF_PRUNED(method, "verifyInvariants", op); auto &body = method->body(); - if (hasCustomVerifyCodeBlock || def.getValueAsBit("hasVerifier")) { + if (def.getValueAsBit("hasVerifier")) { body << " if(::mlir::succeeded(verifyInvariantsImpl()) && " "::mlir::succeeded(verify()))\n"; body << " return ::mlir::success();\n"; @@ -2290,10 +2255,6 @@ } void OpEmitter::genCustomVerifier() { - auto *valueInit = def.getValueInit("verifier"); - StringInit *stringInit = dyn_cast(valueInit); - bool hasCustomVerifyCodeBlock = stringInit && !stringInit->getValue().empty(); - if (def.getValueAsBit("hasVerifier")) { auto *method = opClass.declareMethod("::mlir::LogicalResult", "verify"); ERROR_IF_PRUNED(method, "verify", op); @@ -2301,15 +2262,6 @@ auto *method = opClass.declareMethod("::mlir::LogicalResult", "verifyRegions"); ERROR_IF_PRUNED(method, "verifyRegions", op); - } else if (hasCustomVerifyCodeBlock) { - auto *method = opClass.addMethod("::mlir::LogicalResult", "verify"); - ERROR_IF_PRUNED(method, "verify", op); - auto &body = method->body(); - - FmtContext fctx; - fctx.addSubst("cppClass", opClass.getClassName()); - auto printer = stringInit->getValue().ltrim().rtrim(" \t\v\f\r"); - body << " " << tgfmt(printer, &fctx); } }