Index: clang/test/CodeGen/X86/ms_fmul.c
===================================================================
--- clang/test/CodeGen/X86/ms_fmul.c
+++ clang/test/CodeGen/X86/ms_fmul.c
@@ -18,4 +18,4 @@
 }}
 
 // CHECK-LABEL: foo
-// CHECK: call void asm sideeffect inteldialect "fmul qword ptr static_const_table[edx + $$240]\0A\09ret"
+// CHECK: call void asm sideeffect inteldialect "fmul qword ptr $0[edx + $$240]\0A\09ret"
Index: clang/test/CodeGen/ms-inline-asm-static-variable.c
===================================================================
--- clang/test/CodeGen/ms-inline-asm-static-variable.c
+++ clang/test/CodeGen/ms-inline-asm-static-variable.c
@@ -5,6 +5,6 @@
 static int arr[10];
 void t1(void) {
   // CHECK: @arr = internal global [10 x i32]
-  // CHECK: call void asm sideeffect inteldialect "mov dword ptr arr[edx * $$4],edx", "=*m,{{.*}}([10 x i32]* elementtype([10 x i32]) @arr)
+  // CHECK: call void asm sideeffect inteldialect "mov dword ptr $0[edx * $$4],edx", "=*m,{{.*}}([10 x i32]* elementtype([10 x i32]) @arr)
   __asm mov  dword ptr arr[edx*4],edx
 }
Index: clang/test/CodeGen/ms-inline-asm-variables.c
===================================================================
--- clang/test/CodeGen/ms-inline-asm-variables.c
+++ clang/test/CodeGen/ms-inline-asm-variables.c
@@ -2,20 +2,20 @@
 // RUN: %clang_cc1 %s -fasm-blocks -triple i386-apple-darwin10 -emit-llvm -o - | FileCheck %s
 
 int gVar;
-void t1(void) {
-  // CHECK: add eax, dword ptr gVar[eax]
+void t1() {
+  // CHECK: add eax, dword ptr ${{[0-9]}}[eax]
   __asm add eax, dword ptr gVar[eax]
-  // CHECK: add dword ptr gVar[eax], eax
+  // CHECK: add dword ptr ${{[0-9]}}[eax], eax
   __asm add dword ptr [eax+gVar], eax
-  // CHECK: add ebx, dword ptr gVar[ebx + $$270]
+  // CHECK: add ebx, dword ptr ${{[0-9]}}[ebx + $$270]
   __asm add ebx, dword ptr gVar[271 - 82 + 81 + ebx]
-  // CHECK: add dword ptr gVar[ebx + $$828], ebx
+  // CHECK: add dword ptr ${{[0-9]}}[ebx + $$828], ebx
   __asm add dword ptr [ebx + gVar + 828], ebx
-  // CHECK: add ecx, dword ptr gVar[ecx + ecx * $$4 + $$4590]
+  // CHECK: add ecx, dword ptr ${{[0-9]}}[ecx + ecx * $$4 + $$4590]
   __asm add ecx, dword ptr gVar[4590 + ecx + ecx*4]
-  // CHECK: add dword ptr gVar[ecx + ecx * $$8 + $$73], ecx
+  // CHECK: add dword ptr ${{[0-9]}}[ecx + ecx * $$8 + $$73], ecx
   __asm add dword ptr [gVar + ecx + 45 + 23 - 53 + 60 - 2 + ecx*8], ecx
-  // CHECK: add gVar[ecx + ebx + $$7], eax
+  // CHECK: add ${{[0-9]}}[ecx + ebx + $$7], eax
   __asm add 1 + 1 + 2 + 3[gVar + ecx + ebx], eax
 }
 
Index: llvm/include/llvm/MC/MCParser/MCParsedAsmOperand.h
===================================================================
--- llvm/include/llvm/MC/MCParser/MCParsedAsmOperand.h
+++ llvm/include/llvm/MC/MCParser/MCParsedAsmOperand.h
@@ -10,7 +10,6 @@
 #define LLVM_MC_MCPARSER_MCPARSEDASMOPERAND_H
 
 #include "llvm/ADT/StringRef.h"
-#include "llvm/MC/MCInstrDesc.h"
 #include "llvm/Support/SMLoc.h"
 #include <string>
 
@@ -77,10 +76,6 @@
   /// assembly.
   virtual bool isOffsetOfLocal() const { return false; }
 
-  /// isMemPlaceholder - Do we need to ignore the constraint, rather than emit
-  /// code? Only valid when parsing MS-style inline assembly.
-  virtual bool isMemPlaceholder(const MCInstrDesc &Desc) const { return false; }
-
   /// getOffsetOfLoc - Get the location of the offset operator.
   virtual SMLoc getOffsetOfLoc() const { return SMLoc(); }
 
Index: llvm/lib/MC/MCParser/AsmParser.cpp
===================================================================
--- llvm/lib/MC/MCParser/AsmParser.cpp
+++ llvm/lib/MC/MCParser/AsmParser.cpp
@@ -6022,13 +6022,12 @@
 
       bool isOutput = (i == 1) && Desc.mayStore();
       SMLoc Start = SMLoc::getFromPointer(SymName.data());
-      int64_t Size = Operand.isMemPlaceholder(Desc) ? 0 : SymName.size();
       if (isOutput) {
         ++InputIdx;
         OutputDecls.push_back(OpDecl);
         OutputDeclsAddressOf.push_back(Operand.needAddressOf());
         OutputConstraints.push_back(("=" + Constraint).str());
-        AsmStrRewrites.emplace_back(AOK_Output, Start, Size);
+        AsmStrRewrites.emplace_back(AOK_Output, Start, SymName.size());
       } else {
         InputDecls.push_back(OpDecl);
         InputDeclsAddressOf.push_back(Operand.needAddressOf());
@@ -6036,7 +6035,7 @@
         if (Desc.OpInfo[i - 1].isBranchTarget())
           AsmStrRewrites.emplace_back(AOK_CallInput, Start, SymName.size());
         else
-          AsmStrRewrites.emplace_back(AOK_Input, Start, Size);
+          AsmStrRewrites.emplace_back(AOK_Input, Start, SymName.size());
       }
     }
 
@@ -6151,17 +6150,13 @@
       OS << Ctx.getAsmInfo()->getPrivateLabelPrefix() << AR.Label;
       break;
     case AOK_Input:
-      if (AR.Len)
-        OS << '$' << InputIdx;
-      ++InputIdx;
+      OS << '$' << InputIdx++;
       break;
     case AOK_CallInput:
       OS << "${" << InputIdx++ << ":P}";
       break;
     case AOK_Output:
-      if (AR.Len)
-        OS << '$' << OutputIdx;
-      ++OutputIdx;
+      OS << '$' << OutputIdx++;
       break;
     case AOK_SizeDirective:
       switch (AR.Val) {
Index: llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp
===================================================================
--- llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp
+++ llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp
@@ -1759,8 +1759,7 @@
   // registers in a mmory expression, and though unaccessible via rip/eip.
   if (IsGlobalLV && (BaseReg || IndexReg)) {
     Operands.push_back(X86Operand::CreateMem(getPointerWidth(), Disp, Start,
-                                             End, Size, Identifier, Decl,
-                                             FrontendSize));
+                                             End, Size, Identifier, Decl));
     return false;
   }
   // Otherwise, we set the base register to a non-zero value
@@ -2552,6 +2551,8 @@
   StringRef ErrMsg;
   unsigned BaseReg = SM.getBaseReg();
   unsigned IndexReg = SM.getIndexReg();
+  if (IndexReg && BaseReg == X86::RIP)
+    BaseReg = 0;
   unsigned Scale = SM.getScale();
   if (!PtrInOperand)
     Size = SM.getElementSize() << 3;
Index: llvm/lib/Target/X86/AsmParser/X86Operand.h
===================================================================
--- llvm/lib/Target/X86/AsmParser/X86Operand.h
+++ llvm/lib/Target/X86/AsmParser/X86Operand.h
@@ -287,12 +287,6 @@
 
   bool isOffsetOfLocal() const override { return isImm() && Imm.LocalRef; }
 
-  bool isMemPlaceholder(const MCInstrDesc &Desc) const override {
-    // Only MS InlineAsm uses global variables with registers rather than
-    // rip/eip.
-    return isMem() && !Mem.DefaultBaseReg && Mem.FrontendSize;
-  }
-
   bool needAddressOf() const override { return AddressOf; }
 
   bool isMem() const override { return Kind == Memory; }
Index: llvm/test/CodeGen/X86/ms-inline-asm-array.ll
===================================================================
--- llvm/test/CodeGen/X86/ms-inline-asm-array.ll
+++ llvm/test/CodeGen/X86/ms-inline-asm-array.ll
@@ -5,7 +5,7 @@
 ; CHECK: movl    %edx, arr(,%rdx,4)
 define dso_local i32 @main() #0 {
 entry:
-  call void asm sideeffect inteldialect "mov dword ptr arr[rdx * $$4],edx", "=*m,~{dirflag},~{fpsr},~{flags}"([10 x i32]* elementtype([10 x i32]) @arr) #1, !srcloc !4
+  call void asm sideeffect inteldialect "mov dword ptr $0[rdx * $$4],edx", "=*m,~{dirflag},~{fpsr},~{flags}"([10 x i32]* elementtype([10 x i32]) @arr) #1, !srcloc !4
   ret i32 0
 }