diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp --- a/llvm/lib/Target/X86/X86ISelLowering.cpp +++ b/llvm/lib/Target/X86/X86ISelLowering.cpp @@ -5303,24 +5303,51 @@ SelectionDAG &DAG) { if (!isFP) { if (ConstantSDNode *RHSC = dyn_cast(RHS)) { - if (SetCCOpcode == ISD::SETGT && RHSC->isAllOnes()) { + const APInt &RHSV = RHSC->getAPIntValue(); + + if (SetCCOpcode == ISD::SETGT && RHSV.isAllOnes()) { // X > -1 -> X == 0, jump !sign. RHS = DAG.getConstant(0, DL, RHS.getValueType()); return X86::COND_NS; } - if (SetCCOpcode == ISD::SETLT && RHSC->isZero()) { + if (SetCCOpcode == ISD::SETLT && RHSV.isZero()) { // X < 0 -> X == 0, jump on sign. return X86::COND_S; } - if (SetCCOpcode == ISD::SETGE && RHSC->isZero()) { + if (SetCCOpcode == ISD::SETGE && RHSV.isZero()) { // X >= 0 -> X == 0, jump on !sign. return X86::COND_NS; } - if (SetCCOpcode == ISD::SETLT && RHSC->isOne()) { + if (SetCCOpcode == ISD::SETLT && RHSV.isOne()) { // X < 1 -> X <= 0 RHS = DAG.getConstant(0, DL, RHS.getValueType()); return X86::COND_LE; } + + // Attempt to canonicalize SGT/UGT -> SGE/UGE compares with constant which + // reduces the number of EFLAGs bit reads (the GE conditions don't read + // ZF), this may translate to less uops depending on uarch implementation. + // The equivalent for SLE/ULE -> SLT/ULT isn't likely to happen as we + // already canonicalize to that CondCode. + // + // NOTE: Only do this if incrementing the constant doesn't increase the + // bit encoding size - so it must either already be a i8 or i32 immediate, + // or it shrinks down to that. We don't do this for any i64's to avoid + // additional constant materializations. + if (!RHSV.isZero()) { + // Ensure the constant+1 doesn't overflow. + if ((SetCCOpcode == ISD::CondCode::SETGT && !RHSV.isMaxSignedValue()) || + (SetCCOpcode == ISD::CondCode::SETUGT && !RHSV.isMaxValue())) { + APInt RHSValPlusOne = RHSV + 1; + if (RHSValPlusOne.isSignedIntN(32) && + (!RHSV.isSignedIntN(8) || RHSValPlusOne.isSignedIntN(8))) { + RHS = DAG.getConstant(RHSValPlusOne, DL, RHS.getValueType()); + return TranslateIntegerX86CC(SetCCOpcode == ISD::CondCode::SETGT + ? ISD::CondCode::SETGE + : ISD::CondCode::SETUGE); + } + } + } } return TranslateIntegerX86CC(SetCCOpcode); @@ -24367,33 +24394,6 @@ } if (Op0.getSimpleValueType().isInteger()) { - // Attempt to canonicalize SGT/UGT -> SGE/UGE compares with constant which - // reduces the number of EFLAGs bit reads (the GE conditions don't read ZF), - // this may translate to less uops depending on uarch implementation. The - // equivalent for SLE/ULE -> SLT/ULT isn't likely to happen as we already - // canonicalize to that CondCode. - // NOTE: Only do this if incrementing the constant doesn't increase the bit - // encoding size - so it must either already be a i8 or i32 immediate, or it - // shrinks down to that. We don't do this for any i64's to avoid additional - // constant materializations. - // TODO: Can we move this to TranslateX86CC to handle jumps/branches too? - if (auto *Op1C = dyn_cast(Op1)) { - const APInt &Op1Val = Op1C->getAPIntValue(); - if (!Op1Val.isZero()) { - // Ensure the constant+1 doesn't overflow. - if ((CC == ISD::CondCode::SETGT && !Op1Val.isMaxSignedValue()) || - (CC == ISD::CondCode::SETUGT && !Op1Val.isMaxValue())) { - APInt Op1ValPlusOne = Op1Val + 1; - if (Op1ValPlusOne.isSignedIntN(32) && - (!Op1Val.isSignedIntN(8) || Op1ValPlusOne.isSignedIntN(8))) { - Op1 = DAG.getConstant(Op1ValPlusOne, dl, Op0.getValueType()); - CC = CC == ISD::CondCode::SETGT ? ISD::CondCode::SETGE - : ISD::CondCode::SETUGE; - } - } - } - } - SDValue X86CC; SDValue EFLAGS = emitFlagsForSetcc(Op0, Op1, CC, dl, DAG, X86CC); SDValue Res = DAG.getNode(X86ISD::SETCC, dl, MVT::i8, X86CC, EFLAGS); diff --git a/llvm/test/CodeGen/X86/2006-10-10-FindModifiedNodeSlotBug.ll b/llvm/test/CodeGen/X86/2006-10-10-FindModifiedNodeSlotBug.ll --- a/llvm/test/CodeGen/X86/2006-10-10-FindModifiedNodeSlotBug.ll +++ b/llvm/test/CodeGen/X86/2006-10-10-FindModifiedNodeSlotBug.ll @@ -11,8 +11,8 @@ ; CHECK-NEXT: movzbl %al, %ecx ; CHECK-NEXT: movl tree_code_type(,%ecx,4), %ecx ; CHECK-NEXT: decl %ecx -; CHECK-NEXT: cmpl $2, %ecx -; CHECK-NEXT: ja .LBB0_2 +; CHECK-NEXT: cmpl $3, %ecx +; CHECK-NEXT: jae .LBB0_2 ; CHECK-NEXT: # %bb.1: # %cond_true ; CHECK-NEXT: shrl $31, %eax ; CHECK-NEXT: testb %al, %al diff --git a/llvm/test/CodeGen/X86/2006-11-17-IllegalMove.ll b/llvm/test/CodeGen/X86/2006-11-17-IllegalMove.ll --- a/llvm/test/CodeGen/X86/2006-11-17-IllegalMove.ll +++ b/llvm/test/CodeGen/X86/2006-11-17-IllegalMove.ll @@ -6,8 +6,8 @@ ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: movl 0, %eax ; CHECK-NEXT: decl %eax -; CHECK-NEXT: cmpl $1, %eax -; CHECK-NEXT: ja .LBB0_2 +; CHECK-NEXT: cmpl $2, %eax +; CHECK-NEXT: jae .LBB0_2 ; CHECK-NEXT: # %bb.1: # %bb77 ; CHECK-NEXT: movb 0, %al ; CHECK-NEXT: movb 0, %al diff --git a/llvm/test/CodeGen/X86/2008-04-17-CoalescerBug.ll b/llvm/test/CodeGen/X86/2008-04-17-CoalescerBug.ll --- a/llvm/test/CodeGen/X86/2008-04-17-CoalescerBug.ll +++ b/llvm/test/CodeGen/X86/2008-04-17-CoalescerBug.ll @@ -68,8 +68,8 @@ ; CHECK-NEXT: ## %bb.7: ## %bb3314 ; CHECK-NEXT: ## in Loop: Header=BB0_5 Depth=1 ; CHECK-NEXT: movl 0, %eax -; CHECK-NEXT: cmpl $121, %eax -; CHECK-NEXT: ja LBB0_25 +; CHECK-NEXT: cmpl $122, %eax +; CHECK-NEXT: jae LBB0_25 ; CHECK-NEXT: ## %bb.8: ## %bb3314 ; CHECK-NEXT: ## in Loop: Header=BB0_5 Depth=1 ; CHECK-NEXT: jmpl *LJTI0_0(,%eax,4) diff --git a/llvm/test/CodeGen/X86/2009-08-12-badswitch.ll b/llvm/test/CodeGen/X86/2009-08-12-badswitch.ll --- a/llvm/test/CodeGen/X86/2009-08-12-badswitch.ll +++ b/llvm/test/CodeGen/X86/2009-08-12-badswitch.ll @@ -35,8 +35,8 @@ ; CHECK: ## %bb.0: ## %entry ; CHECK-NEXT: pushq %rax ; CHECK-NEXT: addq $-2, %rdi -; CHECK-NEXT: cmpq $25, %rdi -; CHECK-NEXT: ja LBB0_2 +; CHECK-NEXT: cmpq $26, %rdi +; CHECK-NEXT: jae LBB0_2 ; CHECK-NEXT: ## %bb.1: ## %bb49 ; CHECK-NEXT: leaq LJTI0_0(%rip), %rax ; CHECK-NEXT: movslq (%rax,%rdi,4), %rcx diff --git a/llvm/test/CodeGen/X86/avx512-broadcast-unfold.ll b/llvm/test/CodeGen/X86/avx512-broadcast-unfold.ll --- a/llvm/test/CodeGen/X86/avx512-broadcast-unfold.ll +++ b/llvm/test/CodeGen/X86/avx512-broadcast-unfold.ll @@ -3786,8 +3786,8 @@ ; CHECK-NEXT: vpbroadcastd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1 {%k1} ; CHECK-NEXT: vmovdqu %xmm1, (%rdi,%rax,4) ; CHECK-NEXT: addq $4, %rax -; CHECK-NEXT: cmpq $1023, %rax # imm = 0x3FF -; CHECK-NEXT: jg .LBB108_1 +; CHECK-NEXT: cmpq $1024, %rax # imm = 0x400 +; CHECK-NEXT: jge .LBB108_1 ; CHECK-NEXT: # %bb.2: # %bb10 ; CHECK-NEXT: retq bb: @@ -3823,8 +3823,8 @@ ; CHECK-NEXT: vpbroadcastd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %ymm1 {%k1} ; CHECK-NEXT: vmovdqu %ymm1, (%rdi,%rax,4) ; CHECK-NEXT: addq $8, %rax -; CHECK-NEXT: cmpq $1023, %rax # imm = 0x3FF -; CHECK-NEXT: jg .LBB109_1 +; CHECK-NEXT: cmpq $1024, %rax # imm = 0x400 +; CHECK-NEXT: jge .LBB109_1 ; CHECK-NEXT: # %bb.2: # %bb10 ; CHECK-NEXT: vzeroupper ; CHECK-NEXT: retq @@ -3861,8 +3861,8 @@ ; CHECK-NEXT: vpbroadcastd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %zmm1 {%k1} ; CHECK-NEXT: vmovdqu64 %zmm1, (%rdi,%rax,4) ; CHECK-NEXT: addq $16, %rax -; CHECK-NEXT: cmpq $1023, %rax # imm = 0x3FF -; CHECK-NEXT: jg .LBB110_1 +; CHECK-NEXT: cmpq $1024, %rax # imm = 0x400 +; CHECK-NEXT: jge .LBB110_1 ; CHECK-NEXT: # %bb.2: # %bb10 ; CHECK-NEXT: vzeroupper ; CHECK-NEXT: retq @@ -3899,8 +3899,8 @@ ; CHECK-NEXT: vmovdqa64 {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1 {%k1} ; CHECK-NEXT: vmovdqu %xmm1, (%rdi,%rax,8) ; CHECK-NEXT: addq $2, %rax -; CHECK-NEXT: cmpq $1023, %rax # imm = 0x3FF -; CHECK-NEXT: jg .LBB111_1 +; CHECK-NEXT: cmpq $1024, %rax # imm = 0x400 +; CHECK-NEXT: jge .LBB111_1 ; CHECK-NEXT: # %bb.2: # %bb10 ; CHECK-NEXT: retq bb: @@ -3935,8 +3935,8 @@ ; CHECK-NEXT: vpbroadcastq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %ymm1 {%k1} ; CHECK-NEXT: vmovdqu %ymm1, (%rdi,%rax,8) ; CHECK-NEXT: addq $4, %rax -; CHECK-NEXT: cmpq $1023, %rax # imm = 0x3FF -; CHECK-NEXT: jg .LBB112_1 +; CHECK-NEXT: cmpq $1024, %rax # imm = 0x400 +; CHECK-NEXT: jge .LBB112_1 ; CHECK-NEXT: # %bb.2: # %bb10 ; CHECK-NEXT: vzeroupper ; CHECK-NEXT: retq @@ -3973,8 +3973,8 @@ ; CHECK-NEXT: vpbroadcastq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %zmm1 {%k1} ; CHECK-NEXT: vmovdqu64 %zmm1, (%rdi,%rax,8) ; CHECK-NEXT: addq $8, %rax -; CHECK-NEXT: cmpq $1023, %rax # imm = 0x3FF -; CHECK-NEXT: jg .LBB113_1 +; CHECK-NEXT: cmpq $1024, %rax # imm = 0x400 +; CHECK-NEXT: jge .LBB113_1 ; CHECK-NEXT: # %bb.2: # %bb10 ; CHECK-NEXT: vzeroupper ; CHECK-NEXT: retq @@ -4011,8 +4011,8 @@ ; CHECK-NEXT: vpbroadcastd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1 {%k1} ; CHECK-NEXT: vmovdqu %xmm1, (%rdi,%rax,4) ; CHECK-NEXT: addq $4, %rax -; CHECK-NEXT: cmpq $1023, %rax # imm = 0x3FF -; CHECK-NEXT: ja .LBB114_1 +; CHECK-NEXT: cmpq $1024, %rax # imm = 0x400 +; CHECK-NEXT: jae .LBB114_1 ; CHECK-NEXT: # %bb.2: # %bb10 ; CHECK-NEXT: retq bb: @@ -4048,8 +4048,8 @@ ; CHECK-NEXT: vpbroadcastd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %ymm1 {%k1} ; CHECK-NEXT: vmovdqu %ymm1, (%rdi,%rax,4) ; CHECK-NEXT: addq $8, %rax -; CHECK-NEXT: cmpq $1023, %rax # imm = 0x3FF -; CHECK-NEXT: ja .LBB115_1 +; CHECK-NEXT: cmpq $1024, %rax # imm = 0x400 +; CHECK-NEXT: jae .LBB115_1 ; CHECK-NEXT: # %bb.2: # %bb10 ; CHECK-NEXT: vzeroupper ; CHECK-NEXT: retq @@ -4086,8 +4086,8 @@ ; CHECK-NEXT: vpbroadcastd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %zmm1 {%k1} ; CHECK-NEXT: vmovdqu64 %zmm1, (%rdi,%rax,4) ; CHECK-NEXT: addq $16, %rax -; CHECK-NEXT: cmpq $1023, %rax # imm = 0x3FF -; CHECK-NEXT: ja .LBB116_1 +; CHECK-NEXT: cmpq $1024, %rax # imm = 0x400 +; CHECK-NEXT: jae .LBB116_1 ; CHECK-NEXT: # %bb.2: # %bb10 ; CHECK-NEXT: vzeroupper ; CHECK-NEXT: retq @@ -4124,8 +4124,8 @@ ; CHECK-NEXT: vmovdqa64 {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1 {%k1} ; CHECK-NEXT: vmovdqu %xmm1, (%rdi,%rax,8) ; CHECK-NEXT: addq $2, %rax -; CHECK-NEXT: cmpq $1023, %rax # imm = 0x3FF -; CHECK-NEXT: ja .LBB117_1 +; CHECK-NEXT: cmpq $1024, %rax # imm = 0x400 +; CHECK-NEXT: jae .LBB117_1 ; CHECK-NEXT: # %bb.2: # %bb10 ; CHECK-NEXT: retq bb: @@ -4160,8 +4160,8 @@ ; CHECK-NEXT: vpbroadcastq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %ymm1 {%k1} ; CHECK-NEXT: vmovdqu %ymm1, (%rdi,%rax,8) ; CHECK-NEXT: addq $4, %rax -; CHECK-NEXT: cmpq $1023, %rax # imm = 0x3FF -; CHECK-NEXT: ja .LBB118_1 +; CHECK-NEXT: cmpq $1024, %rax # imm = 0x400 +; CHECK-NEXT: jae .LBB118_1 ; CHECK-NEXT: # %bb.2: # %bb10 ; CHECK-NEXT: vzeroupper ; CHECK-NEXT: retq @@ -4198,8 +4198,8 @@ ; CHECK-NEXT: vpbroadcastq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %zmm1 {%k1} ; CHECK-NEXT: vmovdqu64 %zmm1, (%rdi,%rax,8) ; CHECK-NEXT: addq $8, %rax -; CHECK-NEXT: cmpq $1023, %rax # imm = 0x3FF -; CHECK-NEXT: ja .LBB119_1 +; CHECK-NEXT: cmpq $1024, %rax # imm = 0x400 +; CHECK-NEXT: jae .LBB119_1 ; CHECK-NEXT: # %bb.2: # %bb10 ; CHECK-NEXT: vzeroupper ; CHECK-NEXT: retq diff --git a/llvm/test/CodeGen/X86/extend-set-cc-uses-dbg.ll b/llvm/test/CodeGen/X86/extend-set-cc-uses-dbg.ll --- a/llvm/test/CodeGen/X86/extend-set-cc-uses-dbg.ll +++ b/llvm/test/CodeGen/X86/extend-set-cc-uses-dbg.ll @@ -9,7 +9,7 @@ ; CHECK: $eax = MOV32rm killed {{.*}} $rdi, {{.*}} debug-location !7 :: (load (s32) from %ir.p) ; CHECK-NEXT: $rax = KILL killed renamable $eax, debug-location !7 ; CHECK-NEXT: MOV64mr $rsp, 1, $noreg, -8, $noreg, $rax :: (store (s64) into %stack.0) - ; CHECK-NEXT: SUB64ri8 renamable $rax, 3, implicit-def $eflags, debug-location !7 + ; CHECK-NEXT: SUB64ri8 renamable $rax, 4, implicit-def $eflags, debug-location !7 switch i32 %tmp, label %bb7 [ i32 0, label %bb1 diff --git a/llvm/test/CodeGen/X86/loop-blocks.ll b/llvm/test/CodeGen/X86/loop-blocks.ll --- a/llvm/test/CodeGen/X86/loop-blocks.ll +++ b/llvm/test/CodeGen/X86/loop-blocks.ll @@ -85,8 +85,8 @@ ; CHECK-NEXT: jge .LBB2_2 ; CHECK-NEXT: callq bar99 ; CHECK-NEXT: callq get -; CHECK-NEXT: cmpl $2999, %eax -; CHECK-NEXT: jg .LBB2_6 +; CHECK-NEXT: cmpl $3000, %eax +; CHECK-NEXT: jge .LBB2_6 ; CHECK-NEXT: callq block_a_true_func ; CHECK-NEXT: callq block_a_merge_func ; CHECK-NEXT: jmp .LBB2_1 diff --git a/llvm/test/CodeGen/X86/loop-strength-reduce7.ll b/llvm/test/CodeGen/X86/loop-strength-reduce7.ll --- a/llvm/test/CodeGen/X86/loop-strength-reduce7.ll +++ b/llvm/test/CodeGen/X86/loop-strength-reduce7.ll @@ -25,8 +25,8 @@ ; CHECK-NEXT: ## => This Inner Loop Header: Depth=2 ; CHECK-NEXT: incl %edx ; CHECK-NEXT: addl $12, %esi -; CHECK-NEXT: cmpl $11, %edx -; CHECK-NEXT: jbe LBB0_3 +; CHECK-NEXT: cmpl $12, %edx +; CHECK-NEXT: jb LBB0_3 ; CHECK-NEXT: ## %bb.1: ## %bb28.i37.loopexit ; CHECK-NEXT: ## in Loop: Header=BB0_2 Depth=1 ; CHECK-NEXT: addl $4, %eax diff --git a/llvm/test/CodeGen/X86/machine-cse.ll b/llvm/test/CodeGen/X86/machine-cse.ll --- a/llvm/test/CodeGen/X86/machine-cse.ll +++ b/llvm/test/CodeGen/X86/machine-cse.ll @@ -53,8 +53,8 @@ ; CHECK-NEXT: # kill: def $esi killed $esi def $rsi ; CHECK-NEXT: # kill: def $edi killed $edi def $rdi ; CHECK-NEXT: leal -1(%rdi), %eax -; CHECK-NEXT: cmpl $2, %eax -; CHECK-NEXT: ja .LBB1_4 +; CHECK-NEXT: cmpl $3, %eax +; CHECK-NEXT: jae .LBB1_4 ; CHECK-NEXT: # %bb.1: # %sw.bb ; CHECK-NEXT: xorl %eax, %eax ; CHECK-NEXT: testb %al, %al diff --git a/llvm/test/CodeGen/X86/mul-constant-result.ll b/llvm/test/CodeGen/X86/mul-constant-result.ll --- a/llvm/test/CodeGen/X86/mul-constant-result.ll +++ b/llvm/test/CodeGen/X86/mul-constant-result.ll @@ -27,8 +27,8 @@ ; X86-NEXT: movl %esi, %eax ; X86-NEXT: .LBB0_4: ; X86-NEXT: decl %ecx -; X86-NEXT: cmpl $31, %ecx -; X86-NEXT: ja .LBB0_7 +; X86-NEXT: cmpl $32, %ecx +; X86-NEXT: jae .LBB0_7 ; X86-NEXT: # %bb.5: ; X86-NEXT: jmpl *.LJTI0_0(,%ecx,4) ; X86-NEXT: .LBB0_6: @@ -195,8 +195,8 @@ ; X64-HSW-NEXT: testl %esi, %esi ; X64-HSW-NEXT: cmovel %ecx, %eax ; X64-HSW-NEXT: decl %edi -; X64-HSW-NEXT: cmpl $31, %edi -; X64-HSW-NEXT: ja .LBB0_3 +; X64-HSW-NEXT: cmpl $32, %edi +; X64-HSW-NEXT: jae .LBB0_3 ; X64-HSW-NEXT: # %bb.1: ; X64-HSW-NEXT: jmpq *.LJTI0_0(,%rdi,8) ; X64-HSW-NEXT: .LBB0_2: diff --git a/llvm/test/CodeGen/X86/optimize-max-0.ll b/llvm/test/CodeGen/X86/optimize-max-0.ll --- a/llvm/test/CodeGen/X86/optimize-max-0.ll +++ b/llvm/test/CodeGen/X86/optimize-max-0.ll @@ -65,8 +65,8 @@ ; CHECK-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx ## 4-byte Reload ; CHECK-NEXT: addl %ecx, %eax ; CHECK-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Spill -; CHECK-NEXT: cmpl $1, %edi -; CHECK-NEXT: jle LBB0_13 +; CHECK-NEXT: cmpl $2, %edi +; CHECK-NEXT: jl LBB0_13 ; CHECK-NEXT: ## %bb.7: ## %bb.nph5 ; CHECK-NEXT: cmpl $2, %ebp ; CHECK-NEXT: jl LBB0_13 @@ -500,8 +500,8 @@ ; CHECK-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx ## 4-byte Reload ; CHECK-NEXT: addl %ecx, %eax ; CHECK-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Spill -; CHECK-NEXT: cmpl $1, %ebp -; CHECK-NEXT: jbe LBB1_13 +; CHECK-NEXT: cmpl $2, %ebp +; CHECK-NEXT: jb LBB1_13 ; CHECK-NEXT: ## %bb.7: ## %bb.nph5 ; CHECK-NEXT: cmpl $2, %edi ; CHECK-NEXT: jb LBB1_13 diff --git a/llvm/test/CodeGen/X86/pr38217.ll b/llvm/test/CodeGen/X86/pr38217.ll --- a/llvm/test/CodeGen/X86/pr38217.ll +++ b/llvm/test/CodeGen/X86/pr38217.ll @@ -32,9 +32,9 @@ ; CHECK-NEXT: movzwl _ZL11DIGIT_TABLE(%rax,%rax), %eax ; CHECK-NEXT: movw %ax, -3(%rcx) ; CHECK-NEXT: addl $4, %r10d -; CHECK-NEXT: cmpq $99999999, %r9 # imm = 0x5F5E0FF +; CHECK-NEXT: cmpq $100000000, %r9 # imm = 0x5F5E100 ; CHECK-NEXT: movq %rdx, %r9 -; CHECK-NEXT: ja .LBB0_2 +; CHECK-NEXT: jae .LBB0_2 ; CHECK-NEXT: .LBB0_3: ; CHECK-NEXT: retq %3 = icmp ugt i64 %0, 9999 diff --git a/llvm/test/CodeGen/X86/pr38795.ll b/llvm/test/CodeGen/X86/pr38795.ll --- a/llvm/test/CodeGen/X86/pr38795.ll +++ b/llvm/test/CodeGen/X86/pr38795.ll @@ -39,9 +39,9 @@ ; CHECK-NEXT: .LBB0_1: # %for.cond ; CHECK-NEXT: # =>This Loop Header: Depth=1 ; CHECK-NEXT: # Child Loop BB0_20 Depth 2 -; CHECK-NEXT: cmpb $8, %dl +; CHECK-NEXT: cmpb $9, %dl ; CHECK-NEXT: movb %dl, {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Spill -; CHECK-NEXT: ja .LBB0_3 +; CHECK-NEXT: jae .LBB0_3 ; CHECK-NEXT: # %bb.2: # %for.cond ; CHECK-NEXT: # in Loop: Header=BB0_1 Depth=1 ; CHECK-NEXT: testb %bl, %bl @@ -54,8 +54,8 @@ ; CHECK-NEXT: movb {{[-0-9]+}}(%e{{[sb]}}p), %dl # 1-byte Reload ; CHECK-NEXT: movb %cl, %dh ; CHECK-NEXT: movl $0, h -; CHECK-NEXT: cmpb $8, %dl -; CHECK-NEXT: jg .LBB0_8 +; CHECK-NEXT: cmpb $9, %dl +; CHECK-NEXT: jge .LBB0_8 ; CHECK-NEXT: # %bb.5: # %if.then13 ; CHECK-NEXT: # in Loop: Header=BB0_1 Depth=1 ; CHECK-NEXT: movl %eax, %esi diff --git a/llvm/test/CodeGen/X86/ragreedy-hoist-spill.ll b/llvm/test/CodeGen/X86/ragreedy-hoist-spill.ll --- a/llvm/test/CodeGen/X86/ragreedy-hoist-spill.ll +++ b/llvm/test/CodeGen/X86/ragreedy-hoist-spill.ll @@ -116,8 +116,8 @@ ; CHECK-NEXT: ## Child Loop BB0_29 Depth 2 ; CHECK-NEXT: ## Child Loop BB0_38 Depth 2 ; CHECK-NEXT: leal -268(%r13), %eax -; CHECK-NEXT: cmpl $105, %eax -; CHECK-NEXT: ja LBB0_14 +; CHECK-NEXT: cmpl $106, %eax +; CHECK-NEXT: jae LBB0_14 ; CHECK-NEXT: ## %bb.56: ## %while.body200 ; CHECK-NEXT: ## in Loop: Header=BB0_13 Depth=1 ; CHECK-NEXT: movslq (%rbx,%rax,4), %rax @@ -133,8 +133,8 @@ ; CHECK-NEXT: LBB0_14: ## %while.body200 ; CHECK-NEXT: ## in Loop: Header=BB0_13 Depth=1 ; CHECK-NEXT: leal 1(%r13), %eax -; CHECK-NEXT: cmpl $21, %eax -; CHECK-NEXT: ja LBB0_20 +; CHECK-NEXT: cmpl $22, %eax +; CHECK-NEXT: jae LBB0_20 ; CHECK-NEXT: ## %bb.15: ## %while.body200 ; CHECK-NEXT: ## in Loop: Header=BB0_13 Depth=1 ; CHECK-NEXT: movl $-1, %r14d @@ -206,8 +206,8 @@ ; CHECK-NEXT: LBB0_34: ## %if.end517 ; CHECK-NEXT: ## in Loop: Header=BB0_13 Depth=1 ; CHECK-NEXT: leal -324(%r14), %eax -; CHECK-NEXT: cmpl $59, %eax -; CHECK-NEXT: ja LBB0_35 +; CHECK-NEXT: cmpl $60, %eax +; CHECK-NEXT: jae LBB0_35 ; CHECK-NEXT: ## %bb.57: ## %if.end517 ; CHECK-NEXT: ## in Loop: Header=BB0_13 Depth=1 ; CHECK-NEXT: movabsq $576460756598390785, %rcx ## imm = 0x800000100000001 @@ -255,8 +255,8 @@ ; CHECK-NEXT: xorl %r14d, %r14d ; CHECK-NEXT: LBB0_22: ## %while.end1465 ; CHECK-NEXT: incl %r14d -; CHECK-NEXT: cmpl $16, %r14d -; CHECK-NEXT: ja LBB0_50 +; CHECK-NEXT: cmpl $17, %r14d +; CHECK-NEXT: jae LBB0_50 ; CHECK-NEXT: ## %bb.23: ## %while.end1465 ; CHECK-NEXT: movl $83969, %eax ## imm = 0x14801 ; CHECK-NEXT: btl %r14d, %eax diff --git a/llvm/test/CodeGen/X86/reverse_branches.ll b/llvm/test/CodeGen/X86/reverse_branches.ll --- a/llvm/test/CodeGen/X86/reverse_branches.ll +++ b/llvm/test/CodeGen/X86/reverse_branches.ll @@ -44,8 +44,8 @@ ; CHECK-NEXT: LBB0_1: ## %for.cond ; CHECK-NEXT: ## =>This Loop Header: Depth=1 ; CHECK-NEXT: ## Child Loop BB0_3 Depth 2 -; CHECK-NEXT: cmpl $999, %r12d ## imm = 0x3E7 -; CHECK-NEXT: jg LBB0_7 +; CHECK-NEXT: cmpl $1000, %r12d ## imm = 0x3E8 +; CHECK-NEXT: jge LBB0_7 ; CHECK-NEXT: ## %bb.2: ## %for.cond1.preheader ; CHECK-NEXT: ## in Loop: Header=BB0_1 Depth=1 ; CHECK-NEXT: movl $-1, %ebp @@ -56,8 +56,8 @@ ; CHECK-NEXT: ## Parent Loop BB0_1 Depth=1 ; CHECK-NEXT: ## => This Inner Loop Header: Depth=2 ; CHECK-NEXT: incl %ebp -; CHECK-NEXT: cmpl $999, %ebp ## imm = 0x3E7 -; CHECK-NEXT: jg LBB0_6 +; CHECK-NEXT: cmpl $1000, %ebp ## imm = 0x3E8 +; CHECK-NEXT: jge LBB0_6 ; CHECK-NEXT: ## %bb.4: ## %for.body3 ; CHECK-NEXT: ## in Loop: Header=BB0_3 Depth=2 ; CHECK-NEXT: addq $1002, %rbx ## imm = 0x3EA @@ -83,8 +83,8 @@ ; CHECK-NEXT: ## =>This Loop Header: Depth=1 ; CHECK-NEXT: ## Child Loop BB0_10 Depth 2 ; CHECK-NEXT: ## Child Loop BB0_12 Depth 3 -; CHECK-NEXT: cmpl $999, %eax ## imm = 0x3E7 -; CHECK-NEXT: jg LBB0_16 +; CHECK-NEXT: cmpl $1000, %eax ## imm = 0x3E8 +; CHECK-NEXT: jge LBB0_16 ; CHECK-NEXT: ## %bb.9: ## %for.cond18.preheader ; CHECK-NEXT: ## in Loop: Header=BB0_8 Depth=1 ; CHECK-NEXT: movq %rcx, %rdx @@ -104,8 +104,8 @@ ; CHECK-NEXT: ## Parent Loop BB0_8 Depth=1 ; CHECK-NEXT: ## => This Loop Header: Depth=2 ; CHECK-NEXT: ## Child Loop BB0_12 Depth 3 -; CHECK-NEXT: cmpl $999, %edi ## imm = 0x3E7 -; CHECK-NEXT: jg LBB0_15 +; CHECK-NEXT: cmpl $1000, %edi ## imm = 0x3E8 +; CHECK-NEXT: jge LBB0_15 ; CHECK-NEXT: ## %bb.11: ## %for.body20 ; CHECK-NEXT: ## in Loop: Header=BB0_10 Depth=2 ; CHECK-NEXT: movq $-1000, %rbp ## imm = 0xFC18 diff --git a/llvm/test/CodeGen/X86/sibcall.ll b/llvm/test/CodeGen/X86/sibcall.ll --- a/llvm/test/CodeGen/X86/sibcall.ll +++ b/llvm/test/CodeGen/X86/sibcall.ll @@ -123,8 +123,8 @@ ; X86: # %bb.0: ; X86-NEXT: subl $12, %esp ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax -; X86-NEXT: cmpl $9, %eax -; X86-NEXT: jg .LBB6_2 +; X86-NEXT: cmpl $10, %eax +; X86-NEXT: jge .LBB6_2 ; X86-NEXT: # %bb.1: # %bb ; X86-NEXT: decl %eax ; X86-NEXT: movl %eax, (%esp) @@ -137,8 +137,8 @@ ; ; X64-LABEL: t6: ; X64: # %bb.0: -; X64-NEXT: cmpl $9, %edi -; X64-NEXT: jg .LBB6_2 +; X64-NEXT: cmpl $10, %edi +; X64-NEXT: jge .LBB6_2 ; X64-NEXT: # %bb.1: # %bb ; X64-NEXT: decl %edi ; X64-NEXT: jmp t6 # TAILCALL @@ -147,8 +147,8 @@ ; ; X32-LABEL: t6: ; X32: # %bb.0: -; X32-NEXT: cmpl $9, %edi -; X32-NEXT: jg .LBB6_2 +; X32-NEXT: cmpl $10, %edi +; X32-NEXT: jge .LBB6_2 ; X32-NEXT: # %bb.1: # %bb ; X32-NEXT: decl %edi ; X32-NEXT: jmp t6 # TAILCALL @@ -988,11 +988,11 @@ ; ; X64-LABEL: t22_non_sret_to_sret: ; X64: # %bb.0: -; X64-NEXT: jmp t22_f_sret@PLT # TAILCALL +; X64-NEXT: jmp t22_f_sret@PLT # TAILCALL ; ; X32-LABEL: t22_non_sret_to_sret: ; X32: # %bb.0: -; X32-NEXT: jmp t22_f_sret@PLT # TAILCALL +; X32-NEXT: jmp t22_f_sret@PLT # TAILCALL tail call ccc void @t22_f_sret(%struct.foo* noalias sret(%struct.foo) %agg.result) nounwind ret void } diff --git a/llvm/test/CodeGen/X86/speculative-execution-side-effect-suppression.ll b/llvm/test/CodeGen/X86/speculative-execution-side-effect-suppression.ll --- a/llvm/test/CodeGen/X86/speculative-execution-side-effect-suppression.ll +++ b/llvm/test/CodeGen/X86/speculative-execution-side-effect-suppression.ll @@ -42,9 +42,9 @@ ; CHECK-NEXT: lfence ; CHECK-NEXT: movl $4, -{{[0-9]+}}(%rsp) ; CHECK-NEXT: lfence -; CHECK-NEXT: cmpl $3, (%rdi) +; CHECK-NEXT: cmpl $4, (%rdi) ; CHECK-NEXT: lfence -; CHECK-NEXT: jg .LBB1_2 +; CHECK-NEXT: jge .LBB1_2 ; CHECK-NEXT: # %bb.1: # %if.then ; CHECK-NEXT: lfence ; CHECK-NEXT: movq -{{[0-9]+}}(%rsp), %rax @@ -69,8 +69,8 @@ ; X86-ONE-LFENCE-NEXT: lfence ; X86-ONE-LFENCE-NEXT: movq %rdi, -{{[0-9]+}}(%rsp) ; X86-ONE-LFENCE-NEXT: movl $4, -{{[0-9]+}}(%rsp) -; X86-ONE-LFENCE-NEXT: cmpl $3, (%rdi) -; X86-ONE-LFENCE-NEXT: jg .LBB1_2 +; X86-ONE-LFENCE-NEXT: cmpl $4, (%rdi) +; X86-ONE-LFENCE-NEXT: jge .LBB1_2 ; X86-ONE-LFENCE-NEXT: # %bb.1: # %if.then ; X86-ONE-LFENCE-NEXT: lfence ; X86-ONE-LFENCE-NEXT: movq -{{[0-9]+}}(%rsp), %rax @@ -92,8 +92,8 @@ ; X86-OMIT-BR-NEXT: lfence ; X86-OMIT-BR-NEXT: movl $4, -{{[0-9]+}}(%rsp) ; X86-OMIT-BR-NEXT: lfence -; X86-OMIT-BR-NEXT: cmpl $3, (%rdi) -; X86-OMIT-BR-NEXT: jg .LBB1_2 +; X86-OMIT-BR-NEXT: cmpl $4, (%rdi) +; X86-OMIT-BR-NEXT: jge .LBB1_2 ; X86-OMIT-BR-NEXT: # %bb.1: # %if.then ; X86-OMIT-BR-NEXT: lfence ; X86-OMIT-BR-NEXT: movq -{{[0-9]+}}(%rsp), %rax @@ -120,9 +120,9 @@ ; X86-NON-CONST-NEXT: lfence ; X86-NON-CONST-NEXT: movl $4, -{{[0-9]+}}(%rsp) ; X86-NON-CONST-NEXT: lfence -; X86-NON-CONST-NEXT: cmpl $3, (%rdi) +; X86-NON-CONST-NEXT: cmpl $4, (%rdi) ; X86-NON-CONST-NEXT: lfence -; X86-NON-CONST-NEXT: jg .LBB1_2 +; X86-NON-CONST-NEXT: jge .LBB1_2 ; X86-NON-CONST-NEXT: # %bb.1: # %if.then ; X86-NON-CONST-NEXT: lfence ; X86-NON-CONST-NEXT: movq -{{[0-9]+}}(%rsp), %rax diff --git a/llvm/test/CodeGen/X86/speculative-load-hardening-indirect.ll b/llvm/test/CodeGen/X86/speculative-load-hardening-indirect.ll --- a/llvm/test/CodeGen/X86/speculative-load-hardening-indirect.ll +++ b/llvm/test/CodeGen/X86/speculative-load-hardening-indirect.ll @@ -518,10 +518,10 @@ ; X64-NEXT: movq %rsp, %rcx ; X64-NEXT: movq $-1, %rax ; X64-NEXT: sarq $63, %rcx -; X64-NEXT: cmpl $3, %edi -; X64-NEXT: ja .LBB6_2 +; X64-NEXT: cmpl $4, %edi +; X64-NEXT: jae .LBB6_2 ; X64-NEXT: # %bb.1: # %entry -; X64-NEXT: cmovaq %rax, %rcx +; X64-NEXT: cmovaeq %rax, %rcx ; X64-NEXT: movl %edi, %edx ; X64-NEXT: movq .LJTI6_0(,%rdx,8), %rdx ; X64-NEXT: orq %rcx, %rdx @@ -535,7 +535,7 @@ ; X64-NEXT: orq %rcx, %rsp ; X64-NEXT: retq ; X64-NEXT: .LBB6_2: # %bb0 -; X64-NEXT: cmovbeq %rax, %rcx +; X64-NEXT: cmovbq %rax, %rcx ; X64-NEXT: shlq $47, %rcx ; X64-NEXT: movl $2, %eax ; X64-NEXT: orq %rcx, %rsp @@ -570,10 +570,10 @@ ; X64-PIC-NEXT: movq %rsp, %rcx ; X64-PIC-NEXT: movq $-1, %rax ; X64-PIC-NEXT: sarq $63, %rcx -; X64-PIC-NEXT: cmpl $3, %edi -; X64-PIC-NEXT: ja .LBB6_2 +; X64-PIC-NEXT: cmpl $4, %edi +; X64-PIC-NEXT: jae .LBB6_2 ; X64-PIC-NEXT: # %bb.1: # %entry -; X64-PIC-NEXT: cmovaq %rax, %rcx +; X64-PIC-NEXT: cmovaeq %rax, %rcx ; X64-PIC-NEXT: movl %edi, %edx ; X64-PIC-NEXT: leaq .LJTI6_0(%rip), %rsi ; X64-PIC-NEXT: movslq (%rsi,%rdx,4), %rdx @@ -590,7 +590,7 @@ ; X64-PIC-NEXT: orq %rcx, %rsp ; X64-PIC-NEXT: retq ; X64-PIC-NEXT: .LBB6_2: # %bb0 -; X64-PIC-NEXT: cmovbeq %rax, %rcx +; X64-PIC-NEXT: cmovbq %rax, %rcx ; X64-PIC-NEXT: shlq $47, %rcx ; X64-PIC-NEXT: movl $2, %eax ; X64-PIC-NEXT: orq %rcx, %rsp @@ -628,10 +628,10 @@ ; X64-RETPOLINE-NEXT: movq %rsp, %rcx ; X64-RETPOLINE-NEXT: movq $-1, %rax ; X64-RETPOLINE-NEXT: sarq $63, %rcx -; X64-RETPOLINE-NEXT: cmpl $1, %edi -; X64-RETPOLINE-NEXT: jg .LBB7_4 +; X64-RETPOLINE-NEXT: cmpl $2, %edi +; X64-RETPOLINE-NEXT: jge .LBB7_4 ; X64-RETPOLINE-NEXT: # %bb.1: # %entry -; X64-RETPOLINE-NEXT: cmovgq %rax, %rcx +; X64-RETPOLINE-NEXT: cmovgeq %rax, %rcx ; X64-RETPOLINE-NEXT: testl %edi, %edi ; X64-RETPOLINE-NEXT: je .LBB7_7 ; X64-RETPOLINE-NEXT: # %bb.2: # %entry @@ -645,8 +645,7 @@ ; X64-RETPOLINE-NEXT: orq %rcx, %rsp ; X64-RETPOLINE-NEXT: retq ; X64-RETPOLINE-NEXT: .LBB7_4: # %entry -; X64-RETPOLINE-NEXT: cmovleq %rax, %rcx -; X64-RETPOLINE-NEXT: cmpl $2, %edi +; X64-RETPOLINE-NEXT: cmovlq %rax, %rcx ; X64-RETPOLINE-NEXT: je .LBB7_8 ; X64-RETPOLINE-NEXT: # %bb.5: # %entry ; X64-RETPOLINE-NEXT: cmoveq %rax, %rcx @@ -710,17 +709,17 @@ ; X64-NEXT: movq %rsp, %r9 ; X64-NEXT: movq $-1, %r10 ; X64-NEXT: sarq $63, %r9 -; X64-NEXT: cmpl $3, %edi -; X64-NEXT: ja .LBB7_2 +; X64-NEXT: cmpl $4, %edi +; X64-NEXT: jae .LBB7_2 ; X64-NEXT: # %bb.1: # %entry -; X64-NEXT: cmovaq %r10, %r9 +; X64-NEXT: cmovaeq %r10, %r9 ; X64-NEXT: xorl %eax, %eax ; X64-NEXT: movl %edi, %esi ; X64-NEXT: movq .LJTI7_0(,%rsi,8), %rsi ; X64-NEXT: orq %r9, %rsi ; X64-NEXT: jmpq *%rsi ; X64-NEXT: .LBB7_2: # %bb0 -; X64-NEXT: cmovbeq %r10, %r9 +; X64-NEXT: cmovbq %r10, %r9 ; X64-NEXT: movl (%rsi), %eax ; X64-NEXT: orl %r9d, %eax ; X64-NEXT: movq $.LBB7_3, %rsi @@ -758,10 +757,10 @@ ; X64-PIC-NEXT: movq %rsp, %r9 ; X64-PIC-NEXT: movq $-1, %r10 ; X64-PIC-NEXT: sarq $63, %r9 -; X64-PIC-NEXT: cmpl $3, %edi -; X64-PIC-NEXT: ja .LBB7_2 +; X64-PIC-NEXT: cmpl $4, %edi +; X64-PIC-NEXT: jae .LBB7_2 ; X64-PIC-NEXT: # %bb.1: # %entry -; X64-PIC-NEXT: cmovaq %r10, %r9 +; X64-PIC-NEXT: cmovaeq %r10, %r9 ; X64-PIC-NEXT: xorl %eax, %eax ; X64-PIC-NEXT: movl %edi, %esi ; X64-PIC-NEXT: leaq .LJTI7_0(%rip), %rdi @@ -770,7 +769,7 @@ ; X64-PIC-NEXT: orq %r9, %rsi ; X64-PIC-NEXT: jmpq *%rsi ; X64-PIC-NEXT: .LBB7_2: # %bb0 -; X64-PIC-NEXT: cmovbeq %r10, %r9 +; X64-PIC-NEXT: cmovbq %r10, %r9 ; X64-PIC-NEXT: movl (%rsi), %eax ; X64-PIC-NEXT: orl %r9d, %eax ; X64-PIC-NEXT: leaq .LBB7_3(%rip), %rsi @@ -813,10 +812,10 @@ ; X64-RETPOLINE-NEXT: movq $-1, %r10 ; X64-RETPOLINE-NEXT: sarq $63, %r9 ; X64-RETPOLINE-NEXT: xorl %eax, %eax -; X64-RETPOLINE-NEXT: cmpl $1, %edi -; X64-RETPOLINE-NEXT: jg .LBB8_5 +; X64-RETPOLINE-NEXT: cmpl $2, %edi +; X64-RETPOLINE-NEXT: jge .LBB8_5 ; X64-RETPOLINE-NEXT: # %bb.1: # %entry -; X64-RETPOLINE-NEXT: cmovgq %r10, %r9 +; X64-RETPOLINE-NEXT: cmovgeq %r10, %r9 ; X64-RETPOLINE-NEXT: testl %edi, %edi ; X64-RETPOLINE-NEXT: je .LBB8_2 ; X64-RETPOLINE-NEXT: # %bb.3: # %entry @@ -827,8 +826,7 @@ ; X64-RETPOLINE-NEXT: cmovneq %r10, %r9 ; X64-RETPOLINE-NEXT: jmp .LBB8_10 ; X64-RETPOLINE-NEXT: .LBB8_5: # %entry -; X64-RETPOLINE-NEXT: cmovleq %r10, %r9 -; X64-RETPOLINE-NEXT: cmpl $2, %edi +; X64-RETPOLINE-NEXT: cmovlq %r10, %r9 ; X64-RETPOLINE-NEXT: je .LBB8_6 ; X64-RETPOLINE-NEXT: # %bb.7: # %entry ; X64-RETPOLINE-NEXT: cmoveq %r10, %r9 diff --git a/llvm/test/CodeGen/X86/switch-bt.ll b/llvm/test/CodeGen/X86/switch-bt.ll --- a/llvm/test/CodeGen/X86/switch-bt.ll +++ b/llvm/test/CodeGen/X86/switch-bt.ll @@ -54,8 +54,8 @@ ; rdar://8781238 define void @test2(i32 %x) nounwind ssp { ; CHECK-LABEL: test2: -; CHECK: cmpl $6 -; CHECK: ja +; CHECK: cmpl $7 +; CHECK: jae ; CHECK-NEXT: movl $91 ; CHECK-NOT: movl @@ -82,8 +82,8 @@ define void @test3(i32 %x) nounwind { ; CHECK-LABEL: test3: -; CHECK: cmpl $5 -; CHECK: ja +; CHECK: cmpl $6 +; CHECK: jae ; CHECK: cmpl $4 ; CHECK: je switch i32 %x, label %if.end [ @@ -140,16 +140,14 @@ ; The balanced binary switch here would start with a comparison against 39, but ; it is currently starting with 29 because of the density-sum heuristic. -; CHECK: cmpl $39 -; CHECK: jg +; CHECK: cmpl $40 +; CHECK: jge ; CHECK: cmpl $10 ; CHECK: je ; CHECK: cmpl $20 ; CHECK: je ; CHECK: cmpl $30 ; CHECK: jne -; CHECK: cmpl $40 -; CHECK: je ; CHECK: cmpl $50 ; CHECK: je ; CHECK: cmpl $60 diff --git a/llvm/test/CodeGen/X86/switch-density.ll b/llvm/test/CodeGen/X86/switch-density.ll --- a/llvm/test/CodeGen/X86/switch-density.ll +++ b/llvm/test/CodeGen/X86/switch-density.ll @@ -19,10 +19,9 @@ ; Should pivot around 400 for two subtrees with two jump tables each. ; CHECK-LABEL: sparse ; CHECK-NOT: cmpl -; CHECK: cmpl $399 +; CHECK: cmpl $400 ; CHECK: cmpl $100 ; CHECK: cmpl $300 -; CHECK: cmpl $400 ; CHECK: cmpl $500 } @@ -44,11 +43,11 @@ ; Lowered as a jump table when sparse, and branches when dense. ; CHECK-LABEL: med ; SPARSE: addl $-10 -; SPARSE: cmpl $40 -; SPARSE: ja +; SPARSE: cmpl $41 +; SPARSE: jae ; SPARSE: jmpq *.LJTI ; DENSE-NOT: cmpl -; DENSE: cmpl $29 +; DENSE: cmpl $30 ; DENSE-DAG: cmpl $10 ; DENSE-DAG: cmpl $20 ; DENSE-DAG: cmpl $30 @@ -56,7 +55,7 @@ ; DENSE-DAG: cmpl $50 ; DENSE: retq } - + define void @dense(i32 %x) { entry: switch i32 %x, label %return [ @@ -75,8 +74,8 @@ ; Lowered as a jump table when sparse, and branches when dense. ; CHECK-LABEL: dense ; CHECK: addl $-4 -; CHECK: cmpl $16 -; CHECK: ja +; CHECK: cmpl $17 +; CHECK: jae ; CHECK: jmpq *.LJTI } @@ -97,7 +96,7 @@ ; Lowered as branches. ; CHECK-LABEL: dense_optsize -; CHECK: cmpl $11 +; CHECK: cmpl $12 ; CHECK: cmpl $20 ; CHECK: cmpl $16 ; CHECK: cmpl $12 @@ -123,7 +122,7 @@ ; Lowered as branches. ; CHECK-LABEL: dense_pgso -; CHECK: cmpl $11 +; CHECK: cmpl $12 ; CHECK: cmpl $20 ; CHECK: cmpl $16 ; CHECK: cmpl $12 diff --git a/llvm/test/CodeGen/X86/switch-lower-peel-top-case.ll b/llvm/test/CodeGen/X86/switch-lower-peel-top-case.ll --- a/llvm/test/CodeGen/X86/switch-lower-peel-top-case.ll +++ b/llvm/test/CodeGen/X86/switch-lower-peel-top-case.ll @@ -17,8 +17,8 @@ ; CHECK: JMP_1 %[[PEELED_SWITCH_LABEL]] ; CHECK: [[PEELED_SWITCH_LABEL]].{{[a-zA-Z0-9.]+}}: ; CHECK: successors: %[[BB1_LABEL:.*]](0x0206d3a0), %[[BB2_LABEL:.*]](0x7df92c60) -; CHECK: %{{[0-9]+}}:gr32 = SUB32ri %[[VAL]], 18311, implicit-def $eflags -; CHECK: JCC_1 %[[BB2_LABEL]], 15, implicit $eflags +; CHECK: %{{[0-9]+}}:gr32 = SUB32ri %[[VAL]], 18312, implicit-def $eflags +; CHECK: JCC_1 %[[BB2_LABEL]], 13, implicit $eflags ; CHECK: JMP_1 %[[BB1_LABEL]] ; CHECK: [[BB1_LABEL]].{{[a-zA-Z0-9.]+}}: ; CHECK: successors: %[[CASE2_LABEL:.*]](0x35e50d5b), %[[BB3_LABEL:.*]](0x4a1af2a5) @@ -80,8 +80,8 @@ ; CHECK: JMP_1 %[[PEELED_SWITCH_LABEL]] ; CHECK: [[PEELED_SWITCH_LABEL]].{{[a-zA-Z0-9.]+}}: ; CHECK: successors: %[[BB1_LABEL:.*]](0x0088888a), %[[BB2_LABEL:.*]](0x7f777776) -; CHECK: %{{[0-9]+}}:gr32 = SUB32ri8 %[[VAL]], 4, implicit-def $eflags -; CHECK: JCC_1 %[[BB2_LABEL]], 15, implicit $eflags +; CHECK: %{{[0-9]+}}:gr32 = SUB32ri8 %[[VAL]], 5, implicit-def $eflags +; CHECK: JCC_1 %[[BB2_LABEL]], 13, implicit $eflags ; CHECK: JMP_1 %[[BB1_LABEL]] ; CHECK: [[BB1_LABEL]].{{[a-zA-Z0-9.]+}}: ; CHECK: successors: %[[CASE4_LABEL:.*]](0x7f775a4f), %[[BB3_LABEL:.*]](0x0088a5b1) diff --git a/llvm/test/CodeGen/X86/switch-zextload.ll b/llvm/test/CodeGen/X86/switch-zextload.ll --- a/llvm/test/CodeGen/X86/switch-zextload.ll +++ b/llvm/test/CodeGen/X86/switch-zextload.ll @@ -12,8 +12,8 @@ ; CHECK-LABEL: set_proof_and_disproof_numbers: ; CHECK: ## %bb.0: ## %entry ; CHECK-NEXT: movzbl 0, %eax -; CHECK-NEXT: cmpl $3, %eax -; CHECK-NEXT: ja LBB0_3 +; CHECK-NEXT: cmpl $4, %eax +; CHECK-NEXT: jae LBB0_3 ; CHECK-NEXT: ## %bb.1: ## %entry ; CHECK-NEXT: jmpl *LJTI0_0(,%eax,4) ; CHECK-NEXT: LBB0_3: ## %return diff --git a/llvm/test/CodeGen/X86/switch.ll b/llvm/test/CodeGen/X86/switch.ll --- a/llvm/test/CodeGen/X86/switch.ll +++ b/llvm/test/CodeGen/X86/switch.ll @@ -19,13 +19,13 @@ ; Lowered as a jump table, both with and without optimization. ; CHECK-LABEL: basic ; CHECK: decl -; CHECK: cmpl $4 -; CHECK: ja +; CHECK: cmpl $5 +; CHECK: jae ; CHECK: jmpq *.LJTI ; NOOPT-LABEL: basic ; NOOPT: decl -; NOOPT: subl $4 -; NOOPT: ja +; NOOPT: subl $5 +; NOOPT: jae ; NOOPT: movq .LJTI ; NOOPT: jmpq } @@ -66,8 +66,8 @@ ; Lowered as a jump table, both with and without optimization. ; CHECK-LABEL: basic_nojumptable_false ; CHECK: decl -; CHECK: cmpl $4 -; CHECK: ja +; CHECK: cmpl $5 +; CHECK: jae ; CHECK: jmpq *.LJTI } @@ -95,8 +95,8 @@ ; CHECK: leal -100 ; CHECK: cmpl $4 ; CHECK: jb -; CHECK: cmpl $3 -; CHECK: ja +; CHECK: cmpl $4 +; CHECK: jae ; We do this even at -O0, because it's cheap and makes codegen faster. ; NOOPT-LABEL: simple_ranges @@ -132,8 +132,8 @@ ; Cases 0-5 could be lowered with two bit tests, ; but with 6-8, the whole switch is suitable for a jump table. ; CHECK-LABEL: jt_is_better -; CHECK: cmpl $8 -; CHECK: ja +; CHECK: cmpl $9 +; CHECK: jae ; CHECK: jmpq *.LJTI } @@ -259,7 +259,7 @@ ; Should pivot around 400 for two subtrees of equal size. ; CHECK-LABEL: optimal_pivot1 ; CHECK-NOT: cmpl -; CHECK: cmpl $399 +; CHECK: cmpl $400 } @@ -281,7 +281,7 @@ ; Should pivot around 300 for two subtrees with two jump tables each. ; CHECK-LABEL: optimal_pivot2 ; CHECK-NOT: cmpl -; CHECK: cmpl $299 +; CHECK: cmpl $300 ; CHECK: jmpq *.LJTI ; CHECK: jmpq *.LJTI ; CHECK: jmpq *.LJTI @@ -311,7 +311,7 @@ ; Expecting a jump table from 5 to 15. ; CHECK-LABEL: optimal_jump_table1 ; CHECK: leal -5 -; CHECK: cmpl $10 +; CHECK: cmpl $11 ; CHECK: jmpq *.LJTI ; At -O0, we don't build jump tables for only parts of a switch. @@ -353,7 +353,7 @@ ; This can be partitioned as {0,1,2,9},{14,15} or {0,1,2},{9,14,15}. The former ; should be preferred. Expecting a table from 0-9. ; CHECK-LABEL: optimal_jump_table2 -; CHECK: cmpl $9 +; CHECK: cmpl $10 ; CHECK: jmpq *.LJTI } @@ -383,7 +383,7 @@ ; from 1-20. ; CHECK-LABEL: optimal_jump_table3 ; CHECK: leal -1 -; CHECK: cmpl $19 +; CHECK: cmpl $20 ; CHECK: jmpq *.LJTI } @@ -599,7 +599,7 @@ ; Make sure to pick a pivot in the middle also with zero-weight cases. ; CHECK-LABEL: zero_weight_tree ; CHECK-NOT: cmpl -; CHECK: cmpl $29 +; CHECK: cmpl $30 } !3 = !{!"branch_weights", i32 1, i32 10, i32 0, i32 0, i32 0, i32 0, i32 10} @@ -634,7 +634,7 @@ ; CHECK-LABEL: left_leaning_weight_balanced_tree ; CHECK-NOT: cmpl -; CHECK: cmpl $49 +; CHECK: cmpl $50 } !4 = !{!"branch_weights", i32 1, i32 10, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1000} @@ -668,7 +668,7 @@ ; CHECK-LABEL: left_leaning_weight_balanced_tree2 ; CHECK-NOT: cmpl -; CHECK: cmpl $59 +; CHECK: cmpl $60 } !5 = !{!"branch_weights", i32 1, i32 10, i32 1, i32 1, i32 1, i32 1, i32 90, i32 70, i32 1000} @@ -700,7 +700,7 @@ ; CHECK-LABEL: right_leaning_weight_balanced_tree ; CHECK-NOT: cmpl -; CHECK: cmpl $19 +; CHECK: cmpl $20 } !6 = !{!"branch_weights", i32 1, i32 1000, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 10} @@ -730,7 +730,7 @@ ; the left and {200,300} on the right. However, the jump table weights as much ; as its components, so 100 is selected as the pivot. ; CHECK-NOT: cmpl -; CHECK: cmpl $99 +; CHECK: cmpl $100 } diff --git a/llvm/test/CodeGen/X86/tail-dup-multiple-latch-loop.ll b/llvm/test/CodeGen/X86/tail-dup-multiple-latch-loop.ll --- a/llvm/test/CodeGen/X86/tail-dup-multiple-latch-loop.ll +++ b/llvm/test/CodeGen/X86/tail-dup-multiple-latch-loop.ll @@ -140,8 +140,8 @@ ; CHECK-NEXT: .LBB1_1: # =>This Inner Loop Header: Depth=1 ; CHECK-NEXT: movzbl (%rdi), %ecx ; CHECK-NEXT: decb %cl -; CHECK-NEXT: cmpb $5, %cl -; CHECK-NEXT: ja .LBB1_9 +; CHECK-NEXT: cmpb $6, %cl +; CHECK-NEXT: jae .LBB1_9 ; CHECK-NEXT: # %bb.2: # in Loop: Header=BB1_1 Depth=1 ; CHECK-NEXT: movzbl %cl, %ecx ; CHECK-NEXT: jmpq *.LJTI1_0(,%rcx,8) diff --git a/llvm/test/CodeGen/X86/tail-merge-unreachable.ll b/llvm/test/CodeGen/X86/tail-merge-unreachable.ll --- a/llvm/test/CodeGen/X86/tail-merge-unreachable.ll +++ b/llvm/test/CodeGen/X86/tail-merge-unreachable.ll @@ -23,8 +23,8 @@ ; CHECK-LABEL: tail_merge_unreachable: ; Range Check ; CHECK: addl $-96 -; CHECK: cmpl $5 -; CHECK: jbe [[JUMP_TABLE_BLOCK:[.][A-Za-z0-9_]+]] +; CHECK: cmpl $6 +; CHECK: jb [[JUMP_TABLE_BLOCK:[.][A-Za-z0-9_]+]] ; CHECK: retq ; CHECK: [[JUMP_TABLE_BLOCK]]: ; CHECK: btl diff --git a/llvm/test/CodeGen/X86/tail-threshold.ll b/llvm/test/CodeGen/X86/tail-threshold.ll --- a/llvm/test/CodeGen/X86/tail-threshold.ll +++ b/llvm/test/CodeGen/X86/tail-threshold.ll @@ -10,8 +10,8 @@ ; CHECK-LABEL: foo: ; CHECK: # %bb.0: ; CHECK-NEXT: pushq %rax -; CHECK-NEXT: cmpl $3, %edi -; CHECK-NEXT: ja .LBB0_4 +; CHECK-NEXT: cmpl $4, %edi +; CHECK-NEXT: jae .LBB0_4 ; CHECK-NEXT: # %bb.1: ; CHECK-NEXT: movl %edi, %eax ; CHECK-NEXT: jmpq *.LJTI0_0(,%rax,8) diff --git a/llvm/test/CodeGen/X86/twoaddr-lea.ll b/llvm/test/CodeGen/X86/twoaddr-lea.ll --- a/llvm/test/CodeGen/X86/twoaddr-lea.ll +++ b/llvm/test/CodeGen/X86/twoaddr-lea.ll @@ -67,8 +67,8 @@ ; CHECK-NEXT: movq _global@GOTPCREL(%rip), %rdx ; CHECK-NEXT: movq _global2@GOTPCREL(%rip), %rsi ; CHECK-NEXT: xorl %eax, %eax -; CHECK-NEXT: cmpl $10, %eax -; CHECK-NEXT: jle LBB3_2 +; CHECK-NEXT: cmpl $11, %eax +; CHECK-NEXT: jl LBB3_2 ; CHECK-NEXT: .p2align 4, 0x90 ; CHECK-NEXT: LBB3_6: ## %bb2 ; CHECK-NEXT: ## =>This Loop Header: Depth=1 @@ -88,8 +88,8 @@ ; CHECK-NEXT: ## %bb.8: ## %bb9 ; CHECK-NEXT: ## in Loop: Header=BB3_6 Depth=1 ; CHECK-NEXT: addq $4, %rax -; CHECK-NEXT: cmpl $10, %eax -; CHECK-NEXT: jg LBB3_6 +; CHECK-NEXT: cmpl $11, %eax +; CHECK-NEXT: jge LBB3_6 ; CHECK-NEXT: LBB3_2: ## %bb3.preheader ; CHECK-NEXT: xorl %ecx, %ecx ; CHECK-NEXT: .p2align 4, 0x90 diff --git a/llvm/test/CodeGen/X86/use-cr-result-of-dom-icmp-st.ll b/llvm/test/CodeGen/X86/use-cr-result-of-dom-icmp-st.ll --- a/llvm/test/CodeGen/X86/use-cr-result-of-dom-icmp-st.ll +++ b/llvm/test/CodeGen/X86/use-cr-result-of-dom-icmp-st.ll @@ -21,12 +21,13 @@ ; DEFAULT-NEXT: movq %rsi, %rcx ; DEFAULT-NEXT: movq %rdi, %rax ; DEFAULT-NEXT: shlq %cl, %rax -; DEFAULT-NEXT: cmpq $-2, %rax -; DEFAULT-NEXT: jle .LBB0_1 +; DEFAULT-NEXT: cmpq $-1, %rax +; DEFAULT-NEXT: jl .LBB0_1 ; DEFAULT-NEXT: # %bb.2: # %return ; DEFAULT-NEXT: movq %rcx, %rax ; DEFAULT-NEXT: retq ; DEFAULT-NEXT: .LBB0_1: # %if.end +; DEFAULT-NEXT: cmpq $-2, %rax ; DEFAULT-NEXT: movl $1, %eax ; DEFAULT-NEXT: cmoveq %rcx, %rax ; DEFAULT-NEXT: imulq %rdi, %rax @@ -38,9 +39,10 @@ ; EQ2ICMP-NEXT: movq %rdi, %rdx ; EQ2ICMP-NEXT: movl %eax, %ecx ; EQ2ICMP-NEXT: shlq %cl, %rdx -; EQ2ICMP-NEXT: cmpq $-2, %rdx -; EQ2ICMP-NEXT: jg .LBB0_2 +; EQ2ICMP-NEXT: cmpq $-1, %rdx +; EQ2ICMP-NEXT: jge .LBB0_2 ; EQ2ICMP-NEXT: # %bb.1: # %if.end +; EQ2ICMP-NEXT: cmpq $-2, %rdx ; EQ2ICMP-NEXT: movl $1, %ecx ; EQ2ICMP-NEXT: cmovlq %rcx, %rax ; EQ2ICMP-NEXT: imulq %rdi, %rax @@ -163,12 +165,13 @@ ; DEFAULT-NEXT: movq %rsi, %rcx ; DEFAULT-NEXT: movq %rdi, %rax ; DEFAULT-NEXT: shlq %cl, %rax -; DEFAULT-NEXT: cmpq $1, %rax -; DEFAULT-NEXT: jle .LBB3_1 +; DEFAULT-NEXT: cmpq $2, %rax +; DEFAULT-NEXT: jl .LBB3_1 ; DEFAULT-NEXT: # %bb.2: # %return ; DEFAULT-NEXT: movq %rcx, %rax ; DEFAULT-NEXT: retq ; DEFAULT-NEXT: .LBB3_1: # %if.end +; DEFAULT-NEXT: cmpq $1, %rax ; DEFAULT-NEXT: movl $1, %eax ; DEFAULT-NEXT: cmoveq %rcx, %rax ; DEFAULT-NEXT: imulq %rdi, %rax @@ -180,11 +183,12 @@ ; EQ2ICMP-NEXT: movq %rdi, %rdx ; EQ2ICMP-NEXT: movl %eax, %ecx ; EQ2ICMP-NEXT: shlq %cl, %rdx -; EQ2ICMP-NEXT: cmpq $1, %rdx -; EQ2ICMP-NEXT: jg .LBB3_2 +; EQ2ICMP-NEXT: cmpq $2, %rdx +; EQ2ICMP-NEXT: jge .LBB3_2 ; EQ2ICMP-NEXT: # %bb.1: # %if.end +; EQ2ICMP-NEXT: testq %rdx, %rdx ; EQ2ICMP-NEXT: movl $1, %ecx -; EQ2ICMP-NEXT: cmovlq %rcx, %rax +; EQ2ICMP-NEXT: cmovleq %rcx, %rax ; EQ2ICMP-NEXT: imulq %rdi, %rax ; EQ2ICMP-NEXT: .LBB3_2: # %return ; EQ2ICMP-NEXT: retq @@ -209,12 +213,13 @@ ; DEFAULT-NEXT: movq %rsi, %rcx ; DEFAULT-NEXT: movq %rdi, %rax ; DEFAULT-NEXT: shlq %cl, %rax -; DEFAULT-NEXT: cmpq $2, %rax -; DEFAULT-NEXT: jle .LBB4_1 +; DEFAULT-NEXT: cmpq $3, %rax +; DEFAULT-NEXT: jl .LBB4_1 ; DEFAULT-NEXT: # %bb.2: # %return ; DEFAULT-NEXT: movq %rcx, %rax ; DEFAULT-NEXT: retq ; DEFAULT-NEXT: .LBB4_1: # %if.end +; DEFAULT-NEXT: cmpq $2, %rax ; DEFAULT-NEXT: movl $1, %eax ; DEFAULT-NEXT: cmoveq %rcx, %rax ; DEFAULT-NEXT: imulq %rdi, %rax @@ -226,9 +231,10 @@ ; EQ2ICMP-NEXT: movq %rdi, %rdx ; EQ2ICMP-NEXT: movl %eax, %ecx ; EQ2ICMP-NEXT: shlq %cl, %rdx -; EQ2ICMP-NEXT: cmpq $2, %rdx -; EQ2ICMP-NEXT: jg .LBB4_2 +; EQ2ICMP-NEXT: cmpq $3, %rdx +; EQ2ICMP-NEXT: jge .LBB4_2 ; EQ2ICMP-NEXT: # %bb.1: # %if.end +; EQ2ICMP-NEXT: cmpq $2, %rdx ; EQ2ICMP-NEXT: movl $1, %ecx ; EQ2ICMP-NEXT: cmovlq %rcx, %rax ; EQ2ICMP-NEXT: imulq %rdi, %rax @@ -252,12 +258,13 @@ define i64 @ll_a__2(i64 %a, i64 %b) { ; DEFAULT-LABEL: ll_a__2: ; DEFAULT: # %bb.0: # %entry -; DEFAULT-NEXT: cmpq $-2, %rdi -; DEFAULT-NEXT: jle .LBB5_1 +; DEFAULT-NEXT: cmpq $-1, %rdi +; DEFAULT-NEXT: jl .LBB5_1 ; DEFAULT-NEXT: # %bb.2: # %return ; DEFAULT-NEXT: movq %rsi, %rax ; DEFAULT-NEXT: retq ; DEFAULT-NEXT: .LBB5_1: # %if.end +; DEFAULT-NEXT: cmpq $-2, %rdi ; DEFAULT-NEXT: movl $1, %eax ; DEFAULT-NEXT: cmoveq %rsi, %rax ; DEFAULT-NEXT: imulq %rdi, %rax @@ -266,9 +273,10 @@ ; EQ2ICMP-LABEL: ll_a__2: ; EQ2ICMP: # %bb.0: # %entry ; EQ2ICMP-NEXT: movq %rsi, %rax -; EQ2ICMP-NEXT: cmpq $-2, %rdi -; EQ2ICMP-NEXT: jg .LBB5_2 +; EQ2ICMP-NEXT: cmpq $-1, %rdi +; EQ2ICMP-NEXT: jge .LBB5_2 ; EQ2ICMP-NEXT: # %bb.1: # %if.end +; EQ2ICMP-NEXT: cmpq $-2, %rdi ; EQ2ICMP-NEXT: movl $1, %ecx ; EQ2ICMP-NEXT: cmovlq %rcx, %rax ; EQ2ICMP-NEXT: imulq %rdi, %rax @@ -373,12 +381,13 @@ define i64 @ll_a_1(i64 %a, i64 %b) { ; DEFAULT-LABEL: ll_a_1: ; DEFAULT: # %bb.0: # %entry -; DEFAULT-NEXT: cmpq $1, %rdi -; DEFAULT-NEXT: jle .LBB8_1 +; DEFAULT-NEXT: cmpq $2, %rdi +; DEFAULT-NEXT: jl .LBB8_1 ; DEFAULT-NEXT: # %bb.2: # %return ; DEFAULT-NEXT: movq %rsi, %rax ; DEFAULT-NEXT: retq ; DEFAULT-NEXT: .LBB8_1: # %if.end +; DEFAULT-NEXT: cmpq $1, %rdi ; DEFAULT-NEXT: movl $1, %eax ; DEFAULT-NEXT: cmoveq %rsi, %rax ; DEFAULT-NEXT: imulq %rdi, %rax @@ -387,11 +396,12 @@ ; EQ2ICMP-LABEL: ll_a_1: ; EQ2ICMP: # %bb.0: # %entry ; EQ2ICMP-NEXT: movq %rsi, %rax -; EQ2ICMP-NEXT: cmpq $1, %rdi -; EQ2ICMP-NEXT: jg .LBB8_2 +; EQ2ICMP-NEXT: cmpq $2, %rdi +; EQ2ICMP-NEXT: jge .LBB8_2 ; EQ2ICMP-NEXT: # %bb.1: # %if.end +; EQ2ICMP-NEXT: testq %rdi, %rdi ; EQ2ICMP-NEXT: movl $1, %ecx -; EQ2ICMP-NEXT: cmovlq %rcx, %rax +; EQ2ICMP-NEXT: cmovleq %rcx, %rax ; EQ2ICMP-NEXT: imulq %rdi, %rax ; EQ2ICMP-NEXT: .LBB8_2: # %return ; EQ2ICMP-NEXT: retq @@ -412,12 +422,13 @@ define i64 @ll_a_2(i64 %a, i64 %b) { ; DEFAULT-LABEL: ll_a_2: ; DEFAULT: # %bb.0: # %entry -; DEFAULT-NEXT: cmpq $2, %rdi -; DEFAULT-NEXT: jle .LBB9_1 +; DEFAULT-NEXT: cmpq $3, %rdi +; DEFAULT-NEXT: jl .LBB9_1 ; DEFAULT-NEXT: # %bb.2: # %return ; DEFAULT-NEXT: movq %rsi, %rax ; DEFAULT-NEXT: retq ; DEFAULT-NEXT: .LBB9_1: # %if.end +; DEFAULT-NEXT: cmpq $2, %rdi ; DEFAULT-NEXT: movl $1, %eax ; DEFAULT-NEXT: cmoveq %rsi, %rax ; DEFAULT-NEXT: imulq %rdi, %rax @@ -426,9 +437,10 @@ ; EQ2ICMP-LABEL: ll_a_2: ; EQ2ICMP: # %bb.0: # %entry ; EQ2ICMP-NEXT: movq %rsi, %rax -; EQ2ICMP-NEXT: cmpq $2, %rdi -; EQ2ICMP-NEXT: jg .LBB9_2 +; EQ2ICMP-NEXT: cmpq $3, %rdi +; EQ2ICMP-NEXT: jge .LBB9_2 ; EQ2ICMP-NEXT: # %bb.1: # %if.end +; EQ2ICMP-NEXT: cmpq $2, %rdi ; EQ2ICMP-NEXT: movl $1, %ecx ; EQ2ICMP-NEXT: cmovlq %rcx, %rax ; EQ2ICMP-NEXT: imulq %rdi, %rax @@ -454,9 +466,10 @@ ; DEFAULT-NEXT: movl %esi, %ecx ; DEFAULT-NEXT: movl %edi, %eax ; DEFAULT-NEXT: shll %cl, %eax -; DEFAULT-NEXT: cmpl $-2, %eax -; DEFAULT-NEXT: jg .LBB10_2 +; DEFAULT-NEXT: cmpl $-1, %eax +; DEFAULT-NEXT: jge .LBB10_2 ; DEFAULT-NEXT: # %bb.1: # %if.end +; DEFAULT-NEXT: cmpl $-2, %eax ; DEFAULT-NEXT: movl $1, %eax ; DEFAULT-NEXT: cmovel %ecx, %eax ; DEFAULT-NEXT: imull %edi, %eax @@ -470,9 +483,10 @@ ; EQ2ICMP-NEXT: movl %esi, %ecx ; EQ2ICMP-NEXT: movl %edi, %eax ; EQ2ICMP-NEXT: shll %cl, %eax -; EQ2ICMP-NEXT: cmpl $-2, %eax -; EQ2ICMP-NEXT: jg .LBB10_2 +; EQ2ICMP-NEXT: cmpl $-1, %eax +; EQ2ICMP-NEXT: jge .LBB10_2 ; EQ2ICMP-NEXT: # %bb.1: # %if.end +; EQ2ICMP-NEXT: cmpl $-2, %eax ; EQ2ICMP-NEXT: movl $1, %eax ; EQ2ICMP-NEXT: cmovll %eax, %ecx ; EQ2ICMP-NEXT: imull %edi, %ecx @@ -608,9 +622,10 @@ ; DEFAULT-NEXT: movl %esi, %ecx ; DEFAULT-NEXT: movl %edi, %eax ; DEFAULT-NEXT: shll %cl, %eax -; DEFAULT-NEXT: cmpl $1, %eax -; DEFAULT-NEXT: jg .LBB13_2 +; DEFAULT-NEXT: cmpl $2, %eax +; DEFAULT-NEXT: jge .LBB13_2 ; DEFAULT-NEXT: # %bb.1: # %if.end +; DEFAULT-NEXT: cmpl $1, %eax ; DEFAULT-NEXT: movl $1, %eax ; DEFAULT-NEXT: cmovel %ecx, %eax ; DEFAULT-NEXT: imull %edi, %eax @@ -624,11 +639,12 @@ ; EQ2ICMP-NEXT: movl %esi, %ecx ; EQ2ICMP-NEXT: movl %edi, %eax ; EQ2ICMP-NEXT: shll %cl, %eax -; EQ2ICMP-NEXT: cmpl $1, %eax -; EQ2ICMP-NEXT: jg .LBB13_2 +; EQ2ICMP-NEXT: cmpl $2, %eax +; EQ2ICMP-NEXT: jge .LBB13_2 ; EQ2ICMP-NEXT: # %bb.1: # %if.end +; EQ2ICMP-NEXT: testl %eax, %eax ; EQ2ICMP-NEXT: movl $1, %eax -; EQ2ICMP-NEXT: cmovll %eax, %ecx +; EQ2ICMP-NEXT: cmovlel %eax, %ecx ; EQ2ICMP-NEXT: imull %edi, %ecx ; EQ2ICMP-NEXT: .LBB13_2: # %return ; EQ2ICMP-NEXT: movslq %ecx, %rax @@ -656,9 +672,10 @@ ; DEFAULT-NEXT: movl %esi, %ecx ; DEFAULT-NEXT: movl %edi, %eax ; DEFAULT-NEXT: shll %cl, %eax -; DEFAULT-NEXT: cmpl $2, %eax -; DEFAULT-NEXT: jg .LBB14_2 +; DEFAULT-NEXT: cmpl $3, %eax +; DEFAULT-NEXT: jge .LBB14_2 ; DEFAULT-NEXT: # %bb.1: # %if.end +; DEFAULT-NEXT: cmpl $2, %eax ; DEFAULT-NEXT: movl $1, %eax ; DEFAULT-NEXT: cmovel %ecx, %eax ; DEFAULT-NEXT: imull %edi, %eax @@ -672,9 +689,10 @@ ; EQ2ICMP-NEXT: movl %esi, %ecx ; EQ2ICMP-NEXT: movl %edi, %eax ; EQ2ICMP-NEXT: shll %cl, %eax -; EQ2ICMP-NEXT: cmpl $2, %eax -; EQ2ICMP-NEXT: jg .LBB14_2 +; EQ2ICMP-NEXT: cmpl $3, %eax +; EQ2ICMP-NEXT: jge .LBB14_2 ; EQ2ICMP-NEXT: # %bb.1: # %if.end +; EQ2ICMP-NEXT: cmpl $2, %eax ; EQ2ICMP-NEXT: movl $1, %eax ; EQ2ICMP-NEXT: cmovll %eax, %ecx ; EQ2ICMP-NEXT: imull %edi, %ecx @@ -701,9 +719,10 @@ define i64 @i_a__2(i32 signext %a, i32 signext %b) { ; DEFAULT-LABEL: i_a__2: ; DEFAULT: # %bb.0: # %entry -; DEFAULT-NEXT: cmpl $-2, %edi -; DEFAULT-NEXT: jg .LBB15_2 +; DEFAULT-NEXT: cmpl $-1, %edi +; DEFAULT-NEXT: jge .LBB15_2 ; DEFAULT-NEXT: # %bb.1: # %if.end +; DEFAULT-NEXT: cmpl $-2, %edi ; DEFAULT-NEXT: movl $1, %eax ; DEFAULT-NEXT: cmovel %esi, %eax ; DEFAULT-NEXT: imull %edi, %eax @@ -714,9 +733,10 @@ ; ; EQ2ICMP-LABEL: i_a__2: ; EQ2ICMP: # %bb.0: # %entry -; EQ2ICMP-NEXT: cmpl $-2, %edi -; EQ2ICMP-NEXT: jg .LBB15_2 +; EQ2ICMP-NEXT: cmpl $-1, %edi +; EQ2ICMP-NEXT: jge .LBB15_2 ; EQ2ICMP-NEXT: # %bb.1: # %if.end +; EQ2ICMP-NEXT: cmpl $-2, %edi ; EQ2ICMP-NEXT: movl $1, %eax ; EQ2ICMP-NEXT: cmovll %eax, %esi ; EQ2ICMP-NEXT: imull %edi, %esi @@ -834,9 +854,10 @@ define i64 @i_a_1(i32 signext %a, i32 signext %b) { ; DEFAULT-LABEL: i_a_1: ; DEFAULT: # %bb.0: # %entry -; DEFAULT-NEXT: cmpl $1, %edi -; DEFAULT-NEXT: jg .LBB18_2 +; DEFAULT-NEXT: cmpl $2, %edi +; DEFAULT-NEXT: jge .LBB18_2 ; DEFAULT-NEXT: # %bb.1: # %if.end +; DEFAULT-NEXT: cmpl $1, %edi ; DEFAULT-NEXT: movl $1, %eax ; DEFAULT-NEXT: cmovel %esi, %eax ; DEFAULT-NEXT: imull %edi, %eax @@ -847,11 +868,12 @@ ; ; EQ2ICMP-LABEL: i_a_1: ; EQ2ICMP: # %bb.0: # %entry -; EQ2ICMP-NEXT: cmpl $1, %edi -; EQ2ICMP-NEXT: jg .LBB18_2 +; EQ2ICMP-NEXT: cmpl $2, %edi +; EQ2ICMP-NEXT: jge .LBB18_2 ; EQ2ICMP-NEXT: # %bb.1: # %if.end +; EQ2ICMP-NEXT: testl %edi, %edi ; EQ2ICMP-NEXT: movl $1, %eax -; EQ2ICMP-NEXT: cmovll %eax, %esi +; EQ2ICMP-NEXT: cmovlel %eax, %esi ; EQ2ICMP-NEXT: imull %edi, %esi ; EQ2ICMP-NEXT: .LBB18_2: # %return ; EQ2ICMP-NEXT: movslq %esi, %rax @@ -875,9 +897,10 @@ define i64 @i_a_2(i32 signext %a, i32 signext %b) { ; DEFAULT-LABEL: i_a_2: ; DEFAULT: # %bb.0: # %entry -; DEFAULT-NEXT: cmpl $2, %edi -; DEFAULT-NEXT: jg .LBB19_2 +; DEFAULT-NEXT: cmpl $3, %edi +; DEFAULT-NEXT: jge .LBB19_2 ; DEFAULT-NEXT: # %bb.1: # %if.end +; DEFAULT-NEXT: cmpl $2, %edi ; DEFAULT-NEXT: movl $1, %eax ; DEFAULT-NEXT: cmovel %esi, %eax ; DEFAULT-NEXT: imull %edi, %eax @@ -888,9 +911,10 @@ ; ; EQ2ICMP-LABEL: i_a_2: ; EQ2ICMP: # %bb.0: # %entry -; EQ2ICMP-NEXT: cmpl $2, %edi -; EQ2ICMP-NEXT: jg .LBB19_2 +; EQ2ICMP-NEXT: cmpl $3, %edi +; EQ2ICMP-NEXT: jge .LBB19_2 ; EQ2ICMP-NEXT: # %bb.1: # %if.end +; EQ2ICMP-NEXT: cmpl $2, %edi ; EQ2ICMP-NEXT: movl $1, %eax ; EQ2ICMP-NEXT: cmovll %eax, %esi ; EQ2ICMP-NEXT: imull %edi, %esi diff --git a/llvm/test/CodeGen/X86/vector-shift-by-select-loop.ll b/llvm/test/CodeGen/X86/vector-shift-by-select-loop.ll --- a/llvm/test/CodeGen/X86/vector-shift-by-select-loop.ll +++ b/llvm/test/CodeGen/X86/vector-shift-by-select-loop.ll @@ -19,8 +19,8 @@ ; SSE-NEXT: # %bb.1: # %for.body.preheader ; SSE-NEXT: movl %ecx, %r9d ; SSE-NEXT: movl %edx, %eax -; SSE-NEXT: cmpl $31, %edx -; SSE-NEXT: ja .LBB0_3 +; SSE-NEXT: cmpl $32, %edx +; SSE-NEXT: jae .LBB0_3 ; SSE-NEXT: # %bb.2: ; SSE-NEXT: xorl %edx, %edx ; SSE-NEXT: jmp .LBB0_6 @@ -144,8 +144,8 @@ ; AVX1-NEXT: # %bb.1: # %for.body.preheader ; AVX1-NEXT: movl %ecx, %r9d ; AVX1-NEXT: movl %edx, %eax -; AVX1-NEXT: cmpl $31, %edx -; AVX1-NEXT: ja .LBB0_3 +; AVX1-NEXT: cmpl $32, %edx +; AVX1-NEXT: jae .LBB0_3 ; AVX1-NEXT: # %bb.2: ; AVX1-NEXT: xorl %edx, %edx ; AVX1-NEXT: jmp .LBB0_6 @@ -269,8 +269,8 @@ ; AVX2-NEXT: # %bb.1: # %for.body.preheader ; AVX2-NEXT: movl %ecx, %r9d ; AVX2-NEXT: movl %edx, %eax -; AVX2-NEXT: cmpl $31, %edx -; AVX2-NEXT: ja .LBB0_3 +; AVX2-NEXT: cmpl $32, %edx +; AVX2-NEXT: jae .LBB0_3 ; AVX2-NEXT: # %bb.2: ; AVX2-NEXT: xorl %edx, %edx ; AVX2-NEXT: jmp .LBB0_6 @@ -344,8 +344,8 @@ ; XOP-NEXT: # %bb.1: # %for.body.preheader ; XOP-NEXT: movl %ecx, %r9d ; XOP-NEXT: movl %edx, %eax -; XOP-NEXT: cmpl $31, %edx -; XOP-NEXT: ja .LBB0_3 +; XOP-NEXT: cmpl $32, %edx +; XOP-NEXT: jae .LBB0_3 ; XOP-NEXT: # %bb.2: ; XOP-NEXT: xorl %edx, %edx ; XOP-NEXT: jmp .LBB0_6 diff --git a/llvm/test/CodeGen/X86/widen_cast-1.ll b/llvm/test/CodeGen/X86/widen_cast-1.ll --- a/llvm/test/CodeGen/X86/widen_cast-1.ll +++ b/llvm/test/CodeGen/X86/widen_cast-1.ll @@ -12,8 +12,8 @@ ; CHECK-NEXT: pushl %eax ; CHECK-NEXT: movl $0, (%esp) ; CHECK-NEXT: pcmpeqd %xmm0, %xmm0 -; CHECK-NEXT: cmpl $3, (%esp) -; CHECK-NEXT: jg .LBB0_3 +; CHECK-NEXT: cmpl $4, (%esp) +; CHECK-NEXT: jge .LBB0_3 ; CHECK-NEXT: .p2align 4, 0x90 ; CHECK-NEXT: .LBB0_2: # %forbody ; CHECK-NEXT: # =>This Inner Loop Header: Depth=1 @@ -24,8 +24,8 @@ ; CHECK-NEXT: psubw %xmm0, %xmm1 ; CHECK-NEXT: movq %xmm1, (%ecx,%eax,8) ; CHECK-NEXT: incl (%esp) -; CHECK-NEXT: cmpl $3, (%esp) -; CHECK-NEXT: jle .LBB0_2 +; CHECK-NEXT: cmpl $4, (%esp) +; CHECK-NEXT: jl .LBB0_2 ; CHECK-NEXT: .LBB0_3: # %afterfor ; CHECK-NEXT: popl %eax ; CHECK-NEXT: retl @@ -35,8 +35,8 @@ ; ATOM-NEXT: pushl %eax ; ATOM-NEXT: pcmpeqd %xmm0, %xmm0 ; ATOM-NEXT: movl $0, (%esp) -; ATOM-NEXT: cmpl $3, (%esp) -; ATOM-NEXT: jg .LBB0_3 +; ATOM-NEXT: cmpl $4, (%esp) +; ATOM-NEXT: jge .LBB0_3 ; ATOM-NEXT: .p2align 4, 0x90 ; ATOM-NEXT: .LBB0_2: # %forbody ; ATOM-NEXT: # =>This Inner Loop Header: Depth=1 @@ -47,8 +47,8 @@ ; ATOM-NEXT: psubw %xmm0, %xmm1 ; ATOM-NEXT: movq %xmm1, (%ecx,%eax,8) ; ATOM-NEXT: incl (%esp) -; ATOM-NEXT: cmpl $3, (%esp) -; ATOM-NEXT: jle .LBB0_2 +; ATOM-NEXT: cmpl $4, (%esp) +; ATOM-NEXT: jl .LBB0_2 ; ATOM-NEXT: .LBB0_3: # %afterfor ; ATOM-NEXT: popl %eax ; ATOM-NEXT: retl diff --git a/llvm/test/CodeGen/X86/widen_cast-2.ll b/llvm/test/CodeGen/X86/widen_cast-2.ll --- a/llvm/test/CodeGen/X86/widen_cast-2.ll +++ b/llvm/test/CodeGen/X86/widen_cast-2.ll @@ -8,8 +8,8 @@ ; CHECK-NEXT: pushl %eax ; CHECK-NEXT: movl $0, (%esp) ; CHECK-NEXT: pcmpeqd %xmm0, %xmm0 -; CHECK-NEXT: cmpl $3, (%esp) -; CHECK-NEXT: jg .LBB0_3 +; CHECK-NEXT: cmpl $4, (%esp) +; CHECK-NEXT: jge .LBB0_3 ; CHECK-NEXT: .p2align 4, 0x90 ; CHECK-NEXT: .LBB0_2: # %forbody ; CHECK-NEXT: # =>This Inner Loop Header: Depth=1 @@ -26,8 +26,8 @@ ; CHECK-NEXT: pextrd $1, %xmm2, 20(%ecx,%eax) ; CHECK-NEXT: pextrd $2, %xmm2, 24(%ecx,%eax) ; CHECK-NEXT: incl (%esp) -; CHECK-NEXT: cmpl $3, (%esp) -; CHECK-NEXT: jle .LBB0_2 +; CHECK-NEXT: cmpl $4, (%esp) +; CHECK-NEXT: jl .LBB0_2 ; CHECK-NEXT: .LBB0_3: # %afterfor ; CHECK-NEXT: popl %eax ; CHECK-NEXT: retl diff --git a/llvm/test/CodeGen/X86/x32-va_start.ll b/llvm/test/CodeGen/X86/x32-va_start.ll --- a/llvm/test/CodeGen/X86/x32-va_start.ll +++ b/llvm/test/CodeGen/X86/x32-va_start.ll @@ -50,8 +50,8 @@ ; SSE-NEXT: movabsq $274877906952, %rax # imm = 0x4000000008 ; SSE-NEXT: movq %rax, -{{[0-9]+}}(%esp) ; SSE-NEXT: movl $8, %ecx -; SSE-NEXT: cmpl $40, %ecx -; SSE-NEXT: ja .LBB0_2 +; SSE-NEXT: cmpl $41, %ecx +; SSE-NEXT: jae .LBB0_2 ; SSE-NEXT: # %bb.1: # %vaarg.in_reg ; SSE-NEXT: movl -{{[0-9]+}}(%esp), %eax ; SSE-NEXT: addl %ecx, %eax @@ -81,8 +81,8 @@ ; NOSSE-NEXT: movabsq $206158430216, %rax # imm = 0x3000000008 ; NOSSE-NEXT: movq %rax, -{{[0-9]+}}(%esp) ; NOSSE-NEXT: movl $8, %ecx -; NOSSE-NEXT: cmpl $40, %ecx -; NOSSE-NEXT: ja .LBB0_2 +; NOSSE-NEXT: cmpl $41, %ecx +; NOSSE-NEXT: jae .LBB0_2 ; NOSSE-NEXT: # %bb.1: # %vaarg.in_reg ; NOSSE-NEXT: movl -{{[0-9]+}}(%esp), %eax ; NOSSE-NEXT: addl %ecx, %eax @@ -102,8 +102,8 @@ ; 32BITABI-NEXT: subl $28, %esp ; 32BITABI-NEXT: leal {{[0-9]+}}(%esp), %ecx ; 32BITABI-NEXT: movl %ecx, (%esp) -; 32BITABI-NEXT: cmpl $40, %ecx -; 32BITABI-NEXT: ja .LBB0_2 +; 32BITABI-NEXT: cmpl $41, %ecx +; 32BITABI-NEXT: jae .LBB0_2 ; 32BITABI-NEXT: # %bb.1: # %vaarg.in_reg ; 32BITABI-NEXT: movl {{[0-9]+}}(%esp), %eax ; 32BITABI-NEXT: addl %ecx, %eax diff --git a/llvm/test/CodeGen/X86/x86-shrink-wrapping.ll b/llvm/test/CodeGen/X86/x86-shrink-wrapping.ll --- a/llvm/test/CodeGen/X86/x86-shrink-wrapping.ll +++ b/llvm/test/CodeGen/X86/x86-shrink-wrapping.ll @@ -650,8 +650,8 @@ ; ENABLE-NEXT: movq 8(%rdi), %rdi ; ENABLE-NEXT: movzwl (%rdi), %eax ; ENABLE-NEXT: leal -54(%rax), %ecx -; ENABLE-NEXT: cmpl $14, %ecx -; ENABLE-NEXT: ja LBB8_3 +; ENABLE-NEXT: cmpl $15, %ecx +; ENABLE-NEXT: jae LBB8_3 ; ENABLE-NEXT: ## %bb.8: ## %lor.lhs.false ; ENABLE-NEXT: movl $24599, %edx ## imm = 0x6017 ; ENABLE-NEXT: btl %ecx, %edx @@ -687,8 +687,8 @@ ; DISABLE-NEXT: movq 8(%rdi), %rdi ; DISABLE-NEXT: movzwl (%rdi), %eax ; DISABLE-NEXT: leal -54(%rax), %ecx -; DISABLE-NEXT: cmpl $14, %ecx -; DISABLE-NEXT: ja LBB8_3 +; DISABLE-NEXT: cmpl $15, %ecx +; DISABLE-NEXT: jae LBB8_3 ; DISABLE-NEXT: ## %bb.8: ## %lor.lhs.false ; DISABLE-NEXT: movl $24599, %edx ## imm = 0x6017 ; DISABLE-NEXT: btl %ecx, %edx