Index: llvm/lib/Transforms/Utils/SimplifyCFG.cpp
===================================================================
--- llvm/lib/Transforms/Utils/SimplifyCFG.cpp
+++ llvm/lib/Transforms/Utils/SimplifyCFG.cpp
@@ -5209,6 +5209,29 @@
   } else
     return false;
 
+  // Try to propagate switch value to case successors.
+  SmallVector<const Use *, 8> Worklist;
+  Value *SwitchCond = SI->getCondition();
+  for (const Use &U : SwitchCond->uses())
+    Worklist.push_back(&U);
+  while (!Worklist.empty()) {
+    const Use *U = Worklist.pop_back_val();
+    auto UserInst = dyn_cast<Instruction>(U->getUser());
+    auto UserParent = UserInst->getParent();
+    if (UserParent == SI->getDefaultDest())
+      continue;
+    if (UserParent == DestA && DestA->getSinglePredecessor()) {
+      assert(CasesA.size() == 1);
+      Value *CaseAValue = cast<Value>(CasesA.back());
+      UserInst->replaceUsesOfWith(SwitchCond, CaseAValue);
+    }
+    if (UserParent == DestB && DestB->getSinglePredecessor()) {
+      assert(CasesB.size() == 1);
+      Value *CaseBValue = cast<Value>(CasesB.back());
+      UserInst->replaceUsesOfWith(SwitchCond, CaseBValue);
+    }
+  }
+
   // Start building the compare and branch.
 
   Constant *Offset = ConstantExpr::getNeg(ContiguousCases->back());
Index: llvm/test/Transforms/SimplifyCFG/switch-to-icmp-with-value-propagate.ll
===================================================================
--- /dev/null
+++ llvm/test/Transforms/SimplifyCFG/switch-to-icmp-with-value-propagate.ll
@@ -0,0 +1,143 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
+; RUN: opt < %s -simplifycfg -S | FileCheck %s
+
+; propagate value to bb2.
+define i64 @test1(i64 %x) {
+; CHECK-LABEL: @test1(
+; CHECK-NEXT:  entry:
+; CHECK-NEXT:    [[SWITCH:%.*]] = icmp ult i64 [[X:%.*]], 1
+; CHECK-NEXT:    [[TMP0:%.*]] = icmp eq i64 1, 100
+; CHECK-NEXT:    [[DOT:%.*]] = select i1 [[TMP0]], i64 200, i64 10
+; CHECK-NEXT:    [[COMMON_RET_OP:%.*]] = select i1 [[SWITCH]], i64 0, i64 [[DOT]]
+; CHECK-NEXT:    ret i64 [[COMMON_RET_OP]]
+;
+entry:
+  switch i64 %x, label %bb3 [
+  i64 0, label %bb1
+  i64 1, label %bb2
+  ]
+bb1:
+  ret i64 0
+bb2:
+  %0 = icmp eq i64 %x, 100
+  br i1 %0, label %bb4, label %bb5
+bb3:
+  unreachable
+bb4:
+  ret i64 200
+bb5:
+  ret i64 10
+}
+
+; propagate value both to bb1 and bb2.
+define i64 @test2(i64 %x) {
+; CHECK-LABEL: @test2(
+; CHECK-NEXT:  entry:
+; CHECK-NEXT:    [[X_OFF:%.*]] = add i64 [[X:%.*]], -1
+; CHECK-NEXT:    [[SWITCH:%.*]] = icmp ult i64 [[X_OFF]], 1
+; CHECK-NEXT:    br i1 [[SWITCH]], label [[BB1:%.*]], label [[BB2:%.*]]
+; CHECK:       bb1:
+; CHECK-NEXT:    [[TMP0:%.*]] = icmp eq i64 1, 100
+; CHECK-NEXT:    br i1 [[TMP0]], label [[BB4:%.*]], label [[COMMON_RET:%.*]]
+; CHECK:       common.ret:
+; CHECK-NEXT:    [[COMMON_RET_OP:%.*]] = phi i64 [ 200, [[BB4]] ], [ 0, [[BB1]] ], [ 10, [[BB2]] ]
+; CHECK-NEXT:    ret i64 [[COMMON_RET_OP]]
+; CHECK:       bb2:
+; CHECK-NEXT:    [[TMP1:%.*]] = icmp eq i64 2, 101
+; CHECK-NEXT:    br i1 [[TMP1]], label [[BB4]], label [[COMMON_RET]]
+; CHECK:       bb4:
+; CHECK-NEXT:    br label [[COMMON_RET]]
+;
+entry:
+  switch i64 %x, label %bb3 [
+  i64 1, label %bb1
+  i64 2, label %bb2
+  ]
+bb1:
+  %0 = icmp eq i64 %x, 100
+  br i1 %0, label %bb4, label %return
+return:
+  ret i64 0
+bb2:
+  %1 = icmp eq i64 %x, 101
+  br i1 %1, label %bb4, label %bb5
+bb3:
+  unreachable
+bb4:
+  ret i64 200
+bb5:
+  ret i64 10
+}
+
+define i64 @test3(i64 %x) {
+; CHECK-LABEL: @test3(
+; CHECK-NEXT:  entry:
+; CHECK-NEXT:    [[COND:%.*]] = icmp eq i64 [[X:%.*]], 1
+; CHECK-NEXT:    [[SPEC_SELECT:%.*]] = select i1 [[COND]], i64 10, i64 0
+; CHECK-NEXT:    ret i64 [[SPEC_SELECT]]
+;
+entry:
+  switch i64 %x, label %bb1 [
+  i64 1, label %bb2
+  ]
+bb1:
+  ret i64 0
+bb2:
+  %0 = icmp eq i64 %x, 100
+  br i1 %0, label %bb4, label %bb5
+bb4:
+  ret i64 200
+bb5:
+  ret i64 10
+}
+
+; bb2 has two predecessors with case value 1 and 2.
+define i64 @test_fail1(i64 %x) {
+; CHECK-LABEL: @test_fail1(
+; CHECK-NEXT:  entry:
+; CHECK-NEXT:    [[SWITCH:%.*]] = icmp ult i64 [[X:%.*]], 1
+; CHECK-NEXT:    [[TMP0:%.*]] = icmp eq i64 [[X]], 100
+; CHECK-NEXT:    [[DOT:%.*]] = select i1 [[TMP0]], i64 200, i64 10
+; CHECK-NEXT:    [[COMMON_RET_OP:%.*]] = select i1 [[SWITCH]], i64 0, i64 [[DOT]]
+; CHECK-NEXT:    ret i64 [[COMMON_RET_OP]]
+;
+entry:
+  switch i64 %x, label %bb3 [
+  i64 0, label %bb1
+  i64 1, label %bb2
+  i64 2, label %bb2
+  ]
+bb1:
+  ret i64 0
+bb2:
+  %0 = icmp eq i64 %x, 100
+  br i1 %0, label %bb4, label %bb5
+bb3:
+  unreachable
+bb4:
+  ret i64 200
+bb5:
+  ret i64 10
+}
+
+; return block has two predecessors.
+define i64 @test_fail2(i64 %x) {
+; CHECK-LABEL: @test_fail2(
+; CHECK-NEXT:  entry:
+; CHECK-NEXT:    [[SWITCH:%.*]] = icmp ult i64 [[X:%.*]], 1
+; CHECK-NEXT:    [[SPEC_SELECT:%.*]] = select i1 [[SWITCH]], i64 2, i64 [[X]]
+; CHECK-NEXT:    ret i64 [[SPEC_SELECT]]
+;
+entry:
+  switch i64 %x, label %bb2 [
+  i64 0, label %bb1
+  i64 1, label %return
+  ]
+bb1:
+  br label %return
+return:
+  %retval.0 = phi i64 [ %x, %entry ], [ 2, %bb1 ]
+  ret i64 %retval.0
+bb2:
+  unreachable
+}