Index: lib/Target/X86/X86ISelLowering.h
===================================================================
--- lib/Target/X86/X86ISelLowering.h
+++ lib/Target/X86/X86ISelLowering.h
@@ -348,6 +348,7 @@
 
       // OR/AND test for masks
       KORTEST,
+      KTEST,
 
       // Several flavors of instructions with vector shuffle behaviors.
       PACKSS,
Index: lib/Target/X86/X86ISelLowering.cpp
===================================================================
--- lib/Target/X86/X86ISelLowering.cpp
+++ lib/Target/X86/X86ISelLowering.cpp
@@ -19120,6 +19120,7 @@
   case X86ISD::TESTM:              return "X86ISD::TESTM";
   case X86ISD::TESTNM:             return "X86ISD::TESTNM";
   case X86ISD::KORTEST:            return "X86ISD::KORTEST";
+  case X86ISD::KTEST:              return "X86ISD::KTEST";
   case X86ISD::PACKSS:             return "X86ISD::PACKSS";
   case X86ISD::PACKUS:             return "X86ISD::PACKUS";
   case X86ISD::PALIGNR:            return "X86ISD::PALIGNR";
Index: lib/Target/X86/X86InstrAVX512.td
===================================================================
--- lib/Target/X86/X86InstrAVX512.td
+++ lib/Target/X86/X86InstrAVX512.td
@@ -2078,28 +2078,27 @@
 
 // Mask bit testing
 multiclass avx512_mask_testop<bits<8> opc, string OpcodeStr, RegisterClass KRC,
-                            SDNode OpNode> {
-  let Predicates = [HasAVX512], Defs = [EFLAGS] in
+                              SDNode OpNode, Predicate prd> {
+  let Predicates = [prd], Defs = [EFLAGS] in
     def rr : I<opc, MRMSrcReg, (outs), (ins KRC:$src1, KRC:$src2),
                !strconcat(OpcodeStr, "\t{$src2, $src1|$src1, $src2}"),
                [(set EFLAGS, (OpNode KRC:$src1, KRC:$src2))]>;
 }
 
-multiclass avx512_mask_testop_w<bits<8> opc, string OpcodeStr, SDNode OpNode> {
-  defm W : avx512_mask_testop<opc, !strconcat(OpcodeStr, "w"), VK16, OpNode>,
-                            VEX, PS;
-  let Predicates = [HasDQI] in
-  defm B : avx512_mask_testop<opc, !strconcat(OpcodeStr, "b"), VK8, OpNode>,
-                            VEX, PD;
-  let Predicates = [HasBWI] in {
-  defm Q : avx512_mask_testop<opc, !strconcat(OpcodeStr, "q"), VK64, OpNode>,
-                            VEX, PS, VEX_W;
-  defm D : avx512_mask_testop<opc, !strconcat(OpcodeStr, "d"), VK32, OpNode>,
-                            VEX, PD, VEX_W;
-  }
+multiclass avx512_mask_testop_w<bits<8> opc, string OpcodeStr, SDNode OpNode,
+                                Predicate prdW = HasAVX512> {
+  defm B : avx512_mask_testop<opc, OpcodeStr#"b", VK8, OpNode, HasDQI>,
+                                                                VEX, PD;
+  defm W : avx512_mask_testop<opc, OpcodeStr#"w", VK16, OpNode, prdW>,
+                                                                VEX, PS;
+  defm Q : avx512_mask_testop<opc, OpcodeStr#"q", VK64, OpNode, HasBWI>,
+                                                                VEX, PS, VEX_W;
+  defm D : avx512_mask_testop<opc, OpcodeStr#"d", VK32, OpNode, HasBWI>,
+                                                                VEX, PD, VEX_W;
 }
 
 defm KORTEST : avx512_mask_testop_w<0x98, "kortest", X86kortest>;
+defm KTEST   : avx512_mask_testop_w<0x99, "ktest", X86ktest, HasDQI>;
 
 // Mask shift
 multiclass avx512_mask_shiftop<bits<8> opc, string OpcodeStr, RegisterClass KRC,
Index: lib/Target/X86/X86InstrFragmentsSIMD.td
===================================================================
--- lib/Target/X86/X86InstrFragmentsSIMD.td
+++ lib/Target/X86/X86InstrFragmentsSIMD.td
@@ -188,6 +188,7 @@
 def X86ptest   : SDNode<"X86ISD::PTEST", SDTX86CmpPTest>;
 def X86testp   : SDNode<"X86ISD::TESTP", SDTX86CmpPTest>;
 def X86kortest : SDNode<"X86ISD::KORTEST", SDTX86CmpPTest>;
+def X86ktest   : SDNode<"X86ISD::KTEST", SDTX86CmpPTest>;
 def X86testm   : SDNode<"X86ISD::TESTM", SDTypeProfile<1, 2, [SDTCisVec<0>,
                                           SDTCisVec<1>, SDTCisSameAs<2, 1>,
                                           SDTCVecEltisVT<0, i1>,
Index: test/MC/X86/avx512-encodings.s
===================================================================
--- test/MC/X86/avx512-encodings.s
+++ test/MC/X86/avx512-encodings.s
@@ -14958,3 +14958,7 @@
 // CHECK:  encoding: [0x62,0xf2,0xc5,0x08,0x43,0x92,0xf8,0xfb,0xff,0xff]
           vgetexpsd -1032(%rdx), %xmm7, %xmm2
 
+// CHECK: kortestw %k6, %k2
+// CHECK:  encoding: [0xc5,0xf8,0x98,0xd6]
+          kortestw %k6, %k2
+
Index: test/MC/X86/x86-64-avx512bw.s
===================================================================
--- test/MC/X86/x86-64-avx512bw.s
+++ test/MC/X86/x86-64-avx512bw.s
@@ -4112,3 +4112,19 @@
 // CHECK:  encoding: [0x62,0x61,0x2d,0x40,0x69,0xb2,0xc0,0xdf,0xff,0xff]
           vpunpckhwd -8256(%rdx), %zmm26, %zmm30
 
+// CHECK: ktestd %k3, %k3
+// CHECK:  encoding: [0xc4,0xe1,0xf9,0x99,0xdb]
+          ktestd %k3, %k3
+
+// CHECK: ktestq %k6, %k2
+// CHECK:  encoding: [0xc4,0xe1,0xf8,0x99,0xd6]
+          ktestq %k6, %k2
+
+// CHECK: kortestd %k3, %k4
+// CHECK:  encoding: [0xc4,0xe1,0xf9,0x98,0xe3]
+          kortestd %k3, %k4
+
+// CHECK: kortestq %k4, %k5
+// CHECK:  encoding: [0xc4,0xe1,0xf8,0x98,0xec]
+          kortestq %k4, %k5
+
Index: test/MC/X86/x86-64-avx512dq.s
===================================================================
--- test/MC/X86/x86-64-avx512dq.s
+++ test/MC/X86/x86-64-avx512dq.s
@@ -2371,3 +2371,27 @@
 // CHECK:  encoding: [0x62,0xa1,0xff,0xca,0x7a,0xd5]
           vcvtuqq2ps %zmm21, %ymm18 {%k2} {z}
 
+// CHECK: ktestb %k6, %k4
+// CHECK:  encoding: [0xc5,0xf9,0x99,0xe6]
+          ktestb %k6, %k4
+
+// CHECK: ktestb %k4, %k5
+// CHECK:  encoding: [0xc5,0xf9,0x99,0xec]
+          ktestb %k4, %k5
+
+// CHECK: ktestw %k4, %k5
+// CHECK:  encoding: [0xc5,0xf8,0x99,0xec]
+          ktestw %k4, %k5
+
+// CHECK: ktestw %k6, %k2
+// CHECK:  encoding: [0xc5,0xf8,0x99,0xd6]
+          ktestw %k6, %k2
+
+// CHECK: kortestb %k3, %k2
+// CHECK:  encoding: [0xc5,0xf9,0x98,0xd3]
+          kortestb %k3, %k2
+
+// CHECK: kortestb %k6, %k2
+// CHECK:  encoding: [0xc5,0xf9,0x98,0xd6]
+          kortestb %k6, %k2
+