diff --git a/llvm/lib/Target/M68k/M68kInstrControl.td b/llvm/lib/Target/M68k/M68kInstrControl.td --- a/llvm/lib/Target/M68k/M68kInstrControl.td +++ b/llvm/lib/Target/M68k/M68kInstrControl.td @@ -61,51 +61,60 @@ /// NE—Not equal VS—Overflow set /// /// *Not applicable to the Bcc instructions. -def MxCCt : MxBead4Bits<0b0000>; -def MxCCf : MxBead4Bits<0b0001>; -def MxCChi : MxBead4Bits<0b0010>; -def MxCCls : MxBead4Bits<0b0011>; -def MxCCcc : MxBead4Bits<0b0100>; -def MxCCcs : MxBead4Bits<0b0101>; -def MxCCne : MxBead4Bits<0b0110>; -def MxCCeq : MxBead4Bits<0b0111>; -def MxCCvc : MxBead4Bits<0b1000>; -def MxCCvs : MxBead4Bits<0b1001>; -def MxCCpl : MxBead4Bits<0b1010>; -def MxCCmi : MxBead4Bits<0b1011>; -def MxCCge : MxBead4Bits<0b1100>; -def MxCClt : MxBead4Bits<0b1101>; -def MxCCgt : MxBead4Bits<0b1110>; -def MxCCle : MxBead4Bits<0b1111>; +class MxEncCondOp cond> { + dag Value = (descend cond); +} + +def MxCCt : MxEncCondOp<0b0000>; +def MxCCf : MxEncCondOp<0b0001>; +def MxCChi : MxEncCondOp<0b0010>; +def MxCCls : MxEncCondOp<0b0011>; +def MxCCcc : MxEncCondOp<0b0100>; +def MxCCcs : MxEncCondOp<0b0101>; +def MxCCne : MxEncCondOp<0b0110>; +def MxCCeq : MxEncCondOp<0b0111>; +def MxCCvc : MxEncCondOp<0b1000>; +def MxCCvs : MxEncCondOp<0b1001>; +def MxCCpl : MxEncCondOp<0b1010>; +def MxCCmi : MxEncCondOp<0b1011>; +def MxCCge : MxEncCondOp<0b1100>; +def MxCClt : MxEncCondOp<0b1101>; +def MxCCgt : MxEncCondOp<0b1110>; +def MxCCle : MxEncCondOp<0b1111>; + + /// --------------------------------+---------+--------- /// F E D C | B A 9 8 | 7 6 | 5 4 3 | 2 1 0 /// --------------------------------+---------+--------- /// 0 1 0 1 | CONDITION | 1 1 | MODE | REG /// ---------------------------------------------------- -class MxSccEncoding - : MxEncoding, CC, MxBead4Bits<0b0101>, - EXT.Imm, EXT.B8, EXT.Scale, EXT.WL, EXT.DAReg>; let Uses = [CCR] in { class MxSccR : MxInst<(outs MxDRD8:$dst), (ins), "s"#CC#"\t$dst", - [(set i8:$dst, (MxSetCC !cast("MxCOND"#CC), CCR))], - MxSccEncoding("MxCC"#CC)>>; + [(set i8:$dst, (MxSetCC !cast("MxCOND"#CC), CCR))]> { + let Inst = (descend 0b0101, !cast("MxCC"#CC).Value, 0b11, + /*MODE without last bit*/0b00, + /*REGISTER prefixed with D/A bit*/(operand "$dst", 4)); +} -class MxSccM +class MxSccM : MxInst<(outs), (ins MEMOpd:$dst), "s"#CC#"\t$dst", - [(store (MxSetCC !cast("MxCOND"#CC), CCR), MEMPat:$dst)], - MxSccEncoding("MxCC"#CC)>>; + [(store (MxSetCC !cast("MxCOND"#CC), CCR), MEMPat:$dst)]> { + let Inst = + (ascend + (descend 0b0101, !cast("MxCC"#CC).Value, 0b11, DST_ENC.EA), + DST_ENC.Supplement + ); +} } foreach cc = [ "cc", "ls", "lt", "eq", "mi", "f", "ne", "ge", "cs", "pl", "gt", "t", "hi", "vc", "le", "vs"] in { def SET#"d8"#cc : MxSccR; -def SET#"j8"#cc : MxSccM; -def SET#"p8"#cc : MxSccM; +def SET#"j8"#cc : MxSccM>; +def SET#"p8"#cc : MxSccM>; } //===----------------------------------------------------------------------===// @@ -147,20 +156,24 @@ /// 32-BIT DISPLACEMENT IF 8-BIT DISPLACEMENT = $FF /// -------------------------------------------------- let isBranch = 1, isTerminator = 1, Uses = [CCR] in -class MxBcc - : MxInst<(outs), (ins TARGET:$dst), "b"#cc#"\t$dst", [], ENC>; +class MxBcc + : MxInst<(outs), (ins TARGET:$dst), "b"#cc#"\t$dst", []> { + let Inst = + (ascend + (descend 0b0110, !cast("MxCC"#cc).Value, disp), + supplement + ); +} foreach cc = [ "cc", "ls", "lt", "eq", "mi", "ne", "ge", "cs", "pl", "gt", "hi", "vc", "le", "vs"] in { def B#cc#"8" : MxBcc, - !cast("MxCC"#cc), MxBead4Bits<0x6>>>; + (operand "$dst", 8, (encoder "encodePCRelImm<8>")), (ascend)>; + def B#cc#"16" - : MxBcc, - MxBead4Bits<0x0>, !cast("MxCC"#cc), - MxBead4Bits<0x6>, MxBead16Imm<0>>>; + : MxBcc"))>; } foreach cc = [ "cc", "ls", "lt", "eq", "mi", "ne", "ge",