Index: llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
===================================================================
--- llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
+++ llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
@@ -4014,7 +4014,7 @@
   Type *Ty = I.getAllocatedType();
   const TargetLowering &TLI = DAG.getTargetLoweringInfo();
   auto &DL = DAG.getDataLayout();
-  uint64_t TySize = DL.getTypeAllocSize(Ty);
+  TypeSize TySize = DL.getTypeAllocSize(Ty);
   MaybeAlign Alignment = std::max(DL.getPrefTypeAlign(Ty), I.getAlign());
 
   SDValue AllocSize = getValue(I.getArraySize());
@@ -4023,9 +4023,9 @@
   if (AllocSize.getValueType() != IntPtr)
     AllocSize = DAG.getZExtOrTrunc(AllocSize, dl, IntPtr);
 
-  AllocSize = DAG.getNode(ISD::MUL, dl, IntPtr,
-                          AllocSize,
-                          DAG.getConstant(TySize, dl, IntPtr));
+  AllocSize =
+      DAG.getNode(ISD::MUL, dl, IntPtr, AllocSize,
+                  DAG.getConstant(TySize.getKnownMinValue(), dl, IntPtr));
 
   // Handle alignment.  If the requested alignment is less than or equal to
   // the stack alignment, ignore it.  If the size is greater than or equal to
Index: llvm/test/CodeGen/AArch64/sve-alloca.ll
===================================================================
--- /dev/null
+++ llvm/test/CodeGen/AArch64/sve-alloca.ll
@@ -0,0 +1,18 @@
+; RUN: llc -mtriple=aarch64 -mattr=+sve < %s | FileCheck %s
+
+declare void @bar(<vscale x 4 x i64>*)
+
+; CHECK-LABEL: @foo
+define void @foo(<vscale x 4 x i64> %dst, i1 %cond) {
+entry:
+  br i1 %cond, label %if.then, label %if.end
+
+if.then:
+  %ptr = alloca <vscale x 4 x i64>
+  store <vscale x 4 x i64> %dst, <vscale x 4 x i64>* %ptr
+  call void @bar(<vscale x 4 x i64>* %ptr)
+  br label %if.end
+
+if.end:
+  ret void
+}