Index: llvm/lib/Target/AMDGPU/SIFrameLowering.cpp =================================================================== --- llvm/lib/Target/AMDGPU/SIFrameLowering.cpp +++ llvm/lib/Target/AMDGPU/SIFrameLowering.cpp @@ -1195,7 +1195,8 @@ } } else if (TII->isStoreToStackSlot(MI, FrameIndex) || TII->isLoadFromStackSlot(MI, FrameIndex)) - NonVGPRSpillFIs.set(FrameIndex); + if (!MFI.isFixedObjectIndex(FrameIndex)) + NonVGPRSpillFIs.set(FrameIndex); } } Index: llvm/test/CodeGen/AMDGPU/spill-vgpr-to-agpr.ll =================================================================== --- llvm/test/CodeGen/AMDGPU/spill-vgpr-to-agpr.ll +++ llvm/test/CodeGen/AMDGPU/spill-vgpr-to-agpr.ll @@ -281,6 +281,45 @@ ret void } +; Make sure there's no crash when we have loads from fixed stack +; objects and are processing VGPR spills + +; GCN-LABEL: {{^}}stack_args_vgpr_spill: +; GFX908: v_accvgpr_write_b32 +; GFX908: buffer_load_dword v{{[0-9]+}}, off, s[0:3], s32 +; GFX908: buffer_load_dword v{{[0-9]+}}, off, s[0:3], s32 offset:4 +define void @stack_args_vgpr_spill(<32 x float> %arg0, <32 x float> %arg1, <32 x float> addrspace(1)* %p) #1 { + %tid = call i32 @llvm.amdgcn.workitem.id.x() + %p1 = getelementptr inbounds <32 x float>, <32 x float> addrspace(1)* %p, i32 %tid + %p2 = getelementptr inbounds <32 x float>, <32 x float> addrspace(1)* %p1, i32 %tid + %p3 = getelementptr inbounds <32 x float>, <32 x float> addrspace(1)* %p2, i32 %tid + %p4 = getelementptr inbounds <32 x float>, <32 x float> addrspace(1)* %p3, i32 %tid + %p5 = getelementptr inbounds <32 x float>, <32 x float> addrspace(1)* %p4, i32 %tid + %p6 = getelementptr inbounds <32 x float>, <32 x float> addrspace(1)* %p5, i32 %tid + %p7 = getelementptr inbounds <32 x float>, <32 x float> addrspace(1)* %p6, i32 %tid + %v1 = load volatile <32 x float>, <32 x float> addrspace(1)* %p1 + %v2 = load volatile <32 x float>, <32 x float> addrspace(1)* %p2 + %v3 = load volatile <32 x float>, <32 x float> addrspace(1)* %p3 + %v4 = load volatile <32 x float>, <32 x float> addrspace(1)* %p4 + %v5 = load volatile <32 x float>, <32 x float> addrspace(1)* %p5 + %v6 = load volatile <32 x float>, <32 x float> addrspace(1)* %p6 + %v7 = load volatile <32 x float>, <32 x float> addrspace(1)* %p7 + br label %st + +st: + store volatile <32 x float> %arg0, <32 x float> addrspace(1)* undef + store volatile <32 x float> %arg1, <32 x float> addrspace(1)* undef + store volatile <32 x float> %v1, <32 x float> addrspace(1)* undef + store volatile <32 x float> %v2, <32 x float> addrspace(1)* undef + store volatile <32 x float> %v3, <32 x float> addrspace(1)* undef + store volatile <32 x float> %v4, <32 x float> addrspace(1)* undef + store volatile <32 x float> %v5, <32 x float> addrspace(1)* undef + store volatile <32 x float> %v6, <32 x float> addrspace(1)* undef + store volatile <32 x float> %v7, <32 x float> addrspace(1)* undef + ret void +} + + declare i32 @llvm.amdgcn.workitem.id.x() attributes #0 = { nounwind "amdgpu-num-vgpr"="10" }