diff --git a/llvm/test/CodeGen/PowerPC/aix-prefixed-instruction-boundary.mir b/llvm/test/CodeGen/PowerPC/aix-prefixed-instruction-boundary.mir --- a/llvm/test/CodeGen/PowerPC/aix-prefixed-instruction-boundary.mir +++ b/llvm/test/CodeGen/PowerPC/aix-prefixed-instruction-boundary.mir @@ -43,7 +43,7 @@ ... # DIS: Disassembly of section .text: -# DIS: 00000000 <.text>: +# DIS: 00000000 <.aix-prefixed-instruction-boundary>: # DIS-NEXT: 0: 38 60 00 02 li 3, 2 # DIS-NEXT: 4: 06 00 00 00 38 63 00 0d paddi 3, 3, 13, 0 # DIS-NEXT: c: 06 00 00 00 38 63 00 0d paddi 3, 3, 13, 0 diff --git a/llvm/test/CodeGen/PowerPC/aix-return55.ll b/llvm/test/CodeGen/PowerPC/aix-return55.ll --- a/llvm/test/CodeGen/PowerPC/aix-return55.ll +++ b/llvm/test/CodeGen/PowerPC/aix-return55.ll @@ -21,7 +21,7 @@ ; CHECK: blr } -;CHECKOBJ: 00000000 <.text>: +;CHECKOBJ: 00000000 <.foo>: ;CHECKOBJ-NEXT: 0: 38 60 00 37 li 3, 55 ;CHECKOBJ-NEXT: 4: 4e 80 00 20 blr{{[[:space:]] *}} ;CHECKOBJ-NEXT: 00000008 <.rodata.str1.1>: diff --git a/llvm/test/CodeGen/PowerPC/aix-user-defined-memcpy.ll b/llvm/test/CodeGen/PowerPC/aix-user-defined-memcpy.ll --- a/llvm/test/CodeGen/PowerPC/aix-user-defined-memcpy.ll +++ b/llvm/test/CodeGen/PowerPC/aix-user-defined-memcpy.ll @@ -102,7 +102,7 @@ ; 32-REL-NOT: Type: R_RBR (0x1A) ; 32-DIS: Disassembly of section .text: -; 32-DIS: 00000000 <.text>: +; 32-DIS: 00000000 <.memcpy>: ; 32-DIS-NEXT: 0: 38 60 00 03 li 3, 3 ; 32-DIS-NEXT: 4: 4e 80 00 20 blr ; 32-DIS-NEXT: 8: 60 00 00 00 nop diff --git a/llvm/test/CodeGen/PowerPC/aix-xcoff-mergeable-const.ll b/llvm/test/CodeGen/PowerPC/aix-xcoff-mergeable-const.ll --- a/llvm/test/CodeGen/PowerPC/aix-xcoff-mergeable-const.ll +++ b/llvm/test/CodeGen/PowerPC/aix-xcoff-mergeable-const.ll @@ -62,7 +62,7 @@ ;CHECK-NEXT: .space 1 -;CHECKOBJ: 00000000 <.text>: +;CHECKOBJ: 00000000 <.main>: ;CHECKOBJ-NEXT: 0: 38 60 00 00 li 3, 0 ;CHECKOBJ-NEXT: 4: 4e 80 00 20 blr ;CHECKOBJ-NEXT: ...{{[[:space:]] *}} diff --git a/llvm/test/CodeGen/PowerPC/aix-xcoff-reloc-symb.mir b/llvm/test/CodeGen/PowerPC/aix-xcoff-reloc-symb.mir --- a/llvm/test/CodeGen/PowerPC/aix-xcoff-reloc-symb.mir +++ b/llvm/test/CodeGen/PowerPC/aix-xcoff-reloc-symb.mir @@ -75,7 +75,7 @@ # DIS: Disassembly of section .text: # DIS-EMPTY: -# DIS-NEXT: 00000000 <.text>: +# DIS-NEXT: 00000000 <.foo>: # DIS-NEXT: 0: 80 62 00 00 lwz 3, 0(2) # DIS-NEXT: 4: 4e 80 00 20 blr # DIS-EMPTY: diff --git a/llvm/test/CodeGen/PowerPC/aix-xcoff-reloc.ll b/llvm/test/CodeGen/PowerPC/aix-xcoff-reloc.ll --- a/llvm/test/CodeGen/PowerPC/aix-xcoff-reloc.ll +++ b/llvm/test/CodeGen/PowerPC/aix-xcoff-reloc.ll @@ -422,7 +422,7 @@ ; DIS: {{.*}}aix-xcoff-reloc.ll.tmp.o: file format aixcoff-rs6000 ; DIS: Disassembly of section .text: -; DIS: 00000000 <.text>: +; DIS: 00000000 <.foo>: ; DIS-NEXT: 0: 7c 08 02 a6 mflr 0 ; DIS-NEXT: 4: 90 01 00 08 stw 0, 8(1) ; DIS-NEXT: 8: 94 21 ff c0 stwu 1, -64(1) diff --git a/llvm/test/CodeGen/PowerPC/aix-xcoff-textdisassembly.ll b/llvm/test/CodeGen/PowerPC/aix-xcoff-textdisassembly.ll --- a/llvm/test/CodeGen/PowerPC/aix-xcoff-textdisassembly.ll +++ b/llvm/test/CodeGen/PowerPC/aix-xcoff-textdisassembly.ll @@ -13,7 +13,7 @@ } ; CHECK: Disassembly of section .text:{{[[:space:]] *}} -; CHECK-NEXT: 00000000 <.text>: +; CHECK-NEXT: 00000000 <.foo>: ; CHECK-NEXT: 0: 38 60 00 00 li 3, 0 ; CHECK-NEXT: 4: 4e 80 00 20 blr ; CHECK-NEXT: 8: 60 00 00 00 nop diff --git a/llvm/test/tools/llvm-objdump/XCOFF/disassemble-all.test b/llvm/test/tools/llvm-objdump/XCOFF/disassemble-all.test --- a/llvm/test/tools/llvm-objdump/XCOFF/disassemble-all.test +++ b/llvm/test/tools/llvm-objdump/XCOFF/disassemble-all.test @@ -18,7 +18,7 @@ CHECK: Inputs/xcoff-section-headers.o: file format aixcoff-rs6000 CHECK: Disassembly of section .text: -CHECK: 00000000 <.text>: +CHECK: 00000000 <.func>: CHECK-NEXT: 0: 80 62 00 04 lwz 3, 4(2) WITH-R-NEXT: 00000002: R_TOC a CHECK-NEXT: 4: 80 63 00 00 lwz 3, 0(3) diff --git a/llvm/test/tools/llvm-objdump/XCOFF/disassemble-symbol-description.test b/llvm/test/tools/llvm-objdump/XCOFF/disassemble-symbol-description.test --- a/llvm/test/tools/llvm-objdump/XCOFF/disassemble-symbol-description.test +++ b/llvm/test/tools/llvm-objdump/XCOFF/disassemble-symbol-description.test @@ -22,7 +22,7 @@ COMMON: Inputs/xcoff-section-headers.o: file format aixcoff-rs6000 COMMON: Disassembly of section .text: -PLAIN: 00000000 <.text>: +PLAIN: 00000000 <.func>: DESC: 00000000 (idx: 16) .func: COMMON-NEXT: 0: 80 62 00 04 lwz 3, 4(2) RELOC: 00000002: R_TOC (idx: 26) a[TC] diff --git a/llvm/test/tools/llvm-objdump/XCOFF/disassemble-symbolize-operands.ll b/llvm/test/tools/llvm-objdump/XCOFF/disassemble-symbolize-operands.ll --- a/llvm/test/tools/llvm-objdump/XCOFF/disassemble-symbolize-operands.ll +++ b/llvm/test/tools/llvm-objdump/XCOFF/disassemble-symbolize-operands.ll @@ -3,8 +3,7 @@ ; RUN: | FileCheck %s ;; Expect to find the branch labels. -; CHECK-LABEL: <.text>: -;; TODO: <.internal> should be printed instead of <.text>. +; CHECK-LABEL: <.internal>: ; CHECK-NEXT: 0: mr 4, 3 ; CHECK-NEXT: 4: li 3, 0 ; CHECK-NEXT: 8: mtctr 4 @@ -19,11 +18,11 @@ ; CHECK-NEXT: 60: bf 8, 0x84 ; CHECK-NEXT: : ; CHECK-NEXT: 64: mr 3, 31 -; CHECK-NEXT: 68: bl 0x0 <.text> +; CHECK-NEXT: 68: bl 0x0 <.internal> ; CHECK-NEXT: 6c: mr 31, 3 ; CHECK-NEXT: 70: cmplwi 3, 11 ; CHECK-NEXT: 74: bt 0, 0x60 -; CHECK-NEXT: 78: bl 0x0 <.text> +; CHECK-NEXT: 78: bl 0x0 <.internal> ; CHECK-NEXT: 7c: nop ; CHECK-NEXT: 80: b 0x60 ; CHECK-NEXT: : diff --git a/llvm/test/tools/llvm-objdump/XCOFF/print-linenumber.test b/llvm/test/tools/llvm-objdump/XCOFF/print-linenumber.test --- a/llvm/test/tools/llvm-objdump/XCOFF/print-linenumber.test +++ b/llvm/test/tools/llvm-objdump/XCOFF/print-linenumber.test @@ -17,7 +17,7 @@ # LINES32: Inputs/basic32.o: file format aixcoff-rs6000 # LINES32: Disassembly of section .text: -# LINES32: 00000000 <.text>: +# LINES32: 00000000 <.main>: # LINES32: ; .main(): # LINES32-NEXT: ; /basic.c:1 # LINES32-NEXT: 0: 38 60 00 00 li 3, 0 diff --git a/llvm/tools/llvm-objdump/llvm-objdump.cpp b/llvm/tools/llvm-objdump/llvm-objdump.cpp --- a/llvm/tools/llvm-objdump/llvm-objdump.cpp +++ b/llvm/tools/llvm-objdump/llvm-objdump.cpp @@ -1135,6 +1135,17 @@ if (NameOrErr->empty() && !(Obj->isXCOFF() && SymbolDescription)) continue; + // The default .text with the address of 0x00 is a special symbol for a + // XCOFF text section. It doesn't bind to code locations and is irrelevant + // for disassembly. + if (Obj->isXCOFF() && NameOrErr->equals(".text")) { + const SymbolRef::Type Type = unwrapOrError(Symbol.getType(), FileName); + const uint64_t Addr = unwrapOrError(Symbol.getAddress(), FileName); + if (Addr == 0 && + (Type == SymbolRef::ST_Other || Type == SymbolRef::ST_Unknown)) + continue; + } + if (Obj->isELF() && getElfSymbolType(Obj, Symbol) == ELF::STT_SECTION) continue;