diff --git a/llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCTargetDesc.cpp b/llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCTargetDesc.cpp
--- a/llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCTargetDesc.cpp
+++ b/llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCTargetDesc.cpp
@@ -142,6 +142,14 @@
       return true;
     }
 
+    if (Inst.getOpcode() == RISCV::JALR && PreviousInst.hasValue() &&
+        PreviousInst->getOpcode() == RISCV::AUIPC &&
+        PreviousInst->getOperand(0).getReg() == Inst.getOperand(1).getReg()) {
+      Target = Addr + Inst.getOperand(2).getImm() +
+               PreviousInst->getOperand(1).getImm() - 4;
+      return true;
+    }
+
     return false;
   }
 };
diff --git a/llvm/test/tools/llvm-objdump/ELF/RISCV/branches.s b/llvm/test/tools/llvm-objdump/ELF/RISCV/branches.s
--- a/llvm/test/tools/llvm-objdump/ELF/RISCV/branches.s
+++ b/llvm/test/tools/llvm-objdump/ELF/RISCV/branches.s
@@ -56,12 +56,12 @@
 # CHECK: 46: c.j 0x60 <bar>
 c.j bar
 
-# CHECK: 48: auipc ra, 0
-# CHECK: 4c: jalr	ra, 16(ra)
+# CHECK: 48: auipc	ra, 0
+# CHECK: 4c: jalr	ra, 16(ra) <foo+0x58>
 call .Llocal
 
-# CHECK: 50: auipc ra, 0
-# CHECK: 54: jalr	ra, 16(ra)
+# CHECK: 50: auipc	ra, 0
+# CHECK: 54: jalr	ra, 16(ra) <bar>
 call bar
 
 .Llocal: