Index: llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCTargetDesc.cpp
===================================================================
--- llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCTargetDesc.cpp
+++ llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCTargetDesc.cpp
@@ -142,6 +142,14 @@
       return true;
     }
 
+    if (Inst.getOpcode() == RISCV::JALR && PreviousInst.hasValue() &&
+        PreviousInst->getOpcode() == RISCV::AUIPC &&
+        PreviousInst->getOperand(0).getReg() == Inst.getOperand(1).getReg()) {
+      Target = Addr + Inst.getOperand(2).getImm() +
+               PreviousInst->getOperand(1).getImm() - 4;
+      return true;
+    }
+
     return false;
   }
 };
Index: llvm/test/tools/llvm-objdump/ELF/RISCV/branches.s
===================================================================
--- llvm/test/tools/llvm-objdump/ELF/RISCV/branches.s
+++ llvm/test/tools/llvm-objdump/ELF/RISCV/branches.s
@@ -57,11 +57,11 @@
 c.j bar
 
 # CHECK: auipc ra, 0
-# CHECK: jalr	ra, 16(ra){{$}}
+# CHECK: jalr	ra, 16(ra) <foo+0x58>
 call .Llocal
 
 # CHECK: auipc ra, 0
-# CHECK: jalr	ra, 16(ra){{$}}
+# CHECK: jalr	ra, 16(ra) <bar>
 call bar
 
 .Llocal: