diff --git a/llvm/lib/Target/PowerPC/PPCCallingConv.td b/llvm/lib/Target/PowerPC/PPCCallingConv.td
--- a/llvm/lib/Target/PowerPC/PPCCallingConv.td
+++ b/llvm/lib/Target/PowerPC/PPCCallingConv.td
@@ -298,7 +298,7 @@
                                         X21, X22, X23, X24, X25, X26, X27, X28,
                                         X29, X30, X31, F14, F15, F16, F17, F18,
                                         F19, F20, F21, F22, F23, F24, F25, F26,
-                                        F27, F28, F29, F30, F31, CR2, CR3, CR4
+                                        F27, F28, F29, F30, F31, CR2, CR3, CR4, LR8
                                    )>;
 
 
diff --git a/llvm/test/CodeGen/PowerPC/ppc-shrink-wrapping.ll b/llvm/test/CodeGen/PowerPC/ppc-shrink-wrapping.ll
--- a/llvm/test/CodeGen/PowerPC/ppc-shrink-wrapping.ll
+++ b/llvm/test/CodeGen/PowerPC/ppc-shrink-wrapping.ll
@@ -1,9 +1,10 @@
-; RUN: llc -mtriple=powerpc64le-unknown-linux-gnu -mcpu=pwr8 %s -o - -verify-machineinstrs | FileCheck %s --check-prefixes=CHECK,ENABLE,CHECK-64,ENABLE-64
-; RUN: llc -mtriple=powerpc64le-unknown-linux-gnu %s -o - -enable-shrink-wrap=false -verify-machineinstrs |  FileCheck %s --check-prefixes=CHECK,DISABLE,CHECK-64,DISABLE-64
-; RUN: llc -mtriple=powerpc-ibm-aix-xcoff -mattr=-altivec -mcpu=pwr8 %s -o - -verify-machineinstrs | FileCheck %s --check-prefixes=CHECK,ENABLE,CHECK-32,ENABLE-32
-; RUN: llc -mtriple=powerpc-ibm-aix-xcoff %s -o - -enable-shrink-wrap=false -verify-machineinstrs |  FileCheck %s --check-prefixes=CHECK,DISABLE,CHECK-32,DISABLE-32
-; RUN: llc -mtriple=powerpc64-ibm-aix-xcoff -mattr=-altivec -mcpu=pwr8 %s -o - -verify-machineinstrs | FileCheck %s --check-prefixes=CHECK,ENABLE,CHECK-64,ENABLE-64
-; RUN: llc -mtriple=powerpc64-ibm-aix-xcoff %s -o - -enable-shrink-wrap=false -verify-machineinstrs |  FileCheck %s --check-prefixes=CHECK,DISABLE,CHECK-64,DISABLE-64
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc -mtriple=powerpc64le-unknown-linux-gnu -mcpu=pwr8 %s -o - -verify-machineinstrs | FileCheck %s --check-prefixes=CHECK
+; RUN: llc -mtriple=powerpc64le-unknown-linux-gnu %s -o - -enable-shrink-wrap=false -verify-machineinstrs |  FileCheck %s --check-prefixes=CHECK
+; RUN: llc -mtriple=powerpc-ibm-aix-xcoff -mattr=-altivec -mcpu=pwr8 %s -o - -verify-machineinstrs | FileCheck %s --check-prefixes=CHECK,ENABLE-32
+; RUN: llc -mtriple=powerpc-ibm-aix-xcoff %s -o - -enable-shrink-wrap=false -verify-machineinstrs |  FileCheck %s --check-prefixes=CHECK,DISABLE-32
+; RUN: llc -mtriple=powerpc64-ibm-aix-xcoff -mattr=-altivec -mcpu=pwr8 %s -o - -verify-machineinstrs | FileCheck %s --check-prefixes=CHECK
+; RUN: llc -mtriple=powerpc64-ibm-aix-xcoff %s -o - -enable-shrink-wrap=false -verify-machineinstrs |  FileCheck %s --check-prefixes=CHECK
 ;
 ;
 ; Note: Lots of tests use inline asm instead of regular calls.
@@ -15,47 +16,66 @@
 
 
 ; Initial motivating example: Simple diamond with a call just on one side.
-; CHECK-LABEL: {{.*}}foo:
 ;
 ; Compare the arguments and return
-; No prologue needed.
-; ENABLE: cmpw 3, 4
-; ENABLE-NEXT: bgelr 0
 ;
 ; Prologue code.
 ;  At a minimum, we save/restore the link register. Other registers may be saved
 ;  as well.
-; CHECK: mflr
 ;
 ; Compare the arguments and jump to exit.
 ; After the prologue is set.
-; DISABLE: cmpw 3, 4
-; DISABLE-NEXT: bge 0, {{.*}}[[EXIT_LABEL:BB[0-9_]+]]
 ;
 ; Store %a on the stack
-; CHECK: stw 3, {{[0-9]+([0-9]+)}}
 ; Set the alloca address in the second argument.
-; CHECK-NEXT: addi 4, 1, {{[0-9]+}}
 ; Set the first argument to zero.
-; CHECK-NEXT: li 3, 0
-; CHECK-NEXT: bl {{.*}}doSomething
 ;
 ; With shrink-wrapping, epilogue is just after the call.
 ; Restore the link register and return.
 ; Note that there could be other epilog code before the link register is
 ; restored but we will not check for it here.
-; ENABLE: mtlr
-; ENABLE-NEXT: blr
-;
-; DISABLE: [[EXIT_LABEL]]:
 ;
 ; Without shrink-wrapping, epilogue is in the exit block.
 ; Epilogue code. (What we pop does not matter.)
-; DISABLE: mtlr {{[0-9]+}}
-; DISABLE-NEXT: blr
 ;
 
 define i32 @foo(i32 %a, i32 %b) {
+; ENABLE-32-LABEL: foo:
+; ENABLE-32:       # %bb.0:
+; ENABLE-32-NEXT:    cmpw 3, 4
+; ENABLE-32-NEXT:    bgelr 0
+; ENABLE-32-NEXT:  # %bb.1: # %true
+; ENABLE-32-NEXT:    mflr 0
+; ENABLE-32-NEXT:    stw 0, 8(1)
+; ENABLE-32-NEXT:    stwu 1, -64(1)
+; ENABLE-32-NEXT:    stw 3, 60(1)
+; ENABLE-32-NEXT:    addi 4, 1, 60
+; ENABLE-32-NEXT:    li 3, 0
+; ENABLE-32-NEXT:    bl .doSomething[PR]
+; ENABLE-32-NEXT:    nop
+; ENABLE-32-NEXT:    addi 1, 1, 64
+; ENABLE-32-NEXT:    lwz 0, 8(1)
+; ENABLE-32-NEXT:    mtlr 0
+; ENABLE-32-NEXT:    blr
+;
+; DISABLE-32-LABEL: foo:
+; DISABLE-32:       # %bb.0:
+; DISABLE-32-NEXT:    mflr 0
+; DISABLE-32-NEXT:    stw 0, 8(1)
+; DISABLE-32-NEXT:    stwu 1, -64(1)
+; DISABLE-32-NEXT:    cmpw 3, 4
+; DISABLE-32-NEXT:    bge 0, L..BB0_2
+; DISABLE-32-NEXT:  # %bb.1: # %true
+; DISABLE-32-NEXT:    stw 3, 60(1)
+; DISABLE-32-NEXT:    addi 4, 1, 60
+; DISABLE-32-NEXT:    li 3, 0
+; DISABLE-32-NEXT:    bl .doSomething[PR]
+; DISABLE-32-NEXT:    nop
+; DISABLE-32-NEXT:  L..BB0_2: # %false
+; DISABLE-32-NEXT:    addi 1, 1, 64
+; DISABLE-32-NEXT:    lwz 0, 8(1)
+; DISABLE-32-NEXT:    mtlr 0
+; DISABLE-32-NEXT:    blr
   %tmp = alloca i32, align 4
   %tmp2 = icmp slt i32 %a, %b
   br i1 %tmp2, label %true, label %false
@@ -76,52 +96,97 @@
 
 ; Check that we do not perform the restore inside the loop whereas the save
 ; is outside.
-; CHECK-LABEL: {{.*}}freqSaveAndRestoreOutsideLoop:
 ;
 ; Shrink-wrapping allows to skip the prologue in the else case.
-; ENABLE: cmplwi 3, 0
-; ENABLE: beq 0, {{.*}}[[ELSE_LABEL:BB[0-9_]+]]
 ;
 ; Prologue code.
 ; Make sure we save the link register
-; CHECK: mflr {{[0-9]+}}
-;
-; DISABLE: cmplwi 3, 0
-; DISABLE: beq 0, {{.*}}[[ELSE_LABEL:BB[0-9_]+]]
 ;
 ; Loop preheader
-; CHECK-DAG: li [[SUM:[0-9]+]], 0
-; CHECK-DAG: li [[IV:[0-9]+]], 10
 ;
 ; Loop body
-; CHECK: {{.*}}[[LOOP:BB[0-9_]+]]: # %for.body
-; CHECK: bl {{.*}}something
-;
-; CHECK-DAG: addi [[IV]], [[IV]], -1
-; CHECK-DAG: add [[SUM]], 3, [[SUM]]
-; CHECK-DAG: cmplwi [[IV]], 0
-; CHECK-NEXT: bne 0, {{.*}}[[LOOP]]
 ;
 ; Next BB.
-; CHECK: slwi 3, [[SUM]], 3
 ;
 ; Jump to epilogue.
-; DISABLE: b {{.*}}[[EPILOG_BB:BB[0-9_]+]]
 ;
-; DISABLE: {{.*}}[[ELSE_LABEL]]: # %if.else
 ; Shift second argument by one and store into returned register.
-; DISABLE: slwi 3, 4, 1
-; DISABLE: {{.*}}[[EPILOG_BB]]: # %if.end
 ;
 ; Epilogue code.
-; CHECK: mtlr {{[0-9]+}}
-; CHECK: blr
 ;
-; ENABLE: {{.*}}[[ELSE_LABEL]]: # %if.else
 ; Shift second argument by one and store into returned register.
-; ENABLE: slwi 3, 4, 1
-; ENABLE-NEXT: blr
 define i32 @freqSaveAndRestoreOutsideLoop(i32 %cond, i32 %N) {
+; ENABLE-32-LABEL: freqSaveAndRestoreOutsideLoop:
+; ENABLE-32:       # %bb.0: # %entry
+; ENABLE-32-NEXT:    cmplwi 3, 0
+; ENABLE-32-NEXT:    beq 0, L..BB1_4
+; ENABLE-32-NEXT:  # %bb.1: # %for.preheader
+; ENABLE-32-NEXT:    mflr 0
+; ENABLE-32-NEXT:    stw 0, 8(1)
+; ENABLE-32-NEXT:    stwu 1, -64(1)
+; ENABLE-32-NEXT:    stw 30, 56(1) # 4-byte Folded Spill
+; ENABLE-32-NEXT:    stw 31, 60(1) # 4-byte Folded Spill
+; ENABLE-32-NEXT:    li 31, 0
+; ENABLE-32-NEXT:    li 30, 10
+; ENABLE-32-NEXT:    #APP
+; ENABLE-32-NEXT:    nop
+; ENABLE-32-NEXT:    #NO_APP
+; ENABLE-32-NEXT:    .align 5
+; ENABLE-32-NEXT:  L..BB1_2: # %for.body
+; ENABLE-32-NEXT:    #
+; ENABLE-32-NEXT:    bl .something[PR]
+; ENABLE-32-NEXT:    nop
+; ENABLE-32-NEXT:    addi 30, 30, -1
+; ENABLE-32-NEXT:    add 31, 3, 31
+; ENABLE-32-NEXT:    cmplwi 30, 0
+; ENABLE-32-NEXT:    bne 0, L..BB1_2
+; ENABLE-32-NEXT:  # %bb.3: # %for.end
+; ENABLE-32-NEXT:    slwi 3, 31, 3
+; ENABLE-32-NEXT:    lwz 31, 60(1) # 4-byte Folded Reload
+; ENABLE-32-NEXT:    lwz 30, 56(1) # 4-byte Folded Reload
+; ENABLE-32-NEXT:    addi 1, 1, 64
+; ENABLE-32-NEXT:    lwz 0, 8(1)
+; ENABLE-32-NEXT:    mtlr 0
+; ENABLE-32-NEXT:    blr
+; ENABLE-32-NEXT:  L..BB1_4: # %if.else
+; ENABLE-32-NEXT:    slwi 3, 4, 1
+; ENABLE-32-NEXT:    blr
+;
+; DISABLE-32-LABEL: freqSaveAndRestoreOutsideLoop:
+; DISABLE-32:       # %bb.0: # %entry
+; DISABLE-32-NEXT:    mflr 0
+; DISABLE-32-NEXT:    stw 0, 8(1)
+; DISABLE-32-NEXT:    stwu 1, -64(1)
+; DISABLE-32-NEXT:    cmplwi 3, 0
+; DISABLE-32-NEXT:    stw 30, 56(1) # 4-byte Folded Spill
+; DISABLE-32-NEXT:    stw 31, 60(1) # 4-byte Folded Spill
+; DISABLE-32-NEXT:    beq 0, L..BB1_4
+; DISABLE-32-NEXT:  # %bb.1: # %for.preheader
+; DISABLE-32-NEXT:    li 31, 0
+; DISABLE-32-NEXT:    li 30, 10
+; DISABLE-32-NEXT:    #APP
+; DISABLE-32-NEXT:    nop
+; DISABLE-32-NEXT:    #NO_APP
+; DISABLE-32-NEXT:  L..BB1_2: # %for.body
+; DISABLE-32-NEXT:    #
+; DISABLE-32-NEXT:    bl .something[PR]
+; DISABLE-32-NEXT:    nop
+; DISABLE-32-NEXT:    addi 30, 30, -1
+; DISABLE-32-NEXT:    cmplwi 30, 0
+; DISABLE-32-NEXT:    add 31, 3, 31
+; DISABLE-32-NEXT:    bne 0, L..BB1_2
+; DISABLE-32-NEXT:  # %bb.3: # %for.end
+; DISABLE-32-NEXT:    slwi 3, 31, 3
+; DISABLE-32-NEXT:    b L..BB1_5
+; DISABLE-32-NEXT:  L..BB1_4: # %if.else
+; DISABLE-32-NEXT:    slwi 3, 4, 1
+; DISABLE-32-NEXT:  L..BB1_5: # %if.end
+; DISABLE-32-NEXT:    lwz 31, 60(1) # 4-byte Folded Reload
+; DISABLE-32-NEXT:    lwz 30, 56(1) # 4-byte Folded Reload
+; DISABLE-32-NEXT:    addi 1, 1, 64
+; DISABLE-32-NEXT:    lwz 0, 8(1)
+; DISABLE-32-NEXT:    mtlr 0
+; DISABLE-32-NEXT:    blr
 entry:
   %tobool = icmp eq i32 %cond, 0
   br i1 %tobool, label %if.else, label %for.preheader
@@ -156,30 +221,79 @@
 
 ; Check that we do not perform the shrink-wrapping inside the loop even
 ; though that would be legal. The cost model must prevent that.
-; CHECK-LABEL: {{.*}}freqSaveAndRestoreOutsideLoop2:
 ; Prologue code.
 ; Make sure we save the link register before the call
-; CHECK: mflr {{[0-9]+}}
 ;
 ; Loop preheader
-; CHECK-DAG: li [[SUM:[0-9]+]], 0
-; CHECK-DAG: li [[IV:[0-9]+]], 10
 ;
 ; Loop body
-; CHECK: {{.*}}[[LOOP:BB[0-9_]+]]: # %for.body
-; CHECK: bl {{.*}}something
-;
-; CHECK-DAG: addi [[IV]], [[IV]], -1
-; CHECK-DAG: add [[SUM]], 3, [[SUM]]
-; CHECK-DAG: cmplwi [[IV]], 0
-;
-; CHECK-NEXT: bne 0, {{.*}}[[LOOP]]
 ;
 ; Next BB
-; CHECK: %for.exit
-; CHECK: mtlr {{[0-9]+}}
-; CHECK: blr
 define i32 @freqSaveAndRestoreOutsideLoop2(i32 %cond) {
+; ENABLE-32-LABEL: freqSaveAndRestoreOutsideLoop2:
+; ENABLE-32:       # %bb.0: # %entry
+; ENABLE-32-NEXT:    mflr 0
+; ENABLE-32-NEXT:    stw 0, 8(1)
+; ENABLE-32-NEXT:    stwu 1, -64(1)
+; ENABLE-32-NEXT:    stw 30, 56(1) # 4-byte Folded Spill
+; ENABLE-32-NEXT:    stw 31, 60(1) # 4-byte Folded Spill
+; ENABLE-32-NEXT:    li 31, 0
+; ENABLE-32-NEXT:    li 30, 10
+; ENABLE-32-NEXT:    #APP
+; ENABLE-32-NEXT:    nop
+; ENABLE-32-NEXT:    #NO_APP
+; ENABLE-32-NEXT:    .align 5
+; ENABLE-32-NEXT:  L..BB2_1: # %for.body
+; ENABLE-32-NEXT:    #
+; ENABLE-32-NEXT:    bl .something[PR]
+; ENABLE-32-NEXT:    nop
+; ENABLE-32-NEXT:    addi 30, 30, -1
+; ENABLE-32-NEXT:    add 31, 3, 31
+; ENABLE-32-NEXT:    cmplwi 30, 0
+; ENABLE-32-NEXT:    bne 0, L..BB2_1
+; ENABLE-32-NEXT:  # %bb.2: # %for.exit
+; ENABLE-32-NEXT:    mr 3, 31
+; ENABLE-32-NEXT:    lwz 31, 60(1) # 4-byte Folded Reload
+; ENABLE-32-NEXT:    lwz 30, 56(1) # 4-byte Folded Reload
+; ENABLE-32-NEXT:    #APP
+; ENABLE-32-NEXT:    nop
+; ENABLE-32-NEXT:    #NO_APP
+; ENABLE-32-NEXT:    addi 1, 1, 64
+; ENABLE-32-NEXT:    lwz 0, 8(1)
+; ENABLE-32-NEXT:    mtlr 0
+; ENABLE-32-NEXT:    blr
+;
+; DISABLE-32-LABEL: freqSaveAndRestoreOutsideLoop2:
+; DISABLE-32:       # %bb.0: # %entry
+; DISABLE-32-NEXT:    mflr 0
+; DISABLE-32-NEXT:    stw 0, 8(1)
+; DISABLE-32-NEXT:    stwu 1, -64(1)
+; DISABLE-32-NEXT:    stw 30, 56(1) # 4-byte Folded Spill
+; DISABLE-32-NEXT:    li 30, 10
+; DISABLE-32-NEXT:    stw 31, 60(1) # 4-byte Folded Spill
+; DISABLE-32-NEXT:    li 31, 0
+; DISABLE-32-NEXT:    #APP
+; DISABLE-32-NEXT:    nop
+; DISABLE-32-NEXT:    #NO_APP
+; DISABLE-32-NEXT:  L..BB2_1: # %for.body
+; DISABLE-32-NEXT:    #
+; DISABLE-32-NEXT:    bl .something[PR]
+; DISABLE-32-NEXT:    nop
+; DISABLE-32-NEXT:    addi 30, 30, -1
+; DISABLE-32-NEXT:    cmplwi 30, 0
+; DISABLE-32-NEXT:    add 31, 3, 31
+; DISABLE-32-NEXT:    bne 0, L..BB2_1
+; DISABLE-32-NEXT:  # %bb.2: # %for.exit
+; DISABLE-32-NEXT:    mr 3, 31
+; DISABLE-32-NEXT:    #APP
+; DISABLE-32-NEXT:    nop
+; DISABLE-32-NEXT:    #NO_APP
+; DISABLE-32-NEXT:    lwz 31, 60(1) # 4-byte Folded Reload
+; DISABLE-32-NEXT:    lwz 30, 56(1) # 4-byte Folded Reload
+; DISABLE-32-NEXT:    addi 1, 1, 64
+; DISABLE-32-NEXT:    lwz 0, 8(1)
+; DISABLE-32-NEXT:    mtlr 0
+; DISABLE-32-NEXT:    blr
 entry:
   br label %for.preheader
 
@@ -207,65 +321,99 @@
 
 ; Check with a more complex case that we do not have save within the loop and
 ; restore outside.
-; CHECK-LABEL: {{.*}}loopInfoSaveOutsideLoop:
-;
-; ENABLE: cmplwi 3, 0
-; ENABLE-NEXT: beq 0, {{.*}}[[ELSE_LABEL:BB[0-9_]+]]
 ;
 ; Prologue code.
 ; Make sure we save the link register
-; CHECK: mflr {{[0-9]+}}
-;
-; DISABLE-64-DAG: std {{[0-9]+}}
-; DISABLE-64-DAG: std {{[0-9]+}}
-; DISABLE-64-DAG: std {{[0-9]+}}
-; DISABLE-64-DAG: stdu 1,
-; DISABLE-64-DAG: cmplwi 3, 0
-;
-; DISABLE-32-DAG: stw {{[0-9]+}}
-; DISABLE-32-DAG: stw {{[0-9]+}}
-; DISABLE-32-DAG: stw {{[0-9]+}}
-; DISABLE-32-DAG: stwu 1,
-; DISABLE-32-DAG: cmplwi 3, 0
-;
-; DISABLE-NEXT: beq 0, {{.*}}[[ELSE_LABEL:BB[0-9_]+]]
 ;
 ; Loop preheader
-; CHECK-DAG: li [[SUM:[0-9]+]], 0
-; CHECK-DAG: li [[IV:[0-9]+]], 10
 ;
 ; Loop body
-; CHECK: {{.*}}[[LOOP:BB[0-9_]+]]: # %for.body
-; CHECK: bl {{.*}}something
-;
-; CHECK-DAG: addi [[IV]], [[IV]], -1
-; CHECK-DAG: add [[SUM]], 3, [[SUM]]
-; CHECK-DAG: cmplwi [[IV]], 0
-;
-; CHECK-NEXT: bne 0, {{.*}}[[LOOP]]
 ;
 ; Next BB
-; CHECK: bl {{.*}}somethingElse
-; CHECK: slwi 3, [[SUM]], 3
 ;
 ; Jump to epilogue
-; DISABLE: b {{.*}}[[EPILOG_BB:BB[0-9_]+]]
 ;
-; DISABLE: {{.*}}[[ELSE_LABEL]]: # %if.else
 ; Shift second argument by one and store into returned register.
-; DISABLE: slwi 3, 4, 1
-;
-; DISABLE: {{.*}}[[EPILOG_BB]]: # %if.end
 ;
 ; Epilog code
-; CHECK: mtlr {{[0-9]+}}
-; CHECK: blr
 ;
-; ENABLE: {{.*}}[[ELSE_LABEL]]: # %if.else
 ; Shift second argument by one and store into returned register.
-; ENABLE: slwi 3, 4, 1
-; ENABLE-NEXT: blr
 define i32 @loopInfoSaveOutsideLoop(i32 %cond, i32 %N) {
+; ENABLE-32-LABEL: loopInfoSaveOutsideLoop:
+; ENABLE-32:       # %bb.0: # %entry
+; ENABLE-32-NEXT:    cmplwi 3, 0
+; ENABLE-32-NEXT:    beq 0, L..BB3_4
+; ENABLE-32-NEXT:  # %bb.1: # %for.preheader
+; ENABLE-32-NEXT:    mflr 0
+; ENABLE-32-NEXT:    stw 0, 8(1)
+; ENABLE-32-NEXT:    stwu 1, -64(1)
+; ENABLE-32-NEXT:    stw 30, 56(1) # 4-byte Folded Spill
+; ENABLE-32-NEXT:    stw 31, 60(1) # 4-byte Folded Spill
+; ENABLE-32-NEXT:    li 31, 0
+; ENABLE-32-NEXT:    li 30, 10
+; ENABLE-32-NEXT:    #APP
+; ENABLE-32-NEXT:    nop
+; ENABLE-32-NEXT:    #NO_APP
+; ENABLE-32-NEXT:    .align 5
+; ENABLE-32-NEXT:  L..BB3_2: # %for.body
+; ENABLE-32-NEXT:    #
+; ENABLE-32-NEXT:    bl .something[PR]
+; ENABLE-32-NEXT:    nop
+; ENABLE-32-NEXT:    addi 30, 30, -1
+; ENABLE-32-NEXT:    add 31, 3, 31
+; ENABLE-32-NEXT:    cmplwi 30, 0
+; ENABLE-32-NEXT:    bne 0, L..BB3_2
+; ENABLE-32-NEXT:  # %bb.3: # %for.end
+; ENABLE-32-NEXT:    bl .somethingElse[PR]
+; ENABLE-32-NEXT:    nop
+; ENABLE-32-NEXT:    slwi 3, 31, 3
+; ENABLE-32-NEXT:    lwz 31, 60(1) # 4-byte Folded Reload
+; ENABLE-32-NEXT:    lwz 30, 56(1) # 4-byte Folded Reload
+; ENABLE-32-NEXT:    addi 1, 1, 64
+; ENABLE-32-NEXT:    lwz 0, 8(1)
+; ENABLE-32-NEXT:    mtlr 0
+; ENABLE-32-NEXT:    blr
+; ENABLE-32-NEXT:  L..BB3_4: # %if.else
+; ENABLE-32-NEXT:    slwi 3, 4, 1
+; ENABLE-32-NEXT:    blr
+;
+; DISABLE-32-LABEL: loopInfoSaveOutsideLoop:
+; DISABLE-32:       # %bb.0: # %entry
+; DISABLE-32-NEXT:    mflr 0
+; DISABLE-32-NEXT:    stw 0, 8(1)
+; DISABLE-32-NEXT:    stwu 1, -64(1)
+; DISABLE-32-NEXT:    cmplwi 3, 0
+; DISABLE-32-NEXT:    stw 30, 56(1) # 4-byte Folded Spill
+; DISABLE-32-NEXT:    stw 31, 60(1) # 4-byte Folded Spill
+; DISABLE-32-NEXT:    beq 0, L..BB3_4
+; DISABLE-32-NEXT:  # %bb.1: # %for.preheader
+; DISABLE-32-NEXT:    li 31, 0
+; DISABLE-32-NEXT:    li 30, 10
+; DISABLE-32-NEXT:    #APP
+; DISABLE-32-NEXT:    nop
+; DISABLE-32-NEXT:    #NO_APP
+; DISABLE-32-NEXT:  L..BB3_2: # %for.body
+; DISABLE-32-NEXT:    #
+; DISABLE-32-NEXT:    bl .something[PR]
+; DISABLE-32-NEXT:    nop
+; DISABLE-32-NEXT:    addi 30, 30, -1
+; DISABLE-32-NEXT:    cmplwi 30, 0
+; DISABLE-32-NEXT:    add 31, 3, 31
+; DISABLE-32-NEXT:    bne 0, L..BB3_2
+; DISABLE-32-NEXT:  # %bb.3: # %for.end
+; DISABLE-32-NEXT:    bl .somethingElse[PR]
+; DISABLE-32-NEXT:    nop
+; DISABLE-32-NEXT:    slwi 3, 31, 3
+; DISABLE-32-NEXT:    b L..BB3_5
+; DISABLE-32-NEXT:  L..BB3_4: # %if.else
+; DISABLE-32-NEXT:    slwi 3, 4, 1
+; DISABLE-32-NEXT:  L..BB3_5: # %if.end
+; DISABLE-32-NEXT:    lwz 31, 60(1) # 4-byte Folded Reload
+; DISABLE-32-NEXT:    lwz 30, 56(1) # 4-byte Folded Reload
+; DISABLE-32-NEXT:    addi 1, 1, 64
+; DISABLE-32-NEXT:    lwz 0, 8(1)
+; DISABLE-32-NEXT:    mtlr 0
+; DISABLE-32-NEXT:    blr
 entry:
   %tobool = icmp eq i32 %cond, 0
   br i1 %tobool, label %if.else, label %for.preheader
@@ -301,64 +449,91 @@
 
 ; Check with a more complex case that we do not have restore within the loop and
 ; save outside.
-; CHECK-LABEL: {{.*}}loopInfoRestoreOutsideLoop:
-;
-; ENABLE: cmplwi 3, 0
-; ENABLE-NEXT: beq 0, {{.*}}[[ELSE_LABEL:BB[0-9_]+]]
 ;
 ; Prologue code.
 ; Make sure we save the link register
-; CHECK: mflr {{[0-9]+}}
-;
-; DISABLE-64-DAG: std {{[0-9]+}}
-; DISABLE-64-DAG: std {{[0-9]+}}
-; DISABLE-64-DAG: std {{[0-9]+}}
-; DISABLE-64-DAG: stdu 1,
-; DISABLE-64-DAG: cmplwi 3, 0
-;
-; DISABLE-32-DAG: stw {{[0-9]+}}
-; DISABLE-32-DAG: stw {{[0-9]+}}
-; DISABLE-32-DAG: stw {{[0-9]+}}
-; DISABLE-32-DAG: stwu 1,
-; DISABLE-32-DAG: cmplwi 3, 0
-;
-; DISABLE-NEXT: beq 0, {{.*}}[[ELSE_LABEL:BB[0-9_]+]]
-;
-; CHECK: bl {{.*}}somethingElse
 ;
 ; Loop preheader
-; CHECK-DAG: li [[SUM:[0-9]+]], 0
-; CHECK-DAG: li [[IV:[0-9]+]], 10
 ;
 ; Loop body
-; CHECK: {{.*}}[[LOOP:BB[0-9_]+]]: # %for.body
-; CHECK: bl {{.*}}something
-;
-; CHECK-DAG: addi [[IV]], [[IV]], -1
-; CHECK-DAG: add [[SUM]], 3, [[SUM]]
-; CHECK-DAG: cmplwi [[IV]], 0
-;
-; CHECK-NEXT: bne 0, {{.*}}[[LOOP]]
 ;
 ; Next BB.
-; CHECK: slwi 3, [[SUM]], 3
 ;
-; DISABLE: b {{.*}}[[EPILOG_BB:BB[0-9_]+]]
-;
-; DISABLE: {{.*}}[[ELSE_LABEL]]: # %if.else
 ; Shift second argument by one and store into returned register.
-; DISABLE: slwi 3, 4, 1
-; DISABLE: {{.*}}[[EPILOG_BB]]: # %if.end
 ;
 ; Epilogue code.
-; CHECK: mtlr {{[0-9]+}}
-; CHECK: blr
 ;
-; ENABLE: {{.*}}[[ELSE_LABEL]]: # %if.else
 ; Shift second argument by one and store into returned register.
-; ENABLE: slwi 3, 4, 1
-; ENABLE-NEXT: blr
 define i32 @loopInfoRestoreOutsideLoop(i32 %cond, i32 %N) nounwind {
+; ENABLE-32-LABEL: loopInfoRestoreOutsideLoop:
+; ENABLE-32:       # %bb.0: # %entry
+; ENABLE-32-NEXT:    cmplwi 3, 0
+; ENABLE-32-NEXT:    beq 0, L..BB4_4
+; ENABLE-32-NEXT:  # %bb.1: # %if.then
+; ENABLE-32-NEXT:    mflr 0
+; ENABLE-32-NEXT:    stw 0, 8(1)
+; ENABLE-32-NEXT:    stwu 1, -64(1)
+; ENABLE-32-NEXT:    stw 30, 56(1) # 4-byte Folded Spill
+; ENABLE-32-NEXT:    stw 31, 60(1) # 4-byte Folded Spill
+; ENABLE-32-NEXT:    bl .somethingElse[PR]
+; ENABLE-32-NEXT:    nop
+; ENABLE-32-NEXT:    li 31, 0
+; ENABLE-32-NEXT:    li 30, 10
+; ENABLE-32-NEXT:    .align 5
+; ENABLE-32-NEXT:  L..BB4_2: # %for.body
+; ENABLE-32-NEXT:    #
+; ENABLE-32-NEXT:    bl .something[PR]
+; ENABLE-32-NEXT:    nop
+; ENABLE-32-NEXT:    addi 30, 30, -1
+; ENABLE-32-NEXT:    add 31, 3, 31
+; ENABLE-32-NEXT:    cmplwi 30, 0
+; ENABLE-32-NEXT:    bne 0, L..BB4_2
+; ENABLE-32-NEXT:  # %bb.3: # %for.end
+; ENABLE-32-NEXT:    slwi 3, 31, 3
+; ENABLE-32-NEXT:    lwz 31, 60(1) # 4-byte Folded Reload
+; ENABLE-32-NEXT:    lwz 30, 56(1) # 4-byte Folded Reload
+; ENABLE-32-NEXT:    addi 1, 1, 64
+; ENABLE-32-NEXT:    lwz 0, 8(1)
+; ENABLE-32-NEXT:    mtlr 0
+; ENABLE-32-NEXT:    blr
+; ENABLE-32-NEXT:  L..BB4_4: # %if.else
+; ENABLE-32-NEXT:    slwi 3, 4, 1
+; ENABLE-32-NEXT:    blr
+;
+; DISABLE-32-LABEL: loopInfoRestoreOutsideLoop:
+; DISABLE-32:       # %bb.0: # %entry
+; DISABLE-32-NEXT:    mflr 0
+; DISABLE-32-NEXT:    stw 0, 8(1)
+; DISABLE-32-NEXT:    stwu 1, -64(1)
+; DISABLE-32-NEXT:    cmplwi 3, 0
+; DISABLE-32-NEXT:    stw 30, 56(1) # 4-byte Folded Spill
+; DISABLE-32-NEXT:    stw 31, 60(1) # 4-byte Folded Spill
+; DISABLE-32-NEXT:    beq 0, L..BB4_4
+; DISABLE-32-NEXT:  # %bb.1: # %if.then
+; DISABLE-32-NEXT:    bl .somethingElse[PR]
+; DISABLE-32-NEXT:    nop
+; DISABLE-32-NEXT:    li 31, 0
+; DISABLE-32-NEXT:    li 30, 10
+; DISABLE-32-NEXT:  L..BB4_2: # %for.body
+; DISABLE-32-NEXT:    #
+; DISABLE-32-NEXT:    bl .something[PR]
+; DISABLE-32-NEXT:    nop
+; DISABLE-32-NEXT:    addi 30, 30, -1
+; DISABLE-32-NEXT:    cmplwi 30, 0
+; DISABLE-32-NEXT:    add 31, 3, 31
+; DISABLE-32-NEXT:    bne 0, L..BB4_2
+; DISABLE-32-NEXT:  # %bb.3: # %for.end
+; DISABLE-32-NEXT:    slwi 3, 31, 3
+; DISABLE-32-NEXT:    b L..BB4_5
+; DISABLE-32-NEXT:  L..BB4_4: # %if.else
+; DISABLE-32-NEXT:    slwi 3, 4, 1
+; DISABLE-32-NEXT:  L..BB4_5: # %if.end
+; DISABLE-32-NEXT:    lwz 31, 60(1) # 4-byte Folded Reload
+; DISABLE-32-NEXT:    lwz 30, 56(1) # 4-byte Folded Reload
+; DISABLE-32-NEXT:    addi 1, 1, 64
+; DISABLE-32-NEXT:    lwz 0, 8(1)
+; DISABLE-32-NEXT:    mtlr 0
+; DISABLE-32-NEXT:    blr
 entry:
   %tobool = icmp eq i32 %cond, 0
   br i1 %tobool, label %if.else, label %if.then
@@ -390,55 +565,82 @@
 }
 
 ; Check that we handle function with no frame information correctly.
-; CHECK-LABEL: {{.*}}emptyFrame:
-; CHECK: # %entry
-; CHECK-NEXT: li 3, 0
-; CHECK-NEXT: blr
 define i32 @emptyFrame() {
+; CHECK-LABEL: emptyFrame:
+; CHECK:       # %bb.0: # %entry
+; CHECK-NEXT:    li 3, 0
+; CHECK-NEXT:    blr
 entry:
   ret i32 0
 }
 
 
 ; Check that we handle inline asm correctly.
-; CHECK-LABEL: {{.*}}inlineAsm:
-;
-; ENABLE: cmplwi 3, 0
-; ENABLE-NEXT: beq 0, {{.*}}[[ELSE_LABEL:BB[0-9_]+]]
 ;
 ; Prologue code.
 ; Make sure we save the CSR used in the inline asm: r14
-; ENABLE-DAG: li [[IV:[0-9]+]], 10
-; ENABLE-64-DAG: std 14, -[[STACK_OFFSET:[0-9]+]](1) # 8-byte Folded Spill
-; ENABLE-32-DAG: stw 14, -[[STACK_OFFSET:[0-9]+]](1) # 4-byte Folded Spill
-;
-; DISABLE: cmplwi 3, 0
-; DISABLE-64-NEXT: std 14, -[[STACK_OFFSET:[0-9]+]](1) # 8-byte Folded Spill
-; DISABLE-32-NEXT: stw 14, -[[STACK_OFFSET:[0-9]+]](1) # 4-byte Folded Spill
-; DISABLE-NEXT: beq 0, {{.*}}[[ELSE_LABEL:BB[0-9_]+]]
-; DISABLE: li [[IV:[0-9]+]], 10
-;
-; CHECK: nop
-; CHECK: mtctr [[IV]]
 ;
-; CHECK: {{.*}}[[LOOP_LABEL:BB[0-9_]+]]: # %for.body
 ; Inline asm statement.
-; CHECK: addi 14, 14, 1
-; CHECK: bdnz {{.*}}[[LOOP_LABEL]]
 ;
 ; Epilogue code.
-; CHECK: li 3, 0
-; CHECK-64-DAG: ld 14, -[[STACK_OFFSET]](1) # 8-byte Folded Reload
-; CHECK-32-DAG: lwz 14, -[[STACK_OFFSET]](1) # 4-byte Folded Reload
-; CHECK-DAG: nop
-; CHECK: blr
-;
-; CHECK: [[ELSE_LABEL]]
-; CHECK-NEXT: slwi 3, 4, 1
-; DISABLE-64-NEXT: ld 14, -[[STACK_OFFSET]](1) # 8-byte Folded Reload
-; DISABLE-32-NEXT: lwz 14, -[[STACK_OFFSET]](1) # 4-byte Folded Reload
-; CHECK-NEXT: blr
 define i32 @inlineAsm(i32 %cond, i32 %N) {
+; ENABLE-32-LABEL: inlineAsm:
+; ENABLE-32:       # %bb.0: # %entry
+; ENABLE-32-NEXT:    cmplwi 3, 0
+; ENABLE-32-NEXT:    beq 0, L..BB6_4
+; ENABLE-32-NEXT:  # %bb.1: # %for.preheader
+; ENABLE-32-NEXT:    stw 14, -72(1) # 4-byte Folded Spill
+; ENABLE-32-NEXT:    li 3, 10
+; ENABLE-32-NEXT:    #APP
+; ENABLE-32-NEXT:    nop
+; ENABLE-32-NEXT:    #NO_APP
+; ENABLE-32-NEXT:    mtctr 3
+; ENABLE-32-NEXT:    .align 4
+; ENABLE-32-NEXT:  L..BB6_2: # %for.body
+; ENABLE-32-NEXT:    #
+; ENABLE-32-NEXT:    #APP
+; ENABLE-32-NEXT:    addi 14, 14, 1
+; ENABLE-32-NEXT:    #NO_APP
+; ENABLE-32-NEXT:    bdnz L..BB6_2
+; ENABLE-32-NEXT:  # %bb.3: # %for.exit
+; ENABLE-32-NEXT:    li 3, 0
+; ENABLE-32-NEXT:    lwz 14, -72(1) # 4-byte Folded Reload
+; ENABLE-32-NEXT:    #APP
+; ENABLE-32-NEXT:    nop
+; ENABLE-32-NEXT:    #NO_APP
+; ENABLE-32-NEXT:    blr
+; ENABLE-32-NEXT:  L..BB6_4: # %if.else
+; ENABLE-32-NEXT:    slwi 3, 4, 1
+; ENABLE-32-NEXT:    blr
+;
+; DISABLE-32-LABEL: inlineAsm:
+; DISABLE-32:       # %bb.0: # %entry
+; DISABLE-32-NEXT:    cmplwi 3, 0
+; DISABLE-32-NEXT:    stw 14, -72(1) # 4-byte Folded Spill
+; DISABLE-32-NEXT:    beq 0, L..BB6_4
+; DISABLE-32-NEXT:  # %bb.1: # %for.preheader
+; DISABLE-32-NEXT:    li 3, 10
+; DISABLE-32-NEXT:    #APP
+; DISABLE-32-NEXT:    nop
+; DISABLE-32-NEXT:    #NO_APP
+; DISABLE-32-NEXT:    mtctr 3
+; DISABLE-32-NEXT:  L..BB6_2: # %for.body
+; DISABLE-32-NEXT:    #
+; DISABLE-32-NEXT:    #APP
+; DISABLE-32-NEXT:    addi 14, 14, 1
+; DISABLE-32-NEXT:    #NO_APP
+; DISABLE-32-NEXT:    bdnz L..BB6_2
+; DISABLE-32-NEXT:  # %bb.3: # %for.exit
+; DISABLE-32-NEXT:    li 3, 0
+; DISABLE-32-NEXT:    #APP
+; DISABLE-32-NEXT:    nop
+; DISABLE-32-NEXT:    #NO_APP
+; DISABLE-32-NEXT:    lwz 14, -72(1) # 4-byte Folded Reload
+; DISABLE-32-NEXT:    blr
+; DISABLE-32-NEXT:  L..BB6_4: # %if.else
+; DISABLE-32-NEXT:    slwi 3, 4, 1
+; DISABLE-32-NEXT:    lwz 14, -72(1) # 4-byte Folded Reload
+; DISABLE-32-NEXT:    blr
 entry:
   %tobool = icmp eq i32 %cond, 0
   br i1 %tobool, label %if.else, label %for.preheader
@@ -469,46 +671,61 @@
 
 
 ; Check that we handle calls to variadic functions correctly.
-; CHECK-LABEL: {{.*}}callVariadicFunc:
-;
-; ENABLE: cmplwi 3, 0
-; ENABLE-NEXT: beq 0, {{.*}}[[ELSE_LABEL:BB[0-9_]+]]
 ;
 ; Prologue code.
-; CHECK: mflr {{[0-9]+}}
-;
-; DISABLE: cmplwi 3, 0
-; DISABLE-NEXT: beq 0, {{.*}}[[ELSE_LABEL:BB[0-9_]+]]
 ;
 ; Setup of the varags.
-; CHECK-64: mr 4, 3
-; CHECK-64-NEXT: mr 5, 3
-; CHECK-64-NEXT: mr 6, 3
-; CHECK-64-NEXT: mr 7, 3
-; CHECK-64-NEXT: mr 8, 3
-; CHECK-64-NEXT: mr 9, 3
-;
-; CHECK-32: mr 3, 4
-; CHECK-32-NEXT: mr 5, 4
-; CHECK-32-NEXT: mr 6, 4
-; CHECK-32-NEXT: mr 7, 4
-; CHECK-32-NEXT: mr 8, 4
-; CHECK-32-NEXT: mr 9, 4
-;
-; CHECK-NEXT: bl {{.*}}someVariadicFunc
-; CHECK: slwi 3, 3, 3
-; DISABLE: b {{.*}}[[EPILOGUE_BB:BB[0-9_]+]]
-;
-; ENABLE: mtlr {{[0-9]+}}
-; ENABLE-NEXT: blr
-;
-; CHECK: {{.*}}[[ELSE_LABEL]]: # %if.else
-; CHECK-NEXT: slwi 3, 4, 1
-;
-; DISABLE: {{.*}}[[EPILOGUE_BB]]: # %if.end
-; DISABLE: mtlr
-; CHECK: blr
 define i32 @callVariadicFunc(i32 %cond, i32 %N) {
+; ENABLE-32-LABEL: callVariadicFunc:
+; ENABLE-32:       # %bb.0: # %entry
+; ENABLE-32-NEXT:    cmplwi 3, 0
+; ENABLE-32-NEXT:    beq 0, L..BB7_2
+; ENABLE-32-NEXT:  # %bb.1: # %if.then
+; ENABLE-32-NEXT:    mflr 0
+; ENABLE-32-NEXT:    stw 0, 8(1)
+; ENABLE-32-NEXT:    stwu 1, -64(1)
+; ENABLE-32-NEXT:    mr 3, 4
+; ENABLE-32-NEXT:    mr 5, 4
+; ENABLE-32-NEXT:    mr 6, 4
+; ENABLE-32-NEXT:    mr 7, 4
+; ENABLE-32-NEXT:    mr 8, 4
+; ENABLE-32-NEXT:    mr 9, 4
+; ENABLE-32-NEXT:    bl .someVariadicFunc[PR]
+; ENABLE-32-NEXT:    nop
+; ENABLE-32-NEXT:    slwi 3, 3, 3
+; ENABLE-32-NEXT:    addi 1, 1, 64
+; ENABLE-32-NEXT:    lwz 0, 8(1)
+; ENABLE-32-NEXT:    mtlr 0
+; ENABLE-32-NEXT:    blr
+; ENABLE-32-NEXT:  L..BB7_2: # %if.else
+; ENABLE-32-NEXT:    slwi 3, 4, 1
+; ENABLE-32-NEXT:    blr
+;
+; DISABLE-32-LABEL: callVariadicFunc:
+; DISABLE-32:       # %bb.0: # %entry
+; DISABLE-32-NEXT:    mflr 0
+; DISABLE-32-NEXT:    stw 0, 8(1)
+; DISABLE-32-NEXT:    stwu 1, -64(1)
+; DISABLE-32-NEXT:    cmplwi 3, 0
+; DISABLE-32-NEXT:    beq 0, L..BB7_2
+; DISABLE-32-NEXT:  # %bb.1: # %if.then
+; DISABLE-32-NEXT:    mr 3, 4
+; DISABLE-32-NEXT:    mr 5, 4
+; DISABLE-32-NEXT:    mr 6, 4
+; DISABLE-32-NEXT:    mr 7, 4
+; DISABLE-32-NEXT:    mr 8, 4
+; DISABLE-32-NEXT:    mr 9, 4
+; DISABLE-32-NEXT:    bl .someVariadicFunc[PR]
+; DISABLE-32-NEXT:    nop
+; DISABLE-32-NEXT:    slwi 3, 3, 3
+; DISABLE-32-NEXT:    b L..BB7_3
+; DISABLE-32-NEXT:  L..BB7_2: # %if.else
+; DISABLE-32-NEXT:    slwi 3, 4, 1
+; DISABLE-32-NEXT:  L..BB7_3: # %if.end
+; DISABLE-32-NEXT:    addi 1, 1, 64
+; DISABLE-32-NEXT:    lwz 0, 8(1)
+; DISABLE-32-NEXT:    mtlr 0
+; DISABLE-32-NEXT:    blr
 entry:
   %tobool = icmp eq i32 %cond, 0
   br i1 %tobool, label %if.else, label %if.then
@@ -535,23 +752,37 @@
 ; Although this is not incorrect to insert such code, it is useless
 ; and it hurts the binary size.
 ;
-; CHECK-LABEL: {{.*}}noreturn:
-; DISABLE: mflr {{[0-9]+}}
-;
-; CHECK: cmplwi 3, 0
-; CHECK-NEXT: bne{{[-]?}} 0, {{.*}}[[ABORT:BB[0-9_]+]]
-;
-; CHECK: li 3, 42
-;
-; DISABLE: mtlr {{[0-9]+}}
-;
-; CHECK-NEXT: blr
-;
-; CHECK: {{.*}}[[ABORT]]: # %if.abort
-; ENABLE: mflr {{[0-9]+}}
-; CHECK: bl {{.*}}abort
-; ENABLE-NOT: mtlr {{[0-9]+}}
 define i32 @noreturn(i8 signext %bad_thing) {
+; ENABLE-32-LABEL: noreturn:
+; ENABLE-32:       # %bb.0: # %entry
+; ENABLE-32-NEXT:    cmplwi 3, 0
+; ENABLE-32-NEXT:    bne- 0, L..BB8_2
+; ENABLE-32-NEXT:  # %bb.1: # %if.end
+; ENABLE-32-NEXT:    li 3, 42
+; ENABLE-32-NEXT:    blr
+; ENABLE-32-NEXT:  L..BB8_2: # %if.abort
+; ENABLE-32-NEXT:    mflr 0
+; ENABLE-32-NEXT:    stw 0, 8(1)
+; ENABLE-32-NEXT:    stwu 1, -64(1)
+; ENABLE-32-NEXT:    bl .abort[PR]
+; ENABLE-32-NEXT:    nop
+;
+; DISABLE-32-LABEL: noreturn:
+; DISABLE-32:       # %bb.0: # %entry
+; DISABLE-32-NEXT:    mflr 0
+; DISABLE-32-NEXT:    stw 0, 8(1)
+; DISABLE-32-NEXT:    stwu 1, -64(1)
+; DISABLE-32-NEXT:    cmplwi 3, 0
+; DISABLE-32-NEXT:    bne- 0, L..BB8_2
+; DISABLE-32-NEXT:  # %bb.1: # %if.end
+; DISABLE-32-NEXT:    li 3, 42
+; DISABLE-32-NEXT:    addi 1, 1, 64
+; DISABLE-32-NEXT:    lwz 0, 8(1)
+; DISABLE-32-NEXT:    mtlr 0
+; DISABLE-32-NEXT:    blr
+; DISABLE-32-NEXT:  L..BB8_2: # %if.abort
+; DISABLE-32-NEXT:    bl .abort[PR]
+; DISABLE-32-NEXT:    nop
 entry:
   %tobool = icmp eq i8 %bad_thing, 0
   br i1 %tobool, label %if.end, label %if.abort
@@ -577,9 +808,71 @@
 ; should return gracefully and continue compilation.
 ; The only condition for this test is the compilation finishes correctly.
 ;
-; CHECK-LABEL: {{.*}}infiniteloop
-; CHECK: blr
 define void @infiniteloop() {
+; ENABLE-32-LABEL: infiniteloop:
+; ENABLE-32:       # %bb.0: # %entry
+; ENABLE-32-NEXT:    mflr 0
+; ENABLE-32-NEXT:    stw 31, -4(1)
+; ENABLE-32-NEXT:    stw 0, 8(1)
+; ENABLE-32-NEXT:    stwu 1, -80(1)
+; ENABLE-32-NEXT:    mr 31, 1
+; ENABLE-32-NEXT:    stw 29, 68(31) # 4-byte Folded Spill
+; ENABLE-32-NEXT:    stw 30, 72(31) # 4-byte Folded Spill
+; ENABLE-32-NEXT:    bc 12, 20, L..BB9_3
+; ENABLE-32-NEXT:  # %bb.1: # %if.then
+; ENABLE-32-NEXT:    li 3, -16
+; ENABLE-32-NEXT:    addi 4, 31, 80
+; ENABLE-32-NEXT:    stwux 4, 1, 3
+; ENABLE-32-NEXT:    addi 30, 1, 64
+; ENABLE-32-NEXT:    li 29, 0
+; ENABLE-32-NEXT:    .align 5
+; ENABLE-32-NEXT:  L..BB9_2: # %for.body
+; ENABLE-32-NEXT:    #
+; ENABLE-32-NEXT:    bl .something[PR]
+; ENABLE-32-NEXT:    nop
+; ENABLE-32-NEXT:    add 29, 3, 29
+; ENABLE-32-NEXT:    stw 29, 0(30)
+; ENABLE-32-NEXT:    b L..BB9_2
+; ENABLE-32-NEXT:  L..BB9_3: # %if.end
+; ENABLE-32-NEXT:    lwz 30, 72(31) # 4-byte Folded Reload
+; ENABLE-32-NEXT:    lwz 29, 68(31) # 4-byte Folded Reload
+; ENABLE-32-NEXT:    lwz 1, 0(1)
+; ENABLE-32-NEXT:    lwz 0, 8(1)
+; ENABLE-32-NEXT:    lwz 31, -4(1)
+; ENABLE-32-NEXT:    mtlr 0
+; ENABLE-32-NEXT:    blr
+;
+; DISABLE-32-LABEL: infiniteloop:
+; DISABLE-32:       # %bb.0: # %entry
+; DISABLE-32-NEXT:    mflr 0
+; DISABLE-32-NEXT:    stw 31, -4(1)
+; DISABLE-32-NEXT:    stw 0, 8(1)
+; DISABLE-32-NEXT:    stwu 1, -80(1)
+; DISABLE-32-NEXT:    mr 31, 1
+; DISABLE-32-NEXT:    stw 29, 68(31) # 4-byte Folded Spill
+; DISABLE-32-NEXT:    stw 30, 72(31) # 4-byte Folded Spill
+; DISABLE-32-NEXT:    bc 12, 20, L..BB9_3
+; DISABLE-32-NEXT:  # %bb.1: # %if.then
+; DISABLE-32-NEXT:    li 3, -16
+; DISABLE-32-NEXT:    addi 4, 31, 80
+; DISABLE-32-NEXT:    stwux 4, 1, 3
+; DISABLE-32-NEXT:    addi 30, 1, 64
+; DISABLE-32-NEXT:    li 29, 0
+; DISABLE-32-NEXT:  L..BB9_2: # %for.body
+; DISABLE-32-NEXT:    #
+; DISABLE-32-NEXT:    bl .something[PR]
+; DISABLE-32-NEXT:    nop
+; DISABLE-32-NEXT:    add 29, 3, 29
+; DISABLE-32-NEXT:    stw 29, 0(30)
+; DISABLE-32-NEXT:    b L..BB9_2
+; DISABLE-32-NEXT:  L..BB9_3: # %if.end
+; DISABLE-32-NEXT:    lwz 30, 72(31) # 4-byte Folded Reload
+; DISABLE-32-NEXT:    lwz 29, 68(31) # 4-byte Folded Reload
+; DISABLE-32-NEXT:    lwz 1, 0(1)
+; DISABLE-32-NEXT:    lwz 0, 8(1)
+; DISABLE-32-NEXT:    lwz 31, -4(1)
+; DISABLE-32-NEXT:    mtlr 0
+; DISABLE-32-NEXT:    blr
 entry:
   br i1 undef, label %if.then, label %if.end
 
@@ -599,9 +892,87 @@
 }
 
 ; Another infinite loop test this time with a body bigger than just one block.
-; CHECK-LABEL: {{.*}}infiniteloop2
-; CHECK: blr
 define void @infiniteloop2() {
+; ENABLE-32-LABEL: infiniteloop2:
+; ENABLE-32:       # %bb.0: # %entry
+; ENABLE-32-NEXT:    stw 31, -4(1)
+; ENABLE-32-NEXT:    stwu 1, -112(1)
+; ENABLE-32-NEXT:    mr 31, 1
+; ENABLE-32-NEXT:    stw 14, 40(31) # 4-byte Folded Spill
+; ENABLE-32-NEXT:    bc 12, 20, L..BB10_5
+; ENABLE-32-NEXT:  # %bb.1: # %if.then
+; ENABLE-32-NEXT:    li 3, -16
+; ENABLE-32-NEXT:    addi 4, 31, 112
+; ENABLE-32-NEXT:    stwux 4, 1, 3
+; ENABLE-32-NEXT:    addi 3, 1, 32
+; ENABLE-32-NEXT:    li 4, 0
+; ENABLE-32-NEXT:    #APP
+; ENABLE-32-NEXT:    mfspr 5, 268
+; ENABLE-32-NEXT:    #NO_APP
+; ENABLE-32-NEXT:    b L..BB10_3
+; ENABLE-32-NEXT:    .align 5
+; ENABLE-32-NEXT:  L..BB10_2: # %body2
+; ENABLE-32-NEXT:    #
+; ENABLE-32-NEXT:    #APP
+; ENABLE-32-NEXT:    nop
+; ENABLE-32-NEXT:    #NO_APP
+; ENABLE-32-NEXT:    li 4, 1
+; ENABLE-32-NEXT:  L..BB10_3: # %for.body
+; ENABLE-32-NEXT:    #
+; ENABLE-32-NEXT:    add 4, 5, 4
+; ENABLE-32-NEXT:    stw 4, 0(3)
+; ENABLE-32-NEXT:    bc 12, 20, L..BB10_2
+; ENABLE-32-NEXT:  # %bb.4: # %body1
+; ENABLE-32-NEXT:    #
+; ENABLE-32-NEXT:    #APP
+; ENABLE-32-NEXT:    nop
+; ENABLE-32-NEXT:    #NO_APP
+; ENABLE-32-NEXT:    b L..BB10_3
+; ENABLE-32-NEXT:  L..BB10_5: # %if.end
+; ENABLE-32-NEXT:    lwz 14, 40(31) # 4-byte Folded Reload
+; ENABLE-32-NEXT:    lwz 1, 0(1)
+; ENABLE-32-NEXT:    lwz 31, -4(1)
+; ENABLE-32-NEXT:    blr
+;
+; DISABLE-32-LABEL: infiniteloop2:
+; DISABLE-32:       # %bb.0: # %entry
+; DISABLE-32-NEXT:    stw 31, -4(1)
+; DISABLE-32-NEXT:    stwu 1, -112(1)
+; DISABLE-32-NEXT:    mr 31, 1
+; DISABLE-32-NEXT:    stw 14, 40(31) # 4-byte Folded Spill
+; DISABLE-32-NEXT:    bc 12, 20, L..BB10_5
+; DISABLE-32-NEXT:  # %bb.1: # %if.then
+; DISABLE-32-NEXT:    li 3, -16
+; DISABLE-32-NEXT:    addi 4, 31, 112
+; DISABLE-32-NEXT:    stwux 4, 1, 3
+; DISABLE-32-NEXT:    addi 3, 1, 32
+; DISABLE-32-NEXT:    li 4, 0
+; DISABLE-32-NEXT:    #APP
+; DISABLE-32-NEXT:    mfspr 5, 268
+; DISABLE-32-NEXT:    #NO_APP
+; DISABLE-32-NEXT:    b L..BB10_3
+; DISABLE-32-NEXT:  L..BB10_2: # %body2
+; DISABLE-32-NEXT:    #
+; DISABLE-32-NEXT:    #APP
+; DISABLE-32-NEXT:    nop
+; DISABLE-32-NEXT:    #NO_APP
+; DISABLE-32-NEXT:    li 4, 1
+; DISABLE-32-NEXT:  L..BB10_3: # %for.body
+; DISABLE-32-NEXT:    #
+; DISABLE-32-NEXT:    add 4, 5, 4
+; DISABLE-32-NEXT:    stw 4, 0(3)
+; DISABLE-32-NEXT:    bc 12, 20, L..BB10_2
+; DISABLE-32-NEXT:  # %bb.4: # %body1
+; DISABLE-32-NEXT:    #
+; DISABLE-32-NEXT:    #APP
+; DISABLE-32-NEXT:    nop
+; DISABLE-32-NEXT:    #NO_APP
+; DISABLE-32-NEXT:    b L..BB10_3
+; DISABLE-32-NEXT:  L..BB10_5: # %if.end
+; DISABLE-32-NEXT:    lwz 14, 40(31) # 4-byte Folded Reload
+; DISABLE-32-NEXT:    lwz 1, 0(1)
+; DISABLE-32-NEXT:    lwz 31, -4(1)
+; DISABLE-32-NEXT:    blr
 entry:
   br i1 undef, label %if.then, label %if.end
 
@@ -629,9 +1000,64 @@
 }
 
 ; Another infinite loop test this time with two nested infinite loop.
-; CHECK-LABEL: {{.*}}infiniteloop3
-; CHECK: bclr
 define void @infiniteloop3() {
+; ENABLE-32-LABEL: infiniteloop3:
+; ENABLE-32:       # %bb.0: # %entry
+; ENABLE-32-NEXT:    bc 12, 20, L..BB11_2
+; ENABLE-32-NEXT:  # %bb.1: # %body
+; ENABLE-32-NEXT:    bclr 12, 20, 0
+; ENABLE-32-NEXT:  L..BB11_2: # %loop2a.preheader
+; ENABLE-32-NEXT:    lwz 3, 0(3)
+; ENABLE-32-NEXT:    li 4, 0
+; ENABLE-32-NEXT:    li 6, 0
+; ENABLE-32-NEXT:    b L..BB11_4
+; ENABLE-32-NEXT:    .align 4
+; ENABLE-32-NEXT:  L..BB11_3:
+; ENABLE-32-NEXT:    mr 6, 3
+; ENABLE-32-NEXT:  L..BB11_4: # %loop2a
+; ENABLE-32-NEXT:    # =>This Loop Header: Depth=1
+; ENABLE-32-NEXT:    # Child Loop BB11_5 Depth 2
+; ENABLE-32-NEXT:    cmpwi 4, 0
+; ENABLE-32-NEXT:    mr 5, 4
+; ENABLE-32-NEXT:    mr 4, 6
+; ENABLE-32-NEXT:    bc 12, 2, L..BB11_3
+; ENABLE-32-NEXT:    .align 5
+; ENABLE-32-NEXT:  L..BB11_5: # %loop2b
+; ENABLE-32-NEXT:    # Parent Loop BB11_4 Depth=1
+; ENABLE-32-NEXT:    # => This Inner Loop Header: Depth=2
+; ENABLE-32-NEXT:    stw 4, 0(5)
+; ENABLE-32-NEXT:    mr 5, 4
+; ENABLE-32-NEXT:    mr 4, 3
+; ENABLE-32-NEXT:    bc 4, 2, L..BB11_5
+; ENABLE-32-NEXT:    b L..BB11_3
+;
+; DISABLE-32-LABEL: infiniteloop3:
+; DISABLE-32:       # %bb.0: # %entry
+; DISABLE-32-NEXT:    bc 12, 20, L..BB11_2
+; DISABLE-32-NEXT:  # %bb.1: # %body
+; DISABLE-32-NEXT:    bclr 12, 20, 0
+; DISABLE-32-NEXT:  L..BB11_2: # %loop2a.preheader
+; DISABLE-32-NEXT:    lwz 3, 0(3)
+; DISABLE-32-NEXT:    li 4, 0
+; DISABLE-32-NEXT:    li 6, 0
+; DISABLE-32-NEXT:    b L..BB11_4
+; DISABLE-32-NEXT:  L..BB11_3:
+; DISABLE-32-NEXT:    mr 6, 3
+; DISABLE-32-NEXT:  L..BB11_4: # %loop2a
+; DISABLE-32-NEXT:    # =>This Loop Header: Depth=1
+; DISABLE-32-NEXT:    # Child Loop BB11_5 Depth 2
+; DISABLE-32-NEXT:    cmpwi 4, 0
+; DISABLE-32-NEXT:    mr 5, 4
+; DISABLE-32-NEXT:    mr 4, 6
+; DISABLE-32-NEXT:    bc 12, 2, L..BB11_3
+; DISABLE-32-NEXT:  L..BB11_5: # %loop2b
+; DISABLE-32-NEXT:    # Parent Loop BB11_4 Depth=1
+; DISABLE-32-NEXT:    # => This Inner Loop Header: Depth=2
+; DISABLE-32-NEXT:    stw 4, 0(5)
+; DISABLE-32-NEXT:    mr 5, 4
+; DISABLE-32-NEXT:    mr 4, 3
+; DISABLE-32-NEXT:    bc 4, 2, L..BB11_5
+; DISABLE-32-NEXT:    b L..BB11_3
 entry:
   br i1 undef, label %loop2a, label %body
 
@@ -669,7 +1095,6 @@
 
 ; Test for a bug that was caused when save point was equal to restore point.
 ; Function Attrs: nounwind
-; CHECK-LABEL: {{.*}}transpose
 ;
 ; Store of callee-save register saved by shrink wrapping
 ; FIXME: Test disabled: Improved scheduling needs no spills/reloads any longer!
@@ -680,8 +1105,334 @@
 ;
 ; Ensure no subsequent uses of callee-save register before end of function
 ; CHECKXX-NOT: {{[a-z]+}} [[CSR]]
-; CHECK: blr
 define signext i32 @transpose() {
+; ENABLE-32-LABEL: transpose:
+; ENABLE-32:       # %bb.0: # %entry
+; ENABLE-32-NEXT:    mflr 0
+; ENABLE-32-NEXT:    stw 0, 8(1)
+; ENABLE-32-NEXT:    stwu 1, -64(1)
+; ENABLE-32-NEXT:    lwz 3, L..C0(2) # @columns
+; ENABLE-32-NEXT:    stw 30, 56(1) # 4-byte Folded Spill
+; ENABLE-32-NEXT:    stw 31, 60(1) # 4-byte Folded Spill
+; ENABLE-32-NEXT:    lwz 4, 4(3)
+; ENABLE-32-NEXT:    lwz 5, 8(3)
+; ENABLE-32-NEXT:    lwz 6, 28(3)
+; ENABLE-32-NEXT:    lwz 7, 24(3)
+; ENABLE-32-NEXT:    lwz 8, 12(3)
+; ENABLE-32-NEXT:    lwz 9, 20(3)
+; ENABLE-32-NEXT:    slwi 5, 5, 7
+; ENABLE-32-NEXT:    slwi 4, 4, 14
+; ENABLE-32-NEXT:    slwi 7, 7, 7
+; ENABLE-32-NEXT:    slwi 6, 6, 14
+; ENABLE-32-NEXT:    or 4, 4, 5
+; ENABLE-32-NEXT:    or 5, 6, 7
+; ENABLE-32-NEXT:    or 4, 4, 8
+; ENABLE-32-NEXT:    or 5, 5, 9
+; ENABLE-32-NEXT:    cmplw 4, 5
+; ENABLE-32-NEXT:    ble 0, L..BB12_2
+; ENABLE-32-NEXT:  # %bb.1: # %cond.true.i
+; ENABLE-32-NEXT:    lwz 3, 16(3)
+; ENABLE-32-NEXT:    slwi 4, 4, 7
+; ENABLE-32-NEXT:    or 3, 3, 4
+; ENABLE-32-NEXT:    slwi 4, 3, 21
+; ENABLE-32-NEXT:    srwi 3, 3, 11
+; ENABLE-32-NEXT:    or 4, 4, 5
+; ENABLE-32-NEXT:    b L..BB12_3
+; ENABLE-32-NEXT:  L..BB12_2: # %cond.false.i
+; ENABLE-32-NEXT:    lwz 3, 16(3)
+; ENABLE-32-NEXT:    slwi 5, 5, 7
+; ENABLE-32-NEXT:    or 3, 3, 5
+; ENABLE-32-NEXT:    slwi 5, 3, 21
+; ENABLE-32-NEXT:    srwi 3, 3, 11
+; ENABLE-32-NEXT:    or 4, 5, 4
+; ENABLE-32-NEXT:  L..BB12_3: # %hash.exit
+; ENABLE-32-NEXT:    lwz 5, L..C1(2) # @lock
+; ENABLE-32-NEXT:    rotlwi 31, 4, 15
+; ENABLE-32-NEXT:    lis 30, 16
+; ENABLE-32-NEXT:    rlwimi 31, 3, 15, 0, 16
+; ENABLE-32-NEXT:    ori 6, 30, 1435
+; ENABLE-32-NEXT:    stw 31, 0(5)
+; ENABLE-32-NEXT:    li 5, 0
+; ENABLE-32-NEXT:    bl .__moddi3[PR]
+; ENABLE-32-NEXT:    nop
+; ENABLE-32-NEXT:    lis 3, 28191
+; ENABLE-32-NEXT:    lwz 6, L..C2(2) # @ht
+; ENABLE-32-NEXT:    lwz 7, L..C3(2) # @htindex
+; ENABLE-32-NEXT:    lwz 8, L..C4(2) # @stride
+; ENABLE-32-NEXT:    ori 3, 3, 30389
+; ENABLE-32-NEXT:    mulhwu 3, 31, 3
+; ENABLE-32-NEXT:    stw 4, 0(7)
+; ENABLE-32-NEXT:    sub 5, 31, 3
+; ENABLE-32-NEXT:    srwi 5, 5, 1
+; ENABLE-32-NEXT:    add 3, 5, 3
+; ENABLE-32-NEXT:    srwi 3, 3, 7
+; ENABLE-32-NEXT:    mulli 3, 3, 179
+; ENABLE-32-NEXT:    sub 3, 31, 3
+; ENABLE-32-NEXT:    oris 5, 3, 2
+; ENABLE-32-NEXT:    lwz 3, 0(6)
+; ENABLE-32-NEXT:    slwi 6, 4, 2
+; ENABLE-32-NEXT:    stw 5, 0(8)
+; ENABLE-32-NEXT:    lwzx 6, 3, 6
+; ENABLE-32-NEXT:    cmplw 6, 31
+; ENABLE-32-NEXT:    beq 0, L..BB12_11
+; ENABLE-32-NEXT:  # %bb.4: # %if.end
+; ENABLE-32-NEXT:    add 4, 5, 4
+; ENABLE-32-NEXT:    ori 6, 30, 1434
+; ENABLE-32-NEXT:    addi 7, 4, -1435
+; ENABLE-32-NEXT:    cmpw 4, 6
+; ENABLE-32-NEXT:    addis 7, 7, -16
+; ENABLE-32-NEXT:    iselgt 4, 7, 4
+; ENABLE-32-NEXT:    slwi 7, 4, 2
+; ENABLE-32-NEXT:    lwzx 7, 3, 7
+; ENABLE-32-NEXT:    cmplw 7, 31
+; ENABLE-32-NEXT:    beq 0, L..BB12_11
+; ENABLE-32-NEXT:  # %bb.5: # %if.end.1
+; ENABLE-32-NEXT:    lis 7, -17
+; ENABLE-32-NEXT:    add 4, 5, 4
+; ENABLE-32-NEXT:    ori 7, 7, 64101
+; ENABLE-32-NEXT:    cmpw 4, 6
+; ENABLE-32-NEXT:    add 8, 4, 7
+; ENABLE-32-NEXT:    iselgt 4, 8, 4
+; ENABLE-32-NEXT:    slwi 8, 4, 2
+; ENABLE-32-NEXT:    lwzx 8, 3, 8
+; ENABLE-32-NEXT:    cmplw 8, 31
+; ENABLE-32-NEXT:    beq 0, L..BB12_11
+; ENABLE-32-NEXT:  # %bb.6: # %if.end.2
+; ENABLE-32-NEXT:    add 4, 5, 4
+; ENABLE-32-NEXT:    add 8, 4, 7
+; ENABLE-32-NEXT:    cmpw 4, 6
+; ENABLE-32-NEXT:    iselgt 4, 8, 4
+; ENABLE-32-NEXT:    slwi 8, 4, 2
+; ENABLE-32-NEXT:    lwzx 8, 3, 8
+; ENABLE-32-NEXT:    cmplw 8, 31
+; ENABLE-32-NEXT:    beq 0, L..BB12_11
+; ENABLE-32-NEXT:  # %bb.7: # %if.end.3
+; ENABLE-32-NEXT:    add 4, 5, 4
+; ENABLE-32-NEXT:    add 8, 4, 7
+; ENABLE-32-NEXT:    cmpw 4, 6
+; ENABLE-32-NEXT:    iselgt 4, 8, 4
+; ENABLE-32-NEXT:    slwi 8, 4, 2
+; ENABLE-32-NEXT:    lwzx 8, 3, 8
+; ENABLE-32-NEXT:    cmplw 8, 31
+; ENABLE-32-NEXT:    beq 0, L..BB12_11
+; ENABLE-32-NEXT:  # %bb.8: # %if.end.4
+; ENABLE-32-NEXT:    add 4, 5, 4
+; ENABLE-32-NEXT:    add 8, 4, 7
+; ENABLE-32-NEXT:    cmpw 4, 6
+; ENABLE-32-NEXT:    iselgt 4, 8, 4
+; ENABLE-32-NEXT:    slwi 8, 4, 2
+; ENABLE-32-NEXT:    lwzx 8, 3, 8
+; ENABLE-32-NEXT:    cmplw 8, 31
+; ENABLE-32-NEXT:    beq 0, L..BB12_11
+; ENABLE-32-NEXT:  # %bb.9: # %if.end.5
+; ENABLE-32-NEXT:    add 4, 5, 4
+; ENABLE-32-NEXT:    add 8, 4, 7
+; ENABLE-32-NEXT:    cmpw 4, 6
+; ENABLE-32-NEXT:    iselgt 4, 8, 4
+; ENABLE-32-NEXT:    slwi 8, 4, 2
+; ENABLE-32-NEXT:    lwzx 8, 3, 8
+; ENABLE-32-NEXT:    cmplw 8, 31
+; ENABLE-32-NEXT:    beq 0, L..BB12_11
+; ENABLE-32-NEXT:  # %bb.10: # %if.end.6
+; ENABLE-32-NEXT:    add 4, 5, 4
+; ENABLE-32-NEXT:    add 5, 4, 7
+; ENABLE-32-NEXT:    cmpw 4, 6
+; ENABLE-32-NEXT:    iselgt 4, 5, 4
+; ENABLE-32-NEXT:    slwi 5, 4, 2
+; ENABLE-32-NEXT:    lwzx 3, 3, 5
+; ENABLE-32-NEXT:    cmplw 3, 31
+; ENABLE-32-NEXT:    li 3, -128
+; ENABLE-32-NEXT:    bne 0, L..BB12_12
+; ENABLE-32-NEXT:  L..BB12_11: # %if.then
+; ENABLE-32-NEXT:    lwz 3, L..C5(2) # @he
+; ENABLE-32-NEXT:    lwz 3, 0(3)
+; ENABLE-32-NEXT:    lbzx 3, 3, 4
+; ENABLE-32-NEXT:    extsb 3, 3
+; ENABLE-32-NEXT:  L..BB12_12: # %cleanup
+; ENABLE-32-NEXT:    lwz 31, 60(1) # 4-byte Folded Reload
+; ENABLE-32-NEXT:    lwz 30, 56(1) # 4-byte Folded Reload
+; ENABLE-32-NEXT:    addi 1, 1, 64
+; ENABLE-32-NEXT:    lwz 0, 8(1)
+; ENABLE-32-NEXT:    mtlr 0
+; ENABLE-32-NEXT:    blr
+;
+; DISABLE-32-LABEL: transpose:
+; DISABLE-32:       # %bb.0: # %entry
+; DISABLE-32-NEXT:    mflr 0
+; DISABLE-32-NEXT:    stw 0, 8(1)
+; DISABLE-32-NEXT:    stwu 1, -64(1)
+; DISABLE-32-NEXT:    lwz 3, L..C0(2) # @columns
+; DISABLE-32-NEXT:    stw 30, 56(1) # 4-byte Folded Spill
+; DISABLE-32-NEXT:    stw 31, 60(1) # 4-byte Folded Spill
+; DISABLE-32-NEXT:    lwz 4, 4(3)
+; DISABLE-32-NEXT:    lwz 5, 8(3)
+; DISABLE-32-NEXT:    lwz 7, 28(3)
+; DISABLE-32-NEXT:    slwi 4, 4, 14
+; DISABLE-32-NEXT:    lwz 8, 24(3)
+; DISABLE-32-NEXT:    slwi 5, 5, 7
+; DISABLE-32-NEXT:    lwz 6, 12(3)
+; DISABLE-32-NEXT:    or 4, 4, 5
+; DISABLE-32-NEXT:    lwz 5, 20(3)
+; DISABLE-32-NEXT:    slwi 8, 8, 7
+; DISABLE-32-NEXT:    slwi 7, 7, 14
+; DISABLE-32-NEXT:    or 7, 7, 8
+; DISABLE-32-NEXT:    or 4, 4, 6
+; DISABLE-32-NEXT:    or 5, 7, 5
+; DISABLE-32-NEXT:    cmplw 4, 5
+; DISABLE-32-NEXT:    ble 0, L..BB12_2
+; DISABLE-32-NEXT:  # %bb.1: # %cond.true.i
+; DISABLE-32-NEXT:    lwz 3, 16(3)
+; DISABLE-32-NEXT:    slwi 4, 4, 7
+; DISABLE-32-NEXT:    or 4, 3, 4
+; DISABLE-32-NEXT:    srwi 3, 4, 11
+; DISABLE-32-NEXT:    slwi 4, 4, 21
+; DISABLE-32-NEXT:    or 4, 4, 5
+; DISABLE-32-NEXT:    b L..BB12_3
+; DISABLE-32-NEXT:  L..BB12_2: # %cond.false.i
+; DISABLE-32-NEXT:    lwz 3, 16(3)
+; DISABLE-32-NEXT:    slwi 5, 5, 7
+; DISABLE-32-NEXT:    or 5, 3, 5
+; DISABLE-32-NEXT:    srwi 3, 5, 11
+; DISABLE-32-NEXT:    slwi 5, 5, 21
+; DISABLE-32-NEXT:    or 4, 5, 4
+; DISABLE-32-NEXT:  L..BB12_3: # %hash.exit
+; DISABLE-32-NEXT:    lwz 5, L..C1(2) # @lock
+; DISABLE-32-NEXT:    rotlwi 31, 4, 15
+; DISABLE-32-NEXT:    rlwimi 31, 3, 15, 0, 16
+; DISABLE-32-NEXT:    lis 30, 16
+; DISABLE-32-NEXT:    ori 6, 30, 1435
+; DISABLE-32-NEXT:    stw 31, 0(5)
+; DISABLE-32-NEXT:    li 5, 0
+; DISABLE-32-NEXT:    bl .__moddi3[PR]
+; DISABLE-32-NEXT:    nop
+; DISABLE-32-NEXT:    lwz 3, L..C2(2) # @htindex
+; DISABLE-32-NEXT:    lis 5, 28191
+; DISABLE-32-NEXT:    ori 5, 5, 30389
+; DISABLE-32-NEXT:    mulhwu 5, 31, 5
+; DISABLE-32-NEXT:    lwz 6, L..C3(2) # @ht
+; DISABLE-32-NEXT:    lwz 7, L..C4(2) # @stride
+; DISABLE-32-NEXT:    stw 4, 0(3)
+; DISABLE-32-NEXT:    sub 3, 31, 5
+; DISABLE-32-NEXT:    srwi 3, 3, 1
+; DISABLE-32-NEXT:    add 5, 3, 5
+; DISABLE-32-NEXT:    srwi 5, 5, 7
+; DISABLE-32-NEXT:    lwz 3, 0(6)
+; DISABLE-32-NEXT:    mulli 5, 5, 179
+; DISABLE-32-NEXT:    sub 5, 31, 5
+; DISABLE-32-NEXT:    oris 5, 5, 2
+; DISABLE-32-NEXT:    stw 5, 0(7)
+; DISABLE-32-NEXT:    slwi 6, 4, 2
+; DISABLE-32-NEXT:    lwzx 6, 3, 6
+; DISABLE-32-NEXT:    cmplw 6, 31
+; DISABLE-32-NEXT:    beq 0, L..BB12_25
+; DISABLE-32-NEXT:  # %bb.4: # %if.end
+; DISABLE-32-NEXT:    add 4, 5, 4
+; DISABLE-32-NEXT:    ori 6, 30, 1434
+; DISABLE-32-NEXT:    addi 7, 4, -1435
+; DISABLE-32-NEXT:    addis 7, 7, -16
+; DISABLE-32-NEXT:    cmpw 4, 6
+; DISABLE-32-NEXT:    bc 12, 1, L..BB12_5
+; DISABLE-32-NEXT:    b L..BB12_6
+; DISABLE-32-NEXT:  L..BB12_5: # %if.end
+; DISABLE-32-NEXT:    addi 4, 7, 0
+; DISABLE-32-NEXT:  L..BB12_6: # %if.end
+; DISABLE-32-NEXT:    slwi 7, 4, 2
+; DISABLE-32-NEXT:    lwzx 7, 3, 7
+; DISABLE-32-NEXT:    cmplw 7, 31
+; DISABLE-32-NEXT:    beq 0, L..BB12_25
+; DISABLE-32-NEXT:  # %bb.7: # %if.end.1
+; DISABLE-32-NEXT:    lis 7, -17
+; DISABLE-32-NEXT:    add 4, 5, 4
+; DISABLE-32-NEXT:    ori 7, 7, 64101
+; DISABLE-32-NEXT:    add 8, 4, 7
+; DISABLE-32-NEXT:    cmpw 4, 6
+; DISABLE-32-NEXT:    bc 12, 1, L..BB12_8
+; DISABLE-32-NEXT:    b L..BB12_9
+; DISABLE-32-NEXT:  L..BB12_8: # %if.end.1
+; DISABLE-32-NEXT:    addi 4, 8, 0
+; DISABLE-32-NEXT:  L..BB12_9: # %if.end.1
+; DISABLE-32-NEXT:    slwi 8, 4, 2
+; DISABLE-32-NEXT:    lwzx 8, 3, 8
+; DISABLE-32-NEXT:    cmplw 8, 31
+; DISABLE-32-NEXT:    beq 0, L..BB12_25
+; DISABLE-32-NEXT:  # %bb.10: # %if.end.2
+; DISABLE-32-NEXT:    add 4, 5, 4
+; DISABLE-32-NEXT:    add 8, 4, 7
+; DISABLE-32-NEXT:    cmpw 4, 6
+; DISABLE-32-NEXT:    bc 12, 1, L..BB12_11
+; DISABLE-32-NEXT:    b L..BB12_12
+; DISABLE-32-NEXT:  L..BB12_11: # %if.end.2
+; DISABLE-32-NEXT:    addi 4, 8, 0
+; DISABLE-32-NEXT:  L..BB12_12: # %if.end.2
+; DISABLE-32-NEXT:    slwi 8, 4, 2
+; DISABLE-32-NEXT:    lwzx 8, 3, 8
+; DISABLE-32-NEXT:    cmplw 8, 31
+; DISABLE-32-NEXT:    beq 0, L..BB12_25
+; DISABLE-32-NEXT:  # %bb.13: # %if.end.3
+; DISABLE-32-NEXT:    add 4, 5, 4
+; DISABLE-32-NEXT:    add 8, 4, 7
+; DISABLE-32-NEXT:    cmpw 4, 6
+; DISABLE-32-NEXT:    bc 12, 1, L..BB12_14
+; DISABLE-32-NEXT:    b L..BB12_15
+; DISABLE-32-NEXT:  L..BB12_14: # %if.end.3
+; DISABLE-32-NEXT:    addi 4, 8, 0
+; DISABLE-32-NEXT:  L..BB12_15: # %if.end.3
+; DISABLE-32-NEXT:    slwi 8, 4, 2
+; DISABLE-32-NEXT:    lwzx 8, 3, 8
+; DISABLE-32-NEXT:    cmplw 8, 31
+; DISABLE-32-NEXT:    beq 0, L..BB12_25
+; DISABLE-32-NEXT:  # %bb.16: # %if.end.4
+; DISABLE-32-NEXT:    add 4, 5, 4
+; DISABLE-32-NEXT:    add 8, 4, 7
+; DISABLE-32-NEXT:    cmpw 4, 6
+; DISABLE-32-NEXT:    bc 12, 1, L..BB12_17
+; DISABLE-32-NEXT:    b L..BB12_18
+; DISABLE-32-NEXT:  L..BB12_17: # %if.end.4
+; DISABLE-32-NEXT:    addi 4, 8, 0
+; DISABLE-32-NEXT:  L..BB12_18: # %if.end.4
+; DISABLE-32-NEXT:    slwi 8, 4, 2
+; DISABLE-32-NEXT:    lwzx 8, 3, 8
+; DISABLE-32-NEXT:    cmplw 8, 31
+; DISABLE-32-NEXT:    beq 0, L..BB12_25
+; DISABLE-32-NEXT:  # %bb.19: # %if.end.5
+; DISABLE-32-NEXT:    add 4, 5, 4
+; DISABLE-32-NEXT:    add 8, 4, 7
+; DISABLE-32-NEXT:    cmpw 4, 6
+; DISABLE-32-NEXT:    bc 12, 1, L..BB12_20
+; DISABLE-32-NEXT:    b L..BB12_21
+; DISABLE-32-NEXT:  L..BB12_20: # %if.end.5
+; DISABLE-32-NEXT:    addi 4, 8, 0
+; DISABLE-32-NEXT:  L..BB12_21: # %if.end.5
+; DISABLE-32-NEXT:    slwi 8, 4, 2
+; DISABLE-32-NEXT:    lwzx 8, 3, 8
+; DISABLE-32-NEXT:    cmplw 8, 31
+; DISABLE-32-NEXT:    beq 0, L..BB12_25
+; DISABLE-32-NEXT:  # %bb.22: # %if.end.6
+; DISABLE-32-NEXT:    add 4, 5, 4
+; DISABLE-32-NEXT:    add 5, 4, 7
+; DISABLE-32-NEXT:    cmpw 4, 6
+; DISABLE-32-NEXT:    bc 12, 1, L..BB12_23
+; DISABLE-32-NEXT:    b L..BB12_24
+; DISABLE-32-NEXT:  L..BB12_23: # %if.end.6
+; DISABLE-32-NEXT:    addi 4, 5, 0
+; DISABLE-32-NEXT:  L..BB12_24: # %if.end.6
+; DISABLE-32-NEXT:    slwi 5, 4, 2
+; DISABLE-32-NEXT:    lwzx 3, 3, 5
+; DISABLE-32-NEXT:    cmplw 3, 31
+; DISABLE-32-NEXT:    li 3, -128
+; DISABLE-32-NEXT:    bne 0, L..BB12_26
+; DISABLE-32-NEXT:  L..BB12_25: # %if.then
+; DISABLE-32-NEXT:    lwz 3, L..C5(2) # @he
+; DISABLE-32-NEXT:    lwz 3, 0(3)
+; DISABLE-32-NEXT:    lbzx 3, 3, 4
+; DISABLE-32-NEXT:    extsb 3, 3
+; DISABLE-32-NEXT:  L..BB12_26: # %cleanup
+; DISABLE-32-NEXT:    lwz 31, 60(1) # 4-byte Folded Reload
+; DISABLE-32-NEXT:    lwz 30, 56(1) # 4-byte Folded Reload
+; DISABLE-32-NEXT:    addi 1, 1, 64
+; DISABLE-32-NEXT:    lwz 0, 8(1)
+; DISABLE-32-NEXT:    mtlr 0
+; DISABLE-32-NEXT:    blr
 entry:
   %0 = load i32, i32* getelementptr inbounds ([0 x i32], [0 x i32]* @columns, i64 0, i64 1), align 4
   %shl.i = shl i32 %0, 7
diff --git a/llvm/test/CodeGen/PowerPC/ppc64-inlineasm-clobber.ll b/llvm/test/CodeGen/PowerPC/ppc64-inlineasm-clobber.ll
--- a/llvm/test/CodeGen/PowerPC/ppc64-inlineasm-clobber.ll
+++ b/llvm/test/CodeGen/PowerPC/ppc64-inlineasm-clobber.ll
@@ -75,43 +75,41 @@
 define dso_local signext i32 @ClobberLR_BR(i32 signext %in) #0 {
 ; PPC64LE-LABEL: ClobberLR_BR:
 ; PPC64LE:       # %bb.0: # %entry
+; PPC64LE-NEXT:    mflr r0
+; PPC64LE-NEXT:    std r0, 16(r1)
+; PPC64LE-NEXT:    stdu r1, -32(r1)
 ; PPC64LE-NEXT:    #APP
 ; PPC64LE-NEXT:    nop
 ; PPC64LE-NEXT:    #NO_APP
-; PPC64LE-NEXT:  # %bb.1: # %return
+; PPC64LE-NEXT:  .LBB3_1: # %return
 ; PPC64LE-NEXT:    extsw r3, r3
-; PPC64LE-NEXT:    blr
-; PPC64LE-NEXT:  .Ltmp0: # Block address taken
-; PPC64LE-NEXT:  .LBB3_2: # %return_early
-; PPC64LE-NEXT:    mflr r0
-; PPC64LE-NEXT:    std r0, 16(r1)
-; PPC64LE-NEXT:    stdu r1, -32(r1)
-; PPC64LE-NEXT:    li r3, 0
 ; PPC64LE-NEXT:    addi r1, r1, 32
 ; PPC64LE-NEXT:    ld r0, 16(r1)
 ; PPC64LE-NEXT:    mtlr r0
-; PPC64LE-NEXT:    extsw r3, r3
 ; PPC64LE-NEXT:    blr
+; PPC64LE-NEXT:  .Ltmp0: # Block address taken
+; PPC64LE-NEXT:  .LBB3_2: # %return_early
+; PPC64LE-NEXT:    li r3, 0
+; PPC64LE-NEXT:    b .LBB3_1
 ;
 ; PPC64BE-LABEL: ClobberLR_BR:
 ; PPC64BE:       # %bb.0: # %entry
+; PPC64BE-NEXT:    mflr r0
+; PPC64BE-NEXT:    std r0, 16(r1)
+; PPC64BE-NEXT:    stdu r1, -48(r1)
 ; PPC64BE-NEXT:    #APP
 ; PPC64BE-NEXT:    nop
 ; PPC64BE-NEXT:    #NO_APP
-; PPC64BE-NEXT:  # %bb.1: # %return
+; PPC64BE-NEXT:  .LBB3_1: # %return
 ; PPC64BE-NEXT:    extsw r3, r3
-; PPC64BE-NEXT:    blr
-; PPC64BE-NEXT:  .Ltmp0: # Block address taken
-; PPC64BE-NEXT:  .LBB3_2: # %return_early
-; PPC64BE-NEXT:    mflr r0
-; PPC64BE-NEXT:    std r0, 16(r1)
-; PPC64BE-NEXT:    stdu r1, -48(r1)
-; PPC64BE-NEXT:    li r3, 0
 ; PPC64BE-NEXT:    addi r1, r1, 48
 ; PPC64BE-NEXT:    ld r0, 16(r1)
 ; PPC64BE-NEXT:    mtlr r0
-; PPC64BE-NEXT:    extsw r3, r3
 ; PPC64BE-NEXT:    blr
+; PPC64BE-NEXT:  .Ltmp0: # Block address taken
+; PPC64BE-NEXT:  .LBB3_2: # %return_early
+; PPC64BE-NEXT:    li r3, 0
+; PPC64BE-NEXT:    b .LBB3_1
 entry:
   callbr void asm sideeffect "nop", "X,~{lr}"(i8* blockaddress(@ClobberLR_BR, %return_early))
           to label %return [label %return_early]
diff --git a/llvm/test/CodeGen/PowerPC/ppc64-rop-protection.ll b/llvm/test/CodeGen/PowerPC/ppc64-rop-protection.ll
--- a/llvm/test/CodeGen/PowerPC/ppc64-rop-protection.ll
+++ b/llvm/test/CodeGen/PowerPC/ppc64-rop-protection.ll
@@ -2398,14 +2398,14 @@
 define dso_local zeroext i32 @shrinkwrap(i32* readonly %in) #0 {
 ; LE-P10-LABEL: shrinkwrap:
 ; LE-P10:       # %bb.0: # %entry
-; LE-P10-NEXT:    cmpldi r3, 0
-; LE-P10-NEXT:    beq cr0, .LBB2_2
-; LE-P10-NEXT:  # %bb.1: # %if.end
 ; LE-P10-NEXT:    mflr r0
 ; LE-P10-NEXT:    std r30, -16(r1) # 8-byte Folded Spill
 ; LE-P10-NEXT:    std r0, 16(r1)
 ; LE-P10-NEXT:    hashst r0, -24(r1)
 ; LE-P10-NEXT:    stdu r1, -64(r1)
+; LE-P10-NEXT:    cmpldi r3, 0
+; LE-P10-NEXT:    beq cr0, .LBB2_2
+; LE-P10-NEXT:  # %bb.1: # %if.end
 ; LE-P10-NEXT:    mr r30, r3
 ; LE-P10-NEXT:    lwz r3, 12(r3)
 ; LE-P10-NEXT:    stw r3, 36(r1)
@@ -2413,27 +2413,28 @@
 ; LE-P10-NEXT:    bl callee2@notoc
 ; LE-P10-NEXT:    lwz r4, 16(r30)
 ; LE-P10-NEXT:    add r3, r4, r3
+; LE-P10-NEXT:    b .LBB2_3
+; LE-P10-NEXT:  .LBB2_2:
+; LE-P10-NEXT:    li r3, 0
+; LE-P10-NEXT:  .LBB2_3: # %return
+; LE-P10-NEXT:    clrldi r3, r3, 32
 ; LE-P10-NEXT:    addi r1, r1, 64
 ; LE-P10-NEXT:    ld r0, 16(r1)
-; LE-P10-NEXT:    clrldi r3, r3, 32
 ; LE-P10-NEXT:    hashchk r0, -24(r1)
 ; LE-P10-NEXT:    ld r30, -16(r1) # 8-byte Folded Reload
 ; LE-P10-NEXT:    mtlr r0
 ; LE-P10-NEXT:    blr
-; LE-P10-NEXT:  .LBB2_2:
-; LE-P10-NEXT:    li r3, 0
-; LE-P10-NEXT:    blr
 ;
 ; LE-P9-LABEL: shrinkwrap:
 ; LE-P9:       # %bb.0: # %entry
-; LE-P9-NEXT:    cmpldi r3, 0
-; LE-P9-NEXT:    beq cr0, .LBB2_2
-; LE-P9-NEXT:  # %bb.1: # %if.end
 ; LE-P9-NEXT:    mflr r0
 ; LE-P9-NEXT:    std r30, -16(r1) # 8-byte Folded Spill
 ; LE-P9-NEXT:    std r0, 16(r1)
 ; LE-P9-NEXT:    hashst r0, -24(r1)
 ; LE-P9-NEXT:    stdu r1, -64(r1)
+; LE-P9-NEXT:    cmpldi r3, 0
+; LE-P9-NEXT:    beq cr0, .LBB2_2
+; LE-P9-NEXT:  # %bb.1: # %if.end
 ; LE-P9-NEXT:    mr r30, r3
 ; LE-P9-NEXT:    lwz r3, 12(r3)
 ; LE-P9-NEXT:    stw r3, 36(r1)
@@ -2442,27 +2443,28 @@
 ; LE-P9-NEXT:    nop
 ; LE-P9-NEXT:    lwz r4, 16(r30)
 ; LE-P9-NEXT:    add r3, r4, r3
+; LE-P9-NEXT:    b .LBB2_3
+; LE-P9-NEXT:  .LBB2_2:
+; LE-P9-NEXT:    li r3, 0
+; LE-P9-NEXT:  .LBB2_3: # %return
+; LE-P9-NEXT:    clrldi r3, r3, 32
 ; LE-P9-NEXT:    addi r1, r1, 64
 ; LE-P9-NEXT:    ld r0, 16(r1)
-; LE-P9-NEXT:    clrldi r3, r3, 32
 ; LE-P9-NEXT:    mtlr r0
 ; LE-P9-NEXT:    hashchk r0, -24(r1)
 ; LE-P9-NEXT:    ld r30, -16(r1) # 8-byte Folded Reload
 ; LE-P9-NEXT:    blr
-; LE-P9-NEXT:  .LBB2_2:
-; LE-P9-NEXT:    li r3, 0
-; LE-P9-NEXT:    blr
 ;
 ; LE-P8-LABEL: shrinkwrap:
 ; LE-P8:       # %bb.0: # %entry
-; LE-P8-NEXT:    cmpldi r3, 0
-; LE-P8-NEXT:    beq cr0, .LBB2_2
-; LE-P8-NEXT:  # %bb.1: # %if.end
 ; LE-P8-NEXT:    mflr r0
 ; LE-P8-NEXT:    std r30, -16(r1) # 8-byte Folded Spill
 ; LE-P8-NEXT:    std r0, 16(r1)
 ; LE-P8-NEXT:    hashst r0, -24(r1)
 ; LE-P8-NEXT:    stdu r1, -64(r1)
+; LE-P8-NEXT:    cmpldi r3, 0
+; LE-P8-NEXT:    beq cr0, .LBB2_2
+; LE-P8-NEXT:  # %bb.1: # %if.end
 ; LE-P8-NEXT:    mr r30, r3
 ; LE-P8-NEXT:    lwz r3, 12(r3)
 ; LE-P8-NEXT:    stw r3, 36(r1)
@@ -2471,16 +2473,17 @@
 ; LE-P8-NEXT:    nop
 ; LE-P8-NEXT:    lwz r4, 16(r30)
 ; LE-P8-NEXT:    add r3, r4, r3
+; LE-P8-NEXT:    b .LBB2_3
+; LE-P8-NEXT:  .LBB2_2:
+; LE-P8-NEXT:    li r3, 0
+; LE-P8-NEXT:  .LBB2_3: # %return
+; LE-P8-NEXT:    clrldi r3, r3, 32
 ; LE-P8-NEXT:    addi r1, r1, 64
 ; LE-P8-NEXT:    ld r0, 16(r1)
-; LE-P8-NEXT:    clrldi r3, r3, 32
 ; LE-P8-NEXT:    hashchk r0, -24(r1)
 ; LE-P8-NEXT:    ld r30, -16(r1) # 8-byte Folded Reload
 ; LE-P8-NEXT:    mtlr r0
 ; LE-P8-NEXT:    blr
-; LE-P8-NEXT:  .LBB2_2:
-; LE-P8-NEXT:    li r3, 0
-; LE-P8-NEXT:    blr
 ;
 ; LE-P10-O0-LABEL: shrinkwrap:
 ; LE-P10-O0:       # %bb.0: # %entry
@@ -2583,14 +2586,14 @@
 ;
 ; BE-P10-LABEL: shrinkwrap:
 ; BE-P10:       # %bb.0: # %entry
-; BE-P10-NEXT:    cmpldi r3, 0
-; BE-P10-NEXT:    beq cr0, .LBB2_2
-; BE-P10-NEXT:  # %bb.1: # %if.end
 ; BE-P10-NEXT:    mflr r0
 ; BE-P10-NEXT:    std r0, 16(r1)
 ; BE-P10-NEXT:    hashst r0, -24(r1)
 ; BE-P10-NEXT:    stdu r1, -144(r1)
+; BE-P10-NEXT:    cmpldi r3, 0
 ; BE-P10-NEXT:    std r30, 128(r1) # 8-byte Folded Spill
+; BE-P10-NEXT:    beq cr0, .LBB2_2
+; BE-P10-NEXT:  # %bb.1: # %if.end
 ; BE-P10-NEXT:    mr r30, r3
 ; BE-P10-NEXT:    lwz r3, 12(r3)
 ; BE-P10-NEXT:    stw r3, 116(r1)
@@ -2598,28 +2601,29 @@
 ; BE-P10-NEXT:    bl callee2
 ; BE-P10-NEXT:    nop
 ; BE-P10-NEXT:    lwz r4, 16(r30)
-; BE-P10-NEXT:    ld r30, 128(r1) # 8-byte Folded Reload
 ; BE-P10-NEXT:    add r3, r4, r3
+; BE-P10-NEXT:    b .LBB2_3
+; BE-P10-NEXT:  .LBB2_2:
+; BE-P10-NEXT:    li r3, 0
+; BE-P10-NEXT:  .LBB2_3: # %return
+; BE-P10-NEXT:    ld r30, 128(r1) # 8-byte Folded Reload
+; BE-P10-NEXT:    clrldi r3, r3, 32
 ; BE-P10-NEXT:    addi r1, r1, 144
 ; BE-P10-NEXT:    ld r0, 16(r1)
-; BE-P10-NEXT:    clrldi r3, r3, 32
 ; BE-P10-NEXT:    hashchk r0, -24(r1)
 ; BE-P10-NEXT:    mtlr r0
 ; BE-P10-NEXT:    blr
-; BE-P10-NEXT:  .LBB2_2:
-; BE-P10-NEXT:    li r3, 0
-; BE-P10-NEXT:    blr
 ;
 ; BE-P9-LABEL: shrinkwrap:
 ; BE-P9:       # %bb.0: # %entry
-; BE-P9-NEXT:    cmpldi r3, 0
-; BE-P9-NEXT:    beq cr0, .LBB2_2
-; BE-P9-NEXT:  # %bb.1: # %if.end
 ; BE-P9-NEXT:    mflr r0
 ; BE-P9-NEXT:    std r0, 16(r1)
 ; BE-P9-NEXT:    hashst r0, -24(r1)
 ; BE-P9-NEXT:    stdu r1, -144(r1)
+; BE-P9-NEXT:    cmpldi r3, 0
 ; BE-P9-NEXT:    std r30, 128(r1) # 8-byte Folded Spill
+; BE-P9-NEXT:    beq cr0, .LBB2_2
+; BE-P9-NEXT:  # %bb.1: # %if.end
 ; BE-P9-NEXT:    mr r30, r3
 ; BE-P9-NEXT:    lwz r3, 12(r3)
 ; BE-P9-NEXT:    stw r3, 116(r1)
@@ -2627,28 +2631,29 @@
 ; BE-P9-NEXT:    bl callee2
 ; BE-P9-NEXT:    nop
 ; BE-P9-NEXT:    lwz r4, 16(r30)
-; BE-P9-NEXT:    ld r30, 128(r1) # 8-byte Folded Reload
 ; BE-P9-NEXT:    add r3, r4, r3
+; BE-P9-NEXT:    b .LBB2_3
+; BE-P9-NEXT:  .LBB2_2:
+; BE-P9-NEXT:    li r3, 0
+; BE-P9-NEXT:  .LBB2_3: # %return
+; BE-P9-NEXT:    ld r30, 128(r1) # 8-byte Folded Reload
+; BE-P9-NEXT:    clrldi r3, r3, 32
 ; BE-P9-NEXT:    addi r1, r1, 144
 ; BE-P9-NEXT:    ld r0, 16(r1)
-; BE-P9-NEXT:    clrldi r3, r3, 32
 ; BE-P9-NEXT:    mtlr r0
 ; BE-P9-NEXT:    hashchk r0, -24(r1)
 ; BE-P9-NEXT:    blr
-; BE-P9-NEXT:  .LBB2_2:
-; BE-P9-NEXT:    li r3, 0
-; BE-P9-NEXT:    blr
 ;
 ; BE-P8-LABEL: shrinkwrap:
 ; BE-P8:       # %bb.0: # %entry
-; BE-P8-NEXT:    cmpldi r3, 0
-; BE-P8-NEXT:    beq cr0, .LBB2_2
-; BE-P8-NEXT:  # %bb.1: # %if.end
 ; BE-P8-NEXT:    mflr r0
 ; BE-P8-NEXT:    std r0, 16(r1)
 ; BE-P8-NEXT:    hashst r0, -24(r1)
 ; BE-P8-NEXT:    stdu r1, -144(r1)
+; BE-P8-NEXT:    cmpldi r3, 0
 ; BE-P8-NEXT:    std r30, 128(r1) # 8-byte Folded Spill
+; BE-P8-NEXT:    beq cr0, .LBB2_2
+; BE-P8-NEXT:  # %bb.1: # %if.end
 ; BE-P8-NEXT:    mr r30, r3
 ; BE-P8-NEXT:    lwz r3, 12(r3)
 ; BE-P8-NEXT:    stw r3, 116(r1)
@@ -2656,28 +2661,29 @@
 ; BE-P8-NEXT:    bl callee2
 ; BE-P8-NEXT:    nop
 ; BE-P8-NEXT:    lwz r4, 16(r30)
-; BE-P8-NEXT:    ld r30, 128(r1) # 8-byte Folded Reload
 ; BE-P8-NEXT:    add r3, r4, r3
+; BE-P8-NEXT:    b .LBB2_3
+; BE-P8-NEXT:  .LBB2_2:
+; BE-P8-NEXT:    li r3, 0
+; BE-P8-NEXT:  .LBB2_3: # %return
+; BE-P8-NEXT:    ld r30, 128(r1) # 8-byte Folded Reload
+; BE-P8-NEXT:    clrldi r3, r3, 32
 ; BE-P8-NEXT:    addi r1, r1, 144
 ; BE-P8-NEXT:    ld r0, 16(r1)
-; BE-P8-NEXT:    clrldi r3, r3, 32
 ; BE-P8-NEXT:    hashchk r0, -24(r1)
 ; BE-P8-NEXT:    mtlr r0
 ; BE-P8-NEXT:    blr
-; BE-P8-NEXT:  .LBB2_2:
-; BE-P8-NEXT:    li r3, 0
-; BE-P8-NEXT:    blr
 ;
 ; LE-P10-PRIV-LABEL: shrinkwrap:
 ; LE-P10-PRIV:       # %bb.0: # %entry
-; LE-P10-PRIV-NEXT:    cmpldi r3, 0
-; LE-P10-PRIV-NEXT:    beq cr0, .LBB2_2
-; LE-P10-PRIV-NEXT:  # %bb.1: # %if.end
 ; LE-P10-PRIV-NEXT:    mflr r0
 ; LE-P10-PRIV-NEXT:    std r30, -16(r1) # 8-byte Folded Spill
 ; LE-P10-PRIV-NEXT:    std r0, 16(r1)
 ; LE-P10-PRIV-NEXT:    hashstp r0, -24(r1)
 ; LE-P10-PRIV-NEXT:    stdu r1, -64(r1)
+; LE-P10-PRIV-NEXT:    cmpldi r3, 0
+; LE-P10-PRIV-NEXT:    beq cr0, .LBB2_2
+; LE-P10-PRIV-NEXT:  # %bb.1: # %if.end
 ; LE-P10-PRIV-NEXT:    mr r30, r3
 ; LE-P10-PRIV-NEXT:    lwz r3, 12(r3)
 ; LE-P10-PRIV-NEXT:    stw r3, 36(r1)
@@ -2685,27 +2691,28 @@
 ; LE-P10-PRIV-NEXT:    bl callee2@notoc
 ; LE-P10-PRIV-NEXT:    lwz r4, 16(r30)
 ; LE-P10-PRIV-NEXT:    add r3, r4, r3
+; LE-P10-PRIV-NEXT:    b .LBB2_3
+; LE-P10-PRIV-NEXT:  .LBB2_2:
+; LE-P10-PRIV-NEXT:    li r3, 0
+; LE-P10-PRIV-NEXT:  .LBB2_3: # %return
+; LE-P10-PRIV-NEXT:    clrldi r3, r3, 32
 ; LE-P10-PRIV-NEXT:    addi r1, r1, 64
 ; LE-P10-PRIV-NEXT:    ld r0, 16(r1)
-; LE-P10-PRIV-NEXT:    clrldi r3, r3, 32
 ; LE-P10-PRIV-NEXT:    hashchkp r0, -24(r1)
 ; LE-P10-PRIV-NEXT:    ld r30, -16(r1) # 8-byte Folded Reload
 ; LE-P10-PRIV-NEXT:    mtlr r0
 ; LE-P10-PRIV-NEXT:    blr
-; LE-P10-PRIV-NEXT:  .LBB2_2:
-; LE-P10-PRIV-NEXT:    li r3, 0
-; LE-P10-PRIV-NEXT:    blr
 ;
 ; LE-P9-PRIV-LABEL: shrinkwrap:
 ; LE-P9-PRIV:       # %bb.0: # %entry
-; LE-P9-PRIV-NEXT:    cmpldi r3, 0
-; LE-P9-PRIV-NEXT:    beq cr0, .LBB2_2
-; LE-P9-PRIV-NEXT:  # %bb.1: # %if.end
 ; LE-P9-PRIV-NEXT:    mflr r0
 ; LE-P9-PRIV-NEXT:    std r30, -16(r1) # 8-byte Folded Spill
 ; LE-P9-PRIV-NEXT:    std r0, 16(r1)
 ; LE-P9-PRIV-NEXT:    hashstp r0, -24(r1)
 ; LE-P9-PRIV-NEXT:    stdu r1, -64(r1)
+; LE-P9-PRIV-NEXT:    cmpldi r3, 0
+; LE-P9-PRIV-NEXT:    beq cr0, .LBB2_2
+; LE-P9-PRIV-NEXT:  # %bb.1: # %if.end
 ; LE-P9-PRIV-NEXT:    mr r30, r3
 ; LE-P9-PRIV-NEXT:    lwz r3, 12(r3)
 ; LE-P9-PRIV-NEXT:    stw r3, 36(r1)
@@ -2714,27 +2721,28 @@
 ; LE-P9-PRIV-NEXT:    nop
 ; LE-P9-PRIV-NEXT:    lwz r4, 16(r30)
 ; LE-P9-PRIV-NEXT:    add r3, r4, r3
+; LE-P9-PRIV-NEXT:    b .LBB2_3
+; LE-P9-PRIV-NEXT:  .LBB2_2:
+; LE-P9-PRIV-NEXT:    li r3, 0
+; LE-P9-PRIV-NEXT:  .LBB2_3: # %return
+; LE-P9-PRIV-NEXT:    clrldi r3, r3, 32
 ; LE-P9-PRIV-NEXT:    addi r1, r1, 64
 ; LE-P9-PRIV-NEXT:    ld r0, 16(r1)
-; LE-P9-PRIV-NEXT:    clrldi r3, r3, 32
 ; LE-P9-PRIV-NEXT:    mtlr r0
 ; LE-P9-PRIV-NEXT:    hashchkp r0, -24(r1)
 ; LE-P9-PRIV-NEXT:    ld r30, -16(r1) # 8-byte Folded Reload
 ; LE-P9-PRIV-NEXT:    blr
-; LE-P9-PRIV-NEXT:  .LBB2_2:
-; LE-P9-PRIV-NEXT:    li r3, 0
-; LE-P9-PRIV-NEXT:    blr
 ;
 ; LE-P8-PRIV-LABEL: shrinkwrap:
 ; LE-P8-PRIV:       # %bb.0: # %entry
-; LE-P8-PRIV-NEXT:    cmpldi r3, 0
-; LE-P8-PRIV-NEXT:    beq cr0, .LBB2_2
-; LE-P8-PRIV-NEXT:  # %bb.1: # %if.end
 ; LE-P8-PRIV-NEXT:    mflr r0
 ; LE-P8-PRIV-NEXT:    std r30, -16(r1) # 8-byte Folded Spill
 ; LE-P8-PRIV-NEXT:    std r0, 16(r1)
 ; LE-P8-PRIV-NEXT:    hashstp r0, -24(r1)
 ; LE-P8-PRIV-NEXT:    stdu r1, -64(r1)
+; LE-P8-PRIV-NEXT:    cmpldi r3, 0
+; LE-P8-PRIV-NEXT:    beq cr0, .LBB2_2
+; LE-P8-PRIV-NEXT:  # %bb.1: # %if.end
 ; LE-P8-PRIV-NEXT:    mr r30, r3
 ; LE-P8-PRIV-NEXT:    lwz r3, 12(r3)
 ; LE-P8-PRIV-NEXT:    stw r3, 36(r1)
@@ -2743,27 +2751,28 @@
 ; LE-P8-PRIV-NEXT:    nop
 ; LE-P8-PRIV-NEXT:    lwz r4, 16(r30)
 ; LE-P8-PRIV-NEXT:    add r3, r4, r3
+; LE-P8-PRIV-NEXT:    b .LBB2_3
+; LE-P8-PRIV-NEXT:  .LBB2_2:
+; LE-P8-PRIV-NEXT:    li r3, 0
+; LE-P8-PRIV-NEXT:  .LBB2_3: # %return
+; LE-P8-PRIV-NEXT:    clrldi r3, r3, 32
 ; LE-P8-PRIV-NEXT:    addi r1, r1, 64
 ; LE-P8-PRIV-NEXT:    ld r0, 16(r1)
-; LE-P8-PRIV-NEXT:    clrldi r3, r3, 32
 ; LE-P8-PRIV-NEXT:    hashchkp r0, -24(r1)
 ; LE-P8-PRIV-NEXT:    ld r30, -16(r1) # 8-byte Folded Reload
 ; LE-P8-PRIV-NEXT:    mtlr r0
 ; LE-P8-PRIV-NEXT:    blr
-; LE-P8-PRIV-NEXT:  .LBB2_2:
-; LE-P8-PRIV-NEXT:    li r3, 0
-; LE-P8-PRIV-NEXT:    blr
 ;
 ; BE-P10-PRIV-LABEL: shrinkwrap:
 ; BE-P10-PRIV:       # %bb.0: # %entry
-; BE-P10-PRIV-NEXT:    cmpldi r3, 0
-; BE-P10-PRIV-NEXT:    beq cr0, .LBB2_2
-; BE-P10-PRIV-NEXT:  # %bb.1: # %if.end
 ; BE-P10-PRIV-NEXT:    mflr r0
 ; BE-P10-PRIV-NEXT:    std r0, 16(r1)
 ; BE-P10-PRIV-NEXT:    hashstp r0, -24(r1)
 ; BE-P10-PRIV-NEXT:    stdu r1, -144(r1)
+; BE-P10-PRIV-NEXT:    cmpldi r3, 0
 ; BE-P10-PRIV-NEXT:    std r30, 128(r1) # 8-byte Folded Spill
+; BE-P10-PRIV-NEXT:    beq cr0, .LBB2_2
+; BE-P10-PRIV-NEXT:  # %bb.1: # %if.end
 ; BE-P10-PRIV-NEXT:    mr r30, r3
 ; BE-P10-PRIV-NEXT:    lwz r3, 12(r3)
 ; BE-P10-PRIV-NEXT:    stw r3, 116(r1)
@@ -2771,28 +2780,29 @@
 ; BE-P10-PRIV-NEXT:    bl callee2
 ; BE-P10-PRIV-NEXT:    nop
 ; BE-P10-PRIV-NEXT:    lwz r4, 16(r30)
-; BE-P10-PRIV-NEXT:    ld r30, 128(r1) # 8-byte Folded Reload
 ; BE-P10-PRIV-NEXT:    add r3, r4, r3
+; BE-P10-PRIV-NEXT:    b .LBB2_3
+; BE-P10-PRIV-NEXT:  .LBB2_2:
+; BE-P10-PRIV-NEXT:    li r3, 0
+; BE-P10-PRIV-NEXT:  .LBB2_3: # %return
+; BE-P10-PRIV-NEXT:    ld r30, 128(r1) # 8-byte Folded Reload
+; BE-P10-PRIV-NEXT:    clrldi r3, r3, 32
 ; BE-P10-PRIV-NEXT:    addi r1, r1, 144
 ; BE-P10-PRIV-NEXT:    ld r0, 16(r1)
-; BE-P10-PRIV-NEXT:    clrldi r3, r3, 32
 ; BE-P10-PRIV-NEXT:    hashchkp r0, -24(r1)
 ; BE-P10-PRIV-NEXT:    mtlr r0
 ; BE-P10-PRIV-NEXT:    blr
-; BE-P10-PRIV-NEXT:  .LBB2_2:
-; BE-P10-PRIV-NEXT:    li r3, 0
-; BE-P10-PRIV-NEXT:    blr
 ;
 ; BE-P9-PRIV-LABEL: shrinkwrap:
 ; BE-P9-PRIV:       # %bb.0: # %entry
-; BE-P9-PRIV-NEXT:    cmpldi r3, 0
-; BE-P9-PRIV-NEXT:    beq cr0, .LBB2_2
-; BE-P9-PRIV-NEXT:  # %bb.1: # %if.end
 ; BE-P9-PRIV-NEXT:    mflr r0
 ; BE-P9-PRIV-NEXT:    std r0, 16(r1)
 ; BE-P9-PRIV-NEXT:    hashstp r0, -24(r1)
 ; BE-P9-PRIV-NEXT:    stdu r1, -144(r1)
+; BE-P9-PRIV-NEXT:    cmpldi r3, 0
 ; BE-P9-PRIV-NEXT:    std r30, 128(r1) # 8-byte Folded Spill
+; BE-P9-PRIV-NEXT:    beq cr0, .LBB2_2
+; BE-P9-PRIV-NEXT:  # %bb.1: # %if.end
 ; BE-P9-PRIV-NEXT:    mr r30, r3
 ; BE-P9-PRIV-NEXT:    lwz r3, 12(r3)
 ; BE-P9-PRIV-NEXT:    stw r3, 116(r1)
@@ -2800,28 +2810,29 @@
 ; BE-P9-PRIV-NEXT:    bl callee2
 ; BE-P9-PRIV-NEXT:    nop
 ; BE-P9-PRIV-NEXT:    lwz r4, 16(r30)
-; BE-P9-PRIV-NEXT:    ld r30, 128(r1) # 8-byte Folded Reload
 ; BE-P9-PRIV-NEXT:    add r3, r4, r3
+; BE-P9-PRIV-NEXT:    b .LBB2_3
+; BE-P9-PRIV-NEXT:  .LBB2_2:
+; BE-P9-PRIV-NEXT:    li r3, 0
+; BE-P9-PRIV-NEXT:  .LBB2_3: # %return
+; BE-P9-PRIV-NEXT:    ld r30, 128(r1) # 8-byte Folded Reload
+; BE-P9-PRIV-NEXT:    clrldi r3, r3, 32
 ; BE-P9-PRIV-NEXT:    addi r1, r1, 144
 ; BE-P9-PRIV-NEXT:    ld r0, 16(r1)
-; BE-P9-PRIV-NEXT:    clrldi r3, r3, 32
 ; BE-P9-PRIV-NEXT:    mtlr r0
 ; BE-P9-PRIV-NEXT:    hashchkp r0, -24(r1)
 ; BE-P9-PRIV-NEXT:    blr
-; BE-P9-PRIV-NEXT:  .LBB2_2:
-; BE-P9-PRIV-NEXT:    li r3, 0
-; BE-P9-PRIV-NEXT:    blr
 ;
 ; BE-P8-PRIV-LABEL: shrinkwrap:
 ; BE-P8-PRIV:       # %bb.0: # %entry
-; BE-P8-PRIV-NEXT:    cmpldi r3, 0
-; BE-P8-PRIV-NEXT:    beq cr0, .LBB2_2
-; BE-P8-PRIV-NEXT:  # %bb.1: # %if.end
 ; BE-P8-PRIV-NEXT:    mflr r0
 ; BE-P8-PRIV-NEXT:    std r0, 16(r1)
 ; BE-P8-PRIV-NEXT:    hashstp r0, -24(r1)
 ; BE-P8-PRIV-NEXT:    stdu r1, -144(r1)
+; BE-P8-PRIV-NEXT:    cmpldi r3, 0
 ; BE-P8-PRIV-NEXT:    std r30, 128(r1) # 8-byte Folded Spill
+; BE-P8-PRIV-NEXT:    beq cr0, .LBB2_2
+; BE-P8-PRIV-NEXT:  # %bb.1: # %if.end
 ; BE-P8-PRIV-NEXT:    mr r30, r3
 ; BE-P8-PRIV-NEXT:    lwz r3, 12(r3)
 ; BE-P8-PRIV-NEXT:    stw r3, 116(r1)
@@ -2829,17 +2840,18 @@
 ; BE-P8-PRIV-NEXT:    bl callee2
 ; BE-P8-PRIV-NEXT:    nop
 ; BE-P8-PRIV-NEXT:    lwz r4, 16(r30)
-; BE-P8-PRIV-NEXT:    ld r30, 128(r1) # 8-byte Folded Reload
 ; BE-P8-PRIV-NEXT:    add r3, r4, r3
+; BE-P8-PRIV-NEXT:    b .LBB2_3
+; BE-P8-PRIV-NEXT:  .LBB2_2:
+; BE-P8-PRIV-NEXT:    li r3, 0
+; BE-P8-PRIV-NEXT:  .LBB2_3: # %return
+; BE-P8-PRIV-NEXT:    ld r30, 128(r1) # 8-byte Folded Reload
+; BE-P8-PRIV-NEXT:    clrldi r3, r3, 32
 ; BE-P8-PRIV-NEXT:    addi r1, r1, 144
 ; BE-P8-PRIV-NEXT:    ld r0, 16(r1)
-; BE-P8-PRIV-NEXT:    clrldi r3, r3, 32
 ; BE-P8-PRIV-NEXT:    hashchkp r0, -24(r1)
 ; BE-P8-PRIV-NEXT:    mtlr r0
 ; BE-P8-PRIV-NEXT:    blr
-; BE-P8-PRIV-NEXT:  .LBB2_2:
-; BE-P8-PRIV-NEXT:    li r3, 0
-; BE-P8-PRIV-NEXT:    blr
 entry:
   %local = alloca i32, align 4
   %tobool.not = icmp eq i32* %in, null
diff --git a/llvm/test/CodeGen/PowerPC/pr43527.ll b/llvm/test/CodeGen/PowerPC/pr43527.ll
--- a/llvm/test/CodeGen/PowerPC/pr43527.ll
+++ b/llvm/test/CodeGen/PowerPC/pr43527.ll
@@ -5,10 +5,6 @@
 define dso_local void @test(i64 %arg, i64 %arg1) {
 ; CHECK-LABEL: test:
 ; CHECK:       # %bb.0: # %bb
-; CHECK-NEXT:    bc 4, 4*cr5+lt, .LBB0_5
-; CHECK-NEXT:  # %bb.1: # %bb3
-; CHECK-NEXT:    bc 12, 4*cr5+lt, .LBB0_6
-; CHECK-NEXT:  # %bb.2: # %bb4
 ; CHECK-NEXT:    mflr r0
 ; CHECK-NEXT:    .cfi_def_cfa_offset 64
 ; CHECK-NEXT:    .cfi_offset lr, 16
@@ -18,6 +14,10 @@
 ; CHECK-NEXT:    std r30, -16(r1) # 8-byte Folded Spill
 ; CHECK-NEXT:    std r0, 16(r1)
 ; CHECK-NEXT:    stdu r1, -64(r1)
+; CHECK-NEXT:    bc 4, 4*cr5+lt, .LBB0_5
+; CHECK-NEXT:  # %bb.1: # %bb3
+; CHECK-NEXT:    bc 12, 4*cr5+lt, .LBB0_6
+; CHECK-NEXT:  # %bb.2: # %bb4
 ; CHECK-NEXT:    sub r30, r4, r3
 ; CHECK-NEXT:    li r29, -4
 ; CHECK-NEXT:    .p2align 5
diff --git a/llvm/test/CodeGen/PowerPC/remove-redundant-load-imm.ll b/llvm/test/CodeGen/PowerPC/remove-redundant-load-imm.ll
--- a/llvm/test/CodeGen/PowerPC/remove-redundant-load-imm.ll
+++ b/llvm/test/CodeGen/PowerPC/remove-redundant-load-imm.ll
@@ -13,9 +13,9 @@
 ; PPC64LE-LABEL: redundancy_on_ppc_only:
 ; PPC64LE:       # %bb.0: # %bb
 ; PPC64LE-NEXT:    mflr 0
-; PPC64LE-NEXT:    andi. 3, 3, 1
 ; PPC64LE-NEXT:    std 0, 16(1)
 ; PPC64LE-NEXT:    stdu 1, -32(1)
+; PPC64LE-NEXT:    andi. 3, 3, 1
 ; PPC64LE-NEXT:    li 3, 1
 ; PPC64LE-NEXT:    li 4, 0
 ; PPC64LE-NEXT:    iselgt 3, 3, 4
diff --git a/llvm/test/CodeGen/PowerPC/xray-conditional-return.ll b/llvm/test/CodeGen/PowerPC/xray-conditional-return.ll
--- a/llvm/test/CodeGen/PowerPC/xray-conditional-return.ll
+++ b/llvm/test/CodeGen/PowerPC/xray-conditional-return.ll
@@ -1,34 +1,46 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
 ; RUN: llc -filetype=asm -o - -mtriple=powerpc64le-unknown-linux-gnu < %s | FileCheck %s
 
 define void @Foo(i32 signext %a, i32 signext %b) #0 {
-; CHECK-LABEL: @Foo
-; CHECK:   cmpw
-; CHECK-NEXT:   ble 0, [[LABEL:\.[a-zA-Z0-9]+]]
-; CHECK-NEXT:   .p2align  3
-; CHECK-NEXT: {{\.[a-zA-Z0-9]+}}:
-; CHECK-NEXT:   blr
-; CHECK-NEXT:   nop
-; CHECK-NEXT:   std 0
-; CHECK-NEXT:   mflr 0
-; CHECK-NEXT:   bl __xray_FunctionExit
-; CHECK-NEXT:   nop
-; CHECK-NEXT:   mtlr 0
-; CHECK-NEXT:   blr
-; CHECK-NEXT: [[LABEL]]:
+; CHECK-LABEL: Foo:
+; CHECK:       # %bb.0: # %entry
+; CHECK-NEXT:  .Ltmp0:
+; CHECK-NEXT:    b .Ltmp1
+; CHECK-NEXT:    nop
+; CHECK-NEXT:    std 0, -8(1)
+; CHECK-NEXT:    mflr 0
+; CHECK-NEXT:    bl __xray_FunctionEntry
+; CHECK-NEXT:    nop
+; CHECK-NEXT:    mtlr 0
+; CHECK-NEXT:  .Ltmp1:
+; CHECK-NEXT:    mflr 0
+; CHECK-NEXT:    std 0, 16(1)
+; CHECK-NEXT:    stdu 1, -32(1)
+; CHECK-NEXT:    .cfi_def_cfa_offset 32
+; CHECK-NEXT:    .cfi_offset lr, 16
+; CHECK-NEXT:    cmpw 3, 4
+; CHECK-NEXT:    bgt 0, .LBB0_2
+; CHECK-NEXT:  # %bb.1: # %if.end
+; CHECK-NEXT:    bl Bar
+; CHECK-NEXT:    nop
+; CHECK-NEXT:  .LBB0_2: # %return
+; CHECK-NEXT:    addi 1, 1, 32
+; CHECK-NEXT:    ld 0, 16(1)
+; CHECK-NEXT:    mtlr 0
+; CHECK-NEXT:    .p2align 3
+; CHECK-NEXT:  .Ltmp2:
+; CHECK-NEXT:    blr
+; CHECK-NEXT:    nop
+; CHECK-NEXT:    std 0, -8(1)
+; CHECK-NEXT:    mflr 0
+; CHECK-NEXT:    bl __xray_FunctionExit
+; CHECK-NEXT:    nop
+; CHECK-NEXT:    mtlr 0
+; CHECK-NEXT:    blr
 entry:
   %cmp = icmp sgt i32 %a, %b
   br i1 %cmp, label %return, label %if.end
 
-; CHECK:      .p2align  3
-; CHECK-NEXT: {{\.[a-zA-Z0-9]+}}:
-; CHECK-NEXT:   blr
-; CHECK-NEXT:   nop
-; CHECK-NEXT:   std 0
-; CHECK-NEXT:   mflr 0
-; CHECK-NEXT:   bl __xray_FunctionExit
-; CHECK-NEXT:   nop
-; CHECK-NEXT:   mtlr 0
-; CHECK-NEXT:   blr
 if.end:
   tail call void @Bar()
   br label %return
@@ -38,34 +50,45 @@
 }
 
 define void @Foo2(i32 signext %a, i32 signext %b) #0 {
-; CHECK-LABEL: @Foo2
-; CHECK:   cmpw
-; CHECK-NEXT:   bge 0, [[LABEL:\.[a-zA-Z0-9]+]]
-; CHECK-NEXT:   .p2align  3
-; CHECK-NEXT: {{\.[a-zA-Z0-9]+}}:
-; CHECK-NEXT:   blr
-; CHECK-NEXT:   nop
-; CHECK-NEXT:   std 0
-; CHECK-NEXT:   mflr 0
-; CHECK-NEXT:   bl __xray_FunctionExit
-; CHECK-NEXT:   nop
-; CHECK-NEXT:   mtlr 0
-; CHECK-NEXT:   blr
-; CHECK-NEXT: [[LABEL]]:
+; CHECK-LABEL: Foo2:
+; CHECK:       # %bb.0: # %entry
+; CHECK-NEXT:  .Ltmp5:
+; CHECK-NEXT:    b .Ltmp6
+; CHECK-NEXT:    nop
+; CHECK-NEXT:    std 0, -8(1)
+; CHECK-NEXT:    mflr 0
+; CHECK-NEXT:    bl __xray_FunctionEntry
+; CHECK-NEXT:    nop
+; CHECK-NEXT:    mtlr 0
+; CHECK-NEXT:  .Ltmp6:
+; CHECK-NEXT:    mflr 0
+; CHECK-NEXT:    std 0, 16(1)
+; CHECK-NEXT:    stdu 1, -32(1)
+; CHECK-NEXT:    .cfi_def_cfa_offset 32
+; CHECK-NEXT:    .cfi_offset lr, 16
+; CHECK-NEXT:    cmpw 3, 4
+; CHECK-NEXT:    blt 0, .LBB1_2
+; CHECK-NEXT:  # %bb.1: # %if.end
+; CHECK-NEXT:    bl Bar
+; CHECK-NEXT:    nop
+; CHECK-NEXT:  .LBB1_2: # %return
+; CHECK-NEXT:    addi 1, 1, 32
+; CHECK-NEXT:    ld 0, 16(1)
+; CHECK-NEXT:    mtlr 0
+; CHECK-NEXT:    .p2align 3
+; CHECK-NEXT:  .Ltmp7:
+; CHECK-NEXT:    blr
+; CHECK-NEXT:    nop
+; CHECK-NEXT:    std 0, -8(1)
+; CHECK-NEXT:    mflr 0
+; CHECK-NEXT:    bl __xray_FunctionExit
+; CHECK-NEXT:    nop
+; CHECK-NEXT:    mtlr 0
+; CHECK-NEXT:    blr
 entry:
   %cmp = icmp slt i32 %a, %b
   br i1 %cmp, label %return, label %if.end
 
-; CHECK:      .p2align  3
-; CHECK-NEXT: {{\.[a-zA-Z0-9]+}}:
-; CHECK-NEXT:   blr
-; CHECK-NEXT:   nop
-; CHECK-NEXT:   std 0
-; CHECK-NEXT:   mflr 0
-; CHECK-NEXT:   bl __xray_FunctionExit
-; CHECK-NEXT:   nop
-; CHECK-NEXT:   mtlr 0
-; CHECK-NEXT:   blr
 if.end:
   tail call void @Bar()
   br label %return