diff --git a/compiler-rt/cmake/Modules/CompilerRTUtils.cmake b/compiler-rt/cmake/Modules/CompilerRTUtils.cmake
--- a/compiler-rt/cmake/Modules/CompilerRTUtils.cmake
+++ b/compiler-rt/cmake/Modules/CompilerRTUtils.cmake
@@ -110,6 +110,16 @@
   cmake_pop_check_state()
 endfunction()
 
+macro(test_arm_smp_support arch cflags_var)
+  if (${arch} STREQUAL "arm")
+    try_compile(HAS_${arch}_SMP ${CMAKE_BINARY_DIR}
+	    ${ARM_SMP_CHECK_SRC} COMPILE_DEFINITIONS "${CMAKE_C_FLAGS} ${_TARGET_${arch}_CFLAGS}")
+    if (HAS_${arch}_SMP)
+      list(APPEND ${cflags_var} -DCOMPILER_RT_HAS_SMP_SUPPORT)
+    endif()
+  endif()
+endmacro()
+
 # test_target_arch(<arch> <def> <target flags...>)
 # Checks if architecture is supported: runs host compiler with provided
 # flags to verify that:
diff --git a/compiler-rt/cmake/config-ix.cmake b/compiler-rt/cmake/config-ix.cmake
--- a/compiler-rt/cmake/config-ix.cmake
+++ b/compiler-rt/cmake/config-ix.cmake
@@ -201,6 +201,11 @@
 set(SIMPLE_SOURCE ${CMAKE_BINARY_DIR}${CMAKE_FILES_DIRECTORY}/simple.cc)
 file(WRITE ${SIMPLE_SOURCE} "#include <stdlib.h>\n#include <stdio.h>\nint main() { printf(\"hello, world\"); }\n")
 
+# Check if we have SMP support for particular ARM architecture
+# If not use stubs instead of real atomic operations - see sync-ops.h
+set(ARM_SMP_CHECK_SRC ${CMAKE_BINARY_DIR}${CMAKE_FILES_DIRECTORY}/arm-barrier.cc)
+file(WRITE ${ARM_SMP_CHECK_SRC} "int main() { asm(\"dmb\"); return 0; }")
+
 # Detect whether the current target platform is 32-bit or 64-bit, and setup
 # the correct commandline flags needed to attempt to target 32-bit and 64-bit.
 # AVR and MSP430 are omitted since they have 16-bit pointers.
diff --git a/compiler-rt/lib/builtins/CMakeLists.txt b/compiler-rt/lib/builtins/CMakeLists.txt
--- a/compiler-rt/lib/builtins/CMakeLists.txt
+++ b/compiler-rt/lib/builtins/CMakeLists.txt
@@ -752,6 +752,7 @@
         list(APPEND BUILTIN_CFLAGS_${arch} -fomit-frame-pointer -DCOMPILER_RT_ARMHF_TARGET)
       endif()
 
+      test_arm_smp_support(${arch} BUILTIN_CFLAGS_${arch})
       # For RISCV32, we must force enable int128 for compiling long
       # double routines.
       if("${arch}" STREQUAL "riscv32")
diff --git a/compiler-rt/lib/builtins/arm/sync-ops.h b/compiler-rt/lib/builtins/arm/sync-ops.h
--- a/compiler-rt/lib/builtins/arm/sync-ops.h
+++ b/compiler-rt/lib/builtins/arm/sync-ops.h
@@ -16,12 +16,14 @@
 
 #if __ARM_ARCH >= 7
 #define DMB dmb
-#elif __ARM_ARCH >= 6
+#elif __ARM_ARCH >= 5
 #define DMB mcr p15, #0, r0, c7, c10, #5
 #else
 #error DMB is only supported on ARMv6+
 #endif
 
+#ifdef COMPILER_RT_HAS_SMP_SUPPORT
+
 #define SYNC_OP_4(op)                                                          \
   .p2align 2;                                                                  \
   .syntax unified;                                                             \
@@ -51,6 +53,42 @@
   DMB;                                                                         \
   pop { r4, r5, r6, pc }
 
+#else
+
+#define SYNC_OP_4(op)                                                          \
+  .p2align 2;                                                                  \
+  DEFINE_COMPILERRT_FUNCTION(__sync_fetch_and_##op)                            \
+  DMB;                                                                         \
+  mov r12, r0;                                                                 \
+  LOCAL_LABEL(tryatomic_##op) : ldr r0, [r12];                                 \
+  op(r2, r0, r1);                                                              \
+  swp r3, r2, [r12];                                                           \
+  cmp r3, r0;                                                                  \
+  bne LOCAL_LABEL(tryatomic_##op);                                             \
+  DMB;                                                                         \
+  bx lr
+
+#define SYNC_OP_8(op)                                                          \
+  .p2align 2;                                                                  \
+  DEFINE_COMPILERRT_FUNCTION(__sync_fetch_and_##op)                            \
+  push{r4, r5, r6, lr};                                                        \
+  DMB;                                                                         \
+  mov r12, r0;                                                                 \
+  LOCAL_LABEL(tryatomic_##op) : ldm r12, {r0, r1};                             \
+  op(r4, r5, r0, r1, r2, r3);                                                  \
+  swp r6, r4, [r12];                                                           \
+  cmp r6, r0;                                                                  \
+  bne LOCAL_LABEL(tryatomic_##op);                                             \
+  add r12, r12, #4;                                                            \
+  swp r6, r5, [r12];                                                           \
+  sub r12, r12, #4;                                                            \
+  cmp r6, r1;                                                                  \
+  bne LOCAL_LABEL(tryatomic_##op);                                             \
+  DMB;                                                                         \
+  pop { r4, r5, r6, pc }
+
+#endif
+
 #define MINMAX_4(rD, rN, rM, cmp_kind)                                         \
   cmp rN, rM;                                                                  \
   mov rD, rM;                                                                  \