Index: include/llvm/Support/TargetParser.h =================================================================== --- include/llvm/Support/TargetParser.h +++ include/llvm/Support/TargetParser.h @@ -15,8 +15,10 @@ #ifndef LLVM_SUPPORT_TARGETPARSER_H #define LLVM_SUPPORT_TARGETPARSER_H -// FIXME: vector is used because that's what clang uses for subtarget feature -// lists, but SmallVector would probably be better +// FIXME: These includes are necessary for the target feature selection. +// Once those methods move to TargetTuple, they should be removed. +// Vector is used because that's what clang uses for subtarget feature +// lists, but SmallVector would probably be better. #include namespace llvm { @@ -180,18 +182,25 @@ static unsigned getFPUVersion(unsigned FPUKind); static unsigned getFPUNeonSupportLevel(unsigned FPUKind); static unsigned getFPURestriction(unsigned FPUKind); - static unsigned getDefaultFPU(StringRef CPU); - // FIXME: This should be moved to TargetTuple once it exists - static bool getFPUFeatures(unsigned FPUKind, - std::vector &Features); - static bool getHWDivFeatures(unsigned HWDivKind, - std::vector &Features); + static unsigned getArchBaseExtensions(unsigned ArchKind); + static unsigned getArchAttr(unsigned ArchKind); static const char * getArchName(unsigned ArchKind); - static unsigned getArchAttr(unsigned ArchKind); static const char * getCPUAttr(unsigned ArchKind); static const char * getSubArch(unsigned ArchKind); static const char * getArchExtName(unsigned ArchExtKind); static const char * getHWDivName(unsigned HWDivKind); + + // FIXME: These should be moved to TargetTuple once it exists + static bool getFPUFeatures(unsigned FPUKind, + std::vector &Features); + static bool getHWDivFeatures(unsigned HWDivKind, + std::vector &Features); + static bool getExtensionFeatures(unsigned ExtensionKind, + std::vector &Features); + + // Information by Name + static unsigned getDefaultFPU(StringRef CPU); + static unsigned getCPUDefaultExtensions(StringRef CPU); static const char * getDefaultCPU(StringRef Arch); // Parser Index: lib/Support/TargetParser.cpp =================================================================== --- lib/Support/TargetParser.cpp +++ lib/Support/TargetParser.cpp @@ -71,43 +71,82 @@ ARM::ArchKind ID; const char *CPUAttr; // CPU class in build attributes. const char *SubArch; // Sub-Arch name. + unsigned ArchBaseExtensions; ARMBuildAttrs::CPUArch ArchAttr; // Arch ID in build attributes. } ARCHNames[] = { - { "invalid", ARM::AK_INVALID, nullptr, nullptr, ARMBuildAttrs::CPUArch::Pre_v4 }, - { "armv2", ARM::AK_ARMV2, "2", "v2", ARMBuildAttrs::CPUArch::Pre_v4 }, - { "armv2a", ARM::AK_ARMV2A, "2A", "v2a", ARMBuildAttrs::CPUArch::Pre_v4 }, - { "armv3", ARM::AK_ARMV3, "3", "v3", ARMBuildAttrs::CPUArch::Pre_v4 }, - { "armv3m", ARM::AK_ARMV3M, "3M", "v3m", ARMBuildAttrs::CPUArch::Pre_v4 }, - { "armv4", ARM::AK_ARMV4, "4", "v4", ARMBuildAttrs::CPUArch::v4 }, - { "armv4t", ARM::AK_ARMV4T, "4T", "v4t", ARMBuildAttrs::CPUArch::v4T }, - { "armv5t", ARM::AK_ARMV5T, "5T", "v5", ARMBuildAttrs::CPUArch::v5T }, - { "armv5te", ARM::AK_ARMV5TE, "5TE", "v5e", ARMBuildAttrs::CPUArch::v5TE }, - { "armv5tej", ARM::AK_ARMV5TEJ, "5TEJ", "v5e", ARMBuildAttrs::CPUArch::v5TEJ }, - { "armv6", ARM::AK_ARMV6, "6", "v6", ARMBuildAttrs::CPUArch::v6 }, - { "armv6k", ARM::AK_ARMV6K, "6K", "v6k", ARMBuildAttrs::CPUArch::v6K }, - { "armv6t2", ARM::AK_ARMV6T2, "6T2", "v6t2", ARMBuildAttrs::CPUArch::v6T2 }, - { "armv6z", ARM::AK_ARMV6Z, "6Z", "v6z", ARMBuildAttrs::CPUArch::v6KZ }, - { "armv6zk", ARM::AK_ARMV6ZK, "6ZK", "v6zk", ARMBuildAttrs::CPUArch::v6KZ }, - { "armv6-m", ARM::AK_ARMV6M, "6-M", "v6m", ARMBuildAttrs::CPUArch::v6_M }, - { "armv6s-m", ARM::AK_ARMV6SM, "6S-M", "v6sm", ARMBuildAttrs::CPUArch::v6S_M }, - { "armv7-a", ARM::AK_ARMV7A, "7-A", "v7", ARMBuildAttrs::CPUArch::v7 }, - { "armv7-r", ARM::AK_ARMV7R, "7-R", "v7r", ARMBuildAttrs::CPUArch::v7 }, - { "armv7-m", ARM::AK_ARMV7M, "7-M", "v7m", ARMBuildAttrs::CPUArch::v7 }, - { "armv7e-m", ARM::AK_ARMV7EM, "7E-M", "v7em", ARMBuildAttrs::CPUArch::v7E_M }, - { "armv8-a", ARM::AK_ARMV8A, "8-A", "v8", ARMBuildAttrs::CPUArch::v8 }, - { "armv8.1-a", ARM::AK_ARMV8_1A, "8.1-A", "v8.1a", ARMBuildAttrs::CPUArch::v8 }, + { "invalid", ARM::AK_INVALID, nullptr, nullptr, ARM::AEK_NONE, + ARMBuildAttrs::CPUArch::Pre_v4 }, + { "armv2", ARM::AK_ARMV2, "2", "v2", ARM::AEK_NONE, + ARMBuildAttrs::CPUArch::Pre_v4 }, + { "armv2a", ARM::AK_ARMV2A, "2A", "v2a", ARM::AEK_NONE, + ARMBuildAttrs::CPUArch::Pre_v4 }, + { "armv3", ARM::AK_ARMV3, "3", "v3", ARM::AEK_NONE, + ARMBuildAttrs::CPUArch::Pre_v4 }, + { "armv3m", ARM::AK_ARMV3M, "3M", "v3m", ARM::AEK_NONE, + ARMBuildAttrs::CPUArch::Pre_v4 }, + { "armv4", ARM::AK_ARMV4, "4", "v4", ARM::AEK_NONE, + ARMBuildAttrs::CPUArch::v4 }, + { "armv4t", ARM::AK_ARMV4T, "4T", "v4t", ARM::AEK_NONE, + ARMBuildAttrs::CPUArch::v4T }, + { "armv5t", ARM::AK_ARMV5T, "5T", "v5", ARM::AEK_NONE, + ARMBuildAttrs::CPUArch::v5T }, + { "armv5te", ARM::AK_ARMV5TE, "5TE", "v5e", ARM::AEK_NONE, + ARMBuildAttrs::CPUArch::v5TE }, + { "armv5tej", ARM::AK_ARMV5TEJ, "5TEJ", "v5e", ARM::AEK_NONE, + ARMBuildAttrs::CPUArch::v5TEJ }, + { "armv6", ARM::AK_ARMV6, "6", "v6", ARM::AEK_NONE, + ARMBuildAttrs::CPUArch::v6 }, + { "armv6k", ARM::AK_ARMV6K, "6K", "v6k", ARM::AEK_NONE, + ARMBuildAttrs::CPUArch::v6K }, + { "armv6t2", ARM::AK_ARMV6T2, "6T2", "v6t2", ARM::AEK_NONE, + ARMBuildAttrs::CPUArch::v6T2 }, + { "armv6z", ARM::AK_ARMV6Z, "6Z", "v6z", ARM::AEK_SEC, + ARMBuildAttrs::CPUArch::v6KZ }, + { "armv6zk", ARM::AK_ARMV6ZK, "6ZK", "v6zk", ARM::AEK_SEC, + ARMBuildAttrs::CPUArch::v6KZ }, + { "armv6-m", ARM::AK_ARMV6M, "6-M", "v6m", ARM::AEK_NONE, + ARMBuildAttrs::CPUArch::v6_M }, + { "armv6s-m", ARM::AK_ARMV6SM, "6S-M", "v6sm", ARM::AEK_NONE, + ARMBuildAttrs::CPUArch::v6S_M }, + { "armv7-a", ARM::AK_ARMV7A, "7-A", "v7", ARM::AEK_NONE, + ARMBuildAttrs::CPUArch::v7 }, + { "armv7-r", ARM::AK_ARMV7R, "7-R", "v7r", ARM::AEK_HWDIV, + ARMBuildAttrs::CPUArch::v7 }, + { "armv7-m", ARM::AK_ARMV7M, "7-M", "v7m", ARM::AEK_HWDIV, + ARMBuildAttrs::CPUArch::v7 }, + { "armv7e-m", ARM::AK_ARMV7EM, "7E-M", "v7em", ARM::AEK_HWDIV, + ARMBuildAttrs::CPUArch::v7E_M }, + { "armv8-a", ARM::AK_ARMV8A, "8-A", "v8", + (ARM::AEK_SEC | ARM::AEK_MP | ARM::AEK_VIRT | + ARM::AEK_HWDIVARM | ARM::AEK_HWDIV), + ARMBuildAttrs::CPUArch::v8 }, + { "armv8.1-a", ARM::AK_ARMV8_1A, "8.1-A", "v8.1a", + (ARM::AEK_SEC | ARM::AEK_MP | ARM::AEK_VIRT | + ARM::AEK_HWDIVARM | ARM::AEK_HWDIV), + ARMBuildAttrs::CPUArch::v8 }, // Non-standard Arch names. - { "iwmmxt", ARM::AK_IWMMXT, "iwmmxt", "", ARMBuildAttrs::CPUArch::v5TE }, - { "iwmmxt2", ARM::AK_IWMMXT2, "iwmmxt2", "", ARMBuildAttrs::CPUArch::v5TE }, - { "xscale", ARM::AK_XSCALE, "xscale", "", ARMBuildAttrs::CPUArch::v5TE }, - { "armv5", ARM::AK_ARMV5, "5T", "v5", ARMBuildAttrs::CPUArch::v5T }, - { "armv5e", ARM::AK_ARMV5E, "5TE", "v5e", ARMBuildAttrs::CPUArch::v5TE }, - { "armv6j", ARM::AK_ARMV6J, "6J", "v6", ARMBuildAttrs::CPUArch::v6 }, - { "armv6hl", ARM::AK_ARMV6HL, "6-M", "v6hl", ARMBuildAttrs::CPUArch::v6_M }, - { "armv7", ARM::AK_ARMV7, "7", "v7", ARMBuildAttrs::CPUArch::v7 }, - { "armv7l", ARM::AK_ARMV7L, "7-L", "v7l", ARMBuildAttrs::CPUArch::v7 }, - { "armv7hl", ARM::AK_ARMV7HL, "7-L", "v7hl", ARMBuildAttrs::CPUArch::v7 }, - { "armv7s", ARM::AK_ARMV7S, "7-S", "v7s", ARMBuildAttrs::CPUArch::v7 } + { "iwmmxt", ARM::AK_IWMMXT, "iwmmxt", "", ARM::AEK_NONE, + ARMBuildAttrs::CPUArch::v5TE }, + { "iwmmxt2", ARM::AK_IWMMXT2, "iwmmxt2", "", ARM::AEK_NONE, + ARMBuildAttrs::CPUArch::v5TE }, + { "xscale", ARM::AK_XSCALE, "xscale", "", ARM::AEK_NONE, + ARMBuildAttrs::CPUArch::v5TE }, + { "armv5", ARM::AK_ARMV5, "5T", "v5", ARM::AEK_NONE, + ARMBuildAttrs::CPUArch::v5T }, + { "armv5e", ARM::AK_ARMV5E, "5TE", "v5e", ARM::AEK_NONE, + ARMBuildAttrs::CPUArch::v5TE }, + { "armv6j", ARM::AK_ARMV6J, "6J", "v6", ARM::AEK_NONE, + ARMBuildAttrs::CPUArch::v6 }, + { "armv6hl", ARM::AK_ARMV6HL, "6-M", "v6hl", ARM::AEK_NONE, + ARMBuildAttrs::CPUArch::v6_M }, + { "armv7", ARM::AK_ARMV7, "7", "v7", ARM::AEK_NONE, + ARMBuildAttrs::CPUArch::v7 }, + { "armv7l", ARM::AK_ARMV7L, "7-L", "v7l", ARM::AEK_NONE, + ARMBuildAttrs::CPUArch::v7 }, + { "armv7hl", ARM::AK_ARMV7HL, "7-L", "v7hl", ARM::AEK_NONE, + ARMBuildAttrs::CPUArch::v7 }, + { "armv7s", ARM::AK_ARMV7S, "7-S", "v7s", ARM::AEK_NONE, + ARMBuildAttrs::CPUArch::v7 } }; // List of Arch Extension names. // FIXME: TableGen this. @@ -125,6 +164,7 @@ { "simd", ARM::AEK_SIMD }, { "sec", ARM::AEK_SEC }, { "virt", ARM::AEK_VIRT }, + // Unsupported and unused arch extensions { "os", ARM::AEK_OS }, { "iwmmxt", ARM::AEK_IWMMXT }, { "iwmmxt2", ARM::AEK_IWMMXT2 }, @@ -153,93 +193,119 @@ const char *Name; ARM::ArchKind ArchID; ARM::FPUKind DefaultFPU; + unsigned DefaultExtensions; bool Default; // is $Name the default CPU for $ArchID ? } CPUNames[] = { - { "arm2", ARM::AK_ARMV2, ARM::FK_NONE, true }, - { "arm3", ARM::AK_ARMV2A, ARM::FK_NONE, true }, - { "arm6", ARM::AK_ARMV3, ARM::FK_NONE, true }, - { "arm7m", ARM::AK_ARMV3M, ARM::FK_NONE, true }, - { "arm8", ARM::AK_ARMV4, ARM::FK_NONE, false }, - { "arm810", ARM::AK_ARMV4, ARM::FK_NONE, false }, - { "strongarm", ARM::AK_ARMV4, ARM::FK_NONE, true }, - { "strongarm110", ARM::AK_ARMV4, ARM::FK_NONE, false }, - { "strongarm1100", ARM::AK_ARMV4, ARM::FK_NONE, false }, - { "strongarm1110", ARM::AK_ARMV4, ARM::FK_NONE, false }, - { "arm7tdmi", ARM::AK_ARMV4T, ARM::FK_NONE, true }, - { "arm7tdmi-s", ARM::AK_ARMV4T, ARM::FK_NONE, false }, - { "arm710t", ARM::AK_ARMV4T, ARM::FK_NONE, false }, - { "arm720t", ARM::AK_ARMV4T, ARM::FK_NONE, false }, - { "arm9", ARM::AK_ARMV4T, ARM::FK_NONE, false }, - { "arm9tdmi", ARM::AK_ARMV4T, ARM::FK_NONE, false }, - { "arm920", ARM::AK_ARMV4T, ARM::FK_NONE, false }, - { "arm920t", ARM::AK_ARMV4T, ARM::FK_NONE, false }, - { "arm922t", ARM::AK_ARMV4T, ARM::FK_NONE, false }, - { "arm9312", ARM::AK_ARMV4T, ARM::FK_NONE, false }, - { "arm940t", ARM::AK_ARMV4T, ARM::FK_NONE, false }, - { "ep9312", ARM::AK_ARMV4T, ARM::FK_NONE, false }, - { "arm10tdmi", ARM::AK_ARMV5T, ARM::FK_NONE, true }, - { "arm1020t", ARM::AK_ARMV5T, ARM::FK_NONE, false }, - { "arm9e", ARM::AK_ARMV5TE, ARM::FK_NONE, false }, - { "arm946e-s", ARM::AK_ARMV5TE, ARM::FK_NONE, false }, - { "arm966e-s", ARM::AK_ARMV5TE, ARM::FK_NONE, false }, - { "arm968e-s", ARM::AK_ARMV5TE, ARM::FK_NONE, false }, - { "arm10e", ARM::AK_ARMV5TE, ARM::FK_NONE, false }, - { "arm1020e", ARM::AK_ARMV5TE, ARM::FK_NONE, false }, - { "arm1022e", ARM::AK_ARMV5TE, ARM::FK_NONE, true }, - { "iwmmxt", ARM::AK_ARMV5TE, ARM::FK_NONE, false }, - { "xscale", ARM::AK_ARMV5TE, ARM::FK_NONE, false }, - { "arm926ej-s", ARM::AK_ARMV5TEJ, ARM::FK_NONE, true }, - { "arm1136jf-s", ARM::AK_ARMV6, ARM::FK_VFPV2, true }, - { "arm1176j-s", ARM::AK_ARMV6K, ARM::FK_NONE, false }, - { "arm1176jz-s", ARM::AK_ARMV6K, ARM::FK_NONE, false }, - { "mpcore", ARM::AK_ARMV6K, ARM::FK_VFPV2, false }, - { "mpcorenovfp", ARM::AK_ARMV6K, ARM::FK_NONE, false }, - { "arm1176jzf-s", ARM::AK_ARMV6K, ARM::FK_VFPV2, true }, - { "arm1176jzf-s", ARM::AK_ARMV6Z, ARM::FK_VFPV2, true }, - { "arm1176jzf-s", ARM::AK_ARMV6ZK, ARM::FK_VFPV2, true }, - { "arm1156t2-s", ARM::AK_ARMV6T2, ARM::FK_NONE, true }, - { "arm1156t2f-s", ARM::AK_ARMV6T2, ARM::FK_VFPV2, false }, - { "cortex-m0", ARM::AK_ARMV6M, ARM::FK_NONE, true }, - { "cortex-m0plus", ARM::AK_ARMV6M, ARM::FK_NONE, false }, - { "cortex-m1", ARM::AK_ARMV6M, ARM::FK_NONE, false }, - { "sc000", ARM::AK_ARMV6M, ARM::FK_NONE, false }, - { "cortex-a5", ARM::AK_ARMV7A, ARM::FK_NEON_VFPV4, false }, - { "cortex-a7", ARM::AK_ARMV7A, ARM::FK_NEON_VFPV4, false }, - { "cortex-a8", ARM::AK_ARMV7A, ARM::FK_NEON, true }, - { "cortex-a9", ARM::AK_ARMV7A, ARM::FK_NEON_FP16, false }, - { "cortex-a12", ARM::AK_ARMV7A, ARM::FK_NEON_VFPV4, false }, - { "cortex-a15", ARM::AK_ARMV7A, ARM::FK_NEON_VFPV4, false }, - { "cortex-a17", ARM::AK_ARMV7A, ARM::FK_NEON_VFPV4, false }, - { "krait", ARM::AK_ARMV7A, ARM::FK_NEON_VFPV4, false }, - { "cortex-r4", ARM::AK_ARMV7R, ARM::FK_NONE, true }, - { "cortex-r4f", ARM::AK_ARMV7R, ARM::FK_VFPV3_D16, false }, - { "cortex-r5", ARM::AK_ARMV7R, ARM::FK_VFPV3_D16, false }, - { "cortex-r7", ARM::AK_ARMV7R, ARM::FK_VFPV3_D16_FP16, false }, - { "sc300", ARM::AK_ARMV7M, ARM::FK_NONE, false }, - { "cortex-m3", ARM::AK_ARMV7M, ARM::FK_NONE, true }, - { "cortex-m4", ARM::AK_ARMV7EM, ARM::FK_FPV4_SP_D16, true }, - { "cortex-m7", ARM::AK_ARMV7EM, ARM::FK_FPV5_D16, false }, - { "cortex-a53", ARM::AK_ARMV8A, ARM::FK_CRYPTO_NEON_FP_ARMV8, true }, - { "cortex-a57", ARM::AK_ARMV8A, ARM::FK_CRYPTO_NEON_FP_ARMV8, false }, - { "cortex-a72", ARM::AK_ARMV8A, ARM::FK_CRYPTO_NEON_FP_ARMV8, false }, - { "cyclone", ARM::AK_ARMV8A, ARM::FK_CRYPTO_NEON_FP_ARMV8, false }, - { "generic", ARM::AK_ARMV8_1A, ARM::FK_NEON_FP_ARMV8, true }, + { "arm2", ARM::AK_ARMV2, ARM::FK_NONE, ARM::AEK_NONE, true }, + { "arm3", ARM::AK_ARMV2A, ARM::FK_NONE, ARM::AEK_NONE, true }, + { "arm6", ARM::AK_ARMV3, ARM::FK_NONE, ARM::AEK_NONE, true }, + { "arm7m", ARM::AK_ARMV3M, ARM::FK_NONE, ARM::AEK_NONE, true }, + { "arm8", ARM::AK_ARMV4, ARM::FK_NONE, ARM::AEK_NONE, false }, + { "arm810", ARM::AK_ARMV4, ARM::FK_NONE, ARM::AEK_NONE, false }, + { "strongarm", ARM::AK_ARMV4, ARM::FK_NONE, ARM::AEK_NONE, true }, + { "strongarm110", ARM::AK_ARMV4, ARM::FK_NONE, ARM::AEK_NONE, false }, + { "strongarm1100", ARM::AK_ARMV4, ARM::FK_NONE, ARM::AEK_NONE, false }, + { "strongarm1110", ARM::AK_ARMV4, ARM::FK_NONE, ARM::AEK_NONE, false }, + { "arm7tdmi", ARM::AK_ARMV4T, ARM::FK_NONE, ARM::AEK_NONE, true }, + { "arm7tdmi-s", ARM::AK_ARMV4T, ARM::FK_NONE, ARM::AEK_NONE, false }, + { "arm710t", ARM::AK_ARMV4T, ARM::FK_NONE, ARM::AEK_NONE, false }, + { "arm720t", ARM::AK_ARMV4T, ARM::FK_NONE, ARM::AEK_NONE, false }, + { "arm9", ARM::AK_ARMV4T, ARM::FK_NONE, ARM::AEK_NONE, false }, + { "arm9tdmi", ARM::AK_ARMV4T, ARM::FK_NONE, ARM::AEK_NONE, false }, + { "arm920", ARM::AK_ARMV4T, ARM::FK_NONE, ARM::AEK_NONE, false }, + { "arm920t", ARM::AK_ARMV4T, ARM::FK_NONE, ARM::AEK_NONE, false }, + { "arm922t", ARM::AK_ARMV4T, ARM::FK_NONE, ARM::AEK_NONE, false }, + { "arm9312", ARM::AK_ARMV4T, ARM::FK_NONE, ARM::AEK_NONE, false }, + { "arm940t", ARM::AK_ARMV4T, ARM::FK_NONE, ARM::AEK_NONE, false }, + { "ep9312", ARM::AK_ARMV4T, ARM::FK_NONE, ARM::AEK_NONE, false }, + { "arm10tdmi", ARM::AK_ARMV5T, ARM::FK_NONE, ARM::AEK_NONE, true }, + { "arm1020t", ARM::AK_ARMV5T, ARM::FK_NONE, ARM::AEK_NONE, false }, + { "arm9e", ARM::AK_ARMV5TE, ARM::FK_NONE, ARM::AEK_NONE, false }, + { "arm946e-s", ARM::AK_ARMV5TE, ARM::FK_NONE, ARM::AEK_NONE, false }, + { "arm966e-s", ARM::AK_ARMV5TE, ARM::FK_NONE, ARM::AEK_NONE, false }, + { "arm968e-s", ARM::AK_ARMV5TE, ARM::FK_NONE, ARM::AEK_NONE, false }, + { "arm10e", ARM::AK_ARMV5TE, ARM::FK_NONE, ARM::AEK_NONE, false }, + { "arm1020e", ARM::AK_ARMV5TE, ARM::FK_NONE, ARM::AEK_NONE, false }, + { "arm1022e", ARM::AK_ARMV5TE, ARM::FK_NONE, ARM::AEK_NONE, true }, + { "iwmmxt", ARM::AK_ARMV5TE, ARM::FK_NONE, ARM::AEK_NONE, false }, + { "xscale", ARM::AK_ARMV5TE, ARM::FK_NONE, ARM::AEK_NONE, false }, + { "arm926ej-s", ARM::AK_ARMV5TEJ, ARM::FK_NONE, ARM::AEK_NONE, true }, + { "arm1136jf-s", ARM::AK_ARMV6, ARM::FK_VFPV2, ARM::AEK_NONE, true }, + { "arm1176j-s", ARM::AK_ARMV6K, ARM::FK_NONE, ARM::AEK_NONE, false }, + { "arm1176jz-s", ARM::AK_ARMV6K, ARM::FK_NONE, ARM::AEK_NONE, false }, + { "mpcore", ARM::AK_ARMV6K, ARM::FK_VFPV2, ARM::AEK_NONE, false }, + { "mpcorenovfp", ARM::AK_ARMV6K, ARM::FK_NONE, ARM::AEK_NONE, false }, + { "arm1176jzf-s", ARM::AK_ARMV6K, ARM::FK_VFPV2, ARM::AEK_NONE, true }, + { "arm1176jzf-s", ARM::AK_ARMV6Z, ARM::FK_VFPV2, ARM::AEK_NONE, true }, + { "arm1176jzf-s", ARM::AK_ARMV6ZK, ARM::FK_VFPV2, ARM::AEK_NONE, true }, + { "arm1156t2-s", ARM::AK_ARMV6T2, ARM::FK_NONE, ARM::AEK_NONE, true }, + { "arm1156t2f-s", ARM::AK_ARMV6T2, ARM::FK_VFPV2, ARM::AEK_NONE, false }, + { "cortex-m0", ARM::AK_ARMV6M, ARM::FK_NONE, ARM::AEK_NONE, true }, + { "cortex-m0plus", ARM::AK_ARMV6M, ARM::FK_NONE, ARM::AEK_NONE, false }, + { "cortex-m1", ARM::AK_ARMV6M, ARM::FK_NONE, ARM::AEK_NONE, false }, + { "sc000", ARM::AK_ARMV6M, ARM::FK_NONE, ARM::AEK_NONE, false }, + { "cortex-a5", ARM::AK_ARMV7A, ARM::FK_NEON_VFPV4, + (ARM::AEK_SEC | ARM::AEK_MP), false }, + { "cortex-a7", ARM::AK_ARMV7A, ARM::FK_NEON_VFPV4, + (ARM::AEK_SEC | ARM::AEK_MP | ARM::AEK_VIRT | + ARM::AEK_HWDIVARM | ARM::AEK_HWDIV), false }, + { "cortex-a8", ARM::AK_ARMV7A, ARM::FK_NEON, ARM::AEK_SEC, true }, + { "cortex-a9", ARM::AK_ARMV7A, ARM::FK_NEON_FP16, + (ARM::AEK_SEC | ARM::AEK_MP), false }, + { "cortex-a12", ARM::AK_ARMV7A, ARM::FK_NEON_VFPV4, + (ARM::AEK_SEC | ARM::AEK_MP | ARM::AEK_VIRT | + ARM::AEK_HWDIVARM | ARM::AEK_HWDIV), false }, + { "cortex-a15", ARM::AK_ARMV7A, ARM::FK_NEON_VFPV4, + (ARM::AEK_SEC | ARM::AEK_MP | ARM::AEK_VIRT | + ARM::AEK_HWDIVARM | ARM::AEK_HWDIV), false }, + { "cortex-a17", ARM::AK_ARMV7A, ARM::FK_NEON_VFPV4, + (ARM::AEK_SEC | ARM::AEK_MP | ARM::AEK_VIRT | + ARM::AEK_HWDIVARM | ARM::AEK_HWDIV), false }, + { "krait", ARM::AK_ARMV7A, ARM::FK_NEON_VFPV4, + (ARM::AEK_HWDIVARM | ARM::AEK_HWDIV), false }, + { "cortex-r4", ARM::AK_ARMV7R, ARM::FK_NONE, ARM::AEK_NONE, true }, + { "cortex-r4f", ARM::AK_ARMV7R, ARM::FK_VFPV3_D16, ARM::AEK_NONE, false }, + { "cortex-r5", ARM::AK_ARMV7R, ARM::FK_NONE, + (ARM::AEK_MP | ARM::AEK_HWDIVARM), false }, + { "cortex-r5f", ARM::AK_ARMV7R, ARM::FK_VFPV3_D16, + (ARM::AEK_MP | ARM::AEK_HWDIVARM), false }, + { "cortex-r7", ARM::AK_ARMV7R, ARM::FK_VFPV3_D16_FP16, + (ARM::AEK_MP | ARM::AEK_HWDIVARM), false }, + { "sc300", ARM::AK_ARMV7M, ARM::FK_NONE, ARM::AEK_NONE, false }, + { "cortex-m3", ARM::AK_ARMV7M, ARM::FK_NONE, ARM::AEK_NONE, true }, + { "cortex-m4", ARM::AK_ARMV7EM, ARM::FK_NONE, ARM::AEK_NONE, true }, + { "cortex-m4f", ARM::AK_ARMV7EM, ARM::FK_FPV4_SP_D16, + ARM::AEK_NONE, false }, + { "cortex-m7", ARM::AK_ARMV7EM, ARM::FK_FPV5_D16, + ARM::AEK_NONE, false }, + { "cortex-a53", ARM::AK_ARMV8A, ARM::FK_CRYPTO_NEON_FP_ARMV8, + ARM::AEK_CRC, true }, + { "cortex-a57", ARM::AK_ARMV8A, ARM::FK_CRYPTO_NEON_FP_ARMV8, + ARM::AEK_CRC, false }, + { "cortex-a72", ARM::AK_ARMV8A, ARM::FK_CRYPTO_NEON_FP_ARMV8, + ARM::AEK_CRC, false }, + { "cyclone", ARM::AK_ARMV8A, ARM::FK_CRYPTO_NEON_FP_ARMV8, + ARM::AEK_CRC, false }, + { "generic", ARM::AK_ARMV8_1A, ARM::FK_NEON_FP_ARMV8, + ARM::AEK_NONE, true }, // Non-standard Arch names. - { "iwmmxt", ARM::AK_IWMMXT, ARM::FK_NONE, true }, - { "xscale", ARM::AK_XSCALE, ARM::FK_NONE, true }, - { "arm10tdmi", ARM::AK_ARMV5, ARM::FK_NONE, true }, - { "arm1022e", ARM::AK_ARMV5E, ARM::FK_NONE, true }, - { "arm1136j-s", ARM::AK_ARMV6J, ARM::FK_NONE, true }, - { "arm1136jz-s", ARM::AK_ARMV6J, ARM::FK_NONE, false }, - { "cortex-m0", ARM::AK_ARMV6SM, ARM::FK_NONE, true }, - { "arm1176jzf-s", ARM::AK_ARMV6HL, ARM::FK_VFPV2, true }, - { "cortex-a8", ARM::AK_ARMV7, ARM::FK_NEON, true }, - { "cortex-a8", ARM::AK_ARMV7L, ARM::FK_NEON, true }, - { "cortex-a8", ARM::AK_ARMV7HL, ARM::FK_NEON, true }, - { "cortex-m4", ARM::AK_ARMV7EM, ARM::FK_NONE, true }, - { "swift", ARM::AK_ARMV7S, ARM::FK_NEON_VFPV4, true }, + { "iwmmxt", ARM::AK_IWMMXT, ARM::FK_NONE, ARM::AEK_NONE, true }, + { "xscale", ARM::AK_XSCALE, ARM::FK_NONE, ARM::AEK_NONE, true }, + { "arm10tdmi", ARM::AK_ARMV5, ARM::FK_NONE, ARM::AEK_NONE, true }, + { "arm1022e", ARM::AK_ARMV5E, ARM::FK_NONE, ARM::AEK_NONE, true }, + { "arm1136j-s", ARM::AK_ARMV6J, ARM::FK_NONE, ARM::AEK_NONE, true }, + { "arm1136jz-s", ARM::AK_ARMV6J, ARM::FK_NONE, ARM::AEK_NONE, false }, + { "cortex-m0", ARM::AK_ARMV6SM, ARM::FK_NONE, ARM::AEK_NONE, true }, + { "arm1176jzf-s", ARM::AK_ARMV6HL, ARM::FK_VFPV2, ARM::AEK_NONE, true }, + { "cortex-a8", ARM::AK_ARMV7, ARM::FK_NEON, ARM::AEK_SEC, true }, + { "cortex-a8", ARM::AK_ARMV7L, ARM::FK_NEON, ARM::AEK_SEC, true }, + { "cortex-a8", ARM::AK_ARMV7HL, ARM::FK_NEON, ARM::AEK_SEC, true }, + { "cortex-m4", ARM::AK_ARMV7EM, ARM::FK_NONE, ARM::AEK_NONE, true }, + { "swift", ARM::AK_ARMV7S, ARM::FK_NEON_VFPV4, + (ARM::AEK_HWDIVARM | ARM::AEK_HWDIV), true }, // Invalid CPU - { "invalid", ARM::AK_INVALID, ARM::FK_INVALID, true } + { "invalid", ARM::AK_INVALID, ARM::FK_INVALID, + ARM::AEK_INVALID, true } }; } // namespace @@ -280,13 +346,21 @@ return ARM::FK_INVALID; } +unsigned ARMTargetParser::getCPUDefaultExtensions(StringRef CPU) { + for (const auto C : CPUNames) { + if (CPU == C.Name) + return (ARCHNames[C.ArchID].ArchBaseExtensions | C.DefaultExtensions); + } + return ARM::AEK_INVALID; +} + bool ARMTargetParser::getHWDivFeatures(unsigned HWDivKind, std::vector &Features) { if (HWDivKind == ARM::AEK_INVALID) return false; - if (HWDivKind & ARM::AEK_HWDIVARM) + if (HWDivKind & ARM::AEK_HWDIVARM) Features.push_back("+hwdiv-arm"); else Features.push_back("-hwdiv-arm"); @@ -365,6 +439,7 @@ // crypto includes neon, so we handle this similarly to FPU version. switch (FPUNames[FPUKind].NeonSupport) { case ARM::NS_Crypto: + Features.push_back("+neon"); Features.push_back("+crypto"); break; case ARM::NS_Neon: @@ -380,6 +455,19 @@ return true; } +bool ARMTargetParser::getExtensionFeatures(unsigned ExtensionKind, + std::vector &Features) { + if (ExtensionKind == ARM::AEK_INVALID) + return false; + + if (ExtensionKind & ARM::AEK_CRC) + Features.push_back("+crc"); + else + Features.push_back("-crc"); + + return true; +} + const char *ARMTargetParser::getArchName(unsigned ArchKind) { if (ArchKind >= ARM::AK_LAST) return nullptr; @@ -398,6 +486,12 @@ return ARCHNames[ArchKind].SubArch; } +unsigned ARMTargetParser::getArchBaseExtensions(unsigned ArchKind) { + if (ArchKind >= ARM::AK_LAST) + return ARM::AEK_INVALID; + return ARCHNames[ArchKind].ArchBaseExtensions; +} + unsigned ARMTargetParser::getArchAttr(unsigned ArchKind) { if (ArchKind >= ARM::AK_LAST) return ARMBuildAttrs::CPUArch::Pre_v4;