diff --git a/llvm/lib/Target/VE/VVPInstrPatternsVec.td b/llvm/lib/Target/VE/VVPInstrPatternsVec.td
--- a/llvm/lib/Target/VE/VVPInstrPatternsVec.td
+++ b/llvm/lib/Target/VE/VVPInstrPatternsVec.td
@@ -17,54 +17,76 @@
 //===----------------------------------------------------------------------===//
 include "VVPInstrInfo.td"
 
-multiclass VectorBinaryArith<
-    SDPatternOperator OpNode,
-    ValueType ScalarVT, ValueType DataVT, ValueType MaskVT,
-    string OpBaseName> {
-  // No mask.
+multiclass Binary_rv<SDPatternOperator OpNode,
+    ValueType ScalarVT, ValueType DataVT,
+    ValueType MaskVT, string OpBaseName> {
+  // Masked with select, broadcast.
+  // TODO
+
+  // Unmasked, broadcast.
   def : Pat<(OpNode
-                (any_broadcast ScalarVT:$sx),
-                DataVT:$vy, (MaskVT true_mask), i32:$avl),
+                (any_broadcast ScalarVT:$sx), DataVT:$vy,
+                (MaskVT true_mask),
+                i32:$avl),
             (!cast<Instruction>(OpBaseName#"rvl")
                 ScalarVT:$sx, $vy, $avl)>;
-  def : Pat<(OpNode DataVT:$vx, DataVT:$vy, (MaskVT true_mask), i32:$avl),
+  // Masked, broadcast.
+  def : Pat<(OpNode
+                (any_broadcast ScalarVT:$sx), DataVT:$vy,
+                MaskVT:$mask,
+                i32:$avl),
+            (!cast<Instruction>(OpBaseName#"rvml")
+                ScalarVT:$sx, $vy, $mask, $avl)>;
+}
+
+multiclass Binary_vv<SDPatternOperator OpNode,
+    ValueType DataVT,
+    ValueType MaskVT, string OpBaseName> {
+  // Masked with select.
+  // TODO
+
+  // Unmasked.
+  def : Pat<(OpNode
+                DataVT:$vx, DataVT:$vy,
+                (MaskVT true_mask),
+                i32:$avl),
             (!cast<Instruction>(OpBaseName#"vvl")
                 $vx, $vy, $avl)>;
 
-  // Mask.
+  // Masked.
   def : Pat<(OpNode
-                (any_broadcast ScalarVT:$sx),
-                DataVT:$vy, MaskVT:$mask, i32:$avl),
-            (!cast<Instruction>(OpBaseName#"rvml")
-                ScalarVT:$sx, $vy, $mask, $avl)>;
-  def : Pat<(OpNode DataVT:$vx, DataVT:$vy, MaskVT:$mask, i32:$avl),
+                DataVT:$vx, DataVT:$vy,
+                MaskVT:$mask,
+                i32:$avl),
             (!cast<Instruction>(OpBaseName#"vvml")
                 $vx, $vy, $mask, $avl)>;
+}
 
-  // TODO We do not specify patterns for the immediate variants here. There
-  // will be an immediate folding pass that takes care of switching to the
-  // immediate variant where applicable.
-
-  // TODO Fold vvp_select into passthru.
+multiclass Binary_rv_vv<
+    SDPatternOperator OpNode,
+    ValueType ScalarVT, ValueType DataVT, ValueType MaskVT,
+    string OpBaseName> {
+  defm : Binary_rv<OpNode, ScalarVT, DataVT, MaskVT, OpBaseName>;
+  defm : Binary_vv<OpNode, DataVT, MaskVT, OpBaseName>;
 }
 
 // Expand both 64bit and 32 bit variant (256 elements)
-multiclass VectorBinaryArith_ShortLong<
+multiclass Binary_rv_vv_ShortLong<
     SDPatternOperator OpNode,
     ValueType LongScalarVT, ValueType LongDataVT, string LongOpBaseName,
     ValueType ShortScalarVT, ValueType ShortDataVT, string ShortOpBaseName> {
-  defm : VectorBinaryArith<OpNode,
-                           LongScalarVT, LongDataVT, v256i1,
-                           LongOpBaseName>;
-  defm : VectorBinaryArith<OpNode,
-                           ShortScalarVT, ShortDataVT, v256i1,
-                           ShortOpBaseName>;
+  defm : Binary_rv_vv<OpNode,
+                      LongScalarVT, LongDataVT, v256i1,
+                      LongOpBaseName>;
+  defm : Binary_rv_vv<OpNode,
+                      ShortScalarVT, ShortDataVT, v256i1,
+                      ShortOpBaseName>;
 }
 
 
-defm : VectorBinaryArith_ShortLong<c_vvp_add,
-                                   i64, v256i64, "VADDSL",
-                                   i32, v256i32, "VADDSWSX">;
-defm : VectorBinaryArith_ShortLong<c_vvp_and,
-                                   i64, v256i64, "VAND",
-                                   i32, v256i32, "PVANDLO">;
+defm : Binary_rv_vv_ShortLong<c_vvp_add,
+                              i64, v256i64, "VADDSL",
+                              i32, v256i32, "VADDSWSX">;
+defm : Binary_rv_vv_ShortLong<c_vvp_and,
+                              i64, v256i64, "VAND",
+                              i32, v256i32, "PVANDLO">;