diff --git a/clang/test/CodeGen/SystemZ/builtins-systemz-zvector-constrained.c b/clang/test/CodeGen/SystemZ/builtins-systemz-zvector-constrained.c --- a/clang/test/CodeGen/SystemZ/builtins-systemz-zvector-constrained.c +++ b/clang/test/CodeGen/SystemZ/builtins-systemz-zvector-constrained.c @@ -41,7 +41,7 @@ // CHECK-ASM: vlvgg vd = vec_insert_and_zero(cptrd); - // CHECK: [[ZVEC:%[^ ]+]] = insertelement <2 x double> , double {{.*}}, i32 0 + // CHECK: [[ZVEC:%[^ ]+]] = insertelement <2 x double> , double {{.*}}, i64 0 // CHECK-ASM: vllezg vd = vec_revb(vd); diff --git a/clang/test/CodeGen/SystemZ/builtins-systemz-zvector.c b/clang/test/CodeGen/SystemZ/builtins-systemz-zvector.c --- a/clang/test/CodeGen/SystemZ/builtins-systemz-zvector.c +++ b/clang/test/CodeGen/SystemZ/builtins-systemz-zvector.c @@ -194,31 +194,31 @@ // CHECK-ASM: vlvgg vsc = vec_insert_and_zero(cptrsc); - // CHECK: insertelement <16 x i8> , i8 %{{.*}}, i32 7 + // CHECK: insertelement <16 x i8> , i8 %{{.*}}, i64 7 // CHECK-ASM: vllezb vuc = vec_insert_and_zero(cptruc); - // CHECK: insertelement <16 x i8> , i8 %{{.*}}, i32 7 + // CHECK: insertelement <16 x i8> , i8 %{{.*}}, i64 7 // CHECK-ASM: vllezb vss = vec_insert_and_zero(cptrss); - // CHECK: insertelement <8 x i16> , i16 %{{.*}}, i32 3 + // CHECK: insertelement <8 x i16> , i16 %{{.*}}, i64 3 // CHECK-ASM: vllezh vus = vec_insert_and_zero(cptrus); - // CHECK: insertelement <8 x i16> , i16 %{{.*}}, i32 3 + // CHECK: insertelement <8 x i16> , i16 %{{.*}}, i64 3 // CHECK-ASM: vllezh vsi = vec_insert_and_zero(cptrsi); - // CHECK: insertelement <4 x i32> , i32 %{{.*}}, i32 1 + // CHECK: insertelement <4 x i32> , i32 %{{.*}}, i64 1 // CHECK-ASM: vllezf vui = vec_insert_and_zero(cptrui); - // CHECK: insertelement <4 x i32> , i32 %{{.*}}, i32 1 + // CHECK: insertelement <4 x i32> , i32 %{{.*}}, i64 1 // CHECK-ASM: vllezf vsl = vec_insert_and_zero(cptrsl); - // CHECK: insertelement <2 x i64> , i64 %{{.*}}, i32 0 + // CHECK: insertelement <2 x i64> , i64 %{{.*}}, i64 0 // CHECK-ASM: vllezg vul = vec_insert_and_zero(cptrul); - // CHECK: insertelement <2 x i64> , i64 %{{.*}}, i32 0 + // CHECK: insertelement <2 x i64> , i64 %{{.*}}, i64 0 // CHECK-ASM: vllezg vd = vec_insert_and_zero(cptrd); - // CHECK: insertelement <2 x double> , double %{{.*}}, i32 0 + // CHECK: insertelement <2 x double> , double %{{.*}}, i64 0 // CHECK-ASM: vllezg vsc = vec_perm(vsc, vsc, vuc); diff --git a/clang/test/CodeGen/SystemZ/builtins-systemz-zvector2-constrained.c b/clang/test/CodeGen/SystemZ/builtins-systemz-zvector2-constrained.c --- a/clang/test/CodeGen/SystemZ/builtins-systemz-zvector2-constrained.c +++ b/clang/test/CodeGen/SystemZ/builtins-systemz-zvector2-constrained.c @@ -36,13 +36,13 @@ vector double vd2; f = vec_extract(vf, 0); - // CHECK: extractelement <4 x float> %{{.*}}, i32 0 + // CHECK: extractelement <4 x float> %{{.*}}, i64 0 // CHECK-ASM: vstef f = vec_extract(vf, idx); // CHECK: extractelement <4 x float> %{{.*}}, i32 %{{.*}} // CHECK-ASM: vlgvf d = vec_extract(vd, 0); - // CHECK: extractelement <2 x double> %{{.*}}, i32 0 + // CHECK: extractelement <2 x double> %{{.*}}, i64 0 // CHECK-ASM: vsteg d = vec_extract(vd, idx); // CHECK: extractelement <2 x double> %{{.*}}, i32 %{{.*}} @@ -50,20 +50,20 @@ vf2 = vf; vf = vec_insert(f, vf2, 0); - // CHECK: insertelement <4 x float> %{{.*}}, float %{{.*}}, i32 0 + // CHECK: insertelement <4 x float> %{{.*}}, float %{{.*}}, i64 0 // CHECK-ASM: vlef vf = vec_insert(0.0f, vf, 1); - // CHECK: insertelement <4 x float> %{{.*}}, float 0.000000e+00, i32 1 + // CHECK: insertelement <4 x float> %{{.*}}, float 0.000000e+00, i64 1 // CHECK-ASM: vleif %{{.*}}, 0, 1 vf = vec_insert(f, vf, idx); // CHECK: insertelement <4 x float> %{{.*}}, float %{{.*}}, i32 %{{.*}} // CHECK-ASM: vlvgf vd2 = vd; vd = vec_insert(d, vd2, 0); - // CHECK: insertelement <2 x double> %{{.*}}, double %{{.*}}, i32 0 + // CHECK: insertelement <2 x double> %{{.*}}, double %{{.*}}, i64 0 // CHECK-ASM: vleg vd = vec_insert(0.0, vd, 1); - // CHECK: insertelement <2 x double> %{{.*}}, double 0.000000e+00, i32 1 + // CHECK: insertelement <2 x double> %{{.*}}, double 0.000000e+00, i64 1 // CHECK-ASM: vleig %{{.*}}, 0, 1 vd = vec_insert(d, vd, idx); // CHECK: insertelement <2 x double> %{{.*}}, double %{{.*}}, i32 %{{.*}} @@ -77,10 +77,10 @@ // CHECK-ASM: vlvgg vf = vec_insert_and_zero(cptrf); - // CHECK: insertelement <4 x float> , float {{.*}}, i32 1 + // CHECK: insertelement <4 x float> , float {{.*}}, i64 1 // CHECK-ASM: vllezf vd = vec_insert_and_zero(cptrd); - // CHECK: insertelement <2 x double> , double %{{.*}}, i32 0 + // CHECK: insertelement <2 x double> , double %{{.*}}, i64 0 // CHECK-ASM: vllezg vf = vec_revb(vf); diff --git a/clang/test/CodeGen/SystemZ/builtins-systemz-zvector2.c b/clang/test/CodeGen/SystemZ/builtins-systemz-zvector2.c --- a/clang/test/CodeGen/SystemZ/builtins-systemz-zvector2.c +++ b/clang/test/CodeGen/SystemZ/builtins-systemz-zvector2.c @@ -68,13 +68,13 @@ vector double vd2; f = vec_extract(vf, 0); - // CHECK: extractelement <4 x float> %{{.*}}, i32 0 + // CHECK: extractelement <4 x float> %{{.*}}, i64 0 // CHECK-ASM: vstef f = vec_extract(vf, idx); // CHECK: extractelement <4 x float> %{{.*}}, i32 %{{.*}} // CHECK-ASM: vlgvf d = vec_extract(vd, 0); - // CHECK: extractelement <2 x double> %{{.*}}, i32 0 + // CHECK: extractelement <2 x double> %{{.*}}, i64 0 // CHECK-ASM: vsteg d = vec_extract(vd, idx); // CHECK: extractelement <2 x double> %{{.*}}, i32 %{{.*}} @@ -82,20 +82,20 @@ vf2 = vf; vf = vec_insert(f, vf2, 0); - // CHECK: insertelement <4 x float> %{{.*}}, float %{{.*}}, i32 0 + // CHECK: insertelement <4 x float> %{{.*}}, float %{{.*}}, i64 0 // CHECK-ASM: vlef vf = vec_insert(0.0f, vf, 1); - // CHECK: insertelement <4 x float> %{{.*}}, float 0.000000e+00, i32 1 + // CHECK: insertelement <4 x float> %{{.*}}, float 0.000000e+00, i64 1 // CHECK-ASM: vleif %{{.*}}, 0, 1 vf = vec_insert(f, vf, idx); // CHECK: insertelement <4 x float> %{{.*}}, float %{{.*}}, i32 %{{.*}} // CHECK-ASM: vlvgf vd2 = vd; vd = vec_insert(d, vd2, 0); - // CHECK: insertelement <2 x double> %{{.*}}, double %{{.*}}, i32 0 + // CHECK: insertelement <2 x double> %{{.*}}, double %{{.*}}, i64 0 // CHECK-ASM: vleg vd = vec_insert(0.0, vd, 1); - // CHECK: insertelement <2 x double> %{{.*}}, double 0.000000e+00, i32 1 + // CHECK: insertelement <2 x double> %{{.*}}, double 0.000000e+00, i64 1 // CHECK-ASM: vleig %{{.*}}, 0, 1 vd = vec_insert(d, vd, idx); // CHECK: insertelement <2 x double> %{{.*}}, double %{{.*}}, i32 %{{.*}} @@ -109,10 +109,10 @@ // CHECK-ASM: vlvgg vf = vec_insert_and_zero(cptrf); - // CHECK: insertelement <4 x float> , float %{{.*}}, i32 1 + // CHECK: insertelement <4 x float> , float %{{.*}}, i64 1 // CHECK-ASM: vllezf vd = vec_insert_and_zero(cptrd); - // CHECK: insertelement <2 x double> , double %{{.*}}, i32 0 + // CHECK: insertelement <2 x double> , double %{{.*}}, i64 0 // CHECK-ASM: vllezg vf = vec_perm(vf, vf, vuc); diff --git a/clang/test/CodeGen/X86/avx-shuffle-builtins.c b/clang/test/CodeGen/X86/avx-shuffle-builtins.c --- a/clang/test/CodeGen/X86/avx-shuffle-builtins.c +++ b/clang/test/CodeGen/X86/avx-shuffle-builtins.c @@ -66,7 +66,7 @@ __m128 test_mm_broadcast_ss(float const *__a) { // CHECK-LABEL: test_mm_broadcast_ss - // CHECK: insertelement <4 x float> {{.*}}, i32 0 + // CHECK: insertelement <4 x float> {{.*}}, i64 0 // CHECK: shufflevector <4 x float> {{.*}}, <4 x float> poison, <4 x i32> zeroinitializer return _mm_broadcast_ss(__a); } @@ -74,7 +74,7 @@ __m256d test_mm256_broadcast_sd(double const *__a) { // CHECK-LABEL: test_mm256_broadcast_sd - // CHECK: insertelement <4 x double> {{.*}}, i32 0 + // CHECK: insertelement <4 x double> {{.*}}, i64 0 // CHECK: shufflevector <4 x double> {{.*}}, <4 x double> poison, <4 x i32> zeroinitializer return _mm256_broadcast_sd(__a); } @@ -82,7 +82,7 @@ __m256 test_mm256_broadcast_ss(float const *__a) { // CHECK-LABEL: test_mm256_broadcast_ss - // CHECK: insertelement <8 x float> {{.*}}, i32 0 + // CHECK: insertelement <8 x float> {{.*}}, i64 0 // CHECK: shufflevector <8 x float> {{.*}}, <8 x float> poison, <8 x i32> zeroinitializer return _mm256_broadcast_ss(__a); } diff --git a/clang/test/CodeGen/aarch64-bf16-ldst-intrinsics.c b/clang/test/CodeGen/aarch64-bf16-ldst-intrinsics.c --- a/clang/test/CodeGen/aarch64-bf16-ldst-intrinsics.c +++ b/clang/test/CodeGen/aarch64-bf16-ldst-intrinsics.c @@ -1,3 +1,4 @@ +// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // RUN: %clang_cc1 -triple aarch64-arm-none-eabi -target-feature +neon -target-feature +bf16 \ // RUN: -O2 -emit-llvm %s -o - | FileCheck %s --check-prefixes=CHECK,CHECK64 // RUN: %clang_cc1 -triple armv8.6a-arm-none-eabi -target-feature +neon -target-feature +bf16 -mfloat-abi hard \ @@ -7,411 +8,1335 @@ #include "arm_neon.h" +// CHECK-LABEL: @test_vld1_bf16( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = bitcast bfloat* [[PTR:%.*]] to <4 x bfloat>* +// CHECK-NEXT: [[TMP1:%.*]] = load <4 x bfloat>, <4 x bfloat>* [[TMP0]], align 2 +// CHECK-NEXT: ret <4 x bfloat> [[TMP1]] +// bfloat16x4_t test_vld1_bf16(bfloat16_t const *ptr) { return vld1_bf16(ptr); } -// CHECK-LABEL: test_vld1_bf16 -// CHECK64: %1 = load <4 x bfloat>, <4 x bfloat>* %0 -// CHECK64-NEXT: ret <4 x bfloat> %1 -// CHECK32: %1 = load <4 x bfloat>, <4 x bfloat>* %0, align 2 -// CHECK32-NEXT: ret <4 x bfloat> %1 +// CHECK-LABEL: @test_vld1q_bf16( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = bitcast bfloat* [[PTR:%.*]] to <8 x bfloat>* +// CHECK-NEXT: [[TMP1:%.*]] = load <8 x bfloat>, <8 x bfloat>* [[TMP0]], align 2 +// CHECK-NEXT: ret <8 x bfloat> [[TMP1]] +// bfloat16x8_t test_vld1q_bf16(bfloat16_t const *ptr) { return vld1q_bf16(ptr); } -// CHECK-LABEL: test_vld1q_bf16 -// CHECK64: %1 = load <8 x bfloat>, <8 x bfloat>* %0 -// CHECK64-NEXT: ret <8 x bfloat> %1 -// CHECK32: %1 = load <8 x bfloat>, <8 x bfloat>* %0, align 2 -// CHECK32-NEXT: ret <8 x bfloat> %1 +// CHECK-LABEL: @test_vld1_lane_bf16( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = load bfloat, bfloat* [[PTR:%.*]], align 2 +// CHECK-NEXT: [[VLD1_LANE:%.*]] = insertelement <4 x bfloat> [[SRC:%.*]], bfloat [[TMP0]], i64 0 +// CHECK-NEXT: ret <4 x bfloat> [[VLD1_LANE]] +// bfloat16x4_t test_vld1_lane_bf16(bfloat16_t const *ptr, bfloat16x4_t src) { return vld1_lane_bf16(ptr, src, 0); } -// CHECK-LABEL: test_vld1_lane_bf16 -// CHECK64: %0 = load bfloat, bfloat* %ptr, align 2 -// CHECK64-NEXT: %vld1_lane = insertelement <4 x bfloat> %src, bfloat %0, i32 0 -// CHECK64-NEXT: ret <4 x bfloat> %vld1_lane -// CHECK32: %0 = load bfloat, bfloat* %ptr, align 2 -// CHECK32-NEXT: %vld1_lane = insertelement <4 x bfloat> %src, bfloat %0, i32 0 -// CHECK32-NEXT: ret <4 x bfloat> %vld1_lane +// CHECK-LABEL: @test_vld1q_lane_bf16( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = load bfloat, bfloat* [[PTR:%.*]], align 2 +// CHECK-NEXT: [[VLD1_LANE:%.*]] = insertelement <8 x bfloat> [[SRC:%.*]], bfloat [[TMP0]], i64 7 +// CHECK-NEXT: ret <8 x bfloat> [[VLD1_LANE]] +// bfloat16x8_t test_vld1q_lane_bf16(bfloat16_t const *ptr, bfloat16x8_t src) { return vld1q_lane_bf16(ptr, src, 7); } -// CHECK-LABEL: test_vld1q_lane_bf16 -// CHECK64: %0 = load bfloat, bfloat* %ptr, align 2 -// CHECK64-NEXT: %vld1_lane = insertelement <8 x bfloat> %src, bfloat %0, i32 7 -// CHECK64-NEXT: ret <8 x bfloat> %vld1_lane -// CHECK32: %0 = load bfloat, bfloat* %ptr, align 2 -// CHECK32-NEXT: %vld1_lane = insertelement <8 x bfloat> %src, bfloat %0, i32 7 -// CHECK32-NEXT: ret <8 x bfloat> %vld1_lane +// CHECK-LABEL: @test_vld1_dup_bf16( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = load bfloat, bfloat* [[PTR:%.*]], align 2 +// CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x bfloat> undef, bfloat [[TMP0]], i64 0 +// CHECK-NEXT: [[LANE:%.*]] = shufflevector <4 x bfloat> [[TMP1]], <4 x bfloat> poison, <4 x i32> zeroinitializer +// CHECK-NEXT: ret <4 x bfloat> [[LANE]] +// bfloat16x4_t test_vld1_dup_bf16(bfloat16_t const *ptr) { return vld1_dup_bf16(ptr); } -// CHECK-LABEL: test_vld1_dup_bf16 -// CHECK64: %0 = load bfloat, bfloat* %ptr, align 2 -// CHECK64-NEXT: %1 = insertelement <4 x bfloat> undef, bfloat %0, i32 0 -// CHECK64-NEXT: %lane = shufflevector <4 x bfloat> %1, <4 x bfloat> poison, <4 x i32> zeroinitializer -// CHECK64-NEXT: ret <4 x bfloat> %lane -// CHECK32: %0 = load bfloat, bfloat* %ptr, align 2 -// CHECK32-NEXT: %1 = insertelement <4 x bfloat> undef, bfloat %0, i32 0 -// CHECK32-NEXT: %lane = shufflevector <4 x bfloat> %1, <4 x bfloat> poison, <4 x i32> zeroinitializer -// CHECK32-NEXT: ret <4 x bfloat> %lane +// CHECK64-LABEL: @test_vld1_bf16_x2( +// CHECK64-NEXT: entry: +// CHECK64-NEXT: [[VLD1XN:%.*]] = tail call { <4 x bfloat>, <4 x bfloat> } @llvm.aarch64.neon.ld1x2.v4bf16.p0bf16(bfloat* [[PTR:%.*]]) +// CHECK64-NEXT: [[VLD1XN_FCA_0_EXTRACT:%.*]] = extractvalue { <4 x bfloat>, <4 x bfloat> } [[VLD1XN]], 0 +// CHECK64-NEXT: [[VLD1XN_FCA_1_EXTRACT:%.*]] = extractvalue { <4 x bfloat>, <4 x bfloat> } [[VLD1XN]], 1 +// CHECK64-NEXT: [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_BFLOAT16X4X2_T:%.*]] undef, <4 x bfloat> [[VLD1XN_FCA_0_EXTRACT]], 0, 0 +// CHECK64-NEXT: [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_BFLOAT16X4X2_T]] [[DOTFCA_0_0_INSERT]], <4 x bfloat> [[VLD1XN_FCA_1_EXTRACT]], 0, 1 +// CHECK64-NEXT: ret [[STRUCT_BFLOAT16X4X2_T]] [[DOTFCA_0_1_INSERT]] +// +// CHECK32-LABEL: @test_vld1_bf16_x2( +// CHECK32-NEXT: entry: +// CHECK32-NEXT: [[VLD1XN:%.*]] = tail call { <4 x bfloat>, <4 x bfloat> } @llvm.arm.neon.vld1x2.v4bf16.p0bf16(bfloat* [[PTR:%.*]]) +// CHECK32-NEXT: [[VLD1XN_FCA_0_EXTRACT:%.*]] = extractvalue { <4 x bfloat>, <4 x bfloat> } [[VLD1XN]], 0 +// CHECK32-NEXT: [[VLD1XN_FCA_1_EXTRACT:%.*]] = extractvalue { <4 x bfloat>, <4 x bfloat> } [[VLD1XN]], 1 +// CHECK32-NEXT: [[TMP0:%.*]] = bitcast <4 x bfloat> [[VLD1XN_FCA_0_EXTRACT]] to <2 x i32> +// CHECK32-NEXT: [[TMP1:%.*]] = bitcast <4 x bfloat> [[VLD1XN_FCA_1_EXTRACT]] to <2 x i32> +// CHECK32-NEXT: [[DOTFCA_0_INSERT:%.*]] = insertvalue [2 x <2 x i32>] undef, <2 x i32> [[TMP0]], 0 +// CHECK32-NEXT: [[DOTFCA_1_INSERT:%.*]] = insertvalue [2 x <2 x i32>] [[DOTFCA_0_INSERT]], <2 x i32> [[TMP1]], 1 +// CHECK32-NEXT: ret [2 x <2 x i32>] [[DOTFCA_1_INSERT]] +// bfloat16x4x2_t test_vld1_bf16_x2(bfloat16_t const *ptr) { return vld1_bf16_x2(ptr); } -// CHECK-LABEL: test_vld1_bf16_x2 -// CHECK64: %vld1xN = tail call { <4 x bfloat>, <4 x bfloat> } @llvm.aarch64.neon.ld1x2.v4bf16.p0bf16(bfloat* %ptr) -// CHECK32: %vld1xN = tail call { <4 x bfloat>, <4 x bfloat> } @llvm.arm.neon.vld1x2.v4bf16.p0bf16(bfloat* %ptr) +// CHECK64-LABEL: @test_vld1q_bf16_x2( +// CHECK64-NEXT: entry: +// CHECK64-NEXT: [[VLD1XN:%.*]] = tail call { <8 x bfloat>, <8 x bfloat> } @llvm.aarch64.neon.ld1x2.v8bf16.p0bf16(bfloat* [[PTR:%.*]]) +// CHECK64-NEXT: [[VLD1XN_FCA_0_EXTRACT:%.*]] = extractvalue { <8 x bfloat>, <8 x bfloat> } [[VLD1XN]], 0 +// CHECK64-NEXT: [[VLD1XN_FCA_1_EXTRACT:%.*]] = extractvalue { <8 x bfloat>, <8 x bfloat> } [[VLD1XN]], 1 +// CHECK64-NEXT: [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_BFLOAT16X8X2_T:%.*]] undef, <8 x bfloat> [[VLD1XN_FCA_0_EXTRACT]], 0, 0 +// CHECK64-NEXT: [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_BFLOAT16X8X2_T]] [[DOTFCA_0_0_INSERT]], <8 x bfloat> [[VLD1XN_FCA_1_EXTRACT]], 0, 1 +// CHECK64-NEXT: ret [[STRUCT_BFLOAT16X8X2_T]] [[DOTFCA_0_1_INSERT]] +// +// CHECK32-LABEL: @test_vld1q_bf16_x2( +// CHECK32-NEXT: entry: +// CHECK32-NEXT: [[VLD1XN:%.*]] = tail call { <8 x bfloat>, <8 x bfloat> } @llvm.arm.neon.vld1x2.v8bf16.p0bf16(bfloat* [[PTR:%.*]]) +// CHECK32-NEXT: [[VLD1XN_FCA_0_EXTRACT:%.*]] = extractvalue { <8 x bfloat>, <8 x bfloat> } [[VLD1XN]], 0 +// CHECK32-NEXT: [[VLD1XN_FCA_1_EXTRACT:%.*]] = extractvalue { <8 x bfloat>, <8 x bfloat> } [[VLD1XN]], 1 +// CHECK32-NEXT: [[TMP0:%.*]] = bitcast <8 x bfloat> [[VLD1XN_FCA_0_EXTRACT]] to <4 x i32> +// CHECK32-NEXT: [[TMP1:%.*]] = bitcast <8 x bfloat> [[VLD1XN_FCA_1_EXTRACT]] to <4 x i32> +// CHECK32-NEXT: [[DOTFCA_0_INSERT:%.*]] = insertvalue [2 x <4 x i32>] undef, <4 x i32> [[TMP0]], 0 +// CHECK32-NEXT: [[DOTFCA_1_INSERT:%.*]] = insertvalue [2 x <4 x i32>] [[DOTFCA_0_INSERT]], <4 x i32> [[TMP1]], 1 +// CHECK32-NEXT: ret [2 x <4 x i32>] [[DOTFCA_1_INSERT]] +// bfloat16x8x2_t test_vld1q_bf16_x2(bfloat16_t const *ptr) { return vld1q_bf16_x2(ptr); } -// CHECK-LABEL: test_vld1q_bf16_x2 -// CHECK64: %vld1xN = tail call { <8 x bfloat>, <8 x bfloat> } @llvm.aarch64.neon.ld1x2.v8bf16.p0bf16(bfloat* %ptr) -// CHECK32: %vld1xN = tail call { <8 x bfloat>, <8 x bfloat> } @llvm.arm.neon.vld1x2.v8bf16.p0bf16(bfloat* %ptr) +// CHECK64-LABEL: @test_vld1_bf16_x3( +// CHECK64-NEXT: entry: +// CHECK64-NEXT: [[VLD1XN:%.*]] = tail call { <4 x bfloat>, <4 x bfloat>, <4 x bfloat> } @llvm.aarch64.neon.ld1x3.v4bf16.p0bf16(bfloat* [[PTR:%.*]]) +// CHECK64-NEXT: [[VLD1XN_FCA_0_EXTRACT:%.*]] = extractvalue { <4 x bfloat>, <4 x bfloat>, <4 x bfloat> } [[VLD1XN]], 0 +// CHECK64-NEXT: [[VLD1XN_FCA_1_EXTRACT:%.*]] = extractvalue { <4 x bfloat>, <4 x bfloat>, <4 x bfloat> } [[VLD1XN]], 1 +// CHECK64-NEXT: [[VLD1XN_FCA_2_EXTRACT:%.*]] = extractvalue { <4 x bfloat>, <4 x bfloat>, <4 x bfloat> } [[VLD1XN]], 2 +// CHECK64-NEXT: [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_BFLOAT16X4X3_T:%.*]] undef, <4 x bfloat> [[VLD1XN_FCA_0_EXTRACT]], 0, 0 +// CHECK64-NEXT: [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_BFLOAT16X4X3_T]] [[DOTFCA_0_0_INSERT]], <4 x bfloat> [[VLD1XN_FCA_1_EXTRACT]], 0, 1 +// CHECK64-NEXT: [[DOTFCA_0_2_INSERT:%.*]] = insertvalue [[STRUCT_BFLOAT16X4X3_T]] [[DOTFCA_0_1_INSERT]], <4 x bfloat> [[VLD1XN_FCA_2_EXTRACT]], 0, 2 +// CHECK64-NEXT: ret [[STRUCT_BFLOAT16X4X3_T]] [[DOTFCA_0_2_INSERT]] +// +// CHECK32-LABEL: @test_vld1_bf16_x3( +// CHECK32-NEXT: entry: +// CHECK32-NEXT: [[VLD1XN:%.*]] = tail call { <4 x bfloat>, <4 x bfloat>, <4 x bfloat> } @llvm.arm.neon.vld1x3.v4bf16.p0bf16(bfloat* [[PTR:%.*]]) +// CHECK32-NEXT: [[VLD1XN_FCA_0_EXTRACT:%.*]] = extractvalue { <4 x bfloat>, <4 x bfloat>, <4 x bfloat> } [[VLD1XN]], 0 +// CHECK32-NEXT: [[VLD1XN_FCA_1_EXTRACT:%.*]] = extractvalue { <4 x bfloat>, <4 x bfloat>, <4 x bfloat> } [[VLD1XN]], 1 +// CHECK32-NEXT: [[VLD1XN_FCA_2_EXTRACT:%.*]] = extractvalue { <4 x bfloat>, <4 x bfloat>, <4 x bfloat> } [[VLD1XN]], 2 +// CHECK32-NEXT: [[TMP0:%.*]] = bitcast <4 x bfloat> [[VLD1XN_FCA_0_EXTRACT]] to <2 x i32> +// CHECK32-NEXT: [[TMP1:%.*]] = bitcast <4 x bfloat> [[VLD1XN_FCA_1_EXTRACT]] to <2 x i32> +// CHECK32-NEXT: [[TMP2:%.*]] = bitcast <4 x bfloat> [[VLD1XN_FCA_2_EXTRACT]] to <2 x i32> +// CHECK32-NEXT: [[DOTFCA_0_INSERT:%.*]] = insertvalue [3 x <2 x i32>] undef, <2 x i32> [[TMP0]], 0 +// CHECK32-NEXT: [[DOTFCA_1_INSERT:%.*]] = insertvalue [3 x <2 x i32>] [[DOTFCA_0_INSERT]], <2 x i32> [[TMP1]], 1 +// CHECK32-NEXT: [[DOTFCA_2_INSERT:%.*]] = insertvalue [3 x <2 x i32>] [[DOTFCA_1_INSERT]], <2 x i32> [[TMP2]], 2 +// CHECK32-NEXT: ret [3 x <2 x i32>] [[DOTFCA_2_INSERT]] +// bfloat16x4x3_t test_vld1_bf16_x3(bfloat16_t const *ptr) { return vld1_bf16_x3(ptr); } -// CHECK-LABEL: test_vld1_bf16_x3 -// CHECK64: %vld1xN = tail call { <4 x bfloat>, <4 x bfloat>, <4 x bfloat> } @llvm.aarch64.neon.ld1x3.v4bf16.p0bf16(bfloat* %ptr) -// CHECK32: %vld1xN = tail call { <4 x bfloat>, <4 x bfloat>, <4 x bfloat> } @llvm.arm.neon.vld1x3.v4bf16.p0bf16(bfloat* %ptr) +// CHECK64-LABEL: @test_vld1q_bf16_x3( +// CHECK64-NEXT: entry: +// CHECK64-NEXT: [[VLD1XN:%.*]] = tail call { <8 x bfloat>, <8 x bfloat>, <8 x bfloat> } @llvm.aarch64.neon.ld1x3.v8bf16.p0bf16(bfloat* [[PTR:%.*]]) +// CHECK64-NEXT: [[VLD1XN_FCA_0_EXTRACT:%.*]] = extractvalue { <8 x bfloat>, <8 x bfloat>, <8 x bfloat> } [[VLD1XN]], 0 +// CHECK64-NEXT: [[VLD1XN_FCA_1_EXTRACT:%.*]] = extractvalue { <8 x bfloat>, <8 x bfloat>, <8 x bfloat> } [[VLD1XN]], 1 +// CHECK64-NEXT: [[VLD1XN_FCA_2_EXTRACT:%.*]] = extractvalue { <8 x bfloat>, <8 x bfloat>, <8 x bfloat> } [[VLD1XN]], 2 +// CHECK64-NEXT: [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_BFLOAT16X8X3_T:%.*]] undef, <8 x bfloat> [[VLD1XN_FCA_0_EXTRACT]], 0, 0 +// CHECK64-NEXT: [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_BFLOAT16X8X3_T]] [[DOTFCA_0_0_INSERT]], <8 x bfloat> [[VLD1XN_FCA_1_EXTRACT]], 0, 1 +// CHECK64-NEXT: [[DOTFCA_0_2_INSERT:%.*]] = insertvalue [[STRUCT_BFLOAT16X8X3_T]] [[DOTFCA_0_1_INSERT]], <8 x bfloat> [[VLD1XN_FCA_2_EXTRACT]], 0, 2 +// CHECK64-NEXT: ret [[STRUCT_BFLOAT16X8X3_T]] [[DOTFCA_0_2_INSERT]] +// +// CHECK32-LABEL: @test_vld1q_bf16_x3( +// CHECK32-NEXT: entry: +// CHECK32-NEXT: [[VLD1XN:%.*]] = tail call { <8 x bfloat>, <8 x bfloat>, <8 x bfloat> } @llvm.arm.neon.vld1x3.v8bf16.p0bf16(bfloat* [[PTR:%.*]]) +// CHECK32-NEXT: [[VLD1XN_FCA_0_EXTRACT:%.*]] = extractvalue { <8 x bfloat>, <8 x bfloat>, <8 x bfloat> } [[VLD1XN]], 0 +// CHECK32-NEXT: [[VLD1XN_FCA_1_EXTRACT:%.*]] = extractvalue { <8 x bfloat>, <8 x bfloat>, <8 x bfloat> } [[VLD1XN]], 1 +// CHECK32-NEXT: [[VLD1XN_FCA_2_EXTRACT:%.*]] = extractvalue { <8 x bfloat>, <8 x bfloat>, <8 x bfloat> } [[VLD1XN]], 2 +// CHECK32-NEXT: [[TMP0:%.*]] = bitcast <8 x bfloat> [[VLD1XN_FCA_0_EXTRACT]] to <4 x i32> +// CHECK32-NEXT: [[TMP1:%.*]] = bitcast <8 x bfloat> [[VLD1XN_FCA_1_EXTRACT]] to <4 x i32> +// CHECK32-NEXT: [[TMP2:%.*]] = bitcast <8 x bfloat> [[VLD1XN_FCA_2_EXTRACT]] to <4 x i32> +// CHECK32-NEXT: [[DOTFCA_0_INSERT:%.*]] = insertvalue [3 x <4 x i32>] undef, <4 x i32> [[TMP0]], 0 +// CHECK32-NEXT: [[DOTFCA_1_INSERT:%.*]] = insertvalue [3 x <4 x i32>] [[DOTFCA_0_INSERT]], <4 x i32> [[TMP1]], 1 +// CHECK32-NEXT: [[DOTFCA_2_INSERT:%.*]] = insertvalue [3 x <4 x i32>] [[DOTFCA_1_INSERT]], <4 x i32> [[TMP2]], 2 +// CHECK32-NEXT: ret [3 x <4 x i32>] [[DOTFCA_2_INSERT]] +// bfloat16x8x3_t test_vld1q_bf16_x3(bfloat16_t const *ptr) { return vld1q_bf16_x3(ptr); } -// CHECK-LABEL: test_vld1q_bf16_x3 -// CHECK64: %vld1xN = tail call { <8 x bfloat>, <8 x bfloat>, <8 x bfloat> } @llvm.aarch64.neon.ld1x3.v8bf16.p0bf16(bfloat* %ptr) -// CHECK32: %vld1xN = tail call { <8 x bfloat>, <8 x bfloat>, <8 x bfloat> } @llvm.arm.neon.vld1x3.v8bf16.p0bf16(bfloat* %ptr) +// CHECK64-LABEL: @test_vld1_bf16_x4( +// CHECK64-NEXT: entry: +// CHECK64-NEXT: [[VLD1XN:%.*]] = tail call { <4 x bfloat>, <4 x bfloat>, <4 x bfloat>, <4 x bfloat> } @llvm.aarch64.neon.ld1x4.v4bf16.p0bf16(bfloat* [[PTR:%.*]]) +// CHECK64-NEXT: [[VLD1XN_FCA_0_EXTRACT:%.*]] = extractvalue { <4 x bfloat>, <4 x bfloat>, <4 x bfloat>, <4 x bfloat> } [[VLD1XN]], 0 +// CHECK64-NEXT: [[VLD1XN_FCA_1_EXTRACT:%.*]] = extractvalue { <4 x bfloat>, <4 x bfloat>, <4 x bfloat>, <4 x bfloat> } [[VLD1XN]], 1 +// CHECK64-NEXT: [[VLD1XN_FCA_2_EXTRACT:%.*]] = extractvalue { <4 x bfloat>, <4 x bfloat>, <4 x bfloat>, <4 x bfloat> } [[VLD1XN]], 2 +// CHECK64-NEXT: [[VLD1XN_FCA_3_EXTRACT:%.*]] = extractvalue { <4 x bfloat>, <4 x bfloat>, <4 x bfloat>, <4 x bfloat> } [[VLD1XN]], 3 +// CHECK64-NEXT: [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_BFLOAT16X4X4_T:%.*]] undef, <4 x bfloat> [[VLD1XN_FCA_0_EXTRACT]], 0, 0 +// CHECK64-NEXT: [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_BFLOAT16X4X4_T]] [[DOTFCA_0_0_INSERT]], <4 x bfloat> [[VLD1XN_FCA_1_EXTRACT]], 0, 1 +// CHECK64-NEXT: [[DOTFCA_0_2_INSERT:%.*]] = insertvalue [[STRUCT_BFLOAT16X4X4_T]] [[DOTFCA_0_1_INSERT]], <4 x bfloat> [[VLD1XN_FCA_2_EXTRACT]], 0, 2 +// CHECK64-NEXT: [[DOTFCA_0_3_INSERT:%.*]] = insertvalue [[STRUCT_BFLOAT16X4X4_T]] [[DOTFCA_0_2_INSERT]], <4 x bfloat> [[VLD1XN_FCA_3_EXTRACT]], 0, 3 +// CHECK64-NEXT: ret [[STRUCT_BFLOAT16X4X4_T]] [[DOTFCA_0_3_INSERT]] +// +// CHECK32-LABEL: @test_vld1_bf16_x4( +// CHECK32-NEXT: entry: +// CHECK32-NEXT: [[VLD1XN:%.*]] = tail call { <4 x bfloat>, <4 x bfloat>, <4 x bfloat>, <4 x bfloat> } @llvm.arm.neon.vld1x4.v4bf16.p0bf16(bfloat* [[PTR:%.*]]) +// CHECK32-NEXT: [[VLD1XN_FCA_0_EXTRACT:%.*]] = extractvalue { <4 x bfloat>, <4 x bfloat>, <4 x bfloat>, <4 x bfloat> } [[VLD1XN]], 0 +// CHECK32-NEXT: [[VLD1XN_FCA_1_EXTRACT:%.*]] = extractvalue { <4 x bfloat>, <4 x bfloat>, <4 x bfloat>, <4 x bfloat> } [[VLD1XN]], 1 +// CHECK32-NEXT: [[VLD1XN_FCA_2_EXTRACT:%.*]] = extractvalue { <4 x bfloat>, <4 x bfloat>, <4 x bfloat>, <4 x bfloat> } [[VLD1XN]], 2 +// CHECK32-NEXT: [[VLD1XN_FCA_3_EXTRACT:%.*]] = extractvalue { <4 x bfloat>, <4 x bfloat>, <4 x bfloat>, <4 x bfloat> } [[VLD1XN]], 3 +// CHECK32-NEXT: [[TMP0:%.*]] = bitcast <4 x bfloat> [[VLD1XN_FCA_0_EXTRACT]] to <2 x i32> +// CHECK32-NEXT: [[TMP1:%.*]] = bitcast <4 x bfloat> [[VLD1XN_FCA_1_EXTRACT]] to <2 x i32> +// CHECK32-NEXT: [[TMP2:%.*]] = bitcast <4 x bfloat> [[VLD1XN_FCA_2_EXTRACT]] to <2 x i32> +// CHECK32-NEXT: [[TMP3:%.*]] = bitcast <4 x bfloat> [[VLD1XN_FCA_3_EXTRACT]] to <2 x i32> +// CHECK32-NEXT: [[DOTFCA_0_INSERT:%.*]] = insertvalue [4 x <2 x i32>] undef, <2 x i32> [[TMP0]], 0 +// CHECK32-NEXT: [[DOTFCA_1_INSERT:%.*]] = insertvalue [4 x <2 x i32>] [[DOTFCA_0_INSERT]], <2 x i32> [[TMP1]], 1 +// CHECK32-NEXT: [[DOTFCA_2_INSERT:%.*]] = insertvalue [4 x <2 x i32>] [[DOTFCA_1_INSERT]], <2 x i32> [[TMP2]], 2 +// CHECK32-NEXT: [[DOTFCA_3_INSERT:%.*]] = insertvalue [4 x <2 x i32>] [[DOTFCA_2_INSERT]], <2 x i32> [[TMP3]], 3 +// CHECK32-NEXT: ret [4 x <2 x i32>] [[DOTFCA_3_INSERT]] +// bfloat16x4x4_t test_vld1_bf16_x4(bfloat16_t const *ptr) { return vld1_bf16_x4(ptr); } -// CHECK-LABEL: test_vld1_bf16_x4 -// CHECK64: %vld1xN = tail call { <4 x bfloat>, <4 x bfloat>, <4 x bfloat>, <4 x bfloat> } @llvm.aarch64.neon.ld1x4.v4bf16.p0bf16(bfloat* %ptr) -// CHECK32: %vld1xN = tail call { <4 x bfloat>, <4 x bfloat>, <4 x bfloat>, <4 x bfloat> } @llvm.arm.neon.vld1x4.v4bf16.p0bf16(bfloat* %ptr) +// CHECK64-LABEL: @test_vld1q_bf16_x4( +// CHECK64-NEXT: entry: +// CHECK64-NEXT: [[VLD1XN:%.*]] = tail call { <8 x bfloat>, <8 x bfloat>, <8 x bfloat>, <8 x bfloat> } @llvm.aarch64.neon.ld1x4.v8bf16.p0bf16(bfloat* [[PTR:%.*]]) +// CHECK64-NEXT: [[VLD1XN_FCA_0_EXTRACT:%.*]] = extractvalue { <8 x bfloat>, <8 x bfloat>, <8 x bfloat>, <8 x bfloat> } [[VLD1XN]], 0 +// CHECK64-NEXT: [[VLD1XN_FCA_1_EXTRACT:%.*]] = extractvalue { <8 x bfloat>, <8 x bfloat>, <8 x bfloat>, <8 x bfloat> } [[VLD1XN]], 1 +// CHECK64-NEXT: [[VLD1XN_FCA_2_EXTRACT:%.*]] = extractvalue { <8 x bfloat>, <8 x bfloat>, <8 x bfloat>, <8 x bfloat> } [[VLD1XN]], 2 +// CHECK64-NEXT: [[VLD1XN_FCA_3_EXTRACT:%.*]] = extractvalue { <8 x bfloat>, <8 x bfloat>, <8 x bfloat>, <8 x bfloat> } [[VLD1XN]], 3 +// CHECK64-NEXT: [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_BFLOAT16X8X4_T:%.*]] undef, <8 x bfloat> [[VLD1XN_FCA_0_EXTRACT]], 0, 0 +// CHECK64-NEXT: [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_BFLOAT16X8X4_T]] [[DOTFCA_0_0_INSERT]], <8 x bfloat> [[VLD1XN_FCA_1_EXTRACT]], 0, 1 +// CHECK64-NEXT: [[DOTFCA_0_2_INSERT:%.*]] = insertvalue [[STRUCT_BFLOAT16X8X4_T]] [[DOTFCA_0_1_INSERT]], <8 x bfloat> [[VLD1XN_FCA_2_EXTRACT]], 0, 2 +// CHECK64-NEXT: [[DOTFCA_0_3_INSERT:%.*]] = insertvalue [[STRUCT_BFLOAT16X8X4_T]] [[DOTFCA_0_2_INSERT]], <8 x bfloat> [[VLD1XN_FCA_3_EXTRACT]], 0, 3 +// CHECK64-NEXT: ret [[STRUCT_BFLOAT16X8X4_T]] [[DOTFCA_0_3_INSERT]] +// +// CHECK32-LABEL: @test_vld1q_bf16_x4( +// CHECK32-NEXT: entry: +// CHECK32-NEXT: [[VLD1XN:%.*]] = tail call { <8 x bfloat>, <8 x bfloat>, <8 x bfloat>, <8 x bfloat> } @llvm.arm.neon.vld1x4.v8bf16.p0bf16(bfloat* [[PTR:%.*]]) +// CHECK32-NEXT: [[VLD1XN_FCA_0_EXTRACT:%.*]] = extractvalue { <8 x bfloat>, <8 x bfloat>, <8 x bfloat>, <8 x bfloat> } [[VLD1XN]], 0 +// CHECK32-NEXT: [[VLD1XN_FCA_1_EXTRACT:%.*]] = extractvalue { <8 x bfloat>, <8 x bfloat>, <8 x bfloat>, <8 x bfloat> } [[VLD1XN]], 1 +// CHECK32-NEXT: [[VLD1XN_FCA_2_EXTRACT:%.*]] = extractvalue { <8 x bfloat>, <8 x bfloat>, <8 x bfloat>, <8 x bfloat> } [[VLD1XN]], 2 +// CHECK32-NEXT: [[VLD1XN_FCA_3_EXTRACT:%.*]] = extractvalue { <8 x bfloat>, <8 x bfloat>, <8 x bfloat>, <8 x bfloat> } [[VLD1XN]], 3 +// CHECK32-NEXT: [[TMP0:%.*]] = bitcast <8 x bfloat> [[VLD1XN_FCA_0_EXTRACT]] to <4 x i32> +// CHECK32-NEXT: [[TMP1:%.*]] = bitcast <8 x bfloat> [[VLD1XN_FCA_1_EXTRACT]] to <4 x i32> +// CHECK32-NEXT: [[TMP2:%.*]] = bitcast <8 x bfloat> [[VLD1XN_FCA_2_EXTRACT]] to <4 x i32> +// CHECK32-NEXT: [[TMP3:%.*]] = bitcast <8 x bfloat> [[VLD1XN_FCA_3_EXTRACT]] to <4 x i32> +// CHECK32-NEXT: [[DOTFCA_0_INSERT:%.*]] = insertvalue [4 x <4 x i32>] undef, <4 x i32> [[TMP0]], 0 +// CHECK32-NEXT: [[DOTFCA_1_INSERT:%.*]] = insertvalue [4 x <4 x i32>] [[DOTFCA_0_INSERT]], <4 x i32> [[TMP1]], 1 +// CHECK32-NEXT: [[DOTFCA_2_INSERT:%.*]] = insertvalue [4 x <4 x i32>] [[DOTFCA_1_INSERT]], <4 x i32> [[TMP2]], 2 +// CHECK32-NEXT: [[DOTFCA_3_INSERT:%.*]] = insertvalue [4 x <4 x i32>] [[DOTFCA_2_INSERT]], <4 x i32> [[TMP3]], 3 +// CHECK32-NEXT: ret [4 x <4 x i32>] [[DOTFCA_3_INSERT]] +// bfloat16x8x4_t test_vld1q_bf16_x4(bfloat16_t const *ptr) { return vld1q_bf16_x4(ptr); } -// CHECK-LABEL: test_vld1q_bf16_x4 -// CHECK64: %vld1xN = tail call { <8 x bfloat>, <8 x bfloat>, <8 x bfloat>, <8 x bfloat> } @llvm.aarch64.neon.ld1x4.v8bf16.p0bf16(bfloat* %ptr) -// CHECK32: %vld1xN = tail call { <8 x bfloat>, <8 x bfloat>, <8 x bfloat>, <8 x bfloat> } @llvm.arm.neon.vld1x4.v8bf16.p0bf16(bfloat* %ptr) +// CHECK-LABEL: @test_vld1q_dup_bf16( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = load bfloat, bfloat* [[PTR:%.*]], align 2 +// CHECK-NEXT: [[TMP1:%.*]] = insertelement <8 x bfloat> undef, bfloat [[TMP0]], i64 0 +// CHECK-NEXT: [[LANE:%.*]] = shufflevector <8 x bfloat> [[TMP1]], <8 x bfloat> poison, <8 x i32> zeroinitializer +// CHECK-NEXT: ret <8 x bfloat> [[LANE]] +// bfloat16x8_t test_vld1q_dup_bf16(bfloat16_t const *ptr) { return vld1q_dup_bf16(ptr); } -// CHECK-LABEL: test_vld1q_dup_bf16 -// CHECK64: %0 = load bfloat, bfloat* %ptr, align 2 -// CHECK64-NEXT: %1 = insertelement <8 x bfloat> undef, bfloat %0, i32 0 -// CHECK64-NEXT: %lane = shufflevector <8 x bfloat> %1, <8 x bfloat> poison, <8 x i32> zeroinitializer -// CHECK64-NEXT: ret <8 x bfloat> %lane -// CHECK32: %0 = load bfloat, bfloat* %ptr, align 2 -// CHECK32-NEXT: %1 = insertelement <8 x bfloat> undef, bfloat %0, i32 0 -// CHECK32-NEXT: %lane = shufflevector <8 x bfloat> %1, <8 x bfloat> poison, <8 x i32> zeroinitializer -// CHECK32-NEXT: ret <8 x bfloat> %lane +// CHECK64-LABEL: @test_vld2_bf16( +// CHECK64-NEXT: entry: +// CHECK64-NEXT: [[TMP0:%.*]] = bitcast bfloat* [[PTR:%.*]] to <4 x bfloat>* +// CHECK64-NEXT: [[VLD2:%.*]] = tail call { <4 x bfloat>, <4 x bfloat> } @llvm.aarch64.neon.ld2.v4bf16.p0v4bf16(<4 x bfloat>* [[TMP0]]) +// CHECK64-NEXT: [[VLD2_FCA_0_EXTRACT:%.*]] = extractvalue { <4 x bfloat>, <4 x bfloat> } [[VLD2]], 0 +// CHECK64-NEXT: [[VLD2_FCA_1_EXTRACT:%.*]] = extractvalue { <4 x bfloat>, <4 x bfloat> } [[VLD2]], 1 +// CHECK64-NEXT: [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_BFLOAT16X4X2_T:%.*]] undef, <4 x bfloat> [[VLD2_FCA_0_EXTRACT]], 0, 0 +// CHECK64-NEXT: [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_BFLOAT16X4X2_T]] [[DOTFCA_0_0_INSERT]], <4 x bfloat> [[VLD2_FCA_1_EXTRACT]], 0, 1 +// CHECK64-NEXT: ret [[STRUCT_BFLOAT16X4X2_T]] [[DOTFCA_0_1_INSERT]] +// +// CHECK32-LABEL: @test_vld2_bf16( +// CHECK32-NEXT: entry: +// CHECK32-NEXT: [[TMP0:%.*]] = bitcast bfloat* [[PTR:%.*]] to i8* +// CHECK32-NEXT: [[VLD2_V:%.*]] = tail call { <4 x bfloat>, <4 x bfloat> } @llvm.arm.neon.vld2.v4bf16.p0i8(i8* [[TMP0]], i32 2) +// CHECK32-NEXT: [[VLD2_V_FCA_0_EXTRACT:%.*]] = extractvalue { <4 x bfloat>, <4 x bfloat> } [[VLD2_V]], 0 +// CHECK32-NEXT: [[VLD2_V_FCA_1_EXTRACT:%.*]] = extractvalue { <4 x bfloat>, <4 x bfloat> } [[VLD2_V]], 1 +// CHECK32-NEXT: [[TMP1:%.*]] = bitcast <4 x bfloat> [[VLD2_V_FCA_0_EXTRACT]] to <2 x i32> +// CHECK32-NEXT: [[TMP2:%.*]] = bitcast <4 x bfloat> [[VLD2_V_FCA_1_EXTRACT]] to <2 x i32> +// CHECK32-NEXT: [[DOTFCA_0_INSERT:%.*]] = insertvalue [2 x <2 x i32>] undef, <2 x i32> [[TMP1]], 0 +// CHECK32-NEXT: [[DOTFCA_1_INSERT:%.*]] = insertvalue [2 x <2 x i32>] [[DOTFCA_0_INSERT]], <2 x i32> [[TMP2]], 1 +// CHECK32-NEXT: ret [2 x <2 x i32>] [[DOTFCA_1_INSERT]] +// bfloat16x4x2_t test_vld2_bf16(bfloat16_t const *ptr) { return vld2_bf16(ptr); } -// CHECK-LABEL: test_vld2_bf16 -// CHECK64: %0 = bitcast bfloat* %ptr to <4 x bfloat>* -// CHECK64-NEXT: %vld2 = tail call { <4 x bfloat>, <4 x bfloat> } @llvm.aarch64.neon.ld2.v4bf16.p0v4bf16(<4 x bfloat>* %0) -// CHECK32: %0 = bitcast bfloat* %ptr to i8* -// CHECK32-NEXT: %vld2_v = tail call { <4 x bfloat>, <4 x bfloat> } @llvm.arm.neon.vld2.v4bf16.p0i8(i8* %0, i32 2) +// CHECK64-LABEL: @test_vld2q_bf16( +// CHECK64-NEXT: entry: +// CHECK64-NEXT: [[TMP0:%.*]] = bitcast bfloat* [[PTR:%.*]] to <8 x bfloat>* +// CHECK64-NEXT: [[VLD2:%.*]] = tail call { <8 x bfloat>, <8 x bfloat> } @llvm.aarch64.neon.ld2.v8bf16.p0v8bf16(<8 x bfloat>* [[TMP0]]) +// CHECK64-NEXT: [[VLD2_FCA_0_EXTRACT:%.*]] = extractvalue { <8 x bfloat>, <8 x bfloat> } [[VLD2]], 0 +// CHECK64-NEXT: [[VLD2_FCA_1_EXTRACT:%.*]] = extractvalue { <8 x bfloat>, <8 x bfloat> } [[VLD2]], 1 +// CHECK64-NEXT: [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_BFLOAT16X8X2_T:%.*]] undef, <8 x bfloat> [[VLD2_FCA_0_EXTRACT]], 0, 0 +// CHECK64-NEXT: [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_BFLOAT16X8X2_T]] [[DOTFCA_0_0_INSERT]], <8 x bfloat> [[VLD2_FCA_1_EXTRACT]], 0, 1 +// CHECK64-NEXT: ret [[STRUCT_BFLOAT16X8X2_T]] [[DOTFCA_0_1_INSERT]] +// +// CHECK32-LABEL: @test_vld2q_bf16( +// CHECK32-NEXT: entry: +// CHECK32-NEXT: [[TMP0:%.*]] = bitcast bfloat* [[PTR:%.*]] to i8* +// CHECK32-NEXT: [[VLD2Q_V:%.*]] = tail call { <8 x bfloat>, <8 x bfloat> } @llvm.arm.neon.vld2.v8bf16.p0i8(i8* [[TMP0]], i32 2) +// CHECK32-NEXT: [[VLD2Q_V_FCA_0_EXTRACT:%.*]] = extractvalue { <8 x bfloat>, <8 x bfloat> } [[VLD2Q_V]], 0 +// CHECK32-NEXT: [[VLD2Q_V_FCA_1_EXTRACT:%.*]] = extractvalue { <8 x bfloat>, <8 x bfloat> } [[VLD2Q_V]], 1 +// CHECK32-NEXT: [[TMP1:%.*]] = bitcast <8 x bfloat> [[VLD2Q_V_FCA_0_EXTRACT]] to <4 x i32> +// CHECK32-NEXT: [[TMP2:%.*]] = bitcast <8 x bfloat> [[VLD2Q_V_FCA_1_EXTRACT]] to <4 x i32> +// CHECK32-NEXT: [[DOTFCA_0_INSERT:%.*]] = insertvalue [2 x <4 x i32>] undef, <4 x i32> [[TMP1]], 0 +// CHECK32-NEXT: [[DOTFCA_1_INSERT:%.*]] = insertvalue [2 x <4 x i32>] [[DOTFCA_0_INSERT]], <4 x i32> [[TMP2]], 1 +// CHECK32-NEXT: ret [2 x <4 x i32>] [[DOTFCA_1_INSERT]] +// bfloat16x8x2_t test_vld2q_bf16(bfloat16_t const *ptr) { return vld2q_bf16(ptr); } -// CHECK-LABEL: test_vld2q_bf16 -// CHECK64: %0 = bitcast bfloat* %ptr to <8 x bfloat>* -// CHECK64-NEXT: %vld2 = tail call { <8 x bfloat>, <8 x bfloat> } @llvm.aarch64.neon.ld2.v8bf16.p0v8bf16(<8 x bfloat>* %0) -// CHECK32: %0 = bitcast bfloat* %ptr to i8* -// CHECK32-NEXT: %vld2q_v = tail call { <8 x bfloat>, <8 x bfloat> } @llvm.arm.neon.vld2.v8bf16.p0i8(i8* %0, i32 2) +// CHECK64-LABEL: @test_vld2_lane_bf16( +// CHECK64-NEXT: entry: +// CHECK64-NEXT: [[SRC_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [2 x <4 x bfloat>] [[SRC_COERCE:%.*]], 0 +// CHECK64-NEXT: [[SRC_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [2 x <4 x bfloat>] [[SRC_COERCE]], 1 +// CHECK64-NEXT: [[TMP0:%.*]] = bitcast bfloat* [[PTR:%.*]] to i8* +// CHECK64-NEXT: [[VLD2_LANE:%.*]] = tail call { <4 x bfloat>, <4 x bfloat> } @llvm.aarch64.neon.ld2lane.v4bf16.p0i8(<4 x bfloat> [[SRC_COERCE_FCA_0_EXTRACT]], <4 x bfloat> [[SRC_COERCE_FCA_1_EXTRACT]], i64 1, i8* [[TMP0]]) +// CHECK64-NEXT: [[VLD2_LANE_FCA_0_EXTRACT:%.*]] = extractvalue { <4 x bfloat>, <4 x bfloat> } [[VLD2_LANE]], 0 +// CHECK64-NEXT: [[VLD2_LANE_FCA_1_EXTRACT:%.*]] = extractvalue { <4 x bfloat>, <4 x bfloat> } [[VLD2_LANE]], 1 +// CHECK64-NEXT: [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_BFLOAT16X4X2_T:%.*]] undef, <4 x bfloat> [[VLD2_LANE_FCA_0_EXTRACT]], 0, 0 +// CHECK64-NEXT: [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_BFLOAT16X4X2_T]] [[DOTFCA_0_0_INSERT]], <4 x bfloat> [[VLD2_LANE_FCA_1_EXTRACT]], 0, 1 +// CHECK64-NEXT: ret [[STRUCT_BFLOAT16X4X2_T]] [[DOTFCA_0_1_INSERT]] +// +// CHECK32-LABEL: @test_vld2_lane_bf16( +// CHECK32-NEXT: entry: +// CHECK32-NEXT: [[SRC_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [2 x <2 x i32>] [[SRC_COERCE:%.*]], 0 +// CHECK32-NEXT: [[SRC_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [2 x <2 x i32>] [[SRC_COERCE]], 1 +// CHECK32-NEXT: [[TMP0:%.*]] = bitcast <2 x i32> [[SRC_COERCE_FCA_0_EXTRACT]] to <4 x bfloat> +// CHECK32-NEXT: [[TMP1:%.*]] = bitcast <2 x i32> [[SRC_COERCE_FCA_1_EXTRACT]] to <4 x bfloat> +// CHECK32-NEXT: [[TMP2:%.*]] = bitcast bfloat* [[PTR:%.*]] to i8* +// CHECK32-NEXT: [[VLD2_LANE_V:%.*]] = tail call { <4 x bfloat>, <4 x bfloat> } @llvm.arm.neon.vld2lane.v4bf16.p0i8(i8* [[TMP2]], <4 x bfloat> [[TMP0]], <4 x bfloat> [[TMP1]], i32 1, i32 2) +// CHECK32-NEXT: [[VLD2_LANE_V_FCA_0_EXTRACT:%.*]] = extractvalue { <4 x bfloat>, <4 x bfloat> } [[VLD2_LANE_V]], 0 +// CHECK32-NEXT: [[VLD2_LANE_V_FCA_1_EXTRACT:%.*]] = extractvalue { <4 x bfloat>, <4 x bfloat> } [[VLD2_LANE_V]], 1 +// CHECK32-NEXT: [[TMP3:%.*]] = bitcast <4 x bfloat> [[VLD2_LANE_V_FCA_0_EXTRACT]] to <2 x i32> +// CHECK32-NEXT: [[TMP4:%.*]] = bitcast <4 x bfloat> [[VLD2_LANE_V_FCA_1_EXTRACT]] to <2 x i32> +// CHECK32-NEXT: [[DOTFCA_0_INSERT:%.*]] = insertvalue [2 x <2 x i32>] undef, <2 x i32> [[TMP3]], 0 +// CHECK32-NEXT: [[DOTFCA_1_INSERT:%.*]] = insertvalue [2 x <2 x i32>] [[DOTFCA_0_INSERT]], <2 x i32> [[TMP4]], 1 +// CHECK32-NEXT: ret [2 x <2 x i32>] [[DOTFCA_1_INSERT]] +// bfloat16x4x2_t test_vld2_lane_bf16(bfloat16_t const *ptr, bfloat16x4x2_t src) { return vld2_lane_bf16(ptr, src, 1); } -// CHECK-LABEL: test_vld2_lane_bf16 -// CHECK64: %vld2_lane = tail call { <4 x bfloat>, <4 x bfloat> } @llvm.aarch64.neon.ld2lane.v4bf16.p0i8(<4 x bfloat> %src.coerce.fca.0.extract, <4 x bfloat> %src.coerce.fca.1.extract, i64 1, i8* %0) -// CHECK32: %vld2_lane_v = tail call { <4 x bfloat>, <4 x bfloat> } @llvm.arm.neon.vld2lane.v4bf16.p0i8(i8* %2, <4 x bfloat> %0, <4 x bfloat> %1, i32 1, i32 2) +// CHECK64-LABEL: @test_vld2q_lane_bf16( +// CHECK64-NEXT: entry: +// CHECK64-NEXT: [[SRC_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [2 x <8 x bfloat>] [[SRC_COERCE:%.*]], 0 +// CHECK64-NEXT: [[SRC_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [2 x <8 x bfloat>] [[SRC_COERCE]], 1 +// CHECK64-NEXT: [[TMP0:%.*]] = bitcast bfloat* [[PTR:%.*]] to i8* +// CHECK64-NEXT: [[VLD2_LANE:%.*]] = tail call { <8 x bfloat>, <8 x bfloat> } @llvm.aarch64.neon.ld2lane.v8bf16.p0i8(<8 x bfloat> [[SRC_COERCE_FCA_0_EXTRACT]], <8 x bfloat> [[SRC_COERCE_FCA_1_EXTRACT]], i64 7, i8* [[TMP0]]) +// CHECK64-NEXT: [[VLD2_LANE_FCA_0_EXTRACT:%.*]] = extractvalue { <8 x bfloat>, <8 x bfloat> } [[VLD2_LANE]], 0 +// CHECK64-NEXT: [[VLD2_LANE_FCA_1_EXTRACT:%.*]] = extractvalue { <8 x bfloat>, <8 x bfloat> } [[VLD2_LANE]], 1 +// CHECK64-NEXT: [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_BFLOAT16X8X2_T:%.*]] undef, <8 x bfloat> [[VLD2_LANE_FCA_0_EXTRACT]], 0, 0 +// CHECK64-NEXT: [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_BFLOAT16X8X2_T]] [[DOTFCA_0_0_INSERT]], <8 x bfloat> [[VLD2_LANE_FCA_1_EXTRACT]], 0, 1 +// CHECK64-NEXT: ret [[STRUCT_BFLOAT16X8X2_T]] [[DOTFCA_0_1_INSERT]] +// +// CHECK32-LABEL: @test_vld2q_lane_bf16( +// CHECK32-NEXT: entry: +// CHECK32-NEXT: [[SRC_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [2 x <4 x i32>] [[SRC_COERCE:%.*]], 0 +// CHECK32-NEXT: [[SRC_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [2 x <4 x i32>] [[SRC_COERCE]], 1 +// CHECK32-NEXT: [[TMP0:%.*]] = bitcast <4 x i32> [[SRC_COERCE_FCA_0_EXTRACT]] to <8 x bfloat> +// CHECK32-NEXT: [[TMP1:%.*]] = bitcast <4 x i32> [[SRC_COERCE_FCA_1_EXTRACT]] to <8 x bfloat> +// CHECK32-NEXT: [[TMP2:%.*]] = bitcast bfloat* [[PTR:%.*]] to i8* +// CHECK32-NEXT: [[VLD2Q_LANE_V:%.*]] = tail call { <8 x bfloat>, <8 x bfloat> } @llvm.arm.neon.vld2lane.v8bf16.p0i8(i8* [[TMP2]], <8 x bfloat> [[TMP0]], <8 x bfloat> [[TMP1]], i32 7, i32 2) +// CHECK32-NEXT: [[VLD2Q_LANE_V_FCA_0_EXTRACT:%.*]] = extractvalue { <8 x bfloat>, <8 x bfloat> } [[VLD2Q_LANE_V]], 0 +// CHECK32-NEXT: [[VLD2Q_LANE_V_FCA_1_EXTRACT:%.*]] = extractvalue { <8 x bfloat>, <8 x bfloat> } [[VLD2Q_LANE_V]], 1 +// CHECK32-NEXT: [[TMP3:%.*]] = bitcast <8 x bfloat> [[VLD2Q_LANE_V_FCA_0_EXTRACT]] to <4 x i32> +// CHECK32-NEXT: [[TMP4:%.*]] = bitcast <8 x bfloat> [[VLD2Q_LANE_V_FCA_1_EXTRACT]] to <4 x i32> +// CHECK32-NEXT: [[DOTFCA_0_INSERT:%.*]] = insertvalue [2 x <4 x i32>] undef, <4 x i32> [[TMP3]], 0 +// CHECK32-NEXT: [[DOTFCA_1_INSERT:%.*]] = insertvalue [2 x <4 x i32>] [[DOTFCA_0_INSERT]], <4 x i32> [[TMP4]], 1 +// CHECK32-NEXT: ret [2 x <4 x i32>] [[DOTFCA_1_INSERT]] +// bfloat16x8x2_t test_vld2q_lane_bf16(bfloat16_t const *ptr, bfloat16x8x2_t src) { return vld2q_lane_bf16(ptr, src, 7); } -// CHECK-LABEL: test_vld2q_lane_bf16 -// CHECK64: %vld2_lane = tail call { <8 x bfloat>, <8 x bfloat> } @llvm.aarch64.neon.ld2lane.v8bf16.p0i8(<8 x bfloat> %src.coerce.fca.0.extract, <8 x bfloat> %src.coerce.fca.1.extract, i64 7, i8* %0) -// CHECK32: %vld2q_lane_v = tail call { <8 x bfloat>, <8 x bfloat> } @llvm.arm.neon.vld2lane.v8bf16.p0i8(i8* %2, <8 x bfloat> %0, <8 x bfloat> %1, i32 7, i32 2) +// CHECK64-LABEL: @test_vld3_bf16( +// CHECK64-NEXT: entry: +// CHECK64-NEXT: [[TMP0:%.*]] = bitcast bfloat* [[PTR:%.*]] to <4 x bfloat>* +// CHECK64-NEXT: [[VLD3:%.*]] = tail call { <4 x bfloat>, <4 x bfloat>, <4 x bfloat> } @llvm.aarch64.neon.ld3.v4bf16.p0v4bf16(<4 x bfloat>* [[TMP0]]) +// CHECK64-NEXT: [[VLD3_FCA_0_EXTRACT:%.*]] = extractvalue { <4 x bfloat>, <4 x bfloat>, <4 x bfloat> } [[VLD3]], 0 +// CHECK64-NEXT: [[VLD3_FCA_1_EXTRACT:%.*]] = extractvalue { <4 x bfloat>, <4 x bfloat>, <4 x bfloat> } [[VLD3]], 1 +// CHECK64-NEXT: [[VLD3_FCA_2_EXTRACT:%.*]] = extractvalue { <4 x bfloat>, <4 x bfloat>, <4 x bfloat> } [[VLD3]], 2 +// CHECK64-NEXT: [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_BFLOAT16X4X3_T:%.*]] undef, <4 x bfloat> [[VLD3_FCA_0_EXTRACT]], 0, 0 +// CHECK64-NEXT: [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_BFLOAT16X4X3_T]] [[DOTFCA_0_0_INSERT]], <4 x bfloat> [[VLD3_FCA_1_EXTRACT]], 0, 1 +// CHECK64-NEXT: [[DOTFCA_0_2_INSERT:%.*]] = insertvalue [[STRUCT_BFLOAT16X4X3_T]] [[DOTFCA_0_1_INSERT]], <4 x bfloat> [[VLD3_FCA_2_EXTRACT]], 0, 2 +// CHECK64-NEXT: ret [[STRUCT_BFLOAT16X4X3_T]] [[DOTFCA_0_2_INSERT]] +// +// CHECK32-LABEL: @test_vld3_bf16( +// CHECK32-NEXT: entry: +// CHECK32-NEXT: [[TMP0:%.*]] = bitcast bfloat* [[PTR:%.*]] to i8* +// CHECK32-NEXT: [[VLD3_V:%.*]] = tail call { <4 x bfloat>, <4 x bfloat>, <4 x bfloat> } @llvm.arm.neon.vld3.v4bf16.p0i8(i8* [[TMP0]], i32 2) +// CHECK32-NEXT: [[VLD3_V_FCA_0_EXTRACT:%.*]] = extractvalue { <4 x bfloat>, <4 x bfloat>, <4 x bfloat> } [[VLD3_V]], 0 +// CHECK32-NEXT: [[VLD3_V_FCA_1_EXTRACT:%.*]] = extractvalue { <4 x bfloat>, <4 x bfloat>, <4 x bfloat> } [[VLD3_V]], 1 +// CHECK32-NEXT: [[VLD3_V_FCA_2_EXTRACT:%.*]] = extractvalue { <4 x bfloat>, <4 x bfloat>, <4 x bfloat> } [[VLD3_V]], 2 +// CHECK32-NEXT: [[TMP1:%.*]] = bitcast <4 x bfloat> [[VLD3_V_FCA_0_EXTRACT]] to <2 x i32> +// CHECK32-NEXT: [[TMP2:%.*]] = bitcast <4 x bfloat> [[VLD3_V_FCA_1_EXTRACT]] to <2 x i32> +// CHECK32-NEXT: [[TMP3:%.*]] = bitcast <4 x bfloat> [[VLD3_V_FCA_2_EXTRACT]] to <2 x i32> +// CHECK32-NEXT: [[DOTFCA_0_INSERT:%.*]] = insertvalue [3 x <2 x i32>] undef, <2 x i32> [[TMP1]], 0 +// CHECK32-NEXT: [[DOTFCA_1_INSERT:%.*]] = insertvalue [3 x <2 x i32>] [[DOTFCA_0_INSERT]], <2 x i32> [[TMP2]], 1 +// CHECK32-NEXT: [[DOTFCA_2_INSERT:%.*]] = insertvalue [3 x <2 x i32>] [[DOTFCA_1_INSERT]], <2 x i32> [[TMP3]], 2 +// CHECK32-NEXT: ret [3 x <2 x i32>] [[DOTFCA_2_INSERT]] +// bfloat16x4x3_t test_vld3_bf16(bfloat16_t const *ptr) { return vld3_bf16(ptr); } -// CHECK-LABEL: test_vld3_bf16 -// CHECK64: %vld3 = tail call { <4 x bfloat>, <4 x bfloat>, <4 x bfloat> } @llvm.aarch64.neon.ld3.v4bf16.p0v4bf16(<4 x bfloat>* %0) -// CHECK32: %0 = bitcast bfloat* %ptr to i8* -// CHECK32-NEXT: %vld3_v = tail call { <4 x bfloat>, <4 x bfloat>, <4 x bfloat> } @llvm.arm.neon.vld3.v4bf16.p0i8(i8* %0, i32 2) +// CHECK64-LABEL: @test_vld3q_bf16( +// CHECK64-NEXT: entry: +// CHECK64-NEXT: [[TMP0:%.*]] = bitcast bfloat* [[PTR:%.*]] to <8 x bfloat>* +// CHECK64-NEXT: [[VLD3:%.*]] = tail call { <8 x bfloat>, <8 x bfloat>, <8 x bfloat> } @llvm.aarch64.neon.ld3.v8bf16.p0v8bf16(<8 x bfloat>* [[TMP0]]) +// CHECK64-NEXT: [[VLD3_FCA_0_EXTRACT:%.*]] = extractvalue { <8 x bfloat>, <8 x bfloat>, <8 x bfloat> } [[VLD3]], 0 +// CHECK64-NEXT: [[VLD3_FCA_1_EXTRACT:%.*]] = extractvalue { <8 x bfloat>, <8 x bfloat>, <8 x bfloat> } [[VLD3]], 1 +// CHECK64-NEXT: [[VLD3_FCA_2_EXTRACT:%.*]] = extractvalue { <8 x bfloat>, <8 x bfloat>, <8 x bfloat> } [[VLD3]], 2 +// CHECK64-NEXT: [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_BFLOAT16X8X3_T:%.*]] undef, <8 x bfloat> [[VLD3_FCA_0_EXTRACT]], 0, 0 +// CHECK64-NEXT: [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_BFLOAT16X8X3_T]] [[DOTFCA_0_0_INSERT]], <8 x bfloat> [[VLD3_FCA_1_EXTRACT]], 0, 1 +// CHECK64-NEXT: [[DOTFCA_0_2_INSERT:%.*]] = insertvalue [[STRUCT_BFLOAT16X8X3_T]] [[DOTFCA_0_1_INSERT]], <8 x bfloat> [[VLD3_FCA_2_EXTRACT]], 0, 2 +// CHECK64-NEXT: ret [[STRUCT_BFLOAT16X8X3_T]] [[DOTFCA_0_2_INSERT]] +// +// CHECK32-LABEL: @test_vld3q_bf16( +// CHECK32-NEXT: entry: +// CHECK32-NEXT: [[TMP0:%.*]] = bitcast bfloat* [[PTR:%.*]] to i8* +// CHECK32-NEXT: [[VLD3Q_V:%.*]] = tail call { <8 x bfloat>, <8 x bfloat>, <8 x bfloat> } @llvm.arm.neon.vld3.v8bf16.p0i8(i8* [[TMP0]], i32 2) +// CHECK32-NEXT: [[VLD3Q_V_FCA_0_EXTRACT:%.*]] = extractvalue { <8 x bfloat>, <8 x bfloat>, <8 x bfloat> } [[VLD3Q_V]], 0 +// CHECK32-NEXT: [[VLD3Q_V_FCA_1_EXTRACT:%.*]] = extractvalue { <8 x bfloat>, <8 x bfloat>, <8 x bfloat> } [[VLD3Q_V]], 1 +// CHECK32-NEXT: [[VLD3Q_V_FCA_2_EXTRACT:%.*]] = extractvalue { <8 x bfloat>, <8 x bfloat>, <8 x bfloat> } [[VLD3Q_V]], 2 +// CHECK32-NEXT: [[TMP1:%.*]] = bitcast <8 x bfloat> [[VLD3Q_V_FCA_0_EXTRACT]] to <4 x i32> +// CHECK32-NEXT: [[TMP2:%.*]] = bitcast <8 x bfloat> [[VLD3Q_V_FCA_1_EXTRACT]] to <4 x i32> +// CHECK32-NEXT: [[TMP3:%.*]] = bitcast <8 x bfloat> [[VLD3Q_V_FCA_2_EXTRACT]] to <4 x i32> +// CHECK32-NEXT: [[DOTFCA_0_INSERT:%.*]] = insertvalue [3 x <4 x i32>] undef, <4 x i32> [[TMP1]], 0 +// CHECK32-NEXT: [[DOTFCA_1_INSERT:%.*]] = insertvalue [3 x <4 x i32>] [[DOTFCA_0_INSERT]], <4 x i32> [[TMP2]], 1 +// CHECK32-NEXT: [[DOTFCA_2_INSERT:%.*]] = insertvalue [3 x <4 x i32>] [[DOTFCA_1_INSERT]], <4 x i32> [[TMP3]], 2 +// CHECK32-NEXT: ret [3 x <4 x i32>] [[DOTFCA_2_INSERT]] +// bfloat16x8x3_t test_vld3q_bf16(bfloat16_t const *ptr) { return vld3q_bf16(ptr); } -// CHECK-LABEL: test_vld3q_bf16 -// CHECK64: %vld3 = tail call { <8 x bfloat>, <8 x bfloat>, <8 x bfloat> } @llvm.aarch64.neon.ld3.v8bf16.p0v8bf16(<8 x bfloat>* %0) -// CHECK32: %0 = bitcast bfloat* %ptr to i8* -// CHECK32-NEXT: %vld3q_v = tail call { <8 x bfloat>, <8 x bfloat>, <8 x bfloat> } @llvm.arm.neon.vld3.v8bf16.p0i8(i8* %0, i32 2) +// CHECK64-LABEL: @test_vld3_lane_bf16( +// CHECK64-NEXT: entry: +// CHECK64-NEXT: [[SRC_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [3 x <4 x bfloat>] [[SRC_COERCE:%.*]], 0 +// CHECK64-NEXT: [[SRC_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [3 x <4 x bfloat>] [[SRC_COERCE]], 1 +// CHECK64-NEXT: [[SRC_COERCE_FCA_2_EXTRACT:%.*]] = extractvalue [3 x <4 x bfloat>] [[SRC_COERCE]], 2 +// CHECK64-NEXT: [[TMP0:%.*]] = bitcast bfloat* [[PTR:%.*]] to i8* +// CHECK64-NEXT: [[VLD3_LANE:%.*]] = tail call { <4 x bfloat>, <4 x bfloat>, <4 x bfloat> } @llvm.aarch64.neon.ld3lane.v4bf16.p0i8(<4 x bfloat> [[SRC_COERCE_FCA_0_EXTRACT]], <4 x bfloat> [[SRC_COERCE_FCA_1_EXTRACT]], <4 x bfloat> [[SRC_COERCE_FCA_2_EXTRACT]], i64 1, i8* [[TMP0]]) +// CHECK64-NEXT: [[VLD3_LANE_FCA_0_EXTRACT:%.*]] = extractvalue { <4 x bfloat>, <4 x bfloat>, <4 x bfloat> } [[VLD3_LANE]], 0 +// CHECK64-NEXT: [[VLD3_LANE_FCA_1_EXTRACT:%.*]] = extractvalue { <4 x bfloat>, <4 x bfloat>, <4 x bfloat> } [[VLD3_LANE]], 1 +// CHECK64-NEXT: [[VLD3_LANE_FCA_2_EXTRACT:%.*]] = extractvalue { <4 x bfloat>, <4 x bfloat>, <4 x bfloat> } [[VLD3_LANE]], 2 +// CHECK64-NEXT: [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_BFLOAT16X4X3_T:%.*]] undef, <4 x bfloat> [[VLD3_LANE_FCA_0_EXTRACT]], 0, 0 +// CHECK64-NEXT: [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_BFLOAT16X4X3_T]] [[DOTFCA_0_0_INSERT]], <4 x bfloat> [[VLD3_LANE_FCA_1_EXTRACT]], 0, 1 +// CHECK64-NEXT: [[DOTFCA_0_2_INSERT:%.*]] = insertvalue [[STRUCT_BFLOAT16X4X3_T]] [[DOTFCA_0_1_INSERT]], <4 x bfloat> [[VLD3_LANE_FCA_2_EXTRACT]], 0, 2 +// CHECK64-NEXT: ret [[STRUCT_BFLOAT16X4X3_T]] [[DOTFCA_0_2_INSERT]] +// +// CHECK32-LABEL: @test_vld3_lane_bf16( +// CHECK32-NEXT: entry: +// CHECK32-NEXT: [[SRC_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [3 x <2 x i32>] [[SRC_COERCE:%.*]], 0 +// CHECK32-NEXT: [[SRC_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [3 x <2 x i32>] [[SRC_COERCE]], 1 +// CHECK32-NEXT: [[SRC_COERCE_FCA_2_EXTRACT:%.*]] = extractvalue [3 x <2 x i32>] [[SRC_COERCE]], 2 +// CHECK32-NEXT: [[TMP0:%.*]] = bitcast <2 x i32> [[SRC_COERCE_FCA_0_EXTRACT]] to <4 x bfloat> +// CHECK32-NEXT: [[TMP1:%.*]] = bitcast <2 x i32> [[SRC_COERCE_FCA_1_EXTRACT]] to <4 x bfloat> +// CHECK32-NEXT: [[TMP2:%.*]] = bitcast <2 x i32> [[SRC_COERCE_FCA_2_EXTRACT]] to <4 x bfloat> +// CHECK32-NEXT: [[TMP3:%.*]] = bitcast bfloat* [[PTR:%.*]] to i8* +// CHECK32-NEXT: [[VLD3_LANE_V:%.*]] = tail call { <4 x bfloat>, <4 x bfloat>, <4 x bfloat> } @llvm.arm.neon.vld3lane.v4bf16.p0i8(i8* [[TMP3]], <4 x bfloat> [[TMP0]], <4 x bfloat> [[TMP1]], <4 x bfloat> [[TMP2]], i32 1, i32 2) +// CHECK32-NEXT: [[VLD3_LANE_V_FCA_0_EXTRACT:%.*]] = extractvalue { <4 x bfloat>, <4 x bfloat>, <4 x bfloat> } [[VLD3_LANE_V]], 0 +// CHECK32-NEXT: [[VLD3_LANE_V_FCA_1_EXTRACT:%.*]] = extractvalue { <4 x bfloat>, <4 x bfloat>, <4 x bfloat> } [[VLD3_LANE_V]], 1 +// CHECK32-NEXT: [[VLD3_LANE_V_FCA_2_EXTRACT:%.*]] = extractvalue { <4 x bfloat>, <4 x bfloat>, <4 x bfloat> } [[VLD3_LANE_V]], 2 +// CHECK32-NEXT: [[TMP4:%.*]] = bitcast <4 x bfloat> [[VLD3_LANE_V_FCA_0_EXTRACT]] to <2 x i32> +// CHECK32-NEXT: [[TMP5:%.*]] = bitcast <4 x bfloat> [[VLD3_LANE_V_FCA_1_EXTRACT]] to <2 x i32> +// CHECK32-NEXT: [[TMP6:%.*]] = bitcast <4 x bfloat> [[VLD3_LANE_V_FCA_2_EXTRACT]] to <2 x i32> +// CHECK32-NEXT: [[DOTFCA_0_INSERT:%.*]] = insertvalue [3 x <2 x i32>] undef, <2 x i32> [[TMP4]], 0 +// CHECK32-NEXT: [[DOTFCA_1_INSERT:%.*]] = insertvalue [3 x <2 x i32>] [[DOTFCA_0_INSERT]], <2 x i32> [[TMP5]], 1 +// CHECK32-NEXT: [[DOTFCA_2_INSERT:%.*]] = insertvalue [3 x <2 x i32>] [[DOTFCA_1_INSERT]], <2 x i32> [[TMP6]], 2 +// CHECK32-NEXT: ret [3 x <2 x i32>] [[DOTFCA_2_INSERT]] +// bfloat16x4x3_t test_vld3_lane_bf16(bfloat16_t const *ptr, bfloat16x4x3_t src) { return vld3_lane_bf16(ptr, src, 1); } -// CHECK-LABEL: test_vld3_lane_bf16 -// CHECK64: %vld3_lane = tail call { <4 x bfloat>, <4 x bfloat>, <4 x bfloat> } @llvm.aarch64.neon.ld3lane.v4bf16.p0i8(<4 x bfloat> %src.coerce.fca.0.extract, <4 x bfloat> %src.coerce.fca.1.extract, <4 x bfloat> %src.coerce.fca.2.extract, i64 1, i8* %0) -// CHECK32: %3 = bitcast bfloat* %ptr to i8* -// CHECK32-NEXT: %vld3_lane_v = tail call { <4 x bfloat>, <4 x bfloat>, <4 x bfloat> } @llvm.arm.neon.vld3lane.v4bf16.p0i8(i8* %3, <4 x bfloat> %0, <4 x bfloat> %1, <4 x bfloat> %2, i32 1, i32 2) +// CHECK64-LABEL: @test_vld3q_lane_bf16( +// CHECK64-NEXT: entry: +// CHECK64-NEXT: [[SRC_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [3 x <8 x bfloat>] [[SRC_COERCE:%.*]], 0 +// CHECK64-NEXT: [[SRC_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [3 x <8 x bfloat>] [[SRC_COERCE]], 1 +// CHECK64-NEXT: [[SRC_COERCE_FCA_2_EXTRACT:%.*]] = extractvalue [3 x <8 x bfloat>] [[SRC_COERCE]], 2 +// CHECK64-NEXT: [[TMP0:%.*]] = bitcast bfloat* [[PTR:%.*]] to i8* +// CHECK64-NEXT: [[VLD3_LANE:%.*]] = tail call { <8 x bfloat>, <8 x bfloat>, <8 x bfloat> } @llvm.aarch64.neon.ld3lane.v8bf16.p0i8(<8 x bfloat> [[SRC_COERCE_FCA_0_EXTRACT]], <8 x bfloat> [[SRC_COERCE_FCA_1_EXTRACT]], <8 x bfloat> [[SRC_COERCE_FCA_2_EXTRACT]], i64 7, i8* [[TMP0]]) +// CHECK64-NEXT: [[VLD3_LANE_FCA_0_EXTRACT:%.*]] = extractvalue { <8 x bfloat>, <8 x bfloat>, <8 x bfloat> } [[VLD3_LANE]], 0 +// CHECK64-NEXT: [[VLD3_LANE_FCA_1_EXTRACT:%.*]] = extractvalue { <8 x bfloat>, <8 x bfloat>, <8 x bfloat> } [[VLD3_LANE]], 1 +// CHECK64-NEXT: [[VLD3_LANE_FCA_2_EXTRACT:%.*]] = extractvalue { <8 x bfloat>, <8 x bfloat>, <8 x bfloat> } [[VLD3_LANE]], 2 +// CHECK64-NEXT: [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_BFLOAT16X8X3_T:%.*]] undef, <8 x bfloat> [[VLD3_LANE_FCA_0_EXTRACT]], 0, 0 +// CHECK64-NEXT: [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_BFLOAT16X8X3_T]] [[DOTFCA_0_0_INSERT]], <8 x bfloat> [[VLD3_LANE_FCA_1_EXTRACT]], 0, 1 +// CHECK64-NEXT: [[DOTFCA_0_2_INSERT:%.*]] = insertvalue [[STRUCT_BFLOAT16X8X3_T]] [[DOTFCA_0_1_INSERT]], <8 x bfloat> [[VLD3_LANE_FCA_2_EXTRACT]], 0, 2 +// CHECK64-NEXT: ret [[STRUCT_BFLOAT16X8X3_T]] [[DOTFCA_0_2_INSERT]] +// +// CHECK32-LABEL: @test_vld3q_lane_bf16( +// CHECK32-NEXT: entry: +// CHECK32-NEXT: [[SRC_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [3 x <4 x i32>] [[SRC_COERCE:%.*]], 0 +// CHECK32-NEXT: [[SRC_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [3 x <4 x i32>] [[SRC_COERCE]], 1 +// CHECK32-NEXT: [[SRC_COERCE_FCA_2_EXTRACT:%.*]] = extractvalue [3 x <4 x i32>] [[SRC_COERCE]], 2 +// CHECK32-NEXT: [[TMP0:%.*]] = bitcast <4 x i32> [[SRC_COERCE_FCA_0_EXTRACT]] to <8 x bfloat> +// CHECK32-NEXT: [[TMP1:%.*]] = bitcast <4 x i32> [[SRC_COERCE_FCA_1_EXTRACT]] to <8 x bfloat> +// CHECK32-NEXT: [[TMP2:%.*]] = bitcast <4 x i32> [[SRC_COERCE_FCA_2_EXTRACT]] to <8 x bfloat> +// CHECK32-NEXT: [[TMP3:%.*]] = bitcast bfloat* [[PTR:%.*]] to i8* +// CHECK32-NEXT: [[VLD3Q_LANE_V:%.*]] = tail call { <8 x bfloat>, <8 x bfloat>, <8 x bfloat> } @llvm.arm.neon.vld3lane.v8bf16.p0i8(i8* [[TMP3]], <8 x bfloat> [[TMP0]], <8 x bfloat> [[TMP1]], <8 x bfloat> [[TMP2]], i32 7, i32 2) +// CHECK32-NEXT: [[VLD3Q_LANE_V_FCA_0_EXTRACT:%.*]] = extractvalue { <8 x bfloat>, <8 x bfloat>, <8 x bfloat> } [[VLD3Q_LANE_V]], 0 +// CHECK32-NEXT: [[VLD3Q_LANE_V_FCA_1_EXTRACT:%.*]] = extractvalue { <8 x bfloat>, <8 x bfloat>, <8 x bfloat> } [[VLD3Q_LANE_V]], 1 +// CHECK32-NEXT: [[VLD3Q_LANE_V_FCA_2_EXTRACT:%.*]] = extractvalue { <8 x bfloat>, <8 x bfloat>, <8 x bfloat> } [[VLD3Q_LANE_V]], 2 +// CHECK32-NEXT: [[TMP4:%.*]] = bitcast <8 x bfloat> [[VLD3Q_LANE_V_FCA_0_EXTRACT]] to <4 x i32> +// CHECK32-NEXT: [[TMP5:%.*]] = bitcast <8 x bfloat> [[VLD3Q_LANE_V_FCA_1_EXTRACT]] to <4 x i32> +// CHECK32-NEXT: [[TMP6:%.*]] = bitcast <8 x bfloat> [[VLD3Q_LANE_V_FCA_2_EXTRACT]] to <4 x i32> +// CHECK32-NEXT: [[DOTFCA_0_INSERT:%.*]] = insertvalue [3 x <4 x i32>] undef, <4 x i32> [[TMP4]], 0 +// CHECK32-NEXT: [[DOTFCA_1_INSERT:%.*]] = insertvalue [3 x <4 x i32>] [[DOTFCA_0_INSERT]], <4 x i32> [[TMP5]], 1 +// CHECK32-NEXT: [[DOTFCA_2_INSERT:%.*]] = insertvalue [3 x <4 x i32>] [[DOTFCA_1_INSERT]], <4 x i32> [[TMP6]], 2 +// CHECK32-NEXT: ret [3 x <4 x i32>] [[DOTFCA_2_INSERT]] +// bfloat16x8x3_t test_vld3q_lane_bf16(bfloat16_t const *ptr, bfloat16x8x3_t src) { return vld3q_lane_bf16(ptr, src, 7); // return vld3q_lane_bf16(ptr, src, 8); } -// CHECK-LABEL: test_vld3q_lane_bf16 -// CHECK64: %vld3_lane = tail call { <8 x bfloat>, <8 x bfloat>, <8 x bfloat> } @llvm.aarch64.neon.ld3lane.v8bf16.p0i8(<8 x bfloat> %src.coerce.fca.0.extract, <8 x bfloat> %src.coerce.fca.1.extract, <8 x bfloat> %src.coerce.fca.2.extract, i64 7, i8* %0) -// CHECK32: %3 = bitcast bfloat* %ptr to i8* -// CHECK32-NEXT: %vld3q_lane_v = tail call { <8 x bfloat>, <8 x bfloat>, <8 x bfloat> } @llvm.arm.neon.vld3lane.v8bf16.p0i8(i8* %3, <8 x bfloat> %0, <8 x bfloat> %1, <8 x bfloat> %2, i32 7, i32 2) +// CHECK64-LABEL: @test_vld4_bf16( +// CHECK64-NEXT: entry: +// CHECK64-NEXT: [[TMP0:%.*]] = bitcast bfloat* [[PTR:%.*]] to <4 x bfloat>* +// CHECK64-NEXT: [[VLD4:%.*]] = tail call { <4 x bfloat>, <4 x bfloat>, <4 x bfloat>, <4 x bfloat> } @llvm.aarch64.neon.ld4.v4bf16.p0v4bf16(<4 x bfloat>* [[TMP0]]) +// CHECK64-NEXT: [[VLD4_FCA_0_EXTRACT:%.*]] = extractvalue { <4 x bfloat>, <4 x bfloat>, <4 x bfloat>, <4 x bfloat> } [[VLD4]], 0 +// CHECK64-NEXT: [[VLD4_FCA_1_EXTRACT:%.*]] = extractvalue { <4 x bfloat>, <4 x bfloat>, <4 x bfloat>, <4 x bfloat> } [[VLD4]], 1 +// CHECK64-NEXT: [[VLD4_FCA_2_EXTRACT:%.*]] = extractvalue { <4 x bfloat>, <4 x bfloat>, <4 x bfloat>, <4 x bfloat> } [[VLD4]], 2 +// CHECK64-NEXT: [[VLD4_FCA_3_EXTRACT:%.*]] = extractvalue { <4 x bfloat>, <4 x bfloat>, <4 x bfloat>, <4 x bfloat> } [[VLD4]], 3 +// CHECK64-NEXT: [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_BFLOAT16X4X4_T:%.*]] undef, <4 x bfloat> [[VLD4_FCA_0_EXTRACT]], 0, 0 +// CHECK64-NEXT: [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_BFLOAT16X4X4_T]] [[DOTFCA_0_0_INSERT]], <4 x bfloat> [[VLD4_FCA_1_EXTRACT]], 0, 1 +// CHECK64-NEXT: [[DOTFCA_0_2_INSERT:%.*]] = insertvalue [[STRUCT_BFLOAT16X4X4_T]] [[DOTFCA_0_1_INSERT]], <4 x bfloat> [[VLD4_FCA_2_EXTRACT]], 0, 2 +// CHECK64-NEXT: [[DOTFCA_0_3_INSERT:%.*]] = insertvalue [[STRUCT_BFLOAT16X4X4_T]] [[DOTFCA_0_2_INSERT]], <4 x bfloat> [[VLD4_FCA_3_EXTRACT]], 0, 3 +// CHECK64-NEXT: ret [[STRUCT_BFLOAT16X4X4_T]] [[DOTFCA_0_3_INSERT]] +// +// CHECK32-LABEL: @test_vld4_bf16( +// CHECK32-NEXT: entry: +// CHECK32-NEXT: [[TMP0:%.*]] = bitcast bfloat* [[PTR:%.*]] to i8* +// CHECK32-NEXT: [[VLD4_V:%.*]] = tail call { <4 x bfloat>, <4 x bfloat>, <4 x bfloat>, <4 x bfloat> } @llvm.arm.neon.vld4.v4bf16.p0i8(i8* [[TMP0]], i32 2) +// CHECK32-NEXT: [[VLD4_V_FCA_0_EXTRACT:%.*]] = extractvalue { <4 x bfloat>, <4 x bfloat>, <4 x bfloat>, <4 x bfloat> } [[VLD4_V]], 0 +// CHECK32-NEXT: [[VLD4_V_FCA_1_EXTRACT:%.*]] = extractvalue { <4 x bfloat>, <4 x bfloat>, <4 x bfloat>, <4 x bfloat> } [[VLD4_V]], 1 +// CHECK32-NEXT: [[VLD4_V_FCA_2_EXTRACT:%.*]] = extractvalue { <4 x bfloat>, <4 x bfloat>, <4 x bfloat>, <4 x bfloat> } [[VLD4_V]], 2 +// CHECK32-NEXT: [[VLD4_V_FCA_3_EXTRACT:%.*]] = extractvalue { <4 x bfloat>, <4 x bfloat>, <4 x bfloat>, <4 x bfloat> } [[VLD4_V]], 3 +// CHECK32-NEXT: [[TMP1:%.*]] = bitcast <4 x bfloat> [[VLD4_V_FCA_0_EXTRACT]] to <2 x i32> +// CHECK32-NEXT: [[TMP2:%.*]] = bitcast <4 x bfloat> [[VLD4_V_FCA_1_EXTRACT]] to <2 x i32> +// CHECK32-NEXT: [[TMP3:%.*]] = bitcast <4 x bfloat> [[VLD4_V_FCA_2_EXTRACT]] to <2 x i32> +// CHECK32-NEXT: [[TMP4:%.*]] = bitcast <4 x bfloat> [[VLD4_V_FCA_3_EXTRACT]] to <2 x i32> +// CHECK32-NEXT: [[DOTFCA_0_INSERT:%.*]] = insertvalue [4 x <2 x i32>] undef, <2 x i32> [[TMP1]], 0 +// CHECK32-NEXT: [[DOTFCA_1_INSERT:%.*]] = insertvalue [4 x <2 x i32>] [[DOTFCA_0_INSERT]], <2 x i32> [[TMP2]], 1 +// CHECK32-NEXT: [[DOTFCA_2_INSERT:%.*]] = insertvalue [4 x <2 x i32>] [[DOTFCA_1_INSERT]], <2 x i32> [[TMP3]], 2 +// CHECK32-NEXT: [[DOTFCA_3_INSERT:%.*]] = insertvalue [4 x <2 x i32>] [[DOTFCA_2_INSERT]], <2 x i32> [[TMP4]], 3 +// CHECK32-NEXT: ret [4 x <2 x i32>] [[DOTFCA_3_INSERT]] +// bfloat16x4x4_t test_vld4_bf16(bfloat16_t const *ptr) { return vld4_bf16(ptr); } -// CHECK-LABEL: test_vld4_bf16 -// CHECK64: %vld4 = tail call { <4 x bfloat>, <4 x bfloat>, <4 x bfloat>, <4 x bfloat> } @llvm.aarch64.neon.ld4.v4bf16.p0v4bf16(<4 x bfloat>* %0) -// CHECK32: %0 = bitcast bfloat* %ptr to i8* -// CHECK32-NEXT: %vld4_v = tail call { <4 x bfloat>, <4 x bfloat>, <4 x bfloat>, <4 x bfloat> } @llvm.arm.neon.vld4.v4bf16.p0i8(i8* %0, i32 2) +// CHECK64-LABEL: @test_vld4q_bf16( +// CHECK64-NEXT: entry: +// CHECK64-NEXT: [[TMP0:%.*]] = bitcast bfloat* [[PTR:%.*]] to <8 x bfloat>* +// CHECK64-NEXT: [[VLD4:%.*]] = tail call { <8 x bfloat>, <8 x bfloat>, <8 x bfloat>, <8 x bfloat> } @llvm.aarch64.neon.ld4.v8bf16.p0v8bf16(<8 x bfloat>* [[TMP0]]) +// CHECK64-NEXT: [[VLD4_FCA_0_EXTRACT:%.*]] = extractvalue { <8 x bfloat>, <8 x bfloat>, <8 x bfloat>, <8 x bfloat> } [[VLD4]], 0 +// CHECK64-NEXT: [[VLD4_FCA_1_EXTRACT:%.*]] = extractvalue { <8 x bfloat>, <8 x bfloat>, <8 x bfloat>, <8 x bfloat> } [[VLD4]], 1 +// CHECK64-NEXT: [[VLD4_FCA_2_EXTRACT:%.*]] = extractvalue { <8 x bfloat>, <8 x bfloat>, <8 x bfloat>, <8 x bfloat> } [[VLD4]], 2 +// CHECK64-NEXT: [[VLD4_FCA_3_EXTRACT:%.*]] = extractvalue { <8 x bfloat>, <8 x bfloat>, <8 x bfloat>, <8 x bfloat> } [[VLD4]], 3 +// CHECK64-NEXT: [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_BFLOAT16X8X4_T:%.*]] undef, <8 x bfloat> [[VLD4_FCA_0_EXTRACT]], 0, 0 +// CHECK64-NEXT: [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_BFLOAT16X8X4_T]] [[DOTFCA_0_0_INSERT]], <8 x bfloat> [[VLD4_FCA_1_EXTRACT]], 0, 1 +// CHECK64-NEXT: [[DOTFCA_0_2_INSERT:%.*]] = insertvalue [[STRUCT_BFLOAT16X8X4_T]] [[DOTFCA_0_1_INSERT]], <8 x bfloat> [[VLD4_FCA_2_EXTRACT]], 0, 2 +// CHECK64-NEXT: [[DOTFCA_0_3_INSERT:%.*]] = insertvalue [[STRUCT_BFLOAT16X8X4_T]] [[DOTFCA_0_2_INSERT]], <8 x bfloat> [[VLD4_FCA_3_EXTRACT]], 0, 3 +// CHECK64-NEXT: ret [[STRUCT_BFLOAT16X8X4_T]] [[DOTFCA_0_3_INSERT]] +// +// CHECK32-LABEL: @test_vld4q_bf16( +// CHECK32-NEXT: entry: +// CHECK32-NEXT: [[TMP0:%.*]] = bitcast bfloat* [[PTR:%.*]] to i8* +// CHECK32-NEXT: [[VLD4Q_V:%.*]] = tail call { <8 x bfloat>, <8 x bfloat>, <8 x bfloat>, <8 x bfloat> } @llvm.arm.neon.vld4.v8bf16.p0i8(i8* [[TMP0]], i32 2) +// CHECK32-NEXT: [[VLD4Q_V_FCA_0_EXTRACT:%.*]] = extractvalue { <8 x bfloat>, <8 x bfloat>, <8 x bfloat>, <8 x bfloat> } [[VLD4Q_V]], 0 +// CHECK32-NEXT: [[VLD4Q_V_FCA_1_EXTRACT:%.*]] = extractvalue { <8 x bfloat>, <8 x bfloat>, <8 x bfloat>, <8 x bfloat> } [[VLD4Q_V]], 1 +// CHECK32-NEXT: [[VLD4Q_V_FCA_2_EXTRACT:%.*]] = extractvalue { <8 x bfloat>, <8 x bfloat>, <8 x bfloat>, <8 x bfloat> } [[VLD4Q_V]], 2 +// CHECK32-NEXT: [[VLD4Q_V_FCA_3_EXTRACT:%.*]] = extractvalue { <8 x bfloat>, <8 x bfloat>, <8 x bfloat>, <8 x bfloat> } [[VLD4Q_V]], 3 +// CHECK32-NEXT: [[TMP1:%.*]] = bitcast <8 x bfloat> [[VLD4Q_V_FCA_0_EXTRACT]] to <4 x i32> +// CHECK32-NEXT: [[TMP2:%.*]] = bitcast <8 x bfloat> [[VLD4Q_V_FCA_1_EXTRACT]] to <4 x i32> +// CHECK32-NEXT: [[TMP3:%.*]] = bitcast <8 x bfloat> [[VLD4Q_V_FCA_2_EXTRACT]] to <4 x i32> +// CHECK32-NEXT: [[TMP4:%.*]] = bitcast <8 x bfloat> [[VLD4Q_V_FCA_3_EXTRACT]] to <4 x i32> +// CHECK32-NEXT: [[DOTFCA_0_INSERT:%.*]] = insertvalue [4 x <4 x i32>] undef, <4 x i32> [[TMP1]], 0 +// CHECK32-NEXT: [[DOTFCA_1_INSERT:%.*]] = insertvalue [4 x <4 x i32>] [[DOTFCA_0_INSERT]], <4 x i32> [[TMP2]], 1 +// CHECK32-NEXT: [[DOTFCA_2_INSERT:%.*]] = insertvalue [4 x <4 x i32>] [[DOTFCA_1_INSERT]], <4 x i32> [[TMP3]], 2 +// CHECK32-NEXT: [[DOTFCA_3_INSERT:%.*]] = insertvalue [4 x <4 x i32>] [[DOTFCA_2_INSERT]], <4 x i32> [[TMP4]], 3 +// CHECK32-NEXT: ret [4 x <4 x i32>] [[DOTFCA_3_INSERT]] +// bfloat16x8x4_t test_vld4q_bf16(bfloat16_t const *ptr) { return vld4q_bf16(ptr); } -// CHECK-LABEL: test_vld4q_bf16 -// CHECK64: %vld4 = tail call { <8 x bfloat>, <8 x bfloat>, <8 x bfloat>, <8 x bfloat> } @llvm.aarch64.neon.ld4.v8bf16.p0v8bf16(<8 x bfloat>* %0) -// CHECK32: %0 = bitcast bfloat* %ptr to i8* -// CHECK32-NEXT: %vld4q_v = tail call { <8 x bfloat>, <8 x bfloat>, <8 x bfloat>, <8 x bfloat> } @llvm.arm.neon.vld4.v8bf16.p0i8(i8* %0, i32 2) +// CHECK64-LABEL: @test_vld4_lane_bf16( +// CHECK64-NEXT: entry: +// CHECK64-NEXT: [[SRC_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [4 x <4 x bfloat>] [[SRC_COERCE:%.*]], 0 +// CHECK64-NEXT: [[SRC_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [4 x <4 x bfloat>] [[SRC_COERCE]], 1 +// CHECK64-NEXT: [[SRC_COERCE_FCA_2_EXTRACT:%.*]] = extractvalue [4 x <4 x bfloat>] [[SRC_COERCE]], 2 +// CHECK64-NEXT: [[SRC_COERCE_FCA_3_EXTRACT:%.*]] = extractvalue [4 x <4 x bfloat>] [[SRC_COERCE]], 3 +// CHECK64-NEXT: [[TMP0:%.*]] = bitcast bfloat* [[PTR:%.*]] to i8* +// CHECK64-NEXT: [[VLD4_LANE:%.*]] = tail call { <4 x bfloat>, <4 x bfloat>, <4 x bfloat>, <4 x bfloat> } @llvm.aarch64.neon.ld4lane.v4bf16.p0i8(<4 x bfloat> [[SRC_COERCE_FCA_0_EXTRACT]], <4 x bfloat> [[SRC_COERCE_FCA_1_EXTRACT]], <4 x bfloat> [[SRC_COERCE_FCA_2_EXTRACT]], <4 x bfloat> [[SRC_COERCE_FCA_3_EXTRACT]], i64 1, i8* [[TMP0]]) +// CHECK64-NEXT: [[VLD4_LANE_FCA_0_EXTRACT:%.*]] = extractvalue { <4 x bfloat>, <4 x bfloat>, <4 x bfloat>, <4 x bfloat> } [[VLD4_LANE]], 0 +// CHECK64-NEXT: [[VLD4_LANE_FCA_1_EXTRACT:%.*]] = extractvalue { <4 x bfloat>, <4 x bfloat>, <4 x bfloat>, <4 x bfloat> } [[VLD4_LANE]], 1 +// CHECK64-NEXT: [[VLD4_LANE_FCA_2_EXTRACT:%.*]] = extractvalue { <4 x bfloat>, <4 x bfloat>, <4 x bfloat>, <4 x bfloat> } [[VLD4_LANE]], 2 +// CHECK64-NEXT: [[VLD4_LANE_FCA_3_EXTRACT:%.*]] = extractvalue { <4 x bfloat>, <4 x bfloat>, <4 x bfloat>, <4 x bfloat> } [[VLD4_LANE]], 3 +// CHECK64-NEXT: [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_BFLOAT16X4X4_T:%.*]] undef, <4 x bfloat> [[VLD4_LANE_FCA_0_EXTRACT]], 0, 0 +// CHECK64-NEXT: [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_BFLOAT16X4X4_T]] [[DOTFCA_0_0_INSERT]], <4 x bfloat> [[VLD4_LANE_FCA_1_EXTRACT]], 0, 1 +// CHECK64-NEXT: [[DOTFCA_0_2_INSERT:%.*]] = insertvalue [[STRUCT_BFLOAT16X4X4_T]] [[DOTFCA_0_1_INSERT]], <4 x bfloat> [[VLD4_LANE_FCA_2_EXTRACT]], 0, 2 +// CHECK64-NEXT: [[DOTFCA_0_3_INSERT:%.*]] = insertvalue [[STRUCT_BFLOAT16X4X4_T]] [[DOTFCA_0_2_INSERT]], <4 x bfloat> [[VLD4_LANE_FCA_3_EXTRACT]], 0, 3 +// CHECK64-NEXT: ret [[STRUCT_BFLOAT16X4X4_T]] [[DOTFCA_0_3_INSERT]] +// +// CHECK32-LABEL: @test_vld4_lane_bf16( +// CHECK32-NEXT: entry: +// CHECK32-NEXT: [[SRC_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [4 x <2 x i32>] [[SRC_COERCE:%.*]], 0 +// CHECK32-NEXT: [[SRC_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [4 x <2 x i32>] [[SRC_COERCE]], 1 +// CHECK32-NEXT: [[SRC_COERCE_FCA_2_EXTRACT:%.*]] = extractvalue [4 x <2 x i32>] [[SRC_COERCE]], 2 +// CHECK32-NEXT: [[SRC_COERCE_FCA_3_EXTRACT:%.*]] = extractvalue [4 x <2 x i32>] [[SRC_COERCE]], 3 +// CHECK32-NEXT: [[TMP0:%.*]] = bitcast <2 x i32> [[SRC_COERCE_FCA_0_EXTRACT]] to <4 x bfloat> +// CHECK32-NEXT: [[TMP1:%.*]] = bitcast <2 x i32> [[SRC_COERCE_FCA_1_EXTRACT]] to <4 x bfloat> +// CHECK32-NEXT: [[TMP2:%.*]] = bitcast <2 x i32> [[SRC_COERCE_FCA_2_EXTRACT]] to <4 x bfloat> +// CHECK32-NEXT: [[TMP3:%.*]] = bitcast <2 x i32> [[SRC_COERCE_FCA_3_EXTRACT]] to <4 x bfloat> +// CHECK32-NEXT: [[TMP4:%.*]] = bitcast bfloat* [[PTR:%.*]] to i8* +// CHECK32-NEXT: [[VLD4_LANE_V:%.*]] = tail call { <4 x bfloat>, <4 x bfloat>, <4 x bfloat>, <4 x bfloat> } @llvm.arm.neon.vld4lane.v4bf16.p0i8(i8* [[TMP4]], <4 x bfloat> [[TMP0]], <4 x bfloat> [[TMP1]], <4 x bfloat> [[TMP2]], <4 x bfloat> [[TMP3]], i32 1, i32 2) +// CHECK32-NEXT: [[VLD4_LANE_V_FCA_0_EXTRACT:%.*]] = extractvalue { <4 x bfloat>, <4 x bfloat>, <4 x bfloat>, <4 x bfloat> } [[VLD4_LANE_V]], 0 +// CHECK32-NEXT: [[VLD4_LANE_V_FCA_1_EXTRACT:%.*]] = extractvalue { <4 x bfloat>, <4 x bfloat>, <4 x bfloat>, <4 x bfloat> } [[VLD4_LANE_V]], 1 +// CHECK32-NEXT: [[VLD4_LANE_V_FCA_2_EXTRACT:%.*]] = extractvalue { <4 x bfloat>, <4 x bfloat>, <4 x bfloat>, <4 x bfloat> } [[VLD4_LANE_V]], 2 +// CHECK32-NEXT: [[VLD4_LANE_V_FCA_3_EXTRACT:%.*]] = extractvalue { <4 x bfloat>, <4 x bfloat>, <4 x bfloat>, <4 x bfloat> } [[VLD4_LANE_V]], 3 +// CHECK32-NEXT: [[TMP5:%.*]] = bitcast <4 x bfloat> [[VLD4_LANE_V_FCA_0_EXTRACT]] to <2 x i32> +// CHECK32-NEXT: [[TMP6:%.*]] = bitcast <4 x bfloat> [[VLD4_LANE_V_FCA_1_EXTRACT]] to <2 x i32> +// CHECK32-NEXT: [[TMP7:%.*]] = bitcast <4 x bfloat> [[VLD4_LANE_V_FCA_2_EXTRACT]] to <2 x i32> +// CHECK32-NEXT: [[TMP8:%.*]] = bitcast <4 x bfloat> [[VLD4_LANE_V_FCA_3_EXTRACT]] to <2 x i32> +// CHECK32-NEXT: [[DOTFCA_0_INSERT:%.*]] = insertvalue [4 x <2 x i32>] undef, <2 x i32> [[TMP5]], 0 +// CHECK32-NEXT: [[DOTFCA_1_INSERT:%.*]] = insertvalue [4 x <2 x i32>] [[DOTFCA_0_INSERT]], <2 x i32> [[TMP6]], 1 +// CHECK32-NEXT: [[DOTFCA_2_INSERT:%.*]] = insertvalue [4 x <2 x i32>] [[DOTFCA_1_INSERT]], <2 x i32> [[TMP7]], 2 +// CHECK32-NEXT: [[DOTFCA_3_INSERT:%.*]] = insertvalue [4 x <2 x i32>] [[DOTFCA_2_INSERT]], <2 x i32> [[TMP8]], 3 +// CHECK32-NEXT: ret [4 x <2 x i32>] [[DOTFCA_3_INSERT]] +// bfloat16x4x4_t test_vld4_lane_bf16(bfloat16_t const *ptr, bfloat16x4x4_t src) { return vld4_lane_bf16(ptr, src, 1); } -// CHECK-LABEL: test_vld4_lane_bf16 -// CHECK64: %vld4_lane = tail call { <4 x bfloat>, <4 x bfloat>, <4 x bfloat>, <4 x bfloat> } @llvm.aarch64.neon.ld4lane.v4bf16.p0i8(<4 x bfloat> %src.coerce.fca.0.extract, <4 x bfloat> %src.coerce.fca.1.extract, <4 x bfloat> %src.coerce.fca.2.extract, <4 x bfloat> %src.coerce.fca.3.extract, i64 1, i8* %0) -// CHECK32: %4 = bitcast bfloat* %ptr to i8* -// CHECK32-NEXT: %vld4_lane_v = tail call { <4 x bfloat>, <4 x bfloat>, <4 x bfloat>, <4 x bfloat> } @llvm.arm.neon.vld4lane.v4bf16.p0i8(i8* %4, <4 x bfloat> %0, <4 x bfloat> %1, <4 x bfloat> %2, <4 x bfloat> %3, i32 1, i32 2) +// CHECK64-LABEL: @test_vld4q_lane_bf16( +// CHECK64-NEXT: entry: +// CHECK64-NEXT: [[SRC_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [4 x <8 x bfloat>] [[SRC_COERCE:%.*]], 0 +// CHECK64-NEXT: [[SRC_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [4 x <8 x bfloat>] [[SRC_COERCE]], 1 +// CHECK64-NEXT: [[SRC_COERCE_FCA_2_EXTRACT:%.*]] = extractvalue [4 x <8 x bfloat>] [[SRC_COERCE]], 2 +// CHECK64-NEXT: [[SRC_COERCE_FCA_3_EXTRACT:%.*]] = extractvalue [4 x <8 x bfloat>] [[SRC_COERCE]], 3 +// CHECK64-NEXT: [[TMP0:%.*]] = bitcast bfloat* [[PTR:%.*]] to i8* +// CHECK64-NEXT: [[VLD4_LANE:%.*]] = tail call { <8 x bfloat>, <8 x bfloat>, <8 x bfloat>, <8 x bfloat> } @llvm.aarch64.neon.ld4lane.v8bf16.p0i8(<8 x bfloat> [[SRC_COERCE_FCA_0_EXTRACT]], <8 x bfloat> [[SRC_COERCE_FCA_1_EXTRACT]], <8 x bfloat> [[SRC_COERCE_FCA_2_EXTRACT]], <8 x bfloat> [[SRC_COERCE_FCA_3_EXTRACT]], i64 7, i8* [[TMP0]]) +// CHECK64-NEXT: [[VLD4_LANE_FCA_0_EXTRACT:%.*]] = extractvalue { <8 x bfloat>, <8 x bfloat>, <8 x bfloat>, <8 x bfloat> } [[VLD4_LANE]], 0 +// CHECK64-NEXT: [[VLD4_LANE_FCA_1_EXTRACT:%.*]] = extractvalue { <8 x bfloat>, <8 x bfloat>, <8 x bfloat>, <8 x bfloat> } [[VLD4_LANE]], 1 +// CHECK64-NEXT: [[VLD4_LANE_FCA_2_EXTRACT:%.*]] = extractvalue { <8 x bfloat>, <8 x bfloat>, <8 x bfloat>, <8 x bfloat> } [[VLD4_LANE]], 2 +// CHECK64-NEXT: [[VLD4_LANE_FCA_3_EXTRACT:%.*]] = extractvalue { <8 x bfloat>, <8 x bfloat>, <8 x bfloat>, <8 x bfloat> } [[VLD4_LANE]], 3 +// CHECK64-NEXT: [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_BFLOAT16X8X4_T:%.*]] undef, <8 x bfloat> [[VLD4_LANE_FCA_0_EXTRACT]], 0, 0 +// CHECK64-NEXT: [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_BFLOAT16X8X4_T]] [[DOTFCA_0_0_INSERT]], <8 x bfloat> [[VLD4_LANE_FCA_1_EXTRACT]], 0, 1 +// CHECK64-NEXT: [[DOTFCA_0_2_INSERT:%.*]] = insertvalue [[STRUCT_BFLOAT16X8X4_T]] [[DOTFCA_0_1_INSERT]], <8 x bfloat> [[VLD4_LANE_FCA_2_EXTRACT]], 0, 2 +// CHECK64-NEXT: [[DOTFCA_0_3_INSERT:%.*]] = insertvalue [[STRUCT_BFLOAT16X8X4_T]] [[DOTFCA_0_2_INSERT]], <8 x bfloat> [[VLD4_LANE_FCA_3_EXTRACT]], 0, 3 +// CHECK64-NEXT: ret [[STRUCT_BFLOAT16X8X4_T]] [[DOTFCA_0_3_INSERT]] +// +// CHECK32-LABEL: @test_vld4q_lane_bf16( +// CHECK32-NEXT: entry: +// CHECK32-NEXT: [[SRC_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [4 x <4 x i32>] [[SRC_COERCE:%.*]], 0 +// CHECK32-NEXT: [[SRC_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [4 x <4 x i32>] [[SRC_COERCE]], 1 +// CHECK32-NEXT: [[SRC_COERCE_FCA_2_EXTRACT:%.*]] = extractvalue [4 x <4 x i32>] [[SRC_COERCE]], 2 +// CHECK32-NEXT: [[SRC_COERCE_FCA_3_EXTRACT:%.*]] = extractvalue [4 x <4 x i32>] [[SRC_COERCE]], 3 +// CHECK32-NEXT: [[TMP0:%.*]] = bitcast <4 x i32> [[SRC_COERCE_FCA_0_EXTRACT]] to <8 x bfloat> +// CHECK32-NEXT: [[TMP1:%.*]] = bitcast <4 x i32> [[SRC_COERCE_FCA_1_EXTRACT]] to <8 x bfloat> +// CHECK32-NEXT: [[TMP2:%.*]] = bitcast <4 x i32> [[SRC_COERCE_FCA_2_EXTRACT]] to <8 x bfloat> +// CHECK32-NEXT: [[TMP3:%.*]] = bitcast <4 x i32> [[SRC_COERCE_FCA_3_EXTRACT]] to <8 x bfloat> +// CHECK32-NEXT: [[TMP4:%.*]] = bitcast bfloat* [[PTR:%.*]] to i8* +// CHECK32-NEXT: [[VLD4Q_LANE_V:%.*]] = tail call { <8 x bfloat>, <8 x bfloat>, <8 x bfloat>, <8 x bfloat> } @llvm.arm.neon.vld4lane.v8bf16.p0i8(i8* [[TMP4]], <8 x bfloat> [[TMP0]], <8 x bfloat> [[TMP1]], <8 x bfloat> [[TMP2]], <8 x bfloat> [[TMP3]], i32 7, i32 2) +// CHECK32-NEXT: [[VLD4Q_LANE_V_FCA_0_EXTRACT:%.*]] = extractvalue { <8 x bfloat>, <8 x bfloat>, <8 x bfloat>, <8 x bfloat> } [[VLD4Q_LANE_V]], 0 +// CHECK32-NEXT: [[VLD4Q_LANE_V_FCA_1_EXTRACT:%.*]] = extractvalue { <8 x bfloat>, <8 x bfloat>, <8 x bfloat>, <8 x bfloat> } [[VLD4Q_LANE_V]], 1 +// CHECK32-NEXT: [[VLD4Q_LANE_V_FCA_2_EXTRACT:%.*]] = extractvalue { <8 x bfloat>, <8 x bfloat>, <8 x bfloat>, <8 x bfloat> } [[VLD4Q_LANE_V]], 2 +// CHECK32-NEXT: [[VLD4Q_LANE_V_FCA_3_EXTRACT:%.*]] = extractvalue { <8 x bfloat>, <8 x bfloat>, <8 x bfloat>, <8 x bfloat> } [[VLD4Q_LANE_V]], 3 +// CHECK32-NEXT: [[TMP5:%.*]] = bitcast <8 x bfloat> [[VLD4Q_LANE_V_FCA_0_EXTRACT]] to <4 x i32> +// CHECK32-NEXT: [[TMP6:%.*]] = bitcast <8 x bfloat> [[VLD4Q_LANE_V_FCA_1_EXTRACT]] to <4 x i32> +// CHECK32-NEXT: [[TMP7:%.*]] = bitcast <8 x bfloat> [[VLD4Q_LANE_V_FCA_2_EXTRACT]] to <4 x i32> +// CHECK32-NEXT: [[TMP8:%.*]] = bitcast <8 x bfloat> [[VLD4Q_LANE_V_FCA_3_EXTRACT]] to <4 x i32> +// CHECK32-NEXT: [[DOTFCA_0_INSERT:%.*]] = insertvalue [4 x <4 x i32>] undef, <4 x i32> [[TMP5]], 0 +// CHECK32-NEXT: [[DOTFCA_1_INSERT:%.*]] = insertvalue [4 x <4 x i32>] [[DOTFCA_0_INSERT]], <4 x i32> [[TMP6]], 1 +// CHECK32-NEXT: [[DOTFCA_2_INSERT:%.*]] = insertvalue [4 x <4 x i32>] [[DOTFCA_1_INSERT]], <4 x i32> [[TMP7]], 2 +// CHECK32-NEXT: [[DOTFCA_3_INSERT:%.*]] = insertvalue [4 x <4 x i32>] [[DOTFCA_2_INSERT]], <4 x i32> [[TMP8]], 3 +// CHECK32-NEXT: ret [4 x <4 x i32>] [[DOTFCA_3_INSERT]] +// bfloat16x8x4_t test_vld4q_lane_bf16(bfloat16_t const *ptr, bfloat16x8x4_t src) { return vld4q_lane_bf16(ptr, src, 7); } -// CHECK-LABEL: test_vld4q_lane_bf16 -// CHECK64: %vld4_lane = tail call { <8 x bfloat>, <8 x bfloat>, <8 x bfloat>, <8 x bfloat> } @llvm.aarch64.neon.ld4lane.v8bf16.p0i8(<8 x bfloat> %src.coerce.fca.0.extract, <8 x bfloat> %src.coerce.fca.1.extract, <8 x bfloat> %src.coerce.fca.2.extract, <8 x bfloat> %src.coerce.fca.3.extract, i64 7, i8* %0) -// CHECK32: %4 = bitcast bfloat* %ptr to i8* -// CHECK32-NEXT: %vld4q_lane_v = tail call { <8 x bfloat>, <8 x bfloat>, <8 x bfloat>, <8 x bfloat> } @llvm.arm.neon.vld4lane.v8bf16.p0i8(i8* %4, <8 x bfloat> %0, <8 x bfloat> %1, <8 x bfloat> %2, <8 x bfloat> %3, i32 7, i32 2) +// CHECK64-LABEL: @test_vld2_dup_bf16( +// CHECK64-NEXT: entry: +// CHECK64-NEXT: [[VLD2:%.*]] = tail call { <4 x bfloat>, <4 x bfloat> } @llvm.aarch64.neon.ld2r.v4bf16.p0bf16(bfloat* [[PTR:%.*]]) +// CHECK64-NEXT: [[VLD2_FCA_0_EXTRACT:%.*]] = extractvalue { <4 x bfloat>, <4 x bfloat> } [[VLD2]], 0 +// CHECK64-NEXT: [[VLD2_FCA_1_EXTRACT:%.*]] = extractvalue { <4 x bfloat>, <4 x bfloat> } [[VLD2]], 1 +// CHECK64-NEXT: [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_BFLOAT16X4X2_T:%.*]] undef, <4 x bfloat> [[VLD2_FCA_0_EXTRACT]], 0, 0 +// CHECK64-NEXT: [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_BFLOAT16X4X2_T]] [[DOTFCA_0_0_INSERT]], <4 x bfloat> [[VLD2_FCA_1_EXTRACT]], 0, 1 +// CHECK64-NEXT: ret [[STRUCT_BFLOAT16X4X2_T]] [[DOTFCA_0_1_INSERT]] +// +// CHECK32-LABEL: @test_vld2_dup_bf16( +// CHECK32-NEXT: entry: +// CHECK32-NEXT: [[TMP0:%.*]] = bitcast bfloat* [[PTR:%.*]] to i8* +// CHECK32-NEXT: [[VLD2_DUP_V:%.*]] = tail call { <4 x bfloat>, <4 x bfloat> } @llvm.arm.neon.vld2dup.v4bf16.p0i8(i8* [[TMP0]], i32 2) +// CHECK32-NEXT: [[VLD2_DUP_V_FCA_0_EXTRACT:%.*]] = extractvalue { <4 x bfloat>, <4 x bfloat> } [[VLD2_DUP_V]], 0 +// CHECK32-NEXT: [[VLD2_DUP_V_FCA_1_EXTRACT:%.*]] = extractvalue { <4 x bfloat>, <4 x bfloat> } [[VLD2_DUP_V]], 1 +// CHECK32-NEXT: [[TMP1:%.*]] = bitcast <4 x bfloat> [[VLD2_DUP_V_FCA_0_EXTRACT]] to <2 x i32> +// CHECK32-NEXT: [[TMP2:%.*]] = bitcast <4 x bfloat> [[VLD2_DUP_V_FCA_1_EXTRACT]] to <2 x i32> +// CHECK32-NEXT: [[DOTFCA_0_INSERT:%.*]] = insertvalue [2 x <2 x i32>] undef, <2 x i32> [[TMP1]], 0 +// CHECK32-NEXT: [[DOTFCA_1_INSERT:%.*]] = insertvalue [2 x <2 x i32>] [[DOTFCA_0_INSERT]], <2 x i32> [[TMP2]], 1 +// CHECK32-NEXT: ret [2 x <2 x i32>] [[DOTFCA_1_INSERT]] +// bfloat16x4x2_t test_vld2_dup_bf16(bfloat16_t const *ptr) { return vld2_dup_bf16(ptr); } -// CHECK-LABEL: test_vld2_dup_bf16 -// CHECK64: %vld2 = tail call { <4 x bfloat>, <4 x bfloat> } @llvm.aarch64.neon.ld2r.v4bf16.p0bf16(bfloat* %ptr) -// CHECK32: %vld2_dup_v = tail call { <4 x bfloat>, <4 x bfloat> } @llvm.arm.neon.vld2dup.v4bf16.p0i8(i8* %0, i32 2) +// CHECK64-LABEL: @test_vld2q_dup_bf16( +// CHECK64-NEXT: entry: +// CHECK64-NEXT: [[VLD2:%.*]] = tail call { <8 x bfloat>, <8 x bfloat> } @llvm.aarch64.neon.ld2r.v8bf16.p0bf16(bfloat* [[PTR:%.*]]) +// CHECK64-NEXT: [[VLD2_FCA_0_EXTRACT:%.*]] = extractvalue { <8 x bfloat>, <8 x bfloat> } [[VLD2]], 0 +// CHECK64-NEXT: [[VLD2_FCA_1_EXTRACT:%.*]] = extractvalue { <8 x bfloat>, <8 x bfloat> } [[VLD2]], 1 +// CHECK64-NEXT: [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_BFLOAT16X8X2_T:%.*]] undef, <8 x bfloat> [[VLD2_FCA_0_EXTRACT]], 0, 0 +// CHECK64-NEXT: [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_BFLOAT16X8X2_T]] [[DOTFCA_0_0_INSERT]], <8 x bfloat> [[VLD2_FCA_1_EXTRACT]], 0, 1 +// CHECK64-NEXT: ret [[STRUCT_BFLOAT16X8X2_T]] [[DOTFCA_0_1_INSERT]] +// +// CHECK32-LABEL: @test_vld2q_dup_bf16( +// CHECK32-NEXT: entry: +// CHECK32-NEXT: [[TMP0:%.*]] = bitcast bfloat* [[PTR:%.*]] to i8* +// CHECK32-NEXT: [[VLD2Q_DUP_V:%.*]] = tail call { <8 x bfloat>, <8 x bfloat> } @llvm.arm.neon.vld2dup.v8bf16.p0i8(i8* [[TMP0]], i32 2) +// CHECK32-NEXT: [[VLD2Q_DUP_V_FCA_0_EXTRACT:%.*]] = extractvalue { <8 x bfloat>, <8 x bfloat> } [[VLD2Q_DUP_V]], 0 +// CHECK32-NEXT: [[VLD2Q_DUP_V_FCA_1_EXTRACT:%.*]] = extractvalue { <8 x bfloat>, <8 x bfloat> } [[VLD2Q_DUP_V]], 1 +// CHECK32-NEXT: [[TMP1:%.*]] = bitcast <8 x bfloat> [[VLD2Q_DUP_V_FCA_0_EXTRACT]] to <4 x i32> +// CHECK32-NEXT: [[TMP2:%.*]] = bitcast <8 x bfloat> [[VLD2Q_DUP_V_FCA_1_EXTRACT]] to <4 x i32> +// CHECK32-NEXT: [[DOTFCA_0_INSERT:%.*]] = insertvalue [2 x <4 x i32>] undef, <4 x i32> [[TMP1]], 0 +// CHECK32-NEXT: [[DOTFCA_1_INSERT:%.*]] = insertvalue [2 x <4 x i32>] [[DOTFCA_0_INSERT]], <4 x i32> [[TMP2]], 1 +// CHECK32-NEXT: ret [2 x <4 x i32>] [[DOTFCA_1_INSERT]] +// bfloat16x8x2_t test_vld2q_dup_bf16(bfloat16_t const *ptr) { return vld2q_dup_bf16(ptr); } -// CHECK-LABEL: test_vld2q_dup_bf16 -// CHECK64: %vld2 = tail call { <8 x bfloat>, <8 x bfloat> } @llvm.aarch64.neon.ld2r.v8bf16.p0bf16(bfloat* %ptr) -// CHECK32: %vld2q_dup_v = tail call { <8 x bfloat>, <8 x bfloat> } @llvm.arm.neon.vld2dup.v8bf16.p0i8(i8* %0, i32 2) +// CHECK64-LABEL: @test_vld3_dup_bf16( +// CHECK64-NEXT: entry: +// CHECK64-NEXT: [[VLD3:%.*]] = tail call { <4 x bfloat>, <4 x bfloat>, <4 x bfloat> } @llvm.aarch64.neon.ld3r.v4bf16.p0bf16(bfloat* [[PTR:%.*]]) +// CHECK64-NEXT: [[VLD3_FCA_0_EXTRACT:%.*]] = extractvalue { <4 x bfloat>, <4 x bfloat>, <4 x bfloat> } [[VLD3]], 0 +// CHECK64-NEXT: [[VLD3_FCA_1_EXTRACT:%.*]] = extractvalue { <4 x bfloat>, <4 x bfloat>, <4 x bfloat> } [[VLD3]], 1 +// CHECK64-NEXT: [[VLD3_FCA_2_EXTRACT:%.*]] = extractvalue { <4 x bfloat>, <4 x bfloat>, <4 x bfloat> } [[VLD3]], 2 +// CHECK64-NEXT: [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_BFLOAT16X4X3_T:%.*]] undef, <4 x bfloat> [[VLD3_FCA_0_EXTRACT]], 0, 0 +// CHECK64-NEXT: [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_BFLOAT16X4X3_T]] [[DOTFCA_0_0_INSERT]], <4 x bfloat> [[VLD3_FCA_1_EXTRACT]], 0, 1 +// CHECK64-NEXT: [[DOTFCA_0_2_INSERT:%.*]] = insertvalue [[STRUCT_BFLOAT16X4X3_T]] [[DOTFCA_0_1_INSERT]], <4 x bfloat> [[VLD3_FCA_2_EXTRACT]], 0, 2 +// CHECK64-NEXT: ret [[STRUCT_BFLOAT16X4X3_T]] [[DOTFCA_0_2_INSERT]] +// +// CHECK32-LABEL: @test_vld3_dup_bf16( +// CHECK32-NEXT: entry: +// CHECK32-NEXT: [[TMP0:%.*]] = bitcast bfloat* [[PTR:%.*]] to i8* +// CHECK32-NEXT: [[VLD3_DUP_V:%.*]] = tail call { <4 x bfloat>, <4 x bfloat>, <4 x bfloat> } @llvm.arm.neon.vld3dup.v4bf16.p0i8(i8* [[TMP0]], i32 2) +// CHECK32-NEXT: [[VLD3_DUP_V_FCA_0_EXTRACT:%.*]] = extractvalue { <4 x bfloat>, <4 x bfloat>, <4 x bfloat> } [[VLD3_DUP_V]], 0 +// CHECK32-NEXT: [[VLD3_DUP_V_FCA_1_EXTRACT:%.*]] = extractvalue { <4 x bfloat>, <4 x bfloat>, <4 x bfloat> } [[VLD3_DUP_V]], 1 +// CHECK32-NEXT: [[VLD3_DUP_V_FCA_2_EXTRACT:%.*]] = extractvalue { <4 x bfloat>, <4 x bfloat>, <4 x bfloat> } [[VLD3_DUP_V]], 2 +// CHECK32-NEXT: [[TMP1:%.*]] = bitcast <4 x bfloat> [[VLD3_DUP_V_FCA_0_EXTRACT]] to <2 x i32> +// CHECK32-NEXT: [[TMP2:%.*]] = bitcast <4 x bfloat> [[VLD3_DUP_V_FCA_1_EXTRACT]] to <2 x i32> +// CHECK32-NEXT: [[TMP3:%.*]] = bitcast <4 x bfloat> [[VLD3_DUP_V_FCA_2_EXTRACT]] to <2 x i32> +// CHECK32-NEXT: [[DOTFCA_0_INSERT:%.*]] = insertvalue [3 x <2 x i32>] undef, <2 x i32> [[TMP1]], 0 +// CHECK32-NEXT: [[DOTFCA_1_INSERT:%.*]] = insertvalue [3 x <2 x i32>] [[DOTFCA_0_INSERT]], <2 x i32> [[TMP2]], 1 +// CHECK32-NEXT: [[DOTFCA_2_INSERT:%.*]] = insertvalue [3 x <2 x i32>] [[DOTFCA_1_INSERT]], <2 x i32> [[TMP3]], 2 +// CHECK32-NEXT: ret [3 x <2 x i32>] [[DOTFCA_2_INSERT]] +// bfloat16x4x3_t test_vld3_dup_bf16(bfloat16_t const *ptr) { return vld3_dup_bf16(ptr); } -// CHECK-LABEL: test_vld3_dup_bf16 -// CHECK64: %vld3 = tail call { <4 x bfloat>, <4 x bfloat>, <4 x bfloat> } @llvm.aarch64.neon.ld3r.v4bf16.p0bf16(bfloat* %ptr) -// CHECK32: %vld3_dup_v = tail call { <4 x bfloat>, <4 x bfloat>, <4 x bfloat> } @llvm.arm.neon.vld3dup.v4bf16.p0i8(i8* %0, i32 2) +// CHECK64-LABEL: @test_vld3q_dup_bf16( +// CHECK64-NEXT: entry: +// CHECK64-NEXT: [[VLD3:%.*]] = tail call { <8 x bfloat>, <8 x bfloat>, <8 x bfloat> } @llvm.aarch64.neon.ld3r.v8bf16.p0bf16(bfloat* [[PTR:%.*]]) +// CHECK64-NEXT: [[VLD3_FCA_0_EXTRACT:%.*]] = extractvalue { <8 x bfloat>, <8 x bfloat>, <8 x bfloat> } [[VLD3]], 0 +// CHECK64-NEXT: [[VLD3_FCA_1_EXTRACT:%.*]] = extractvalue { <8 x bfloat>, <8 x bfloat>, <8 x bfloat> } [[VLD3]], 1 +// CHECK64-NEXT: [[VLD3_FCA_2_EXTRACT:%.*]] = extractvalue { <8 x bfloat>, <8 x bfloat>, <8 x bfloat> } [[VLD3]], 2 +// CHECK64-NEXT: [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_BFLOAT16X8X3_T:%.*]] undef, <8 x bfloat> [[VLD3_FCA_0_EXTRACT]], 0, 0 +// CHECK64-NEXT: [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_BFLOAT16X8X3_T]] [[DOTFCA_0_0_INSERT]], <8 x bfloat> [[VLD3_FCA_1_EXTRACT]], 0, 1 +// CHECK64-NEXT: [[DOTFCA_0_2_INSERT:%.*]] = insertvalue [[STRUCT_BFLOAT16X8X3_T]] [[DOTFCA_0_1_INSERT]], <8 x bfloat> [[VLD3_FCA_2_EXTRACT]], 0, 2 +// CHECK64-NEXT: ret [[STRUCT_BFLOAT16X8X3_T]] [[DOTFCA_0_2_INSERT]] +// +// CHECK32-LABEL: @test_vld3q_dup_bf16( +// CHECK32-NEXT: entry: +// CHECK32-NEXT: [[TMP0:%.*]] = bitcast bfloat* [[PTR:%.*]] to i8* +// CHECK32-NEXT: [[VLD3Q_DUP_V:%.*]] = tail call { <8 x bfloat>, <8 x bfloat>, <8 x bfloat> } @llvm.arm.neon.vld3dup.v8bf16.p0i8(i8* [[TMP0]], i32 2) +// CHECK32-NEXT: [[VLD3Q_DUP_V_FCA_0_EXTRACT:%.*]] = extractvalue { <8 x bfloat>, <8 x bfloat>, <8 x bfloat> } [[VLD3Q_DUP_V]], 0 +// CHECK32-NEXT: [[VLD3Q_DUP_V_FCA_1_EXTRACT:%.*]] = extractvalue { <8 x bfloat>, <8 x bfloat>, <8 x bfloat> } [[VLD3Q_DUP_V]], 1 +// CHECK32-NEXT: [[VLD3Q_DUP_V_FCA_2_EXTRACT:%.*]] = extractvalue { <8 x bfloat>, <8 x bfloat>, <8 x bfloat> } [[VLD3Q_DUP_V]], 2 +// CHECK32-NEXT: [[TMP1:%.*]] = bitcast <8 x bfloat> [[VLD3Q_DUP_V_FCA_0_EXTRACT]] to <4 x i32> +// CHECK32-NEXT: [[TMP2:%.*]] = bitcast <8 x bfloat> [[VLD3Q_DUP_V_FCA_1_EXTRACT]] to <4 x i32> +// CHECK32-NEXT: [[TMP3:%.*]] = bitcast <8 x bfloat> [[VLD3Q_DUP_V_FCA_2_EXTRACT]] to <4 x i32> +// CHECK32-NEXT: [[DOTFCA_0_INSERT:%.*]] = insertvalue [3 x <4 x i32>] undef, <4 x i32> [[TMP1]], 0 +// CHECK32-NEXT: [[DOTFCA_1_INSERT:%.*]] = insertvalue [3 x <4 x i32>] [[DOTFCA_0_INSERT]], <4 x i32> [[TMP2]], 1 +// CHECK32-NEXT: [[DOTFCA_2_INSERT:%.*]] = insertvalue [3 x <4 x i32>] [[DOTFCA_1_INSERT]], <4 x i32> [[TMP3]], 2 +// CHECK32-NEXT: ret [3 x <4 x i32>] [[DOTFCA_2_INSERT]] +// bfloat16x8x3_t test_vld3q_dup_bf16(bfloat16_t const *ptr) { return vld3q_dup_bf16(ptr); } -// CHECK-LABEL: test_vld3q_dup_bf16 -// CHECK64: %vld3 = tail call { <8 x bfloat>, <8 x bfloat>, <8 x bfloat> } @llvm.aarch64.neon.ld3r.v8bf16.p0bf16(bfloat* %ptr) -// CHECK32: %vld3q_dup_v = tail call { <8 x bfloat>, <8 x bfloat>, <8 x bfloat> } @llvm.arm.neon.vld3dup.v8bf16.p0i8(i8* %0, i32 2) +// CHECK64-LABEL: @test_vld4_dup_bf16( +// CHECK64-NEXT: entry: +// CHECK64-NEXT: [[VLD4:%.*]] = tail call { <4 x bfloat>, <4 x bfloat>, <4 x bfloat>, <4 x bfloat> } @llvm.aarch64.neon.ld4r.v4bf16.p0bf16(bfloat* [[PTR:%.*]]) +// CHECK64-NEXT: [[VLD4_FCA_0_EXTRACT:%.*]] = extractvalue { <4 x bfloat>, <4 x bfloat>, <4 x bfloat>, <4 x bfloat> } [[VLD4]], 0 +// CHECK64-NEXT: [[VLD4_FCA_1_EXTRACT:%.*]] = extractvalue { <4 x bfloat>, <4 x bfloat>, <4 x bfloat>, <4 x bfloat> } [[VLD4]], 1 +// CHECK64-NEXT: [[VLD4_FCA_2_EXTRACT:%.*]] = extractvalue { <4 x bfloat>, <4 x bfloat>, <4 x bfloat>, <4 x bfloat> } [[VLD4]], 2 +// CHECK64-NEXT: [[VLD4_FCA_3_EXTRACT:%.*]] = extractvalue { <4 x bfloat>, <4 x bfloat>, <4 x bfloat>, <4 x bfloat> } [[VLD4]], 3 +// CHECK64-NEXT: [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_BFLOAT16X4X4_T:%.*]] undef, <4 x bfloat> [[VLD4_FCA_0_EXTRACT]], 0, 0 +// CHECK64-NEXT: [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_BFLOAT16X4X4_T]] [[DOTFCA_0_0_INSERT]], <4 x bfloat> [[VLD4_FCA_1_EXTRACT]], 0, 1 +// CHECK64-NEXT: [[DOTFCA_0_2_INSERT:%.*]] = insertvalue [[STRUCT_BFLOAT16X4X4_T]] [[DOTFCA_0_1_INSERT]], <4 x bfloat> [[VLD4_FCA_2_EXTRACT]], 0, 2 +// CHECK64-NEXT: [[DOTFCA_0_3_INSERT:%.*]] = insertvalue [[STRUCT_BFLOAT16X4X4_T]] [[DOTFCA_0_2_INSERT]], <4 x bfloat> [[VLD4_FCA_3_EXTRACT]], 0, 3 +// CHECK64-NEXT: ret [[STRUCT_BFLOAT16X4X4_T]] [[DOTFCA_0_3_INSERT]] +// +// CHECK32-LABEL: @test_vld4_dup_bf16( +// CHECK32-NEXT: entry: +// CHECK32-NEXT: [[TMP0:%.*]] = bitcast bfloat* [[PTR:%.*]] to i8* +// CHECK32-NEXT: [[VLD4_DUP_V:%.*]] = tail call { <4 x bfloat>, <4 x bfloat>, <4 x bfloat>, <4 x bfloat> } @llvm.arm.neon.vld4dup.v4bf16.p0i8(i8* [[TMP0]], i32 2) +// CHECK32-NEXT: [[VLD4_DUP_V_FCA_0_EXTRACT:%.*]] = extractvalue { <4 x bfloat>, <4 x bfloat>, <4 x bfloat>, <4 x bfloat> } [[VLD4_DUP_V]], 0 +// CHECK32-NEXT: [[VLD4_DUP_V_FCA_1_EXTRACT:%.*]] = extractvalue { <4 x bfloat>, <4 x bfloat>, <4 x bfloat>, <4 x bfloat> } [[VLD4_DUP_V]], 1 +// CHECK32-NEXT: [[VLD4_DUP_V_FCA_2_EXTRACT:%.*]] = extractvalue { <4 x bfloat>, <4 x bfloat>, <4 x bfloat>, <4 x bfloat> } [[VLD4_DUP_V]], 2 +// CHECK32-NEXT: [[VLD4_DUP_V_FCA_3_EXTRACT:%.*]] = extractvalue { <4 x bfloat>, <4 x bfloat>, <4 x bfloat>, <4 x bfloat> } [[VLD4_DUP_V]], 3 +// CHECK32-NEXT: [[TMP1:%.*]] = bitcast <4 x bfloat> [[VLD4_DUP_V_FCA_0_EXTRACT]] to <2 x i32> +// CHECK32-NEXT: [[TMP2:%.*]] = bitcast <4 x bfloat> [[VLD4_DUP_V_FCA_1_EXTRACT]] to <2 x i32> +// CHECK32-NEXT: [[TMP3:%.*]] = bitcast <4 x bfloat> [[VLD4_DUP_V_FCA_2_EXTRACT]] to <2 x i32> +// CHECK32-NEXT: [[TMP4:%.*]] = bitcast <4 x bfloat> [[VLD4_DUP_V_FCA_3_EXTRACT]] to <2 x i32> +// CHECK32-NEXT: [[DOTFCA_0_INSERT:%.*]] = insertvalue [4 x <2 x i32>] undef, <2 x i32> [[TMP1]], 0 +// CHECK32-NEXT: [[DOTFCA_1_INSERT:%.*]] = insertvalue [4 x <2 x i32>] [[DOTFCA_0_INSERT]], <2 x i32> [[TMP2]], 1 +// CHECK32-NEXT: [[DOTFCA_2_INSERT:%.*]] = insertvalue [4 x <2 x i32>] [[DOTFCA_1_INSERT]], <2 x i32> [[TMP3]], 2 +// CHECK32-NEXT: [[DOTFCA_3_INSERT:%.*]] = insertvalue [4 x <2 x i32>] [[DOTFCA_2_INSERT]], <2 x i32> [[TMP4]], 3 +// CHECK32-NEXT: ret [4 x <2 x i32>] [[DOTFCA_3_INSERT]] +// bfloat16x4x4_t test_vld4_dup_bf16(bfloat16_t const *ptr) { return vld4_dup_bf16(ptr); } -// CHECK-LABEL: test_vld4_dup_bf16 -// CHECK64: %vld4 = tail call { <4 x bfloat>, <4 x bfloat>, <4 x bfloat>, <4 x bfloat> } @llvm.aarch64.neon.ld4r.v4bf16.p0bf16(bfloat* %ptr) -// CHECK32: %vld4_dup_v = tail call { <4 x bfloat>, <4 x bfloat>, <4 x bfloat>, <4 x bfloat> } @llvm.arm.neon.vld4dup.v4bf16.p0i8(i8* %0, i32 2) +// CHECK64-LABEL: @test_vld4q_dup_bf16( +// CHECK64-NEXT: entry: +// CHECK64-NEXT: [[VLD4:%.*]] = tail call { <8 x bfloat>, <8 x bfloat>, <8 x bfloat>, <8 x bfloat> } @llvm.aarch64.neon.ld4r.v8bf16.p0bf16(bfloat* [[PTR:%.*]]) +// CHECK64-NEXT: [[VLD4_FCA_0_EXTRACT:%.*]] = extractvalue { <8 x bfloat>, <8 x bfloat>, <8 x bfloat>, <8 x bfloat> } [[VLD4]], 0 +// CHECK64-NEXT: [[VLD4_FCA_1_EXTRACT:%.*]] = extractvalue { <8 x bfloat>, <8 x bfloat>, <8 x bfloat>, <8 x bfloat> } [[VLD4]], 1 +// CHECK64-NEXT: [[VLD4_FCA_2_EXTRACT:%.*]] = extractvalue { <8 x bfloat>, <8 x bfloat>, <8 x bfloat>, <8 x bfloat> } [[VLD4]], 2 +// CHECK64-NEXT: [[VLD4_FCA_3_EXTRACT:%.*]] = extractvalue { <8 x bfloat>, <8 x bfloat>, <8 x bfloat>, <8 x bfloat> } [[VLD4]], 3 +// CHECK64-NEXT: [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_BFLOAT16X8X4_T:%.*]] undef, <8 x bfloat> [[VLD4_FCA_0_EXTRACT]], 0, 0 +// CHECK64-NEXT: [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_BFLOAT16X8X4_T]] [[DOTFCA_0_0_INSERT]], <8 x bfloat> [[VLD4_FCA_1_EXTRACT]], 0, 1 +// CHECK64-NEXT: [[DOTFCA_0_2_INSERT:%.*]] = insertvalue [[STRUCT_BFLOAT16X8X4_T]] [[DOTFCA_0_1_INSERT]], <8 x bfloat> [[VLD4_FCA_2_EXTRACT]], 0, 2 +// CHECK64-NEXT: [[DOTFCA_0_3_INSERT:%.*]] = insertvalue [[STRUCT_BFLOAT16X8X4_T]] [[DOTFCA_0_2_INSERT]], <8 x bfloat> [[VLD4_FCA_3_EXTRACT]], 0, 3 +// CHECK64-NEXT: ret [[STRUCT_BFLOAT16X8X4_T]] [[DOTFCA_0_3_INSERT]] +// +// CHECK32-LABEL: @test_vld4q_dup_bf16( +// CHECK32-NEXT: entry: +// CHECK32-NEXT: [[TMP0:%.*]] = bitcast bfloat* [[PTR:%.*]] to i8* +// CHECK32-NEXT: [[VLD4Q_DUP_V:%.*]] = tail call { <8 x bfloat>, <8 x bfloat>, <8 x bfloat>, <8 x bfloat> } @llvm.arm.neon.vld4dup.v8bf16.p0i8(i8* [[TMP0]], i32 2) +// CHECK32-NEXT: [[VLD4Q_DUP_V_FCA_0_EXTRACT:%.*]] = extractvalue { <8 x bfloat>, <8 x bfloat>, <8 x bfloat>, <8 x bfloat> } [[VLD4Q_DUP_V]], 0 +// CHECK32-NEXT: [[VLD4Q_DUP_V_FCA_1_EXTRACT:%.*]] = extractvalue { <8 x bfloat>, <8 x bfloat>, <8 x bfloat>, <8 x bfloat> } [[VLD4Q_DUP_V]], 1 +// CHECK32-NEXT: [[VLD4Q_DUP_V_FCA_2_EXTRACT:%.*]] = extractvalue { <8 x bfloat>, <8 x bfloat>, <8 x bfloat>, <8 x bfloat> } [[VLD4Q_DUP_V]], 2 +// CHECK32-NEXT: [[VLD4Q_DUP_V_FCA_3_EXTRACT:%.*]] = extractvalue { <8 x bfloat>, <8 x bfloat>, <8 x bfloat>, <8 x bfloat> } [[VLD4Q_DUP_V]], 3 +// CHECK32-NEXT: [[TMP1:%.*]] = bitcast <8 x bfloat> [[VLD4Q_DUP_V_FCA_0_EXTRACT]] to <4 x i32> +// CHECK32-NEXT: [[TMP2:%.*]] = bitcast <8 x bfloat> [[VLD4Q_DUP_V_FCA_1_EXTRACT]] to <4 x i32> +// CHECK32-NEXT: [[TMP3:%.*]] = bitcast <8 x bfloat> [[VLD4Q_DUP_V_FCA_2_EXTRACT]] to <4 x i32> +// CHECK32-NEXT: [[TMP4:%.*]] = bitcast <8 x bfloat> [[VLD4Q_DUP_V_FCA_3_EXTRACT]] to <4 x i32> +// CHECK32-NEXT: [[DOTFCA_0_INSERT:%.*]] = insertvalue [4 x <4 x i32>] undef, <4 x i32> [[TMP1]], 0 +// CHECK32-NEXT: [[DOTFCA_1_INSERT:%.*]] = insertvalue [4 x <4 x i32>] [[DOTFCA_0_INSERT]], <4 x i32> [[TMP2]], 1 +// CHECK32-NEXT: [[DOTFCA_2_INSERT:%.*]] = insertvalue [4 x <4 x i32>] [[DOTFCA_1_INSERT]], <4 x i32> [[TMP3]], 2 +// CHECK32-NEXT: [[DOTFCA_3_INSERT:%.*]] = insertvalue [4 x <4 x i32>] [[DOTFCA_2_INSERT]], <4 x i32> [[TMP4]], 3 +// CHECK32-NEXT: ret [4 x <4 x i32>] [[DOTFCA_3_INSERT]] +// bfloat16x8x4_t test_vld4q_dup_bf16(bfloat16_t const *ptr) { return vld4q_dup_bf16(ptr); } -// CHECK-LABEL: test_vld4q_dup_bf16 -// CHECK64: %vld4 = tail call { <8 x bfloat>, <8 x bfloat>, <8 x bfloat>, <8 x bfloat> } @llvm.aarch64.neon.ld4r.v8bf16.p0bf16(bfloat* %ptr) -// CHECK32: %vld4q_dup_v = tail call { <8 x bfloat>, <8 x bfloat>, <8 x bfloat>, <8 x bfloat> } @llvm.arm.neon.vld4dup.v8bf16.p0i8(i8* %0, i32 2) +// CHECK64-LABEL: @test_vst1_bf16( +// CHECK64-NEXT: entry: +// CHECK64-NEXT: [[TMP0:%.*]] = bitcast bfloat* [[PTR:%.*]] to <4 x bfloat>* +// CHECK64-NEXT: store <4 x bfloat> [[VAL:%.*]], <4 x bfloat>* [[TMP0]], align 2 +// CHECK64-NEXT: ret void +// +// CHECK32-LABEL: @test_vst1_bf16( +// CHECK32-NEXT: entry: +// CHECK32-NEXT: [[TMP0:%.*]] = bitcast bfloat* [[PTR:%.*]] to i8* +// CHECK32-NEXT: tail call void @llvm.arm.neon.vst1.p0i8.v4bf16(i8* [[TMP0]], <4 x bfloat> [[VAL:%.*]], i32 2) +// CHECK32-NEXT: ret void +// void test_vst1_bf16(bfloat16_t *ptr, bfloat16x4_t val) { vst1_bf16(ptr, val); } -// CHECK-LABEL: test_vst1_bf16 -// CHECK64: %0 = bitcast bfloat* %ptr to <4 x bfloat>* -// CHECK64-NEXT: store <4 x bfloat> %val, <4 x bfloat>* %0, align 2 -// CHECK32: %0 = bitcast bfloat* %ptr to i8* -// CHECK32-NEXT: tail call void @llvm.arm.neon.vst1.p0i8.v4bf16(i8* %0, <4 x bfloat> %val, i32 2) +// CHECK64-LABEL: @test_vst1q_bf16( +// CHECK64-NEXT: entry: +// CHECK64-NEXT: [[TMP0:%.*]] = bitcast bfloat* [[PTR:%.*]] to <8 x bfloat>* +// CHECK64-NEXT: store <8 x bfloat> [[VAL:%.*]], <8 x bfloat>* [[TMP0]], align 2 +// CHECK64-NEXT: ret void +// +// CHECK32-LABEL: @test_vst1q_bf16( +// CHECK32-NEXT: entry: +// CHECK32-NEXT: [[TMP0:%.*]] = bitcast bfloat* [[PTR:%.*]] to i8* +// CHECK32-NEXT: tail call void @llvm.arm.neon.vst1.p0i8.v8bf16(i8* [[TMP0]], <8 x bfloat> [[VAL:%.*]], i32 2) +// CHECK32-NEXT: ret void +// void test_vst1q_bf16(bfloat16_t *ptr, bfloat16x8_t val) { vst1q_bf16(ptr, val); } -// CHECK-LABEL: test_vst1q_bf16 -// CHECK64: %0 = bitcast bfloat* %ptr to <8 x bfloat>* -// CHECK64-NEXT: store <8 x bfloat> %val, <8 x bfloat>* %0, align 2 -// CHECK32: %0 = bitcast bfloat* %ptr to i8* -// CHECK32-NEXT: tail call void @llvm.arm.neon.vst1.p0i8.v8bf16(i8* %0, <8 x bfloat> %val, i32 2) +// CHECK-LABEL: @test_vst1_lane_bf16( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = extractelement <4 x bfloat> [[VAL:%.*]], i64 1 +// CHECK-NEXT: store bfloat [[TMP0]], bfloat* [[PTR:%.*]], align 2 +// CHECK-NEXT: ret void +// void test_vst1_lane_bf16(bfloat16_t *ptr, bfloat16x4_t val) { vst1_lane_bf16(ptr, val, 1); } -// CHECK-LABEL: test_vst1_lane_bf16 -// CHECK64: %0 = extractelement <4 x bfloat> %val, i32 1 -// CHECK64-NEXT: store bfloat %0, bfloat* %ptr, align 2 -// CHECK32: %0 = extractelement <4 x bfloat> %val, i32 1 -// CHECK32-NEXT: store bfloat %0, bfloat* %ptr, align 2 +// CHECK-LABEL: @test_vst1q_lane_bf16( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = extractelement <8 x bfloat> [[VAL:%.*]], i64 7 +// CHECK-NEXT: store bfloat [[TMP0]], bfloat* [[PTR:%.*]], align 2 +// CHECK-NEXT: ret void +// void test_vst1q_lane_bf16(bfloat16_t *ptr, bfloat16x8_t val) { vst1q_lane_bf16(ptr, val, 7); } -// CHECK-LABEL: test_vst1q_lane_bf16 -// CHECK64: %0 = extractelement <8 x bfloat> %val, i32 7 -// CHECK64-NEXT: store bfloat %0, bfloat* %ptr, align 2 -// CHECK32: %0 = extractelement <8 x bfloat> %val, i32 7 -// CHECK32-NEXT: store bfloat %0, bfloat* %ptr, align 2 +// CHECK64-LABEL: @test_vst1_bf16_x2( +// CHECK64-NEXT: entry: +// CHECK64-NEXT: [[VAL_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [2 x <4 x bfloat>] [[VAL_COERCE:%.*]], 0 +// CHECK64-NEXT: [[VAL_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [2 x <4 x bfloat>] [[VAL_COERCE]], 1 +// CHECK64-NEXT: tail call void @llvm.aarch64.neon.st1x2.v4bf16.p0bf16(<4 x bfloat> [[VAL_COERCE_FCA_0_EXTRACT]], <4 x bfloat> [[VAL_COERCE_FCA_1_EXTRACT]], bfloat* [[PTR:%.*]]) +// CHECK64-NEXT: ret void +// +// CHECK32-LABEL: @test_vst1_bf16_x2( +// CHECK32-NEXT: entry: +// CHECK32-NEXT: [[VAL_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [2 x <2 x i32>] [[VAL_COERCE:%.*]], 0 +// CHECK32-NEXT: [[VAL_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [2 x <2 x i32>] [[VAL_COERCE]], 1 +// CHECK32-NEXT: [[TMP0:%.*]] = bitcast <2 x i32> [[VAL_COERCE_FCA_0_EXTRACT]] to <4 x bfloat> +// CHECK32-NEXT: [[TMP1:%.*]] = bitcast <2 x i32> [[VAL_COERCE_FCA_1_EXTRACT]] to <4 x bfloat> +// CHECK32-NEXT: tail call void @llvm.arm.neon.vst1x2.p0bf16.v4bf16(bfloat* [[PTR:%.*]], <4 x bfloat> [[TMP0]], <4 x bfloat> [[TMP1]]) +// CHECK32-NEXT: ret void +// void test_vst1_bf16_x2(bfloat16_t *ptr, bfloat16x4x2_t val) { vst1_bf16_x2(ptr, val); } -// CHECK-LABEL: test_vst1_bf16_x2 -// CHECK64: tail call void @llvm.aarch64.neon.st1x2.v4bf16.p0bf16(<4 x bfloat> %val.coerce.fca.0.extract, <4 x bfloat> %val.coerce.fca.1.extract, bfloat* %ptr) -// CHECK32: tail call void @llvm.arm.neon.vst1x2.p0bf16.v4bf16(bfloat* %ptr, <4 x bfloat> %0, <4 x bfloat> %1) +// CHECK64-LABEL: @test_vst1q_bf16_x2( +// CHECK64-NEXT: entry: +// CHECK64-NEXT: [[VAL_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [2 x <8 x bfloat>] [[VAL_COERCE:%.*]], 0 +// CHECK64-NEXT: [[VAL_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [2 x <8 x bfloat>] [[VAL_COERCE]], 1 +// CHECK64-NEXT: tail call void @llvm.aarch64.neon.st1x2.v8bf16.p0bf16(<8 x bfloat> [[VAL_COERCE_FCA_0_EXTRACT]], <8 x bfloat> [[VAL_COERCE_FCA_1_EXTRACT]], bfloat* [[PTR:%.*]]) +// CHECK64-NEXT: ret void +// +// CHECK32-LABEL: @test_vst1q_bf16_x2( +// CHECK32-NEXT: entry: +// CHECK32-NEXT: [[VAL_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [2 x <4 x i32>] [[VAL_COERCE:%.*]], 0 +// CHECK32-NEXT: [[VAL_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [2 x <4 x i32>] [[VAL_COERCE]], 1 +// CHECK32-NEXT: [[TMP0:%.*]] = bitcast <4 x i32> [[VAL_COERCE_FCA_0_EXTRACT]] to <8 x bfloat> +// CHECK32-NEXT: [[TMP1:%.*]] = bitcast <4 x i32> [[VAL_COERCE_FCA_1_EXTRACT]] to <8 x bfloat> +// CHECK32-NEXT: tail call void @llvm.arm.neon.vst1x2.p0bf16.v8bf16(bfloat* [[PTR:%.*]], <8 x bfloat> [[TMP0]], <8 x bfloat> [[TMP1]]) +// CHECK32-NEXT: ret void +// void test_vst1q_bf16_x2(bfloat16_t *ptr, bfloat16x8x2_t val) { vst1q_bf16_x2(ptr, val); } -// CHECK-LABEL: test_vst1q_bf16_x2 -// CHECK64: tail call void @llvm.aarch64.neon.st1x2.v8bf16.p0bf16(<8 x bfloat> %val.coerce.fca.0.extract, <8 x bfloat> %val.coerce.fca.1.extract, bfloat* %ptr) -// CHECK32: tail call void @llvm.arm.neon.vst1x2.p0bf16.v8bf16(bfloat* %ptr, <8 x bfloat> %0, <8 x bfloat> %1) +// CHECK64-LABEL: @test_vst1_bf16_x3( +// CHECK64-NEXT: entry: +// CHECK64-NEXT: [[VAL_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [3 x <4 x bfloat>] [[VAL_COERCE:%.*]], 0 +// CHECK64-NEXT: [[VAL_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [3 x <4 x bfloat>] [[VAL_COERCE]], 1 +// CHECK64-NEXT: [[VAL_COERCE_FCA_2_EXTRACT:%.*]] = extractvalue [3 x <4 x bfloat>] [[VAL_COERCE]], 2 +// CHECK64-NEXT: tail call void @llvm.aarch64.neon.st1x3.v4bf16.p0bf16(<4 x bfloat> [[VAL_COERCE_FCA_0_EXTRACT]], <4 x bfloat> [[VAL_COERCE_FCA_1_EXTRACT]], <4 x bfloat> [[VAL_COERCE_FCA_2_EXTRACT]], bfloat* [[PTR:%.*]]) +// CHECK64-NEXT: ret void +// +// CHECK32-LABEL: @test_vst1_bf16_x3( +// CHECK32-NEXT: entry: +// CHECK32-NEXT: [[VAL_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [3 x <2 x i32>] [[VAL_COERCE:%.*]], 0 +// CHECK32-NEXT: [[VAL_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [3 x <2 x i32>] [[VAL_COERCE]], 1 +// CHECK32-NEXT: [[VAL_COERCE_FCA_2_EXTRACT:%.*]] = extractvalue [3 x <2 x i32>] [[VAL_COERCE]], 2 +// CHECK32-NEXT: [[TMP0:%.*]] = bitcast <2 x i32> [[VAL_COERCE_FCA_0_EXTRACT]] to <4 x bfloat> +// CHECK32-NEXT: [[TMP1:%.*]] = bitcast <2 x i32> [[VAL_COERCE_FCA_1_EXTRACT]] to <4 x bfloat> +// CHECK32-NEXT: [[TMP2:%.*]] = bitcast <2 x i32> [[VAL_COERCE_FCA_2_EXTRACT]] to <4 x bfloat> +// CHECK32-NEXT: tail call void @llvm.arm.neon.vst1x3.p0bf16.v4bf16(bfloat* [[PTR:%.*]], <4 x bfloat> [[TMP0]], <4 x bfloat> [[TMP1]], <4 x bfloat> [[TMP2]]) +// CHECK32-NEXT: ret void +// void test_vst1_bf16_x3(bfloat16_t *ptr, bfloat16x4x3_t val) { vst1_bf16_x3(ptr, val); } -// CHECK-LABEL: test_vst1_bf16_x3 -// CHECK64: tail call void @llvm.aarch64.neon.st1x3.v4bf16.p0bf16(<4 x bfloat> %val.coerce.fca.0.extract, <4 x bfloat> %val.coerce.fca.1.extract, <4 x bfloat> %val.coerce.fca.2.extract, bfloat* %ptr) -// CHECK32: tail call void @llvm.arm.neon.vst1x3.p0bf16.v4bf16(bfloat* %ptr, <4 x bfloat> %0, <4 x bfloat> %1, <4 x bfloat> %2) +// CHECK64-LABEL: @test_vst1q_bf16_x3( +// CHECK64-NEXT: entry: +// CHECK64-NEXT: [[VAL_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [3 x <8 x bfloat>] [[VAL_COERCE:%.*]], 0 +// CHECK64-NEXT: [[VAL_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [3 x <8 x bfloat>] [[VAL_COERCE]], 1 +// CHECK64-NEXT: [[VAL_COERCE_FCA_2_EXTRACT:%.*]] = extractvalue [3 x <8 x bfloat>] [[VAL_COERCE]], 2 +// CHECK64-NEXT: tail call void @llvm.aarch64.neon.st1x3.v8bf16.p0bf16(<8 x bfloat> [[VAL_COERCE_FCA_0_EXTRACT]], <8 x bfloat> [[VAL_COERCE_FCA_1_EXTRACT]], <8 x bfloat> [[VAL_COERCE_FCA_2_EXTRACT]], bfloat* [[PTR:%.*]]) +// CHECK64-NEXT: ret void +// +// CHECK32-LABEL: @test_vst1q_bf16_x3( +// CHECK32-NEXT: entry: +// CHECK32-NEXT: [[VAL_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [3 x <4 x i32>] [[VAL_COERCE:%.*]], 0 +// CHECK32-NEXT: [[VAL_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [3 x <4 x i32>] [[VAL_COERCE]], 1 +// CHECK32-NEXT: [[VAL_COERCE_FCA_2_EXTRACT:%.*]] = extractvalue [3 x <4 x i32>] [[VAL_COERCE]], 2 +// CHECK32-NEXT: [[TMP0:%.*]] = bitcast <4 x i32> [[VAL_COERCE_FCA_0_EXTRACT]] to <8 x bfloat> +// CHECK32-NEXT: [[TMP1:%.*]] = bitcast <4 x i32> [[VAL_COERCE_FCA_1_EXTRACT]] to <8 x bfloat> +// CHECK32-NEXT: [[TMP2:%.*]] = bitcast <4 x i32> [[VAL_COERCE_FCA_2_EXTRACT]] to <8 x bfloat> +// CHECK32-NEXT: tail call void @llvm.arm.neon.vst1x3.p0bf16.v8bf16(bfloat* [[PTR:%.*]], <8 x bfloat> [[TMP0]], <8 x bfloat> [[TMP1]], <8 x bfloat> [[TMP2]]) +// CHECK32-NEXT: ret void +// void test_vst1q_bf16_x3(bfloat16_t *ptr, bfloat16x8x3_t val) { vst1q_bf16_x3(ptr, val); } -// CHECK-LABEL: test_vst1q_bf16_x3 -// CHECK64: tail call void @llvm.aarch64.neon.st1x3.v8bf16.p0bf16(<8 x bfloat> %val.coerce.fca.0.extract, <8 x bfloat> %val.coerce.fca.1.extract, <8 x bfloat> %val.coerce.fca.2.extract, bfloat* %ptr) -// CHECK32: tail call void @llvm.arm.neon.vst1x3.p0bf16.v8bf16(bfloat* %ptr, <8 x bfloat> %0, <8 x bfloat> %1, <8 x bfloat> %2) +// CHECK64-LABEL: @test_vst1_bf16_x4( +// CHECK64-NEXT: entry: +// CHECK64-NEXT: [[VAL_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [4 x <4 x bfloat>] [[VAL_COERCE:%.*]], 0 +// CHECK64-NEXT: [[VAL_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [4 x <4 x bfloat>] [[VAL_COERCE]], 1 +// CHECK64-NEXT: [[VAL_COERCE_FCA_2_EXTRACT:%.*]] = extractvalue [4 x <4 x bfloat>] [[VAL_COERCE]], 2 +// CHECK64-NEXT: [[VAL_COERCE_FCA_3_EXTRACT:%.*]] = extractvalue [4 x <4 x bfloat>] [[VAL_COERCE]], 3 +// CHECK64-NEXT: tail call void @llvm.aarch64.neon.st1x4.v4bf16.p0bf16(<4 x bfloat> [[VAL_COERCE_FCA_0_EXTRACT]], <4 x bfloat> [[VAL_COERCE_FCA_1_EXTRACT]], <4 x bfloat> [[VAL_COERCE_FCA_2_EXTRACT]], <4 x bfloat> [[VAL_COERCE_FCA_3_EXTRACT]], bfloat* [[PTR:%.*]]) +// CHECK64-NEXT: ret void +// +// CHECK32-LABEL: @test_vst1_bf16_x4( +// CHECK32-NEXT: entry: +// CHECK32-NEXT: [[VAL_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [4 x <2 x i32>] [[VAL_COERCE:%.*]], 0 +// CHECK32-NEXT: [[VAL_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [4 x <2 x i32>] [[VAL_COERCE]], 1 +// CHECK32-NEXT: [[VAL_COERCE_FCA_2_EXTRACT:%.*]] = extractvalue [4 x <2 x i32>] [[VAL_COERCE]], 2 +// CHECK32-NEXT: [[VAL_COERCE_FCA_3_EXTRACT:%.*]] = extractvalue [4 x <2 x i32>] [[VAL_COERCE]], 3 +// CHECK32-NEXT: [[TMP0:%.*]] = bitcast <2 x i32> [[VAL_COERCE_FCA_0_EXTRACT]] to <4 x bfloat> +// CHECK32-NEXT: [[TMP1:%.*]] = bitcast <2 x i32> [[VAL_COERCE_FCA_1_EXTRACT]] to <4 x bfloat> +// CHECK32-NEXT: [[TMP2:%.*]] = bitcast <2 x i32> [[VAL_COERCE_FCA_2_EXTRACT]] to <4 x bfloat> +// CHECK32-NEXT: [[TMP3:%.*]] = bitcast <2 x i32> [[VAL_COERCE_FCA_3_EXTRACT]] to <4 x bfloat> +// CHECK32-NEXT: tail call void @llvm.arm.neon.vst1x4.p0bf16.v4bf16(bfloat* [[PTR:%.*]], <4 x bfloat> [[TMP0]], <4 x bfloat> [[TMP1]], <4 x bfloat> [[TMP2]], <4 x bfloat> [[TMP3]]) +// CHECK32-NEXT: ret void +// void test_vst1_bf16_x4(bfloat16_t *ptr, bfloat16x4x4_t val) { vst1_bf16_x4(ptr, val); } -// CHECK-LABEL: test_vst1_bf16_x4 -// CHECK64: tail call void @llvm.aarch64.neon.st1x4.v4bf16.p0bf16(<4 x bfloat> %val.coerce.fca.0.extract, <4 x bfloat> %val.coerce.fca.1.extract, <4 x bfloat> %val.coerce.fca.2.extract, <4 x bfloat> %val.coerce.fca.3.extract, bfloat* %ptr) -// CHECK32: tail call void @llvm.arm.neon.vst1x4.p0bf16.v4bf16(bfloat* %ptr, <4 x bfloat> %0, <4 x bfloat> %1, <4 x bfloat> %2, <4 x bfloat> %3) +// CHECK64-LABEL: @test_vst1q_bf16_x4( +// CHECK64-NEXT: entry: +// CHECK64-NEXT: [[VAL_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [4 x <8 x bfloat>] [[VAL_COERCE:%.*]], 0 +// CHECK64-NEXT: [[VAL_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [4 x <8 x bfloat>] [[VAL_COERCE]], 1 +// CHECK64-NEXT: [[VAL_COERCE_FCA_2_EXTRACT:%.*]] = extractvalue [4 x <8 x bfloat>] [[VAL_COERCE]], 2 +// CHECK64-NEXT: [[VAL_COERCE_FCA_3_EXTRACT:%.*]] = extractvalue [4 x <8 x bfloat>] [[VAL_COERCE]], 3 +// CHECK64-NEXT: tail call void @llvm.aarch64.neon.st1x4.v8bf16.p0bf16(<8 x bfloat> [[VAL_COERCE_FCA_0_EXTRACT]], <8 x bfloat> [[VAL_COERCE_FCA_1_EXTRACT]], <8 x bfloat> [[VAL_COERCE_FCA_2_EXTRACT]], <8 x bfloat> [[VAL_COERCE_FCA_3_EXTRACT]], bfloat* [[PTR:%.*]]) +// CHECK64-NEXT: ret void +// +// CHECK32-LABEL: @test_vst1q_bf16_x4( +// CHECK32-NEXT: entry: +// CHECK32-NEXT: [[VAL_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [4 x <4 x i32>] [[VAL_COERCE:%.*]], 0 +// CHECK32-NEXT: [[VAL_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [4 x <4 x i32>] [[VAL_COERCE]], 1 +// CHECK32-NEXT: [[VAL_COERCE_FCA_2_EXTRACT:%.*]] = extractvalue [4 x <4 x i32>] [[VAL_COERCE]], 2 +// CHECK32-NEXT: [[VAL_COERCE_FCA_3_EXTRACT:%.*]] = extractvalue [4 x <4 x i32>] [[VAL_COERCE]], 3 +// CHECK32-NEXT: [[TMP0:%.*]] = bitcast <4 x i32> [[VAL_COERCE_FCA_0_EXTRACT]] to <8 x bfloat> +// CHECK32-NEXT: [[TMP1:%.*]] = bitcast <4 x i32> [[VAL_COERCE_FCA_1_EXTRACT]] to <8 x bfloat> +// CHECK32-NEXT: [[TMP2:%.*]] = bitcast <4 x i32> [[VAL_COERCE_FCA_2_EXTRACT]] to <8 x bfloat> +// CHECK32-NEXT: [[TMP3:%.*]] = bitcast <4 x i32> [[VAL_COERCE_FCA_3_EXTRACT]] to <8 x bfloat> +// CHECK32-NEXT: tail call void @llvm.arm.neon.vst1x4.p0bf16.v8bf16(bfloat* [[PTR:%.*]], <8 x bfloat> [[TMP0]], <8 x bfloat> [[TMP1]], <8 x bfloat> [[TMP2]], <8 x bfloat> [[TMP3]]) +// CHECK32-NEXT: ret void +// void test_vst1q_bf16_x4(bfloat16_t *ptr, bfloat16x8x4_t val) { vst1q_bf16_x4(ptr, val); } -// CHECK-LABEL: test_vst1q_bf16_x4 -// CHECK64: tail call void @llvm.aarch64.neon.st1x4.v8bf16.p0bf16(<8 x bfloat> %val.coerce.fca.0.extract, <8 x bfloat> %val.coerce.fca.1.extract, <8 x bfloat> %val.coerce.fca.2.extract, <8 x bfloat> %val.coerce.fca.3.extract, bfloat* %ptr) -// CHECK32: tail call void @llvm.arm.neon.vst1x4.p0bf16.v8bf16(bfloat* %ptr, <8 x bfloat> %0, <8 x bfloat> %1, <8 x bfloat> %2, <8 x bfloat> %3) +// CHECK64-LABEL: @test_vst2_bf16( +// CHECK64-NEXT: entry: +// CHECK64-NEXT: [[VAL_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [2 x <4 x bfloat>] [[VAL_COERCE:%.*]], 0 +// CHECK64-NEXT: [[VAL_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [2 x <4 x bfloat>] [[VAL_COERCE]], 1 +// CHECK64-NEXT: [[TMP0:%.*]] = bitcast bfloat* [[PTR:%.*]] to i8* +// CHECK64-NEXT: tail call void @llvm.aarch64.neon.st2.v4bf16.p0i8(<4 x bfloat> [[VAL_COERCE_FCA_0_EXTRACT]], <4 x bfloat> [[VAL_COERCE_FCA_1_EXTRACT]], i8* [[TMP0]]) +// CHECK64-NEXT: ret void +// +// CHECK32-LABEL: @test_vst2_bf16( +// CHECK32-NEXT: entry: +// CHECK32-NEXT: [[VAL_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [2 x <2 x i32>] [[VAL_COERCE:%.*]], 0 +// CHECK32-NEXT: [[VAL_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [2 x <2 x i32>] [[VAL_COERCE]], 1 +// CHECK32-NEXT: [[TMP0:%.*]] = bitcast <2 x i32> [[VAL_COERCE_FCA_0_EXTRACT]] to <4 x bfloat> +// CHECK32-NEXT: [[TMP1:%.*]] = bitcast <2 x i32> [[VAL_COERCE_FCA_1_EXTRACT]] to <4 x bfloat> +// CHECK32-NEXT: [[TMP2:%.*]] = bitcast bfloat* [[PTR:%.*]] to i8* +// CHECK32-NEXT: tail call void @llvm.arm.neon.vst2.p0i8.v4bf16(i8* [[TMP2]], <4 x bfloat> [[TMP0]], <4 x bfloat> [[TMP1]], i32 2) +// CHECK32-NEXT: ret void +// void test_vst2_bf16(bfloat16_t *ptr, bfloat16x4x2_t val) { vst2_bf16(ptr, val); } -// CHECK-LABEL: test_vst2_bf16 -// CHECK64: tail call void @llvm.aarch64.neon.st2.v4bf16.p0i8(<4 x bfloat> %val.coerce.fca.0.extract, <4 x bfloat> %val.coerce.fca.1.extract, i8* %0) -// CHECK32: tail call void @llvm.arm.neon.vst2.p0i8.v4bf16(i8* %2, <4 x bfloat> %0, <4 x bfloat> %1, i32 2) +// CHECK64-LABEL: @test_vst2q_bf16( +// CHECK64-NEXT: entry: +// CHECK64-NEXT: [[VAL_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [2 x <8 x bfloat>] [[VAL_COERCE:%.*]], 0 +// CHECK64-NEXT: [[VAL_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [2 x <8 x bfloat>] [[VAL_COERCE]], 1 +// CHECK64-NEXT: [[TMP0:%.*]] = bitcast bfloat* [[PTR:%.*]] to i8* +// CHECK64-NEXT: tail call void @llvm.aarch64.neon.st2.v8bf16.p0i8(<8 x bfloat> [[VAL_COERCE_FCA_0_EXTRACT]], <8 x bfloat> [[VAL_COERCE_FCA_1_EXTRACT]], i8* [[TMP0]]) +// CHECK64-NEXT: ret void +// +// CHECK32-LABEL: @test_vst2q_bf16( +// CHECK32-NEXT: entry: +// CHECK32-NEXT: [[VAL_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [2 x <4 x i32>] [[VAL_COERCE:%.*]], 0 +// CHECK32-NEXT: [[VAL_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [2 x <4 x i32>] [[VAL_COERCE]], 1 +// CHECK32-NEXT: [[TMP0:%.*]] = bitcast <4 x i32> [[VAL_COERCE_FCA_0_EXTRACT]] to <8 x bfloat> +// CHECK32-NEXT: [[TMP1:%.*]] = bitcast <4 x i32> [[VAL_COERCE_FCA_1_EXTRACT]] to <8 x bfloat> +// CHECK32-NEXT: [[TMP2:%.*]] = bitcast bfloat* [[PTR:%.*]] to i8* +// CHECK32-NEXT: tail call void @llvm.arm.neon.vst2.p0i8.v8bf16(i8* [[TMP2]], <8 x bfloat> [[TMP0]], <8 x bfloat> [[TMP1]], i32 2) +// CHECK32-NEXT: ret void +// void test_vst2q_bf16(bfloat16_t *ptr, bfloat16x8x2_t val) { vst2q_bf16(ptr, val); } -// CHECK-LABEL: test_vst2q_bf16 -// CHECK64: tail call void @llvm.aarch64.neon.st2.v8bf16.p0i8(<8 x bfloat> %val.coerce.fca.0.extract, <8 x bfloat> %val.coerce.fca.1.extract, i8* %0) -// CHECK32: tail call void @llvm.arm.neon.vst2.p0i8.v8bf16(i8* %2, <8 x bfloat> %0, <8 x bfloat> %1, i32 2) +// CHECK64-LABEL: @test_vst2_lane_bf16( +// CHECK64-NEXT: entry: +// CHECK64-NEXT: [[VAL_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [2 x <4 x bfloat>] [[VAL_COERCE:%.*]], 0 +// CHECK64-NEXT: [[VAL_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [2 x <4 x bfloat>] [[VAL_COERCE]], 1 +// CHECK64-NEXT: [[TMP0:%.*]] = bitcast bfloat* [[PTR:%.*]] to i8* +// CHECK64-NEXT: tail call void @llvm.aarch64.neon.st2lane.v4bf16.p0i8(<4 x bfloat> [[VAL_COERCE_FCA_0_EXTRACT]], <4 x bfloat> [[VAL_COERCE_FCA_1_EXTRACT]], i64 1, i8* [[TMP0]]) +// CHECK64-NEXT: ret void +// +// CHECK32-LABEL: @test_vst2_lane_bf16( +// CHECK32-NEXT: entry: +// CHECK32-NEXT: [[VAL_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [2 x <2 x i32>] [[VAL_COERCE:%.*]], 0 +// CHECK32-NEXT: [[VAL_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [2 x <2 x i32>] [[VAL_COERCE]], 1 +// CHECK32-NEXT: [[TMP0:%.*]] = bitcast <2 x i32> [[VAL_COERCE_FCA_0_EXTRACT]] to <4 x bfloat> +// CHECK32-NEXT: [[TMP1:%.*]] = bitcast <2 x i32> [[VAL_COERCE_FCA_1_EXTRACT]] to <4 x bfloat> +// CHECK32-NEXT: [[TMP2:%.*]] = bitcast bfloat* [[PTR:%.*]] to i8* +// CHECK32-NEXT: tail call void @llvm.arm.neon.vst2lane.p0i8.v4bf16(i8* [[TMP2]], <4 x bfloat> [[TMP0]], <4 x bfloat> [[TMP1]], i32 1, i32 2) +// CHECK32-NEXT: ret void +// void test_vst2_lane_bf16(bfloat16_t *ptr, bfloat16x4x2_t val) { vst2_lane_bf16(ptr, val, 1); } -// CHECK-LABEL: test_vst2_lane_bf16 -// CHECK64: tail call void @llvm.aarch64.neon.st2lane.v4bf16.p0i8(<4 x bfloat> %val.coerce.fca.0.extract, <4 x bfloat> %val.coerce.fca.1.extract, i64 1, i8* %0) -// CHECK32: tail call void @llvm.arm.neon.vst2lane.p0i8.v4bf16(i8* %2, <4 x bfloat> %0, <4 x bfloat> %1, i32 1, i32 2) +// CHECK64-LABEL: @test_vst2q_lane_bf16( +// CHECK64-NEXT: entry: +// CHECK64-NEXT: [[VAL_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [2 x <8 x bfloat>] [[VAL_COERCE:%.*]], 0 +// CHECK64-NEXT: [[VAL_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [2 x <8 x bfloat>] [[VAL_COERCE]], 1 +// CHECK64-NEXT: [[TMP0:%.*]] = bitcast bfloat* [[PTR:%.*]] to i8* +// CHECK64-NEXT: tail call void @llvm.aarch64.neon.st2lane.v8bf16.p0i8(<8 x bfloat> [[VAL_COERCE_FCA_0_EXTRACT]], <8 x bfloat> [[VAL_COERCE_FCA_1_EXTRACT]], i64 7, i8* [[TMP0]]) +// CHECK64-NEXT: ret void +// +// CHECK32-LABEL: @test_vst2q_lane_bf16( +// CHECK32-NEXT: entry: +// CHECK32-NEXT: [[VAL_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [2 x <4 x i32>] [[VAL_COERCE:%.*]], 0 +// CHECK32-NEXT: [[VAL_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [2 x <4 x i32>] [[VAL_COERCE]], 1 +// CHECK32-NEXT: [[TMP0:%.*]] = bitcast <4 x i32> [[VAL_COERCE_FCA_0_EXTRACT]] to <8 x bfloat> +// CHECK32-NEXT: [[TMP1:%.*]] = bitcast <4 x i32> [[VAL_COERCE_FCA_1_EXTRACT]] to <8 x bfloat> +// CHECK32-NEXT: [[TMP2:%.*]] = bitcast bfloat* [[PTR:%.*]] to i8* +// CHECK32-NEXT: tail call void @llvm.arm.neon.vst2lane.p0i8.v8bf16(i8* [[TMP2]], <8 x bfloat> [[TMP0]], <8 x bfloat> [[TMP1]], i32 7, i32 2) +// CHECK32-NEXT: ret void +// void test_vst2q_lane_bf16(bfloat16_t *ptr, bfloat16x8x2_t val) { vst2q_lane_bf16(ptr, val, 7); } -// CHECK-LABEL: test_vst2q_lane_bf16 -// CHECK64: tail call void @llvm.aarch64.neon.st2lane.v8bf16.p0i8(<8 x bfloat> %val.coerce.fca.0.extract, <8 x bfloat> %val.coerce.fca.1.extract, i64 7, i8* %0) -// CHECK32: tail call void @llvm.arm.neon.vst2lane.p0i8.v8bf16(i8* %2, <8 x bfloat> %0, <8 x bfloat> %1, i32 7, i32 2) +// CHECK64-LABEL: @test_vst3_bf16( +// CHECK64-NEXT: entry: +// CHECK64-NEXT: [[VAL_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [3 x <4 x bfloat>] [[VAL_COERCE:%.*]], 0 +// CHECK64-NEXT: [[VAL_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [3 x <4 x bfloat>] [[VAL_COERCE]], 1 +// CHECK64-NEXT: [[VAL_COERCE_FCA_2_EXTRACT:%.*]] = extractvalue [3 x <4 x bfloat>] [[VAL_COERCE]], 2 +// CHECK64-NEXT: [[TMP0:%.*]] = bitcast bfloat* [[PTR:%.*]] to i8* +// CHECK64-NEXT: tail call void @llvm.aarch64.neon.st3.v4bf16.p0i8(<4 x bfloat> [[VAL_COERCE_FCA_0_EXTRACT]], <4 x bfloat> [[VAL_COERCE_FCA_1_EXTRACT]], <4 x bfloat> [[VAL_COERCE_FCA_2_EXTRACT]], i8* [[TMP0]]) +// CHECK64-NEXT: ret void +// +// CHECK32-LABEL: @test_vst3_bf16( +// CHECK32-NEXT: entry: +// CHECK32-NEXT: [[VAL_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [3 x <2 x i32>] [[VAL_COERCE:%.*]], 0 +// CHECK32-NEXT: [[VAL_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [3 x <2 x i32>] [[VAL_COERCE]], 1 +// CHECK32-NEXT: [[VAL_COERCE_FCA_2_EXTRACT:%.*]] = extractvalue [3 x <2 x i32>] [[VAL_COERCE]], 2 +// CHECK32-NEXT: [[TMP0:%.*]] = bitcast <2 x i32> [[VAL_COERCE_FCA_0_EXTRACT]] to <4 x bfloat> +// CHECK32-NEXT: [[TMP1:%.*]] = bitcast <2 x i32> [[VAL_COERCE_FCA_1_EXTRACT]] to <4 x bfloat> +// CHECK32-NEXT: [[TMP2:%.*]] = bitcast <2 x i32> [[VAL_COERCE_FCA_2_EXTRACT]] to <4 x bfloat> +// CHECK32-NEXT: [[TMP3:%.*]] = bitcast bfloat* [[PTR:%.*]] to i8* +// CHECK32-NEXT: tail call void @llvm.arm.neon.vst3.p0i8.v4bf16(i8* [[TMP3]], <4 x bfloat> [[TMP0]], <4 x bfloat> [[TMP1]], <4 x bfloat> [[TMP2]], i32 2) +// CHECK32-NEXT: ret void +// void test_vst3_bf16(bfloat16_t *ptr, bfloat16x4x3_t val) { vst3_bf16(ptr, val); } -// CHECK-LABEL: test_vst3_bf16 -// CHECK64: tail call void @llvm.aarch64.neon.st3.v4bf16.p0i8(<4 x bfloat> %val.coerce.fca.0.extract, <4 x bfloat> %val.coerce.fca.1.extract, <4 x bfloat> %val.coerce.fca.2.extract, i8* %0) -// CHECK32: tail call void @llvm.arm.neon.vst3.p0i8.v4bf16(i8* %3, <4 x bfloat> %0, <4 x bfloat> %1, <4 x bfloat> %2, i32 2) +// CHECK64-LABEL: @test_vst3q_bf16( +// CHECK64-NEXT: entry: +// CHECK64-NEXT: [[VAL_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [3 x <8 x bfloat>] [[VAL_COERCE:%.*]], 0 +// CHECK64-NEXT: [[VAL_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [3 x <8 x bfloat>] [[VAL_COERCE]], 1 +// CHECK64-NEXT: [[VAL_COERCE_FCA_2_EXTRACT:%.*]] = extractvalue [3 x <8 x bfloat>] [[VAL_COERCE]], 2 +// CHECK64-NEXT: [[TMP0:%.*]] = bitcast bfloat* [[PTR:%.*]] to i8* +// CHECK64-NEXT: tail call void @llvm.aarch64.neon.st3.v8bf16.p0i8(<8 x bfloat> [[VAL_COERCE_FCA_0_EXTRACT]], <8 x bfloat> [[VAL_COERCE_FCA_1_EXTRACT]], <8 x bfloat> [[VAL_COERCE_FCA_2_EXTRACT]], i8* [[TMP0]]) +// CHECK64-NEXT: ret void +// +// CHECK32-LABEL: @test_vst3q_bf16( +// CHECK32-NEXT: entry: +// CHECK32-NEXT: [[VAL_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [3 x <4 x i32>] [[VAL_COERCE:%.*]], 0 +// CHECK32-NEXT: [[VAL_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [3 x <4 x i32>] [[VAL_COERCE]], 1 +// CHECK32-NEXT: [[VAL_COERCE_FCA_2_EXTRACT:%.*]] = extractvalue [3 x <4 x i32>] [[VAL_COERCE]], 2 +// CHECK32-NEXT: [[TMP0:%.*]] = bitcast <4 x i32> [[VAL_COERCE_FCA_0_EXTRACT]] to <8 x bfloat> +// CHECK32-NEXT: [[TMP1:%.*]] = bitcast <4 x i32> [[VAL_COERCE_FCA_1_EXTRACT]] to <8 x bfloat> +// CHECK32-NEXT: [[TMP2:%.*]] = bitcast <4 x i32> [[VAL_COERCE_FCA_2_EXTRACT]] to <8 x bfloat> +// CHECK32-NEXT: [[TMP3:%.*]] = bitcast bfloat* [[PTR:%.*]] to i8* +// CHECK32-NEXT: tail call void @llvm.arm.neon.vst3.p0i8.v8bf16(i8* [[TMP3]], <8 x bfloat> [[TMP0]], <8 x bfloat> [[TMP1]], <8 x bfloat> [[TMP2]], i32 2) +// CHECK32-NEXT: ret void +// void test_vst3q_bf16(bfloat16_t *ptr, bfloat16x8x3_t val) { vst3q_bf16(ptr, val); } -// CHECK-LABEL: test_vst3q_bf16 -// CHECK64: tail call void @llvm.aarch64.neon.st3.v8bf16.p0i8(<8 x bfloat> %val.coerce.fca.0.extract, <8 x bfloat> %val.coerce.fca.1.extract, <8 x bfloat> %val.coerce.fca.2.extract, i8* %0) -// CHECK32: tail call void @llvm.arm.neon.vst3.p0i8.v8bf16(i8* %3, <8 x bfloat> %0, <8 x bfloat> %1, <8 x bfloat> %2, i32 2) +// CHECK64-LABEL: @test_vst3_lane_bf16( +// CHECK64-NEXT: entry: +// CHECK64-NEXT: [[VAL_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [3 x <4 x bfloat>] [[VAL_COERCE:%.*]], 0 +// CHECK64-NEXT: [[VAL_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [3 x <4 x bfloat>] [[VAL_COERCE]], 1 +// CHECK64-NEXT: [[VAL_COERCE_FCA_2_EXTRACT:%.*]] = extractvalue [3 x <4 x bfloat>] [[VAL_COERCE]], 2 +// CHECK64-NEXT: [[TMP0:%.*]] = bitcast bfloat* [[PTR:%.*]] to i8* +// CHECK64-NEXT: tail call void @llvm.aarch64.neon.st3lane.v4bf16.p0i8(<4 x bfloat> [[VAL_COERCE_FCA_0_EXTRACT]], <4 x bfloat> [[VAL_COERCE_FCA_1_EXTRACT]], <4 x bfloat> [[VAL_COERCE_FCA_2_EXTRACT]], i64 1, i8* [[TMP0]]) +// CHECK64-NEXT: ret void +// +// CHECK32-LABEL: @test_vst3_lane_bf16( +// CHECK32-NEXT: entry: +// CHECK32-NEXT: [[VAL_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [3 x <2 x i32>] [[VAL_COERCE:%.*]], 0 +// CHECK32-NEXT: [[VAL_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [3 x <2 x i32>] [[VAL_COERCE]], 1 +// CHECK32-NEXT: [[VAL_COERCE_FCA_2_EXTRACT:%.*]] = extractvalue [3 x <2 x i32>] [[VAL_COERCE]], 2 +// CHECK32-NEXT: [[TMP0:%.*]] = bitcast <2 x i32> [[VAL_COERCE_FCA_0_EXTRACT]] to <4 x bfloat> +// CHECK32-NEXT: [[TMP1:%.*]] = bitcast <2 x i32> [[VAL_COERCE_FCA_1_EXTRACT]] to <4 x bfloat> +// CHECK32-NEXT: [[TMP2:%.*]] = bitcast <2 x i32> [[VAL_COERCE_FCA_2_EXTRACT]] to <4 x bfloat> +// CHECK32-NEXT: [[TMP3:%.*]] = bitcast bfloat* [[PTR:%.*]] to i8* +// CHECK32-NEXT: tail call void @llvm.arm.neon.vst3lane.p0i8.v4bf16(i8* [[TMP3]], <4 x bfloat> [[TMP0]], <4 x bfloat> [[TMP1]], <4 x bfloat> [[TMP2]], i32 1, i32 2) +// CHECK32-NEXT: ret void +// void test_vst3_lane_bf16(bfloat16_t *ptr, bfloat16x4x3_t val) { vst3_lane_bf16(ptr, val, 1); } -// CHECK-LABEL: test_vst3_lane_bf16 -// CHECK64: tail call void @llvm.aarch64.neon.st3lane.v4bf16.p0i8(<4 x bfloat> %val.coerce.fca.0.extract, <4 x bfloat> %val.coerce.fca.1.extract, <4 x bfloat> %val.coerce.fca.2.extract, i64 1, i8* %0) -// CHECK32: tail call void @llvm.arm.neon.vst3lane.p0i8.v4bf16(i8* %3, <4 x bfloat> %0, <4 x bfloat> %1, <4 x bfloat> %2, i32 1, i32 2) +// CHECK64-LABEL: @test_vst3q_lane_bf16( +// CHECK64-NEXT: entry: +// CHECK64-NEXT: [[VAL_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [3 x <8 x bfloat>] [[VAL_COERCE:%.*]], 0 +// CHECK64-NEXT: [[VAL_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [3 x <8 x bfloat>] [[VAL_COERCE]], 1 +// CHECK64-NEXT: [[VAL_COERCE_FCA_2_EXTRACT:%.*]] = extractvalue [3 x <8 x bfloat>] [[VAL_COERCE]], 2 +// CHECK64-NEXT: [[TMP0:%.*]] = bitcast bfloat* [[PTR:%.*]] to i8* +// CHECK64-NEXT: tail call void @llvm.aarch64.neon.st3lane.v8bf16.p0i8(<8 x bfloat> [[VAL_COERCE_FCA_0_EXTRACT]], <8 x bfloat> [[VAL_COERCE_FCA_1_EXTRACT]], <8 x bfloat> [[VAL_COERCE_FCA_2_EXTRACT]], i64 7, i8* [[TMP0]]) +// CHECK64-NEXT: ret void +// +// CHECK32-LABEL: @test_vst3q_lane_bf16( +// CHECK32-NEXT: entry: +// CHECK32-NEXT: [[VAL_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [3 x <4 x i32>] [[VAL_COERCE:%.*]], 0 +// CHECK32-NEXT: [[VAL_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [3 x <4 x i32>] [[VAL_COERCE]], 1 +// CHECK32-NEXT: [[VAL_COERCE_FCA_2_EXTRACT:%.*]] = extractvalue [3 x <4 x i32>] [[VAL_COERCE]], 2 +// CHECK32-NEXT: [[TMP0:%.*]] = bitcast <4 x i32> [[VAL_COERCE_FCA_0_EXTRACT]] to <8 x bfloat> +// CHECK32-NEXT: [[TMP1:%.*]] = bitcast <4 x i32> [[VAL_COERCE_FCA_1_EXTRACT]] to <8 x bfloat> +// CHECK32-NEXT: [[TMP2:%.*]] = bitcast <4 x i32> [[VAL_COERCE_FCA_2_EXTRACT]] to <8 x bfloat> +// CHECK32-NEXT: [[TMP3:%.*]] = bitcast bfloat* [[PTR:%.*]] to i8* +// CHECK32-NEXT: tail call void @llvm.arm.neon.vst3lane.p0i8.v8bf16(i8* [[TMP3]], <8 x bfloat> [[TMP0]], <8 x bfloat> [[TMP1]], <8 x bfloat> [[TMP2]], i32 7, i32 2) +// CHECK32-NEXT: ret void +// void test_vst3q_lane_bf16(bfloat16_t *ptr, bfloat16x8x3_t val) { vst3q_lane_bf16(ptr, val, 7); } -// CHECK-LABEL: test_vst3q_lane_bf16 -// CHECK64: tail call void @llvm.aarch64.neon.st3lane.v8bf16.p0i8(<8 x bfloat> %val.coerce.fca.0.extract, <8 x bfloat> %val.coerce.fca.1.extract, <8 x bfloat> %val.coerce.fca.2.extract, i64 7, i8* %0) -// CHECK32: tail call void @llvm.arm.neon.vst3lane.p0i8.v8bf16(i8* %3, <8 x bfloat> %0, <8 x bfloat> %1, <8 x bfloat> %2, i32 7, i32 2) +// CHECK64-LABEL: @test_vst4_bf16( +// CHECK64-NEXT: entry: +// CHECK64-NEXT: [[VAL_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [4 x <4 x bfloat>] [[VAL_COERCE:%.*]], 0 +// CHECK64-NEXT: [[VAL_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [4 x <4 x bfloat>] [[VAL_COERCE]], 1 +// CHECK64-NEXT: [[VAL_COERCE_FCA_2_EXTRACT:%.*]] = extractvalue [4 x <4 x bfloat>] [[VAL_COERCE]], 2 +// CHECK64-NEXT: [[VAL_COERCE_FCA_3_EXTRACT:%.*]] = extractvalue [4 x <4 x bfloat>] [[VAL_COERCE]], 3 +// CHECK64-NEXT: [[TMP0:%.*]] = bitcast bfloat* [[PTR:%.*]] to i8* +// CHECK64-NEXT: tail call void @llvm.aarch64.neon.st4.v4bf16.p0i8(<4 x bfloat> [[VAL_COERCE_FCA_0_EXTRACT]], <4 x bfloat> [[VAL_COERCE_FCA_1_EXTRACT]], <4 x bfloat> [[VAL_COERCE_FCA_2_EXTRACT]], <4 x bfloat> [[VAL_COERCE_FCA_3_EXTRACT]], i8* [[TMP0]]) +// CHECK64-NEXT: ret void +// +// CHECK32-LABEL: @test_vst4_bf16( +// CHECK32-NEXT: entry: +// CHECK32-NEXT: [[VAL_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [4 x <2 x i32>] [[VAL_COERCE:%.*]], 0 +// CHECK32-NEXT: [[VAL_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [4 x <2 x i32>] [[VAL_COERCE]], 1 +// CHECK32-NEXT: [[VAL_COERCE_FCA_2_EXTRACT:%.*]] = extractvalue [4 x <2 x i32>] [[VAL_COERCE]], 2 +// CHECK32-NEXT: [[VAL_COERCE_FCA_3_EXTRACT:%.*]] = extractvalue [4 x <2 x i32>] [[VAL_COERCE]], 3 +// CHECK32-NEXT: [[TMP0:%.*]] = bitcast <2 x i32> [[VAL_COERCE_FCA_0_EXTRACT]] to <4 x bfloat> +// CHECK32-NEXT: [[TMP1:%.*]] = bitcast <2 x i32> [[VAL_COERCE_FCA_1_EXTRACT]] to <4 x bfloat> +// CHECK32-NEXT: [[TMP2:%.*]] = bitcast <2 x i32> [[VAL_COERCE_FCA_2_EXTRACT]] to <4 x bfloat> +// CHECK32-NEXT: [[TMP3:%.*]] = bitcast <2 x i32> [[VAL_COERCE_FCA_3_EXTRACT]] to <4 x bfloat> +// CHECK32-NEXT: [[TMP4:%.*]] = bitcast bfloat* [[PTR:%.*]] to i8* +// CHECK32-NEXT: tail call void @llvm.arm.neon.vst4.p0i8.v4bf16(i8* [[TMP4]], <4 x bfloat> [[TMP0]], <4 x bfloat> [[TMP1]], <4 x bfloat> [[TMP2]], <4 x bfloat> [[TMP3]], i32 2) +// CHECK32-NEXT: ret void +// void test_vst4_bf16(bfloat16_t *ptr, bfloat16x4x4_t val) { vst4_bf16(ptr, val); } -// CHECK-LABEL: test_vst4_bf16 -// CHECK64: tail call void @llvm.aarch64.neon.st4.v4bf16.p0i8(<4 x bfloat> %val.coerce.fca.0.extract, <4 x bfloat> %val.coerce.fca.1.extract, <4 x bfloat> %val.coerce.fca.2.extract, <4 x bfloat> %val.coerce.fca.3.extract, i8* %0) -// CHECK32: tail call void @llvm.arm.neon.vst4.p0i8.v4bf16(i8* %4, <4 x bfloat> %0, <4 x bfloat> %1, <4 x bfloat> %2, <4 x bfloat> %3, i32 2) +// CHECK64-LABEL: @test_vst4q_bf16( +// CHECK64-NEXT: entry: +// CHECK64-NEXT: [[VAL_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [4 x <8 x bfloat>] [[VAL_COERCE:%.*]], 0 +// CHECK64-NEXT: [[VAL_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [4 x <8 x bfloat>] [[VAL_COERCE]], 1 +// CHECK64-NEXT: [[VAL_COERCE_FCA_2_EXTRACT:%.*]] = extractvalue [4 x <8 x bfloat>] [[VAL_COERCE]], 2 +// CHECK64-NEXT: [[VAL_COERCE_FCA_3_EXTRACT:%.*]] = extractvalue [4 x <8 x bfloat>] [[VAL_COERCE]], 3 +// CHECK64-NEXT: [[TMP0:%.*]] = bitcast bfloat* [[PTR:%.*]] to i8* +// CHECK64-NEXT: tail call void @llvm.aarch64.neon.st4.v8bf16.p0i8(<8 x bfloat> [[VAL_COERCE_FCA_0_EXTRACT]], <8 x bfloat> [[VAL_COERCE_FCA_1_EXTRACT]], <8 x bfloat> [[VAL_COERCE_FCA_2_EXTRACT]], <8 x bfloat> [[VAL_COERCE_FCA_3_EXTRACT]], i8* [[TMP0]]) +// CHECK64-NEXT: ret void +// +// CHECK32-LABEL: @test_vst4q_bf16( +// CHECK32-NEXT: entry: +// CHECK32-NEXT: [[VAL_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [4 x <4 x i32>] [[VAL_COERCE:%.*]], 0 +// CHECK32-NEXT: [[VAL_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [4 x <4 x i32>] [[VAL_COERCE]], 1 +// CHECK32-NEXT: [[VAL_COERCE_FCA_2_EXTRACT:%.*]] = extractvalue [4 x <4 x i32>] [[VAL_COERCE]], 2 +// CHECK32-NEXT: [[VAL_COERCE_FCA_3_EXTRACT:%.*]] = extractvalue [4 x <4 x i32>] [[VAL_COERCE]], 3 +// CHECK32-NEXT: [[TMP0:%.*]] = bitcast <4 x i32> [[VAL_COERCE_FCA_0_EXTRACT]] to <8 x bfloat> +// CHECK32-NEXT: [[TMP1:%.*]] = bitcast <4 x i32> [[VAL_COERCE_FCA_1_EXTRACT]] to <8 x bfloat> +// CHECK32-NEXT: [[TMP2:%.*]] = bitcast <4 x i32> [[VAL_COERCE_FCA_2_EXTRACT]] to <8 x bfloat> +// CHECK32-NEXT: [[TMP3:%.*]] = bitcast <4 x i32> [[VAL_COERCE_FCA_3_EXTRACT]] to <8 x bfloat> +// CHECK32-NEXT: [[TMP4:%.*]] = bitcast bfloat* [[PTR:%.*]] to i8* +// CHECK32-NEXT: tail call void @llvm.arm.neon.vst4.p0i8.v8bf16(i8* [[TMP4]], <8 x bfloat> [[TMP0]], <8 x bfloat> [[TMP1]], <8 x bfloat> [[TMP2]], <8 x bfloat> [[TMP3]], i32 2) +// CHECK32-NEXT: ret void +// void test_vst4q_bf16(bfloat16_t *ptr, bfloat16x8x4_t val) { vst4q_bf16(ptr, val); } -// CHECK-LABEL: test_vst4q_bf16 -// CHECK64: tail call void @llvm.aarch64.neon.st4.v8bf16.p0i8(<8 x bfloat> %val.coerce.fca.0.extract, <8 x bfloat> %val.coerce.fca.1.extract, <8 x bfloat> %val.coerce.fca.2.extract, <8 x bfloat> %val.coerce.fca.3.extract, i8* %0) -// CHECK32: tail call void @llvm.arm.neon.vst4.p0i8.v8bf16(i8* %4, <8 x bfloat> %0, <8 x bfloat> %1, <8 x bfloat> %2, <8 x bfloat> %3, i32 2) +// CHECK64-LABEL: @test_vst4_lane_bf16( +// CHECK64-NEXT: entry: +// CHECK64-NEXT: [[VAL_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [4 x <4 x bfloat>] [[VAL_COERCE:%.*]], 0 +// CHECK64-NEXT: [[VAL_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [4 x <4 x bfloat>] [[VAL_COERCE]], 1 +// CHECK64-NEXT: [[VAL_COERCE_FCA_2_EXTRACT:%.*]] = extractvalue [4 x <4 x bfloat>] [[VAL_COERCE]], 2 +// CHECK64-NEXT: [[VAL_COERCE_FCA_3_EXTRACT:%.*]] = extractvalue [4 x <4 x bfloat>] [[VAL_COERCE]], 3 +// CHECK64-NEXT: [[TMP0:%.*]] = bitcast bfloat* [[PTR:%.*]] to i8* +// CHECK64-NEXT: tail call void @llvm.aarch64.neon.st4lane.v4bf16.p0i8(<4 x bfloat> [[VAL_COERCE_FCA_0_EXTRACT]], <4 x bfloat> [[VAL_COERCE_FCA_1_EXTRACT]], <4 x bfloat> [[VAL_COERCE_FCA_2_EXTRACT]], <4 x bfloat> [[VAL_COERCE_FCA_3_EXTRACT]], i64 1, i8* [[TMP0]]) +// CHECK64-NEXT: ret void +// +// CHECK32-LABEL: @test_vst4_lane_bf16( +// CHECK32-NEXT: entry: +// CHECK32-NEXT: [[VAL_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [4 x <2 x i32>] [[VAL_COERCE:%.*]], 0 +// CHECK32-NEXT: [[VAL_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [4 x <2 x i32>] [[VAL_COERCE]], 1 +// CHECK32-NEXT: [[VAL_COERCE_FCA_2_EXTRACT:%.*]] = extractvalue [4 x <2 x i32>] [[VAL_COERCE]], 2 +// CHECK32-NEXT: [[VAL_COERCE_FCA_3_EXTRACT:%.*]] = extractvalue [4 x <2 x i32>] [[VAL_COERCE]], 3 +// CHECK32-NEXT: [[TMP0:%.*]] = bitcast <2 x i32> [[VAL_COERCE_FCA_0_EXTRACT]] to <4 x bfloat> +// CHECK32-NEXT: [[TMP1:%.*]] = bitcast <2 x i32> [[VAL_COERCE_FCA_1_EXTRACT]] to <4 x bfloat> +// CHECK32-NEXT: [[TMP2:%.*]] = bitcast <2 x i32> [[VAL_COERCE_FCA_2_EXTRACT]] to <4 x bfloat> +// CHECK32-NEXT: [[TMP3:%.*]] = bitcast <2 x i32> [[VAL_COERCE_FCA_3_EXTRACT]] to <4 x bfloat> +// CHECK32-NEXT: [[TMP4:%.*]] = bitcast bfloat* [[PTR:%.*]] to i8* +// CHECK32-NEXT: tail call void @llvm.arm.neon.vst4lane.p0i8.v4bf16(i8* [[TMP4]], <4 x bfloat> [[TMP0]], <4 x bfloat> [[TMP1]], <4 x bfloat> [[TMP2]], <4 x bfloat> [[TMP3]], i32 1, i32 2) +// CHECK32-NEXT: ret void +// void test_vst4_lane_bf16(bfloat16_t *ptr, bfloat16x4x4_t val) { vst4_lane_bf16(ptr, val, 1); } -// CHECK-LABEL: test_vst4_lane_bf16 -// CHECK64: tail call void @llvm.aarch64.neon.st4lane.v4bf16.p0i8(<4 x bfloat> %val.coerce.fca.0.extract, <4 x bfloat> %val.coerce.fca.1.extract, <4 x bfloat> %val.coerce.fca.2.extract, <4 x bfloat> %val.coerce.fca.3.extract, i64 1, i8* %0) -// CHECK32: tail call void @llvm.arm.neon.vst4lane.p0i8.v4bf16(i8* %4, <4 x bfloat> %0, <4 x bfloat> %1, <4 x bfloat> %2, <4 x bfloat> %3, i32 1, i32 2) +// CHECK64-LABEL: @test_vst4q_lane_bf16( +// CHECK64-NEXT: entry: +// CHECK64-NEXT: [[VAL_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [4 x <8 x bfloat>] [[VAL_COERCE:%.*]], 0 +// CHECK64-NEXT: [[VAL_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [4 x <8 x bfloat>] [[VAL_COERCE]], 1 +// CHECK64-NEXT: [[VAL_COERCE_FCA_2_EXTRACT:%.*]] = extractvalue [4 x <8 x bfloat>] [[VAL_COERCE]], 2 +// CHECK64-NEXT: [[VAL_COERCE_FCA_3_EXTRACT:%.*]] = extractvalue [4 x <8 x bfloat>] [[VAL_COERCE]], 3 +// CHECK64-NEXT: [[TMP0:%.*]] = bitcast bfloat* [[PTR:%.*]] to i8* +// CHECK64-NEXT: tail call void @llvm.aarch64.neon.st4lane.v8bf16.p0i8(<8 x bfloat> [[VAL_COERCE_FCA_0_EXTRACT]], <8 x bfloat> [[VAL_COERCE_FCA_1_EXTRACT]], <8 x bfloat> [[VAL_COERCE_FCA_2_EXTRACT]], <8 x bfloat> [[VAL_COERCE_FCA_3_EXTRACT]], i64 7, i8* [[TMP0]]) +// CHECK64-NEXT: ret void +// +// CHECK32-LABEL: @test_vst4q_lane_bf16( +// CHECK32-NEXT: entry: +// CHECK32-NEXT: [[VAL_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [4 x <4 x i32>] [[VAL_COERCE:%.*]], 0 +// CHECK32-NEXT: [[VAL_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [4 x <4 x i32>] [[VAL_COERCE]], 1 +// CHECK32-NEXT: [[VAL_COERCE_FCA_2_EXTRACT:%.*]] = extractvalue [4 x <4 x i32>] [[VAL_COERCE]], 2 +// CHECK32-NEXT: [[VAL_COERCE_FCA_3_EXTRACT:%.*]] = extractvalue [4 x <4 x i32>] [[VAL_COERCE]], 3 +// CHECK32-NEXT: [[TMP0:%.*]] = bitcast <4 x i32> [[VAL_COERCE_FCA_0_EXTRACT]] to <8 x bfloat> +// CHECK32-NEXT: [[TMP1:%.*]] = bitcast <4 x i32> [[VAL_COERCE_FCA_1_EXTRACT]] to <8 x bfloat> +// CHECK32-NEXT: [[TMP2:%.*]] = bitcast <4 x i32> [[VAL_COERCE_FCA_2_EXTRACT]] to <8 x bfloat> +// CHECK32-NEXT: [[TMP3:%.*]] = bitcast <4 x i32> [[VAL_COERCE_FCA_3_EXTRACT]] to <8 x bfloat> +// CHECK32-NEXT: [[TMP4:%.*]] = bitcast bfloat* [[PTR:%.*]] to i8* +// CHECK32-NEXT: tail call void @llvm.arm.neon.vst4lane.p0i8.v8bf16(i8* [[TMP4]], <8 x bfloat> [[TMP0]], <8 x bfloat> [[TMP1]], <8 x bfloat> [[TMP2]], <8 x bfloat> [[TMP3]], i32 7, i32 2) +// CHECK32-NEXT: ret void +// void test_vst4q_lane_bf16(bfloat16_t *ptr, bfloat16x8x4_t val) { vst4q_lane_bf16(ptr, val, 7); } -// CHECK-LABEL: test_vst4q_lane_bf16 -// CHECK64: tail call void @llvm.aarch64.neon.st4lane.v8bf16.p0i8(<8 x bfloat> %val.coerce.fca.0.extract, <8 x bfloat> %val.coerce.fca.1.extract, <8 x bfloat> %val.coerce.fca.2.extract, <8 x bfloat> %val.coerce.fca.3.extract, i64 7, i8* %0) -// CHECK32: tail call void @llvm.arm.neon.vst4lane.p0i8.v8bf16(i8* %4, <8 x bfloat> %0, <8 x bfloat> %1, <8 x bfloat> %2, <8 x bfloat> %3, i32 7, i32 2) diff --git a/clang/test/CodeGen/aarch64-neon-vcmla.c b/clang/test/CodeGen/aarch64-neon-vcmla.c --- a/clang/test/CodeGen/aarch64-neon-vcmla.c +++ b/clang/test/CodeGen/aarch64-neon-vcmla.c @@ -208,7 +208,7 @@ // CHECK-LABEL: @test_vcmlaq_lane_f32( // CHECK: [[CPLX:%.*]] = bitcast <2 x float> %rhs to i64 -// CHECK: [[CPLX_VEC:%.*]] = insertelement <2 x i64> undef, i64 [[CPLX]], i32 0 +// CHECK: [[CPLX_VEC:%.*]] = insertelement <2 x i64> undef, i64 [[CPLX]], i64 0 // CHECK: [[DUP:%.*]] = shufflevector <2 x i64> [[CPLX_VEC]], <2 x i64> poison, <2 x i32> zeroinitializer // CHECK: [[DUP_FLT:%.*]] = bitcast <2 x i64> [[DUP]] to <4 x float> // CHECK: [[RES:%.*]] = call <4 x float> @llvm.aarch64.neon.vcmla.rot0.v4f32(<4 x float> %acc, <4 x float> %lhs, <4 x float> [[DUP_FLT]]) @@ -288,7 +288,7 @@ // CHECK-LABEL: @test_vcmlaq_rot90_lane_f32( // CHECK: [[CPLX:%.*]] = bitcast <2 x float> %rhs to i64 -// CHECK: [[CPLX_VEC:%.*]] = insertelement <2 x i64> undef, i64 [[CPLX]], i32 0 +// CHECK: [[CPLX_VEC:%.*]] = insertelement <2 x i64> undef, i64 [[CPLX]], i64 0 // CHECK: [[DUP:%.*]] = shufflevector <2 x i64> [[CPLX_VEC]], <2 x i64> poison, <2 x i32> zeroinitializer // CHECK: [[DUP_FLT:%.*]] = bitcast <2 x i64> [[DUP]] to <4 x float> // CHECK: [[RES:%.*]] = call <4 x float> @llvm.aarch64.neon.vcmla.rot90.v4f32(<4 x float> %acc, <4 x float> %lhs, <4 x float> [[DUP_FLT]]) @@ -368,7 +368,7 @@ // CHECK-LABEL: @test_vcmlaq_rot180_lane_f32( // CHECK: [[CPLX:%.*]] = bitcast <2 x float> %rhs to i64 -// CHECK: [[CPLX_VEC:%.*]] = insertelement <2 x i64> undef, i64 [[CPLX]], i32 0 +// CHECK: [[CPLX_VEC:%.*]] = insertelement <2 x i64> undef, i64 [[CPLX]], i64 0 // CHECK: [[DUP:%.*]] = shufflevector <2 x i64> [[CPLX_VEC]], <2 x i64> poison, <2 x i32> zeroinitializer // CHECK: [[DUP_FLT:%.*]] = bitcast <2 x i64> [[DUP]] to <4 x float> // CHECK: [[RES:%.*]] = call <4 x float> @llvm.aarch64.neon.vcmla.rot180.v4f32(<4 x float> %acc, <4 x float> %lhs, <4 x float> [[DUP_FLT]]) @@ -448,7 +448,7 @@ // CHECK-LABEL: @test_vcmlaq_rot270_lane_f32( // CHECK: [[CPLX:%.*]] = bitcast <2 x float> %rhs to i64 -// CHECK: [[CPLX_VEC:%.*]] = insertelement <2 x i64> undef, i64 [[CPLX]], i32 0 +// CHECK: [[CPLX_VEC:%.*]] = insertelement <2 x i64> undef, i64 [[CPLX]], i64 0 // CHECK: [[DUP:%.*]] = shufflevector <2 x i64> [[CPLX_VEC]], <2 x i64> poison, <2 x i32> zeroinitializer // CHECK: [[DUP_FLT:%.*]] = bitcast <2 x i64> [[DUP]] to <4 x float> // CHECK: [[RES:%.*]] = call <4 x float> @llvm.aarch64.neon.vcmla.rot270.v4f32(<4 x float> %acc, <4 x float> %lhs, <4 x float> [[DUP_FLT]]) diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_abd.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_abd.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_abd.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_abd.c @@ -428,7 +428,7 @@ // CHECK-LABEL: @test_svabd_n_s8_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sabd.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) @@ -436,7 +436,7 @@ // // CPP-CHECK-LABEL: @_Z17test_svabd_n_s8_zu10__SVBool_tu10__SVInt8_ta( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sabd.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) @@ -450,7 +450,7 @@ // CHECK-LABEL: @test_svabd_n_s16_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.sabd.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -459,7 +459,7 @@ // CPP-CHECK-LABEL: @_Z18test_svabd_n_s16_zu10__SVBool_tu11__SVInt16_ts( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.sabd.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -473,7 +473,7 @@ // CHECK-LABEL: @test_svabd_n_s32_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.sabd.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -482,7 +482,7 @@ // CPP-CHECK-LABEL: @_Z18test_svabd_n_s32_zu10__SVBool_tu11__SVInt32_ti( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.sabd.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -496,7 +496,7 @@ // CHECK-LABEL: @test_svabd_n_s64_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.sabd.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -505,7 +505,7 @@ // CPP-CHECK-LABEL: @_Z18test_svabd_n_s64_zu10__SVBool_tu11__SVInt64_tl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.sabd.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -518,7 +518,7 @@ // CHECK-LABEL: @test_svabd_n_u8_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uabd.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) @@ -526,7 +526,7 @@ // // CPP-CHECK-LABEL: @_Z17test_svabd_n_u8_zu10__SVBool_tu11__SVUint8_th( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uabd.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) @@ -540,7 +540,7 @@ // CHECK-LABEL: @test_svabd_n_u16_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.uabd.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -549,7 +549,7 @@ // CPP-CHECK-LABEL: @_Z18test_svabd_n_u16_zu10__SVBool_tu12__SVUint16_tt( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.uabd.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -563,7 +563,7 @@ // CHECK-LABEL: @test_svabd_n_u32_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.uabd.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -572,7 +572,7 @@ // CPP-CHECK-LABEL: @_Z18test_svabd_n_u32_zu10__SVBool_tu12__SVUint32_tj( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.uabd.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -586,7 +586,7 @@ // CHECK-LABEL: @test_svabd_n_u64_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.uabd.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -595,7 +595,7 @@ // CPP-CHECK-LABEL: @_Z18test_svabd_n_u64_zu10__SVBool_tu12__SVUint64_tm( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.uabd.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -608,14 +608,14 @@ // CHECK-LABEL: @test_svabd_n_s8_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sabd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svabd_n_s8_mu10__SVBool_tu10__SVInt8_ta( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sabd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -628,7 +628,7 @@ // CHECK-LABEL: @test_svabd_n_s16_m( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sabd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -636,7 +636,7 @@ // CPP-CHECK-LABEL: @_Z18test_svabd_n_s16_mu10__SVBool_tu11__SVInt16_ts( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sabd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -649,7 +649,7 @@ // CHECK-LABEL: @test_svabd_n_s32_m( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sabd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -657,7 +657,7 @@ // CPP-CHECK-LABEL: @_Z18test_svabd_n_s32_mu10__SVBool_tu11__SVInt32_ti( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sabd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -670,7 +670,7 @@ // CHECK-LABEL: @test_svabd_n_s64_m( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sabd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -678,7 +678,7 @@ // CPP-CHECK-LABEL: @_Z18test_svabd_n_s64_mu10__SVBool_tu11__SVInt64_tl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sabd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -690,14 +690,14 @@ // CHECK-LABEL: @test_svabd_n_u8_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uabd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svabd_n_u8_mu10__SVBool_tu11__SVUint8_th( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uabd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -710,7 +710,7 @@ // CHECK-LABEL: @test_svabd_n_u16_m( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uabd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -718,7 +718,7 @@ // CPP-CHECK-LABEL: @_Z18test_svabd_n_u16_mu10__SVBool_tu12__SVUint16_tt( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uabd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -731,7 +731,7 @@ // CHECK-LABEL: @test_svabd_n_u32_m( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uabd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -739,7 +739,7 @@ // CPP-CHECK-LABEL: @_Z18test_svabd_n_u32_mu10__SVBool_tu12__SVUint32_tj( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uabd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -752,7 +752,7 @@ // CHECK-LABEL: @test_svabd_n_u64_m( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uabd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -760,7 +760,7 @@ // CPP-CHECK-LABEL: @_Z18test_svabd_n_u64_mu10__SVBool_tu12__SVUint64_tm( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uabd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -772,14 +772,14 @@ // CHECK-LABEL: @test_svabd_n_s8_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sabd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svabd_n_s8_xu10__SVBool_tu10__SVInt8_ta( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sabd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -792,7 +792,7 @@ // CHECK-LABEL: @test_svabd_n_s16_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sabd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -800,7 +800,7 @@ // CPP-CHECK-LABEL: @_Z18test_svabd_n_s16_xu10__SVBool_tu11__SVInt16_ts( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sabd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -813,7 +813,7 @@ // CHECK-LABEL: @test_svabd_n_s32_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sabd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -821,7 +821,7 @@ // CPP-CHECK-LABEL: @_Z18test_svabd_n_s32_xu10__SVBool_tu11__SVInt32_ti( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sabd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -834,7 +834,7 @@ // CHECK-LABEL: @test_svabd_n_s64_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sabd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -842,7 +842,7 @@ // CPP-CHECK-LABEL: @_Z18test_svabd_n_s64_xu10__SVBool_tu11__SVInt64_tl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sabd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -854,14 +854,14 @@ // CHECK-LABEL: @test_svabd_n_u8_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uabd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svabd_n_u8_xu10__SVBool_tu11__SVUint8_th( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uabd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -874,7 +874,7 @@ // CHECK-LABEL: @test_svabd_n_u16_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uabd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -882,7 +882,7 @@ // CPP-CHECK-LABEL: @_Z18test_svabd_n_u16_xu10__SVBool_tu12__SVUint16_tt( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uabd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -895,7 +895,7 @@ // CHECK-LABEL: @test_svabd_n_u32_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uabd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -903,7 +903,7 @@ // CPP-CHECK-LABEL: @_Z18test_svabd_n_u32_xu10__SVBool_tu12__SVUint32_tj( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uabd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -916,7 +916,7 @@ // CHECK-LABEL: @test_svabd_n_u64_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uabd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -924,7 +924,7 @@ // CPP-CHECK-LABEL: @_Z18test_svabd_n_u64_xu10__SVBool_tu12__SVUint64_tm( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uabd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -1059,7 +1059,6 @@ return SVE_ACLE_FUNC(svabd,_f16,_x,)(pg, op1, op2); } -// // CHECK-LABEL: @test_svabd_f32_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) @@ -1097,7 +1096,7 @@ // CHECK-LABEL: @test_svabd_n_f16_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fabd.nxv8f16( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -1106,7 +1105,7 @@ // CPP-CHECK-LABEL: @_Z18test_svabd_n_f16_zu10__SVBool_tu13__SVFloat16_tDh( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fabd.nxv8f16( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -1120,7 +1119,7 @@ // CHECK-LABEL: @test_svabd_n_f32_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fabd.nxv4f32( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -1129,7 +1128,7 @@ // CPP-CHECK-LABEL: @_Z18test_svabd_n_f32_zu10__SVBool_tu13__SVFloat32_tf( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fabd.nxv4f32( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -1143,7 +1142,7 @@ // CHECK-LABEL: @test_svabd_n_f64_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fabd.nxv2f64( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -1152,7 +1151,7 @@ // CPP-CHECK-LABEL: @_Z18test_svabd_n_f64_zu10__SVBool_tu13__SVFloat64_td( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fabd.nxv2f64( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -1166,7 +1165,7 @@ // CHECK-LABEL: @test_svabd_n_f16_m( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fabd.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -1174,7 +1173,7 @@ // CPP-CHECK-LABEL: @_Z18test_svabd_n_f16_mu10__SVBool_tu13__SVFloat16_tDh( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fabd.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -1187,7 +1186,7 @@ // CHECK-LABEL: @test_svabd_n_f32_m( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fabd.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -1195,7 +1194,7 @@ // CPP-CHECK-LABEL: @_Z18test_svabd_n_f32_mu10__SVBool_tu13__SVFloat32_tf( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fabd.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -1208,7 +1207,7 @@ // CHECK-LABEL: @test_svabd_n_f64_m( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fabd.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -1216,7 +1215,7 @@ // CPP-CHECK-LABEL: @_Z18test_svabd_n_f64_mu10__SVBool_tu13__SVFloat64_td( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fabd.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -1229,7 +1228,7 @@ // CHECK-LABEL: @test_svabd_n_f16_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fabd.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -1237,7 +1236,7 @@ // CPP-CHECK-LABEL: @_Z18test_svabd_n_f16_xu10__SVBool_tu13__SVFloat16_tDh( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fabd.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -1250,7 +1249,7 @@ // CHECK-LABEL: @test_svabd_n_f32_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fabd.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -1258,7 +1257,7 @@ // CPP-CHECK-LABEL: @_Z18test_svabd_n_f32_xu10__SVBool_tu13__SVFloat32_tf( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fabd.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -1271,7 +1270,7 @@ // CHECK-LABEL: @test_svabd_n_f64_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fabd.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -1279,7 +1278,7 @@ // CPP-CHECK-LABEL: @_Z18test_svabd_n_f64_xu10__SVBool_tu13__SVFloat64_td( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fabd.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_acge.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_acge.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_acge.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_acge.c @@ -74,7 +74,7 @@ // CHECK-LABEL: @test_svacge_n_f32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.facge.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) @@ -83,7 +83,7 @@ // CPP-CHECK-LABEL: @_Z17test_svacge_n_f32u10__SVBool_tu13__SVFloat32_tf( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.facge.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) @@ -97,7 +97,7 @@ // CHECK-LABEL: @test_svacge_n_f64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.facge.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) @@ -106,7 +106,7 @@ // CPP-CHECK-LABEL: @_Z17test_svacge_n_f64u10__SVBool_tu13__SVFloat64_td( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.facge.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_acgt.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_acgt.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_acgt.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_acgt.c @@ -74,7 +74,7 @@ // CHECK-LABEL: @test_svacgt_n_f32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.facgt.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) @@ -83,7 +83,7 @@ // CPP-CHECK-LABEL: @_Z17test_svacgt_n_f32u10__SVBool_tu13__SVFloat32_tf( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.facgt.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) @@ -97,7 +97,7 @@ // CHECK-LABEL: @test_svacgt_n_f64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.facgt.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) @@ -106,7 +106,7 @@ // CPP-CHECK-LABEL: @_Z17test_svacgt_n_f64u10__SVBool_tu13__SVFloat64_td( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.facgt.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_acle.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_acle.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_acle.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_acle.c @@ -74,7 +74,7 @@ // CHECK-LABEL: @test_svacle_n_f32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.facge.nxv4f32( [[TMP0]], [[TMP1]], [[OP1:%.*]]) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) @@ -83,7 +83,7 @@ // CPP-CHECK-LABEL: @_Z17test_svacle_n_f32u10__SVBool_tu13__SVFloat32_tf( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.facge.nxv4f32( [[TMP0]], [[TMP1]], [[OP1:%.*]]) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) @@ -97,7 +97,7 @@ // CHECK-LABEL: @test_svacle_n_f64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.facge.nxv2f64( [[TMP0]], [[TMP1]], [[OP1:%.*]]) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) @@ -106,7 +106,7 @@ // CPP-CHECK-LABEL: @_Z17test_svacle_n_f64u10__SVBool_tu13__SVFloat64_td( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.facge.nxv2f64( [[TMP0]], [[TMP1]], [[OP1:%.*]]) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_aclt.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_aclt.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_aclt.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_aclt.c @@ -74,7 +74,7 @@ // CHECK-LABEL: @test_svaclt_n_f32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.facgt.nxv4f32( [[TMP0]], [[TMP1]], [[OP1:%.*]]) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) @@ -83,7 +83,7 @@ // CPP-CHECK-LABEL: @_Z17test_svaclt_n_f32u10__SVBool_tu13__SVFloat32_tf( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.facgt.nxv4f32( [[TMP0]], [[TMP1]], [[OP1:%.*]]) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) @@ -97,7 +97,7 @@ // CHECK-LABEL: @test_svaclt_n_f64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.facgt.nxv2f64( [[TMP0]], [[TMP1]], [[OP1:%.*]]) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) @@ -106,7 +106,7 @@ // CPP-CHECK-LABEL: @_Z17test_svaclt_n_f64u10__SVBool_tu13__SVFloat64_td( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.facgt.nxv2f64( [[TMP0]], [[TMP1]], [[OP1:%.*]]) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_add.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_add.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_add.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_add.c @@ -428,7 +428,7 @@ // CHECK-LABEL: @test_svadd_n_s8_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.add.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) @@ -436,7 +436,7 @@ // // CPP-CHECK-LABEL: @_Z17test_svadd_n_s8_zu10__SVBool_tu10__SVInt8_ta( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.add.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) @@ -450,7 +450,7 @@ // CHECK-LABEL: @test_svadd_n_s16_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.add.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -459,7 +459,7 @@ // CPP-CHECK-LABEL: @_Z18test_svadd_n_s16_zu10__SVBool_tu11__SVInt16_ts( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.add.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -473,7 +473,7 @@ // CHECK-LABEL: @test_svadd_n_s32_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.add.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -482,7 +482,7 @@ // CPP-CHECK-LABEL: @_Z18test_svadd_n_s32_zu10__SVBool_tu11__SVInt32_ti( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.add.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -496,7 +496,7 @@ // CHECK-LABEL: @test_svadd_n_s64_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.add.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -505,7 +505,7 @@ // CPP-CHECK-LABEL: @_Z18test_svadd_n_s64_zu10__SVBool_tu11__SVInt64_tl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.add.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -518,7 +518,7 @@ // CHECK-LABEL: @test_svadd_n_u8_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.add.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) @@ -526,7 +526,7 @@ // // CPP-CHECK-LABEL: @_Z17test_svadd_n_u8_zu10__SVBool_tu11__SVUint8_th( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.add.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) @@ -540,7 +540,7 @@ // CHECK-LABEL: @test_svadd_n_u16_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.add.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -549,7 +549,7 @@ // CPP-CHECK-LABEL: @_Z18test_svadd_n_u16_zu10__SVBool_tu12__SVUint16_tt( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.add.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -563,7 +563,7 @@ // CHECK-LABEL: @test_svadd_n_u32_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.add.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -572,7 +572,7 @@ // CPP-CHECK-LABEL: @_Z18test_svadd_n_u32_zu10__SVBool_tu12__SVUint32_tj( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.add.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -586,7 +586,7 @@ // CHECK-LABEL: @test_svadd_n_u64_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.add.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -595,7 +595,7 @@ // CPP-CHECK-LABEL: @_Z18test_svadd_n_u64_zu10__SVBool_tu12__SVUint64_tm( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.add.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -608,14 +608,14 @@ // CHECK-LABEL: @test_svadd_n_s8_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.add.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svadd_n_s8_mu10__SVBool_tu10__SVInt8_ta( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.add.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -628,7 +628,7 @@ // CHECK-LABEL: @test_svadd_n_s16_m( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.add.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -636,7 +636,7 @@ // CPP-CHECK-LABEL: @_Z18test_svadd_n_s16_mu10__SVBool_tu11__SVInt16_ts( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.add.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -649,7 +649,7 @@ // CHECK-LABEL: @test_svadd_n_s32_m( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.add.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -657,7 +657,7 @@ // CPP-CHECK-LABEL: @_Z18test_svadd_n_s32_mu10__SVBool_tu11__SVInt32_ti( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.add.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -670,7 +670,7 @@ // CHECK-LABEL: @test_svadd_n_s64_m( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.add.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -678,7 +678,7 @@ // CPP-CHECK-LABEL: @_Z18test_svadd_n_s64_mu10__SVBool_tu11__SVInt64_tl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.add.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -690,14 +690,14 @@ // CHECK-LABEL: @test_svadd_n_u8_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.add.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svadd_n_u8_mu10__SVBool_tu11__SVUint8_th( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.add.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -710,7 +710,7 @@ // CHECK-LABEL: @test_svadd_n_u16_m( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.add.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -718,7 +718,7 @@ // CPP-CHECK-LABEL: @_Z18test_svadd_n_u16_mu10__SVBool_tu12__SVUint16_tt( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.add.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -731,7 +731,7 @@ // CHECK-LABEL: @test_svadd_n_u32_m( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.add.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -739,7 +739,7 @@ // CPP-CHECK-LABEL: @_Z18test_svadd_n_u32_mu10__SVBool_tu12__SVUint32_tj( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.add.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -752,7 +752,7 @@ // CHECK-LABEL: @test_svadd_n_u64_m( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.add.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -760,7 +760,7 @@ // CPP-CHECK-LABEL: @_Z18test_svadd_n_u64_mu10__SVBool_tu12__SVUint64_tm( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.add.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -772,14 +772,14 @@ // CHECK-LABEL: @test_svadd_n_s8_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.add.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svadd_n_s8_xu10__SVBool_tu10__SVInt8_ta( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.add.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -792,7 +792,7 @@ // CHECK-LABEL: @test_svadd_n_s16_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.add.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -800,7 +800,7 @@ // CPP-CHECK-LABEL: @_Z18test_svadd_n_s16_xu10__SVBool_tu11__SVInt16_ts( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.add.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -813,7 +813,7 @@ // CHECK-LABEL: @test_svadd_n_s32_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.add.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -821,7 +821,7 @@ // CPP-CHECK-LABEL: @_Z18test_svadd_n_s32_xu10__SVBool_tu11__SVInt32_ti( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.add.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -834,7 +834,7 @@ // CHECK-LABEL: @test_svadd_n_s64_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.add.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -842,7 +842,7 @@ // CPP-CHECK-LABEL: @_Z18test_svadd_n_s64_xu10__SVBool_tu11__SVInt64_tl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.add.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -854,14 +854,14 @@ // CHECK-LABEL: @test_svadd_n_u8_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.add.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svadd_n_u8_xu10__SVBool_tu11__SVUint8_th( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.add.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -874,7 +874,7 @@ // CHECK-LABEL: @test_svadd_n_u16_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.add.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -882,7 +882,7 @@ // CPP-CHECK-LABEL: @_Z18test_svadd_n_u16_xu10__SVBool_tu12__SVUint16_tt( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.add.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -895,7 +895,7 @@ // CHECK-LABEL: @test_svadd_n_u32_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.add.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -903,7 +903,7 @@ // CPP-CHECK-LABEL: @_Z18test_svadd_n_u32_xu10__SVBool_tu12__SVUint32_tj( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.add.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -916,7 +916,7 @@ // CHECK-LABEL: @test_svadd_n_u64_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.add.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -924,7 +924,7 @@ // CPP-CHECK-LABEL: @_Z18test_svadd_n_u64_xu10__SVBool_tu12__SVUint64_tm( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.add.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -1096,7 +1096,7 @@ // CHECK-LABEL: @test_svadd_n_f16_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fadd.nxv8f16( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -1105,7 +1105,7 @@ // CPP-CHECK-LABEL: @_Z18test_svadd_n_f16_zu10__SVBool_tu13__SVFloat16_tDh( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fadd.nxv8f16( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -1119,7 +1119,7 @@ // CHECK-LABEL: @test_svadd_n_f32_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fadd.nxv4f32( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -1128,7 +1128,7 @@ // CPP-CHECK-LABEL: @_Z18test_svadd_n_f32_zu10__SVBool_tu13__SVFloat32_tf( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fadd.nxv4f32( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -1142,7 +1142,7 @@ // CHECK-LABEL: @test_svadd_n_f64_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fadd.nxv2f64( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -1151,7 +1151,7 @@ // CPP-CHECK-LABEL: @_Z18test_svadd_n_f64_zu10__SVBool_tu13__SVFloat64_td( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fadd.nxv2f64( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -1165,7 +1165,7 @@ // CHECK-LABEL: @test_svadd_n_f16_m( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fadd.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -1173,7 +1173,7 @@ // CPP-CHECK-LABEL: @_Z18test_svadd_n_f16_mu10__SVBool_tu13__SVFloat16_tDh( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fadd.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -1186,7 +1186,7 @@ // CHECK-LABEL: @test_svadd_n_f32_m( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fadd.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -1194,7 +1194,7 @@ // CPP-CHECK-LABEL: @_Z18test_svadd_n_f32_mu10__SVBool_tu13__SVFloat32_tf( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fadd.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -1207,7 +1207,7 @@ // CHECK-LABEL: @test_svadd_n_f64_m( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fadd.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -1215,7 +1215,7 @@ // CPP-CHECK-LABEL: @_Z18test_svadd_n_f64_mu10__SVBool_tu13__SVFloat64_td( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fadd.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -1228,7 +1228,7 @@ // CHECK-LABEL: @test_svadd_n_f16_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fadd.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -1236,7 +1236,7 @@ // CPP-CHECK-LABEL: @_Z18test_svadd_n_f16_xu10__SVBool_tu13__SVFloat16_tDh( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fadd.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -1249,7 +1249,7 @@ // CHECK-LABEL: @test_svadd_n_f32_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fadd.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -1257,7 +1257,7 @@ // CPP-CHECK-LABEL: @_Z18test_svadd_n_f32_xu10__SVBool_tu13__SVFloat32_tf( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fadd.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -1270,7 +1270,7 @@ // CHECK-LABEL: @test_svadd_n_f64_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fadd.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -1278,7 +1278,7 @@ // CPP-CHECK-LABEL: @_Z18test_svadd_n_f64_xu10__SVBool_tu13__SVFloat64_td( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fadd.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_and.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_and.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_and.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_and.c @@ -428,7 +428,7 @@ // CHECK-LABEL: @test_svand_n_s8_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.and.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) @@ -436,7 +436,7 @@ // // CPP-CHECK-LABEL: @_Z17test_svand_n_s8_zu10__SVBool_tu10__SVInt8_ta( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.and.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) @@ -450,7 +450,7 @@ // CHECK-LABEL: @test_svand_n_s16_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.and.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -459,7 +459,7 @@ // CPP-CHECK-LABEL: @_Z18test_svand_n_s16_zu10__SVBool_tu11__SVInt16_ts( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.and.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -473,7 +473,7 @@ // CHECK-LABEL: @test_svand_n_s32_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.and.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -482,7 +482,7 @@ // CPP-CHECK-LABEL: @_Z18test_svand_n_s32_zu10__SVBool_tu11__SVInt32_ti( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.and.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -496,7 +496,7 @@ // CHECK-LABEL: @test_svand_n_s64_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.and.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -505,7 +505,7 @@ // CPP-CHECK-LABEL: @_Z18test_svand_n_s64_zu10__SVBool_tu11__SVInt64_tl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.and.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -518,7 +518,7 @@ // CHECK-LABEL: @test_svand_n_u8_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.and.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) @@ -526,7 +526,7 @@ // // CPP-CHECK-LABEL: @_Z17test_svand_n_u8_zu10__SVBool_tu11__SVUint8_th( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.and.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) @@ -540,7 +540,7 @@ // CHECK-LABEL: @test_svand_n_u16_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.and.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -549,7 +549,7 @@ // CPP-CHECK-LABEL: @_Z18test_svand_n_u16_zu10__SVBool_tu12__SVUint16_tt( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.and.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -563,7 +563,7 @@ // CHECK-LABEL: @test_svand_n_u32_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.and.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -572,7 +572,7 @@ // CPP-CHECK-LABEL: @_Z18test_svand_n_u32_zu10__SVBool_tu12__SVUint32_tj( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.and.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -586,7 +586,7 @@ // CHECK-LABEL: @test_svand_n_u64_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.and.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -595,7 +595,7 @@ // CPP-CHECK-LABEL: @_Z18test_svand_n_u64_zu10__SVBool_tu12__SVUint64_tm( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.and.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -608,14 +608,14 @@ // CHECK-LABEL: @test_svand_n_s8_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.and.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svand_n_s8_mu10__SVBool_tu10__SVInt8_ta( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.and.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -628,7 +628,7 @@ // CHECK-LABEL: @test_svand_n_s16_m( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.and.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -636,7 +636,7 @@ // CPP-CHECK-LABEL: @_Z18test_svand_n_s16_mu10__SVBool_tu11__SVInt16_ts( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.and.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -649,7 +649,7 @@ // CHECK-LABEL: @test_svand_n_s32_m( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.and.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -657,7 +657,7 @@ // CPP-CHECK-LABEL: @_Z18test_svand_n_s32_mu10__SVBool_tu11__SVInt32_ti( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.and.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -670,7 +670,7 @@ // CHECK-LABEL: @test_svand_n_s64_m( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.and.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -678,7 +678,7 @@ // CPP-CHECK-LABEL: @_Z18test_svand_n_s64_mu10__SVBool_tu11__SVInt64_tl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.and.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -690,14 +690,14 @@ // CHECK-LABEL: @test_svand_n_u8_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.and.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svand_n_u8_mu10__SVBool_tu11__SVUint8_th( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.and.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -710,7 +710,7 @@ // CHECK-LABEL: @test_svand_n_u16_m( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.and.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -718,7 +718,7 @@ // CPP-CHECK-LABEL: @_Z18test_svand_n_u16_mu10__SVBool_tu12__SVUint16_tt( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.and.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -731,7 +731,7 @@ // CHECK-LABEL: @test_svand_n_u32_m( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.and.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -739,7 +739,7 @@ // CPP-CHECK-LABEL: @_Z18test_svand_n_u32_mu10__SVBool_tu12__SVUint32_tj( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.and.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -752,7 +752,7 @@ // CHECK-LABEL: @test_svand_n_u64_m( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.and.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -760,7 +760,7 @@ // CPP-CHECK-LABEL: @_Z18test_svand_n_u64_mu10__SVBool_tu12__SVUint64_tm( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.and.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -772,14 +772,14 @@ // CHECK-LABEL: @test_svand_n_s8_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.and.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svand_n_s8_xu10__SVBool_tu10__SVInt8_ta( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.and.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -792,7 +792,7 @@ // CHECK-LABEL: @test_svand_n_s16_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.and.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -800,7 +800,7 @@ // CPP-CHECK-LABEL: @_Z18test_svand_n_s16_xu10__SVBool_tu11__SVInt16_ts( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.and.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -813,7 +813,7 @@ // CHECK-LABEL: @test_svand_n_s32_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.and.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -821,7 +821,7 @@ // CPP-CHECK-LABEL: @_Z18test_svand_n_s32_xu10__SVBool_tu11__SVInt32_ti( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.and.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -834,7 +834,7 @@ // CHECK-LABEL: @test_svand_n_s64_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.and.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -842,7 +842,7 @@ // CPP-CHECK-LABEL: @_Z18test_svand_n_s64_xu10__SVBool_tu11__SVInt64_tl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.and.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -854,14 +854,14 @@ // CHECK-LABEL: @test_svand_n_u8_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.and.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svand_n_u8_xu10__SVBool_tu11__SVUint8_th( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.and.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -874,7 +874,7 @@ // CHECK-LABEL: @test_svand_n_u16_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.and.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -882,7 +882,7 @@ // CPP-CHECK-LABEL: @_Z18test_svand_n_u16_xu10__SVBool_tu12__SVUint16_tt( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.and.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -895,7 +895,7 @@ // CHECK-LABEL: @test_svand_n_u32_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.and.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -903,7 +903,7 @@ // CPP-CHECK-LABEL: @_Z18test_svand_n_u32_xu10__SVBool_tu12__SVUint32_tj( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.and.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -916,7 +916,7 @@ // CHECK-LABEL: @test_svand_n_u64_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.and.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -924,7 +924,7 @@ // CPP-CHECK-LABEL: @_Z18test_svand_n_u64_xu10__SVBool_tu12__SVUint64_tm( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.and.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_asr.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_asr.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_asr.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_asr.c @@ -223,7 +223,7 @@ // CHECK-LABEL: @test_svasr_n_s64_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.asr.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -232,7 +232,7 @@ // CPP-CHECK-LABEL: @_Z18test_svasr_n_s64_zu10__SVBool_tu11__SVInt64_tm( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.asr.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -246,7 +246,7 @@ // CHECK-LABEL: @test_svasr_n_s64_m( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.asr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -254,7 +254,7 @@ // CPP-CHECK-LABEL: @_Z18test_svasr_n_s64_mu10__SVBool_tu11__SVInt64_tm( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.asr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -267,7 +267,7 @@ // CHECK-LABEL: @test_svasr_n_s64_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.asr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -275,7 +275,7 @@ // CPP-CHECK-LABEL: @_Z18test_svasr_n_s64_xu10__SVBool_tu11__SVInt64_tm( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.asr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -440,7 +440,7 @@ // CHECK-LABEL: @test_svasr_n_s8_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.asr.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) @@ -448,7 +448,7 @@ // // CPP-CHECK-LABEL: @_Z17test_svasr_n_s8_zu10__SVBool_tu10__SVInt8_th( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.asr.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) @@ -462,7 +462,7 @@ // CHECK-LABEL: @test_svasr_n_s16_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.asr.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -471,7 +471,7 @@ // CPP-CHECK-LABEL: @_Z18test_svasr_n_s16_zu10__SVBool_tu11__SVInt16_tt( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.asr.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -485,7 +485,7 @@ // CHECK-LABEL: @test_svasr_n_s32_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.asr.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -494,7 +494,7 @@ // CPP-CHECK-LABEL: @_Z18test_svasr_n_s32_zu10__SVBool_tu11__SVInt32_tj( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.asr.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -507,14 +507,14 @@ // CHECK-LABEL: @test_svasr_n_s8_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.asr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svasr_n_s8_mu10__SVBool_tu10__SVInt8_th( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.asr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -527,7 +527,7 @@ // CHECK-LABEL: @test_svasr_n_s16_m( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.asr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -535,7 +535,7 @@ // CPP-CHECK-LABEL: @_Z18test_svasr_n_s16_mu10__SVBool_tu11__SVInt16_tt( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.asr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -548,7 +548,7 @@ // CHECK-LABEL: @test_svasr_n_s32_m( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.asr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -556,7 +556,7 @@ // CPP-CHECK-LABEL: @_Z18test_svasr_n_s32_mu10__SVBool_tu11__SVInt32_tj( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.asr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -568,14 +568,14 @@ // CHECK-LABEL: @test_svasr_n_s8_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.asr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svasr_n_s8_xu10__SVBool_tu10__SVInt8_th( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.asr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -588,7 +588,7 @@ // CHECK-LABEL: @test_svasr_n_s16_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.asr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -596,7 +596,7 @@ // CPP-CHECK-LABEL: @_Z18test_svasr_n_s16_xu10__SVBool_tu11__SVInt16_tt( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.asr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -609,7 +609,7 @@ // CHECK-LABEL: @test_svasr_n_s32_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.asr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -617,7 +617,7 @@ // CPP-CHECK-LABEL: @_Z18test_svasr_n_s32_xu10__SVBool_tu11__SVInt32_tj( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.asr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -629,14 +629,14 @@ // CHECK-LABEL: @test_svasr_wide_n_s8_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.asr.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z22test_svasr_wide_n_s8_mu10__SVBool_tu10__SVInt8_tm( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.asr.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -649,7 +649,7 @@ // CHECK-LABEL: @test_svasr_wide_n_s16_m( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.asr.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -657,7 +657,7 @@ // CPP-CHECK-LABEL: @_Z23test_svasr_wide_n_s16_mu10__SVBool_tu11__SVInt16_tm( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.asr.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -670,7 +670,7 @@ // CHECK-LABEL: @test_svasr_wide_n_s32_m( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.asr.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -678,7 +678,7 @@ // CPP-CHECK-LABEL: @_Z23test_svasr_wide_n_s32_mu10__SVBool_tu11__SVInt32_tm( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.asr.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -690,7 +690,7 @@ // CHECK-LABEL: @test_svasr_wide_n_s8_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.asr.wide.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) @@ -698,7 +698,7 @@ // // CPP-CHECK-LABEL: @_Z22test_svasr_wide_n_s8_zu10__SVBool_tu10__SVInt8_tm( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.asr.wide.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) @@ -712,7 +712,7 @@ // CHECK-LABEL: @test_svasr_wide_n_s16_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.asr.wide.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -721,7 +721,7 @@ // CPP-CHECK-LABEL: @_Z23test_svasr_wide_n_s16_zu10__SVBool_tu11__SVInt16_tm( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.asr.wide.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -735,7 +735,7 @@ // CHECK-LABEL: @test_svasr_wide_n_s32_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.asr.wide.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -744,7 +744,7 @@ // CPP-CHECK-LABEL: @_Z23test_svasr_wide_n_s32_zu10__SVBool_tu11__SVInt32_tm( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.asr.wide.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -757,14 +757,14 @@ // CHECK-LABEL: @test_svasr_wide_n_s8_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.asr.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z22test_svasr_wide_n_s8_xu10__SVBool_tu10__SVInt8_tm( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.asr.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -777,7 +777,7 @@ // CHECK-LABEL: @test_svasr_wide_n_s16_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.asr.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -785,7 +785,7 @@ // CPP-CHECK-LABEL: @_Z23test_svasr_wide_n_s16_xu10__SVBool_tu11__SVInt16_tm( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.asr.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -798,7 +798,7 @@ // CHECK-LABEL: @test_svasr_wide_n_s32_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.asr.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -806,7 +806,7 @@ // CPP-CHECK-LABEL: @_Z23test_svasr_wide_n_s32_xu10__SVBool_tu11__SVInt32_tm( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.asr.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_bfdot.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_bfdot.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_bfdot.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_bfdot.c @@ -59,14 +59,14 @@ // CHECK-LABEL: @test_bfdot_n_f32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, bfloat [[Z:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, bfloat [[Z:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bfdot( [[X:%.*]], [[Y:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_bfdot_n_f32u13__SVFloat32_tu14__SVBFloat16_tu6__bf16( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, bfloat [[Z:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, bfloat [[Z:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bfdot( [[X:%.*]], [[Y:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_bfmlalb.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_bfmlalb.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_bfmlalb.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_bfmlalb.c @@ -59,14 +59,14 @@ // CHECK-LABEL: @test_bfmlalb_n_f32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, bfloat [[Z:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, bfloat [[Z:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bfmlalb( [[X:%.*]], [[Y:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_bfmlalb_n_f32u13__SVFloat32_tu14__SVBFloat16_tu6__bf16( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, bfloat [[Z:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, bfloat [[Z:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bfmlalb( [[X:%.*]], [[Y:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_bfmlalt.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_bfmlalt.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_bfmlalt.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_bfmlalt.c @@ -59,14 +59,14 @@ // CHECK-LABEL: @test_bfmlalt_n_f32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, bfloat [[Z:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, bfloat [[Z:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bfmlalt( [[X:%.*]], [[Y:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_bfmlalt_n_f32u13__SVFloat32_tu14__SVBFloat16_tu6__bf16( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, bfloat [[Z:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, bfloat [[Z:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bfmlalt( [[X:%.*]], [[Y:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_bic.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_bic.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_bic.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_bic.c @@ -428,7 +428,7 @@ // CHECK-LABEL: @test_svbic_n_s8_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.bic.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) @@ -436,7 +436,7 @@ // // CPP-CHECK-LABEL: @_Z17test_svbic_n_s8_zu10__SVBool_tu10__SVInt8_ta( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.bic.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) @@ -450,7 +450,7 @@ // CHECK-LABEL: @test_svbic_n_s16_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.bic.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -459,7 +459,7 @@ // CPP-CHECK-LABEL: @_Z18test_svbic_n_s16_zu10__SVBool_tu11__SVInt16_ts( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.bic.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -473,7 +473,7 @@ // CHECK-LABEL: @test_svbic_n_s32_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.bic.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -482,7 +482,7 @@ // CPP-CHECK-LABEL: @_Z18test_svbic_n_s32_zu10__SVBool_tu11__SVInt32_ti( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.bic.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -496,7 +496,7 @@ // CHECK-LABEL: @test_svbic_n_s64_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.bic.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -505,7 +505,7 @@ // CPP-CHECK-LABEL: @_Z18test_svbic_n_s64_zu10__SVBool_tu11__SVInt64_tl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.bic.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -518,7 +518,7 @@ // CHECK-LABEL: @test_svbic_n_u8_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.bic.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) @@ -526,7 +526,7 @@ // // CPP-CHECK-LABEL: @_Z17test_svbic_n_u8_zu10__SVBool_tu11__SVUint8_th( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.bic.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) @@ -540,7 +540,7 @@ // CHECK-LABEL: @test_svbic_n_u16_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.bic.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -549,7 +549,7 @@ // CPP-CHECK-LABEL: @_Z18test_svbic_n_u16_zu10__SVBool_tu12__SVUint16_tt( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.bic.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -563,7 +563,7 @@ // CHECK-LABEL: @test_svbic_n_u32_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.bic.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -572,7 +572,7 @@ // CPP-CHECK-LABEL: @_Z18test_svbic_n_u32_zu10__SVBool_tu12__SVUint32_tj( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.bic.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -586,7 +586,7 @@ // CHECK-LABEL: @test_svbic_n_u64_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.bic.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -595,7 +595,7 @@ // CPP-CHECK-LABEL: @_Z18test_svbic_n_u64_zu10__SVBool_tu12__SVUint64_tm( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.bic.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -608,14 +608,14 @@ // CHECK-LABEL: @test_svbic_n_s8_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bic.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svbic_n_s8_mu10__SVBool_tu10__SVInt8_ta( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bic.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -628,7 +628,7 @@ // CHECK-LABEL: @test_svbic_n_s16_m( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.bic.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -636,7 +636,7 @@ // CPP-CHECK-LABEL: @_Z18test_svbic_n_s16_mu10__SVBool_tu11__SVInt16_ts( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.bic.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -649,7 +649,7 @@ // CHECK-LABEL: @test_svbic_n_s32_m( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.bic.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -657,7 +657,7 @@ // CPP-CHECK-LABEL: @_Z18test_svbic_n_s32_mu10__SVBool_tu11__SVInt32_ti( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.bic.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -670,7 +670,7 @@ // CHECK-LABEL: @test_svbic_n_s64_m( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.bic.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -678,7 +678,7 @@ // CPP-CHECK-LABEL: @_Z18test_svbic_n_s64_mu10__SVBool_tu11__SVInt64_tl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.bic.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -690,14 +690,14 @@ // CHECK-LABEL: @test_svbic_n_u8_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bic.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svbic_n_u8_mu10__SVBool_tu11__SVUint8_th( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bic.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -710,7 +710,7 @@ // CHECK-LABEL: @test_svbic_n_u16_m( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.bic.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -718,7 +718,7 @@ // CPP-CHECK-LABEL: @_Z18test_svbic_n_u16_mu10__SVBool_tu12__SVUint16_tt( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.bic.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -731,7 +731,7 @@ // CHECK-LABEL: @test_svbic_n_u32_m( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.bic.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -739,7 +739,7 @@ // CPP-CHECK-LABEL: @_Z18test_svbic_n_u32_mu10__SVBool_tu12__SVUint32_tj( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.bic.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -752,7 +752,7 @@ // CHECK-LABEL: @test_svbic_n_u64_m( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.bic.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -760,7 +760,7 @@ // CPP-CHECK-LABEL: @_Z18test_svbic_n_u64_mu10__SVBool_tu12__SVUint64_tm( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.bic.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -772,14 +772,14 @@ // CHECK-LABEL: @test_svbic_n_s8_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bic.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svbic_n_s8_xu10__SVBool_tu10__SVInt8_ta( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bic.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -792,7 +792,7 @@ // CHECK-LABEL: @test_svbic_n_s16_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.bic.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -800,7 +800,7 @@ // CPP-CHECK-LABEL: @_Z18test_svbic_n_s16_xu10__SVBool_tu11__SVInt16_ts( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.bic.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -813,7 +813,7 @@ // CHECK-LABEL: @test_svbic_n_s32_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.bic.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -821,7 +821,7 @@ // CPP-CHECK-LABEL: @_Z18test_svbic_n_s32_xu10__SVBool_tu11__SVInt32_ti( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.bic.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -834,7 +834,7 @@ // CHECK-LABEL: @test_svbic_n_s64_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.bic.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -842,7 +842,7 @@ // CPP-CHECK-LABEL: @_Z18test_svbic_n_s64_xu10__SVBool_tu11__SVInt64_tl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.bic.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -854,14 +854,14 @@ // CHECK-LABEL: @test_svbic_n_u8_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bic.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svbic_n_u8_xu10__SVBool_tu11__SVUint8_th( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bic.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -874,7 +874,7 @@ // CHECK-LABEL: @test_svbic_n_u16_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.bic.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -882,7 +882,7 @@ // CPP-CHECK-LABEL: @_Z18test_svbic_n_u16_xu10__SVBool_tu12__SVUint16_tt( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.bic.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -895,7 +895,7 @@ // CHECK-LABEL: @test_svbic_n_u32_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.bic.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -903,7 +903,7 @@ // CPP-CHECK-LABEL: @_Z18test_svbic_n_u32_xu10__SVBool_tu12__SVUint32_tj( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.bic.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -916,7 +916,7 @@ // CHECK-LABEL: @test_svbic_n_u64_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.bic.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -924,7 +924,7 @@ // CPP-CHECK-LABEL: @_Z18test_svbic_n_u64_xu10__SVBool_tu12__SVUint64_tm( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.bic.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cmpeq.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cmpeq.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cmpeq.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cmpeq.c @@ -161,7 +161,7 @@ // CHECK-LABEL: @test_svcmpeq_n_s64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpeq.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) @@ -170,7 +170,7 @@ // CPP-CHECK-LABEL: @_Z18test_svcmpeq_n_s64u10__SVBool_tu11__SVInt64_tl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpeq.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) @@ -184,7 +184,7 @@ // CHECK-LABEL: @test_svcmpeq_n_u64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpeq.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) @@ -193,7 +193,7 @@ // CPP-CHECK-LABEL: @_Z18test_svcmpeq_n_u64u10__SVBool_tu12__SVUint64_tm( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpeq.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) @@ -259,14 +259,14 @@ // CHECK-LABEL: @test_svcmpeq_n_s8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpeq.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svcmpeq_n_s8u10__SVBool_tu10__SVInt8_ta( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpeq.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -279,7 +279,7 @@ // CHECK-LABEL: @test_svcmpeq_n_s16( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpeq.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) @@ -288,7 +288,7 @@ // CPP-CHECK-LABEL: @_Z18test_svcmpeq_n_s16u10__SVBool_tu11__SVInt16_ts( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpeq.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) @@ -302,7 +302,7 @@ // CHECK-LABEL: @test_svcmpeq_n_s32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpeq.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) @@ -311,7 +311,7 @@ // CPP-CHECK-LABEL: @_Z18test_svcmpeq_n_s32u10__SVBool_tu11__SVInt32_ti( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpeq.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) @@ -324,14 +324,14 @@ // CHECK-LABEL: @test_svcmpeq_n_u8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpeq.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svcmpeq_n_u8u10__SVBool_tu11__SVUint8_th( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpeq.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -344,7 +344,7 @@ // CHECK-LABEL: @test_svcmpeq_n_u16( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpeq.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) @@ -353,7 +353,7 @@ // CPP-CHECK-LABEL: @_Z18test_svcmpeq_n_u16u10__SVBool_tu12__SVUint16_tt( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpeq.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) @@ -367,7 +367,7 @@ // CHECK-LABEL: @test_svcmpeq_n_u32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpeq.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) @@ -376,7 +376,7 @@ // CPP-CHECK-LABEL: @_Z18test_svcmpeq_n_u32u10__SVBool_tu12__SVUint32_tj( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpeq.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) @@ -447,7 +447,7 @@ // CHECK-LABEL: @test_svcmpeq_n_f16( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fcmpeq.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) @@ -456,7 +456,7 @@ // CPP-CHECK-LABEL: @_Z18test_svcmpeq_n_f16u10__SVBool_tu13__SVFloat16_tDh( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fcmpeq.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) @@ -470,7 +470,7 @@ // CHECK-LABEL: @test_svcmpeq_n_f32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fcmpeq.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) @@ -479,7 +479,7 @@ // CPP-CHECK-LABEL: @_Z18test_svcmpeq_n_f32u10__SVBool_tu13__SVFloat32_tf( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fcmpeq.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) @@ -493,7 +493,7 @@ // CHECK-LABEL: @test_svcmpeq_n_f64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fcmpeq.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) @@ -502,7 +502,7 @@ // CPP-CHECK-LABEL: @_Z18test_svcmpeq_n_f64u10__SVBool_tu13__SVFloat64_td( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fcmpeq.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) @@ -515,14 +515,14 @@ // CHECK-LABEL: @test_svcmpeq_wide_n_s8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpeq.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z22test_svcmpeq_wide_n_s8u10__SVBool_tu10__SVInt8_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpeq.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -535,7 +535,7 @@ // CHECK-LABEL: @test_svcmpeq_wide_n_s16( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpeq.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) @@ -544,7 +544,7 @@ // CPP-CHECK-LABEL: @_Z23test_svcmpeq_wide_n_s16u10__SVBool_tu11__SVInt16_tl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpeq.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) @@ -558,7 +558,7 @@ // CHECK-LABEL: @test_svcmpeq_wide_n_s32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpeq.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) @@ -567,7 +567,7 @@ // CPP-CHECK-LABEL: @_Z23test_svcmpeq_wide_n_s32u10__SVBool_tu11__SVInt32_tl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpeq.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cmpge.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cmpge.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cmpge.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cmpge.c @@ -161,7 +161,7 @@ // CHECK-LABEL: @test_svcmpge_n_s64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpge.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) @@ -170,7 +170,7 @@ // CPP-CHECK-LABEL: @_Z18test_svcmpge_n_s64u10__SVBool_tu11__SVInt64_tl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpge.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) @@ -184,7 +184,7 @@ // CHECK-LABEL: @test_svcmpge_n_u64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmphs.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) @@ -193,7 +193,7 @@ // CPP-CHECK-LABEL: @_Z18test_svcmpge_n_u64u10__SVBool_tu12__SVUint64_tm( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmphs.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) @@ -312,14 +312,14 @@ // CHECK-LABEL: @test_svcmpge_n_s8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpge.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svcmpge_n_s8u10__SVBool_tu10__SVInt8_ta( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpge.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -332,7 +332,7 @@ // CHECK-LABEL: @test_svcmpge_n_s16( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpge.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) @@ -341,7 +341,7 @@ // CPP-CHECK-LABEL: @_Z18test_svcmpge_n_s16u10__SVBool_tu11__SVInt16_ts( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpge.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) @@ -355,7 +355,7 @@ // CHECK-LABEL: @test_svcmpge_n_s32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpge.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) @@ -364,7 +364,7 @@ // CPP-CHECK-LABEL: @_Z18test_svcmpge_n_s32u10__SVBool_tu11__SVInt32_ti( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpge.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) @@ -377,14 +377,14 @@ // CHECK-LABEL: @test_svcmpge_n_u8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmphs.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svcmpge_n_u8u10__SVBool_tu11__SVUint8_th( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmphs.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -397,7 +397,7 @@ // CHECK-LABEL: @test_svcmpge_n_u16( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmphs.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) @@ -406,7 +406,7 @@ // CPP-CHECK-LABEL: @_Z18test_svcmpge_n_u16u10__SVBool_tu12__SVUint16_tt( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmphs.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) @@ -420,7 +420,7 @@ // CHECK-LABEL: @test_svcmpge_n_u32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmphs.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) @@ -429,7 +429,7 @@ // CPP-CHECK-LABEL: @_Z18test_svcmpge_n_u32u10__SVBool_tu12__SVUint32_tj( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmphs.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) @@ -500,7 +500,7 @@ // CHECK-LABEL: @test_svcmpge_n_f16( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fcmpge.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) @@ -509,7 +509,7 @@ // CPP-CHECK-LABEL: @_Z18test_svcmpge_n_f16u10__SVBool_tu13__SVFloat16_tDh( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fcmpge.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) @@ -523,7 +523,7 @@ // CHECK-LABEL: @test_svcmpge_n_f32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fcmpge.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) @@ -532,7 +532,7 @@ // CPP-CHECK-LABEL: @_Z18test_svcmpge_n_f32u10__SVBool_tu13__SVFloat32_tf( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fcmpge.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) @@ -546,7 +546,7 @@ // CHECK-LABEL: @test_svcmpge_n_f64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fcmpge.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) @@ -555,7 +555,7 @@ // CPP-CHECK-LABEL: @_Z18test_svcmpge_n_f64u10__SVBool_tu13__SVFloat64_td( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fcmpge.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) @@ -568,14 +568,14 @@ // CHECK-LABEL: @test_svcmpge_wide_n_s8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpge.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z22test_svcmpge_wide_n_s8u10__SVBool_tu10__SVInt8_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpge.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -588,7 +588,7 @@ // CHECK-LABEL: @test_svcmpge_wide_n_s16( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpge.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) @@ -597,7 +597,7 @@ // CPP-CHECK-LABEL: @_Z23test_svcmpge_wide_n_s16u10__SVBool_tu11__SVInt16_tl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpge.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) @@ -611,7 +611,7 @@ // CHECK-LABEL: @test_svcmpge_wide_n_s32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpge.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) @@ -620,7 +620,7 @@ // CPP-CHECK-LABEL: @_Z23test_svcmpge_wide_n_s32u10__SVBool_tu11__SVInt32_tl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpge.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) @@ -633,14 +633,14 @@ // CHECK-LABEL: @test_svcmpge_wide_n_u8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmphs.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z22test_svcmpge_wide_n_u8u10__SVBool_tu11__SVUint8_tm( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmphs.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -653,7 +653,7 @@ // CHECK-LABEL: @test_svcmpge_wide_n_u16( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmphs.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) @@ -662,7 +662,7 @@ // CPP-CHECK-LABEL: @_Z23test_svcmpge_wide_n_u16u10__SVBool_tu12__SVUint16_tm( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmphs.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) @@ -676,7 +676,7 @@ // CHECK-LABEL: @test_svcmpge_wide_n_u32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmphs.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) @@ -685,7 +685,7 @@ // CPP-CHECK-LABEL: @_Z23test_svcmpge_wide_n_u32u10__SVBool_tu12__SVUint32_tm( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmphs.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cmpgt.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cmpgt.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cmpgt.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cmpgt.c @@ -161,7 +161,7 @@ // CHECK-LABEL: @test_svcmpgt_n_s64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpgt.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) @@ -170,7 +170,7 @@ // CPP-CHECK-LABEL: @_Z18test_svcmpgt_n_s64u10__SVBool_tu11__SVInt64_tl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpgt.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) @@ -184,7 +184,7 @@ // CHECK-LABEL: @test_svcmpgt_n_u64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmphi.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) @@ -193,7 +193,7 @@ // CPP-CHECK-LABEL: @_Z18test_svcmpgt_n_u64u10__SVBool_tu12__SVUint64_tm( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmphi.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) @@ -312,14 +312,14 @@ // CHECK-LABEL: @test_svcmpgt_n_s8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpgt.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svcmpgt_n_s8u10__SVBool_tu10__SVInt8_ta( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpgt.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -332,7 +332,7 @@ // CHECK-LABEL: @test_svcmpgt_n_s16( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpgt.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) @@ -341,7 +341,7 @@ // CPP-CHECK-LABEL: @_Z18test_svcmpgt_n_s16u10__SVBool_tu11__SVInt16_ts( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpgt.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) @@ -355,7 +355,7 @@ // CHECK-LABEL: @test_svcmpgt_n_s32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpgt.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) @@ -364,7 +364,7 @@ // CPP-CHECK-LABEL: @_Z18test_svcmpgt_n_s32u10__SVBool_tu11__SVInt32_ti( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpgt.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) @@ -377,14 +377,14 @@ // CHECK-LABEL: @test_svcmpgt_n_u8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmphi.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svcmpgt_n_u8u10__SVBool_tu11__SVUint8_th( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmphi.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -397,7 +397,7 @@ // CHECK-LABEL: @test_svcmpgt_n_u16( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmphi.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) @@ -406,7 +406,7 @@ // CPP-CHECK-LABEL: @_Z18test_svcmpgt_n_u16u10__SVBool_tu12__SVUint16_tt( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmphi.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) @@ -420,7 +420,7 @@ // CHECK-LABEL: @test_svcmpgt_n_u32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmphi.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) @@ -429,7 +429,7 @@ // CPP-CHECK-LABEL: @_Z18test_svcmpgt_n_u32u10__SVBool_tu12__SVUint32_tj( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmphi.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) @@ -500,7 +500,7 @@ // CHECK-LABEL: @test_svcmpgt_n_f16( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fcmpgt.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) @@ -509,7 +509,7 @@ // CPP-CHECK-LABEL: @_Z18test_svcmpgt_n_f16u10__SVBool_tu13__SVFloat16_tDh( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fcmpgt.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) @@ -523,7 +523,7 @@ // CHECK-LABEL: @test_svcmpgt_n_f32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fcmpgt.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) @@ -532,7 +532,7 @@ // CPP-CHECK-LABEL: @_Z18test_svcmpgt_n_f32u10__SVBool_tu13__SVFloat32_tf( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fcmpgt.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) @@ -546,7 +546,7 @@ // CHECK-LABEL: @test_svcmpgt_n_f64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fcmpgt.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) @@ -555,7 +555,7 @@ // CPP-CHECK-LABEL: @_Z18test_svcmpgt_n_f64u10__SVBool_tu13__SVFloat64_td( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fcmpgt.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) @@ -568,14 +568,14 @@ // CHECK-LABEL: @test_svcmpgt_wide_n_s8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpgt.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z22test_svcmpgt_wide_n_s8u10__SVBool_tu10__SVInt8_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpgt.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -588,7 +588,7 @@ // CHECK-LABEL: @test_svcmpgt_wide_n_s16( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpgt.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) @@ -597,7 +597,7 @@ // CPP-CHECK-LABEL: @_Z23test_svcmpgt_wide_n_s16u10__SVBool_tu11__SVInt16_tl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpgt.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) @@ -611,7 +611,7 @@ // CHECK-LABEL: @test_svcmpgt_wide_n_s32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpgt.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) @@ -620,7 +620,7 @@ // CPP-CHECK-LABEL: @_Z23test_svcmpgt_wide_n_s32u10__SVBool_tu11__SVInt32_tl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpgt.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) @@ -633,14 +633,14 @@ // CHECK-LABEL: @test_svcmpgt_wide_n_u8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmphi.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z22test_svcmpgt_wide_n_u8u10__SVBool_tu11__SVUint8_tm( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmphi.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -653,7 +653,7 @@ // CHECK-LABEL: @test_svcmpgt_wide_n_u16( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmphi.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) @@ -662,7 +662,7 @@ // CPP-CHECK-LABEL: @_Z23test_svcmpgt_wide_n_u16u10__SVBool_tu12__SVUint16_tm( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmphi.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) @@ -676,7 +676,7 @@ // CHECK-LABEL: @test_svcmpgt_wide_n_u32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmphi.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) @@ -685,7 +685,7 @@ // CPP-CHECK-LABEL: @_Z23test_svcmpgt_wide_n_u32u10__SVBool_tu12__SVUint32_tm( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmphi.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cmple.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cmple.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cmple.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cmple.c @@ -161,7 +161,7 @@ // CHECK-LABEL: @test_svcmple_n_s64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpge.nxv2i64( [[TMP0]], [[TMP1]], [[OP1:%.*]]) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) @@ -170,7 +170,7 @@ // CPP-CHECK-LABEL: @_Z18test_svcmple_n_s64u10__SVBool_tu11__SVInt64_tl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpge.nxv2i64( [[TMP0]], [[TMP1]], [[OP1:%.*]]) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) @@ -184,7 +184,7 @@ // CHECK-LABEL: @test_svcmple_n_u64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmphs.nxv2i64( [[TMP0]], [[TMP1]], [[OP1:%.*]]) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) @@ -193,7 +193,7 @@ // CPP-CHECK-LABEL: @_Z18test_svcmple_n_u64u10__SVBool_tu12__SVUint64_tm( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmphs.nxv2i64( [[TMP0]], [[TMP1]], [[OP1:%.*]]) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) @@ -312,14 +312,14 @@ // CHECK-LABEL: @test_svcmple_n_s8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpge.nxv16i8( [[PG:%.*]], [[TMP0]], [[OP1:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svcmple_n_s8u10__SVBool_tu10__SVInt8_ta( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpge.nxv16i8( [[PG:%.*]], [[TMP0]], [[OP1:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -332,7 +332,7 @@ // CHECK-LABEL: @test_svcmple_n_s16( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpge.nxv8i16( [[TMP0]], [[TMP1]], [[OP1:%.*]]) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) @@ -341,7 +341,7 @@ // CPP-CHECK-LABEL: @_Z18test_svcmple_n_s16u10__SVBool_tu11__SVInt16_ts( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpge.nxv8i16( [[TMP0]], [[TMP1]], [[OP1:%.*]]) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) @@ -355,7 +355,7 @@ // CHECK-LABEL: @test_svcmple_n_s32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpge.nxv4i32( [[TMP0]], [[TMP1]], [[OP1:%.*]]) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) @@ -364,7 +364,7 @@ // CPP-CHECK-LABEL: @_Z18test_svcmple_n_s32u10__SVBool_tu11__SVInt32_ti( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpge.nxv4i32( [[TMP0]], [[TMP1]], [[OP1:%.*]]) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) @@ -377,14 +377,14 @@ // CHECK-LABEL: @test_svcmple_n_u8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmphs.nxv16i8( [[PG:%.*]], [[TMP0]], [[OP1:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svcmple_n_u8u10__SVBool_tu11__SVUint8_th( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmphs.nxv16i8( [[PG:%.*]], [[TMP0]], [[OP1:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -397,7 +397,7 @@ // CHECK-LABEL: @test_svcmple_n_u16( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmphs.nxv8i16( [[TMP0]], [[TMP1]], [[OP1:%.*]]) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) @@ -406,7 +406,7 @@ // CPP-CHECK-LABEL: @_Z18test_svcmple_n_u16u10__SVBool_tu12__SVUint16_tt( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmphs.nxv8i16( [[TMP0]], [[TMP1]], [[OP1:%.*]]) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) @@ -420,7 +420,7 @@ // CHECK-LABEL: @test_svcmple_n_u32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmphs.nxv4i32( [[TMP0]], [[TMP1]], [[OP1:%.*]]) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) @@ -429,7 +429,7 @@ // CPP-CHECK-LABEL: @_Z18test_svcmple_n_u32u10__SVBool_tu12__SVUint32_tj( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmphs.nxv4i32( [[TMP0]], [[TMP1]], [[OP1:%.*]]) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) @@ -500,7 +500,7 @@ // CHECK-LABEL: @test_svcmple_n_f16( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fcmpge.nxv8f16( [[TMP0]], [[TMP1]], [[OP1:%.*]]) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) @@ -509,7 +509,7 @@ // CPP-CHECK-LABEL: @_Z18test_svcmple_n_f16u10__SVBool_tu13__SVFloat16_tDh( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fcmpge.nxv8f16( [[TMP0]], [[TMP1]], [[OP1:%.*]]) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) @@ -523,7 +523,7 @@ // CHECK-LABEL: @test_svcmple_n_f32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fcmpge.nxv4f32( [[TMP0]], [[TMP1]], [[OP1:%.*]]) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) @@ -532,7 +532,7 @@ // CPP-CHECK-LABEL: @_Z18test_svcmple_n_f32u10__SVBool_tu13__SVFloat32_tf( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fcmpge.nxv4f32( [[TMP0]], [[TMP1]], [[OP1:%.*]]) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) @@ -546,7 +546,7 @@ // CHECK-LABEL: @test_svcmple_n_f64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fcmpge.nxv2f64( [[TMP0]], [[TMP1]], [[OP1:%.*]]) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) @@ -555,7 +555,7 @@ // CPP-CHECK-LABEL: @_Z18test_svcmple_n_f64u10__SVBool_tu13__SVFloat64_td( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fcmpge.nxv2f64( [[TMP0]], [[TMP1]], [[OP1:%.*]]) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) @@ -568,14 +568,14 @@ // CHECK-LABEL: @test_svcmple_wide_n_s8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmple.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z22test_svcmple_wide_n_s8u10__SVBool_tu10__SVInt8_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmple.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -588,7 +588,7 @@ // CHECK-LABEL: @test_svcmple_wide_n_s16( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmple.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) @@ -597,7 +597,7 @@ // CPP-CHECK-LABEL: @_Z23test_svcmple_wide_n_s16u10__SVBool_tu11__SVInt16_tl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmple.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) @@ -611,7 +611,7 @@ // CHECK-LABEL: @test_svcmple_wide_n_s32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmple.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) @@ -620,7 +620,7 @@ // CPP-CHECK-LABEL: @_Z23test_svcmple_wide_n_s32u10__SVBool_tu11__SVInt32_tl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmple.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) @@ -633,14 +633,14 @@ // CHECK-LABEL: @test_svcmple_wide_n_u8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpls.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z22test_svcmple_wide_n_u8u10__SVBool_tu11__SVUint8_tm( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpls.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -653,7 +653,7 @@ // CHECK-LABEL: @test_svcmple_wide_n_u16( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpls.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) @@ -662,7 +662,7 @@ // CPP-CHECK-LABEL: @_Z23test_svcmple_wide_n_u16u10__SVBool_tu12__SVUint16_tm( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpls.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) @@ -676,7 +676,7 @@ // CHECK-LABEL: @test_svcmple_wide_n_u32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpls.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) @@ -685,7 +685,7 @@ // CPP-CHECK-LABEL: @_Z23test_svcmple_wide_n_u32u10__SVBool_tu12__SVUint32_tm( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpls.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cmplt.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cmplt.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cmplt.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cmplt.c @@ -161,7 +161,7 @@ // CHECK-LABEL: @test_svcmplt_n_s64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpgt.nxv2i64( [[TMP0]], [[TMP1]], [[OP1:%.*]]) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) @@ -170,7 +170,7 @@ // CPP-CHECK-LABEL: @_Z18test_svcmplt_n_s64u10__SVBool_tu11__SVInt64_tl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpgt.nxv2i64( [[TMP0]], [[TMP1]], [[OP1:%.*]]) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) @@ -184,7 +184,7 @@ // CHECK-LABEL: @test_svcmplt_n_u64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmphi.nxv2i64( [[TMP0]], [[TMP1]], [[OP1:%.*]]) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) @@ -193,7 +193,7 @@ // CPP-CHECK-LABEL: @_Z18test_svcmplt_n_u64u10__SVBool_tu12__SVUint64_tm( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmphi.nxv2i64( [[TMP0]], [[TMP1]], [[OP1:%.*]]) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) @@ -312,14 +312,14 @@ // CHECK-LABEL: @test_svcmplt_n_s8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpgt.nxv16i8( [[PG:%.*]], [[TMP0]], [[OP1:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svcmplt_n_s8u10__SVBool_tu10__SVInt8_ta( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpgt.nxv16i8( [[PG:%.*]], [[TMP0]], [[OP1:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -332,7 +332,7 @@ // CHECK-LABEL: @test_svcmplt_n_s16( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpgt.nxv8i16( [[TMP0]], [[TMP1]], [[OP1:%.*]]) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) @@ -341,7 +341,7 @@ // CPP-CHECK-LABEL: @_Z18test_svcmplt_n_s16u10__SVBool_tu11__SVInt16_ts( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpgt.nxv8i16( [[TMP0]], [[TMP1]], [[OP1:%.*]]) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) @@ -355,7 +355,7 @@ // CHECK-LABEL: @test_svcmplt_n_s32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpgt.nxv4i32( [[TMP0]], [[TMP1]], [[OP1:%.*]]) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) @@ -364,7 +364,7 @@ // CPP-CHECK-LABEL: @_Z18test_svcmplt_n_s32u10__SVBool_tu11__SVInt32_ti( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpgt.nxv4i32( [[TMP0]], [[TMP1]], [[OP1:%.*]]) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) @@ -377,14 +377,14 @@ // CHECK-LABEL: @test_svcmplt_n_u8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmphi.nxv16i8( [[PG:%.*]], [[TMP0]], [[OP1:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svcmplt_n_u8u10__SVBool_tu11__SVUint8_th( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmphi.nxv16i8( [[PG:%.*]], [[TMP0]], [[OP1:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -397,7 +397,7 @@ // CHECK-LABEL: @test_svcmplt_n_u16( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmphi.nxv8i16( [[TMP0]], [[TMP1]], [[OP1:%.*]]) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) @@ -406,7 +406,7 @@ // CPP-CHECK-LABEL: @_Z18test_svcmplt_n_u16u10__SVBool_tu12__SVUint16_tt( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmphi.nxv8i16( [[TMP0]], [[TMP1]], [[OP1:%.*]]) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) @@ -420,7 +420,7 @@ // CHECK-LABEL: @test_svcmplt_n_u32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmphi.nxv4i32( [[TMP0]], [[TMP1]], [[OP1:%.*]]) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) @@ -429,7 +429,7 @@ // CPP-CHECK-LABEL: @_Z18test_svcmplt_n_u32u10__SVBool_tu12__SVUint32_tj( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmphi.nxv4i32( [[TMP0]], [[TMP1]], [[OP1:%.*]]) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) @@ -500,7 +500,7 @@ // CHECK-LABEL: @test_svcmplt_n_f16( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fcmpgt.nxv8f16( [[TMP0]], [[TMP1]], [[OP1:%.*]]) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) @@ -509,7 +509,7 @@ // CPP-CHECK-LABEL: @_Z18test_svcmplt_n_f16u10__SVBool_tu13__SVFloat16_tDh( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fcmpgt.nxv8f16( [[TMP0]], [[TMP1]], [[OP1:%.*]]) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) @@ -523,7 +523,7 @@ // CHECK-LABEL: @test_svcmplt_n_f32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fcmpgt.nxv4f32( [[TMP0]], [[TMP1]], [[OP1:%.*]]) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) @@ -532,7 +532,7 @@ // CPP-CHECK-LABEL: @_Z18test_svcmplt_n_f32u10__SVBool_tu13__SVFloat32_tf( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fcmpgt.nxv4f32( [[TMP0]], [[TMP1]], [[OP1:%.*]]) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) @@ -546,7 +546,7 @@ // CHECK-LABEL: @test_svcmplt_n_f64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fcmpgt.nxv2f64( [[TMP0]], [[TMP1]], [[OP1:%.*]]) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) @@ -555,7 +555,7 @@ // CPP-CHECK-LABEL: @_Z18test_svcmplt_n_f64u10__SVBool_tu13__SVFloat64_td( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fcmpgt.nxv2f64( [[TMP0]], [[TMP1]], [[OP1:%.*]]) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) @@ -568,14 +568,14 @@ // CHECK-LABEL: @test_svcmplt_wide_n_s8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmplt.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z22test_svcmplt_wide_n_s8u10__SVBool_tu10__SVInt8_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmplt.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -588,7 +588,7 @@ // CHECK-LABEL: @test_svcmplt_wide_n_s16( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmplt.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) @@ -597,7 +597,7 @@ // CPP-CHECK-LABEL: @_Z23test_svcmplt_wide_n_s16u10__SVBool_tu11__SVInt16_tl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmplt.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) @@ -611,7 +611,7 @@ // CHECK-LABEL: @test_svcmplt_wide_n_s32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmplt.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) @@ -620,7 +620,7 @@ // CPP-CHECK-LABEL: @_Z23test_svcmplt_wide_n_s32u10__SVBool_tu11__SVInt32_tl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmplt.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) @@ -633,14 +633,14 @@ // CHECK-LABEL: @test_svcmplt_wide_n_u8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmplo.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z22test_svcmplt_wide_n_u8u10__SVBool_tu11__SVUint8_tm( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmplo.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -653,7 +653,7 @@ // CHECK-LABEL: @test_svcmplt_wide_n_u16( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmplo.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) @@ -662,7 +662,7 @@ // CPP-CHECK-LABEL: @_Z23test_svcmplt_wide_n_u16u10__SVBool_tu12__SVUint16_tm( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmplo.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) @@ -676,7 +676,7 @@ // CHECK-LABEL: @test_svcmplt_wide_n_u32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmplo.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) @@ -685,7 +685,7 @@ // CPP-CHECK-LABEL: @_Z23test_svcmplt_wide_n_u32u10__SVBool_tu12__SVUint32_tm( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmplo.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cmpne.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cmpne.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cmpne.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cmpne.c @@ -161,7 +161,7 @@ // CHECK-LABEL: @test_svcmpne_n_s64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpne.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) @@ -170,7 +170,7 @@ // CPP-CHECK-LABEL: @_Z18test_svcmpne_n_s64u10__SVBool_tu11__SVInt64_tl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpne.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) @@ -184,7 +184,7 @@ // CHECK-LABEL: @test_svcmpne_n_u64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpne.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) @@ -193,7 +193,7 @@ // CPP-CHECK-LABEL: @_Z18test_svcmpne_n_u64u10__SVBool_tu12__SVUint64_tm( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpne.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) @@ -259,14 +259,14 @@ // CHECK-LABEL: @test_svcmpne_n_s8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpne.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svcmpne_n_s8u10__SVBool_tu10__SVInt8_ta( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpne.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -279,7 +279,7 @@ // CHECK-LABEL: @test_svcmpne_n_s16( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpne.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) @@ -288,7 +288,7 @@ // CPP-CHECK-LABEL: @_Z18test_svcmpne_n_s16u10__SVBool_tu11__SVInt16_ts( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpne.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) @@ -302,7 +302,7 @@ // CHECK-LABEL: @test_svcmpne_n_s32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpne.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) @@ -311,7 +311,7 @@ // CPP-CHECK-LABEL: @_Z18test_svcmpne_n_s32u10__SVBool_tu11__SVInt32_ti( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpne.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) @@ -324,14 +324,14 @@ // CHECK-LABEL: @test_svcmpne_n_u8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpne.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svcmpne_n_u8u10__SVBool_tu11__SVUint8_th( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpne.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -344,7 +344,7 @@ // CHECK-LABEL: @test_svcmpne_n_u16( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpne.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) @@ -353,7 +353,7 @@ // CPP-CHECK-LABEL: @_Z18test_svcmpne_n_u16u10__SVBool_tu12__SVUint16_tt( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpne.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) @@ -367,7 +367,7 @@ // CHECK-LABEL: @test_svcmpne_n_u32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpne.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) @@ -376,7 +376,7 @@ // CPP-CHECK-LABEL: @_Z18test_svcmpne_n_u32u10__SVBool_tu12__SVUint32_tj( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpne.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) @@ -447,7 +447,7 @@ // CHECK-LABEL: @test_svcmpne_n_f16( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fcmpne.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) @@ -456,7 +456,7 @@ // CPP-CHECK-LABEL: @_Z18test_svcmpne_n_f16u10__SVBool_tu13__SVFloat16_tDh( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fcmpne.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) @@ -470,7 +470,7 @@ // CHECK-LABEL: @test_svcmpne_n_f32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fcmpne.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) @@ -479,7 +479,7 @@ // CPP-CHECK-LABEL: @_Z18test_svcmpne_n_f32u10__SVBool_tu13__SVFloat32_tf( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fcmpne.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) @@ -493,7 +493,7 @@ // CHECK-LABEL: @test_svcmpne_n_f64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fcmpne.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) @@ -502,7 +502,7 @@ // CPP-CHECK-LABEL: @_Z18test_svcmpne_n_f64u10__SVBool_tu13__SVFloat64_td( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fcmpne.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) @@ -515,14 +515,14 @@ // CHECK-LABEL: @test_svcmpne_wide_n_s8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpne.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z22test_svcmpne_wide_n_s8u10__SVBool_tu10__SVInt8_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpne.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -535,7 +535,7 @@ // CHECK-LABEL: @test_svcmpne_wide_n_s16( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpne.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) @@ -544,7 +544,7 @@ // CPP-CHECK-LABEL: @_Z23test_svcmpne_wide_n_s16u10__SVBool_tu11__SVInt16_tl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpne.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) @@ -558,7 +558,7 @@ // CHECK-LABEL: @test_svcmpne_wide_n_s32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpne.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) @@ -567,7 +567,7 @@ // CPP-CHECK-LABEL: @_Z23test_svcmpne_wide_n_s32u10__SVBool_tu11__SVInt32_tl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpne.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cmpuo.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cmpuo.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cmpuo.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cmpuo.c @@ -74,7 +74,7 @@ // CHECK-LABEL: @test_svcmpuo_n_f16( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fcmpuo.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) @@ -83,7 +83,7 @@ // CPP-CHECK-LABEL: @_Z18test_svcmpuo_n_f16u10__SVBool_tu13__SVFloat16_tDh( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fcmpuo.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) @@ -97,7 +97,7 @@ // CHECK-LABEL: @test_svcmpuo_n_f32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fcmpuo.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) @@ -106,7 +106,7 @@ // CPP-CHECK-LABEL: @_Z18test_svcmpuo_n_f32u10__SVBool_tu13__SVFloat32_tf( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fcmpuo.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) @@ -120,7 +120,7 @@ // CHECK-LABEL: @test_svcmpuo_n_f64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fcmpuo.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) @@ -129,7 +129,7 @@ // CPP-CHECK-LABEL: @_Z18test_svcmpuo_n_f64u10__SVBool_tu13__SVFloat64_td( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fcmpuo.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_div.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_div.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_div.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_div.c @@ -229,7 +229,7 @@ // CHECK-LABEL: @test_svdiv_n_s32_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.sdiv.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -238,7 +238,7 @@ // CPP-CHECK-LABEL: @_Z18test_svdiv_n_s32_zu10__SVBool_tu11__SVInt32_ti( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.sdiv.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -252,7 +252,7 @@ // CHECK-LABEL: @test_svdiv_n_s64_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.sdiv.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -261,7 +261,7 @@ // CPP-CHECK-LABEL: @_Z18test_svdiv_n_s64_zu10__SVBool_tu11__SVInt64_tl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.sdiv.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -275,7 +275,7 @@ // CHECK-LABEL: @test_svdiv_n_u32_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.udiv.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -284,7 +284,7 @@ // CPP-CHECK-LABEL: @_Z18test_svdiv_n_u32_zu10__SVBool_tu12__SVUint32_tj( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.udiv.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -298,7 +298,7 @@ // CHECK-LABEL: @test_svdiv_n_u64_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.udiv.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -307,7 +307,7 @@ // CPP-CHECK-LABEL: @_Z18test_svdiv_n_u64_zu10__SVBool_tu12__SVUint64_tm( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.udiv.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -321,7 +321,7 @@ // CHECK-LABEL: @test_svdiv_n_s32_m( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sdiv.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -329,7 +329,7 @@ // CPP-CHECK-LABEL: @_Z18test_svdiv_n_s32_mu10__SVBool_tu11__SVInt32_ti( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sdiv.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -342,7 +342,7 @@ // CHECK-LABEL: @test_svdiv_n_s64_m( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sdiv.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -350,7 +350,7 @@ // CPP-CHECK-LABEL: @_Z18test_svdiv_n_s64_mu10__SVBool_tu11__SVInt64_tl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sdiv.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -363,7 +363,7 @@ // CHECK-LABEL: @test_svdiv_n_u32_m( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.udiv.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -371,7 +371,7 @@ // CPP-CHECK-LABEL: @_Z18test_svdiv_n_u32_mu10__SVBool_tu12__SVUint32_tj( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.udiv.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -384,7 +384,7 @@ // CHECK-LABEL: @test_svdiv_n_u64_m( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.udiv.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -392,7 +392,7 @@ // CPP-CHECK-LABEL: @_Z18test_svdiv_n_u64_mu10__SVBool_tu12__SVUint64_tm( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.udiv.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -405,7 +405,7 @@ // CHECK-LABEL: @test_svdiv_n_s32_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sdiv.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -413,7 +413,7 @@ // CPP-CHECK-LABEL: @_Z18test_svdiv_n_s32_xu10__SVBool_tu11__SVInt32_ti( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sdiv.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -426,7 +426,7 @@ // CHECK-LABEL: @test_svdiv_n_s64_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sdiv.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -434,7 +434,7 @@ // CPP-CHECK-LABEL: @_Z18test_svdiv_n_s64_xu10__SVBool_tu11__SVInt64_tl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sdiv.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -447,7 +447,7 @@ // CHECK-LABEL: @test_svdiv_n_u32_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.udiv.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -455,7 +455,7 @@ // CPP-CHECK-LABEL: @_Z18test_svdiv_n_u32_xu10__SVBool_tu12__SVUint32_tj( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.udiv.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -468,7 +468,7 @@ // CHECK-LABEL: @test_svdiv_n_u64_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.udiv.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -476,7 +476,7 @@ // CPP-CHECK-LABEL: @_Z18test_svdiv_n_u64_xu10__SVBool_tu12__SVUint64_tm( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.udiv.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -648,7 +648,7 @@ // CHECK-LABEL: @test_svdiv_n_f16_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fdiv.nxv8f16( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -657,7 +657,7 @@ // CPP-CHECK-LABEL: @_Z18test_svdiv_n_f16_zu10__SVBool_tu13__SVFloat16_tDh( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fdiv.nxv8f16( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -671,7 +671,7 @@ // CHECK-LABEL: @test_svdiv_n_f32_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fdiv.nxv4f32( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -680,7 +680,7 @@ // CPP-CHECK-LABEL: @_Z18test_svdiv_n_f32_zu10__SVBool_tu13__SVFloat32_tf( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fdiv.nxv4f32( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -694,7 +694,7 @@ // CHECK-LABEL: @test_svdiv_n_f64_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fdiv.nxv2f64( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -703,7 +703,7 @@ // CPP-CHECK-LABEL: @_Z18test_svdiv_n_f64_zu10__SVBool_tu13__SVFloat64_td( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fdiv.nxv2f64( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -717,7 +717,7 @@ // CHECK-LABEL: @test_svdiv_n_f16_m( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fdiv.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -725,7 +725,7 @@ // CPP-CHECK-LABEL: @_Z18test_svdiv_n_f16_mu10__SVBool_tu13__SVFloat16_tDh( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fdiv.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -738,7 +738,7 @@ // CHECK-LABEL: @test_svdiv_n_f32_m( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fdiv.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -746,7 +746,7 @@ // CPP-CHECK-LABEL: @_Z18test_svdiv_n_f32_mu10__SVBool_tu13__SVFloat32_tf( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fdiv.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -759,7 +759,7 @@ // CHECK-LABEL: @test_svdiv_n_f64_m( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fdiv.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -767,7 +767,7 @@ // CPP-CHECK-LABEL: @_Z18test_svdiv_n_f64_mu10__SVBool_tu13__SVFloat64_td( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fdiv.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -780,7 +780,7 @@ // CHECK-LABEL: @test_svdiv_n_f16_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fdiv.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -788,7 +788,7 @@ // CPP-CHECK-LABEL: @_Z18test_svdiv_n_f16_xu10__SVBool_tu13__SVFloat16_tDh( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fdiv.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -801,7 +801,7 @@ // CHECK-LABEL: @test_svdiv_n_f32_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fdiv.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -809,7 +809,7 @@ // CPP-CHECK-LABEL: @_Z18test_svdiv_n_f32_xu10__SVBool_tu13__SVFloat32_tf( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fdiv.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -822,7 +822,7 @@ // CHECK-LABEL: @test_svdiv_n_f64_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fdiv.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -830,7 +830,7 @@ // CPP-CHECK-LABEL: @_Z18test_svdiv_n_f64_xu10__SVBool_tu13__SVFloat64_td( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fdiv.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_divr.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_divr.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_divr.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_divr.c @@ -229,7 +229,7 @@ // CHECK-LABEL: @test_svdivr_n_s32_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.sdivr.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -238,7 +238,7 @@ // CPP-CHECK-LABEL: @_Z19test_svdivr_n_s32_zu10__SVBool_tu11__SVInt32_ti( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.sdivr.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -252,7 +252,7 @@ // CHECK-LABEL: @test_svdivr_n_s64_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.sdivr.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -261,7 +261,7 @@ // CPP-CHECK-LABEL: @_Z19test_svdivr_n_s64_zu10__SVBool_tu11__SVInt64_tl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.sdivr.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -275,7 +275,7 @@ // CHECK-LABEL: @test_svdivr_n_u32_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.udivr.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -284,7 +284,7 @@ // CPP-CHECK-LABEL: @_Z19test_svdivr_n_u32_zu10__SVBool_tu12__SVUint32_tj( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.udivr.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -298,7 +298,7 @@ // CHECK-LABEL: @test_svdivr_n_u64_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.udivr.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -307,7 +307,7 @@ // CPP-CHECK-LABEL: @_Z19test_svdivr_n_u64_zu10__SVBool_tu12__SVUint64_tm( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.udivr.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -321,7 +321,7 @@ // CHECK-LABEL: @test_svdivr_n_s32_m( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sdivr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -329,7 +329,7 @@ // CPP-CHECK-LABEL: @_Z19test_svdivr_n_s32_mu10__SVBool_tu11__SVInt32_ti( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sdivr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -342,7 +342,7 @@ // CHECK-LABEL: @test_svdivr_n_s64_m( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sdivr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -350,7 +350,7 @@ // CPP-CHECK-LABEL: @_Z19test_svdivr_n_s64_mu10__SVBool_tu11__SVInt64_tl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sdivr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -363,7 +363,7 @@ // CHECK-LABEL: @test_svdivr_n_u32_m( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.udivr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -371,7 +371,7 @@ // CPP-CHECK-LABEL: @_Z19test_svdivr_n_u32_mu10__SVBool_tu12__SVUint32_tj( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.udivr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -384,7 +384,7 @@ // CHECK-LABEL: @test_svdivr_n_u64_m( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.udivr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -392,7 +392,7 @@ // CPP-CHECK-LABEL: @_Z19test_svdivr_n_u64_mu10__SVBool_tu12__SVUint64_tm( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.udivr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -405,7 +405,7 @@ // CHECK-LABEL: @test_svdivr_n_s32_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sdivr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -413,7 +413,7 @@ // CPP-CHECK-LABEL: @_Z19test_svdivr_n_s32_xu10__SVBool_tu11__SVInt32_ti( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sdivr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -426,7 +426,7 @@ // CHECK-LABEL: @test_svdivr_n_s64_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sdivr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -434,7 +434,7 @@ // CPP-CHECK-LABEL: @_Z19test_svdivr_n_s64_xu10__SVBool_tu11__SVInt64_tl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sdivr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -447,7 +447,7 @@ // CHECK-LABEL: @test_svdivr_n_u32_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.udivr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -455,7 +455,7 @@ // CPP-CHECK-LABEL: @_Z19test_svdivr_n_u32_xu10__SVBool_tu12__SVUint32_tj( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.udivr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -468,7 +468,7 @@ // CHECK-LABEL: @test_svdivr_n_u64_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.udivr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -476,7 +476,7 @@ // CPP-CHECK-LABEL: @_Z19test_svdivr_n_u64_xu10__SVBool_tu12__SVUint64_tm( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.udivr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -648,7 +648,7 @@ // CHECK-LABEL: @test_svdivr_n_f16_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fdivr.nxv8f16( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -657,7 +657,7 @@ // CPP-CHECK-LABEL: @_Z19test_svdivr_n_f16_zu10__SVBool_tu13__SVFloat16_tDh( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fdivr.nxv8f16( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -671,7 +671,7 @@ // CHECK-LABEL: @test_svdivr_n_f32_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fdivr.nxv4f32( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -680,7 +680,7 @@ // CPP-CHECK-LABEL: @_Z19test_svdivr_n_f32_zu10__SVBool_tu13__SVFloat32_tf( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fdivr.nxv4f32( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -694,7 +694,7 @@ // CHECK-LABEL: @test_svdivr_n_f64_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fdivr.nxv2f64( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -703,7 +703,7 @@ // CPP-CHECK-LABEL: @_Z19test_svdivr_n_f64_zu10__SVBool_tu13__SVFloat64_td( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fdivr.nxv2f64( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -717,7 +717,7 @@ // CHECK-LABEL: @test_svdivr_n_f16_m( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fdivr.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -725,7 +725,7 @@ // CPP-CHECK-LABEL: @_Z19test_svdivr_n_f16_mu10__SVBool_tu13__SVFloat16_tDh( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fdivr.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -738,7 +738,7 @@ // CHECK-LABEL: @test_svdivr_n_f32_m( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fdivr.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -746,7 +746,7 @@ // CPP-CHECK-LABEL: @_Z19test_svdivr_n_f32_mu10__SVBool_tu13__SVFloat32_tf( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fdivr.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -759,7 +759,7 @@ // CHECK-LABEL: @test_svdivr_n_f64_m( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fdivr.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -767,7 +767,7 @@ // CPP-CHECK-LABEL: @_Z19test_svdivr_n_f64_mu10__SVBool_tu13__SVFloat64_td( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fdivr.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -780,7 +780,7 @@ // CHECK-LABEL: @test_svdivr_n_f16_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fdivr.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -788,7 +788,7 @@ // CPP-CHECK-LABEL: @_Z19test_svdivr_n_f16_xu10__SVBool_tu13__SVFloat16_tDh( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fdivr.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -801,7 +801,7 @@ // CHECK-LABEL: @test_svdivr_n_f32_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fdivr.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -809,7 +809,7 @@ // CPP-CHECK-LABEL: @_Z19test_svdivr_n_f32_xu10__SVBool_tu13__SVFloat32_tf( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fdivr.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -822,7 +822,7 @@ // CHECK-LABEL: @test_svdivr_n_f64_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fdivr.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -830,7 +830,7 @@ // CPP-CHECK-LABEL: @_Z19test_svdivr_n_f64_xu10__SVBool_tu13__SVFloat64_td( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fdivr.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_dot.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_dot.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_dot.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_dot.c @@ -76,14 +76,14 @@ // CHECK-LABEL: @test_svdot_n_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sdot.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svdot_n_s32u11__SVInt32_tu10__SVInt8_ta( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sdot.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -95,14 +95,14 @@ // CHECK-LABEL: @test_svdot_n_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sdot.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svdot_n_s64u11__SVInt64_tu11__SVInt16_ts( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sdot.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -114,14 +114,14 @@ // CHECK-LABEL: @test_svdot_n_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.udot.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svdot_n_u32u12__SVUint32_tu11__SVUint8_th( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.udot.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -133,14 +133,14 @@ // CHECK-LABEL: @test_svdot_n_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.udot.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svdot_n_u64u12__SVUint64_tu12__SVUint16_tt( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.udot.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_dup-bfloat.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_dup-bfloat.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_dup-bfloat.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_dup-bfloat.c @@ -17,13 +17,13 @@ // CHECK-LABEL: @test_svdup_n_bf16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, bfloat [[OP:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, bfloat [[OP:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z17test_svdup_n_bf16u6__bf16( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, bfloat [[OP:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, bfloat [[OP:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: ret [[TMP0]] // @@ -85,14 +85,14 @@ // CHECK-LABEL: @test_svdup_lane_bf16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[INDEX:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[INDEX:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tbl.nxv8bf16( [[DATA:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z20test_svdup_lane_bf16u14__SVBFloat16_tt( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[INDEX:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[INDEX:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tbl.nxv8bf16( [[DATA:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_dup.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_dup.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_dup.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_dup.c @@ -16,13 +16,13 @@ // CHECK-LABEL: @test_svdup_n_s8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svdup_n_s8a( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: ret [[TMP0]] // @@ -33,13 +33,13 @@ // CHECK-LABEL: @test_svdup_n_s16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svdup_n_s16s( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: ret [[TMP0]] // @@ -50,13 +50,13 @@ // CHECK-LABEL: @test_svdup_n_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svdup_n_s32i( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: ret [[TMP0]] // @@ -67,13 +67,13 @@ // CHECK-LABEL: @test_svdup_n_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svdup_n_s64l( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: ret [[TMP0]] // @@ -84,13 +84,13 @@ // CHECK-LABEL: @test_svdup_n_u8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svdup_n_u8h( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: ret [[TMP0]] // @@ -101,13 +101,13 @@ // CHECK-LABEL: @test_svdup_n_u16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svdup_n_u16t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: ret [[TMP0]] // @@ -118,13 +118,13 @@ // CHECK-LABEL: @test_svdup_n_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svdup_n_u32j( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: ret [[TMP0]] // @@ -135,13 +135,13 @@ // CHECK-LABEL: @test_svdup_n_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svdup_n_u64m( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: ret [[TMP0]] // @@ -152,13 +152,13 @@ // CHECK-LABEL: @test_svdup_n_f16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svdup_n_f16Dh( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: ret [[TMP0]] // @@ -169,13 +169,13 @@ // CHECK-LABEL: @test_svdup_n_f32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svdup_n_f32f( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: ret [[TMP0]] // @@ -186,13 +186,13 @@ // CHECK-LABEL: @test_svdup_n_f64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svdup_n_f64d( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: ret [[TMP0]] // @@ -752,14 +752,14 @@ // CHECK-LABEL: @test_svdup_lane_s8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[INDEX:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[INDEX:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tbl.nxv16i8( [[DATA:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svdup_lane_s8u10__SVInt8_th( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[INDEX:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[INDEX:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tbl.nxv16i8( [[DATA:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -771,14 +771,14 @@ // CHECK-LABEL: @test_svdup_lane_s16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[INDEX:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[INDEX:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tbl.nxv8i16( [[DATA:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z19test_svdup_lane_s16u11__SVInt16_tt( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[INDEX:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[INDEX:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tbl.nxv8i16( [[DATA:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -790,14 +790,14 @@ // CHECK-LABEL: @test_svdup_lane_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[INDEX:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[INDEX:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tbl.nxv4i32( [[DATA:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z19test_svdup_lane_s32u11__SVInt32_tj( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[INDEX:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[INDEX:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tbl.nxv4i32( [[DATA:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -809,14 +809,14 @@ // CHECK-LABEL: @test_svdup_lane_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[INDEX:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[INDEX:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tbl.nxv2i64( [[DATA:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z19test_svdup_lane_s64u11__SVInt64_tm( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[INDEX:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[INDEX:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tbl.nxv2i64( [[DATA:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -828,14 +828,14 @@ // CHECK-LABEL: @test_svdup_lane_u8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[INDEX:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[INDEX:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tbl.nxv16i8( [[DATA:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svdup_lane_u8u11__SVUint8_th( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[INDEX:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[INDEX:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tbl.nxv16i8( [[DATA:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -847,14 +847,14 @@ // CHECK-LABEL: @test_svdup_lane_u16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[INDEX:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[INDEX:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tbl.nxv8i16( [[DATA:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z19test_svdup_lane_u16u12__SVUint16_tt( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[INDEX:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[INDEX:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tbl.nxv8i16( [[DATA:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -866,14 +866,14 @@ // CHECK-LABEL: @test_svdup_lane_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[INDEX:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[INDEX:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tbl.nxv4i32( [[DATA:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z19test_svdup_lane_u32u12__SVUint32_tj( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[INDEX:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[INDEX:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tbl.nxv4i32( [[DATA:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -885,14 +885,14 @@ // CHECK-LABEL: @test_svdup_lane_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[INDEX:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[INDEX:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tbl.nxv2i64( [[DATA:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z19test_svdup_lane_u64u12__SVUint64_tm( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[INDEX:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[INDEX:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tbl.nxv2i64( [[DATA:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -904,14 +904,14 @@ // CHECK-LABEL: @test_svdup_lane_f16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[INDEX:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[INDEX:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tbl.nxv8f16( [[DATA:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z19test_svdup_lane_f16u13__SVFloat16_tt( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[INDEX:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[INDEX:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tbl.nxv8f16( [[DATA:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -923,14 +923,14 @@ // CHECK-LABEL: @test_svdup_lane_f32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[INDEX:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[INDEX:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tbl.nxv4f32( [[DATA:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z19test_svdup_lane_f32u13__SVFloat32_tj( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[INDEX:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[INDEX:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tbl.nxv4f32( [[DATA:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -942,14 +942,14 @@ // CHECK-LABEL: @test_svdup_lane_f64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[INDEX:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[INDEX:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tbl.nxv2f64( [[DATA:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z19test_svdup_lane_f64u13__SVFloat64_tm( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[INDEX:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[INDEX:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tbl.nxv2f64( [[DATA:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -961,13 +961,13 @@ // CHECK-LABEL: @test_svdup_n_b8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i1 [[OP:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i1 [[OP:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svdup_n_b8b( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i1 [[OP:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i1 [[OP:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: ret [[TMP0]] // @@ -978,14 +978,14 @@ // CHECK-LABEL: @test_svdup_n_b16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i1 [[OP:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i1 [[OP:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svdup_n_b16b( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i1 [[OP:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i1 [[OP:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -997,14 +997,14 @@ // CHECK-LABEL: @test_svdup_n_b32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i1 [[OP:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i1 [[OP:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svdup_n_b32b( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i1 [[OP:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i1 [[OP:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -1016,14 +1016,14 @@ // CHECK-LABEL: @test_svdup_n_b64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i1 [[OP:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i1 [[OP:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svdup_n_b64b( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i1 [[OP:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i1 [[OP:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_dupq-bfloat.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_dupq-bfloat.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_dupq-bfloat.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_dupq-bfloat.c @@ -31,28 +31,28 @@ } // CHECK-LABEL: @test_svdupq_n_bf16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = insertelement <8 x bfloat> undef, bfloat [[X0:%.*]], i32 0 -// CHECK-NEXT: [[TMP1:%.*]] = insertelement <8 x bfloat> [[TMP0]], bfloat [[X1:%.*]], i32 1 -// CHECK-NEXT: [[TMP2:%.*]] = insertelement <8 x bfloat> [[TMP1]], bfloat [[X2:%.*]], i32 2 -// CHECK-NEXT: [[TMP3:%.*]] = insertelement <8 x bfloat> [[TMP2]], bfloat [[X3:%.*]], i32 3 -// CHECK-NEXT: [[TMP4:%.*]] = insertelement <8 x bfloat> [[TMP3]], bfloat [[X4:%.*]], i32 4 -// CHECK-NEXT: [[TMP5:%.*]] = insertelement <8 x bfloat> [[TMP4]], bfloat [[X5:%.*]], i32 5 -// CHECK-NEXT: [[TMP6:%.*]] = insertelement <8 x bfloat> [[TMP5]], bfloat [[X6:%.*]], i32 6 -// CHECK-NEXT: [[TMP7:%.*]] = insertelement <8 x bfloat> [[TMP6]], bfloat [[X7:%.*]], i32 7 +// CHECK-NEXT: [[TMP0:%.*]] = insertelement <8 x bfloat> undef, bfloat [[X0:%.*]], i64 0 +// CHECK-NEXT: [[TMP1:%.*]] = insertelement <8 x bfloat> [[TMP0]], bfloat [[X1:%.*]], i64 1 +// CHECK-NEXT: [[TMP2:%.*]] = insertelement <8 x bfloat> [[TMP1]], bfloat [[X2:%.*]], i64 2 +// CHECK-NEXT: [[TMP3:%.*]] = insertelement <8 x bfloat> [[TMP2]], bfloat [[X3:%.*]], i64 3 +// CHECK-NEXT: [[TMP4:%.*]] = insertelement <8 x bfloat> [[TMP3]], bfloat [[X4:%.*]], i64 4 +// CHECK-NEXT: [[TMP5:%.*]] = insertelement <8 x bfloat> [[TMP4]], bfloat [[X5:%.*]], i64 5 +// CHECK-NEXT: [[TMP6:%.*]] = insertelement <8 x bfloat> [[TMP5]], bfloat [[X6:%.*]], i64 6 +// CHECK-NEXT: [[TMP7:%.*]] = insertelement <8 x bfloat> [[TMP6]], bfloat [[X7:%.*]], i64 7 // CHECK-NEXT: [[TMP8:%.*]] = call @llvm.experimental.vector.insert.nxv8bf16.v8bf16( undef, <8 x bfloat> [[TMP7]], i64 0) // CHECK-NEXT: [[TMP9:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv8bf16( [[TMP8]], i64 0) // CHECK-NEXT: ret [[TMP9]] // // CPP-CHECK-LABEL: @_Z18test_svdupq_n_bf16u6__bf16u6__bf16u6__bf16u6__bf16u6__bf16u6__bf16u6__bf16u6__bf16( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = insertelement <8 x bfloat> undef, bfloat [[X0:%.*]], i32 0 -// CPP-CHECK-NEXT: [[TMP1:%.*]] = insertelement <8 x bfloat> [[TMP0]], bfloat [[X1:%.*]], i32 1 -// CPP-CHECK-NEXT: [[TMP2:%.*]] = insertelement <8 x bfloat> [[TMP1]], bfloat [[X2:%.*]], i32 2 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = insertelement <8 x bfloat> [[TMP2]], bfloat [[X3:%.*]], i32 3 -// CPP-CHECK-NEXT: [[TMP4:%.*]] = insertelement <8 x bfloat> [[TMP3]], bfloat [[X4:%.*]], i32 4 -// CPP-CHECK-NEXT: [[TMP5:%.*]] = insertelement <8 x bfloat> [[TMP4]], bfloat [[X5:%.*]], i32 5 -// CPP-CHECK-NEXT: [[TMP6:%.*]] = insertelement <8 x bfloat> [[TMP5]], bfloat [[X6:%.*]], i32 6 -// CPP-CHECK-NEXT: [[TMP7:%.*]] = insertelement <8 x bfloat> [[TMP6]], bfloat [[X7:%.*]], i32 7 +// CPP-CHECK-NEXT: [[TMP0:%.*]] = insertelement <8 x bfloat> undef, bfloat [[X0:%.*]], i64 0 +// CPP-CHECK-NEXT: [[TMP1:%.*]] = insertelement <8 x bfloat> [[TMP0]], bfloat [[X1:%.*]], i64 1 +// CPP-CHECK-NEXT: [[TMP2:%.*]] = insertelement <8 x bfloat> [[TMP1]], bfloat [[X2:%.*]], i64 2 +// CPP-CHECK-NEXT: [[TMP3:%.*]] = insertelement <8 x bfloat> [[TMP2]], bfloat [[X3:%.*]], i64 3 +// CPP-CHECK-NEXT: [[TMP4:%.*]] = insertelement <8 x bfloat> [[TMP3]], bfloat [[X4:%.*]], i64 4 +// CPP-CHECK-NEXT: [[TMP5:%.*]] = insertelement <8 x bfloat> [[TMP4]], bfloat [[X5:%.*]], i64 5 +// CPP-CHECK-NEXT: [[TMP6:%.*]] = insertelement <8 x bfloat> [[TMP5]], bfloat [[X6:%.*]], i64 6 +// CPP-CHECK-NEXT: [[TMP7:%.*]] = insertelement <8 x bfloat> [[TMP6]], bfloat [[X7:%.*]], i64 7 // CPP-CHECK-NEXT: [[TMP8:%.*]] = call @llvm.experimental.vector.insert.nxv8bf16.v8bf16( undef, <8 x bfloat> [[TMP7]], i64 0) // CPP-CHECK-NEXT: [[TMP9:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv8bf16( [[TMP8]], i64 0) // CPP-CHECK-NEXT: ret [[TMP9]] diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_dupq.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_dupq.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_dupq.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_dupq.c @@ -181,44 +181,44 @@ // CHECK-LABEL: @test_svdupq_n_s8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = insertelement <16 x i8> undef, i8 [[X0:%.*]], i32 0 -// CHECK-NEXT: [[TMP1:%.*]] = insertelement <16 x i8> [[TMP0]], i8 [[X1:%.*]], i32 1 -// CHECK-NEXT: [[TMP2:%.*]] = insertelement <16 x i8> [[TMP1]], i8 [[X2:%.*]], i32 2 -// CHECK-NEXT: [[TMP3:%.*]] = insertelement <16 x i8> [[TMP2]], i8 [[X3:%.*]], i32 3 -// CHECK-NEXT: [[TMP4:%.*]] = insertelement <16 x i8> [[TMP3]], i8 [[X4:%.*]], i32 4 -// CHECK-NEXT: [[TMP5:%.*]] = insertelement <16 x i8> [[TMP4]], i8 [[X5:%.*]], i32 5 -// CHECK-NEXT: [[TMP6:%.*]] = insertelement <16 x i8> [[TMP5]], i8 [[X6:%.*]], i32 6 -// CHECK-NEXT: [[TMP7:%.*]] = insertelement <16 x i8> [[TMP6]], i8 [[X7:%.*]], i32 7 -// CHECK-NEXT: [[TMP8:%.*]] = insertelement <16 x i8> [[TMP7]], i8 [[X8:%.*]], i32 8 -// CHECK-NEXT: [[TMP9:%.*]] = insertelement <16 x i8> [[TMP8]], i8 [[X9:%.*]], i32 9 -// CHECK-NEXT: [[TMP10:%.*]] = insertelement <16 x i8> [[TMP9]], i8 [[X10:%.*]], i32 10 -// CHECK-NEXT: [[TMP11:%.*]] = insertelement <16 x i8> [[TMP10]], i8 [[X11:%.*]], i32 11 -// CHECK-NEXT: [[TMP12:%.*]] = insertelement <16 x i8> [[TMP11]], i8 [[X12:%.*]], i32 12 -// CHECK-NEXT: [[TMP13:%.*]] = insertelement <16 x i8> [[TMP12]], i8 [[X13:%.*]], i32 13 -// CHECK-NEXT: [[TMP14:%.*]] = insertelement <16 x i8> [[TMP13]], i8 [[X14:%.*]], i32 14 -// CHECK-NEXT: [[TMP15:%.*]] = insertelement <16 x i8> [[TMP14]], i8 [[X15:%.*]], i32 15 +// CHECK-NEXT: [[TMP0:%.*]] = insertelement <16 x i8> undef, i8 [[X0:%.*]], i64 0 +// CHECK-NEXT: [[TMP1:%.*]] = insertelement <16 x i8> [[TMP0]], i8 [[X1:%.*]], i64 1 +// CHECK-NEXT: [[TMP2:%.*]] = insertelement <16 x i8> [[TMP1]], i8 [[X2:%.*]], i64 2 +// CHECK-NEXT: [[TMP3:%.*]] = insertelement <16 x i8> [[TMP2]], i8 [[X3:%.*]], i64 3 +// CHECK-NEXT: [[TMP4:%.*]] = insertelement <16 x i8> [[TMP3]], i8 [[X4:%.*]], i64 4 +// CHECK-NEXT: [[TMP5:%.*]] = insertelement <16 x i8> [[TMP4]], i8 [[X5:%.*]], i64 5 +// CHECK-NEXT: [[TMP6:%.*]] = insertelement <16 x i8> [[TMP5]], i8 [[X6:%.*]], i64 6 +// CHECK-NEXT: [[TMP7:%.*]] = insertelement <16 x i8> [[TMP6]], i8 [[X7:%.*]], i64 7 +// CHECK-NEXT: [[TMP8:%.*]] = insertelement <16 x i8> [[TMP7]], i8 [[X8:%.*]], i64 8 +// CHECK-NEXT: [[TMP9:%.*]] = insertelement <16 x i8> [[TMP8]], i8 [[X9:%.*]], i64 9 +// CHECK-NEXT: [[TMP10:%.*]] = insertelement <16 x i8> [[TMP9]], i8 [[X10:%.*]], i64 10 +// CHECK-NEXT: [[TMP11:%.*]] = insertelement <16 x i8> [[TMP10]], i8 [[X11:%.*]], i64 11 +// CHECK-NEXT: [[TMP12:%.*]] = insertelement <16 x i8> [[TMP11]], i8 [[X12:%.*]], i64 12 +// CHECK-NEXT: [[TMP13:%.*]] = insertelement <16 x i8> [[TMP12]], i8 [[X13:%.*]], i64 13 +// CHECK-NEXT: [[TMP14:%.*]] = insertelement <16 x i8> [[TMP13]], i8 [[X14:%.*]], i64 14 +// CHECK-NEXT: [[TMP15:%.*]] = insertelement <16 x i8> [[TMP14]], i8 [[X15:%.*]], i64 15 // CHECK-NEXT: [[TMP16:%.*]] = call @llvm.experimental.vector.insert.nxv16i8.v16i8( undef, <16 x i8> [[TMP15]], i64 0) // CHECK-NEXT: [[TMP17:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv16i8( [[TMP16]], i64 0) // CHECK-NEXT: ret [[TMP17]] // // CPP-CHECK-LABEL: @_Z16test_svdupq_n_s8aaaaaaaaaaaaaaaa( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = insertelement <16 x i8> undef, i8 [[X0:%.*]], i32 0 -// CPP-CHECK-NEXT: [[TMP1:%.*]] = insertelement <16 x i8> [[TMP0]], i8 [[X1:%.*]], i32 1 -// CPP-CHECK-NEXT: [[TMP2:%.*]] = insertelement <16 x i8> [[TMP1]], i8 [[X2:%.*]], i32 2 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = insertelement <16 x i8> [[TMP2]], i8 [[X3:%.*]], i32 3 -// CPP-CHECK-NEXT: [[TMP4:%.*]] = insertelement <16 x i8> [[TMP3]], i8 [[X4:%.*]], i32 4 -// CPP-CHECK-NEXT: [[TMP5:%.*]] = insertelement <16 x i8> [[TMP4]], i8 [[X5:%.*]], i32 5 -// CPP-CHECK-NEXT: [[TMP6:%.*]] = insertelement <16 x i8> [[TMP5]], i8 [[X6:%.*]], i32 6 -// CPP-CHECK-NEXT: [[TMP7:%.*]] = insertelement <16 x i8> [[TMP6]], i8 [[X7:%.*]], i32 7 -// CPP-CHECK-NEXT: [[TMP8:%.*]] = insertelement <16 x i8> [[TMP7]], i8 [[X8:%.*]], i32 8 -// CPP-CHECK-NEXT: [[TMP9:%.*]] = insertelement <16 x i8> [[TMP8]], i8 [[X9:%.*]], i32 9 -// CPP-CHECK-NEXT: [[TMP10:%.*]] = insertelement <16 x i8> [[TMP9]], i8 [[X10:%.*]], i32 10 -// CPP-CHECK-NEXT: [[TMP11:%.*]] = insertelement <16 x i8> [[TMP10]], i8 [[X11:%.*]], i32 11 -// CPP-CHECK-NEXT: [[TMP12:%.*]] = insertelement <16 x i8> [[TMP11]], i8 [[X12:%.*]], i32 12 -// CPP-CHECK-NEXT: [[TMP13:%.*]] = insertelement <16 x i8> [[TMP12]], i8 [[X13:%.*]], i32 13 -// CPP-CHECK-NEXT: [[TMP14:%.*]] = insertelement <16 x i8> [[TMP13]], i8 [[X14:%.*]], i32 14 -// CPP-CHECK-NEXT: [[TMP15:%.*]] = insertelement <16 x i8> [[TMP14]], i8 [[X15:%.*]], i32 15 +// CPP-CHECK-NEXT: [[TMP0:%.*]] = insertelement <16 x i8> undef, i8 [[X0:%.*]], i64 0 +// CPP-CHECK-NEXT: [[TMP1:%.*]] = insertelement <16 x i8> [[TMP0]], i8 [[X1:%.*]], i64 1 +// CPP-CHECK-NEXT: [[TMP2:%.*]] = insertelement <16 x i8> [[TMP1]], i8 [[X2:%.*]], i64 2 +// CPP-CHECK-NEXT: [[TMP3:%.*]] = insertelement <16 x i8> [[TMP2]], i8 [[X3:%.*]], i64 3 +// CPP-CHECK-NEXT: [[TMP4:%.*]] = insertelement <16 x i8> [[TMP3]], i8 [[X4:%.*]], i64 4 +// CPP-CHECK-NEXT: [[TMP5:%.*]] = insertelement <16 x i8> [[TMP4]], i8 [[X5:%.*]], i64 5 +// CPP-CHECK-NEXT: [[TMP6:%.*]] = insertelement <16 x i8> [[TMP5]], i8 [[X6:%.*]], i64 6 +// CPP-CHECK-NEXT: [[TMP7:%.*]] = insertelement <16 x i8> [[TMP6]], i8 [[X7:%.*]], i64 7 +// CPP-CHECK-NEXT: [[TMP8:%.*]] = insertelement <16 x i8> [[TMP7]], i8 [[X8:%.*]], i64 8 +// CPP-CHECK-NEXT: [[TMP9:%.*]] = insertelement <16 x i8> [[TMP8]], i8 [[X9:%.*]], i64 9 +// CPP-CHECK-NEXT: [[TMP10:%.*]] = insertelement <16 x i8> [[TMP9]], i8 [[X10:%.*]], i64 10 +// CPP-CHECK-NEXT: [[TMP11:%.*]] = insertelement <16 x i8> [[TMP10]], i8 [[X11:%.*]], i64 11 +// CPP-CHECK-NEXT: [[TMP12:%.*]] = insertelement <16 x i8> [[TMP11]], i8 [[X12:%.*]], i64 12 +// CPP-CHECK-NEXT: [[TMP13:%.*]] = insertelement <16 x i8> [[TMP12]], i8 [[X13:%.*]], i64 13 +// CPP-CHECK-NEXT: [[TMP14:%.*]] = insertelement <16 x i8> [[TMP13]], i8 [[X14:%.*]], i64 14 +// CPP-CHECK-NEXT: [[TMP15:%.*]] = insertelement <16 x i8> [[TMP14]], i8 [[X15:%.*]], i64 15 // CPP-CHECK-NEXT: [[TMP16:%.*]] = call @llvm.experimental.vector.insert.nxv16i8.v16i8( undef, <16 x i8> [[TMP15]], i64 0) // CPP-CHECK-NEXT: [[TMP17:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv16i8( [[TMP16]], i64 0) // CPP-CHECK-NEXT: ret [[TMP17]] @@ -234,28 +234,28 @@ // CHECK-LABEL: @test_svdupq_n_s16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = insertelement <8 x i16> undef, i16 [[X0:%.*]], i32 0 -// CHECK-NEXT: [[TMP1:%.*]] = insertelement <8 x i16> [[TMP0]], i16 [[X1:%.*]], i32 1 -// CHECK-NEXT: [[TMP2:%.*]] = insertelement <8 x i16> [[TMP1]], i16 [[X2:%.*]], i32 2 -// CHECK-NEXT: [[TMP3:%.*]] = insertelement <8 x i16> [[TMP2]], i16 [[X3:%.*]], i32 3 -// CHECK-NEXT: [[TMP4:%.*]] = insertelement <8 x i16> [[TMP3]], i16 [[X4:%.*]], i32 4 -// CHECK-NEXT: [[TMP5:%.*]] = insertelement <8 x i16> [[TMP4]], i16 [[X5:%.*]], i32 5 -// CHECK-NEXT: [[TMP6:%.*]] = insertelement <8 x i16> [[TMP5]], i16 [[X6:%.*]], i32 6 -// CHECK-NEXT: [[TMP7:%.*]] = insertelement <8 x i16> [[TMP6]], i16 [[X7:%.*]], i32 7 +// CHECK-NEXT: [[TMP0:%.*]] = insertelement <8 x i16> undef, i16 [[X0:%.*]], i64 0 +// CHECK-NEXT: [[TMP1:%.*]] = insertelement <8 x i16> [[TMP0]], i16 [[X1:%.*]], i64 1 +// CHECK-NEXT: [[TMP2:%.*]] = insertelement <8 x i16> [[TMP1]], i16 [[X2:%.*]], i64 2 +// CHECK-NEXT: [[TMP3:%.*]] = insertelement <8 x i16> [[TMP2]], i16 [[X3:%.*]], i64 3 +// CHECK-NEXT: [[TMP4:%.*]] = insertelement <8 x i16> [[TMP3]], i16 [[X4:%.*]], i64 4 +// CHECK-NEXT: [[TMP5:%.*]] = insertelement <8 x i16> [[TMP4]], i16 [[X5:%.*]], i64 5 +// CHECK-NEXT: [[TMP6:%.*]] = insertelement <8 x i16> [[TMP5]], i16 [[X6:%.*]], i64 6 +// CHECK-NEXT: [[TMP7:%.*]] = insertelement <8 x i16> [[TMP6]], i16 [[X7:%.*]], i64 7 // CHECK-NEXT: [[TMP8:%.*]] = call @llvm.experimental.vector.insert.nxv8i16.v8i16( undef, <8 x i16> [[TMP7]], i64 0) // CHECK-NEXT: [[TMP9:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv8i16( [[TMP8]], i64 0) // CHECK-NEXT: ret [[TMP9]] // // CPP-CHECK-LABEL: @_Z17test_svdupq_n_s16ssssssss( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = insertelement <8 x i16> undef, i16 [[X0:%.*]], i32 0 -// CPP-CHECK-NEXT: [[TMP1:%.*]] = insertelement <8 x i16> [[TMP0]], i16 [[X1:%.*]], i32 1 -// CPP-CHECK-NEXT: [[TMP2:%.*]] = insertelement <8 x i16> [[TMP1]], i16 [[X2:%.*]], i32 2 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = insertelement <8 x i16> [[TMP2]], i16 [[X3:%.*]], i32 3 -// CPP-CHECK-NEXT: [[TMP4:%.*]] = insertelement <8 x i16> [[TMP3]], i16 [[X4:%.*]], i32 4 -// CPP-CHECK-NEXT: [[TMP5:%.*]] = insertelement <8 x i16> [[TMP4]], i16 [[X5:%.*]], i32 5 -// CPP-CHECK-NEXT: [[TMP6:%.*]] = insertelement <8 x i16> [[TMP5]], i16 [[X6:%.*]], i32 6 -// CPP-CHECK-NEXT: [[TMP7:%.*]] = insertelement <8 x i16> [[TMP6]], i16 [[X7:%.*]], i32 7 +// CPP-CHECK-NEXT: [[TMP0:%.*]] = insertelement <8 x i16> undef, i16 [[X0:%.*]], i64 0 +// CPP-CHECK-NEXT: [[TMP1:%.*]] = insertelement <8 x i16> [[TMP0]], i16 [[X1:%.*]], i64 1 +// CPP-CHECK-NEXT: [[TMP2:%.*]] = insertelement <8 x i16> [[TMP1]], i16 [[X2:%.*]], i64 2 +// CPP-CHECK-NEXT: [[TMP3:%.*]] = insertelement <8 x i16> [[TMP2]], i16 [[X3:%.*]], i64 3 +// CPP-CHECK-NEXT: [[TMP4:%.*]] = insertelement <8 x i16> [[TMP3]], i16 [[X4:%.*]], i64 4 +// CPP-CHECK-NEXT: [[TMP5:%.*]] = insertelement <8 x i16> [[TMP4]], i16 [[X5:%.*]], i64 5 +// CPP-CHECK-NEXT: [[TMP6:%.*]] = insertelement <8 x i16> [[TMP5]], i16 [[X6:%.*]], i64 6 +// CPP-CHECK-NEXT: [[TMP7:%.*]] = insertelement <8 x i16> [[TMP6]], i16 [[X7:%.*]], i64 7 // CPP-CHECK-NEXT: [[TMP8:%.*]] = call @llvm.experimental.vector.insert.nxv8i16.v8i16( undef, <8 x i16> [[TMP7]], i64 0) // CPP-CHECK-NEXT: [[TMP9:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv8i16( [[TMP8]], i64 0) // CPP-CHECK-NEXT: ret [[TMP9]] @@ -269,20 +269,20 @@ // CHECK-LABEL: @test_svdupq_n_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = insertelement <4 x i32> undef, i32 [[X0:%.*]], i32 0 -// CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x i32> [[TMP0]], i32 [[X1:%.*]], i32 1 -// CHECK-NEXT: [[TMP2:%.*]] = insertelement <4 x i32> [[TMP1]], i32 [[X2:%.*]], i32 2 -// CHECK-NEXT: [[TMP3:%.*]] = insertelement <4 x i32> [[TMP2]], i32 [[X3:%.*]], i32 3 +// CHECK-NEXT: [[TMP0:%.*]] = insertelement <4 x i32> undef, i32 [[X0:%.*]], i64 0 +// CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x i32> [[TMP0]], i32 [[X1:%.*]], i64 1 +// CHECK-NEXT: [[TMP2:%.*]] = insertelement <4 x i32> [[TMP1]], i32 [[X2:%.*]], i64 2 +// CHECK-NEXT: [[TMP3:%.*]] = insertelement <4 x i32> [[TMP2]], i32 [[X3:%.*]], i64 3 // CHECK-NEXT: [[TMP4:%.*]] = call @llvm.experimental.vector.insert.nxv4i32.v4i32( undef, <4 x i32> [[TMP3]], i64 0) // CHECK-NEXT: [[TMP5:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv4i32( [[TMP4]], i64 0) // CHECK-NEXT: ret [[TMP5]] // // CPP-CHECK-LABEL: @_Z17test_svdupq_n_s32iiii( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = insertelement <4 x i32> undef, i32 [[X0:%.*]], i32 0 -// CPP-CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x i32> [[TMP0]], i32 [[X1:%.*]], i32 1 -// CPP-CHECK-NEXT: [[TMP2:%.*]] = insertelement <4 x i32> [[TMP1]], i32 [[X2:%.*]], i32 2 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = insertelement <4 x i32> [[TMP2]], i32 [[X3:%.*]], i32 3 +// CPP-CHECK-NEXT: [[TMP0:%.*]] = insertelement <4 x i32> undef, i32 [[X0:%.*]], i64 0 +// CPP-CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x i32> [[TMP0]], i32 [[X1:%.*]], i64 1 +// CPP-CHECK-NEXT: [[TMP2:%.*]] = insertelement <4 x i32> [[TMP1]], i32 [[X2:%.*]], i64 2 +// CPP-CHECK-NEXT: [[TMP3:%.*]] = insertelement <4 x i32> [[TMP2]], i32 [[X3:%.*]], i64 3 // CPP-CHECK-NEXT: [[TMP4:%.*]] = call @llvm.experimental.vector.insert.nxv4i32.v4i32( undef, <4 x i32> [[TMP3]], i64 0) // CPP-CHECK-NEXT: [[TMP5:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv4i32( [[TMP4]], i64 0) // CPP-CHECK-NEXT: ret [[TMP5]] @@ -295,16 +295,16 @@ // CHECK-LABEL: @test_svdupq_n_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = insertelement <2 x i64> undef, i64 [[X0:%.*]], i32 0 -// CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x i64> [[TMP0]], i64 [[X1:%.*]], i32 1 +// CHECK-NEXT: [[TMP0:%.*]] = insertelement <2 x i64> undef, i64 [[X0:%.*]], i64 0 +// CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x i64> [[TMP0]], i64 [[X1:%.*]], i64 1 // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.experimental.vector.insert.nxv2i64.v2i64( undef, <2 x i64> [[TMP1]], i64 0) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv2i64( [[TMP2]], i64 0) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z17test_svdupq_n_s64ll( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = insertelement <2 x i64> undef, i64 [[X0:%.*]], i32 0 -// CPP-CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x i64> [[TMP0]], i64 [[X1:%.*]], i32 1 +// CPP-CHECK-NEXT: [[TMP0:%.*]] = insertelement <2 x i64> undef, i64 [[X0:%.*]], i64 0 +// CPP-CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x i64> [[TMP0]], i64 [[X1:%.*]], i64 1 // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.experimental.vector.insert.nxv2i64.v2i64( undef, <2 x i64> [[TMP1]], i64 0) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv2i64( [[TMP2]], i64 0) // CPP-CHECK-NEXT: ret [[TMP3]] @@ -316,44 +316,44 @@ // CHECK-LABEL: @test_svdupq_n_u8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = insertelement <16 x i8> undef, i8 [[X0:%.*]], i32 0 -// CHECK-NEXT: [[TMP1:%.*]] = insertelement <16 x i8> [[TMP0]], i8 [[X1:%.*]], i32 1 -// CHECK-NEXT: [[TMP2:%.*]] = insertelement <16 x i8> [[TMP1]], i8 [[X2:%.*]], i32 2 -// CHECK-NEXT: [[TMP3:%.*]] = insertelement <16 x i8> [[TMP2]], i8 [[X3:%.*]], i32 3 -// CHECK-NEXT: [[TMP4:%.*]] = insertelement <16 x i8> [[TMP3]], i8 [[X4:%.*]], i32 4 -// CHECK-NEXT: [[TMP5:%.*]] = insertelement <16 x i8> [[TMP4]], i8 [[X5:%.*]], i32 5 -// CHECK-NEXT: [[TMP6:%.*]] = insertelement <16 x i8> [[TMP5]], i8 [[X6:%.*]], i32 6 -// CHECK-NEXT: [[TMP7:%.*]] = insertelement <16 x i8> [[TMP6]], i8 [[X7:%.*]], i32 7 -// CHECK-NEXT: [[TMP8:%.*]] = insertelement <16 x i8> [[TMP7]], i8 [[X8:%.*]], i32 8 -// CHECK-NEXT: [[TMP9:%.*]] = insertelement <16 x i8> [[TMP8]], i8 [[X9:%.*]], i32 9 -// CHECK-NEXT: [[TMP10:%.*]] = insertelement <16 x i8> [[TMP9]], i8 [[X10:%.*]], i32 10 -// CHECK-NEXT: [[TMP11:%.*]] = insertelement <16 x i8> [[TMP10]], i8 [[X11:%.*]], i32 11 -// CHECK-NEXT: [[TMP12:%.*]] = insertelement <16 x i8> [[TMP11]], i8 [[X12:%.*]], i32 12 -// CHECK-NEXT: [[TMP13:%.*]] = insertelement <16 x i8> [[TMP12]], i8 [[X13:%.*]], i32 13 -// CHECK-NEXT: [[TMP14:%.*]] = insertelement <16 x i8> [[TMP13]], i8 [[X14:%.*]], i32 14 -// CHECK-NEXT: [[TMP15:%.*]] = insertelement <16 x i8> [[TMP14]], i8 [[X15:%.*]], i32 15 +// CHECK-NEXT: [[TMP0:%.*]] = insertelement <16 x i8> undef, i8 [[X0:%.*]], i64 0 +// CHECK-NEXT: [[TMP1:%.*]] = insertelement <16 x i8> [[TMP0]], i8 [[X1:%.*]], i64 1 +// CHECK-NEXT: [[TMP2:%.*]] = insertelement <16 x i8> [[TMP1]], i8 [[X2:%.*]], i64 2 +// CHECK-NEXT: [[TMP3:%.*]] = insertelement <16 x i8> [[TMP2]], i8 [[X3:%.*]], i64 3 +// CHECK-NEXT: [[TMP4:%.*]] = insertelement <16 x i8> [[TMP3]], i8 [[X4:%.*]], i64 4 +// CHECK-NEXT: [[TMP5:%.*]] = insertelement <16 x i8> [[TMP4]], i8 [[X5:%.*]], i64 5 +// CHECK-NEXT: [[TMP6:%.*]] = insertelement <16 x i8> [[TMP5]], i8 [[X6:%.*]], i64 6 +// CHECK-NEXT: [[TMP7:%.*]] = insertelement <16 x i8> [[TMP6]], i8 [[X7:%.*]], i64 7 +// CHECK-NEXT: [[TMP8:%.*]] = insertelement <16 x i8> [[TMP7]], i8 [[X8:%.*]], i64 8 +// CHECK-NEXT: [[TMP9:%.*]] = insertelement <16 x i8> [[TMP8]], i8 [[X9:%.*]], i64 9 +// CHECK-NEXT: [[TMP10:%.*]] = insertelement <16 x i8> [[TMP9]], i8 [[X10:%.*]], i64 10 +// CHECK-NEXT: [[TMP11:%.*]] = insertelement <16 x i8> [[TMP10]], i8 [[X11:%.*]], i64 11 +// CHECK-NEXT: [[TMP12:%.*]] = insertelement <16 x i8> [[TMP11]], i8 [[X12:%.*]], i64 12 +// CHECK-NEXT: [[TMP13:%.*]] = insertelement <16 x i8> [[TMP12]], i8 [[X13:%.*]], i64 13 +// CHECK-NEXT: [[TMP14:%.*]] = insertelement <16 x i8> [[TMP13]], i8 [[X14:%.*]], i64 14 +// CHECK-NEXT: [[TMP15:%.*]] = insertelement <16 x i8> [[TMP14]], i8 [[X15:%.*]], i64 15 // CHECK-NEXT: [[TMP16:%.*]] = call @llvm.experimental.vector.insert.nxv16i8.v16i8( undef, <16 x i8> [[TMP15]], i64 0) // CHECK-NEXT: [[TMP17:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv16i8( [[TMP16]], i64 0) // CHECK-NEXT: ret [[TMP17]] // // CPP-CHECK-LABEL: @_Z16test_svdupq_n_u8hhhhhhhhhhhhhhhh( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = insertelement <16 x i8> undef, i8 [[X0:%.*]], i32 0 -// CPP-CHECK-NEXT: [[TMP1:%.*]] = insertelement <16 x i8> [[TMP0]], i8 [[X1:%.*]], i32 1 -// CPP-CHECK-NEXT: [[TMP2:%.*]] = insertelement <16 x i8> [[TMP1]], i8 [[X2:%.*]], i32 2 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = insertelement <16 x i8> [[TMP2]], i8 [[X3:%.*]], i32 3 -// CPP-CHECK-NEXT: [[TMP4:%.*]] = insertelement <16 x i8> [[TMP3]], i8 [[X4:%.*]], i32 4 -// CPP-CHECK-NEXT: [[TMP5:%.*]] = insertelement <16 x i8> [[TMP4]], i8 [[X5:%.*]], i32 5 -// CPP-CHECK-NEXT: [[TMP6:%.*]] = insertelement <16 x i8> [[TMP5]], i8 [[X6:%.*]], i32 6 -// CPP-CHECK-NEXT: [[TMP7:%.*]] = insertelement <16 x i8> [[TMP6]], i8 [[X7:%.*]], i32 7 -// CPP-CHECK-NEXT: [[TMP8:%.*]] = insertelement <16 x i8> [[TMP7]], i8 [[X8:%.*]], i32 8 -// CPP-CHECK-NEXT: [[TMP9:%.*]] = insertelement <16 x i8> [[TMP8]], i8 [[X9:%.*]], i32 9 -// CPP-CHECK-NEXT: [[TMP10:%.*]] = insertelement <16 x i8> [[TMP9]], i8 [[X10:%.*]], i32 10 -// CPP-CHECK-NEXT: [[TMP11:%.*]] = insertelement <16 x i8> [[TMP10]], i8 [[X11:%.*]], i32 11 -// CPP-CHECK-NEXT: [[TMP12:%.*]] = insertelement <16 x i8> [[TMP11]], i8 [[X12:%.*]], i32 12 -// CPP-CHECK-NEXT: [[TMP13:%.*]] = insertelement <16 x i8> [[TMP12]], i8 [[X13:%.*]], i32 13 -// CPP-CHECK-NEXT: [[TMP14:%.*]] = insertelement <16 x i8> [[TMP13]], i8 [[X14:%.*]], i32 14 -// CPP-CHECK-NEXT: [[TMP15:%.*]] = insertelement <16 x i8> [[TMP14]], i8 [[X15:%.*]], i32 15 +// CPP-CHECK-NEXT: [[TMP0:%.*]] = insertelement <16 x i8> undef, i8 [[X0:%.*]], i64 0 +// CPP-CHECK-NEXT: [[TMP1:%.*]] = insertelement <16 x i8> [[TMP0]], i8 [[X1:%.*]], i64 1 +// CPP-CHECK-NEXT: [[TMP2:%.*]] = insertelement <16 x i8> [[TMP1]], i8 [[X2:%.*]], i64 2 +// CPP-CHECK-NEXT: [[TMP3:%.*]] = insertelement <16 x i8> [[TMP2]], i8 [[X3:%.*]], i64 3 +// CPP-CHECK-NEXT: [[TMP4:%.*]] = insertelement <16 x i8> [[TMP3]], i8 [[X4:%.*]], i64 4 +// CPP-CHECK-NEXT: [[TMP5:%.*]] = insertelement <16 x i8> [[TMP4]], i8 [[X5:%.*]], i64 5 +// CPP-CHECK-NEXT: [[TMP6:%.*]] = insertelement <16 x i8> [[TMP5]], i8 [[X6:%.*]], i64 6 +// CPP-CHECK-NEXT: [[TMP7:%.*]] = insertelement <16 x i8> [[TMP6]], i8 [[X7:%.*]], i64 7 +// CPP-CHECK-NEXT: [[TMP8:%.*]] = insertelement <16 x i8> [[TMP7]], i8 [[X8:%.*]], i64 8 +// CPP-CHECK-NEXT: [[TMP9:%.*]] = insertelement <16 x i8> [[TMP8]], i8 [[X9:%.*]], i64 9 +// CPP-CHECK-NEXT: [[TMP10:%.*]] = insertelement <16 x i8> [[TMP9]], i8 [[X10:%.*]], i64 10 +// CPP-CHECK-NEXT: [[TMP11:%.*]] = insertelement <16 x i8> [[TMP10]], i8 [[X11:%.*]], i64 11 +// CPP-CHECK-NEXT: [[TMP12:%.*]] = insertelement <16 x i8> [[TMP11]], i8 [[X12:%.*]], i64 12 +// CPP-CHECK-NEXT: [[TMP13:%.*]] = insertelement <16 x i8> [[TMP12]], i8 [[X13:%.*]], i64 13 +// CPP-CHECK-NEXT: [[TMP14:%.*]] = insertelement <16 x i8> [[TMP13]], i8 [[X14:%.*]], i64 14 +// CPP-CHECK-NEXT: [[TMP15:%.*]] = insertelement <16 x i8> [[TMP14]], i8 [[X15:%.*]], i64 15 // CPP-CHECK-NEXT: [[TMP16:%.*]] = call @llvm.experimental.vector.insert.nxv16i8.v16i8( undef, <16 x i8> [[TMP15]], i64 0) // CPP-CHECK-NEXT: [[TMP17:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv16i8( [[TMP16]], i64 0) // CPP-CHECK-NEXT: ret [[TMP17]] @@ -369,28 +369,28 @@ // CHECK-LABEL: @test_svdupq_n_u16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = insertelement <8 x i16> undef, i16 [[X0:%.*]], i32 0 -// CHECK-NEXT: [[TMP1:%.*]] = insertelement <8 x i16> [[TMP0]], i16 [[X1:%.*]], i32 1 -// CHECK-NEXT: [[TMP2:%.*]] = insertelement <8 x i16> [[TMP1]], i16 [[X2:%.*]], i32 2 -// CHECK-NEXT: [[TMP3:%.*]] = insertelement <8 x i16> [[TMP2]], i16 [[X3:%.*]], i32 3 -// CHECK-NEXT: [[TMP4:%.*]] = insertelement <8 x i16> [[TMP3]], i16 [[X4:%.*]], i32 4 -// CHECK-NEXT: [[TMP5:%.*]] = insertelement <8 x i16> [[TMP4]], i16 [[X5:%.*]], i32 5 -// CHECK-NEXT: [[TMP6:%.*]] = insertelement <8 x i16> [[TMP5]], i16 [[X6:%.*]], i32 6 -// CHECK-NEXT: [[TMP7:%.*]] = insertelement <8 x i16> [[TMP6]], i16 [[X7:%.*]], i32 7 +// CHECK-NEXT: [[TMP0:%.*]] = insertelement <8 x i16> undef, i16 [[X0:%.*]], i64 0 +// CHECK-NEXT: [[TMP1:%.*]] = insertelement <8 x i16> [[TMP0]], i16 [[X1:%.*]], i64 1 +// CHECK-NEXT: [[TMP2:%.*]] = insertelement <8 x i16> [[TMP1]], i16 [[X2:%.*]], i64 2 +// CHECK-NEXT: [[TMP3:%.*]] = insertelement <8 x i16> [[TMP2]], i16 [[X3:%.*]], i64 3 +// CHECK-NEXT: [[TMP4:%.*]] = insertelement <8 x i16> [[TMP3]], i16 [[X4:%.*]], i64 4 +// CHECK-NEXT: [[TMP5:%.*]] = insertelement <8 x i16> [[TMP4]], i16 [[X5:%.*]], i64 5 +// CHECK-NEXT: [[TMP6:%.*]] = insertelement <8 x i16> [[TMP5]], i16 [[X6:%.*]], i64 6 +// CHECK-NEXT: [[TMP7:%.*]] = insertelement <8 x i16> [[TMP6]], i16 [[X7:%.*]], i64 7 // CHECK-NEXT: [[TMP8:%.*]] = call @llvm.experimental.vector.insert.nxv8i16.v8i16( undef, <8 x i16> [[TMP7]], i64 0) // CHECK-NEXT: [[TMP9:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv8i16( [[TMP8]], i64 0) // CHECK-NEXT: ret [[TMP9]] // // CPP-CHECK-LABEL: @_Z17test_svdupq_n_u16tttttttt( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = insertelement <8 x i16> undef, i16 [[X0:%.*]], i32 0 -// CPP-CHECK-NEXT: [[TMP1:%.*]] = insertelement <8 x i16> [[TMP0]], i16 [[X1:%.*]], i32 1 -// CPP-CHECK-NEXT: [[TMP2:%.*]] = insertelement <8 x i16> [[TMP1]], i16 [[X2:%.*]], i32 2 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = insertelement <8 x i16> [[TMP2]], i16 [[X3:%.*]], i32 3 -// CPP-CHECK-NEXT: [[TMP4:%.*]] = insertelement <8 x i16> [[TMP3]], i16 [[X4:%.*]], i32 4 -// CPP-CHECK-NEXT: [[TMP5:%.*]] = insertelement <8 x i16> [[TMP4]], i16 [[X5:%.*]], i32 5 -// CPP-CHECK-NEXT: [[TMP6:%.*]] = insertelement <8 x i16> [[TMP5]], i16 [[X6:%.*]], i32 6 -// CPP-CHECK-NEXT: [[TMP7:%.*]] = insertelement <8 x i16> [[TMP6]], i16 [[X7:%.*]], i32 7 +// CPP-CHECK-NEXT: [[TMP0:%.*]] = insertelement <8 x i16> undef, i16 [[X0:%.*]], i64 0 +// CPP-CHECK-NEXT: [[TMP1:%.*]] = insertelement <8 x i16> [[TMP0]], i16 [[X1:%.*]], i64 1 +// CPP-CHECK-NEXT: [[TMP2:%.*]] = insertelement <8 x i16> [[TMP1]], i16 [[X2:%.*]], i64 2 +// CPP-CHECK-NEXT: [[TMP3:%.*]] = insertelement <8 x i16> [[TMP2]], i16 [[X3:%.*]], i64 3 +// CPP-CHECK-NEXT: [[TMP4:%.*]] = insertelement <8 x i16> [[TMP3]], i16 [[X4:%.*]], i64 4 +// CPP-CHECK-NEXT: [[TMP5:%.*]] = insertelement <8 x i16> [[TMP4]], i16 [[X5:%.*]], i64 5 +// CPP-CHECK-NEXT: [[TMP6:%.*]] = insertelement <8 x i16> [[TMP5]], i16 [[X6:%.*]], i64 6 +// CPP-CHECK-NEXT: [[TMP7:%.*]] = insertelement <8 x i16> [[TMP6]], i16 [[X7:%.*]], i64 7 // CPP-CHECK-NEXT: [[TMP8:%.*]] = call @llvm.experimental.vector.insert.nxv8i16.v8i16( undef, <8 x i16> [[TMP7]], i64 0) // CPP-CHECK-NEXT: [[TMP9:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv8i16( [[TMP8]], i64 0) // CPP-CHECK-NEXT: ret [[TMP9]] @@ -404,20 +404,20 @@ // CHECK-LABEL: @test_svdupq_n_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = insertelement <4 x i32> undef, i32 [[X0:%.*]], i32 0 -// CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x i32> [[TMP0]], i32 [[X1:%.*]], i32 1 -// CHECK-NEXT: [[TMP2:%.*]] = insertelement <4 x i32> [[TMP1]], i32 [[X2:%.*]], i32 2 -// CHECK-NEXT: [[TMP3:%.*]] = insertelement <4 x i32> [[TMP2]], i32 [[X3:%.*]], i32 3 +// CHECK-NEXT: [[TMP0:%.*]] = insertelement <4 x i32> undef, i32 [[X0:%.*]], i64 0 +// CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x i32> [[TMP0]], i32 [[X1:%.*]], i64 1 +// CHECK-NEXT: [[TMP2:%.*]] = insertelement <4 x i32> [[TMP1]], i32 [[X2:%.*]], i64 2 +// CHECK-NEXT: [[TMP3:%.*]] = insertelement <4 x i32> [[TMP2]], i32 [[X3:%.*]], i64 3 // CHECK-NEXT: [[TMP4:%.*]] = call @llvm.experimental.vector.insert.nxv4i32.v4i32( undef, <4 x i32> [[TMP3]], i64 0) // CHECK-NEXT: [[TMP5:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv4i32( [[TMP4]], i64 0) // CHECK-NEXT: ret [[TMP5]] // // CPP-CHECK-LABEL: @_Z17test_svdupq_n_u32jjjj( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = insertelement <4 x i32> undef, i32 [[X0:%.*]], i32 0 -// CPP-CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x i32> [[TMP0]], i32 [[X1:%.*]], i32 1 -// CPP-CHECK-NEXT: [[TMP2:%.*]] = insertelement <4 x i32> [[TMP1]], i32 [[X2:%.*]], i32 2 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = insertelement <4 x i32> [[TMP2]], i32 [[X3:%.*]], i32 3 +// CPP-CHECK-NEXT: [[TMP0:%.*]] = insertelement <4 x i32> undef, i32 [[X0:%.*]], i64 0 +// CPP-CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x i32> [[TMP0]], i32 [[X1:%.*]], i64 1 +// CPP-CHECK-NEXT: [[TMP2:%.*]] = insertelement <4 x i32> [[TMP1]], i32 [[X2:%.*]], i64 2 +// CPP-CHECK-NEXT: [[TMP3:%.*]] = insertelement <4 x i32> [[TMP2]], i32 [[X3:%.*]], i64 3 // CPP-CHECK-NEXT: [[TMP4:%.*]] = call @llvm.experimental.vector.insert.nxv4i32.v4i32( undef, <4 x i32> [[TMP3]], i64 0) // CPP-CHECK-NEXT: [[TMP5:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv4i32( [[TMP4]], i64 0) // CPP-CHECK-NEXT: ret [[TMP5]] @@ -430,16 +430,16 @@ // CHECK-LABEL: @test_svdupq_n_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = insertelement <2 x i64> undef, i64 [[X0:%.*]], i32 0 -// CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x i64> [[TMP0]], i64 [[X1:%.*]], i32 1 +// CHECK-NEXT: [[TMP0:%.*]] = insertelement <2 x i64> undef, i64 [[X0:%.*]], i64 0 +// CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x i64> [[TMP0]], i64 [[X1:%.*]], i64 1 // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.experimental.vector.insert.nxv2i64.v2i64( undef, <2 x i64> [[TMP1]], i64 0) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv2i64( [[TMP2]], i64 0) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z17test_svdupq_n_u64mm( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = insertelement <2 x i64> undef, i64 [[X0:%.*]], i32 0 -// CPP-CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x i64> [[TMP0]], i64 [[X1:%.*]], i32 1 +// CPP-CHECK-NEXT: [[TMP0:%.*]] = insertelement <2 x i64> undef, i64 [[X0:%.*]], i64 0 +// CPP-CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x i64> [[TMP0]], i64 [[X1:%.*]], i64 1 // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.experimental.vector.insert.nxv2i64.v2i64( undef, <2 x i64> [[TMP1]], i64 0) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv2i64( [[TMP2]], i64 0) // CPP-CHECK-NEXT: ret [[TMP3]] @@ -451,28 +451,28 @@ // CHECK-LABEL: @test_svdupq_n_f16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = insertelement <8 x half> undef, half [[X0:%.*]], i32 0 -// CHECK-NEXT: [[TMP1:%.*]] = insertelement <8 x half> [[TMP0]], half [[X1:%.*]], i32 1 -// CHECK-NEXT: [[TMP2:%.*]] = insertelement <8 x half> [[TMP1]], half [[X2:%.*]], i32 2 -// CHECK-NEXT: [[TMP3:%.*]] = insertelement <8 x half> [[TMP2]], half [[X3:%.*]], i32 3 -// CHECK-NEXT: [[TMP4:%.*]] = insertelement <8 x half> [[TMP3]], half [[X4:%.*]], i32 4 -// CHECK-NEXT: [[TMP5:%.*]] = insertelement <8 x half> [[TMP4]], half [[X5:%.*]], i32 5 -// CHECK-NEXT: [[TMP6:%.*]] = insertelement <8 x half> [[TMP5]], half [[X6:%.*]], i32 6 -// CHECK-NEXT: [[TMP7:%.*]] = insertelement <8 x half> [[TMP6]], half [[X7:%.*]], i32 7 +// CHECK-NEXT: [[TMP0:%.*]] = insertelement <8 x half> undef, half [[X0:%.*]], i64 0 +// CHECK-NEXT: [[TMP1:%.*]] = insertelement <8 x half> [[TMP0]], half [[X1:%.*]], i64 1 +// CHECK-NEXT: [[TMP2:%.*]] = insertelement <8 x half> [[TMP1]], half [[X2:%.*]], i64 2 +// CHECK-NEXT: [[TMP3:%.*]] = insertelement <8 x half> [[TMP2]], half [[X3:%.*]], i64 3 +// CHECK-NEXT: [[TMP4:%.*]] = insertelement <8 x half> [[TMP3]], half [[X4:%.*]], i64 4 +// CHECK-NEXT: [[TMP5:%.*]] = insertelement <8 x half> [[TMP4]], half [[X5:%.*]], i64 5 +// CHECK-NEXT: [[TMP6:%.*]] = insertelement <8 x half> [[TMP5]], half [[X6:%.*]], i64 6 +// CHECK-NEXT: [[TMP7:%.*]] = insertelement <8 x half> [[TMP6]], half [[X7:%.*]], i64 7 // CHECK-NEXT: [[TMP8:%.*]] = call @llvm.experimental.vector.insert.nxv8f16.v8f16( undef, <8 x half> [[TMP7]], i64 0) // CHECK-NEXT: [[TMP9:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv8f16( [[TMP8]], i64 0) // CHECK-NEXT: ret [[TMP9]] // // CPP-CHECK-LABEL: @_Z17test_svdupq_n_f16DhDhDhDhDhDhDhDh( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = insertelement <8 x half> undef, half [[X0:%.*]], i32 0 -// CPP-CHECK-NEXT: [[TMP1:%.*]] = insertelement <8 x half> [[TMP0]], half [[X1:%.*]], i32 1 -// CPP-CHECK-NEXT: [[TMP2:%.*]] = insertelement <8 x half> [[TMP1]], half [[X2:%.*]], i32 2 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = insertelement <8 x half> [[TMP2]], half [[X3:%.*]], i32 3 -// CPP-CHECK-NEXT: [[TMP4:%.*]] = insertelement <8 x half> [[TMP3]], half [[X4:%.*]], i32 4 -// CPP-CHECK-NEXT: [[TMP5:%.*]] = insertelement <8 x half> [[TMP4]], half [[X5:%.*]], i32 5 -// CPP-CHECK-NEXT: [[TMP6:%.*]] = insertelement <8 x half> [[TMP5]], half [[X6:%.*]], i32 6 -// CPP-CHECK-NEXT: [[TMP7:%.*]] = insertelement <8 x half> [[TMP6]], half [[X7:%.*]], i32 7 +// CPP-CHECK-NEXT: [[TMP0:%.*]] = insertelement <8 x half> undef, half [[X0:%.*]], i64 0 +// CPP-CHECK-NEXT: [[TMP1:%.*]] = insertelement <8 x half> [[TMP0]], half [[X1:%.*]], i64 1 +// CPP-CHECK-NEXT: [[TMP2:%.*]] = insertelement <8 x half> [[TMP1]], half [[X2:%.*]], i64 2 +// CPP-CHECK-NEXT: [[TMP3:%.*]] = insertelement <8 x half> [[TMP2]], half [[X3:%.*]], i64 3 +// CPP-CHECK-NEXT: [[TMP4:%.*]] = insertelement <8 x half> [[TMP3]], half [[X4:%.*]], i64 4 +// CPP-CHECK-NEXT: [[TMP5:%.*]] = insertelement <8 x half> [[TMP4]], half [[X5:%.*]], i64 5 +// CPP-CHECK-NEXT: [[TMP6:%.*]] = insertelement <8 x half> [[TMP5]], half [[X6:%.*]], i64 6 +// CPP-CHECK-NEXT: [[TMP7:%.*]] = insertelement <8 x half> [[TMP6]], half [[X7:%.*]], i64 7 // CPP-CHECK-NEXT: [[TMP8:%.*]] = call @llvm.experimental.vector.insert.nxv8f16.v8f16( undef, <8 x half> [[TMP7]], i64 0) // CPP-CHECK-NEXT: [[TMP9:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv8f16( [[TMP8]], i64 0) // CPP-CHECK-NEXT: ret [[TMP9]] @@ -486,20 +486,20 @@ // CHECK-LABEL: @test_svdupq_n_f32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = insertelement <4 x float> undef, float [[X0:%.*]], i32 0 -// CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x float> [[TMP0]], float [[X1:%.*]], i32 1 -// CHECK-NEXT: [[TMP2:%.*]] = insertelement <4 x float> [[TMP1]], float [[X2:%.*]], i32 2 -// CHECK-NEXT: [[TMP3:%.*]] = insertelement <4 x float> [[TMP2]], float [[X3:%.*]], i32 3 +// CHECK-NEXT: [[TMP0:%.*]] = insertelement <4 x float> undef, float [[X0:%.*]], i64 0 +// CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x float> [[TMP0]], float [[X1:%.*]], i64 1 +// CHECK-NEXT: [[TMP2:%.*]] = insertelement <4 x float> [[TMP1]], float [[X2:%.*]], i64 2 +// CHECK-NEXT: [[TMP3:%.*]] = insertelement <4 x float> [[TMP2]], float [[X3:%.*]], i64 3 // CHECK-NEXT: [[TMP4:%.*]] = call @llvm.experimental.vector.insert.nxv4f32.v4f32( undef, <4 x float> [[TMP3]], i64 0) // CHECK-NEXT: [[TMP5:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv4f32( [[TMP4]], i64 0) // CHECK-NEXT: ret [[TMP5]] // // CPP-CHECK-LABEL: @_Z17test_svdupq_n_f32ffff( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = insertelement <4 x float> undef, float [[X0:%.*]], i32 0 -// CPP-CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x float> [[TMP0]], float [[X1:%.*]], i32 1 -// CPP-CHECK-NEXT: [[TMP2:%.*]] = insertelement <4 x float> [[TMP1]], float [[X2:%.*]], i32 2 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = insertelement <4 x float> [[TMP2]], float [[X3:%.*]], i32 3 +// CPP-CHECK-NEXT: [[TMP0:%.*]] = insertelement <4 x float> undef, float [[X0:%.*]], i64 0 +// CPP-CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x float> [[TMP0]], float [[X1:%.*]], i64 1 +// CPP-CHECK-NEXT: [[TMP2:%.*]] = insertelement <4 x float> [[TMP1]], float [[X2:%.*]], i64 2 +// CPP-CHECK-NEXT: [[TMP3:%.*]] = insertelement <4 x float> [[TMP2]], float [[X3:%.*]], i64 3 // CPP-CHECK-NEXT: [[TMP4:%.*]] = call @llvm.experimental.vector.insert.nxv4f32.v4f32( undef, <4 x float> [[TMP3]], i64 0) // CPP-CHECK-NEXT: [[TMP5:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv4f32( [[TMP4]], i64 0) // CPP-CHECK-NEXT: ret [[TMP5]] @@ -512,16 +512,16 @@ // CHECK-LABEL: @test_svdupq_n_f64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = insertelement <2 x double> undef, double [[X0:%.*]], i32 0 -// CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x double> [[TMP0]], double [[X1:%.*]], i32 1 +// CHECK-NEXT: [[TMP0:%.*]] = insertelement <2 x double> undef, double [[X0:%.*]], i64 0 +// CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x double> [[TMP0]], double [[X1:%.*]], i64 1 // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.experimental.vector.insert.nxv2f64.v2f64( undef, <2 x double> [[TMP1]], i64 0) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv2f64( [[TMP2]], i64 0) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z17test_svdupq_n_f64dd( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = insertelement <2 x double> undef, double [[X0:%.*]], i32 0 -// CPP-CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x double> [[TMP0]], double [[X1:%.*]], i32 1 +// CPP-CHECK-NEXT: [[TMP0:%.*]] = insertelement <2 x double> undef, double [[X0:%.*]], i64 0 +// CPP-CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x double> [[TMP0]], double [[X1:%.*]], i64 1 // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.experimental.vector.insert.nxv2f64.v2f64( undef, <2 x double> [[TMP1]], i64 0) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv2f64( [[TMP2]], i64 0) // CPP-CHECK-NEXT: ret [[TMP3]] @@ -549,22 +549,22 @@ // CHECK-NEXT: [[FROMBOOL13:%.*]] = zext i1 [[X13:%.*]] to i8 // CHECK-NEXT: [[FROMBOOL14:%.*]] = zext i1 [[X14:%.*]] to i8 // CHECK-NEXT: [[FROMBOOL15:%.*]] = zext i1 [[X15:%.*]] to i8 -// CHECK-NEXT: [[TMP0:%.*]] = insertelement <16 x i8> undef, i8 [[FROMBOOL]], i32 0 -// CHECK-NEXT: [[TMP1:%.*]] = insertelement <16 x i8> [[TMP0]], i8 [[FROMBOOL1]], i32 1 -// CHECK-NEXT: [[TMP2:%.*]] = insertelement <16 x i8> [[TMP1]], i8 [[FROMBOOL2]], i32 2 -// CHECK-NEXT: [[TMP3:%.*]] = insertelement <16 x i8> [[TMP2]], i8 [[FROMBOOL3]], i32 3 -// CHECK-NEXT: [[TMP4:%.*]] = insertelement <16 x i8> [[TMP3]], i8 [[FROMBOOL4]], i32 4 -// CHECK-NEXT: [[TMP5:%.*]] = insertelement <16 x i8> [[TMP4]], i8 [[FROMBOOL5]], i32 5 -// CHECK-NEXT: [[TMP6:%.*]] = insertelement <16 x i8> [[TMP5]], i8 [[FROMBOOL6]], i32 6 -// CHECK-NEXT: [[TMP7:%.*]] = insertelement <16 x i8> [[TMP6]], i8 [[FROMBOOL7]], i32 7 -// CHECK-NEXT: [[TMP8:%.*]] = insertelement <16 x i8> [[TMP7]], i8 [[FROMBOOL8]], i32 8 -// CHECK-NEXT: [[TMP9:%.*]] = insertelement <16 x i8> [[TMP8]], i8 [[FROMBOOL9]], i32 9 -// CHECK-NEXT: [[TMP10:%.*]] = insertelement <16 x i8> [[TMP9]], i8 [[FROMBOOL10]], i32 10 -// CHECK-NEXT: [[TMP11:%.*]] = insertelement <16 x i8> [[TMP10]], i8 [[FROMBOOL11]], i32 11 -// CHECK-NEXT: [[TMP12:%.*]] = insertelement <16 x i8> [[TMP11]], i8 [[FROMBOOL12]], i32 12 -// CHECK-NEXT: [[TMP13:%.*]] = insertelement <16 x i8> [[TMP12]], i8 [[FROMBOOL13]], i32 13 -// CHECK-NEXT: [[TMP14:%.*]] = insertelement <16 x i8> [[TMP13]], i8 [[FROMBOOL14]], i32 14 -// CHECK-NEXT: [[TMP15:%.*]] = insertelement <16 x i8> [[TMP14]], i8 [[FROMBOOL15]], i32 15 +// CHECK-NEXT: [[TMP0:%.*]] = insertelement <16 x i8> undef, i8 [[FROMBOOL]], i64 0 +// CHECK-NEXT: [[TMP1:%.*]] = insertelement <16 x i8> [[TMP0]], i8 [[FROMBOOL1]], i64 1 +// CHECK-NEXT: [[TMP2:%.*]] = insertelement <16 x i8> [[TMP1]], i8 [[FROMBOOL2]], i64 2 +// CHECK-NEXT: [[TMP3:%.*]] = insertelement <16 x i8> [[TMP2]], i8 [[FROMBOOL3]], i64 3 +// CHECK-NEXT: [[TMP4:%.*]] = insertelement <16 x i8> [[TMP3]], i8 [[FROMBOOL4]], i64 4 +// CHECK-NEXT: [[TMP5:%.*]] = insertelement <16 x i8> [[TMP4]], i8 [[FROMBOOL5]], i64 5 +// CHECK-NEXT: [[TMP6:%.*]] = insertelement <16 x i8> [[TMP5]], i8 [[FROMBOOL6]], i64 6 +// CHECK-NEXT: [[TMP7:%.*]] = insertelement <16 x i8> [[TMP6]], i8 [[FROMBOOL7]], i64 7 +// CHECK-NEXT: [[TMP8:%.*]] = insertelement <16 x i8> [[TMP7]], i8 [[FROMBOOL8]], i64 8 +// CHECK-NEXT: [[TMP9:%.*]] = insertelement <16 x i8> [[TMP8]], i8 [[FROMBOOL9]], i64 9 +// CHECK-NEXT: [[TMP10:%.*]] = insertelement <16 x i8> [[TMP9]], i8 [[FROMBOOL10]], i64 10 +// CHECK-NEXT: [[TMP11:%.*]] = insertelement <16 x i8> [[TMP10]], i8 [[FROMBOOL11]], i64 11 +// CHECK-NEXT: [[TMP12:%.*]] = insertelement <16 x i8> [[TMP11]], i8 [[FROMBOOL12]], i64 12 +// CHECK-NEXT: [[TMP13:%.*]] = insertelement <16 x i8> [[TMP12]], i8 [[FROMBOOL13]], i64 13 +// CHECK-NEXT: [[TMP14:%.*]] = insertelement <16 x i8> [[TMP13]], i8 [[FROMBOOL14]], i64 14 +// CHECK-NEXT: [[TMP15:%.*]] = insertelement <16 x i8> [[TMP14]], i8 [[FROMBOOL15]], i64 15 // CHECK-NEXT: [[TMP16:%.*]] = call @llvm.aarch64.sve.ptrue.nxv16i1(i32 31) // CHECK-NEXT: [[TMP17:%.*]] = call @llvm.experimental.vector.insert.nxv16i8.v16i8( undef, <16 x i8> [[TMP15]], i64 0) // CHECK-NEXT: [[TMP18:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv16i8( [[TMP17]], i64 0) @@ -589,22 +589,22 @@ // CPP-CHECK-NEXT: [[FROMBOOL13:%.*]] = zext i1 [[X13:%.*]] to i8 // CPP-CHECK-NEXT: [[FROMBOOL14:%.*]] = zext i1 [[X14:%.*]] to i8 // CPP-CHECK-NEXT: [[FROMBOOL15:%.*]] = zext i1 [[X15:%.*]] to i8 -// CPP-CHECK-NEXT: [[TMP0:%.*]] = insertelement <16 x i8> undef, i8 [[FROMBOOL]], i32 0 -// CPP-CHECK-NEXT: [[TMP1:%.*]] = insertelement <16 x i8> [[TMP0]], i8 [[FROMBOOL1]], i32 1 -// CPP-CHECK-NEXT: [[TMP2:%.*]] = insertelement <16 x i8> [[TMP1]], i8 [[FROMBOOL2]], i32 2 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = insertelement <16 x i8> [[TMP2]], i8 [[FROMBOOL3]], i32 3 -// CPP-CHECK-NEXT: [[TMP4:%.*]] = insertelement <16 x i8> [[TMP3]], i8 [[FROMBOOL4]], i32 4 -// CPP-CHECK-NEXT: [[TMP5:%.*]] = insertelement <16 x i8> [[TMP4]], i8 [[FROMBOOL5]], i32 5 -// CPP-CHECK-NEXT: [[TMP6:%.*]] = insertelement <16 x i8> [[TMP5]], i8 [[FROMBOOL6]], i32 6 -// CPP-CHECK-NEXT: [[TMP7:%.*]] = insertelement <16 x i8> [[TMP6]], i8 [[FROMBOOL7]], i32 7 -// CPP-CHECK-NEXT: [[TMP8:%.*]] = insertelement <16 x i8> [[TMP7]], i8 [[FROMBOOL8]], i32 8 -// CPP-CHECK-NEXT: [[TMP9:%.*]] = insertelement <16 x i8> [[TMP8]], i8 [[FROMBOOL9]], i32 9 -// CPP-CHECK-NEXT: [[TMP10:%.*]] = insertelement <16 x i8> [[TMP9]], i8 [[FROMBOOL10]], i32 10 -// CPP-CHECK-NEXT: [[TMP11:%.*]] = insertelement <16 x i8> [[TMP10]], i8 [[FROMBOOL11]], i32 11 -// CPP-CHECK-NEXT: [[TMP12:%.*]] = insertelement <16 x i8> [[TMP11]], i8 [[FROMBOOL12]], i32 12 -// CPP-CHECK-NEXT: [[TMP13:%.*]] = insertelement <16 x i8> [[TMP12]], i8 [[FROMBOOL13]], i32 13 -// CPP-CHECK-NEXT: [[TMP14:%.*]] = insertelement <16 x i8> [[TMP13]], i8 [[FROMBOOL14]], i32 14 -// CPP-CHECK-NEXT: [[TMP15:%.*]] = insertelement <16 x i8> [[TMP14]], i8 [[FROMBOOL15]], i32 15 +// CPP-CHECK-NEXT: [[TMP0:%.*]] = insertelement <16 x i8> undef, i8 [[FROMBOOL]], i64 0 +// CPP-CHECK-NEXT: [[TMP1:%.*]] = insertelement <16 x i8> [[TMP0]], i8 [[FROMBOOL1]], i64 1 +// CPP-CHECK-NEXT: [[TMP2:%.*]] = insertelement <16 x i8> [[TMP1]], i8 [[FROMBOOL2]], i64 2 +// CPP-CHECK-NEXT: [[TMP3:%.*]] = insertelement <16 x i8> [[TMP2]], i8 [[FROMBOOL3]], i64 3 +// CPP-CHECK-NEXT: [[TMP4:%.*]] = insertelement <16 x i8> [[TMP3]], i8 [[FROMBOOL4]], i64 4 +// CPP-CHECK-NEXT: [[TMP5:%.*]] = insertelement <16 x i8> [[TMP4]], i8 [[FROMBOOL5]], i64 5 +// CPP-CHECK-NEXT: [[TMP6:%.*]] = insertelement <16 x i8> [[TMP5]], i8 [[FROMBOOL6]], i64 6 +// CPP-CHECK-NEXT: [[TMP7:%.*]] = insertelement <16 x i8> [[TMP6]], i8 [[FROMBOOL7]], i64 7 +// CPP-CHECK-NEXT: [[TMP8:%.*]] = insertelement <16 x i8> [[TMP7]], i8 [[FROMBOOL8]], i64 8 +// CPP-CHECK-NEXT: [[TMP9:%.*]] = insertelement <16 x i8> [[TMP8]], i8 [[FROMBOOL9]], i64 9 +// CPP-CHECK-NEXT: [[TMP10:%.*]] = insertelement <16 x i8> [[TMP9]], i8 [[FROMBOOL10]], i64 10 +// CPP-CHECK-NEXT: [[TMP11:%.*]] = insertelement <16 x i8> [[TMP10]], i8 [[FROMBOOL11]], i64 11 +// CPP-CHECK-NEXT: [[TMP12:%.*]] = insertelement <16 x i8> [[TMP11]], i8 [[FROMBOOL12]], i64 12 +// CPP-CHECK-NEXT: [[TMP13:%.*]] = insertelement <16 x i8> [[TMP12]], i8 [[FROMBOOL13]], i64 13 +// CPP-CHECK-NEXT: [[TMP14:%.*]] = insertelement <16 x i8> [[TMP13]], i8 [[FROMBOOL14]], i64 14 +// CPP-CHECK-NEXT: [[TMP15:%.*]] = insertelement <16 x i8> [[TMP14]], i8 [[FROMBOOL15]], i64 15 // CPP-CHECK-NEXT: [[TMP16:%.*]] = call @llvm.aarch64.sve.ptrue.nxv16i1(i32 31) // CPP-CHECK-NEXT: [[TMP17:%.*]] = call @llvm.experimental.vector.insert.nxv16i8.v16i8( undef, <16 x i8> [[TMP15]], i64 0) // CPP-CHECK-NEXT: [[TMP18:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv16i8( [[TMP17]], i64 0) @@ -630,14 +630,14 @@ // CHECK-NEXT: [[TMP5:%.*]] = zext i1 [[X5:%.*]] to i16 // CHECK-NEXT: [[TMP6:%.*]] = zext i1 [[X6:%.*]] to i16 // CHECK-NEXT: [[TMP7:%.*]] = zext i1 [[X7:%.*]] to i16 -// CHECK-NEXT: [[TMP8:%.*]] = insertelement <8 x i16> undef, i16 [[TMP0]], i32 0 -// CHECK-NEXT: [[TMP9:%.*]] = insertelement <8 x i16> [[TMP8]], i16 [[TMP1]], i32 1 -// CHECK-NEXT: [[TMP10:%.*]] = insertelement <8 x i16> [[TMP9]], i16 [[TMP2]], i32 2 -// CHECK-NEXT: [[TMP11:%.*]] = insertelement <8 x i16> [[TMP10]], i16 [[TMP3]], i32 3 -// CHECK-NEXT: [[TMP12:%.*]] = insertelement <8 x i16> [[TMP11]], i16 [[TMP4]], i32 4 -// CHECK-NEXT: [[TMP13:%.*]] = insertelement <8 x i16> [[TMP12]], i16 [[TMP5]], i32 5 -// CHECK-NEXT: [[TMP14:%.*]] = insertelement <8 x i16> [[TMP13]], i16 [[TMP6]], i32 6 -// CHECK-NEXT: [[TMP15:%.*]] = insertelement <8 x i16> [[TMP14]], i16 [[TMP7]], i32 7 +// CHECK-NEXT: [[TMP8:%.*]] = insertelement <8 x i16> undef, i16 [[TMP0]], i64 0 +// CHECK-NEXT: [[TMP9:%.*]] = insertelement <8 x i16> [[TMP8]], i16 [[TMP1]], i64 1 +// CHECK-NEXT: [[TMP10:%.*]] = insertelement <8 x i16> [[TMP9]], i16 [[TMP2]], i64 2 +// CHECK-NEXT: [[TMP11:%.*]] = insertelement <8 x i16> [[TMP10]], i16 [[TMP3]], i64 3 +// CHECK-NEXT: [[TMP12:%.*]] = insertelement <8 x i16> [[TMP11]], i16 [[TMP4]], i64 4 +// CHECK-NEXT: [[TMP13:%.*]] = insertelement <8 x i16> [[TMP12]], i16 [[TMP5]], i64 5 +// CHECK-NEXT: [[TMP14:%.*]] = insertelement <8 x i16> [[TMP13]], i16 [[TMP6]], i64 6 +// CHECK-NEXT: [[TMP15:%.*]] = insertelement <8 x i16> [[TMP14]], i16 [[TMP7]], i64 7 // CHECK-NEXT: [[TMP16:%.*]] = call @llvm.aarch64.sve.ptrue.nxv8i1(i32 31) // CHECK-NEXT: [[TMP17:%.*]] = call @llvm.experimental.vector.insert.nxv8i16.v8i16( undef, <8 x i16> [[TMP15]], i64 0) // CHECK-NEXT: [[TMP18:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv8i16( [[TMP17]], i64 0) @@ -655,14 +655,14 @@ // CPP-CHECK-NEXT: [[TMP5:%.*]] = zext i1 [[X5:%.*]] to i16 // CPP-CHECK-NEXT: [[TMP6:%.*]] = zext i1 [[X6:%.*]] to i16 // CPP-CHECK-NEXT: [[TMP7:%.*]] = zext i1 [[X7:%.*]] to i16 -// CPP-CHECK-NEXT: [[TMP8:%.*]] = insertelement <8 x i16> undef, i16 [[TMP0]], i32 0 -// CPP-CHECK-NEXT: [[TMP9:%.*]] = insertelement <8 x i16> [[TMP8]], i16 [[TMP1]], i32 1 -// CPP-CHECK-NEXT: [[TMP10:%.*]] = insertelement <8 x i16> [[TMP9]], i16 [[TMP2]], i32 2 -// CPP-CHECK-NEXT: [[TMP11:%.*]] = insertelement <8 x i16> [[TMP10]], i16 [[TMP3]], i32 3 -// CPP-CHECK-NEXT: [[TMP12:%.*]] = insertelement <8 x i16> [[TMP11]], i16 [[TMP4]], i32 4 -// CPP-CHECK-NEXT: [[TMP13:%.*]] = insertelement <8 x i16> [[TMP12]], i16 [[TMP5]], i32 5 -// CPP-CHECK-NEXT: [[TMP14:%.*]] = insertelement <8 x i16> [[TMP13]], i16 [[TMP6]], i32 6 -// CPP-CHECK-NEXT: [[TMP15:%.*]] = insertelement <8 x i16> [[TMP14]], i16 [[TMP7]], i32 7 +// CPP-CHECK-NEXT: [[TMP8:%.*]] = insertelement <8 x i16> undef, i16 [[TMP0]], i64 0 +// CPP-CHECK-NEXT: [[TMP9:%.*]] = insertelement <8 x i16> [[TMP8]], i16 [[TMP1]], i64 1 +// CPP-CHECK-NEXT: [[TMP10:%.*]] = insertelement <8 x i16> [[TMP9]], i16 [[TMP2]], i64 2 +// CPP-CHECK-NEXT: [[TMP11:%.*]] = insertelement <8 x i16> [[TMP10]], i16 [[TMP3]], i64 3 +// CPP-CHECK-NEXT: [[TMP12:%.*]] = insertelement <8 x i16> [[TMP11]], i16 [[TMP4]], i64 4 +// CPP-CHECK-NEXT: [[TMP13:%.*]] = insertelement <8 x i16> [[TMP12]], i16 [[TMP5]], i64 5 +// CPP-CHECK-NEXT: [[TMP14:%.*]] = insertelement <8 x i16> [[TMP13]], i16 [[TMP6]], i64 6 +// CPP-CHECK-NEXT: [[TMP15:%.*]] = insertelement <8 x i16> [[TMP14]], i16 [[TMP7]], i64 7 // CPP-CHECK-NEXT: [[TMP16:%.*]] = call @llvm.aarch64.sve.ptrue.nxv8i1(i32 31) // CPP-CHECK-NEXT: [[TMP17:%.*]] = call @llvm.experimental.vector.insert.nxv8i16.v8i16( undef, <8 x i16> [[TMP15]], i64 0) // CPP-CHECK-NEXT: [[TMP18:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv8i16( [[TMP17]], i64 0) @@ -683,10 +683,10 @@ // CHECK-NEXT: [[TMP1:%.*]] = zext i1 [[X1:%.*]] to i32 // CHECK-NEXT: [[TMP2:%.*]] = zext i1 [[X2:%.*]] to i32 // CHECK-NEXT: [[TMP3:%.*]] = zext i1 [[X3:%.*]] to i32 -// CHECK-NEXT: [[TMP4:%.*]] = insertelement <4 x i32> undef, i32 [[TMP0]], i32 0 -// CHECK-NEXT: [[TMP5:%.*]] = insertelement <4 x i32> [[TMP4]], i32 [[TMP1]], i32 1 -// CHECK-NEXT: [[TMP6:%.*]] = insertelement <4 x i32> [[TMP5]], i32 [[TMP2]], i32 2 -// CHECK-NEXT: [[TMP7:%.*]] = insertelement <4 x i32> [[TMP6]], i32 [[TMP3]], i32 3 +// CHECK-NEXT: [[TMP4:%.*]] = insertelement <4 x i32> undef, i32 [[TMP0]], i64 0 +// CHECK-NEXT: [[TMP5:%.*]] = insertelement <4 x i32> [[TMP4]], i32 [[TMP1]], i64 1 +// CHECK-NEXT: [[TMP6:%.*]] = insertelement <4 x i32> [[TMP5]], i32 [[TMP2]], i64 2 +// CHECK-NEXT: [[TMP7:%.*]] = insertelement <4 x i32> [[TMP6]], i32 [[TMP3]], i64 3 // CHECK-NEXT: [[TMP8:%.*]] = call @llvm.aarch64.sve.ptrue.nxv4i1(i32 31) // CHECK-NEXT: [[TMP9:%.*]] = call @llvm.experimental.vector.insert.nxv4i32.v4i32( undef, <4 x i32> [[TMP7]], i64 0) // CHECK-NEXT: [[TMP10:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv4i32( [[TMP9]], i64 0) @@ -700,10 +700,10 @@ // CPP-CHECK-NEXT: [[TMP1:%.*]] = zext i1 [[X1:%.*]] to i32 // CPP-CHECK-NEXT: [[TMP2:%.*]] = zext i1 [[X2:%.*]] to i32 // CPP-CHECK-NEXT: [[TMP3:%.*]] = zext i1 [[X3:%.*]] to i32 -// CPP-CHECK-NEXT: [[TMP4:%.*]] = insertelement <4 x i32> undef, i32 [[TMP0]], i32 0 -// CPP-CHECK-NEXT: [[TMP5:%.*]] = insertelement <4 x i32> [[TMP4]], i32 [[TMP1]], i32 1 -// CPP-CHECK-NEXT: [[TMP6:%.*]] = insertelement <4 x i32> [[TMP5]], i32 [[TMP2]], i32 2 -// CPP-CHECK-NEXT: [[TMP7:%.*]] = insertelement <4 x i32> [[TMP6]], i32 [[TMP3]], i32 3 +// CPP-CHECK-NEXT: [[TMP4:%.*]] = insertelement <4 x i32> undef, i32 [[TMP0]], i64 0 +// CPP-CHECK-NEXT: [[TMP5:%.*]] = insertelement <4 x i32> [[TMP4]], i32 [[TMP1]], i64 1 +// CPP-CHECK-NEXT: [[TMP6:%.*]] = insertelement <4 x i32> [[TMP5]], i32 [[TMP2]], i64 2 +// CPP-CHECK-NEXT: [[TMP7:%.*]] = insertelement <4 x i32> [[TMP6]], i32 [[TMP3]], i64 3 // CPP-CHECK-NEXT: [[TMP8:%.*]] = call @llvm.aarch64.sve.ptrue.nxv4i1(i32 31) // CPP-CHECK-NEXT: [[TMP9:%.*]] = call @llvm.experimental.vector.insert.nxv4i32.v4i32( undef, <4 x i32> [[TMP7]], i64 0) // CPP-CHECK-NEXT: [[TMP10:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv4i32( [[TMP9]], i64 0) @@ -721,8 +721,8 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = zext i1 [[X0:%.*]] to i64 // CHECK-NEXT: [[TMP1:%.*]] = zext i1 [[X1:%.*]] to i64 -// CHECK-NEXT: [[TMP2:%.*]] = insertelement <2 x i64> undef, i64 [[TMP0]], i32 0 -// CHECK-NEXT: [[TMP3:%.*]] = insertelement <2 x i64> [[TMP2]], i64 [[TMP1]], i32 1 +// CHECK-NEXT: [[TMP2:%.*]] = insertelement <2 x i64> undef, i64 [[TMP0]], i64 0 +// CHECK-NEXT: [[TMP3:%.*]] = insertelement <2 x i64> [[TMP2]], i64 [[TMP1]], i64 1 // CHECK-NEXT: [[TMP4:%.*]] = call @llvm.aarch64.sve.ptrue.nxv2i1(i32 31) // CHECK-NEXT: [[TMP5:%.*]] = call @llvm.experimental.vector.insert.nxv2i64.v2i64( undef, <2 x i64> [[TMP3]], i64 0) // CHECK-NEXT: [[TMP6:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv2i64( [[TMP5]], i64 0) @@ -734,8 +734,8 @@ // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = zext i1 [[X0:%.*]] to i64 // CPP-CHECK-NEXT: [[TMP1:%.*]] = zext i1 [[X1:%.*]] to i64 -// CPP-CHECK-NEXT: [[TMP2:%.*]] = insertelement <2 x i64> undef, i64 [[TMP0]], i32 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = insertelement <2 x i64> [[TMP2]], i64 [[TMP1]], i32 1 +// CPP-CHECK-NEXT: [[TMP2:%.*]] = insertelement <2 x i64> undef, i64 [[TMP0]], i64 0 +// CPP-CHECK-NEXT: [[TMP3:%.*]] = insertelement <2 x i64> [[TMP2]], i64 [[TMP1]], i64 1 // CPP-CHECK-NEXT: [[TMP4:%.*]] = call @llvm.aarch64.sve.ptrue.nxv2i1(i32 31) // CPP-CHECK-NEXT: [[TMP5:%.*]] = call @llvm.experimental.vector.insert.nxv2i64.v2i64( undef, <2 x i64> [[TMP3]], i64 0) // CPP-CHECK-NEXT: [[TMP6:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv2i64( [[TMP5]], i64 0) diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_eor.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_eor.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_eor.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_eor.c @@ -428,7 +428,7 @@ // CHECK-LABEL: @test_sveor_n_s8_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.eor.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) @@ -436,7 +436,7 @@ // // CPP-CHECK-LABEL: @_Z17test_sveor_n_s8_zu10__SVBool_tu10__SVInt8_ta( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.eor.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) @@ -450,7 +450,7 @@ // CHECK-LABEL: @test_sveor_n_s16_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.eor.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -459,7 +459,7 @@ // CPP-CHECK-LABEL: @_Z18test_sveor_n_s16_zu10__SVBool_tu11__SVInt16_ts( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.eor.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -473,7 +473,7 @@ // CHECK-LABEL: @test_sveor_n_s32_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.eor.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -482,7 +482,7 @@ // CPP-CHECK-LABEL: @_Z18test_sveor_n_s32_zu10__SVBool_tu11__SVInt32_ti( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.eor.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -496,7 +496,7 @@ // CHECK-LABEL: @test_sveor_n_s64_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.eor.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -505,7 +505,7 @@ // CPP-CHECK-LABEL: @_Z18test_sveor_n_s64_zu10__SVBool_tu11__SVInt64_tl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.eor.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -518,7 +518,7 @@ // CHECK-LABEL: @test_sveor_n_u8_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.eor.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) @@ -526,7 +526,7 @@ // // CPP-CHECK-LABEL: @_Z17test_sveor_n_u8_zu10__SVBool_tu11__SVUint8_th( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.eor.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) @@ -540,7 +540,7 @@ // CHECK-LABEL: @test_sveor_n_u16_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.eor.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -549,7 +549,7 @@ // CPP-CHECK-LABEL: @_Z18test_sveor_n_u16_zu10__SVBool_tu12__SVUint16_tt( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.eor.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -563,7 +563,7 @@ // CHECK-LABEL: @test_sveor_n_u32_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.eor.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -572,7 +572,7 @@ // CPP-CHECK-LABEL: @_Z18test_sveor_n_u32_zu10__SVBool_tu12__SVUint32_tj( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.eor.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -586,7 +586,7 @@ // CHECK-LABEL: @test_sveor_n_u64_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.eor.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -595,7 +595,7 @@ // CPP-CHECK-LABEL: @_Z18test_sveor_n_u64_zu10__SVBool_tu12__SVUint64_tm( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.eor.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -608,14 +608,14 @@ // CHECK-LABEL: @test_sveor_n_s8_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eor.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_sveor_n_s8_mu10__SVBool_tu10__SVInt8_ta( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eor.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -628,7 +628,7 @@ // CHECK-LABEL: @test_sveor_n_s16_m( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.eor.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -636,7 +636,7 @@ // CPP-CHECK-LABEL: @_Z18test_sveor_n_s16_mu10__SVBool_tu11__SVInt16_ts( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.eor.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -649,7 +649,7 @@ // CHECK-LABEL: @test_sveor_n_s32_m( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.eor.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -657,7 +657,7 @@ // CPP-CHECK-LABEL: @_Z18test_sveor_n_s32_mu10__SVBool_tu11__SVInt32_ti( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.eor.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -670,7 +670,7 @@ // CHECK-LABEL: @test_sveor_n_s64_m( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.eor.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -678,7 +678,7 @@ // CPP-CHECK-LABEL: @_Z18test_sveor_n_s64_mu10__SVBool_tu11__SVInt64_tl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.eor.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -690,14 +690,14 @@ // CHECK-LABEL: @test_sveor_n_u8_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eor.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_sveor_n_u8_mu10__SVBool_tu11__SVUint8_th( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eor.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -710,7 +710,7 @@ // CHECK-LABEL: @test_sveor_n_u16_m( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.eor.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -718,7 +718,7 @@ // CPP-CHECK-LABEL: @_Z18test_sveor_n_u16_mu10__SVBool_tu12__SVUint16_tt( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.eor.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -731,7 +731,7 @@ // CHECK-LABEL: @test_sveor_n_u32_m( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.eor.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -739,7 +739,7 @@ // CPP-CHECK-LABEL: @_Z18test_sveor_n_u32_mu10__SVBool_tu12__SVUint32_tj( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.eor.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -752,7 +752,7 @@ // CHECK-LABEL: @test_sveor_n_u64_m( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.eor.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -760,7 +760,7 @@ // CPP-CHECK-LABEL: @_Z18test_sveor_n_u64_mu10__SVBool_tu12__SVUint64_tm( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.eor.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -772,14 +772,14 @@ // CHECK-LABEL: @test_sveor_n_s8_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eor.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_sveor_n_s8_xu10__SVBool_tu10__SVInt8_ta( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eor.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -792,7 +792,7 @@ // CHECK-LABEL: @test_sveor_n_s16_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.eor.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -800,7 +800,7 @@ // CPP-CHECK-LABEL: @_Z18test_sveor_n_s16_xu10__SVBool_tu11__SVInt16_ts( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.eor.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -813,7 +813,7 @@ // CHECK-LABEL: @test_sveor_n_s32_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.eor.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -821,7 +821,7 @@ // CPP-CHECK-LABEL: @_Z18test_sveor_n_s32_xu10__SVBool_tu11__SVInt32_ti( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.eor.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -834,7 +834,7 @@ // CHECK-LABEL: @test_sveor_n_s64_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.eor.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -842,7 +842,7 @@ // CPP-CHECK-LABEL: @_Z18test_sveor_n_s64_xu10__SVBool_tu11__SVInt64_tl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.eor.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -854,14 +854,14 @@ // CHECK-LABEL: @test_sveor_n_u8_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eor.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_sveor_n_u8_xu10__SVBool_tu11__SVUint8_th( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eor.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -874,7 +874,7 @@ // CHECK-LABEL: @test_sveor_n_u16_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.eor.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -882,7 +882,7 @@ // CPP-CHECK-LABEL: @_Z18test_sveor_n_u16_xu10__SVBool_tu12__SVUint16_tt( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.eor.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -895,7 +895,7 @@ // CHECK-LABEL: @test_sveor_n_u32_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.eor.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -903,7 +903,7 @@ // CPP-CHECK-LABEL: @_Z18test_sveor_n_u32_xu10__SVBool_tu12__SVUint32_tj( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.eor.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -916,7 +916,7 @@ // CHECK-LABEL: @test_sveor_n_u64_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.eor.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -924,7 +924,7 @@ // CPP-CHECK-LABEL: @_Z18test_sveor_n_u64_xu10__SVBool_tu12__SVUint64_tm( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.eor.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_lsl.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_lsl.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_lsl.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_lsl.c @@ -734,14 +734,14 @@ // CHECK-LABEL: @test_svlsl_wide_n_s8_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsl.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z22test_svlsl_wide_n_s8_mu10__SVBool_tu10__SVInt8_tm( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsl.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -754,7 +754,7 @@ // CHECK-LABEL: @test_svlsl_wide_n_s16_m( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.lsl.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -762,7 +762,7 @@ // CPP-CHECK-LABEL: @_Z23test_svlsl_wide_n_s16_mu10__SVBool_tu11__SVInt16_tm( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.lsl.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -775,7 +775,7 @@ // CHECK-LABEL: @test_svlsl_wide_n_s32_m( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.lsl.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -783,7 +783,7 @@ // CPP-CHECK-LABEL: @_Z23test_svlsl_wide_n_s32_mu10__SVBool_tu11__SVInt32_tm( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.lsl.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -795,7 +795,7 @@ // CHECK-LABEL: @test_svlsl_wide_n_s8_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.lsl.wide.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) @@ -803,7 +803,7 @@ // // CPP-CHECK-LABEL: @_Z22test_svlsl_wide_n_s8_zu10__SVBool_tu10__SVInt8_tm( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.lsl.wide.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) @@ -817,7 +817,7 @@ // CHECK-LABEL: @test_svlsl_wide_n_s16_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.lsl.wide.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -826,7 +826,7 @@ // CPP-CHECK-LABEL: @_Z23test_svlsl_wide_n_s16_zu10__SVBool_tu11__SVInt16_tm( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.lsl.wide.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -840,7 +840,7 @@ // CHECK-LABEL: @test_svlsl_wide_n_s32_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.lsl.wide.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -849,7 +849,7 @@ // CPP-CHECK-LABEL: @_Z23test_svlsl_wide_n_s32_zu10__SVBool_tu11__SVInt32_tm( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.lsl.wide.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -862,14 +862,14 @@ // CHECK-LABEL: @test_svlsl_wide_n_s8_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsl.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z22test_svlsl_wide_n_s8_xu10__SVBool_tu10__SVInt8_tm( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsl.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -882,7 +882,7 @@ // CHECK-LABEL: @test_svlsl_wide_n_s16_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.lsl.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -890,7 +890,7 @@ // CPP-CHECK-LABEL: @_Z23test_svlsl_wide_n_s16_xu10__SVBool_tu11__SVInt16_tm( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.lsl.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -903,7 +903,7 @@ // CHECK-LABEL: @test_svlsl_wide_n_s32_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.lsl.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -911,7 +911,7 @@ // CPP-CHECK-LABEL: @_Z23test_svlsl_wide_n_s32_xu10__SVBool_tu11__SVInt32_tm( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.lsl.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_lsr.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_lsr.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_lsr.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_lsr.c @@ -375,14 +375,14 @@ // CHECK-LABEL: @test_svlsr_wide_n_u8_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsr.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z22test_svlsr_wide_n_u8_mu10__SVBool_tu11__SVUint8_tm( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsr.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -395,7 +395,7 @@ // CHECK-LABEL: @test_svlsr_wide_n_u16_m( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.lsr.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -403,7 +403,7 @@ // CPP-CHECK-LABEL: @_Z23test_svlsr_wide_n_u16_mu10__SVBool_tu12__SVUint16_tm( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.lsr.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -416,7 +416,7 @@ // CHECK-LABEL: @test_svlsr_wide_n_u32_m( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.lsr.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -424,7 +424,7 @@ // CPP-CHECK-LABEL: @_Z23test_svlsr_wide_n_u32_mu10__SVBool_tu12__SVUint32_tm( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.lsr.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -436,7 +436,7 @@ // CHECK-LABEL: @test_svlsr_wide_n_u8_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.lsr.wide.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) @@ -444,7 +444,7 @@ // // CPP-CHECK-LABEL: @_Z22test_svlsr_wide_n_u8_zu10__SVBool_tu11__SVUint8_tm( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.lsr.wide.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) @@ -458,7 +458,7 @@ // CHECK-LABEL: @test_svlsr_wide_n_u16_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.lsr.wide.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -467,7 +467,7 @@ // CPP-CHECK-LABEL: @_Z23test_svlsr_wide_n_u16_zu10__SVBool_tu12__SVUint16_tm( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.lsr.wide.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -481,7 +481,7 @@ // CHECK-LABEL: @test_svlsr_wide_n_u32_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.lsr.wide.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -490,7 +490,7 @@ // CPP-CHECK-LABEL: @_Z23test_svlsr_wide_n_u32_zu10__SVBool_tu12__SVUint32_tm( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.lsr.wide.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -503,14 +503,14 @@ // CHECK-LABEL: @test_svlsr_wide_n_u8_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsr.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z22test_svlsr_wide_n_u8_xu10__SVBool_tu11__SVUint8_tm( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsr.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -523,7 +523,7 @@ // CHECK-LABEL: @test_svlsr_wide_n_u16_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.lsr.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -531,7 +531,7 @@ // CPP-CHECK-LABEL: @_Z23test_svlsr_wide_n_u16_xu10__SVBool_tu12__SVUint16_tm( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.lsr.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -544,7 +544,7 @@ // CHECK-LABEL: @test_svlsr_wide_n_u32_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.lsr.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -552,7 +552,7 @@ // CPP-CHECK-LABEL: @_Z23test_svlsr_wide_n_u32_xu10__SVBool_tu12__SVUint32_tm( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.lsr.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_mad.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_mad.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_mad.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_mad.c @@ -428,7 +428,7 @@ // CHECK-LABEL: @test_svmad_n_s8_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mad.nxv16i8( [[PG]], [[TMP1]], [[OP2:%.*]], [[TMP0]]) @@ -436,7 +436,7 @@ // // CPP-CHECK-LABEL: @_Z17test_svmad_n_s8_zu10__SVBool_tu10__SVInt8_tu10__SVInt8_ta( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mad.nxv16i8( [[PG]], [[TMP1]], [[OP2:%.*]], [[TMP0]]) @@ -450,7 +450,7 @@ // CHECK-LABEL: @test_svmad_n_s16_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.mad.nxv8i16( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) @@ -459,7 +459,7 @@ // CPP-CHECK-LABEL: @_Z18test_svmad_n_s16_zu10__SVBool_tu11__SVInt16_tu11__SVInt16_ts( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.mad.nxv8i16( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) @@ -473,7 +473,7 @@ // CHECK-LABEL: @test_svmad_n_s32_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.mad.nxv4i32( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) @@ -482,7 +482,7 @@ // CPP-CHECK-LABEL: @_Z18test_svmad_n_s32_zu10__SVBool_tu11__SVInt32_tu11__SVInt32_ti( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.mad.nxv4i32( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) @@ -496,7 +496,7 @@ // CHECK-LABEL: @test_svmad_n_s64_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.mad.nxv2i64( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) @@ -505,7 +505,7 @@ // CPP-CHECK-LABEL: @_Z18test_svmad_n_s64_zu10__SVBool_tu11__SVInt64_tu11__SVInt64_tl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.mad.nxv2i64( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) @@ -518,7 +518,7 @@ // CHECK-LABEL: @test_svmad_n_u8_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mad.nxv16i8( [[PG]], [[TMP1]], [[OP2:%.*]], [[TMP0]]) @@ -526,7 +526,7 @@ // // CPP-CHECK-LABEL: @_Z17test_svmad_n_u8_zu10__SVBool_tu11__SVUint8_tu11__SVUint8_th( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mad.nxv16i8( [[PG]], [[TMP1]], [[OP2:%.*]], [[TMP0]]) @@ -540,7 +540,7 @@ // CHECK-LABEL: @test_svmad_n_u16_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.mad.nxv8i16( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) @@ -549,7 +549,7 @@ // CPP-CHECK-LABEL: @_Z18test_svmad_n_u16_zu10__SVBool_tu12__SVUint16_tu12__SVUint16_tt( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.mad.nxv8i16( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) @@ -563,7 +563,7 @@ // CHECK-LABEL: @test_svmad_n_u32_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.mad.nxv4i32( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) @@ -572,7 +572,7 @@ // CPP-CHECK-LABEL: @_Z18test_svmad_n_u32_zu10__SVBool_tu12__SVUint32_tu12__SVUint32_tj( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.mad.nxv4i32( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) @@ -586,7 +586,7 @@ // CHECK-LABEL: @test_svmad_n_u64_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.mad.nxv2i64( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) @@ -595,7 +595,7 @@ // CPP-CHECK-LABEL: @_Z18test_svmad_n_u64_zu10__SVBool_tu12__SVUint64_tu12__SVUint64_tm( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.mad.nxv2i64( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) @@ -608,14 +608,14 @@ // CHECK-LABEL: @test_svmad_n_s8_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mad.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svmad_n_s8_mu10__SVBool_tu10__SVInt8_tu10__SVInt8_ta( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mad.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -628,7 +628,7 @@ // CHECK-LABEL: @test_svmad_n_s16_m( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mad.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -636,7 +636,7 @@ // CPP-CHECK-LABEL: @_Z18test_svmad_n_s16_mu10__SVBool_tu11__SVInt16_tu11__SVInt16_ts( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mad.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -649,7 +649,7 @@ // CHECK-LABEL: @test_svmad_n_s32_m( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mad.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -657,7 +657,7 @@ // CPP-CHECK-LABEL: @_Z18test_svmad_n_s32_mu10__SVBool_tu11__SVInt32_tu11__SVInt32_ti( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mad.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -670,7 +670,7 @@ // CHECK-LABEL: @test_svmad_n_s64_m( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mad.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -678,7 +678,7 @@ // CPP-CHECK-LABEL: @_Z18test_svmad_n_s64_mu10__SVBool_tu11__SVInt64_tu11__SVInt64_tl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mad.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -690,14 +690,14 @@ // CHECK-LABEL: @test_svmad_n_u8_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mad.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svmad_n_u8_mu10__SVBool_tu11__SVUint8_tu11__SVUint8_th( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mad.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -710,7 +710,7 @@ // CHECK-LABEL: @test_svmad_n_u16_m( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mad.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -718,7 +718,7 @@ // CPP-CHECK-LABEL: @_Z18test_svmad_n_u16_mu10__SVBool_tu12__SVUint16_tu12__SVUint16_tt( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mad.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -731,7 +731,7 @@ // CHECK-LABEL: @test_svmad_n_u32_m( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mad.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -739,7 +739,7 @@ // CPP-CHECK-LABEL: @_Z18test_svmad_n_u32_mu10__SVBool_tu12__SVUint32_tu12__SVUint32_tj( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mad.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -752,7 +752,7 @@ // CHECK-LABEL: @test_svmad_n_u64_m( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mad.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -760,7 +760,7 @@ // CPP-CHECK-LABEL: @_Z18test_svmad_n_u64_mu10__SVBool_tu12__SVUint64_tu12__SVUint64_tm( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mad.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -772,14 +772,14 @@ // CHECK-LABEL: @test_svmad_n_s8_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mad.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svmad_n_s8_xu10__SVBool_tu10__SVInt8_tu10__SVInt8_ta( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mad.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -792,7 +792,7 @@ // CHECK-LABEL: @test_svmad_n_s16_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mad.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -800,7 +800,7 @@ // CPP-CHECK-LABEL: @_Z18test_svmad_n_s16_xu10__SVBool_tu11__SVInt16_tu11__SVInt16_ts( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mad.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -813,7 +813,7 @@ // CHECK-LABEL: @test_svmad_n_s32_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mad.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -821,7 +821,7 @@ // CPP-CHECK-LABEL: @_Z18test_svmad_n_s32_xu10__SVBool_tu11__SVInt32_tu11__SVInt32_ti( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mad.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -834,7 +834,7 @@ // CHECK-LABEL: @test_svmad_n_s64_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mad.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -842,7 +842,7 @@ // CPP-CHECK-LABEL: @_Z18test_svmad_n_s64_xu10__SVBool_tu11__SVInt64_tu11__SVInt64_tl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mad.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -854,14 +854,14 @@ // CHECK-LABEL: @test_svmad_n_u8_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mad.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svmad_n_u8_xu10__SVBool_tu11__SVUint8_tu11__SVUint8_th( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mad.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -874,7 +874,7 @@ // CHECK-LABEL: @test_svmad_n_u16_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mad.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -882,7 +882,7 @@ // CPP-CHECK-LABEL: @_Z18test_svmad_n_u16_xu10__SVBool_tu12__SVUint16_tu12__SVUint16_tt( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mad.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -895,7 +895,7 @@ // CHECK-LABEL: @test_svmad_n_u32_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mad.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -903,7 +903,7 @@ // CPP-CHECK-LABEL: @_Z18test_svmad_n_u32_xu10__SVBool_tu12__SVUint32_tu12__SVUint32_tj( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mad.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -916,7 +916,7 @@ // CHECK-LABEL: @test_svmad_n_u64_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mad.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -924,7 +924,7 @@ // CPP-CHECK-LABEL: @_Z18test_svmad_n_u64_xu10__SVBool_tu12__SVUint64_tu12__SVUint64_tm( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mad.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -1096,7 +1096,7 @@ // CHECK-LABEL: @test_svmad_n_f16_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fmad.nxv8f16( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) @@ -1105,7 +1105,7 @@ // CPP-CHECK-LABEL: @_Z18test_svmad_n_f16_zu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_tDh( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fmad.nxv8f16( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) @@ -1119,7 +1119,7 @@ // CHECK-LABEL: @test_svmad_n_f32_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fmad.nxv4f32( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) @@ -1128,7 +1128,7 @@ // CPP-CHECK-LABEL: @_Z18test_svmad_n_f32_zu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_tf( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fmad.nxv4f32( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) @@ -1142,7 +1142,7 @@ // CHECK-LABEL: @test_svmad_n_f64_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fmad.nxv2f64( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) @@ -1151,7 +1151,7 @@ // CPP-CHECK-LABEL: @_Z18test_svmad_n_f64_zu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_td( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fmad.nxv2f64( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) @@ -1165,7 +1165,7 @@ // CHECK-LABEL: @test_svmad_n_f16_m( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmad.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -1173,7 +1173,7 @@ // CPP-CHECK-LABEL: @_Z18test_svmad_n_f16_mu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_tDh( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmad.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -1186,7 +1186,7 @@ // CHECK-LABEL: @test_svmad_n_f32_m( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmad.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -1194,7 +1194,7 @@ // CPP-CHECK-LABEL: @_Z18test_svmad_n_f32_mu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_tf( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmad.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -1207,7 +1207,7 @@ // CHECK-LABEL: @test_svmad_n_f64_m( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmad.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -1215,7 +1215,7 @@ // CPP-CHECK-LABEL: @_Z18test_svmad_n_f64_mu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_td( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmad.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -1228,7 +1228,7 @@ // CHECK-LABEL: @test_svmad_n_f16_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmad.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -1236,7 +1236,7 @@ // CPP-CHECK-LABEL: @_Z18test_svmad_n_f16_xu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_tDh( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmad.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -1249,7 +1249,7 @@ // CHECK-LABEL: @test_svmad_n_f32_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmad.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -1257,7 +1257,7 @@ // CPP-CHECK-LABEL: @_Z18test_svmad_n_f32_xu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_tf( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmad.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -1270,7 +1270,7 @@ // CHECK-LABEL: @test_svmad_n_f64_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmad.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -1278,7 +1278,7 @@ // CPP-CHECK-LABEL: @_Z18test_svmad_n_f64_xu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_td( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmad.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_max.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_max.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_max.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_max.c @@ -428,7 +428,7 @@ // CHECK-LABEL: @test_svmax_n_s8_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smax.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) @@ -436,7 +436,7 @@ // // CPP-CHECK-LABEL: @_Z17test_svmax_n_s8_zu10__SVBool_tu10__SVInt8_ta( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smax.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) @@ -450,7 +450,7 @@ // CHECK-LABEL: @test_svmax_n_s16_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.smax.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -459,7 +459,7 @@ // CPP-CHECK-LABEL: @_Z18test_svmax_n_s16_zu10__SVBool_tu11__SVInt16_ts( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.smax.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -473,7 +473,7 @@ // CHECK-LABEL: @test_svmax_n_s32_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.smax.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -482,7 +482,7 @@ // CPP-CHECK-LABEL: @_Z18test_svmax_n_s32_zu10__SVBool_tu11__SVInt32_ti( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.smax.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -496,7 +496,7 @@ // CHECK-LABEL: @test_svmax_n_s64_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.smax.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -505,7 +505,7 @@ // CPP-CHECK-LABEL: @_Z18test_svmax_n_s64_zu10__SVBool_tu11__SVInt64_tl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.smax.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -518,7 +518,7 @@ // CHECK-LABEL: @test_svmax_n_u8_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umax.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) @@ -526,7 +526,7 @@ // // CPP-CHECK-LABEL: @_Z17test_svmax_n_u8_zu10__SVBool_tu11__SVUint8_th( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umax.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) @@ -540,7 +540,7 @@ // CHECK-LABEL: @test_svmax_n_u16_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.umax.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -549,7 +549,7 @@ // CPP-CHECK-LABEL: @_Z18test_svmax_n_u16_zu10__SVBool_tu12__SVUint16_tt( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.umax.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -563,7 +563,7 @@ // CHECK-LABEL: @test_svmax_n_u32_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.umax.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -572,7 +572,7 @@ // CPP-CHECK-LABEL: @_Z18test_svmax_n_u32_zu10__SVBool_tu12__SVUint32_tj( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.umax.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -586,7 +586,7 @@ // CHECK-LABEL: @test_svmax_n_u64_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.umax.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -595,7 +595,7 @@ // CPP-CHECK-LABEL: @_Z18test_svmax_n_u64_zu10__SVBool_tu12__SVUint64_tm( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.umax.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -608,14 +608,14 @@ // CHECK-LABEL: @test_svmax_n_s8_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smax.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svmax_n_s8_mu10__SVBool_tu10__SVInt8_ta( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smax.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -628,7 +628,7 @@ // CHECK-LABEL: @test_svmax_n_s16_m( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smax.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -636,7 +636,7 @@ // CPP-CHECK-LABEL: @_Z18test_svmax_n_s16_mu10__SVBool_tu11__SVInt16_ts( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smax.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -649,7 +649,7 @@ // CHECK-LABEL: @test_svmax_n_s32_m( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smax.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -657,7 +657,7 @@ // CPP-CHECK-LABEL: @_Z18test_svmax_n_s32_mu10__SVBool_tu11__SVInt32_ti( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smax.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -670,7 +670,7 @@ // CHECK-LABEL: @test_svmax_n_s64_m( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smax.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -678,7 +678,7 @@ // CPP-CHECK-LABEL: @_Z18test_svmax_n_s64_mu10__SVBool_tu11__SVInt64_tl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smax.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -690,14 +690,14 @@ // CHECK-LABEL: @test_svmax_n_u8_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umax.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svmax_n_u8_mu10__SVBool_tu11__SVUint8_th( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umax.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -710,7 +710,7 @@ // CHECK-LABEL: @test_svmax_n_u16_m( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umax.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -718,7 +718,7 @@ // CPP-CHECK-LABEL: @_Z18test_svmax_n_u16_mu10__SVBool_tu12__SVUint16_tt( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umax.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -731,7 +731,7 @@ // CHECK-LABEL: @test_svmax_n_u32_m( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umax.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -739,7 +739,7 @@ // CPP-CHECK-LABEL: @_Z18test_svmax_n_u32_mu10__SVBool_tu12__SVUint32_tj( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umax.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -752,7 +752,7 @@ // CHECK-LABEL: @test_svmax_n_u64_m( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umax.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -760,7 +760,7 @@ // CPP-CHECK-LABEL: @_Z18test_svmax_n_u64_mu10__SVBool_tu12__SVUint64_tm( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umax.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -772,14 +772,14 @@ // CHECK-LABEL: @test_svmax_n_s8_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smax.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svmax_n_s8_xu10__SVBool_tu10__SVInt8_ta( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smax.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -792,7 +792,7 @@ // CHECK-LABEL: @test_svmax_n_s16_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smax.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -800,7 +800,7 @@ // CPP-CHECK-LABEL: @_Z18test_svmax_n_s16_xu10__SVBool_tu11__SVInt16_ts( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smax.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -813,7 +813,7 @@ // CHECK-LABEL: @test_svmax_n_s32_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smax.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -821,7 +821,7 @@ // CPP-CHECK-LABEL: @_Z18test_svmax_n_s32_xu10__SVBool_tu11__SVInt32_ti( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smax.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -834,7 +834,7 @@ // CHECK-LABEL: @test_svmax_n_s64_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smax.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -842,7 +842,7 @@ // CPP-CHECK-LABEL: @_Z18test_svmax_n_s64_xu10__SVBool_tu11__SVInt64_tl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smax.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -854,14 +854,14 @@ // CHECK-LABEL: @test_svmax_n_u8_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umax.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svmax_n_u8_xu10__SVBool_tu11__SVUint8_th( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umax.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -874,7 +874,7 @@ // CHECK-LABEL: @test_svmax_n_u16_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umax.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -882,7 +882,7 @@ // CPP-CHECK-LABEL: @_Z18test_svmax_n_u16_xu10__SVBool_tu12__SVUint16_tt( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umax.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -895,7 +895,7 @@ // CHECK-LABEL: @test_svmax_n_u32_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umax.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -903,7 +903,7 @@ // CPP-CHECK-LABEL: @_Z18test_svmax_n_u32_xu10__SVBool_tu12__SVUint32_tj( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umax.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -916,7 +916,7 @@ // CHECK-LABEL: @test_svmax_n_u64_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umax.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -924,7 +924,7 @@ // CPP-CHECK-LABEL: @_Z18test_svmax_n_u64_xu10__SVBool_tu12__SVUint64_tm( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umax.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -1096,7 +1096,7 @@ // CHECK-LABEL: @test_svmax_n_f16_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fmax.nxv8f16( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -1105,7 +1105,7 @@ // CPP-CHECK-LABEL: @_Z18test_svmax_n_f16_zu10__SVBool_tu13__SVFloat16_tDh( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fmax.nxv8f16( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -1119,7 +1119,7 @@ // CHECK-LABEL: @test_svmax_n_f32_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fmax.nxv4f32( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -1128,7 +1128,7 @@ // CPP-CHECK-LABEL: @_Z18test_svmax_n_f32_zu10__SVBool_tu13__SVFloat32_tf( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fmax.nxv4f32( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -1142,7 +1142,7 @@ // CHECK-LABEL: @test_svmax_n_f64_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fmax.nxv2f64( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -1151,7 +1151,7 @@ // CPP-CHECK-LABEL: @_Z18test_svmax_n_f64_zu10__SVBool_tu13__SVFloat64_td( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fmax.nxv2f64( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -1165,7 +1165,7 @@ // CHECK-LABEL: @test_svmax_n_f16_m( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmax.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -1173,7 +1173,7 @@ // CPP-CHECK-LABEL: @_Z18test_svmax_n_f16_mu10__SVBool_tu13__SVFloat16_tDh( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmax.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -1186,7 +1186,7 @@ // CHECK-LABEL: @test_svmax_n_f32_m( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmax.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -1194,7 +1194,7 @@ // CPP-CHECK-LABEL: @_Z18test_svmax_n_f32_mu10__SVBool_tu13__SVFloat32_tf( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmax.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -1207,7 +1207,7 @@ // CHECK-LABEL: @test_svmax_n_f64_m( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmax.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -1215,7 +1215,7 @@ // CPP-CHECK-LABEL: @_Z18test_svmax_n_f64_mu10__SVBool_tu13__SVFloat64_td( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmax.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -1228,7 +1228,7 @@ // CHECK-LABEL: @test_svmax_n_f16_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmax.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -1236,7 +1236,7 @@ // CPP-CHECK-LABEL: @_Z18test_svmax_n_f16_xu10__SVBool_tu13__SVFloat16_tDh( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmax.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -1249,7 +1249,7 @@ // CHECK-LABEL: @test_svmax_n_f32_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmax.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -1257,7 +1257,7 @@ // CPP-CHECK-LABEL: @_Z18test_svmax_n_f32_xu10__SVBool_tu13__SVFloat32_tf( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmax.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -1270,7 +1270,7 @@ // CHECK-LABEL: @test_svmax_n_f64_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmax.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -1278,7 +1278,7 @@ // CPP-CHECK-LABEL: @_Z18test_svmax_n_f64_xu10__SVBool_tu13__SVFloat64_td( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmax.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_maxnm.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_maxnm.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_maxnm.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_maxnm.c @@ -176,7 +176,7 @@ // CHECK-LABEL: @test_svmaxnm_n_f16_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fmaxnm.nxv8f16( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -185,7 +185,7 @@ // CPP-CHECK-LABEL: @_Z20test_svmaxnm_n_f16_zu10__SVBool_tu13__SVFloat16_tDh( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fmaxnm.nxv8f16( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -199,7 +199,7 @@ // CHECK-LABEL: @test_svmaxnm_n_f32_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fmaxnm.nxv4f32( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -208,7 +208,7 @@ // CPP-CHECK-LABEL: @_Z20test_svmaxnm_n_f32_zu10__SVBool_tu13__SVFloat32_tf( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fmaxnm.nxv4f32( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -222,7 +222,7 @@ // CHECK-LABEL: @test_svmaxnm_n_f64_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fmaxnm.nxv2f64( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -231,7 +231,7 @@ // CPP-CHECK-LABEL: @_Z20test_svmaxnm_n_f64_zu10__SVBool_tu13__SVFloat64_td( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fmaxnm.nxv2f64( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -245,7 +245,7 @@ // CHECK-LABEL: @test_svmaxnm_n_f16_m( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmaxnm.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -253,7 +253,7 @@ // CPP-CHECK-LABEL: @_Z20test_svmaxnm_n_f16_mu10__SVBool_tu13__SVFloat16_tDh( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmaxnm.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -266,7 +266,7 @@ // CHECK-LABEL: @test_svmaxnm_n_f32_m( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmaxnm.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -274,7 +274,7 @@ // CPP-CHECK-LABEL: @_Z20test_svmaxnm_n_f32_mu10__SVBool_tu13__SVFloat32_tf( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmaxnm.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -287,7 +287,7 @@ // CHECK-LABEL: @test_svmaxnm_n_f64_m( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmaxnm.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -295,7 +295,7 @@ // CPP-CHECK-LABEL: @_Z20test_svmaxnm_n_f64_mu10__SVBool_tu13__SVFloat64_td( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmaxnm.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -308,7 +308,7 @@ // CHECK-LABEL: @test_svmaxnm_n_f16_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmaxnm.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -316,7 +316,7 @@ // CPP-CHECK-LABEL: @_Z20test_svmaxnm_n_f16_xu10__SVBool_tu13__SVFloat16_tDh( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmaxnm.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -329,7 +329,7 @@ // CHECK-LABEL: @test_svmaxnm_n_f32_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmaxnm.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -337,7 +337,7 @@ // CPP-CHECK-LABEL: @_Z20test_svmaxnm_n_f32_xu10__SVBool_tu13__SVFloat32_tf( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmaxnm.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -350,7 +350,7 @@ // CHECK-LABEL: @test_svmaxnm_n_f64_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmaxnm.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -358,7 +358,7 @@ // CPP-CHECK-LABEL: @_Z20test_svmaxnm_n_f64_xu10__SVBool_tu13__SVFloat64_td( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmaxnm.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_min.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_min.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_min.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_min.c @@ -428,7 +428,7 @@ // CHECK-LABEL: @test_svmin_n_s8_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smin.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) @@ -436,7 +436,7 @@ // // CPP-CHECK-LABEL: @_Z17test_svmin_n_s8_zu10__SVBool_tu10__SVInt8_ta( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smin.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) @@ -450,7 +450,7 @@ // CHECK-LABEL: @test_svmin_n_s16_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.smin.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -459,7 +459,7 @@ // CPP-CHECK-LABEL: @_Z18test_svmin_n_s16_zu10__SVBool_tu11__SVInt16_ts( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.smin.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -473,7 +473,7 @@ // CHECK-LABEL: @test_svmin_n_s32_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.smin.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -482,7 +482,7 @@ // CPP-CHECK-LABEL: @_Z18test_svmin_n_s32_zu10__SVBool_tu11__SVInt32_ti( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.smin.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -496,7 +496,7 @@ // CHECK-LABEL: @test_svmin_n_s64_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.smin.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -505,7 +505,7 @@ // CPP-CHECK-LABEL: @_Z18test_svmin_n_s64_zu10__SVBool_tu11__SVInt64_tl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.smin.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -518,7 +518,7 @@ // CHECK-LABEL: @test_svmin_n_u8_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umin.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) @@ -526,7 +526,7 @@ // // CPP-CHECK-LABEL: @_Z17test_svmin_n_u8_zu10__SVBool_tu11__SVUint8_th( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umin.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) @@ -540,7 +540,7 @@ // CHECK-LABEL: @test_svmin_n_u16_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.umin.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -549,7 +549,7 @@ // CPP-CHECK-LABEL: @_Z18test_svmin_n_u16_zu10__SVBool_tu12__SVUint16_tt( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.umin.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -563,7 +563,7 @@ // CHECK-LABEL: @test_svmin_n_u32_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.umin.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -572,7 +572,7 @@ // CPP-CHECK-LABEL: @_Z18test_svmin_n_u32_zu10__SVBool_tu12__SVUint32_tj( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.umin.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -586,7 +586,7 @@ // CHECK-LABEL: @test_svmin_n_u64_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.umin.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -595,7 +595,7 @@ // CPP-CHECK-LABEL: @_Z18test_svmin_n_u64_zu10__SVBool_tu12__SVUint64_tm( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.umin.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -608,14 +608,14 @@ // CHECK-LABEL: @test_svmin_n_s8_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smin.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svmin_n_s8_mu10__SVBool_tu10__SVInt8_ta( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smin.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -628,7 +628,7 @@ // CHECK-LABEL: @test_svmin_n_s16_m( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smin.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -636,7 +636,7 @@ // CPP-CHECK-LABEL: @_Z18test_svmin_n_s16_mu10__SVBool_tu11__SVInt16_ts( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smin.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -649,7 +649,7 @@ // CHECK-LABEL: @test_svmin_n_s32_m( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smin.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -657,7 +657,7 @@ // CPP-CHECK-LABEL: @_Z18test_svmin_n_s32_mu10__SVBool_tu11__SVInt32_ti( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smin.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -670,7 +670,7 @@ // CHECK-LABEL: @test_svmin_n_s64_m( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smin.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -678,7 +678,7 @@ // CPP-CHECK-LABEL: @_Z18test_svmin_n_s64_mu10__SVBool_tu11__SVInt64_tl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smin.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -690,14 +690,14 @@ // CHECK-LABEL: @test_svmin_n_u8_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umin.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svmin_n_u8_mu10__SVBool_tu11__SVUint8_th( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umin.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -710,7 +710,7 @@ // CHECK-LABEL: @test_svmin_n_u16_m( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umin.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -718,7 +718,7 @@ // CPP-CHECK-LABEL: @_Z18test_svmin_n_u16_mu10__SVBool_tu12__SVUint16_tt( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umin.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -731,7 +731,7 @@ // CHECK-LABEL: @test_svmin_n_u32_m( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umin.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -739,7 +739,7 @@ // CPP-CHECK-LABEL: @_Z18test_svmin_n_u32_mu10__SVBool_tu12__SVUint32_tj( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umin.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -752,7 +752,7 @@ // CHECK-LABEL: @test_svmin_n_u64_m( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umin.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -760,7 +760,7 @@ // CPP-CHECK-LABEL: @_Z18test_svmin_n_u64_mu10__SVBool_tu12__SVUint64_tm( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umin.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -772,14 +772,14 @@ // CHECK-LABEL: @test_svmin_n_s8_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smin.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svmin_n_s8_xu10__SVBool_tu10__SVInt8_ta( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smin.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -792,7 +792,7 @@ // CHECK-LABEL: @test_svmin_n_s16_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smin.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -800,7 +800,7 @@ // CPP-CHECK-LABEL: @_Z18test_svmin_n_s16_xu10__SVBool_tu11__SVInt16_ts( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smin.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -813,7 +813,7 @@ // CHECK-LABEL: @test_svmin_n_s32_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smin.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -821,7 +821,7 @@ // CPP-CHECK-LABEL: @_Z18test_svmin_n_s32_xu10__SVBool_tu11__SVInt32_ti( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smin.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -834,7 +834,7 @@ // CHECK-LABEL: @test_svmin_n_s64_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smin.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -842,7 +842,7 @@ // CPP-CHECK-LABEL: @_Z18test_svmin_n_s64_xu10__SVBool_tu11__SVInt64_tl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smin.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -854,14 +854,14 @@ // CHECK-LABEL: @test_svmin_n_u8_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umin.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svmin_n_u8_xu10__SVBool_tu11__SVUint8_th( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umin.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -874,7 +874,7 @@ // CHECK-LABEL: @test_svmin_n_u16_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umin.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -882,7 +882,7 @@ // CPP-CHECK-LABEL: @_Z18test_svmin_n_u16_xu10__SVBool_tu12__SVUint16_tt( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umin.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -895,7 +895,7 @@ // CHECK-LABEL: @test_svmin_n_u32_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umin.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -903,7 +903,7 @@ // CPP-CHECK-LABEL: @_Z18test_svmin_n_u32_xu10__SVBool_tu12__SVUint32_tj( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umin.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -916,7 +916,7 @@ // CHECK-LABEL: @test_svmin_n_u64_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umin.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -924,7 +924,7 @@ // CPP-CHECK-LABEL: @_Z18test_svmin_n_u64_xu10__SVBool_tu12__SVUint64_tm( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umin.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -1096,7 +1096,7 @@ // CHECK-LABEL: @test_svmin_n_f16_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fmin.nxv8f16( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -1105,7 +1105,7 @@ // CPP-CHECK-LABEL: @_Z18test_svmin_n_f16_zu10__SVBool_tu13__SVFloat16_tDh( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fmin.nxv8f16( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -1119,7 +1119,7 @@ // CHECK-LABEL: @test_svmin_n_f32_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fmin.nxv4f32( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -1128,7 +1128,7 @@ // CPP-CHECK-LABEL: @_Z18test_svmin_n_f32_zu10__SVBool_tu13__SVFloat32_tf( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fmin.nxv4f32( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -1142,7 +1142,7 @@ // CHECK-LABEL: @test_svmin_n_f64_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fmin.nxv2f64( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -1151,7 +1151,7 @@ // CPP-CHECK-LABEL: @_Z18test_svmin_n_f64_zu10__SVBool_tu13__SVFloat64_td( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fmin.nxv2f64( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -1165,7 +1165,7 @@ // CHECK-LABEL: @test_svmin_n_f16_m( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmin.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -1173,7 +1173,7 @@ // CPP-CHECK-LABEL: @_Z18test_svmin_n_f16_mu10__SVBool_tu13__SVFloat16_tDh( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmin.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -1186,7 +1186,7 @@ // CHECK-LABEL: @test_svmin_n_f32_m( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmin.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -1194,7 +1194,7 @@ // CPP-CHECK-LABEL: @_Z18test_svmin_n_f32_mu10__SVBool_tu13__SVFloat32_tf( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmin.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -1207,7 +1207,7 @@ // CHECK-LABEL: @test_svmin_n_f64_m( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmin.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -1215,7 +1215,7 @@ // CPP-CHECK-LABEL: @_Z18test_svmin_n_f64_mu10__SVBool_tu13__SVFloat64_td( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmin.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -1228,7 +1228,7 @@ // CHECK-LABEL: @test_svmin_n_f16_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmin.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -1236,7 +1236,7 @@ // CPP-CHECK-LABEL: @_Z18test_svmin_n_f16_xu10__SVBool_tu13__SVFloat16_tDh( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmin.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -1249,7 +1249,7 @@ // CHECK-LABEL: @test_svmin_n_f32_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmin.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -1257,7 +1257,7 @@ // CPP-CHECK-LABEL: @_Z18test_svmin_n_f32_xu10__SVBool_tu13__SVFloat32_tf( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmin.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -1270,7 +1270,7 @@ // CHECK-LABEL: @test_svmin_n_f64_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmin.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -1278,7 +1278,7 @@ // CPP-CHECK-LABEL: @_Z18test_svmin_n_f64_xu10__SVBool_tu13__SVFloat64_td( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmin.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_minnm.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_minnm.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_minnm.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_minnm.c @@ -176,7 +176,7 @@ // CHECK-LABEL: @test_svminnm_n_f16_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fminnm.nxv8f16( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -185,7 +185,7 @@ // CPP-CHECK-LABEL: @_Z20test_svminnm_n_f16_zu10__SVBool_tu13__SVFloat16_tDh( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fminnm.nxv8f16( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -199,7 +199,7 @@ // CHECK-LABEL: @test_svminnm_n_f32_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fminnm.nxv4f32( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -208,7 +208,7 @@ // CPP-CHECK-LABEL: @_Z20test_svminnm_n_f32_zu10__SVBool_tu13__SVFloat32_tf( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fminnm.nxv4f32( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -222,7 +222,7 @@ // CHECK-LABEL: @test_svminnm_n_f64_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fminnm.nxv2f64( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -231,7 +231,7 @@ // CPP-CHECK-LABEL: @_Z20test_svminnm_n_f64_zu10__SVBool_tu13__SVFloat64_td( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fminnm.nxv2f64( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -245,7 +245,7 @@ // CHECK-LABEL: @test_svminnm_n_f16_m( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fminnm.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -253,7 +253,7 @@ // CPP-CHECK-LABEL: @_Z20test_svminnm_n_f16_mu10__SVBool_tu13__SVFloat16_tDh( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fminnm.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -266,7 +266,7 @@ // CHECK-LABEL: @test_svminnm_n_f32_m( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fminnm.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -274,7 +274,7 @@ // CPP-CHECK-LABEL: @_Z20test_svminnm_n_f32_mu10__SVBool_tu13__SVFloat32_tf( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fminnm.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -287,7 +287,7 @@ // CHECK-LABEL: @test_svminnm_n_f64_m( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fminnm.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -295,7 +295,7 @@ // CPP-CHECK-LABEL: @_Z20test_svminnm_n_f64_mu10__SVBool_tu13__SVFloat64_td( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fminnm.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -308,7 +308,7 @@ // CHECK-LABEL: @test_svminnm_n_f16_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fminnm.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -316,7 +316,7 @@ // CPP-CHECK-LABEL: @_Z20test_svminnm_n_f16_xu10__SVBool_tu13__SVFloat16_tDh( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fminnm.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -329,7 +329,7 @@ // CHECK-LABEL: @test_svminnm_n_f32_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fminnm.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -337,7 +337,7 @@ // CPP-CHECK-LABEL: @_Z20test_svminnm_n_f32_xu10__SVBool_tu13__SVFloat32_tf( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fminnm.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -350,7 +350,7 @@ // CHECK-LABEL: @test_svminnm_n_f64_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fminnm.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -358,7 +358,7 @@ // CPP-CHECK-LABEL: @_Z20test_svminnm_n_f64_xu10__SVBool_tu13__SVFloat64_td( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fminnm.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_mla.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_mla.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_mla.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_mla.c @@ -428,7 +428,7 @@ // CHECK-LABEL: @test_svmla_n_s8_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mla.nxv16i8( [[PG]], [[TMP1]], [[OP2:%.*]], [[TMP0]]) @@ -436,7 +436,7 @@ // // CPP-CHECK-LABEL: @_Z17test_svmla_n_s8_zu10__SVBool_tu10__SVInt8_tu10__SVInt8_ta( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mla.nxv16i8( [[PG]], [[TMP1]], [[OP2:%.*]], [[TMP0]]) @@ -450,7 +450,7 @@ // CHECK-LABEL: @test_svmla_n_s16_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.mla.nxv8i16( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) @@ -459,7 +459,7 @@ // CPP-CHECK-LABEL: @_Z18test_svmla_n_s16_zu10__SVBool_tu11__SVInt16_tu11__SVInt16_ts( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.mla.nxv8i16( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) @@ -473,7 +473,7 @@ // CHECK-LABEL: @test_svmla_n_s32_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.mla.nxv4i32( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) @@ -482,7 +482,7 @@ // CPP-CHECK-LABEL: @_Z18test_svmla_n_s32_zu10__SVBool_tu11__SVInt32_tu11__SVInt32_ti( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.mla.nxv4i32( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) @@ -496,7 +496,7 @@ // CHECK-LABEL: @test_svmla_n_s64_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.mla.nxv2i64( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) @@ -505,7 +505,7 @@ // CPP-CHECK-LABEL: @_Z18test_svmla_n_s64_zu10__SVBool_tu11__SVInt64_tu11__SVInt64_tl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.mla.nxv2i64( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) @@ -518,7 +518,7 @@ // CHECK-LABEL: @test_svmla_n_u8_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mla.nxv16i8( [[PG]], [[TMP1]], [[OP2:%.*]], [[TMP0]]) @@ -526,7 +526,7 @@ // // CPP-CHECK-LABEL: @_Z17test_svmla_n_u8_zu10__SVBool_tu11__SVUint8_tu11__SVUint8_th( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mla.nxv16i8( [[PG]], [[TMP1]], [[OP2:%.*]], [[TMP0]]) @@ -540,7 +540,7 @@ // CHECK-LABEL: @test_svmla_n_u16_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.mla.nxv8i16( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) @@ -549,7 +549,7 @@ // CPP-CHECK-LABEL: @_Z18test_svmla_n_u16_zu10__SVBool_tu12__SVUint16_tu12__SVUint16_tt( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.mla.nxv8i16( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) @@ -563,7 +563,7 @@ // CHECK-LABEL: @test_svmla_n_u32_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.mla.nxv4i32( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) @@ -572,7 +572,7 @@ // CPP-CHECK-LABEL: @_Z18test_svmla_n_u32_zu10__SVBool_tu12__SVUint32_tu12__SVUint32_tj( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.mla.nxv4i32( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) @@ -586,7 +586,7 @@ // CHECK-LABEL: @test_svmla_n_u64_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.mla.nxv2i64( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) @@ -595,7 +595,7 @@ // CPP-CHECK-LABEL: @_Z18test_svmla_n_u64_zu10__SVBool_tu12__SVUint64_tu12__SVUint64_tm( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.mla.nxv2i64( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) @@ -608,14 +608,14 @@ // CHECK-LABEL: @test_svmla_n_s8_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mla.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svmla_n_s8_mu10__SVBool_tu10__SVInt8_tu10__SVInt8_ta( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mla.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -628,7 +628,7 @@ // CHECK-LABEL: @test_svmla_n_s16_m( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mla.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -636,7 +636,7 @@ // CPP-CHECK-LABEL: @_Z18test_svmla_n_s16_mu10__SVBool_tu11__SVInt16_tu11__SVInt16_ts( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mla.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -649,7 +649,7 @@ // CHECK-LABEL: @test_svmla_n_s32_m( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mla.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -657,7 +657,7 @@ // CPP-CHECK-LABEL: @_Z18test_svmla_n_s32_mu10__SVBool_tu11__SVInt32_tu11__SVInt32_ti( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mla.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -670,7 +670,7 @@ // CHECK-LABEL: @test_svmla_n_s64_m( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mla.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -678,7 +678,7 @@ // CPP-CHECK-LABEL: @_Z18test_svmla_n_s64_mu10__SVBool_tu11__SVInt64_tu11__SVInt64_tl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mla.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -690,14 +690,14 @@ // CHECK-LABEL: @test_svmla_n_u8_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mla.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svmla_n_u8_mu10__SVBool_tu11__SVUint8_tu11__SVUint8_th( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mla.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -710,7 +710,7 @@ // CHECK-LABEL: @test_svmla_n_u16_m( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mla.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -718,7 +718,7 @@ // CPP-CHECK-LABEL: @_Z18test_svmla_n_u16_mu10__SVBool_tu12__SVUint16_tu12__SVUint16_tt( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mla.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -731,7 +731,7 @@ // CHECK-LABEL: @test_svmla_n_u32_m( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mla.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -739,7 +739,7 @@ // CPP-CHECK-LABEL: @_Z18test_svmla_n_u32_mu10__SVBool_tu12__SVUint32_tu12__SVUint32_tj( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mla.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -752,7 +752,7 @@ // CHECK-LABEL: @test_svmla_n_u64_m( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mla.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -760,7 +760,7 @@ // CPP-CHECK-LABEL: @_Z18test_svmla_n_u64_mu10__SVBool_tu12__SVUint64_tu12__SVUint64_tm( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mla.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -772,14 +772,14 @@ // CHECK-LABEL: @test_svmla_n_s8_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mla.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svmla_n_s8_xu10__SVBool_tu10__SVInt8_tu10__SVInt8_ta( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mla.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -792,7 +792,7 @@ // CHECK-LABEL: @test_svmla_n_s16_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mla.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -800,7 +800,7 @@ // CPP-CHECK-LABEL: @_Z18test_svmla_n_s16_xu10__SVBool_tu11__SVInt16_tu11__SVInt16_ts( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mla.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -813,7 +813,7 @@ // CHECK-LABEL: @test_svmla_n_s32_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mla.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -821,7 +821,7 @@ // CPP-CHECK-LABEL: @_Z18test_svmla_n_s32_xu10__SVBool_tu11__SVInt32_tu11__SVInt32_ti( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mla.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -834,7 +834,7 @@ // CHECK-LABEL: @test_svmla_n_s64_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mla.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -842,7 +842,7 @@ // CPP-CHECK-LABEL: @_Z18test_svmla_n_s64_xu10__SVBool_tu11__SVInt64_tu11__SVInt64_tl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mla.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -854,14 +854,14 @@ // CHECK-LABEL: @test_svmla_n_u8_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mla.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svmla_n_u8_xu10__SVBool_tu11__SVUint8_tu11__SVUint8_th( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mla.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -874,7 +874,7 @@ // CHECK-LABEL: @test_svmla_n_u16_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mla.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -882,7 +882,7 @@ // CPP-CHECK-LABEL: @_Z18test_svmla_n_u16_xu10__SVBool_tu12__SVUint16_tu12__SVUint16_tt( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mla.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -895,7 +895,7 @@ // CHECK-LABEL: @test_svmla_n_u32_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mla.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -903,7 +903,7 @@ // CPP-CHECK-LABEL: @_Z18test_svmla_n_u32_xu10__SVBool_tu12__SVUint32_tu12__SVUint32_tj( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mla.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -916,7 +916,7 @@ // CHECK-LABEL: @test_svmla_n_u64_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mla.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -924,7 +924,7 @@ // CPP-CHECK-LABEL: @_Z18test_svmla_n_u64_xu10__SVBool_tu12__SVUint64_tu12__SVUint64_tm( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mla.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -1096,7 +1096,7 @@ // CHECK-LABEL: @test_svmla_n_f16_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fmla.nxv8f16( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) @@ -1105,7 +1105,7 @@ // CPP-CHECK-LABEL: @_Z18test_svmla_n_f16_zu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_tDh( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fmla.nxv8f16( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) @@ -1119,7 +1119,7 @@ // CHECK-LABEL: @test_svmla_n_f32_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fmla.nxv4f32( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) @@ -1128,7 +1128,7 @@ // CPP-CHECK-LABEL: @_Z18test_svmla_n_f32_zu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_tf( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fmla.nxv4f32( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) @@ -1142,7 +1142,7 @@ // CHECK-LABEL: @test_svmla_n_f64_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fmla.nxv2f64( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) @@ -1151,7 +1151,7 @@ // CPP-CHECK-LABEL: @_Z18test_svmla_n_f64_zu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_td( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fmla.nxv2f64( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) @@ -1165,7 +1165,7 @@ // CHECK-LABEL: @test_svmla_n_f16_m( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmla.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -1173,7 +1173,7 @@ // CPP-CHECK-LABEL: @_Z18test_svmla_n_f16_mu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_tDh( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmla.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -1186,7 +1186,7 @@ // CHECK-LABEL: @test_svmla_n_f32_m( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmla.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -1194,7 +1194,7 @@ // CPP-CHECK-LABEL: @_Z18test_svmla_n_f32_mu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_tf( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmla.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -1207,7 +1207,7 @@ // CHECK-LABEL: @test_svmla_n_f64_m( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmla.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -1215,7 +1215,7 @@ // CPP-CHECK-LABEL: @_Z18test_svmla_n_f64_mu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_td( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmla.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -1228,7 +1228,7 @@ // CHECK-LABEL: @test_svmla_n_f16_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmla.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -1236,7 +1236,7 @@ // CPP-CHECK-LABEL: @_Z18test_svmla_n_f16_xu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_tDh( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmla.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -1249,7 +1249,7 @@ // CHECK-LABEL: @test_svmla_n_f32_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmla.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -1257,7 +1257,7 @@ // CPP-CHECK-LABEL: @_Z18test_svmla_n_f32_xu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_tf( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmla.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -1270,7 +1270,7 @@ // CHECK-LABEL: @test_svmla_n_f64_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmla.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -1278,7 +1278,7 @@ // CPP-CHECK-LABEL: @_Z18test_svmla_n_f64_xu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_td( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmla.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_mls.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_mls.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_mls.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_mls.c @@ -428,7 +428,7 @@ // CHECK-LABEL: @test_svmls_n_s8_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mls.nxv16i8( [[PG]], [[TMP1]], [[OP2:%.*]], [[TMP0]]) @@ -436,7 +436,7 @@ // // CPP-CHECK-LABEL: @_Z17test_svmls_n_s8_zu10__SVBool_tu10__SVInt8_tu10__SVInt8_ta( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mls.nxv16i8( [[PG]], [[TMP1]], [[OP2:%.*]], [[TMP0]]) @@ -450,7 +450,7 @@ // CHECK-LABEL: @test_svmls_n_s16_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.mls.nxv8i16( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) @@ -459,7 +459,7 @@ // CPP-CHECK-LABEL: @_Z18test_svmls_n_s16_zu10__SVBool_tu11__SVInt16_tu11__SVInt16_ts( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.mls.nxv8i16( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) @@ -473,7 +473,7 @@ // CHECK-LABEL: @test_svmls_n_s32_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.mls.nxv4i32( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) @@ -482,7 +482,7 @@ // CPP-CHECK-LABEL: @_Z18test_svmls_n_s32_zu10__SVBool_tu11__SVInt32_tu11__SVInt32_ti( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.mls.nxv4i32( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) @@ -496,7 +496,7 @@ // CHECK-LABEL: @test_svmls_n_s64_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.mls.nxv2i64( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) @@ -505,7 +505,7 @@ // CPP-CHECK-LABEL: @_Z18test_svmls_n_s64_zu10__SVBool_tu11__SVInt64_tu11__SVInt64_tl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.mls.nxv2i64( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) @@ -518,7 +518,7 @@ // CHECK-LABEL: @test_svmls_n_u8_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mls.nxv16i8( [[PG]], [[TMP1]], [[OP2:%.*]], [[TMP0]]) @@ -526,7 +526,7 @@ // // CPP-CHECK-LABEL: @_Z17test_svmls_n_u8_zu10__SVBool_tu11__SVUint8_tu11__SVUint8_th( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mls.nxv16i8( [[PG]], [[TMP1]], [[OP2:%.*]], [[TMP0]]) @@ -540,7 +540,7 @@ // CHECK-LABEL: @test_svmls_n_u16_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.mls.nxv8i16( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) @@ -549,7 +549,7 @@ // CPP-CHECK-LABEL: @_Z18test_svmls_n_u16_zu10__SVBool_tu12__SVUint16_tu12__SVUint16_tt( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.mls.nxv8i16( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) @@ -563,7 +563,7 @@ // CHECK-LABEL: @test_svmls_n_u32_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.mls.nxv4i32( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) @@ -572,7 +572,7 @@ // CPP-CHECK-LABEL: @_Z18test_svmls_n_u32_zu10__SVBool_tu12__SVUint32_tu12__SVUint32_tj( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.mls.nxv4i32( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) @@ -586,7 +586,7 @@ // CHECK-LABEL: @test_svmls_n_u64_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.mls.nxv2i64( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) @@ -595,7 +595,7 @@ // CPP-CHECK-LABEL: @_Z18test_svmls_n_u64_zu10__SVBool_tu12__SVUint64_tu12__SVUint64_tm( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.mls.nxv2i64( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) @@ -608,14 +608,14 @@ // CHECK-LABEL: @test_svmls_n_s8_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mls.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svmls_n_s8_mu10__SVBool_tu10__SVInt8_tu10__SVInt8_ta( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mls.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -628,7 +628,7 @@ // CHECK-LABEL: @test_svmls_n_s16_m( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mls.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -636,7 +636,7 @@ // CPP-CHECK-LABEL: @_Z18test_svmls_n_s16_mu10__SVBool_tu11__SVInt16_tu11__SVInt16_ts( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mls.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -649,7 +649,7 @@ // CHECK-LABEL: @test_svmls_n_s32_m( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mls.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -657,7 +657,7 @@ // CPP-CHECK-LABEL: @_Z18test_svmls_n_s32_mu10__SVBool_tu11__SVInt32_tu11__SVInt32_ti( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mls.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -670,7 +670,7 @@ // CHECK-LABEL: @test_svmls_n_s64_m( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mls.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -678,7 +678,7 @@ // CPP-CHECK-LABEL: @_Z18test_svmls_n_s64_mu10__SVBool_tu11__SVInt64_tu11__SVInt64_tl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mls.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -690,14 +690,14 @@ // CHECK-LABEL: @test_svmls_n_u8_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mls.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svmls_n_u8_mu10__SVBool_tu11__SVUint8_tu11__SVUint8_th( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mls.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -710,7 +710,7 @@ // CHECK-LABEL: @test_svmls_n_u16_m( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mls.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -718,7 +718,7 @@ // CPP-CHECK-LABEL: @_Z18test_svmls_n_u16_mu10__SVBool_tu12__SVUint16_tu12__SVUint16_tt( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mls.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -731,7 +731,7 @@ // CHECK-LABEL: @test_svmls_n_u32_m( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mls.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -739,7 +739,7 @@ // CPP-CHECK-LABEL: @_Z18test_svmls_n_u32_mu10__SVBool_tu12__SVUint32_tu12__SVUint32_tj( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mls.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -752,7 +752,7 @@ // CHECK-LABEL: @test_svmls_n_u64_m( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mls.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -760,7 +760,7 @@ // CPP-CHECK-LABEL: @_Z18test_svmls_n_u64_mu10__SVBool_tu12__SVUint64_tu12__SVUint64_tm( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mls.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -772,14 +772,14 @@ // CHECK-LABEL: @test_svmls_n_s8_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mls.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svmls_n_s8_xu10__SVBool_tu10__SVInt8_tu10__SVInt8_ta( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mls.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -792,7 +792,7 @@ // CHECK-LABEL: @test_svmls_n_s16_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mls.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -800,7 +800,7 @@ // CPP-CHECK-LABEL: @_Z18test_svmls_n_s16_xu10__SVBool_tu11__SVInt16_tu11__SVInt16_ts( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mls.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -813,7 +813,7 @@ // CHECK-LABEL: @test_svmls_n_s32_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mls.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -821,7 +821,7 @@ // CPP-CHECK-LABEL: @_Z18test_svmls_n_s32_xu10__SVBool_tu11__SVInt32_tu11__SVInt32_ti( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mls.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -834,7 +834,7 @@ // CHECK-LABEL: @test_svmls_n_s64_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mls.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -842,7 +842,7 @@ // CPP-CHECK-LABEL: @_Z18test_svmls_n_s64_xu10__SVBool_tu11__SVInt64_tu11__SVInt64_tl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mls.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -854,14 +854,14 @@ // CHECK-LABEL: @test_svmls_n_u8_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mls.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svmls_n_u8_xu10__SVBool_tu11__SVUint8_tu11__SVUint8_th( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mls.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -874,7 +874,7 @@ // CHECK-LABEL: @test_svmls_n_u16_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mls.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -882,7 +882,7 @@ // CPP-CHECK-LABEL: @_Z18test_svmls_n_u16_xu10__SVBool_tu12__SVUint16_tu12__SVUint16_tt( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mls.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -895,7 +895,7 @@ // CHECK-LABEL: @test_svmls_n_u32_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mls.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -903,7 +903,7 @@ // CPP-CHECK-LABEL: @_Z18test_svmls_n_u32_xu10__SVBool_tu12__SVUint32_tu12__SVUint32_tj( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mls.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -916,7 +916,7 @@ // CHECK-LABEL: @test_svmls_n_u64_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mls.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -924,7 +924,7 @@ // CPP-CHECK-LABEL: @_Z18test_svmls_n_u64_xu10__SVBool_tu12__SVUint64_tu12__SVUint64_tm( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mls.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -1096,7 +1096,7 @@ // CHECK-LABEL: @test_svmls_n_f16_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fmls.nxv8f16( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) @@ -1105,7 +1105,7 @@ // CPP-CHECK-LABEL: @_Z18test_svmls_n_f16_zu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_tDh( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fmls.nxv8f16( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) @@ -1119,7 +1119,7 @@ // CHECK-LABEL: @test_svmls_n_f32_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fmls.nxv4f32( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) @@ -1128,7 +1128,7 @@ // CPP-CHECK-LABEL: @_Z18test_svmls_n_f32_zu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_tf( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fmls.nxv4f32( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) @@ -1142,7 +1142,7 @@ // CHECK-LABEL: @test_svmls_n_f64_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fmls.nxv2f64( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) @@ -1151,7 +1151,7 @@ // CPP-CHECK-LABEL: @_Z18test_svmls_n_f64_zu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_td( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fmls.nxv2f64( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) @@ -1165,7 +1165,7 @@ // CHECK-LABEL: @test_svmls_n_f16_m( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmls.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -1173,7 +1173,7 @@ // CPP-CHECK-LABEL: @_Z18test_svmls_n_f16_mu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_tDh( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmls.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -1186,7 +1186,7 @@ // CHECK-LABEL: @test_svmls_n_f32_m( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmls.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -1194,7 +1194,7 @@ // CPP-CHECK-LABEL: @_Z18test_svmls_n_f32_mu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_tf( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmls.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -1207,7 +1207,7 @@ // CHECK-LABEL: @test_svmls_n_f64_m( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmls.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -1215,7 +1215,7 @@ // CPP-CHECK-LABEL: @_Z18test_svmls_n_f64_mu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_td( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmls.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -1228,7 +1228,7 @@ // CHECK-LABEL: @test_svmls_n_f16_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmls.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -1236,7 +1236,7 @@ // CPP-CHECK-LABEL: @_Z18test_svmls_n_f16_xu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_tDh( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmls.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -1249,7 +1249,7 @@ // CHECK-LABEL: @test_svmls_n_f32_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmls.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -1257,7 +1257,7 @@ // CPP-CHECK-LABEL: @_Z18test_svmls_n_f32_xu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_tf( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmls.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -1270,7 +1270,7 @@ // CHECK-LABEL: @test_svmls_n_f64_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmls.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -1278,7 +1278,7 @@ // CPP-CHECK-LABEL: @_Z18test_svmls_n_f64_xu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_td( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmls.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_msb.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_msb.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_msb.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_msb.c @@ -428,7 +428,7 @@ // CHECK-LABEL: @test_svmsb_n_s8_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.msb.nxv16i8( [[PG]], [[TMP1]], [[OP2:%.*]], [[TMP0]]) @@ -436,7 +436,7 @@ // // CPP-CHECK-LABEL: @_Z17test_svmsb_n_s8_zu10__SVBool_tu10__SVInt8_tu10__SVInt8_ta( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.msb.nxv16i8( [[PG]], [[TMP1]], [[OP2:%.*]], [[TMP0]]) @@ -450,7 +450,7 @@ // CHECK-LABEL: @test_svmsb_n_s16_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.msb.nxv8i16( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) @@ -459,7 +459,7 @@ // CPP-CHECK-LABEL: @_Z18test_svmsb_n_s16_zu10__SVBool_tu11__SVInt16_tu11__SVInt16_ts( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.msb.nxv8i16( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) @@ -473,7 +473,7 @@ // CHECK-LABEL: @test_svmsb_n_s32_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.msb.nxv4i32( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) @@ -482,7 +482,7 @@ // CPP-CHECK-LABEL: @_Z18test_svmsb_n_s32_zu10__SVBool_tu11__SVInt32_tu11__SVInt32_ti( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.msb.nxv4i32( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) @@ -496,7 +496,7 @@ // CHECK-LABEL: @test_svmsb_n_s64_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.msb.nxv2i64( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) @@ -505,7 +505,7 @@ // CPP-CHECK-LABEL: @_Z18test_svmsb_n_s64_zu10__SVBool_tu11__SVInt64_tu11__SVInt64_tl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.msb.nxv2i64( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) @@ -518,7 +518,7 @@ // CHECK-LABEL: @test_svmsb_n_u8_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.msb.nxv16i8( [[PG]], [[TMP1]], [[OP2:%.*]], [[TMP0]]) @@ -526,7 +526,7 @@ // // CPP-CHECK-LABEL: @_Z17test_svmsb_n_u8_zu10__SVBool_tu11__SVUint8_tu11__SVUint8_th( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.msb.nxv16i8( [[PG]], [[TMP1]], [[OP2:%.*]], [[TMP0]]) @@ -540,7 +540,7 @@ // CHECK-LABEL: @test_svmsb_n_u16_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.msb.nxv8i16( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) @@ -549,7 +549,7 @@ // CPP-CHECK-LABEL: @_Z18test_svmsb_n_u16_zu10__SVBool_tu12__SVUint16_tu12__SVUint16_tt( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.msb.nxv8i16( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) @@ -563,7 +563,7 @@ // CHECK-LABEL: @test_svmsb_n_u32_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.msb.nxv4i32( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) @@ -572,7 +572,7 @@ // CPP-CHECK-LABEL: @_Z18test_svmsb_n_u32_zu10__SVBool_tu12__SVUint32_tu12__SVUint32_tj( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.msb.nxv4i32( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) @@ -586,7 +586,7 @@ // CHECK-LABEL: @test_svmsb_n_u64_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.msb.nxv2i64( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) @@ -595,7 +595,7 @@ // CPP-CHECK-LABEL: @_Z18test_svmsb_n_u64_zu10__SVBool_tu12__SVUint64_tu12__SVUint64_tm( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.msb.nxv2i64( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) @@ -608,14 +608,14 @@ // CHECK-LABEL: @test_svmsb_n_s8_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.msb.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svmsb_n_s8_mu10__SVBool_tu10__SVInt8_tu10__SVInt8_ta( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.msb.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -628,7 +628,7 @@ // CHECK-LABEL: @test_svmsb_n_s16_m( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.msb.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -636,7 +636,7 @@ // CPP-CHECK-LABEL: @_Z18test_svmsb_n_s16_mu10__SVBool_tu11__SVInt16_tu11__SVInt16_ts( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.msb.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -649,7 +649,7 @@ // CHECK-LABEL: @test_svmsb_n_s32_m( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.msb.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -657,7 +657,7 @@ // CPP-CHECK-LABEL: @_Z18test_svmsb_n_s32_mu10__SVBool_tu11__SVInt32_tu11__SVInt32_ti( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.msb.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -670,7 +670,7 @@ // CHECK-LABEL: @test_svmsb_n_s64_m( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.msb.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -678,7 +678,7 @@ // CPP-CHECK-LABEL: @_Z18test_svmsb_n_s64_mu10__SVBool_tu11__SVInt64_tu11__SVInt64_tl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.msb.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -690,14 +690,14 @@ // CHECK-LABEL: @test_svmsb_n_u8_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.msb.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svmsb_n_u8_mu10__SVBool_tu11__SVUint8_tu11__SVUint8_th( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.msb.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -710,7 +710,7 @@ // CHECK-LABEL: @test_svmsb_n_u16_m( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.msb.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -718,7 +718,7 @@ // CPP-CHECK-LABEL: @_Z18test_svmsb_n_u16_mu10__SVBool_tu12__SVUint16_tu12__SVUint16_tt( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.msb.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -731,7 +731,7 @@ // CHECK-LABEL: @test_svmsb_n_u32_m( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.msb.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -739,7 +739,7 @@ // CPP-CHECK-LABEL: @_Z18test_svmsb_n_u32_mu10__SVBool_tu12__SVUint32_tu12__SVUint32_tj( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.msb.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -752,7 +752,7 @@ // CHECK-LABEL: @test_svmsb_n_u64_m( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.msb.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -760,7 +760,7 @@ // CPP-CHECK-LABEL: @_Z18test_svmsb_n_u64_mu10__SVBool_tu12__SVUint64_tu12__SVUint64_tm( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.msb.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -772,14 +772,14 @@ // CHECK-LABEL: @test_svmsb_n_s8_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.msb.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svmsb_n_s8_xu10__SVBool_tu10__SVInt8_tu10__SVInt8_ta( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.msb.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -792,7 +792,7 @@ // CHECK-LABEL: @test_svmsb_n_s16_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.msb.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -800,7 +800,7 @@ // CPP-CHECK-LABEL: @_Z18test_svmsb_n_s16_xu10__SVBool_tu11__SVInt16_tu11__SVInt16_ts( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.msb.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -813,7 +813,7 @@ // CHECK-LABEL: @test_svmsb_n_s32_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.msb.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -821,7 +821,7 @@ // CPP-CHECK-LABEL: @_Z18test_svmsb_n_s32_xu10__SVBool_tu11__SVInt32_tu11__SVInt32_ti( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.msb.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -834,7 +834,7 @@ // CHECK-LABEL: @test_svmsb_n_s64_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.msb.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -842,7 +842,7 @@ // CPP-CHECK-LABEL: @_Z18test_svmsb_n_s64_xu10__SVBool_tu11__SVInt64_tu11__SVInt64_tl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.msb.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -854,14 +854,14 @@ // CHECK-LABEL: @test_svmsb_n_u8_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.msb.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svmsb_n_u8_xu10__SVBool_tu11__SVUint8_tu11__SVUint8_th( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.msb.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -874,7 +874,7 @@ // CHECK-LABEL: @test_svmsb_n_u16_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.msb.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -882,7 +882,7 @@ // CPP-CHECK-LABEL: @_Z18test_svmsb_n_u16_xu10__SVBool_tu12__SVUint16_tu12__SVUint16_tt( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.msb.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -895,7 +895,7 @@ // CHECK-LABEL: @test_svmsb_n_u32_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.msb.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -903,7 +903,7 @@ // CPP-CHECK-LABEL: @_Z18test_svmsb_n_u32_xu10__SVBool_tu12__SVUint32_tu12__SVUint32_tj( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.msb.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -916,7 +916,7 @@ // CHECK-LABEL: @test_svmsb_n_u64_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.msb.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -924,7 +924,7 @@ // CPP-CHECK-LABEL: @_Z18test_svmsb_n_u64_xu10__SVBool_tu12__SVUint64_tu12__SVUint64_tm( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.msb.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -1096,7 +1096,7 @@ // CHECK-LABEL: @test_svmsb_n_f16_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fmsb.nxv8f16( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) @@ -1105,7 +1105,7 @@ // CPP-CHECK-LABEL: @_Z18test_svmsb_n_f16_zu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_tDh( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fmsb.nxv8f16( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) @@ -1119,7 +1119,7 @@ // CHECK-LABEL: @test_svmsb_n_f32_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fmsb.nxv4f32( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) @@ -1128,7 +1128,7 @@ // CPP-CHECK-LABEL: @_Z18test_svmsb_n_f32_zu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_tf( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fmsb.nxv4f32( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) @@ -1142,7 +1142,7 @@ // CHECK-LABEL: @test_svmsb_n_f64_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fmsb.nxv2f64( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) @@ -1151,7 +1151,7 @@ // CPP-CHECK-LABEL: @_Z18test_svmsb_n_f64_zu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_td( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fmsb.nxv2f64( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) @@ -1165,7 +1165,7 @@ // CHECK-LABEL: @test_svmsb_n_f16_m( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmsb.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -1173,7 +1173,7 @@ // CPP-CHECK-LABEL: @_Z18test_svmsb_n_f16_mu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_tDh( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmsb.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -1186,7 +1186,7 @@ // CHECK-LABEL: @test_svmsb_n_f32_m( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmsb.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -1194,7 +1194,7 @@ // CPP-CHECK-LABEL: @_Z18test_svmsb_n_f32_mu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_tf( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmsb.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -1207,7 +1207,7 @@ // CHECK-LABEL: @test_svmsb_n_f64_m( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmsb.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -1215,7 +1215,7 @@ // CPP-CHECK-LABEL: @_Z18test_svmsb_n_f64_mu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_td( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmsb.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -1228,7 +1228,7 @@ // CHECK-LABEL: @test_svmsb_n_f16_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmsb.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -1236,7 +1236,7 @@ // CPP-CHECK-LABEL: @_Z18test_svmsb_n_f16_xu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_tDh( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmsb.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -1249,7 +1249,7 @@ // CHECK-LABEL: @test_svmsb_n_f32_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmsb.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -1257,7 +1257,7 @@ // CPP-CHECK-LABEL: @_Z18test_svmsb_n_f32_xu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_tf( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmsb.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -1270,7 +1270,7 @@ // CHECK-LABEL: @test_svmsb_n_f64_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmsb.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -1278,7 +1278,7 @@ // CPP-CHECK-LABEL: @_Z18test_svmsb_n_f64_xu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_td( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmsb.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_mul.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_mul.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_mul.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_mul.c @@ -428,7 +428,7 @@ // CHECK-LABEL: @test_svmul_n_s8_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mul.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) @@ -436,7 +436,7 @@ // // CPP-CHECK-LABEL: @_Z17test_svmul_n_s8_zu10__SVBool_tu10__SVInt8_ta( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mul.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) @@ -450,7 +450,7 @@ // CHECK-LABEL: @test_svmul_n_s16_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.mul.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -459,7 +459,7 @@ // CPP-CHECK-LABEL: @_Z18test_svmul_n_s16_zu10__SVBool_tu11__SVInt16_ts( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.mul.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -473,7 +473,7 @@ // CHECK-LABEL: @test_svmul_n_s32_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.mul.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -482,7 +482,7 @@ // CPP-CHECK-LABEL: @_Z18test_svmul_n_s32_zu10__SVBool_tu11__SVInt32_ti( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.mul.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -496,7 +496,7 @@ // CHECK-LABEL: @test_svmul_n_s64_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.mul.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -505,7 +505,7 @@ // CPP-CHECK-LABEL: @_Z18test_svmul_n_s64_zu10__SVBool_tu11__SVInt64_tl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.mul.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -518,7 +518,7 @@ // CHECK-LABEL: @test_svmul_n_u8_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mul.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) @@ -526,7 +526,7 @@ // // CPP-CHECK-LABEL: @_Z17test_svmul_n_u8_zu10__SVBool_tu11__SVUint8_th( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mul.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) @@ -540,7 +540,7 @@ // CHECK-LABEL: @test_svmul_n_u16_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.mul.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -549,7 +549,7 @@ // CPP-CHECK-LABEL: @_Z18test_svmul_n_u16_zu10__SVBool_tu12__SVUint16_tt( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.mul.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -563,7 +563,7 @@ // CHECK-LABEL: @test_svmul_n_u32_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.mul.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -572,7 +572,7 @@ // CPP-CHECK-LABEL: @_Z18test_svmul_n_u32_zu10__SVBool_tu12__SVUint32_tj( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.mul.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -586,7 +586,7 @@ // CHECK-LABEL: @test_svmul_n_u64_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.mul.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -595,7 +595,7 @@ // CPP-CHECK-LABEL: @_Z18test_svmul_n_u64_zu10__SVBool_tu12__SVUint64_tm( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.mul.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -608,14 +608,14 @@ // CHECK-LABEL: @test_svmul_n_s8_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mul.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svmul_n_s8_mu10__SVBool_tu10__SVInt8_ta( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mul.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -628,7 +628,7 @@ // CHECK-LABEL: @test_svmul_n_s16_m( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mul.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -636,7 +636,7 @@ // CPP-CHECK-LABEL: @_Z18test_svmul_n_s16_mu10__SVBool_tu11__SVInt16_ts( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mul.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -649,7 +649,7 @@ // CHECK-LABEL: @test_svmul_n_s32_m( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mul.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -657,7 +657,7 @@ // CPP-CHECK-LABEL: @_Z18test_svmul_n_s32_mu10__SVBool_tu11__SVInt32_ti( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mul.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -670,7 +670,7 @@ // CHECK-LABEL: @test_svmul_n_s64_m( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mul.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -678,7 +678,7 @@ // CPP-CHECK-LABEL: @_Z18test_svmul_n_s64_mu10__SVBool_tu11__SVInt64_tl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mul.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -690,14 +690,14 @@ // CHECK-LABEL: @test_svmul_n_u8_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mul.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svmul_n_u8_mu10__SVBool_tu11__SVUint8_th( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mul.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -710,7 +710,7 @@ // CHECK-LABEL: @test_svmul_n_u16_m( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mul.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -718,7 +718,7 @@ // CPP-CHECK-LABEL: @_Z18test_svmul_n_u16_mu10__SVBool_tu12__SVUint16_tt( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mul.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -731,7 +731,7 @@ // CHECK-LABEL: @test_svmul_n_u32_m( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mul.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -739,7 +739,7 @@ // CPP-CHECK-LABEL: @_Z18test_svmul_n_u32_mu10__SVBool_tu12__SVUint32_tj( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mul.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -752,7 +752,7 @@ // CHECK-LABEL: @test_svmul_n_u64_m( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mul.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -760,7 +760,7 @@ // CPP-CHECK-LABEL: @_Z18test_svmul_n_u64_mu10__SVBool_tu12__SVUint64_tm( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mul.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -772,14 +772,14 @@ // CHECK-LABEL: @test_svmul_n_s8_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mul.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svmul_n_s8_xu10__SVBool_tu10__SVInt8_ta( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mul.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -792,7 +792,7 @@ // CHECK-LABEL: @test_svmul_n_s16_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mul.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -800,7 +800,7 @@ // CPP-CHECK-LABEL: @_Z18test_svmul_n_s16_xu10__SVBool_tu11__SVInt16_ts( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mul.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -813,7 +813,7 @@ // CHECK-LABEL: @test_svmul_n_s32_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mul.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -821,7 +821,7 @@ // CPP-CHECK-LABEL: @_Z18test_svmul_n_s32_xu10__SVBool_tu11__SVInt32_ti( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mul.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -834,7 +834,7 @@ // CHECK-LABEL: @test_svmul_n_s64_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mul.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -842,7 +842,7 @@ // CPP-CHECK-LABEL: @_Z18test_svmul_n_s64_xu10__SVBool_tu11__SVInt64_tl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mul.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -854,14 +854,14 @@ // CHECK-LABEL: @test_svmul_n_u8_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mul.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svmul_n_u8_xu10__SVBool_tu11__SVUint8_th( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mul.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -874,7 +874,7 @@ // CHECK-LABEL: @test_svmul_n_u16_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mul.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -882,7 +882,7 @@ // CPP-CHECK-LABEL: @_Z18test_svmul_n_u16_xu10__SVBool_tu12__SVUint16_tt( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mul.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -895,7 +895,7 @@ // CHECK-LABEL: @test_svmul_n_u32_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mul.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -903,7 +903,7 @@ // CPP-CHECK-LABEL: @_Z18test_svmul_n_u32_xu10__SVBool_tu12__SVUint32_tj( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mul.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -916,7 +916,7 @@ // CHECK-LABEL: @test_svmul_n_u64_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mul.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -924,7 +924,7 @@ // CPP-CHECK-LABEL: @_Z18test_svmul_n_u64_xu10__SVBool_tu12__SVUint64_tm( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mul.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -1096,7 +1096,7 @@ // CHECK-LABEL: @test_svmul_n_f16_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fmul.nxv8f16( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -1105,7 +1105,7 @@ // CPP-CHECK-LABEL: @_Z18test_svmul_n_f16_zu10__SVBool_tu13__SVFloat16_tDh( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fmul.nxv8f16( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -1119,7 +1119,7 @@ // CHECK-LABEL: @test_svmul_n_f32_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fmul.nxv4f32( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -1128,7 +1128,7 @@ // CPP-CHECK-LABEL: @_Z18test_svmul_n_f32_zu10__SVBool_tu13__SVFloat32_tf( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fmul.nxv4f32( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -1142,7 +1142,7 @@ // CHECK-LABEL: @test_svmul_n_f64_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fmul.nxv2f64( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -1151,7 +1151,7 @@ // CPP-CHECK-LABEL: @_Z18test_svmul_n_f64_zu10__SVBool_tu13__SVFloat64_td( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fmul.nxv2f64( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -1165,7 +1165,7 @@ // CHECK-LABEL: @test_svmul_n_f16_m( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmul.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -1173,7 +1173,7 @@ // CPP-CHECK-LABEL: @_Z18test_svmul_n_f16_mu10__SVBool_tu13__SVFloat16_tDh( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmul.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -1186,7 +1186,7 @@ // CHECK-LABEL: @test_svmul_n_f32_m( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmul.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -1194,7 +1194,7 @@ // CPP-CHECK-LABEL: @_Z18test_svmul_n_f32_mu10__SVBool_tu13__SVFloat32_tf( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmul.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -1207,7 +1207,7 @@ // CHECK-LABEL: @test_svmul_n_f64_m( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmul.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -1215,7 +1215,7 @@ // CPP-CHECK-LABEL: @_Z18test_svmul_n_f64_mu10__SVBool_tu13__SVFloat64_td( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmul.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -1228,7 +1228,7 @@ // CHECK-LABEL: @test_svmul_n_f16_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmul.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -1236,7 +1236,7 @@ // CPP-CHECK-LABEL: @_Z18test_svmul_n_f16_xu10__SVBool_tu13__SVFloat16_tDh( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmul.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -1249,7 +1249,7 @@ // CHECK-LABEL: @test_svmul_n_f32_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmul.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -1257,7 +1257,7 @@ // CPP-CHECK-LABEL: @_Z18test_svmul_n_f32_xu10__SVBool_tu13__SVFloat32_tf( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmul.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -1270,7 +1270,7 @@ // CHECK-LABEL: @test_svmul_n_f64_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmul.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -1278,7 +1278,7 @@ // CPP-CHECK-LABEL: @_Z18test_svmul_n_f64_xu10__SVBool_tu13__SVFloat64_td( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmul.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_mulh.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_mulh.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_mulh.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_mulh.c @@ -428,7 +428,7 @@ // CHECK-LABEL: @test_svmulh_n_s8_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smulh.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) @@ -436,7 +436,7 @@ // // CPP-CHECK-LABEL: @_Z18test_svmulh_n_s8_zu10__SVBool_tu10__SVInt8_ta( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smulh.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) @@ -450,7 +450,7 @@ // CHECK-LABEL: @test_svmulh_n_s16_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.smulh.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -459,7 +459,7 @@ // CPP-CHECK-LABEL: @_Z19test_svmulh_n_s16_zu10__SVBool_tu11__SVInt16_ts( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.smulh.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -473,7 +473,7 @@ // CHECK-LABEL: @test_svmulh_n_s32_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.smulh.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -482,7 +482,7 @@ // CPP-CHECK-LABEL: @_Z19test_svmulh_n_s32_zu10__SVBool_tu11__SVInt32_ti( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.smulh.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -496,7 +496,7 @@ // CHECK-LABEL: @test_svmulh_n_s64_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.smulh.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -505,7 +505,7 @@ // CPP-CHECK-LABEL: @_Z19test_svmulh_n_s64_zu10__SVBool_tu11__SVInt64_tl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.smulh.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -518,7 +518,7 @@ // CHECK-LABEL: @test_svmulh_n_u8_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umulh.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) @@ -526,7 +526,7 @@ // // CPP-CHECK-LABEL: @_Z18test_svmulh_n_u8_zu10__SVBool_tu11__SVUint8_th( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umulh.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) @@ -540,7 +540,7 @@ // CHECK-LABEL: @test_svmulh_n_u16_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.umulh.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -549,7 +549,7 @@ // CPP-CHECK-LABEL: @_Z19test_svmulh_n_u16_zu10__SVBool_tu12__SVUint16_tt( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.umulh.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -563,7 +563,7 @@ // CHECK-LABEL: @test_svmulh_n_u32_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.umulh.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -572,7 +572,7 @@ // CPP-CHECK-LABEL: @_Z19test_svmulh_n_u32_zu10__SVBool_tu12__SVUint32_tj( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.umulh.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -586,7 +586,7 @@ // CHECK-LABEL: @test_svmulh_n_u64_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.umulh.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -595,7 +595,7 @@ // CPP-CHECK-LABEL: @_Z19test_svmulh_n_u64_zu10__SVBool_tu12__SVUint64_tm( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.umulh.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -608,14 +608,14 @@ // CHECK-LABEL: @test_svmulh_n_s8_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smulh.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svmulh_n_s8_mu10__SVBool_tu10__SVInt8_ta( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smulh.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -628,7 +628,7 @@ // CHECK-LABEL: @test_svmulh_n_s16_m( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smulh.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -636,7 +636,7 @@ // CPP-CHECK-LABEL: @_Z19test_svmulh_n_s16_mu10__SVBool_tu11__SVInt16_ts( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smulh.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -649,7 +649,7 @@ // CHECK-LABEL: @test_svmulh_n_s32_m( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smulh.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -657,7 +657,7 @@ // CPP-CHECK-LABEL: @_Z19test_svmulh_n_s32_mu10__SVBool_tu11__SVInt32_ti( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smulh.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -670,7 +670,7 @@ // CHECK-LABEL: @test_svmulh_n_s64_m( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smulh.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -678,7 +678,7 @@ // CPP-CHECK-LABEL: @_Z19test_svmulh_n_s64_mu10__SVBool_tu11__SVInt64_tl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smulh.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -690,14 +690,14 @@ // CHECK-LABEL: @test_svmulh_n_u8_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umulh.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svmulh_n_u8_mu10__SVBool_tu11__SVUint8_th( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umulh.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -710,7 +710,7 @@ // CHECK-LABEL: @test_svmulh_n_u16_m( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umulh.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -718,7 +718,7 @@ // CPP-CHECK-LABEL: @_Z19test_svmulh_n_u16_mu10__SVBool_tu12__SVUint16_tt( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umulh.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -731,7 +731,7 @@ // CHECK-LABEL: @test_svmulh_n_u32_m( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umulh.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -739,7 +739,7 @@ // CPP-CHECK-LABEL: @_Z19test_svmulh_n_u32_mu10__SVBool_tu12__SVUint32_tj( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umulh.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -752,7 +752,7 @@ // CHECK-LABEL: @test_svmulh_n_u64_m( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umulh.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -760,7 +760,7 @@ // CPP-CHECK-LABEL: @_Z19test_svmulh_n_u64_mu10__SVBool_tu12__SVUint64_tm( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umulh.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -772,14 +772,14 @@ // CHECK-LABEL: @test_svmulh_n_s8_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smulh.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svmulh_n_s8_xu10__SVBool_tu10__SVInt8_ta( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smulh.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -792,7 +792,7 @@ // CHECK-LABEL: @test_svmulh_n_s16_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smulh.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -800,7 +800,7 @@ // CPP-CHECK-LABEL: @_Z19test_svmulh_n_s16_xu10__SVBool_tu11__SVInt16_ts( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smulh.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -813,7 +813,7 @@ // CHECK-LABEL: @test_svmulh_n_s32_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smulh.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -821,7 +821,7 @@ // CPP-CHECK-LABEL: @_Z19test_svmulh_n_s32_xu10__SVBool_tu11__SVInt32_ti( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smulh.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -834,7 +834,7 @@ // CHECK-LABEL: @test_svmulh_n_s64_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smulh.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -842,7 +842,7 @@ // CPP-CHECK-LABEL: @_Z19test_svmulh_n_s64_xu10__SVBool_tu11__SVInt64_tl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smulh.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -854,14 +854,14 @@ // CHECK-LABEL: @test_svmulh_n_u8_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umulh.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svmulh_n_u8_xu10__SVBool_tu11__SVUint8_th( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umulh.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -874,7 +874,7 @@ // CHECK-LABEL: @test_svmulh_n_u16_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umulh.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -882,7 +882,7 @@ // CPP-CHECK-LABEL: @_Z19test_svmulh_n_u16_xu10__SVBool_tu12__SVUint16_tt( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umulh.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -895,7 +895,7 @@ // CHECK-LABEL: @test_svmulh_n_u32_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umulh.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -903,7 +903,7 @@ // CPP-CHECK-LABEL: @_Z19test_svmulh_n_u32_xu10__SVBool_tu12__SVUint32_tj( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umulh.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -916,7 +916,7 @@ // CHECK-LABEL: @test_svmulh_n_u64_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umulh.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -924,7 +924,7 @@ // CPP-CHECK-LABEL: @_Z19test_svmulh_n_u64_xu10__SVBool_tu12__SVUint64_tm( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umulh.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_mulx.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_mulx.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_mulx.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_mulx.c @@ -176,7 +176,7 @@ // CHECK-LABEL: @test_svmulx_n_f16_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fmulx.nxv8f16( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -185,7 +185,7 @@ // CPP-CHECK-LABEL: @_Z19test_svmulx_n_f16_zu10__SVBool_tu13__SVFloat16_tDh( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fmulx.nxv8f16( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -199,7 +199,7 @@ // CHECK-LABEL: @test_svmulx_n_f32_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fmulx.nxv4f32( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -208,7 +208,7 @@ // CPP-CHECK-LABEL: @_Z19test_svmulx_n_f32_zu10__SVBool_tu13__SVFloat32_tf( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fmulx.nxv4f32( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -222,7 +222,7 @@ // CHECK-LABEL: @test_svmulx_n_f64_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fmulx.nxv2f64( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -231,7 +231,7 @@ // CPP-CHECK-LABEL: @_Z19test_svmulx_n_f64_zu10__SVBool_tu13__SVFloat64_td( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fmulx.nxv2f64( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -245,7 +245,7 @@ // CHECK-LABEL: @test_svmulx_n_f16_m( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmulx.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -253,7 +253,7 @@ // CPP-CHECK-LABEL: @_Z19test_svmulx_n_f16_mu10__SVBool_tu13__SVFloat16_tDh( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmulx.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -266,7 +266,7 @@ // CHECK-LABEL: @test_svmulx_n_f32_m( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmulx.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -274,7 +274,7 @@ // CPP-CHECK-LABEL: @_Z19test_svmulx_n_f32_mu10__SVBool_tu13__SVFloat32_tf( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmulx.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -287,7 +287,7 @@ // CHECK-LABEL: @test_svmulx_n_f64_m( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmulx.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -295,7 +295,7 @@ // CPP-CHECK-LABEL: @_Z19test_svmulx_n_f64_mu10__SVBool_tu13__SVFloat64_td( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmulx.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -308,7 +308,7 @@ // CHECK-LABEL: @test_svmulx_n_f16_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmulx.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -316,7 +316,7 @@ // CPP-CHECK-LABEL: @_Z19test_svmulx_n_f16_xu10__SVBool_tu13__SVFloat16_tDh( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmulx.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -329,7 +329,7 @@ // CHECK-LABEL: @test_svmulx_n_f32_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmulx.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -337,7 +337,7 @@ // CPP-CHECK-LABEL: @_Z19test_svmulx_n_f32_xu10__SVBool_tu13__SVFloat32_tf( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmulx.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -350,7 +350,7 @@ // CHECK-LABEL: @test_svmulx_n_f64_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmulx.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -358,7 +358,7 @@ // CPP-CHECK-LABEL: @_Z19test_svmulx_n_f64_xu10__SVBool_tu13__SVFloat64_td( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmulx.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_nmad.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_nmad.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_nmad.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_nmad.c @@ -176,7 +176,7 @@ // CHECK-LABEL: @test_svnmad_n_f16_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fnmad.nxv8f16( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) @@ -185,7 +185,7 @@ // CPP-CHECK-LABEL: @_Z19test_svnmad_n_f16_zu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_tDh( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fnmad.nxv8f16( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) @@ -199,7 +199,7 @@ // CHECK-LABEL: @test_svnmad_n_f32_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fnmad.nxv4f32( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) @@ -208,7 +208,7 @@ // CPP-CHECK-LABEL: @_Z19test_svnmad_n_f32_zu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_tf( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fnmad.nxv4f32( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) @@ -222,7 +222,7 @@ // CHECK-LABEL: @test_svnmad_n_f64_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fnmad.nxv2f64( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) @@ -231,7 +231,7 @@ // CPP-CHECK-LABEL: @_Z19test_svnmad_n_f64_zu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_td( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fnmad.nxv2f64( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) @@ -245,7 +245,7 @@ // CHECK-LABEL: @test_svnmad_n_f16_m( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmad.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -253,7 +253,7 @@ // CPP-CHECK-LABEL: @_Z19test_svnmad_n_f16_mu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_tDh( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmad.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -266,7 +266,7 @@ // CHECK-LABEL: @test_svnmad_n_f32_m( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmad.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -274,7 +274,7 @@ // CPP-CHECK-LABEL: @_Z19test_svnmad_n_f32_mu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_tf( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmad.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -287,7 +287,7 @@ // CHECK-LABEL: @test_svnmad_n_f64_m( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmad.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -295,7 +295,7 @@ // CPP-CHECK-LABEL: @_Z19test_svnmad_n_f64_mu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_td( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmad.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -308,7 +308,7 @@ // CHECK-LABEL: @test_svnmad_n_f16_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmad.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -316,7 +316,7 @@ // CPP-CHECK-LABEL: @_Z19test_svnmad_n_f16_xu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_tDh( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmad.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -329,7 +329,7 @@ // CHECK-LABEL: @test_svnmad_n_f32_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmad.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -337,7 +337,7 @@ // CPP-CHECK-LABEL: @_Z19test_svnmad_n_f32_xu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_tf( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmad.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -350,7 +350,7 @@ // CHECK-LABEL: @test_svnmad_n_f64_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmad.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -358,7 +358,7 @@ // CPP-CHECK-LABEL: @_Z19test_svnmad_n_f64_xu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_td( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmad.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_nmla.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_nmla.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_nmla.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_nmla.c @@ -176,7 +176,7 @@ // CHECK-LABEL: @test_svnmla_n_f16_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fnmla.nxv8f16( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) @@ -185,7 +185,7 @@ // CPP-CHECK-LABEL: @_Z19test_svnmla_n_f16_zu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_tDh( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fnmla.nxv8f16( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) @@ -199,7 +199,7 @@ // CHECK-LABEL: @test_svnmla_n_f32_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fnmla.nxv4f32( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) @@ -208,7 +208,7 @@ // CPP-CHECK-LABEL: @_Z19test_svnmla_n_f32_zu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_tf( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fnmla.nxv4f32( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) @@ -222,7 +222,7 @@ // CHECK-LABEL: @test_svnmla_n_f64_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fnmla.nxv2f64( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) @@ -231,7 +231,7 @@ // CPP-CHECK-LABEL: @_Z19test_svnmla_n_f64_zu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_td( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fnmla.nxv2f64( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) @@ -245,7 +245,7 @@ // CHECK-LABEL: @test_svnmla_n_f16_m( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmla.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -253,7 +253,7 @@ // CPP-CHECK-LABEL: @_Z19test_svnmla_n_f16_mu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_tDh( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmla.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -266,7 +266,7 @@ // CHECK-LABEL: @test_svnmla_n_f32_m( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmla.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -274,7 +274,7 @@ // CPP-CHECK-LABEL: @_Z19test_svnmla_n_f32_mu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_tf( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmla.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -287,7 +287,7 @@ // CHECK-LABEL: @test_svnmla_n_f64_m( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmla.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -295,7 +295,7 @@ // CPP-CHECK-LABEL: @_Z19test_svnmla_n_f64_mu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_td( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmla.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -308,7 +308,7 @@ // CHECK-LABEL: @test_svnmla_n_f16_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmla.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -316,7 +316,7 @@ // CPP-CHECK-LABEL: @_Z19test_svnmla_n_f16_xu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_tDh( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmla.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -329,7 +329,7 @@ // CHECK-LABEL: @test_svnmla_n_f32_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmla.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -337,7 +337,7 @@ // CPP-CHECK-LABEL: @_Z19test_svnmla_n_f32_xu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_tf( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmla.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -350,7 +350,7 @@ // CHECK-LABEL: @test_svnmla_n_f64_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmla.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -358,7 +358,7 @@ // CPP-CHECK-LABEL: @_Z19test_svnmla_n_f64_xu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_td( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmla.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_nmls.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_nmls.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_nmls.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_nmls.c @@ -176,7 +176,7 @@ // CHECK-LABEL: @test_svnmls_n_f16_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fnmls.nxv8f16( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) @@ -185,7 +185,7 @@ // CPP-CHECK-LABEL: @_Z19test_svnmls_n_f16_zu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_tDh( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fnmls.nxv8f16( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) @@ -199,7 +199,7 @@ // CHECK-LABEL: @test_svnmls_n_f32_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fnmls.nxv4f32( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) @@ -208,7 +208,7 @@ // CPP-CHECK-LABEL: @_Z19test_svnmls_n_f32_zu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_tf( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fnmls.nxv4f32( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) @@ -222,7 +222,7 @@ // CHECK-LABEL: @test_svnmls_n_f64_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fnmls.nxv2f64( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) @@ -231,7 +231,7 @@ // CPP-CHECK-LABEL: @_Z19test_svnmls_n_f64_zu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_td( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fnmls.nxv2f64( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) @@ -245,7 +245,7 @@ // CHECK-LABEL: @test_svnmls_n_f16_m( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmls.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -253,7 +253,7 @@ // CPP-CHECK-LABEL: @_Z19test_svnmls_n_f16_mu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_tDh( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmls.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -266,7 +266,7 @@ // CHECK-LABEL: @test_svnmls_n_f32_m( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmls.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -274,7 +274,7 @@ // CPP-CHECK-LABEL: @_Z19test_svnmls_n_f32_mu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_tf( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmls.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -287,7 +287,7 @@ // CHECK-LABEL: @test_svnmls_n_f64_m( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmls.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -295,7 +295,7 @@ // CPP-CHECK-LABEL: @_Z19test_svnmls_n_f64_mu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_td( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmls.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -308,7 +308,7 @@ // CHECK-LABEL: @test_svnmls_n_f16_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmls.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -316,7 +316,7 @@ // CPP-CHECK-LABEL: @_Z19test_svnmls_n_f16_xu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_tDh( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmls.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -329,7 +329,7 @@ // CHECK-LABEL: @test_svnmls_n_f32_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmls.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -337,7 +337,7 @@ // CPP-CHECK-LABEL: @_Z19test_svnmls_n_f32_xu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_tf( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmls.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -350,7 +350,7 @@ // CHECK-LABEL: @test_svnmls_n_f64_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmls.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -358,7 +358,7 @@ // CPP-CHECK-LABEL: @_Z19test_svnmls_n_f64_xu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_td( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmls.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_nmsb.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_nmsb.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_nmsb.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_nmsb.c @@ -176,7 +176,7 @@ // CHECK-LABEL: @test_svnmsb_n_f16_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fnmsb.nxv8f16( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) @@ -185,7 +185,7 @@ // CPP-CHECK-LABEL: @_Z19test_svnmsb_n_f16_zu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_tDh( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fnmsb.nxv8f16( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) @@ -199,7 +199,7 @@ // CHECK-LABEL: @test_svnmsb_n_f32_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fnmsb.nxv4f32( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) @@ -208,7 +208,7 @@ // CPP-CHECK-LABEL: @_Z19test_svnmsb_n_f32_zu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_tf( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fnmsb.nxv4f32( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) @@ -222,7 +222,7 @@ // CHECK-LABEL: @test_svnmsb_n_f64_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fnmsb.nxv2f64( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) @@ -231,7 +231,7 @@ // CPP-CHECK-LABEL: @_Z19test_svnmsb_n_f64_zu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_td( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fnmsb.nxv2f64( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) @@ -245,7 +245,7 @@ // CHECK-LABEL: @test_svnmsb_n_f16_m( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmsb.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -253,7 +253,7 @@ // CPP-CHECK-LABEL: @_Z19test_svnmsb_n_f16_mu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_tDh( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmsb.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -266,7 +266,7 @@ // CHECK-LABEL: @test_svnmsb_n_f32_m( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmsb.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -274,7 +274,7 @@ // CPP-CHECK-LABEL: @_Z19test_svnmsb_n_f32_mu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_tf( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmsb.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -287,7 +287,7 @@ // CHECK-LABEL: @test_svnmsb_n_f64_m( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmsb.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -295,7 +295,7 @@ // CPP-CHECK-LABEL: @_Z19test_svnmsb_n_f64_mu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_td( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmsb.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -308,7 +308,7 @@ // CHECK-LABEL: @test_svnmsb_n_f16_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmsb.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -316,7 +316,7 @@ // CPP-CHECK-LABEL: @_Z19test_svnmsb_n_f16_xu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_tDh( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmsb.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -329,7 +329,7 @@ // CHECK-LABEL: @test_svnmsb_n_f32_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmsb.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -337,7 +337,7 @@ // CPP-CHECK-LABEL: @_Z19test_svnmsb_n_f32_xu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_tf( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmsb.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -350,7 +350,7 @@ // CHECK-LABEL: @test_svnmsb_n_f64_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmsb.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -358,7 +358,7 @@ // CPP-CHECK-LABEL: @_Z19test_svnmsb_n_f64_xu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_td( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmsb.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_orr.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_orr.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_orr.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_orr.c @@ -428,7 +428,7 @@ // CHECK-LABEL: @test_svorr_n_s8_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.orr.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) @@ -436,7 +436,7 @@ // // CPP-CHECK-LABEL: @_Z17test_svorr_n_s8_zu10__SVBool_tu10__SVInt8_ta( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.orr.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) @@ -450,7 +450,7 @@ // CHECK-LABEL: @test_svorr_n_s16_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.orr.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -459,7 +459,7 @@ // CPP-CHECK-LABEL: @_Z18test_svorr_n_s16_zu10__SVBool_tu11__SVInt16_ts( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.orr.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -473,7 +473,7 @@ // CHECK-LABEL: @test_svorr_n_s32_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.orr.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -482,7 +482,7 @@ // CPP-CHECK-LABEL: @_Z18test_svorr_n_s32_zu10__SVBool_tu11__SVInt32_ti( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.orr.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -496,7 +496,7 @@ // CHECK-LABEL: @test_svorr_n_s64_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.orr.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -505,7 +505,7 @@ // CPP-CHECK-LABEL: @_Z18test_svorr_n_s64_zu10__SVBool_tu11__SVInt64_tl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.orr.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -518,7 +518,7 @@ // CHECK-LABEL: @test_svorr_n_u8_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.orr.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) @@ -526,7 +526,7 @@ // // CPP-CHECK-LABEL: @_Z17test_svorr_n_u8_zu10__SVBool_tu11__SVUint8_th( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.orr.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) @@ -540,7 +540,7 @@ // CHECK-LABEL: @test_svorr_n_u16_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.orr.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -549,7 +549,7 @@ // CPP-CHECK-LABEL: @_Z18test_svorr_n_u16_zu10__SVBool_tu12__SVUint16_tt( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.orr.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -563,7 +563,7 @@ // CHECK-LABEL: @test_svorr_n_u32_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.orr.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -572,7 +572,7 @@ // CPP-CHECK-LABEL: @_Z18test_svorr_n_u32_zu10__SVBool_tu12__SVUint32_tj( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.orr.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -586,7 +586,7 @@ // CHECK-LABEL: @test_svorr_n_u64_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.orr.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -595,7 +595,7 @@ // CPP-CHECK-LABEL: @_Z18test_svorr_n_u64_zu10__SVBool_tu12__SVUint64_tm( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.orr.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -608,14 +608,14 @@ // CHECK-LABEL: @test_svorr_n_s8_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.orr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svorr_n_s8_mu10__SVBool_tu10__SVInt8_ta( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.orr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -628,7 +628,7 @@ // CHECK-LABEL: @test_svorr_n_s16_m( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.orr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -636,7 +636,7 @@ // CPP-CHECK-LABEL: @_Z18test_svorr_n_s16_mu10__SVBool_tu11__SVInt16_ts( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.orr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -649,7 +649,7 @@ // CHECK-LABEL: @test_svorr_n_s32_m( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.orr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -657,7 +657,7 @@ // CPP-CHECK-LABEL: @_Z18test_svorr_n_s32_mu10__SVBool_tu11__SVInt32_ti( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.orr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -670,7 +670,7 @@ // CHECK-LABEL: @test_svorr_n_s64_m( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.orr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -678,7 +678,7 @@ // CPP-CHECK-LABEL: @_Z18test_svorr_n_s64_mu10__SVBool_tu11__SVInt64_tl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.orr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -690,14 +690,14 @@ // CHECK-LABEL: @test_svorr_n_u8_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.orr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svorr_n_u8_mu10__SVBool_tu11__SVUint8_th( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.orr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -710,7 +710,7 @@ // CHECK-LABEL: @test_svorr_n_u16_m( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.orr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -718,7 +718,7 @@ // CPP-CHECK-LABEL: @_Z18test_svorr_n_u16_mu10__SVBool_tu12__SVUint16_tt( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.orr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -731,7 +731,7 @@ // CHECK-LABEL: @test_svorr_n_u32_m( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.orr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -739,7 +739,7 @@ // CPP-CHECK-LABEL: @_Z18test_svorr_n_u32_mu10__SVBool_tu12__SVUint32_tj( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.orr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -752,7 +752,7 @@ // CHECK-LABEL: @test_svorr_n_u64_m( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.orr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -760,7 +760,7 @@ // CPP-CHECK-LABEL: @_Z18test_svorr_n_u64_mu10__SVBool_tu12__SVUint64_tm( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.orr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -772,14 +772,14 @@ // CHECK-LABEL: @test_svorr_n_s8_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.orr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svorr_n_s8_xu10__SVBool_tu10__SVInt8_ta( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.orr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -792,7 +792,7 @@ // CHECK-LABEL: @test_svorr_n_s16_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.orr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -800,7 +800,7 @@ // CPP-CHECK-LABEL: @_Z18test_svorr_n_s16_xu10__SVBool_tu11__SVInt16_ts( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.orr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -813,7 +813,7 @@ // CHECK-LABEL: @test_svorr_n_s32_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.orr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -821,7 +821,7 @@ // CPP-CHECK-LABEL: @_Z18test_svorr_n_s32_xu10__SVBool_tu11__SVInt32_ti( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.orr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -834,7 +834,7 @@ // CHECK-LABEL: @test_svorr_n_s64_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.orr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -842,7 +842,7 @@ // CPP-CHECK-LABEL: @_Z18test_svorr_n_s64_xu10__SVBool_tu11__SVInt64_tl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.orr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -854,14 +854,14 @@ // CHECK-LABEL: @test_svorr_n_u8_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.orr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svorr_n_u8_xu10__SVBool_tu11__SVUint8_th( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.orr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -874,7 +874,7 @@ // CHECK-LABEL: @test_svorr_n_u16_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.orr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -882,7 +882,7 @@ // CPP-CHECK-LABEL: @_Z18test_svorr_n_u16_xu10__SVBool_tu12__SVUint16_tt( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.orr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -895,7 +895,7 @@ // CHECK-LABEL: @test_svorr_n_u32_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.orr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -903,7 +903,7 @@ // CPP-CHECK-LABEL: @_Z18test_svorr_n_u32_xu10__SVBool_tu12__SVUint32_tj( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.orr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -916,7 +916,7 @@ // CHECK-LABEL: @test_svorr_n_u64_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.orr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -924,7 +924,7 @@ // CPP-CHECK-LABEL: @_Z18test_svorr_n_u64_xu10__SVBool_tu12__SVUint64_tm( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.orr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_qadd.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_qadd.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_qadd.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_qadd.c @@ -136,14 +136,14 @@ // CHECK-LABEL: @test_svqadd_n_s8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqadd.x.nxv16i8( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svqadd_n_s8u10__SVInt8_ta( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqadd.x.nxv16i8( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -155,14 +155,14 @@ // CHECK-LABEL: @test_svqadd_n_s16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqadd.x.nxv8i16( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svqadd_n_s16u11__SVInt16_ts( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqadd.x.nxv8i16( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -174,14 +174,14 @@ // CHECK-LABEL: @test_svqadd_n_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqadd.x.nxv4i32( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svqadd_n_s32u11__SVInt32_ti( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqadd.x.nxv4i32( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -193,14 +193,14 @@ // CHECK-LABEL: @test_svqadd_n_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqadd.x.nxv2i64( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svqadd_n_s64u11__SVInt64_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqadd.x.nxv2i64( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -212,14 +212,14 @@ // CHECK-LABEL: @test_svqadd_n_u8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqadd.x.nxv16i8( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svqadd_n_u8u11__SVUint8_th( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqadd.x.nxv16i8( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -231,14 +231,14 @@ // CHECK-LABEL: @test_svqadd_n_u16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqadd.x.nxv8i16( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svqadd_n_u16u12__SVUint16_tt( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqadd.x.nxv8i16( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -250,14 +250,14 @@ // CHECK-LABEL: @test_svqadd_n_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqadd.x.nxv4i32( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svqadd_n_u32u12__SVUint32_tj( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqadd.x.nxv4i32( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -269,14 +269,14 @@ // CHECK-LABEL: @test_svqadd_n_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqadd.x.nxv2i64( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svqadd_n_u64u12__SVUint64_tm( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqadd.x.nxv2i64( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_qsub.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_qsub.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_qsub.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_qsub.c @@ -136,14 +136,14 @@ // CHECK-LABEL: @test_svqsub_n_s8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqsub.x.nxv16i8( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svqsub_n_s8u10__SVInt8_ta( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqsub.x.nxv16i8( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -155,14 +155,14 @@ // CHECK-LABEL: @test_svqsub_n_s16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqsub.x.nxv8i16( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svqsub_n_s16u11__SVInt16_ts( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqsub.x.nxv8i16( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -174,14 +174,14 @@ // CHECK-LABEL: @test_svqsub_n_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqsub.x.nxv4i32( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svqsub_n_s32u11__SVInt32_ti( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqsub.x.nxv4i32( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -193,14 +193,14 @@ // CHECK-LABEL: @test_svqsub_n_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqsub.x.nxv2i64( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svqsub_n_s64u11__SVInt64_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqsub.x.nxv2i64( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -212,14 +212,14 @@ // CHECK-LABEL: @test_svqsub_n_u8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqsub.x.nxv16i8( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svqsub_n_u8u11__SVUint8_th( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqsub.x.nxv16i8( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -231,14 +231,14 @@ // CHECK-LABEL: @test_svqsub_n_u16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqsub.x.nxv8i16( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svqsub_n_u16u12__SVUint16_tt( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqsub.x.nxv8i16( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -250,14 +250,14 @@ // CHECK-LABEL: @test_svqsub_n_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqsub.x.nxv4i32( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svqsub_n_u32u12__SVUint32_tj( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqsub.x.nxv4i32( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -269,14 +269,14 @@ // CHECK-LABEL: @test_svqsub_n_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqsub.x.nxv2i64( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svqsub_n_u64u12__SVUint64_tm( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqsub.x.nxv2i64( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_scale.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_scale.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_scale.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_scale.c @@ -176,7 +176,7 @@ // CHECK-LABEL: @test_svscale_n_f16_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fscale.nxv8f16( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -185,7 +185,7 @@ // CPP-CHECK-LABEL: @_Z20test_svscale_n_f16_zu10__SVBool_tu13__SVFloat16_ts( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fscale.nxv8f16( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -199,7 +199,7 @@ // CHECK-LABEL: @test_svscale_n_f32_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fscale.nxv4f32( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -208,7 +208,7 @@ // CPP-CHECK-LABEL: @_Z20test_svscale_n_f32_zu10__SVBool_tu13__SVFloat32_ti( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fscale.nxv4f32( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -222,7 +222,7 @@ // CHECK-LABEL: @test_svscale_n_f64_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fscale.nxv2f64( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -231,7 +231,7 @@ // CPP-CHECK-LABEL: @_Z20test_svscale_n_f64_zu10__SVBool_tu13__SVFloat64_tl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fscale.nxv2f64( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -245,7 +245,7 @@ // CHECK-LABEL: @test_svscale_n_f16_m( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fscale.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -253,7 +253,7 @@ // CPP-CHECK-LABEL: @_Z20test_svscale_n_f16_mu10__SVBool_tu13__SVFloat16_ts( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fscale.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -266,7 +266,7 @@ // CHECK-LABEL: @test_svscale_n_f32_m( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fscale.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -274,7 +274,7 @@ // CPP-CHECK-LABEL: @_Z20test_svscale_n_f32_mu10__SVBool_tu13__SVFloat32_ti( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fscale.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -287,7 +287,7 @@ // CHECK-LABEL: @test_svscale_n_f64_m( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fscale.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -295,7 +295,7 @@ // CPP-CHECK-LABEL: @_Z20test_svscale_n_f64_mu10__SVBool_tu13__SVFloat64_tl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fscale.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -308,7 +308,7 @@ // CHECK-LABEL: @test_svscale_n_f16_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fscale.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -316,7 +316,7 @@ // CPP-CHECK-LABEL: @_Z20test_svscale_n_f16_xu10__SVBool_tu13__SVFloat16_ts( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fscale.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -329,7 +329,7 @@ // CHECK-LABEL: @test_svscale_n_f32_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fscale.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -337,7 +337,7 @@ // CPP-CHECK-LABEL: @_Z20test_svscale_n_f32_xu10__SVBool_tu13__SVFloat32_ti( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fscale.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -350,7 +350,7 @@ // CHECK-LABEL: @test_svscale_n_f64_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fscale.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -358,7 +358,7 @@ // CPP-CHECK-LABEL: @_Z20test_svscale_n_f64_xu10__SVBool_tu13__SVFloat64_tl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fscale.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_sub.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_sub.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_sub.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_sub.c @@ -428,7 +428,7 @@ // CHECK-LABEL: @test_svsub_n_s8_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sub.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) @@ -436,7 +436,7 @@ // // CPP-CHECK-LABEL: @_Z17test_svsub_n_s8_zu10__SVBool_tu10__SVInt8_ta( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sub.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) @@ -450,7 +450,7 @@ // CHECK-LABEL: @test_svsub_n_s16_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.sub.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -459,7 +459,7 @@ // CPP-CHECK-LABEL: @_Z18test_svsub_n_s16_zu10__SVBool_tu11__SVInt16_ts( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.sub.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -473,7 +473,7 @@ // CHECK-LABEL: @test_svsub_n_s32_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.sub.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -482,7 +482,7 @@ // CPP-CHECK-LABEL: @_Z18test_svsub_n_s32_zu10__SVBool_tu11__SVInt32_ti( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.sub.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -496,7 +496,7 @@ // CHECK-LABEL: @test_svsub_n_s64_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.sub.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -505,7 +505,7 @@ // CPP-CHECK-LABEL: @_Z18test_svsub_n_s64_zu10__SVBool_tu11__SVInt64_tl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.sub.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -518,7 +518,7 @@ // CHECK-LABEL: @test_svsub_n_u8_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sub.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) @@ -526,7 +526,7 @@ // // CPP-CHECK-LABEL: @_Z17test_svsub_n_u8_zu10__SVBool_tu11__SVUint8_th( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sub.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) @@ -540,7 +540,7 @@ // CHECK-LABEL: @test_svsub_n_u16_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.sub.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -549,7 +549,7 @@ // CPP-CHECK-LABEL: @_Z18test_svsub_n_u16_zu10__SVBool_tu12__SVUint16_tt( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.sub.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -563,7 +563,7 @@ // CHECK-LABEL: @test_svsub_n_u32_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.sub.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -572,7 +572,7 @@ // CPP-CHECK-LABEL: @_Z18test_svsub_n_u32_zu10__SVBool_tu12__SVUint32_tj( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.sub.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -586,7 +586,7 @@ // CHECK-LABEL: @test_svsub_n_u64_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.sub.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -595,7 +595,7 @@ // CPP-CHECK-LABEL: @_Z18test_svsub_n_u64_zu10__SVBool_tu12__SVUint64_tm( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.sub.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -608,14 +608,14 @@ // CHECK-LABEL: @test_svsub_n_s8_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sub.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svsub_n_s8_mu10__SVBool_tu10__SVInt8_ta( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sub.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -628,7 +628,7 @@ // CHECK-LABEL: @test_svsub_n_s16_m( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sub.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -636,7 +636,7 @@ // CPP-CHECK-LABEL: @_Z18test_svsub_n_s16_mu10__SVBool_tu11__SVInt16_ts( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sub.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -649,7 +649,7 @@ // CHECK-LABEL: @test_svsub_n_s32_m( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sub.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -657,7 +657,7 @@ // CPP-CHECK-LABEL: @_Z18test_svsub_n_s32_mu10__SVBool_tu11__SVInt32_ti( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sub.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -670,7 +670,7 @@ // CHECK-LABEL: @test_svsub_n_s64_m( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sub.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -678,7 +678,7 @@ // CPP-CHECK-LABEL: @_Z18test_svsub_n_s64_mu10__SVBool_tu11__SVInt64_tl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sub.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -690,14 +690,14 @@ // CHECK-LABEL: @test_svsub_n_u8_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sub.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svsub_n_u8_mu10__SVBool_tu11__SVUint8_th( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sub.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -710,7 +710,7 @@ // CHECK-LABEL: @test_svsub_n_u16_m( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sub.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -718,7 +718,7 @@ // CPP-CHECK-LABEL: @_Z18test_svsub_n_u16_mu10__SVBool_tu12__SVUint16_tt( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sub.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -731,7 +731,7 @@ // CHECK-LABEL: @test_svsub_n_u32_m( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sub.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -739,7 +739,7 @@ // CPP-CHECK-LABEL: @_Z18test_svsub_n_u32_mu10__SVBool_tu12__SVUint32_tj( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sub.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -752,7 +752,7 @@ // CHECK-LABEL: @test_svsub_n_u64_m( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sub.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -760,7 +760,7 @@ // CPP-CHECK-LABEL: @_Z18test_svsub_n_u64_mu10__SVBool_tu12__SVUint64_tm( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sub.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -772,14 +772,14 @@ // CHECK-LABEL: @test_svsub_n_s8_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sub.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svsub_n_s8_xu10__SVBool_tu10__SVInt8_ta( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sub.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -792,7 +792,7 @@ // CHECK-LABEL: @test_svsub_n_s16_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sub.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -800,7 +800,7 @@ // CPP-CHECK-LABEL: @_Z18test_svsub_n_s16_xu10__SVBool_tu11__SVInt16_ts( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sub.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -813,7 +813,7 @@ // CHECK-LABEL: @test_svsub_n_s32_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sub.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -821,7 +821,7 @@ // CPP-CHECK-LABEL: @_Z18test_svsub_n_s32_xu10__SVBool_tu11__SVInt32_ti( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sub.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -834,7 +834,7 @@ // CHECK-LABEL: @test_svsub_n_s64_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sub.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -842,7 +842,7 @@ // CPP-CHECK-LABEL: @_Z18test_svsub_n_s64_xu10__SVBool_tu11__SVInt64_tl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sub.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -854,14 +854,14 @@ // CHECK-LABEL: @test_svsub_n_u8_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sub.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svsub_n_u8_xu10__SVBool_tu11__SVUint8_th( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sub.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -874,7 +874,7 @@ // CHECK-LABEL: @test_svsub_n_u16_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sub.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -882,7 +882,7 @@ // CPP-CHECK-LABEL: @_Z18test_svsub_n_u16_xu10__SVBool_tu12__SVUint16_tt( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sub.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -895,7 +895,7 @@ // CHECK-LABEL: @test_svsub_n_u32_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sub.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -903,7 +903,7 @@ // CPP-CHECK-LABEL: @_Z18test_svsub_n_u32_xu10__SVBool_tu12__SVUint32_tj( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sub.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -916,7 +916,7 @@ // CHECK-LABEL: @test_svsub_n_u64_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sub.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -924,7 +924,7 @@ // CPP-CHECK-LABEL: @_Z18test_svsub_n_u64_xu10__SVBool_tu12__SVUint64_tm( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sub.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -1096,7 +1096,7 @@ // CHECK-LABEL: @test_svsub_n_f16_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fsub.nxv8f16( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -1105,7 +1105,7 @@ // CPP-CHECK-LABEL: @_Z18test_svsub_n_f16_zu10__SVBool_tu13__SVFloat16_tDh( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fsub.nxv8f16( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -1119,7 +1119,7 @@ // CHECK-LABEL: @test_svsub_n_f32_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fsub.nxv4f32( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -1128,7 +1128,7 @@ // CPP-CHECK-LABEL: @_Z18test_svsub_n_f32_zu10__SVBool_tu13__SVFloat32_tf( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fsub.nxv4f32( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -1142,7 +1142,7 @@ // CHECK-LABEL: @test_svsub_n_f64_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fsub.nxv2f64( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -1151,7 +1151,7 @@ // CPP-CHECK-LABEL: @_Z18test_svsub_n_f64_zu10__SVBool_tu13__SVFloat64_td( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fsub.nxv2f64( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -1165,7 +1165,7 @@ // CHECK-LABEL: @test_svsub_n_f16_m( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fsub.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -1173,7 +1173,7 @@ // CPP-CHECK-LABEL: @_Z18test_svsub_n_f16_mu10__SVBool_tu13__SVFloat16_tDh( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fsub.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -1186,7 +1186,7 @@ // CHECK-LABEL: @test_svsub_n_f32_m( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fsub.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -1194,7 +1194,7 @@ // CPP-CHECK-LABEL: @_Z18test_svsub_n_f32_mu10__SVBool_tu13__SVFloat32_tf( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fsub.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -1207,7 +1207,7 @@ // CHECK-LABEL: @test_svsub_n_f64_m( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fsub.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -1215,7 +1215,7 @@ // CPP-CHECK-LABEL: @_Z18test_svsub_n_f64_mu10__SVBool_tu13__SVFloat64_td( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fsub.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -1228,7 +1228,7 @@ // CHECK-LABEL: @test_svsub_n_f16_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fsub.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -1236,7 +1236,7 @@ // CPP-CHECK-LABEL: @_Z18test_svsub_n_f16_xu10__SVBool_tu13__SVFloat16_tDh( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fsub.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -1249,7 +1249,7 @@ // CHECK-LABEL: @test_svsub_n_f32_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fsub.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -1257,7 +1257,7 @@ // CPP-CHECK-LABEL: @_Z18test_svsub_n_f32_xu10__SVBool_tu13__SVFloat32_tf( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fsub.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -1270,7 +1270,7 @@ // CHECK-LABEL: @test_svsub_n_f64_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fsub.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -1278,7 +1278,7 @@ // CPP-CHECK-LABEL: @_Z18test_svsub_n_f64_xu10__SVBool_tu13__SVFloat64_td( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fsub.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_subr.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_subr.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_subr.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_subr.c @@ -428,7 +428,7 @@ // CHECK-LABEL: @test_svsubr_n_s8_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.subr.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) @@ -436,7 +436,7 @@ // // CPP-CHECK-LABEL: @_Z18test_svsubr_n_s8_zu10__SVBool_tu10__SVInt8_ta( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.subr.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) @@ -450,7 +450,7 @@ // CHECK-LABEL: @test_svsubr_n_s16_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.subr.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -459,7 +459,7 @@ // CPP-CHECK-LABEL: @_Z19test_svsubr_n_s16_zu10__SVBool_tu11__SVInt16_ts( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.subr.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -473,7 +473,7 @@ // CHECK-LABEL: @test_svsubr_n_s32_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.subr.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -482,7 +482,7 @@ // CPP-CHECK-LABEL: @_Z19test_svsubr_n_s32_zu10__SVBool_tu11__SVInt32_ti( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.subr.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -496,7 +496,7 @@ // CHECK-LABEL: @test_svsubr_n_s64_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.subr.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -505,7 +505,7 @@ // CPP-CHECK-LABEL: @_Z19test_svsubr_n_s64_zu10__SVBool_tu11__SVInt64_tl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.subr.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -518,7 +518,7 @@ // CHECK-LABEL: @test_svsubr_n_u8_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.subr.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) @@ -526,7 +526,7 @@ // // CPP-CHECK-LABEL: @_Z18test_svsubr_n_u8_zu10__SVBool_tu11__SVUint8_th( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.subr.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) @@ -540,7 +540,7 @@ // CHECK-LABEL: @test_svsubr_n_u16_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.subr.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -549,7 +549,7 @@ // CPP-CHECK-LABEL: @_Z19test_svsubr_n_u16_zu10__SVBool_tu12__SVUint16_tt( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.subr.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -563,7 +563,7 @@ // CHECK-LABEL: @test_svsubr_n_u32_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.subr.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -572,7 +572,7 @@ // CPP-CHECK-LABEL: @_Z19test_svsubr_n_u32_zu10__SVBool_tu12__SVUint32_tj( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.subr.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -586,7 +586,7 @@ // CHECK-LABEL: @test_svsubr_n_u64_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.subr.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -595,7 +595,7 @@ // CPP-CHECK-LABEL: @_Z19test_svsubr_n_u64_zu10__SVBool_tu12__SVUint64_tm( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.subr.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -608,14 +608,14 @@ // CHECK-LABEL: @test_svsubr_n_s8_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.subr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svsubr_n_s8_mu10__SVBool_tu10__SVInt8_ta( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.subr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -628,7 +628,7 @@ // CHECK-LABEL: @test_svsubr_n_s16_m( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.subr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -636,7 +636,7 @@ // CPP-CHECK-LABEL: @_Z19test_svsubr_n_s16_mu10__SVBool_tu11__SVInt16_ts( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.subr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -649,7 +649,7 @@ // CHECK-LABEL: @test_svsubr_n_s32_m( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.subr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -657,7 +657,7 @@ // CPP-CHECK-LABEL: @_Z19test_svsubr_n_s32_mu10__SVBool_tu11__SVInt32_ti( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.subr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -670,7 +670,7 @@ // CHECK-LABEL: @test_svsubr_n_s64_m( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.subr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -678,7 +678,7 @@ // CPP-CHECK-LABEL: @_Z19test_svsubr_n_s64_mu10__SVBool_tu11__SVInt64_tl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.subr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -690,14 +690,14 @@ // CHECK-LABEL: @test_svsubr_n_u8_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.subr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svsubr_n_u8_mu10__SVBool_tu11__SVUint8_th( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.subr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -710,7 +710,7 @@ // CHECK-LABEL: @test_svsubr_n_u16_m( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.subr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -718,7 +718,7 @@ // CPP-CHECK-LABEL: @_Z19test_svsubr_n_u16_mu10__SVBool_tu12__SVUint16_tt( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.subr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -731,7 +731,7 @@ // CHECK-LABEL: @test_svsubr_n_u32_m( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.subr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -739,7 +739,7 @@ // CPP-CHECK-LABEL: @_Z19test_svsubr_n_u32_mu10__SVBool_tu12__SVUint32_tj( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.subr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -752,7 +752,7 @@ // CHECK-LABEL: @test_svsubr_n_u64_m( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.subr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -760,7 +760,7 @@ // CPP-CHECK-LABEL: @_Z19test_svsubr_n_u64_mu10__SVBool_tu12__SVUint64_tm( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.subr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -772,14 +772,14 @@ // CHECK-LABEL: @test_svsubr_n_s8_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.subr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svsubr_n_s8_xu10__SVBool_tu10__SVInt8_ta( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.subr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -792,7 +792,7 @@ // CHECK-LABEL: @test_svsubr_n_s16_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.subr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -800,7 +800,7 @@ // CPP-CHECK-LABEL: @_Z19test_svsubr_n_s16_xu10__SVBool_tu11__SVInt16_ts( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.subr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -813,7 +813,7 @@ // CHECK-LABEL: @test_svsubr_n_s32_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.subr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -821,7 +821,7 @@ // CPP-CHECK-LABEL: @_Z19test_svsubr_n_s32_xu10__SVBool_tu11__SVInt32_ti( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.subr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -834,7 +834,7 @@ // CHECK-LABEL: @test_svsubr_n_s64_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.subr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -842,7 +842,7 @@ // CPP-CHECK-LABEL: @_Z19test_svsubr_n_s64_xu10__SVBool_tu11__SVInt64_tl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.subr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -854,14 +854,14 @@ // CHECK-LABEL: @test_svsubr_n_u8_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.subr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svsubr_n_u8_xu10__SVBool_tu11__SVUint8_th( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.subr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -874,7 +874,7 @@ // CHECK-LABEL: @test_svsubr_n_u16_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.subr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -882,7 +882,7 @@ // CPP-CHECK-LABEL: @_Z19test_svsubr_n_u16_xu10__SVBool_tu12__SVUint16_tt( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.subr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -895,7 +895,7 @@ // CHECK-LABEL: @test_svsubr_n_u32_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.subr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -903,7 +903,7 @@ // CPP-CHECK-LABEL: @_Z19test_svsubr_n_u32_xu10__SVBool_tu12__SVUint32_tj( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.subr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -916,7 +916,7 @@ // CHECK-LABEL: @test_svsubr_n_u64_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.subr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -924,7 +924,7 @@ // CPP-CHECK-LABEL: @_Z19test_svsubr_n_u64_xu10__SVBool_tu12__SVUint64_tm( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.subr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -1096,7 +1096,7 @@ // CHECK-LABEL: @test_svsubr_n_f16_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fsubr.nxv8f16( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -1105,7 +1105,7 @@ // CPP-CHECK-LABEL: @_Z19test_svsubr_n_f16_zu10__SVBool_tu13__SVFloat16_tDh( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fsubr.nxv8f16( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -1119,7 +1119,7 @@ // CHECK-LABEL: @test_svsubr_n_f32_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fsubr.nxv4f32( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -1128,7 +1128,7 @@ // CPP-CHECK-LABEL: @_Z19test_svsubr_n_f32_zu10__SVBool_tu13__SVFloat32_tf( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fsubr.nxv4f32( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -1142,7 +1142,7 @@ // CHECK-LABEL: @test_svsubr_n_f64_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fsubr.nxv2f64( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -1151,7 +1151,7 @@ // CPP-CHECK-LABEL: @_Z19test_svsubr_n_f64_zu10__SVBool_tu13__SVFloat64_td( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fsubr.nxv2f64( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -1165,7 +1165,7 @@ // CHECK-LABEL: @test_svsubr_n_f16_m( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fsubr.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -1173,7 +1173,7 @@ // CPP-CHECK-LABEL: @_Z19test_svsubr_n_f16_mu10__SVBool_tu13__SVFloat16_tDh( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fsubr.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -1186,7 +1186,7 @@ // CHECK-LABEL: @test_svsubr_n_f32_m( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fsubr.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -1194,7 +1194,7 @@ // CPP-CHECK-LABEL: @_Z19test_svsubr_n_f32_mu10__SVBool_tu13__SVFloat32_tf( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fsubr.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -1207,7 +1207,7 @@ // CHECK-LABEL: @test_svsubr_n_f64_m( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fsubr.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -1215,7 +1215,7 @@ // CPP-CHECK-LABEL: @_Z19test_svsubr_n_f64_mu10__SVBool_tu13__SVFloat64_td( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fsubr.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -1228,7 +1228,7 @@ // CHECK-LABEL: @test_svsubr_n_f16_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fsubr.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -1236,7 +1236,7 @@ // CPP-CHECK-LABEL: @_Z19test_svsubr_n_f16_xu10__SVBool_tu13__SVFloat16_tDh( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fsubr.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -1249,7 +1249,7 @@ // CHECK-LABEL: @test_svsubr_n_f32_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fsubr.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -1257,7 +1257,7 @@ // CPP-CHECK-LABEL: @_Z19test_svsubr_n_f32_xu10__SVBool_tu13__SVFloat32_tf( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fsubr.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -1270,7 +1270,7 @@ // CHECK-LABEL: @test_svsubr_n_f64_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fsubr.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -1278,7 +1278,7 @@ // CPP-CHECK-LABEL: @_Z19test_svsubr_n_f64_xu10__SVBool_tu13__SVFloat64_td( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fsubr.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_sudot.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_sudot.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_sudot.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_sudot.c @@ -31,14 +31,14 @@ // CHECK-LABEL: @test_svsudot_n_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[Z:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[Z:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.usdot.nxv4i32( [[X:%.*]], [[TMP0]], [[Y:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svsudot_n_s32u11__SVInt32_tu10__SVInt8_th( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[Z:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[Z:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.usdot.nxv4i32( [[X:%.*]], [[TMP0]], [[Y:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_usdot.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_usdot.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_usdot.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_usdot.c @@ -31,14 +31,14 @@ // CHECK-LABEL: @test_svusdot_n_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[Z:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[Z:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.usdot.nxv4i32( [[X:%.*]], [[Y:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svusdot_n_s32u11__SVInt32_tu11__SVUint8_ta( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[Z:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[Z:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.usdot.nxv4i32( [[X:%.*]], [[Y:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_aba.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_aba.c --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_aba.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_aba.c @@ -155,14 +155,14 @@ // CHECK-LABEL: @test_svaba_n_s8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.saba.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z15test_svaba_n_s8u10__SVInt8_tu10__SVInt8_ta( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.saba.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -176,14 +176,14 @@ // CHECK-LABEL: @test_svaba_n_s16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.saba.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svaba_n_s16u11__SVInt16_tu11__SVInt16_ts( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.saba.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -197,14 +197,14 @@ // CHECK-LABEL: @test_svaba_n_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.saba.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svaba_n_s32u11__SVInt32_tu11__SVInt32_ti( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.saba.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -218,14 +218,14 @@ // CHECK-LABEL: @test_svaba_n_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.saba.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svaba_n_s64u11__SVInt64_tu11__SVInt64_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.saba.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -239,14 +239,14 @@ // CHECK-LABEL: @test_svaba_n_u8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uaba.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z15test_svaba_n_u8u11__SVUint8_tu11__SVUint8_th( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uaba.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -260,14 +260,14 @@ // CHECK-LABEL: @test_svaba_n_u16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uaba.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svaba_n_u16u12__SVUint16_tu12__SVUint16_tt( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uaba.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -281,14 +281,14 @@ // CHECK-LABEL: @test_svaba_n_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uaba.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svaba_n_u32u12__SVUint32_tu12__SVUint32_tj( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uaba.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -302,14 +302,14 @@ // CHECK-LABEL: @test_svaba_n_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uaba.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svaba_n_u64u12__SVUint64_tu12__SVUint64_tm( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uaba.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_abalb.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_abalb.c --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_abalb.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_abalb.c @@ -121,14 +121,14 @@ // CHECK-LABEL: @test_svabalb_n_s16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sabalb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svabalb_n_s16u11__SVInt16_tu10__SVInt8_ta( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sabalb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -142,14 +142,14 @@ // CHECK-LABEL: @test_svabalb_n_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sabalb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svabalb_n_s32u11__SVInt32_tu11__SVInt16_ts( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sabalb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -163,14 +163,14 @@ // CHECK-LABEL: @test_svabalb_n_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sabalb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svabalb_n_s64u11__SVInt64_tu11__SVInt32_ti( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sabalb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -184,14 +184,14 @@ // CHECK-LABEL: @test_svabalb_n_u16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uabalb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svabalb_n_u16u12__SVUint16_tu11__SVUint8_th( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uabalb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -205,14 +205,14 @@ // CHECK-LABEL: @test_svabalb_n_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uabalb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svabalb_n_u32u12__SVUint32_tu12__SVUint16_tt( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uabalb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -226,14 +226,14 @@ // CHECK-LABEL: @test_svabalb_n_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uabalb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svabalb_n_u64u12__SVUint64_tu12__SVUint32_tj( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uabalb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_abalt.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_abalt.c --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_abalt.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_abalt.c @@ -121,14 +121,14 @@ // CHECK-LABEL: @test_svabalt_n_s16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sabalt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svabalt_n_s16u11__SVInt16_tu10__SVInt8_ta( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sabalt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -142,14 +142,14 @@ // CHECK-LABEL: @test_svabalt_n_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sabalt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svabalt_n_s32u11__SVInt32_tu11__SVInt16_ts( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sabalt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -163,14 +163,14 @@ // CHECK-LABEL: @test_svabalt_n_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sabalt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svabalt_n_s64u11__SVInt64_tu11__SVInt32_ti( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sabalt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -184,14 +184,14 @@ // CHECK-LABEL: @test_svabalt_n_u16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uabalt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svabalt_n_u16u12__SVUint16_tu11__SVUint8_th( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uabalt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -205,14 +205,14 @@ // CHECK-LABEL: @test_svabalt_n_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uabalt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svabalt_n_u32u12__SVUint32_tu12__SVUint16_tt( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uabalt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -226,14 +226,14 @@ // CHECK-LABEL: @test_svabalt_n_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uabalt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svabalt_n_u64u12__SVUint64_tu12__SVUint32_tj( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uabalt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_abdlb.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_abdlb.c --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_abdlb.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_abdlb.c @@ -121,14 +121,14 @@ // CHECK-LABEL: @test_svabdlb_n_s16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sabdlb.nxv8i16( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svabdlb_n_s16u10__SVInt8_ta( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sabdlb.nxv8i16( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -142,14 +142,14 @@ // CHECK-LABEL: @test_svabdlb_n_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sabdlb.nxv4i32( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svabdlb_n_s32u11__SVInt16_ts( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sabdlb.nxv4i32( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -163,14 +163,14 @@ // CHECK-LABEL: @test_svabdlb_n_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sabdlb.nxv2i64( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svabdlb_n_s64u11__SVInt32_ti( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sabdlb.nxv2i64( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -184,14 +184,14 @@ // CHECK-LABEL: @test_svabdlb_n_u16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uabdlb.nxv8i16( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svabdlb_n_u16u11__SVUint8_th( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uabdlb.nxv8i16( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -205,14 +205,14 @@ // CHECK-LABEL: @test_svabdlb_n_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uabdlb.nxv4i32( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svabdlb_n_u32u12__SVUint16_tt( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uabdlb.nxv4i32( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -226,14 +226,14 @@ // CHECK-LABEL: @test_svabdlb_n_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uabdlb.nxv2i64( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svabdlb_n_u64u12__SVUint32_tj( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uabdlb.nxv2i64( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_abdlt.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_abdlt.c --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_abdlt.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_abdlt.c @@ -121,14 +121,14 @@ // CHECK-LABEL: @test_svabdlt_n_s16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sabdlt.nxv8i16( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svabdlt_n_s16u10__SVInt8_ta( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sabdlt.nxv8i16( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -142,14 +142,14 @@ // CHECK-LABEL: @test_svabdlt_n_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sabdlt.nxv4i32( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svabdlt_n_s32u11__SVInt16_ts( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sabdlt.nxv4i32( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -163,14 +163,14 @@ // CHECK-LABEL: @test_svabdlt_n_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sabdlt.nxv2i64( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svabdlt_n_s64u11__SVInt32_ti( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sabdlt.nxv2i64( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -184,14 +184,14 @@ // CHECK-LABEL: @test_svabdlt_n_u16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uabdlt.nxv8i16( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svabdlt_n_u16u11__SVUint8_th( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uabdlt.nxv8i16( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -205,14 +205,14 @@ // CHECK-LABEL: @test_svabdlt_n_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uabdlt.nxv4i32( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svabdlt_n_u32u12__SVUint16_tt( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uabdlt.nxv4i32( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -226,14 +226,14 @@ // CHECK-LABEL: @test_svabdlt_n_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uabdlt.nxv2i64( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svabdlt_n_u64u12__SVUint32_tj( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uabdlt.nxv2i64( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_adclb.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_adclb.c --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_adclb.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_adclb.c @@ -53,14 +53,14 @@ // CHECK-LABEL: @test_svadclb_n_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.adclb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svadclb_n_u32u12__SVUint32_tu12__SVUint32_tj( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.adclb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -74,14 +74,14 @@ // CHECK-LABEL: @test_svadclb_n_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.adclb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svadclb_n_u64u12__SVUint64_tu12__SVUint64_tm( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.adclb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_adclt.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_adclt.c --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_adclt.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_adclt.c @@ -53,14 +53,14 @@ // CHECK-LABEL: @test_svadclt_n_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.adclt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svadclt_n_u32u12__SVUint32_tu12__SVUint32_tj( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.adclt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -74,14 +74,14 @@ // CHECK-LABEL: @test_svadclt_n_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.adclt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svadclt_n_u64u12__SVUint64_tu12__SVUint64_tm( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.adclt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_addhnb.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_addhnb.c --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_addhnb.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_addhnb.c @@ -121,14 +121,14 @@ // CHECK-LABEL: @test_svaddhnb_n_s16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.addhnb.nxv8i16( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z19test_svaddhnb_n_s16u11__SVInt16_ts( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.addhnb.nxv8i16( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -142,14 +142,14 @@ // CHECK-LABEL: @test_svaddhnb_n_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.addhnb.nxv4i32( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z19test_svaddhnb_n_s32u11__SVInt32_ti( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.addhnb.nxv4i32( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -163,14 +163,14 @@ // CHECK-LABEL: @test_svaddhnb_n_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.addhnb.nxv2i64( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z19test_svaddhnb_n_s64u11__SVInt64_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.addhnb.nxv2i64( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -184,14 +184,14 @@ // CHECK-LABEL: @test_svaddhnb_n_u16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.addhnb.nxv8i16( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z19test_svaddhnb_n_u16u12__SVUint16_tt( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.addhnb.nxv8i16( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -205,14 +205,14 @@ // CHECK-LABEL: @test_svaddhnb_n_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.addhnb.nxv4i32( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z19test_svaddhnb_n_u32u12__SVUint32_tj( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.addhnb.nxv4i32( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -226,14 +226,14 @@ // CHECK-LABEL: @test_svaddhnb_n_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.addhnb.nxv2i64( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z19test_svaddhnb_n_u64u12__SVUint64_tm( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.addhnb.nxv2i64( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_addhnt.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_addhnt.c --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_addhnt.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_addhnt.c @@ -121,14 +121,14 @@ // CHECK-LABEL: @test_svaddhnt_n_s16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.addhnt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z19test_svaddhnt_n_s16u10__SVInt8_tu11__SVInt16_ts( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.addhnt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -142,14 +142,14 @@ // CHECK-LABEL: @test_svaddhnt_n_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.addhnt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z19test_svaddhnt_n_s32u11__SVInt16_tu11__SVInt32_ti( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.addhnt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -163,14 +163,14 @@ // CHECK-LABEL: @test_svaddhnt_n_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.addhnt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z19test_svaddhnt_n_s64u11__SVInt32_tu11__SVInt64_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.addhnt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -184,14 +184,14 @@ // CHECK-LABEL: @test_svaddhnt_n_u16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.addhnt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z19test_svaddhnt_n_u16u11__SVUint8_tu12__SVUint16_tt( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.addhnt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -205,14 +205,14 @@ // CHECK-LABEL: @test_svaddhnt_n_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.addhnt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z19test_svaddhnt_n_u32u12__SVUint16_tu12__SVUint32_tj( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.addhnt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -226,14 +226,14 @@ // CHECK-LABEL: @test_svaddhnt_n_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.addhnt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z19test_svaddhnt_n_u64u12__SVUint32_tu12__SVUint64_tm( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.addhnt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_addlb.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_addlb.c --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_addlb.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_addlb.c @@ -121,14 +121,14 @@ // CHECK-LABEL: @test_svaddlb_n_s16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.saddlb.nxv8i16( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svaddlb_n_s16u10__SVInt8_ta( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.saddlb.nxv8i16( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -142,14 +142,14 @@ // CHECK-LABEL: @test_svaddlb_n_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.saddlb.nxv4i32( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svaddlb_n_s32u11__SVInt16_ts( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.saddlb.nxv4i32( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -163,14 +163,14 @@ // CHECK-LABEL: @test_svaddlb_n_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.saddlb.nxv2i64( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svaddlb_n_s64u11__SVInt32_ti( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.saddlb.nxv2i64( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -184,14 +184,14 @@ // CHECK-LABEL: @test_svaddlb_n_u16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uaddlb.nxv8i16( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svaddlb_n_u16u11__SVUint8_th( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uaddlb.nxv8i16( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -205,14 +205,14 @@ // CHECK-LABEL: @test_svaddlb_n_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uaddlb.nxv4i32( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svaddlb_n_u32u12__SVUint16_tt( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uaddlb.nxv4i32( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -226,14 +226,14 @@ // CHECK-LABEL: @test_svaddlb_n_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uaddlb.nxv2i64( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svaddlb_n_u64u12__SVUint32_tj( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uaddlb.nxv2i64( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_addlbt.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_addlbt.c --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_addlbt.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_addlbt.c @@ -70,14 +70,14 @@ // CHECK-LABEL: @test_svaddlbt_n_s16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.saddlbt.nxv8i16( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z19test_svaddlbt_n_s16u10__SVInt8_ta( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.saddlbt.nxv8i16( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -91,14 +91,14 @@ // CHECK-LABEL: @test_svaddlbt_n_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.saddlbt.nxv4i32( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z19test_svaddlbt_n_s32u11__SVInt16_ts( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.saddlbt.nxv4i32( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -112,14 +112,14 @@ // CHECK-LABEL: @test_svaddlbt_n_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.saddlbt.nxv2i64( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z19test_svaddlbt_n_s64u11__SVInt32_ti( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.saddlbt.nxv2i64( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_addlt.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_addlt.c --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_addlt.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_addlt.c @@ -121,14 +121,14 @@ // CHECK-LABEL: @test_svaddlt_n_s16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.saddlt.nxv8i16( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svaddlt_n_s16u10__SVInt8_ta( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.saddlt.nxv8i16( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -142,14 +142,14 @@ // CHECK-LABEL: @test_svaddlt_n_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.saddlt.nxv4i32( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svaddlt_n_s32u11__SVInt16_ts( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.saddlt.nxv4i32( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -163,14 +163,14 @@ // CHECK-LABEL: @test_svaddlt_n_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.saddlt.nxv2i64( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svaddlt_n_s64u11__SVInt32_ti( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.saddlt.nxv2i64( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -184,14 +184,14 @@ // CHECK-LABEL: @test_svaddlt_n_u16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uaddlt.nxv8i16( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svaddlt_n_u16u11__SVUint8_th( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uaddlt.nxv8i16( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -205,14 +205,14 @@ // CHECK-LABEL: @test_svaddlt_n_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uaddlt.nxv4i32( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svaddlt_n_u32u12__SVUint16_tt( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uaddlt.nxv4i32( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -226,14 +226,14 @@ // CHECK-LABEL: @test_svaddlt_n_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uaddlt.nxv2i64( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svaddlt_n_u64u12__SVUint32_tj( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uaddlt.nxv2i64( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_addwb.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_addwb.c --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_addwb.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_addwb.c @@ -121,14 +121,14 @@ // CHECK-LABEL: @test_svaddwb_n_s16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.saddwb.nxv8i16( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svaddwb_n_s16u11__SVInt16_ta( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.saddwb.nxv8i16( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -142,14 +142,14 @@ // CHECK-LABEL: @test_svaddwb_n_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.saddwb.nxv4i32( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svaddwb_n_s32u11__SVInt32_ts( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.saddwb.nxv4i32( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -163,14 +163,14 @@ // CHECK-LABEL: @test_svaddwb_n_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.saddwb.nxv2i64( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svaddwb_n_s64u11__SVInt64_ti( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.saddwb.nxv2i64( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -184,14 +184,14 @@ // CHECK-LABEL: @test_svaddwb_n_u16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uaddwb.nxv8i16( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svaddwb_n_u16u12__SVUint16_th( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uaddwb.nxv8i16( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -205,14 +205,14 @@ // CHECK-LABEL: @test_svaddwb_n_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uaddwb.nxv4i32( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svaddwb_n_u32u12__SVUint32_tt( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uaddwb.nxv4i32( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -226,14 +226,14 @@ // CHECK-LABEL: @test_svaddwb_n_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uaddwb.nxv2i64( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svaddwb_n_u64u12__SVUint64_tj( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uaddwb.nxv2i64( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_addwt.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_addwt.c --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_addwt.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_addwt.c @@ -121,14 +121,14 @@ // CHECK-LABEL: @test_svaddwt_n_s16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.saddwt.nxv8i16( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svaddwt_n_s16u11__SVInt16_ta( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.saddwt.nxv8i16( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -142,14 +142,14 @@ // CHECK-LABEL: @test_svaddwt_n_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.saddwt.nxv4i32( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svaddwt_n_s32u11__SVInt32_ts( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.saddwt.nxv4i32( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -163,14 +163,14 @@ // CHECK-LABEL: @test_svaddwt_n_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.saddwt.nxv2i64( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svaddwt_n_s64u11__SVInt64_ti( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.saddwt.nxv2i64( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -184,14 +184,14 @@ // CHECK-LABEL: @test_svaddwt_n_u16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uaddwt.nxv8i16( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svaddwt_n_u16u12__SVUint16_th( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uaddwt.nxv8i16( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -205,14 +205,14 @@ // CHECK-LABEL: @test_svaddwt_n_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uaddwt.nxv4i32( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svaddwt_n_u32u12__SVUint32_tt( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uaddwt.nxv4i32( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -226,14 +226,14 @@ // CHECK-LABEL: @test_svaddwt_n_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uaddwt.nxv2i64( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svaddwt_n_u64u12__SVUint64_tj( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uaddwt.nxv2i64( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_bcax.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_bcax.c --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_bcax.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_bcax.c @@ -155,14 +155,14 @@ // CHECK-LABEL: @test_svbcax_n_s8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bcax.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svbcax_n_s8u10__SVInt8_tu10__SVInt8_ta( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bcax.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -176,14 +176,14 @@ // CHECK-LABEL: @test_svbcax_n_s16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bcax.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svbcax_n_s16u11__SVInt16_tu11__SVInt16_ts( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bcax.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -197,14 +197,14 @@ // CHECK-LABEL: @test_svbcax_n_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bcax.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svbcax_n_s32u11__SVInt32_tu11__SVInt32_ti( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bcax.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -218,14 +218,14 @@ // CHECK-LABEL: @test_svbcax_n_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bcax.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svbcax_n_s64u11__SVInt64_tu11__SVInt64_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bcax.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -239,14 +239,14 @@ // CHECK-LABEL: @test_svbcax_n_u8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bcax.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svbcax_n_u8u11__SVUint8_tu11__SVUint8_th( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bcax.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -260,14 +260,14 @@ // CHECK-LABEL: @test_svbcax_n_u16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bcax.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svbcax_n_u16u12__SVUint16_tu12__SVUint16_tt( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bcax.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -281,14 +281,14 @@ // CHECK-LABEL: @test_svbcax_n_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bcax.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svbcax_n_u32u12__SVUint32_tu12__SVUint32_tj( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bcax.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -302,14 +302,14 @@ // CHECK-LABEL: @test_svbcax_n_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bcax.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svbcax_n_u64u12__SVUint64_tu12__SVUint64_tm( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bcax.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_bdep.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_bdep.c --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_bdep.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_bdep.c @@ -87,14 +87,14 @@ // CHECK-LABEL: @test_svbdep_n_u8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bdep.x.nxv16i8( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svbdep_n_u8u11__SVUint8_th( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bdep.x.nxv16i8( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -108,14 +108,14 @@ // CHECK-LABEL: @test_svbdep_n_u16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bdep.x.nxv8i16( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svbdep_n_u16u12__SVUint16_tt( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bdep.x.nxv8i16( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -129,14 +129,14 @@ // CHECK-LABEL: @test_svbdep_n_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bdep.x.nxv4i32( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svbdep_n_u32u12__SVUint32_tj( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bdep.x.nxv4i32( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -150,14 +150,14 @@ // CHECK-LABEL: @test_svbdep_n_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bdep.x.nxv2i64( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svbdep_n_u64u12__SVUint64_tm( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bdep.x.nxv2i64( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_bext.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_bext.c --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_bext.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_bext.c @@ -87,14 +87,14 @@ // CHECK-LABEL: @test_svbext_n_u8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bext.x.nxv16i8( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svbext_n_u8u11__SVUint8_th( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bext.x.nxv16i8( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -108,14 +108,14 @@ // CHECK-LABEL: @test_svbext_n_u16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bext.x.nxv8i16( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svbext_n_u16u12__SVUint16_tt( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bext.x.nxv8i16( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -129,14 +129,14 @@ // CHECK-LABEL: @test_svbext_n_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bext.x.nxv4i32( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svbext_n_u32u12__SVUint32_tj( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bext.x.nxv4i32( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -150,14 +150,14 @@ // CHECK-LABEL: @test_svbext_n_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bext.x.nxv2i64( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svbext_n_u64u12__SVUint64_tm( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bext.x.nxv2i64( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_bgrp.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_bgrp.c --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_bgrp.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_bgrp.c @@ -87,14 +87,14 @@ // CHECK-LABEL: @test_svbgrp_n_u8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bgrp.x.nxv16i8( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svbgrp_n_u8u11__SVUint8_th( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bgrp.x.nxv16i8( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -108,14 +108,14 @@ // CHECK-LABEL: @test_svbgrp_n_u16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bgrp.x.nxv8i16( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svbgrp_n_u16u12__SVUint16_tt( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bgrp.x.nxv8i16( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -129,14 +129,14 @@ // CHECK-LABEL: @test_svbgrp_n_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bgrp.x.nxv4i32( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svbgrp_n_u32u12__SVUint32_tj( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bgrp.x.nxv4i32( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -150,14 +150,14 @@ // CHECK-LABEL: @test_svbgrp_n_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bgrp.x.nxv2i64( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svbgrp_n_u64u12__SVUint64_tm( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bgrp.x.nxv2i64( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_bsl.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_bsl.c --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_bsl.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_bsl.c @@ -155,14 +155,14 @@ // CHECK-LABEL: @test_svbsl_n_s8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bsl.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z15test_svbsl_n_s8u10__SVInt8_tu10__SVInt8_ta( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bsl.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -176,14 +176,14 @@ // CHECK-LABEL: @test_svbsl_n_s16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bsl.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svbsl_n_s16u11__SVInt16_tu11__SVInt16_ts( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bsl.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -197,14 +197,14 @@ // CHECK-LABEL: @test_svbsl_n_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bsl.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svbsl_n_s32u11__SVInt32_tu11__SVInt32_ti( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bsl.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -218,14 +218,14 @@ // CHECK-LABEL: @test_svbsl_n_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bsl.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svbsl_n_s64u11__SVInt64_tu11__SVInt64_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bsl.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -239,14 +239,14 @@ // CHECK-LABEL: @test_svbsl_n_u8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bsl.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z15test_svbsl_n_u8u11__SVUint8_tu11__SVUint8_th( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bsl.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -260,14 +260,14 @@ // CHECK-LABEL: @test_svbsl_n_u16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bsl.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svbsl_n_u16u12__SVUint16_tu12__SVUint16_tt( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bsl.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -281,14 +281,14 @@ // CHECK-LABEL: @test_svbsl_n_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bsl.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svbsl_n_u32u12__SVUint32_tu12__SVUint32_tj( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bsl.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -302,14 +302,14 @@ // CHECK-LABEL: @test_svbsl_n_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bsl.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svbsl_n_u64u12__SVUint64_tu12__SVUint64_tm( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bsl.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_bsl1n.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_bsl1n.c --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_bsl1n.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_bsl1n.c @@ -155,14 +155,14 @@ // CHECK-LABEL: @test_svbsl1n_n_s8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bsl1n.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svbsl1n_n_s8u10__SVInt8_tu10__SVInt8_ta( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bsl1n.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -176,14 +176,14 @@ // CHECK-LABEL: @test_svbsl1n_n_s16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bsl1n.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svbsl1n_n_s16u11__SVInt16_tu11__SVInt16_ts( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bsl1n.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -197,14 +197,14 @@ // CHECK-LABEL: @test_svbsl1n_n_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bsl1n.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svbsl1n_n_s32u11__SVInt32_tu11__SVInt32_ti( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bsl1n.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -218,14 +218,14 @@ // CHECK-LABEL: @test_svbsl1n_n_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bsl1n.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svbsl1n_n_s64u11__SVInt64_tu11__SVInt64_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bsl1n.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -239,14 +239,14 @@ // CHECK-LABEL: @test_svbsl1n_n_u8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bsl1n.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svbsl1n_n_u8u11__SVUint8_tu11__SVUint8_th( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bsl1n.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -260,14 +260,14 @@ // CHECK-LABEL: @test_svbsl1n_n_u16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bsl1n.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svbsl1n_n_u16u12__SVUint16_tu12__SVUint16_tt( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bsl1n.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -281,14 +281,14 @@ // CHECK-LABEL: @test_svbsl1n_n_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bsl1n.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svbsl1n_n_u32u12__SVUint32_tu12__SVUint32_tj( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bsl1n.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -302,14 +302,14 @@ // CHECK-LABEL: @test_svbsl1n_n_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bsl1n.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svbsl1n_n_u64u12__SVUint64_tu12__SVUint64_tm( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bsl1n.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_bsl2n.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_bsl2n.c --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_bsl2n.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_bsl2n.c @@ -155,14 +155,14 @@ // CHECK-LABEL: @test_svbsl2n_n_s8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bsl2n.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svbsl2n_n_s8u10__SVInt8_tu10__SVInt8_ta( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bsl2n.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -176,14 +176,14 @@ // CHECK-LABEL: @test_svbsl2n_n_s16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bsl2n.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svbsl2n_n_s16u11__SVInt16_tu11__SVInt16_ts( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bsl2n.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -197,14 +197,14 @@ // CHECK-LABEL: @test_svbsl2n_n_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bsl2n.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svbsl2n_n_s32u11__SVInt32_tu11__SVInt32_ti( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bsl2n.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -218,14 +218,14 @@ // CHECK-LABEL: @test_svbsl2n_n_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bsl2n.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svbsl2n_n_s64u11__SVInt64_tu11__SVInt64_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bsl2n.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -239,14 +239,14 @@ // CHECK-LABEL: @test_svbsl2n_n_u8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bsl2n.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svbsl2n_n_u8u11__SVUint8_tu11__SVUint8_th( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bsl2n.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -260,14 +260,14 @@ // CHECK-LABEL: @test_svbsl2n_n_u16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bsl2n.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svbsl2n_n_u16u12__SVUint16_tu12__SVUint16_tt( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bsl2n.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -281,14 +281,14 @@ // CHECK-LABEL: @test_svbsl2n_n_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bsl2n.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svbsl2n_n_u32u12__SVUint32_tu12__SVUint32_tj( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bsl2n.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -302,14 +302,14 @@ // CHECK-LABEL: @test_svbsl2n_n_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bsl2n.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svbsl2n_n_u64u12__SVUint64_tu12__SVUint64_tm( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bsl2n.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_eor3.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_eor3.c --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_eor3.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_eor3.c @@ -155,14 +155,14 @@ // CHECK-LABEL: @test_sveor3_n_s8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eor3.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_sveor3_n_s8u10__SVInt8_tu10__SVInt8_ta( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eor3.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -176,14 +176,14 @@ // CHECK-LABEL: @test_sveor3_n_s16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eor3.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_sveor3_n_s16u11__SVInt16_tu11__SVInt16_ts( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eor3.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -197,14 +197,14 @@ // CHECK-LABEL: @test_sveor3_n_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eor3.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_sveor3_n_s32u11__SVInt32_tu11__SVInt32_ti( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eor3.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -218,14 +218,14 @@ // CHECK-LABEL: @test_sveor3_n_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eor3.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_sveor3_n_s64u11__SVInt64_tu11__SVInt64_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eor3.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -239,14 +239,14 @@ // CHECK-LABEL: @test_sveor3_n_u8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eor3.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_sveor3_n_u8u11__SVUint8_tu11__SVUint8_th( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eor3.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -260,14 +260,14 @@ // CHECK-LABEL: @test_sveor3_n_u16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eor3.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_sveor3_n_u16u12__SVUint16_tu12__SVUint16_tt( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eor3.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -281,14 +281,14 @@ // CHECK-LABEL: @test_sveor3_n_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eor3.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_sveor3_n_u32u12__SVUint32_tu12__SVUint32_tj( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eor3.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -302,14 +302,14 @@ // CHECK-LABEL: @test_sveor3_n_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eor3.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_sveor3_n_u64u12__SVUint64_tu12__SVUint64_tm( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eor3.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_eorbt.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_eorbt.c --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_eorbt.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_eorbt.c @@ -155,14 +155,14 @@ // CHECK-LABEL: @test_sveorbt_n_s8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eorbt.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_sveorbt_n_s8u10__SVInt8_tu10__SVInt8_ta( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eorbt.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -176,14 +176,14 @@ // CHECK-LABEL: @test_sveorbt_n_s16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eorbt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_sveorbt_n_s16u11__SVInt16_tu11__SVInt16_ts( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eorbt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -197,14 +197,14 @@ // CHECK-LABEL: @test_sveorbt_n_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eorbt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_sveorbt_n_s32u11__SVInt32_tu11__SVInt32_ti( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eorbt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -218,14 +218,14 @@ // CHECK-LABEL: @test_sveorbt_n_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eorbt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_sveorbt_n_s64u11__SVInt64_tu11__SVInt64_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eorbt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -239,14 +239,14 @@ // CHECK-LABEL: @test_sveorbt_n_u8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eorbt.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_sveorbt_n_u8u11__SVUint8_tu11__SVUint8_th( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eorbt.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -260,14 +260,14 @@ // CHECK-LABEL: @test_sveorbt_n_u16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eorbt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_sveorbt_n_u16u12__SVUint16_tu12__SVUint16_tt( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eorbt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -281,14 +281,14 @@ // CHECK-LABEL: @test_sveorbt_n_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eorbt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_sveorbt_n_u32u12__SVUint32_tu12__SVUint32_tj( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eorbt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -302,14 +302,14 @@ // CHECK-LABEL: @test_sveorbt_n_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eorbt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_sveorbt_n_u64u12__SVUint64_tu12__SVUint64_tm( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eorbt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_eortb.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_eortb.c --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_eortb.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_eortb.c @@ -155,14 +155,14 @@ // CHECK-LABEL: @test_sveortb_n_s8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eortb.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_sveortb_n_s8u10__SVInt8_tu10__SVInt8_ta( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eortb.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -176,14 +176,14 @@ // CHECK-LABEL: @test_sveortb_n_s16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eortb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_sveortb_n_s16u11__SVInt16_tu11__SVInt16_ts( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eortb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -197,14 +197,14 @@ // CHECK-LABEL: @test_sveortb_n_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eortb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_sveortb_n_s32u11__SVInt32_tu11__SVInt32_ti( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eortb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -218,14 +218,14 @@ // CHECK-LABEL: @test_sveortb_n_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eortb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_sveortb_n_s64u11__SVInt64_tu11__SVInt64_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eortb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -239,14 +239,14 @@ // CHECK-LABEL: @test_sveortb_n_u8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eortb.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_sveortb_n_u8u11__SVUint8_tu11__SVUint8_th( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eortb.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -260,14 +260,14 @@ // CHECK-LABEL: @test_sveortb_n_u16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eortb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_sveortb_n_u16u12__SVUint16_tu12__SVUint16_tt( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eortb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -281,14 +281,14 @@ // CHECK-LABEL: @test_sveortb_n_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eortb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_sveortb_n_u32u12__SVUint32_tu12__SVUint32_tj( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eortb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -302,14 +302,14 @@ // CHECK-LABEL: @test_sveortb_n_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eortb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_sveortb_n_u64u12__SVUint64_tu12__SVUint64_tm( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eortb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_hadd.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_hadd.c --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_hadd.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_hadd.c @@ -168,14 +168,14 @@ // CHECK-LABEL: @test_svhadd_n_s8_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.shadd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svhadd_n_s8_mu10__SVBool_tu10__SVInt8_ta( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.shadd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -190,7 +190,7 @@ // CHECK-LABEL: @test_svhadd_n_s16_m( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.shadd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -198,7 +198,7 @@ // CPP-CHECK-LABEL: @_Z19test_svhadd_n_s16_mu10__SVBool_tu11__SVInt16_ts( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.shadd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -213,7 +213,7 @@ // CHECK-LABEL: @test_svhadd_n_s32_m( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.shadd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -221,7 +221,7 @@ // CPP-CHECK-LABEL: @_Z19test_svhadd_n_s32_mu10__SVBool_tu11__SVInt32_ti( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.shadd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -236,7 +236,7 @@ // CHECK-LABEL: @test_svhadd_n_s64_m( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.shadd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -244,7 +244,7 @@ // CPP-CHECK-LABEL: @_Z19test_svhadd_n_s64_mu10__SVBool_tu11__SVInt64_tl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.shadd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -258,14 +258,14 @@ // CHECK-LABEL: @test_svhadd_n_u8_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uhadd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svhadd_n_u8_mu10__SVBool_tu11__SVUint8_th( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uhadd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -280,7 +280,7 @@ // CHECK-LABEL: @test_svhadd_n_u16_m( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uhadd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -288,7 +288,7 @@ // CPP-CHECK-LABEL: @_Z19test_svhadd_n_u16_mu10__SVBool_tu12__SVUint16_tt( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uhadd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -303,7 +303,7 @@ // CHECK-LABEL: @test_svhadd_n_u32_m( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uhadd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -311,7 +311,7 @@ // CPP-CHECK-LABEL: @_Z19test_svhadd_n_u32_mu10__SVBool_tu12__SVUint32_tj( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uhadd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -326,7 +326,7 @@ // CHECK-LABEL: @test_svhadd_n_u64_m( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uhadd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -334,7 +334,7 @@ // CPP-CHECK-LABEL: @_Z19test_svhadd_n_u64_mu10__SVBool_tu12__SVUint64_tm( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uhadd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -513,7 +513,7 @@ // CHECK-LABEL: @test_svhadd_n_s8_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.shadd.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) @@ -521,7 +521,7 @@ // // CPP-CHECK-LABEL: @_Z18test_svhadd_n_s8_zu10__SVBool_tu10__SVInt8_ta( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.shadd.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) @@ -537,7 +537,7 @@ // CHECK-LABEL: @test_svhadd_n_s16_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.shadd.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -546,7 +546,7 @@ // CPP-CHECK-LABEL: @_Z19test_svhadd_n_s16_zu10__SVBool_tu11__SVInt16_ts( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.shadd.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -562,7 +562,7 @@ // CHECK-LABEL: @test_svhadd_n_s32_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.shadd.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -571,7 +571,7 @@ // CPP-CHECK-LABEL: @_Z19test_svhadd_n_s32_zu10__SVBool_tu11__SVInt32_ti( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.shadd.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -587,7 +587,7 @@ // CHECK-LABEL: @test_svhadd_n_s64_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.shadd.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -596,7 +596,7 @@ // CPP-CHECK-LABEL: @_Z19test_svhadd_n_s64_zu10__SVBool_tu11__SVInt64_tl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.shadd.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -611,7 +611,7 @@ // CHECK-LABEL: @test_svhadd_n_u8_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uhadd.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) @@ -619,7 +619,7 @@ // // CPP-CHECK-LABEL: @_Z18test_svhadd_n_u8_zu10__SVBool_tu11__SVUint8_th( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uhadd.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) @@ -635,7 +635,7 @@ // CHECK-LABEL: @test_svhadd_n_u16_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.uhadd.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -644,7 +644,7 @@ // CPP-CHECK-LABEL: @_Z19test_svhadd_n_u16_zu10__SVBool_tu12__SVUint16_tt( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.uhadd.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -660,7 +660,7 @@ // CHECK-LABEL: @test_svhadd_n_u32_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.uhadd.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -669,7 +669,7 @@ // CPP-CHECK-LABEL: @_Z19test_svhadd_n_u32_zu10__SVBool_tu12__SVUint32_tj( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.uhadd.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -685,7 +685,7 @@ // CHECK-LABEL: @test_svhadd_n_u64_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.uhadd.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -694,7 +694,7 @@ // CPP-CHECK-LABEL: @_Z19test_svhadd_n_u64_zu10__SVBool_tu12__SVUint64_tm( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.uhadd.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -858,14 +858,14 @@ // CHECK-LABEL: @test_svhadd_n_s8_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.shadd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svhadd_n_s8_xu10__SVBool_tu10__SVInt8_ta( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.shadd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -880,7 +880,7 @@ // CHECK-LABEL: @test_svhadd_n_s16_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.shadd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -888,7 +888,7 @@ // CPP-CHECK-LABEL: @_Z19test_svhadd_n_s16_xu10__SVBool_tu11__SVInt16_ts( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.shadd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -903,7 +903,7 @@ // CHECK-LABEL: @test_svhadd_n_s32_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.shadd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -911,7 +911,7 @@ // CPP-CHECK-LABEL: @_Z19test_svhadd_n_s32_xu10__SVBool_tu11__SVInt32_ti( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.shadd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -926,7 +926,7 @@ // CHECK-LABEL: @test_svhadd_n_s64_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.shadd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -934,7 +934,7 @@ // CPP-CHECK-LABEL: @_Z19test_svhadd_n_s64_xu10__SVBool_tu11__SVInt64_tl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.shadd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -948,14 +948,14 @@ // CHECK-LABEL: @test_svhadd_n_u8_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uhadd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svhadd_n_u8_xu10__SVBool_tu11__SVUint8_th( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uhadd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -970,7 +970,7 @@ // CHECK-LABEL: @test_svhadd_n_u16_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uhadd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -978,7 +978,7 @@ // CPP-CHECK-LABEL: @_Z19test_svhadd_n_u16_xu10__SVBool_tu12__SVUint16_tt( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uhadd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -993,7 +993,7 @@ // CHECK-LABEL: @test_svhadd_n_u32_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uhadd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -1001,7 +1001,7 @@ // CPP-CHECK-LABEL: @_Z19test_svhadd_n_u32_xu10__SVBool_tu12__SVUint32_tj( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uhadd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -1016,7 +1016,7 @@ // CHECK-LABEL: @test_svhadd_n_u64_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uhadd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -1024,7 +1024,7 @@ // CPP-CHECK-LABEL: @_Z19test_svhadd_n_u64_xu10__SVBool_tu12__SVUint64_tm( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uhadd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_hsub.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_hsub.c --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_hsub.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_hsub.c @@ -479,7 +479,7 @@ // CHECK-LABEL: @test_svhsub_n_s8_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.shsub.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) @@ -487,7 +487,7 @@ // // CPP-CHECK-LABEL: @_Z18test_svhsub_n_s8_zu10__SVBool_tu10__SVInt8_ta( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.shsub.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) @@ -503,7 +503,7 @@ // CHECK-LABEL: @test_svhsub_n_s16_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.shsub.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -512,7 +512,7 @@ // CPP-CHECK-LABEL: @_Z19test_svhsub_n_s16_zu10__SVBool_tu11__SVInt16_ts( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.shsub.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -528,7 +528,7 @@ // CHECK-LABEL: @test_svhsub_n_s32_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.shsub.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -537,7 +537,7 @@ // CPP-CHECK-LABEL: @_Z19test_svhsub_n_s32_zu10__SVBool_tu11__SVInt32_ti( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.shsub.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -553,7 +553,7 @@ // CHECK-LABEL: @test_svhsub_n_s64_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.shsub.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -562,7 +562,7 @@ // CPP-CHECK-LABEL: @_Z19test_svhsub_n_s64_zu10__SVBool_tu11__SVInt64_tl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.shsub.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -577,7 +577,7 @@ // CHECK-LABEL: @test_svhsub_n_u8_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uhsub.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) @@ -585,7 +585,7 @@ // // CPP-CHECK-LABEL: @_Z18test_svhsub_n_u8_zu10__SVBool_tu11__SVUint8_th( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uhsub.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) @@ -601,7 +601,7 @@ // CHECK-LABEL: @test_svhsub_n_u16_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.uhsub.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -610,7 +610,7 @@ // CPP-CHECK-LABEL: @_Z19test_svhsub_n_u16_zu10__SVBool_tu12__SVUint16_tt( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.uhsub.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -626,7 +626,7 @@ // CHECK-LABEL: @test_svhsub_n_u32_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.uhsub.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -635,7 +635,7 @@ // CPP-CHECK-LABEL: @_Z19test_svhsub_n_u32_zu10__SVBool_tu12__SVUint32_tj( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.uhsub.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -651,7 +651,7 @@ // CHECK-LABEL: @test_svhsub_n_u64_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.uhsub.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -660,7 +660,7 @@ // CPP-CHECK-LABEL: @_Z19test_svhsub_n_u64_zu10__SVBool_tu12__SVUint64_tm( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.uhsub.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -675,14 +675,14 @@ // CHECK-LABEL: @test_svhsub_n_s8_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.shsub.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svhsub_n_s8_mu10__SVBool_tu10__SVInt8_ta( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.shsub.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -697,7 +697,7 @@ // CHECK-LABEL: @test_svhsub_n_s16_m( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.shsub.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -705,7 +705,7 @@ // CPP-CHECK-LABEL: @_Z19test_svhsub_n_s16_mu10__SVBool_tu11__SVInt16_ts( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.shsub.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -720,7 +720,7 @@ // CHECK-LABEL: @test_svhsub_n_s32_m( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.shsub.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -728,7 +728,7 @@ // CPP-CHECK-LABEL: @_Z19test_svhsub_n_s32_mu10__SVBool_tu11__SVInt32_ti( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.shsub.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -743,7 +743,7 @@ // CHECK-LABEL: @test_svhsub_n_s64_m( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.shsub.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -751,7 +751,7 @@ // CPP-CHECK-LABEL: @_Z19test_svhsub_n_s64_mu10__SVBool_tu11__SVInt64_tl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.shsub.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -765,14 +765,14 @@ // CHECK-LABEL: @test_svhsub_n_u8_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uhsub.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svhsub_n_u8_mu10__SVBool_tu11__SVUint8_th( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uhsub.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -787,7 +787,7 @@ // CHECK-LABEL: @test_svhsub_n_u16_m( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uhsub.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -795,7 +795,7 @@ // CPP-CHECK-LABEL: @_Z19test_svhsub_n_u16_mu10__SVBool_tu12__SVUint16_tt( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uhsub.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -810,7 +810,7 @@ // CHECK-LABEL: @test_svhsub_n_u32_m( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uhsub.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -818,7 +818,7 @@ // CPP-CHECK-LABEL: @_Z19test_svhsub_n_u32_mu10__SVBool_tu12__SVUint32_tj( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uhsub.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -833,7 +833,7 @@ // CHECK-LABEL: @test_svhsub_n_u64_m( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uhsub.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -841,7 +841,7 @@ // CPP-CHECK-LABEL: @_Z19test_svhsub_n_u64_mu10__SVBool_tu12__SVUint64_tm( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uhsub.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -855,14 +855,14 @@ // CHECK-LABEL: @test_svhsub_n_s8_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.shsub.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svhsub_n_s8_xu10__SVBool_tu10__SVInt8_ta( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.shsub.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -877,7 +877,7 @@ // CHECK-LABEL: @test_svhsub_n_s16_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.shsub.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -885,7 +885,7 @@ // CPP-CHECK-LABEL: @_Z19test_svhsub_n_s16_xu10__SVBool_tu11__SVInt16_ts( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.shsub.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -900,7 +900,7 @@ // CHECK-LABEL: @test_svhsub_n_s32_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.shsub.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -908,7 +908,7 @@ // CPP-CHECK-LABEL: @_Z19test_svhsub_n_s32_xu10__SVBool_tu11__SVInt32_ti( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.shsub.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -923,7 +923,7 @@ // CHECK-LABEL: @test_svhsub_n_s64_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.shsub.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -931,7 +931,7 @@ // CPP-CHECK-LABEL: @_Z19test_svhsub_n_s64_xu10__SVBool_tu11__SVInt64_tl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.shsub.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -945,14 +945,14 @@ // CHECK-LABEL: @test_svhsub_n_u8_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uhsub.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svhsub_n_u8_xu10__SVBool_tu11__SVUint8_th( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uhsub.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -967,7 +967,7 @@ // CHECK-LABEL: @test_svhsub_n_u16_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uhsub.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -975,7 +975,7 @@ // CPP-CHECK-LABEL: @_Z19test_svhsub_n_u16_xu10__SVBool_tu12__SVUint16_tt( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uhsub.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -990,7 +990,7 @@ // CHECK-LABEL: @test_svhsub_n_u32_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uhsub.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -998,7 +998,7 @@ // CPP-CHECK-LABEL: @_Z19test_svhsub_n_u32_xu10__SVBool_tu12__SVUint32_tj( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uhsub.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -1013,7 +1013,7 @@ // CHECK-LABEL: @test_svhsub_n_u64_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uhsub.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -1021,7 +1021,7 @@ // CPP-CHECK-LABEL: @_Z19test_svhsub_n_u64_xu10__SVBool_tu12__SVUint64_tm( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uhsub.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_hsubr.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_hsubr.c --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_hsubr.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_hsubr.c @@ -479,7 +479,7 @@ // CHECK-LABEL: @test_svhsubr_n_s8_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.shsubr.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) @@ -487,7 +487,7 @@ // // CPP-CHECK-LABEL: @_Z19test_svhsubr_n_s8_zu10__SVBool_tu10__SVInt8_ta( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.shsubr.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) @@ -503,7 +503,7 @@ // CHECK-LABEL: @test_svhsubr_n_s16_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.shsubr.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -512,7 +512,7 @@ // CPP-CHECK-LABEL: @_Z20test_svhsubr_n_s16_zu10__SVBool_tu11__SVInt16_ts( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.shsubr.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -528,7 +528,7 @@ // CHECK-LABEL: @test_svhsubr_n_s32_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.shsubr.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -537,7 +537,7 @@ // CPP-CHECK-LABEL: @_Z20test_svhsubr_n_s32_zu10__SVBool_tu11__SVInt32_ti( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.shsubr.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -553,7 +553,7 @@ // CHECK-LABEL: @test_svhsubr_n_s64_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.shsubr.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -562,7 +562,7 @@ // CPP-CHECK-LABEL: @_Z20test_svhsubr_n_s64_zu10__SVBool_tu11__SVInt64_tl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.shsubr.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -577,7 +577,7 @@ // CHECK-LABEL: @test_svhsubr_n_u8_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uhsubr.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) @@ -585,7 +585,7 @@ // // CPP-CHECK-LABEL: @_Z19test_svhsubr_n_u8_zu10__SVBool_tu11__SVUint8_th( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uhsubr.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) @@ -601,7 +601,7 @@ // CHECK-LABEL: @test_svhsubr_n_u16_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.uhsubr.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -610,7 +610,7 @@ // CPP-CHECK-LABEL: @_Z20test_svhsubr_n_u16_zu10__SVBool_tu12__SVUint16_tt( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.uhsubr.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -626,7 +626,7 @@ // CHECK-LABEL: @test_svhsubr_n_u32_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.uhsubr.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -635,7 +635,7 @@ // CPP-CHECK-LABEL: @_Z20test_svhsubr_n_u32_zu10__SVBool_tu12__SVUint32_tj( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.uhsubr.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -651,7 +651,7 @@ // CHECK-LABEL: @test_svhsubr_n_u64_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.uhsubr.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -660,7 +660,7 @@ // CPP-CHECK-LABEL: @_Z20test_svhsubr_n_u64_zu10__SVBool_tu12__SVUint64_tm( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.uhsubr.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -675,14 +675,14 @@ // CHECK-LABEL: @test_svhsubr_n_s8_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.shsubr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z19test_svhsubr_n_s8_mu10__SVBool_tu10__SVInt8_ta( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.shsubr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -697,7 +697,7 @@ // CHECK-LABEL: @test_svhsubr_n_s16_m( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.shsubr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -705,7 +705,7 @@ // CPP-CHECK-LABEL: @_Z20test_svhsubr_n_s16_mu10__SVBool_tu11__SVInt16_ts( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.shsubr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -720,7 +720,7 @@ // CHECK-LABEL: @test_svhsubr_n_s32_m( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.shsubr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -728,7 +728,7 @@ // CPP-CHECK-LABEL: @_Z20test_svhsubr_n_s32_mu10__SVBool_tu11__SVInt32_ti( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.shsubr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -743,7 +743,7 @@ // CHECK-LABEL: @test_svhsubr_n_s64_m( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.shsubr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -751,7 +751,7 @@ // CPP-CHECK-LABEL: @_Z20test_svhsubr_n_s64_mu10__SVBool_tu11__SVInt64_tl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.shsubr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -765,14 +765,14 @@ // CHECK-LABEL: @test_svhsubr_n_u8_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uhsubr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z19test_svhsubr_n_u8_mu10__SVBool_tu11__SVUint8_th( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uhsubr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -787,7 +787,7 @@ // CHECK-LABEL: @test_svhsubr_n_u16_m( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uhsubr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -795,7 +795,7 @@ // CPP-CHECK-LABEL: @_Z20test_svhsubr_n_u16_mu10__SVBool_tu12__SVUint16_tt( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uhsubr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -810,7 +810,7 @@ // CHECK-LABEL: @test_svhsubr_n_u32_m( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uhsubr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -818,7 +818,7 @@ // CPP-CHECK-LABEL: @_Z20test_svhsubr_n_u32_mu10__SVBool_tu12__SVUint32_tj( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uhsubr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -833,7 +833,7 @@ // CHECK-LABEL: @test_svhsubr_n_u64_m( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uhsubr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -841,7 +841,7 @@ // CPP-CHECK-LABEL: @_Z20test_svhsubr_n_u64_mu10__SVBool_tu12__SVUint64_tm( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uhsubr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -855,14 +855,14 @@ // CHECK-LABEL: @test_svhsubr_n_s8_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.shsubr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z19test_svhsubr_n_s8_xu10__SVBool_tu10__SVInt8_ta( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.shsubr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -877,7 +877,7 @@ // CHECK-LABEL: @test_svhsubr_n_s16_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.shsubr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -885,7 +885,7 @@ // CPP-CHECK-LABEL: @_Z20test_svhsubr_n_s16_xu10__SVBool_tu11__SVInt16_ts( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.shsubr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -900,7 +900,7 @@ // CHECK-LABEL: @test_svhsubr_n_s32_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.shsubr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -908,7 +908,7 @@ // CPP-CHECK-LABEL: @_Z20test_svhsubr_n_s32_xu10__SVBool_tu11__SVInt32_ti( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.shsubr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -923,7 +923,7 @@ // CHECK-LABEL: @test_svhsubr_n_s64_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.shsubr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -931,7 +931,7 @@ // CPP-CHECK-LABEL: @_Z20test_svhsubr_n_s64_xu10__SVBool_tu11__SVInt64_tl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.shsubr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -945,14 +945,14 @@ // CHECK-LABEL: @test_svhsubr_n_u8_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uhsubr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z19test_svhsubr_n_u8_xu10__SVBool_tu11__SVUint8_th( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uhsubr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -967,7 +967,7 @@ // CHECK-LABEL: @test_svhsubr_n_u16_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uhsubr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -975,7 +975,7 @@ // CPP-CHECK-LABEL: @_Z20test_svhsubr_n_u16_xu10__SVBool_tu12__SVUint16_tt( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uhsubr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -990,7 +990,7 @@ // CHECK-LABEL: @test_svhsubr_n_u32_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uhsubr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -998,7 +998,7 @@ // CPP-CHECK-LABEL: @_Z20test_svhsubr_n_u32_xu10__SVBool_tu12__SVUint32_tj( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uhsubr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -1013,7 +1013,7 @@ // CHECK-LABEL: @test_svhsubr_n_u64_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uhsubr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -1021,7 +1021,7 @@ // CPP-CHECK-LABEL: @_Z20test_svhsubr_n_u64_xu10__SVBool_tu12__SVUint64_tm( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uhsubr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_mlalb.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_mlalb.c --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_mlalb.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_mlalb.c @@ -121,14 +121,14 @@ // CHECK-LABEL: @test_svmlalb_n_s16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smlalb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svmlalb_n_s16u11__SVInt16_tu10__SVInt8_ta( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smlalb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -142,14 +142,14 @@ // CHECK-LABEL: @test_svmlalb_n_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smlalb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svmlalb_n_s32u11__SVInt32_tu11__SVInt16_ts( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smlalb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -163,14 +163,14 @@ // CHECK-LABEL: @test_svmlalb_n_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smlalb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svmlalb_n_s64u11__SVInt64_tu11__SVInt32_ti( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smlalb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -184,14 +184,14 @@ // CHECK-LABEL: @test_svmlalb_n_u16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umlalb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svmlalb_n_u16u12__SVUint16_tu11__SVUint8_th( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umlalb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -205,14 +205,14 @@ // CHECK-LABEL: @test_svmlalb_n_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umlalb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svmlalb_n_u32u12__SVUint32_tu12__SVUint16_tt( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umlalb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -226,14 +226,14 @@ // CHECK-LABEL: @test_svmlalb_n_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umlalb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svmlalb_n_u64u12__SVUint64_tu12__SVUint32_tj( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umlalb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -400,14 +400,14 @@ // CHECK-LABEL: @test_svmlalb_n_f32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmlalb.nxv4f32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svmlalb_n_f32u13__SVFloat32_tu13__SVFloat16_tDh( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmlalb.nxv4f32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_mlalt.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_mlalt.c --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_mlalt.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_mlalt.c @@ -121,14 +121,14 @@ // CHECK-LABEL: @test_svmlalt_n_s16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smlalt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svmlalt_n_s16u11__SVInt16_tu10__SVInt8_ta( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smlalt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -142,14 +142,14 @@ // CHECK-LABEL: @test_svmlalt_n_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smlalt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svmlalt_n_s32u11__SVInt32_tu11__SVInt16_ts( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smlalt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -163,14 +163,14 @@ // CHECK-LABEL: @test_svmlalt_n_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smlalt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svmlalt_n_s64u11__SVInt64_tu11__SVInt32_ti( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smlalt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -184,14 +184,14 @@ // CHECK-LABEL: @test_svmlalt_n_u16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umlalt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svmlalt_n_u16u12__SVUint16_tu11__SVUint8_th( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umlalt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -205,14 +205,14 @@ // CHECK-LABEL: @test_svmlalt_n_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umlalt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svmlalt_n_u32u12__SVUint32_tu12__SVUint16_tt( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umlalt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -226,14 +226,14 @@ // CHECK-LABEL: @test_svmlalt_n_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umlalt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svmlalt_n_u64u12__SVUint64_tu12__SVUint32_tj( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umlalt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -400,14 +400,14 @@ // CHECK-LABEL: @test_svmlalt_n_f32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmlalt.nxv4f32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svmlalt_n_f32u13__SVFloat32_tu13__SVFloat16_tDh( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmlalt.nxv4f32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_mlslb.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_mlslb.c --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_mlslb.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_mlslb.c @@ -121,14 +121,14 @@ // CHECK-LABEL: @test_svmlslb_n_s16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smlslb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svmlslb_n_s16u11__SVInt16_tu10__SVInt8_ta( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smlslb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -142,14 +142,14 @@ // CHECK-LABEL: @test_svmlslb_n_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smlslb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svmlslb_n_s32u11__SVInt32_tu11__SVInt16_ts( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smlslb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -163,14 +163,14 @@ // CHECK-LABEL: @test_svmlslb_n_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smlslb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svmlslb_n_s64u11__SVInt64_tu11__SVInt32_ti( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smlslb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -184,14 +184,14 @@ // CHECK-LABEL: @test_svmlslb_n_u16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umlslb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svmlslb_n_u16u12__SVUint16_tu11__SVUint8_th( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umlslb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -205,14 +205,14 @@ // CHECK-LABEL: @test_svmlslb_n_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umlslb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svmlslb_n_u32u12__SVUint32_tu12__SVUint16_tt( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umlslb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -226,14 +226,14 @@ // CHECK-LABEL: @test_svmlslb_n_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umlslb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svmlslb_n_u64u12__SVUint64_tu12__SVUint32_tj( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umlslb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -400,14 +400,14 @@ // CHECK-LABEL: @test_svmlslb_n_f32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmlslb.nxv4f32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svmlslb_n_f32u13__SVFloat32_tu13__SVFloat16_tDh( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmlslb.nxv4f32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_mlslt.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_mlslt.c --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_mlslt.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_mlslt.c @@ -121,14 +121,14 @@ // CHECK-LABEL: @test_svmlslt_n_s16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smlslt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svmlslt_n_s16u11__SVInt16_tu10__SVInt8_ta( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smlslt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -142,14 +142,14 @@ // CHECK-LABEL: @test_svmlslt_n_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smlslt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svmlslt_n_s32u11__SVInt32_tu11__SVInt16_ts( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smlslt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -163,14 +163,14 @@ // CHECK-LABEL: @test_svmlslt_n_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smlslt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svmlslt_n_s64u11__SVInt64_tu11__SVInt32_ti( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smlslt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -184,14 +184,14 @@ // CHECK-LABEL: @test_svmlslt_n_u16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umlslt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svmlslt_n_u16u12__SVUint16_tu11__SVUint8_th( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umlslt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -205,14 +205,14 @@ // CHECK-LABEL: @test_svmlslt_n_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umlslt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svmlslt_n_u32u12__SVUint32_tu12__SVUint16_tt( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umlslt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -226,14 +226,14 @@ // CHECK-LABEL: @test_svmlslt_n_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umlslt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svmlslt_n_u64u12__SVUint64_tu12__SVUint32_tj( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umlslt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -400,14 +400,14 @@ // CHECK-LABEL: @test_svmlslt_n_f32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmlslt.nxv4f32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svmlslt_n_f32u13__SVFloat32_tu13__SVFloat16_tDh( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmlslt.nxv4f32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_mullb.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_mullb.c --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_mullb.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_mullb.c @@ -121,14 +121,14 @@ // CHECK-LABEL: @test_svmullb_n_s16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smullb.nxv8i16( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svmullb_n_s16u10__SVInt8_ta( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smullb.nxv8i16( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -142,14 +142,14 @@ // CHECK-LABEL: @test_svmullb_n_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smullb.nxv4i32( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svmullb_n_s32u11__SVInt16_ts( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smullb.nxv4i32( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -163,14 +163,14 @@ // CHECK-LABEL: @test_svmullb_n_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smullb.nxv2i64( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svmullb_n_s64u11__SVInt32_ti( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smullb.nxv2i64( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -184,14 +184,14 @@ // CHECK-LABEL: @test_svmullb_n_u16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umullb.nxv8i16( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svmullb_n_u16u11__SVUint8_th( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umullb.nxv8i16( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -205,14 +205,14 @@ // CHECK-LABEL: @test_svmullb_n_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umullb.nxv4i32( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svmullb_n_u32u12__SVUint16_tt( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umullb.nxv4i32( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -226,14 +226,14 @@ // CHECK-LABEL: @test_svmullb_n_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umullb.nxv2i64( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svmullb_n_u64u12__SVUint32_tj( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umullb.nxv2i64( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_mullt.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_mullt.c --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_mullt.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_mullt.c @@ -121,14 +121,14 @@ // CHECK-LABEL: @test_svmullt_n_s16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smullt.nxv8i16( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svmullt_n_s16u10__SVInt8_ta( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smullt.nxv8i16( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -142,14 +142,14 @@ // CHECK-LABEL: @test_svmullt_n_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smullt.nxv4i32( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svmullt_n_s32u11__SVInt16_ts( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smullt.nxv4i32( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -163,14 +163,14 @@ // CHECK-LABEL: @test_svmullt_n_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smullt.nxv2i64( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svmullt_n_s64u11__SVInt32_ti( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smullt.nxv2i64( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -184,14 +184,14 @@ // CHECK-LABEL: @test_svmullt_n_u16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umullt.nxv8i16( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svmullt_n_u16u11__SVUint8_th( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umullt.nxv8i16( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -205,14 +205,14 @@ // CHECK-LABEL: @test_svmullt_n_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umullt.nxv4i32( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svmullt_n_u32u12__SVUint16_tt( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umullt.nxv4i32( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -226,14 +226,14 @@ // CHECK-LABEL: @test_svmullt_n_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umullt.nxv2i64( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svmullt_n_u64u12__SVUint32_tj( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umullt.nxv2i64( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_nbsl.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_nbsl.c --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_nbsl.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_nbsl.c @@ -155,14 +155,14 @@ // CHECK-LABEL: @test_svnbsl_n_s8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.nbsl.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svnbsl_n_s8u10__SVInt8_tu10__SVInt8_ta( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.nbsl.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -176,14 +176,14 @@ // CHECK-LABEL: @test_svnbsl_n_s16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.nbsl.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svnbsl_n_s16u11__SVInt16_tu11__SVInt16_ts( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.nbsl.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -197,14 +197,14 @@ // CHECK-LABEL: @test_svnbsl_n_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.nbsl.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svnbsl_n_s32u11__SVInt32_tu11__SVInt32_ti( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.nbsl.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -218,14 +218,14 @@ // CHECK-LABEL: @test_svnbsl_n_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.nbsl.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svnbsl_n_s64u11__SVInt64_tu11__SVInt64_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.nbsl.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -239,14 +239,14 @@ // CHECK-LABEL: @test_svnbsl_n_u8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.nbsl.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svnbsl_n_u8u11__SVUint8_tu11__SVUint8_th( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.nbsl.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -260,14 +260,14 @@ // CHECK-LABEL: @test_svnbsl_n_u16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.nbsl.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svnbsl_n_u16u12__SVUint16_tu12__SVUint16_tt( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.nbsl.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -281,14 +281,14 @@ // CHECK-LABEL: @test_svnbsl_n_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.nbsl.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svnbsl_n_u32u12__SVUint32_tu12__SVUint32_tj( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.nbsl.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -302,14 +302,14 @@ // CHECK-LABEL: @test_svnbsl_n_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.nbsl.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svnbsl_n_u64u12__SVUint64_tu12__SVUint64_tm( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.nbsl.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_pmul.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_pmul.c --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_pmul.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_pmul.c @@ -36,14 +36,14 @@ // CHECK-LABEL: @test_svpmul_n_u8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.pmul.nxv16i8( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svpmul_n_u8u11__SVUint8_th( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.pmul.nxv16i8( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_pmullb.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_pmullb.c --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_pmullb.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_pmullb.c @@ -53,14 +53,14 @@ // CHECK-LABEL: @test_svpmullb_pair_n_u8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.pmullb.pair.nxv16i8( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z23test_svpmullb_pair_n_u8u11__SVUint8_th( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.pmullb.pair.nxv16i8( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -74,14 +74,14 @@ // CHECK-LABEL: @test_svpmullb_pair_n_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.pmullb.pair.nxv4i32( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z24test_svpmullb_pair_n_u32u12__SVUint32_tj( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.pmullb.pair.nxv4i32( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -133,7 +133,7 @@ // CHECK-LABEL: @test_svpmullb_n_u16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.pmullb.pair.nxv16i8( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: [[TMP2:%.*]] = bitcast [[TMP1]] to @@ -141,7 +141,7 @@ // // CPP-CHECK-LABEL: @_Z19test_svpmullb_n_u16u11__SVUint8_th( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.pmullb.pair.nxv16i8( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = bitcast [[TMP1]] to @@ -156,7 +156,7 @@ // CHECK-LABEL: @test_svpmullb_n_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.pmullb.pair.nxv4i32( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: [[TMP2:%.*]] = bitcast [[TMP1]] to @@ -164,7 +164,7 @@ // // CPP-CHECK-LABEL: @_Z19test_svpmullb_n_u64u12__SVUint32_tj( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.pmullb.pair.nxv4i32( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = bitcast [[TMP1]] to diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_pmullb_128.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_pmullb_128.c --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_pmullb_128.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_pmullb_128.c @@ -36,14 +36,14 @@ // CHECK-LABEL: @test_svpmullb_pair_n_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.pmullb.pair.nxv2i64( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z24test_svpmullb_pair_n_u64u12__SVUint64_tm( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.pmullb.pair.nxv2i64( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_pmullt.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_pmullt.c --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_pmullt.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_pmullt.c @@ -53,14 +53,14 @@ // CHECK-LABEL: @test_svpmullt_pair_n_u8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.pmullt.pair.nxv16i8( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z23test_svpmullt_pair_n_u8u11__SVUint8_th( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.pmullt.pair.nxv16i8( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -74,14 +74,14 @@ // CHECK-LABEL: @test_svpmullt_pair_n_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.pmullt.pair.nxv4i32( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z24test_svpmullt_pair_n_u32u12__SVUint32_tj( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.pmullt.pair.nxv4i32( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -133,7 +133,7 @@ // CHECK-LABEL: @test_svpmullt_n_u16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.pmullt.pair.nxv16i8( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: [[TMP2:%.*]] = bitcast [[TMP1]] to @@ -141,7 +141,7 @@ // // CPP-CHECK-LABEL: @_Z19test_svpmullt_n_u16u11__SVUint8_th( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.pmullt.pair.nxv16i8( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = bitcast [[TMP1]] to @@ -156,7 +156,7 @@ // CHECK-LABEL: @test_svpmullt_n_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.pmullt.pair.nxv4i32( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: [[TMP2:%.*]] = bitcast [[TMP1]] to @@ -164,7 +164,7 @@ // // CPP-CHECK-LABEL: @_Z19test_svpmullt_n_u64u12__SVUint32_tj( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.pmullt.pair.nxv4i32( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = bitcast [[TMP1]] to diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_pmullt_128.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_pmullt_128.c --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_pmullt_128.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_pmullt_128.c @@ -36,14 +36,14 @@ // CHECK-LABEL: @test_svpmullt_pair_n_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.pmullt.pair.nxv2i64( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z24test_svpmullt_pair_n_u64u12__SVUint64_tm( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.pmullt.pair.nxv2i64( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qadd.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qadd.c --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qadd.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qadd.c @@ -168,14 +168,14 @@ // CHECK-LABEL: @test_svqadd_n_s8_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqadd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svqadd_n_s8_mu10__SVBool_tu10__SVInt8_ta( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqadd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -190,7 +190,7 @@ // CHECK-LABEL: @test_svqadd_n_s16_m( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqadd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -198,7 +198,7 @@ // CPP-CHECK-LABEL: @_Z19test_svqadd_n_s16_mu10__SVBool_tu11__SVInt16_ts( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqadd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -213,7 +213,7 @@ // CHECK-LABEL: @test_svqadd_n_s32_m( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqadd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -221,7 +221,7 @@ // CPP-CHECK-LABEL: @_Z19test_svqadd_n_s32_mu10__SVBool_tu11__SVInt32_ti( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqadd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -236,7 +236,7 @@ // CHECK-LABEL: @test_svqadd_n_s64_m( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqadd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -244,7 +244,7 @@ // CPP-CHECK-LABEL: @_Z19test_svqadd_n_s64_mu10__SVBool_tu11__SVInt64_tl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqadd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -258,14 +258,14 @@ // CHECK-LABEL: @test_svqadd_n_u8_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqadd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svqadd_n_u8_mu10__SVBool_tu11__SVUint8_th( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqadd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -280,7 +280,7 @@ // CHECK-LABEL: @test_svqadd_n_u16_m( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uqadd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -288,7 +288,7 @@ // CPP-CHECK-LABEL: @_Z19test_svqadd_n_u16_mu10__SVBool_tu12__SVUint16_tt( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uqadd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -303,7 +303,7 @@ // CHECK-LABEL: @test_svqadd_n_u32_m( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uqadd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -311,7 +311,7 @@ // CPP-CHECK-LABEL: @_Z19test_svqadd_n_u32_mu10__SVBool_tu12__SVUint32_tj( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uqadd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -326,7 +326,7 @@ // CHECK-LABEL: @test_svqadd_n_u64_m( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uqadd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -334,7 +334,7 @@ // CPP-CHECK-LABEL: @_Z19test_svqadd_n_u64_mu10__SVBool_tu12__SVUint64_tm( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uqadd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -513,7 +513,7 @@ // CHECK-LABEL: @test_svqadd_n_s8_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqadd.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) @@ -521,7 +521,7 @@ // // CPP-CHECK-LABEL: @_Z18test_svqadd_n_s8_zu10__SVBool_tu10__SVInt8_ta( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqadd.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) @@ -537,7 +537,7 @@ // CHECK-LABEL: @test_svqadd_n_s16_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.sqadd.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -546,7 +546,7 @@ // CPP-CHECK-LABEL: @_Z19test_svqadd_n_s16_zu10__SVBool_tu11__SVInt16_ts( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.sqadd.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -562,7 +562,7 @@ // CHECK-LABEL: @test_svqadd_n_s32_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.sqadd.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -571,7 +571,7 @@ // CPP-CHECK-LABEL: @_Z19test_svqadd_n_s32_zu10__SVBool_tu11__SVInt32_ti( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.sqadd.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -587,7 +587,7 @@ // CHECK-LABEL: @test_svqadd_n_s64_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.sqadd.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -596,7 +596,7 @@ // CPP-CHECK-LABEL: @_Z19test_svqadd_n_s64_zu10__SVBool_tu11__SVInt64_tl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.sqadd.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -611,7 +611,7 @@ // CHECK-LABEL: @test_svqadd_n_u8_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uqadd.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) @@ -619,7 +619,7 @@ // // CPP-CHECK-LABEL: @_Z18test_svqadd_n_u8_zu10__SVBool_tu11__SVUint8_th( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uqadd.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) @@ -635,7 +635,7 @@ // CHECK-LABEL: @test_svqadd_n_u16_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.uqadd.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -644,7 +644,7 @@ // CPP-CHECK-LABEL: @_Z19test_svqadd_n_u16_zu10__SVBool_tu12__SVUint16_tt( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.uqadd.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -660,7 +660,7 @@ // CHECK-LABEL: @test_svqadd_n_u32_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.uqadd.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -669,7 +669,7 @@ // CPP-CHECK-LABEL: @_Z19test_svqadd_n_u32_zu10__SVBool_tu12__SVUint32_tj( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.uqadd.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -685,7 +685,7 @@ // CHECK-LABEL: @test_svqadd_n_u64_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.uqadd.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -694,7 +694,7 @@ // CPP-CHECK-LABEL: @_Z19test_svqadd_n_u64_zu10__SVBool_tu12__SVUint64_tm( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.uqadd.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -858,14 +858,14 @@ // CHECK-LABEL: @test_svqadd_n_s8_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqadd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svqadd_n_s8_xu10__SVBool_tu10__SVInt8_ta( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqadd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -880,7 +880,7 @@ // CHECK-LABEL: @test_svqadd_n_s16_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqadd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -888,7 +888,7 @@ // CPP-CHECK-LABEL: @_Z19test_svqadd_n_s16_xu10__SVBool_tu11__SVInt16_ts( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqadd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -903,7 +903,7 @@ // CHECK-LABEL: @test_svqadd_n_s32_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqadd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -911,7 +911,7 @@ // CPP-CHECK-LABEL: @_Z19test_svqadd_n_s32_xu10__SVBool_tu11__SVInt32_ti( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqadd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -926,7 +926,7 @@ // CHECK-LABEL: @test_svqadd_n_s64_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqadd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -934,7 +934,7 @@ // CPP-CHECK-LABEL: @_Z19test_svqadd_n_s64_xu10__SVBool_tu11__SVInt64_tl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqadd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -948,14 +948,14 @@ // CHECK-LABEL: @test_svqadd_n_u8_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqadd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svqadd_n_u8_xu10__SVBool_tu11__SVUint8_th( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqadd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -970,7 +970,7 @@ // CHECK-LABEL: @test_svqadd_n_u16_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uqadd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -978,7 +978,7 @@ // CPP-CHECK-LABEL: @_Z19test_svqadd_n_u16_xu10__SVBool_tu12__SVUint16_tt( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uqadd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -993,7 +993,7 @@ // CHECK-LABEL: @test_svqadd_n_u32_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uqadd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -1001,7 +1001,7 @@ // CPP-CHECK-LABEL: @_Z19test_svqadd_n_u32_xu10__SVBool_tu12__SVUint32_tj( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uqadd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -1016,7 +1016,7 @@ // CHECK-LABEL: @test_svqadd_n_u64_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uqadd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -1024,7 +1024,7 @@ // CPP-CHECK-LABEL: @_Z19test_svqadd_n_u64_xu10__SVBool_tu12__SVUint64_tm( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uqadd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qdmlalb.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qdmlalb.c --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qdmlalb.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qdmlalb.c @@ -70,14 +70,14 @@ // CHECK-LABEL: @test_svqdmlalb_n_s16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqdmlalb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z20test_svqdmlalb_n_s16u11__SVInt16_tu10__SVInt8_ta( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqdmlalb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -91,14 +91,14 @@ // CHECK-LABEL: @test_svqdmlalb_n_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqdmlalb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z20test_svqdmlalb_n_s32u11__SVInt32_tu11__SVInt16_ts( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqdmlalb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -112,14 +112,14 @@ // CHECK-LABEL: @test_svqdmlalb_n_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqdmlalb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z20test_svqdmlalb_n_s64u11__SVInt64_tu11__SVInt32_ti( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqdmlalb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qdmlalbt.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qdmlalbt.c --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qdmlalbt.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qdmlalbt.c @@ -70,14 +70,14 @@ // CHECK-LABEL: @test_svqdmlalbt_n_s16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqdmlalbt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z21test_svqdmlalbt_n_s16u11__SVInt16_tu10__SVInt8_ta( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqdmlalbt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -91,14 +91,14 @@ // CHECK-LABEL: @test_svqdmlalbt_n_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqdmlalbt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z21test_svqdmlalbt_n_s32u11__SVInt32_tu11__SVInt16_ts( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqdmlalbt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -112,14 +112,14 @@ // CHECK-LABEL: @test_svqdmlalbt_n_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqdmlalbt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z21test_svqdmlalbt_n_s64u11__SVInt64_tu11__SVInt32_ti( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqdmlalbt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qdmlalt.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qdmlalt.c --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qdmlalt.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qdmlalt.c @@ -70,14 +70,14 @@ // CHECK-LABEL: @test_svqdmlalt_n_s16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqdmlalt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z20test_svqdmlalt_n_s16u11__SVInt16_tu10__SVInt8_ta( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqdmlalt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -91,14 +91,14 @@ // CHECK-LABEL: @test_svqdmlalt_n_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqdmlalt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z20test_svqdmlalt_n_s32u11__SVInt32_tu11__SVInt16_ts( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqdmlalt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -112,14 +112,14 @@ // CHECK-LABEL: @test_svqdmlalt_n_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqdmlalt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z20test_svqdmlalt_n_s64u11__SVInt64_tu11__SVInt32_ti( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqdmlalt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qdmlslb.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qdmlslb.c --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qdmlslb.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qdmlslb.c @@ -70,14 +70,14 @@ // CHECK-LABEL: @test_svqdmlslb_n_s16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqdmlslb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z20test_svqdmlslb_n_s16u11__SVInt16_tu10__SVInt8_ta( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqdmlslb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -91,14 +91,14 @@ // CHECK-LABEL: @test_svqdmlslb_n_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqdmlslb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z20test_svqdmlslb_n_s32u11__SVInt32_tu11__SVInt16_ts( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqdmlslb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -112,14 +112,14 @@ // CHECK-LABEL: @test_svqdmlslb_n_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqdmlslb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z20test_svqdmlslb_n_s64u11__SVInt64_tu11__SVInt32_ti( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqdmlslb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qdmlslbt.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qdmlslbt.c --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qdmlslbt.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qdmlslbt.c @@ -70,14 +70,14 @@ // CHECK-LABEL: @test_svqdmlslbt_n_s16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqdmlslbt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z21test_svqdmlslbt_n_s16u11__SVInt16_tu10__SVInt8_ta( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqdmlslbt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -91,14 +91,14 @@ // CHECK-LABEL: @test_svqdmlslbt_n_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqdmlslbt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z21test_svqdmlslbt_n_s32u11__SVInt32_tu11__SVInt16_ts( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqdmlslbt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -112,14 +112,14 @@ // CHECK-LABEL: @test_svqdmlslbt_n_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqdmlslbt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z21test_svqdmlslbt_n_s64u11__SVInt64_tu11__SVInt32_ti( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqdmlslbt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qdmlslt.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qdmlslt.c --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qdmlslt.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qdmlslt.c @@ -70,14 +70,14 @@ // CHECK-LABEL: @test_svqdmlslt_n_s16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqdmlslt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z20test_svqdmlslt_n_s16u11__SVInt16_tu10__SVInt8_ta( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqdmlslt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -91,14 +91,14 @@ // CHECK-LABEL: @test_svqdmlslt_n_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqdmlslt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z20test_svqdmlslt_n_s32u11__SVInt32_tu11__SVInt16_ts( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqdmlslt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -112,14 +112,14 @@ // CHECK-LABEL: @test_svqdmlslt_n_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqdmlslt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z20test_svqdmlslt_n_s64u11__SVInt64_tu11__SVInt32_ti( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqdmlslt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qdmulh.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qdmulh.c --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qdmulh.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qdmulh.c @@ -87,14 +87,14 @@ // CHECK-LABEL: @test_svqdmulh_n_s8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqdmulh.nxv16i8( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svqdmulh_n_s8u10__SVInt8_ta( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqdmulh.nxv16i8( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -108,14 +108,14 @@ // CHECK-LABEL: @test_svqdmulh_n_s16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqdmulh.nxv8i16( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z19test_svqdmulh_n_s16u11__SVInt16_ts( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqdmulh.nxv8i16( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -129,14 +129,14 @@ // CHECK-LABEL: @test_svqdmulh_n_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqdmulh.nxv4i32( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z19test_svqdmulh_n_s32u11__SVInt32_ti( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqdmulh.nxv4i32( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -150,14 +150,14 @@ // CHECK-LABEL: @test_svqdmulh_n_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqdmulh.nxv2i64( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z19test_svqdmulh_n_s64u11__SVInt64_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqdmulh.nxv2i64( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qdmullb.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qdmullb.c --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qdmullb.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qdmullb.c @@ -70,14 +70,14 @@ // CHECK-LABEL: @test_svqdmullb_n_s16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqdmullb.nxv8i16( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z20test_svqdmullb_n_s16u10__SVInt8_ta( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqdmullb.nxv8i16( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -91,14 +91,14 @@ // CHECK-LABEL: @test_svqdmullb_n_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqdmullb.nxv4i32( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z20test_svqdmullb_n_s32u11__SVInt16_ts( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqdmullb.nxv4i32( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -112,14 +112,14 @@ // CHECK-LABEL: @test_svqdmullb_n_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqdmullb.nxv2i64( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z20test_svqdmullb_n_s64u11__SVInt32_ti( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqdmullb.nxv2i64( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qdmullt.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qdmullt.c --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qdmullt.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qdmullt.c @@ -70,14 +70,14 @@ // CHECK-LABEL: @test_svqdmullt_n_s16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqdmullt.nxv8i16( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z20test_svqdmullt_n_s16u10__SVInt8_ta( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqdmullt.nxv8i16( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -91,14 +91,14 @@ // CHECK-LABEL: @test_svqdmullt_n_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqdmullt.nxv4i32( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z20test_svqdmullt_n_s32u11__SVInt16_ts( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqdmullt.nxv4i32( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -112,14 +112,14 @@ // CHECK-LABEL: @test_svqdmullt_n_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqdmullt.nxv2i64( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z20test_svqdmullt_n_s64u11__SVInt32_ti( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqdmullt.nxv2i64( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qrdmlah.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qrdmlah.c --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qrdmlah.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qrdmlah.c @@ -87,14 +87,14 @@ // CHECK-LABEL: @test_svqrdmlah_n_s8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqrdmlah.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z19test_svqrdmlah_n_s8u10__SVInt8_tu10__SVInt8_ta( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqrdmlah.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -108,14 +108,14 @@ // CHECK-LABEL: @test_svqrdmlah_n_s16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqrdmlah.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z20test_svqrdmlah_n_s16u11__SVInt16_tu11__SVInt16_ts( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqrdmlah.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -129,14 +129,14 @@ // CHECK-LABEL: @test_svqrdmlah_n_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqrdmlah.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z20test_svqrdmlah_n_s32u11__SVInt32_tu11__SVInt32_ti( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqrdmlah.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -150,14 +150,14 @@ // CHECK-LABEL: @test_svqrdmlah_n_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqrdmlah.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z20test_svqrdmlah_n_s64u11__SVInt64_tu11__SVInt64_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqrdmlah.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qrdmlsh.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qrdmlsh.c --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qrdmlsh.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qrdmlsh.c @@ -87,14 +87,14 @@ // CHECK-LABEL: @test_svqrdmlsh_n_s8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqrdmlsh.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z19test_svqrdmlsh_n_s8u10__SVInt8_tu10__SVInt8_ta( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqrdmlsh.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -108,14 +108,14 @@ // CHECK-LABEL: @test_svqrdmlsh_n_s16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqrdmlsh.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z20test_svqrdmlsh_n_s16u11__SVInt16_tu11__SVInt16_ts( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqrdmlsh.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -129,14 +129,14 @@ // CHECK-LABEL: @test_svqrdmlsh_n_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqrdmlsh.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z20test_svqrdmlsh_n_s32u11__SVInt32_tu11__SVInt32_ti( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqrdmlsh.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -150,14 +150,14 @@ // CHECK-LABEL: @test_svqrdmlsh_n_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqrdmlsh.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z20test_svqrdmlsh_n_s64u11__SVInt64_tu11__SVInt64_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqrdmlsh.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qrdmulh.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qrdmulh.c --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qrdmulh.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qrdmulh.c @@ -87,14 +87,14 @@ // CHECK-LABEL: @test_svqrdmulh_n_s8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqrdmulh.nxv16i8( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z19test_svqrdmulh_n_s8u10__SVInt8_ta( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqrdmulh.nxv16i8( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -108,14 +108,14 @@ // CHECK-LABEL: @test_svqrdmulh_n_s16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqrdmulh.nxv8i16( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z20test_svqrdmulh_n_s16u11__SVInt16_ts( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqrdmulh.nxv8i16( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -129,14 +129,14 @@ // CHECK-LABEL: @test_svqrdmulh_n_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqrdmulh.nxv4i32( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z20test_svqrdmulh_n_s32u11__SVInt32_ti( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqrdmulh.nxv4i32( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -150,14 +150,14 @@ // CHECK-LABEL: @test_svqrdmulh_n_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqrdmulh.nxv2i64( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z20test_svqrdmulh_n_s64u11__SVInt64_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqrdmulh.nxv2i64( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qrshl.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qrshl.c --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qrshl.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qrshl.c @@ -479,7 +479,7 @@ // CHECK-LABEL: @test_svqrshl_n_s8_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqrshl.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) @@ -487,7 +487,7 @@ // // CPP-CHECK-LABEL: @_Z19test_svqrshl_n_s8_zu10__SVBool_tu10__SVInt8_ta( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqrshl.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) @@ -503,7 +503,7 @@ // CHECK-LABEL: @test_svqrshl_n_s16_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.sqrshl.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -512,7 +512,7 @@ // CPP-CHECK-LABEL: @_Z20test_svqrshl_n_s16_zu10__SVBool_tu11__SVInt16_ts( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.sqrshl.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -528,7 +528,7 @@ // CHECK-LABEL: @test_svqrshl_n_s32_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.sqrshl.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -537,7 +537,7 @@ // CPP-CHECK-LABEL: @_Z20test_svqrshl_n_s32_zu10__SVBool_tu11__SVInt32_ti( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.sqrshl.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -553,7 +553,7 @@ // CHECK-LABEL: @test_svqrshl_n_s64_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.sqrshl.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -562,7 +562,7 @@ // CPP-CHECK-LABEL: @_Z20test_svqrshl_n_s64_zu10__SVBool_tu11__SVInt64_tl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.sqrshl.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -577,7 +577,7 @@ // CHECK-LABEL: @test_svqrshl_n_u8_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uqrshl.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) @@ -585,7 +585,7 @@ // // CPP-CHECK-LABEL: @_Z19test_svqrshl_n_u8_zu10__SVBool_tu11__SVUint8_ta( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uqrshl.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) @@ -601,7 +601,7 @@ // CHECK-LABEL: @test_svqrshl_n_u16_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.uqrshl.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -610,7 +610,7 @@ // CPP-CHECK-LABEL: @_Z20test_svqrshl_n_u16_zu10__SVBool_tu12__SVUint16_ts( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.uqrshl.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -626,7 +626,7 @@ // CHECK-LABEL: @test_svqrshl_n_u32_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.uqrshl.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -635,7 +635,7 @@ // CPP-CHECK-LABEL: @_Z20test_svqrshl_n_u32_zu10__SVBool_tu12__SVUint32_ti( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.uqrshl.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -651,7 +651,7 @@ // CHECK-LABEL: @test_svqrshl_n_u64_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.uqrshl.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -660,7 +660,7 @@ // CPP-CHECK-LABEL: @_Z20test_svqrshl_n_u64_zu10__SVBool_tu12__SVUint64_tl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.uqrshl.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -675,14 +675,14 @@ // CHECK-LABEL: @test_svqrshl_n_s8_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqrshl.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z19test_svqrshl_n_s8_mu10__SVBool_tu10__SVInt8_ta( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqrshl.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -697,7 +697,7 @@ // CHECK-LABEL: @test_svqrshl_n_s16_m( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqrshl.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -705,7 +705,7 @@ // CPP-CHECK-LABEL: @_Z20test_svqrshl_n_s16_mu10__SVBool_tu11__SVInt16_ts( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqrshl.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -720,7 +720,7 @@ // CHECK-LABEL: @test_svqrshl_n_s32_m( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqrshl.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -728,7 +728,7 @@ // CPP-CHECK-LABEL: @_Z20test_svqrshl_n_s32_mu10__SVBool_tu11__SVInt32_ti( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqrshl.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -743,7 +743,7 @@ // CHECK-LABEL: @test_svqrshl_n_s64_m( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqrshl.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -751,7 +751,7 @@ // CPP-CHECK-LABEL: @_Z20test_svqrshl_n_s64_mu10__SVBool_tu11__SVInt64_tl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqrshl.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -765,14 +765,14 @@ // CHECK-LABEL: @test_svqrshl_n_u8_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqrshl.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z19test_svqrshl_n_u8_mu10__SVBool_tu11__SVUint8_ta( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqrshl.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -787,7 +787,7 @@ // CHECK-LABEL: @test_svqrshl_n_u16_m( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uqrshl.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -795,7 +795,7 @@ // CPP-CHECK-LABEL: @_Z20test_svqrshl_n_u16_mu10__SVBool_tu12__SVUint16_ts( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uqrshl.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -810,7 +810,7 @@ // CHECK-LABEL: @test_svqrshl_n_u32_m( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uqrshl.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -818,7 +818,7 @@ // CPP-CHECK-LABEL: @_Z20test_svqrshl_n_u32_mu10__SVBool_tu12__SVUint32_ti( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uqrshl.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -833,7 +833,7 @@ // CHECK-LABEL: @test_svqrshl_n_u64_m( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uqrshl.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -841,7 +841,7 @@ // CPP-CHECK-LABEL: @_Z20test_svqrshl_n_u64_mu10__SVBool_tu12__SVUint64_tl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uqrshl.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -855,14 +855,14 @@ // CHECK-LABEL: @test_svqrshl_n_s8_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqrshl.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z19test_svqrshl_n_s8_xu10__SVBool_tu10__SVInt8_ta( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqrshl.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -877,7 +877,7 @@ // CHECK-LABEL: @test_svqrshl_n_s16_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqrshl.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -885,7 +885,7 @@ // CPP-CHECK-LABEL: @_Z20test_svqrshl_n_s16_xu10__SVBool_tu11__SVInt16_ts( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqrshl.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -900,7 +900,7 @@ // CHECK-LABEL: @test_svqrshl_n_s32_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqrshl.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -908,7 +908,7 @@ // CPP-CHECK-LABEL: @_Z20test_svqrshl_n_s32_xu10__SVBool_tu11__SVInt32_ti( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqrshl.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -923,7 +923,7 @@ // CHECK-LABEL: @test_svqrshl_n_s64_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqrshl.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -931,7 +931,7 @@ // CPP-CHECK-LABEL: @_Z20test_svqrshl_n_s64_xu10__SVBool_tu11__SVInt64_tl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqrshl.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -945,14 +945,14 @@ // CHECK-LABEL: @test_svqrshl_n_u8_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqrshl.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z19test_svqrshl_n_u8_xu10__SVBool_tu11__SVUint8_ta( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqrshl.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -967,7 +967,7 @@ // CHECK-LABEL: @test_svqrshl_n_u16_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uqrshl.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -975,7 +975,7 @@ // CPP-CHECK-LABEL: @_Z20test_svqrshl_n_u16_xu10__SVBool_tu12__SVUint16_ts( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uqrshl.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -990,7 +990,7 @@ // CHECK-LABEL: @test_svqrshl_n_u32_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uqrshl.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -998,7 +998,7 @@ // CPP-CHECK-LABEL: @_Z20test_svqrshl_n_u32_xu10__SVBool_tu12__SVUint32_ti( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uqrshl.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -1013,7 +1013,7 @@ // CHECK-LABEL: @test_svqrshl_n_u64_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uqrshl.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -1021,7 +1021,7 @@ // CPP-CHECK-LABEL: @_Z20test_svqrshl_n_u64_xu10__SVBool_tu12__SVUint64_tl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uqrshl.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qshl.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qshl.c --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qshl.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qshl.c @@ -479,7 +479,7 @@ // CHECK-LABEL: @test_svqshl_n_s8_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqshl.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) @@ -487,7 +487,7 @@ // // CPP-CHECK-LABEL: @_Z18test_svqshl_n_s8_zu10__SVBool_tu10__SVInt8_ta( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqshl.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) @@ -503,7 +503,7 @@ // CHECK-LABEL: @test_svqshl_n_s16_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.sqshl.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -512,7 +512,7 @@ // CPP-CHECK-LABEL: @_Z19test_svqshl_n_s16_zu10__SVBool_tu11__SVInt16_ts( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.sqshl.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -528,7 +528,7 @@ // CHECK-LABEL: @test_svqshl_n_s32_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.sqshl.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -537,7 +537,7 @@ // CPP-CHECK-LABEL: @_Z19test_svqshl_n_s32_zu10__SVBool_tu11__SVInt32_ti( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.sqshl.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -553,7 +553,7 @@ // CHECK-LABEL: @test_svqshl_n_s64_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.sqshl.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -562,7 +562,7 @@ // CPP-CHECK-LABEL: @_Z19test_svqshl_n_s64_zu10__SVBool_tu11__SVInt64_tl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.sqshl.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -577,7 +577,7 @@ // CHECK-LABEL: @test_svqshl_n_u8_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uqshl.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) @@ -585,7 +585,7 @@ // // CPP-CHECK-LABEL: @_Z18test_svqshl_n_u8_zu10__SVBool_tu11__SVUint8_ta( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uqshl.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) @@ -601,7 +601,7 @@ // CHECK-LABEL: @test_svqshl_n_u16_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.uqshl.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -610,7 +610,7 @@ // CPP-CHECK-LABEL: @_Z19test_svqshl_n_u16_zu10__SVBool_tu12__SVUint16_ts( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.uqshl.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -626,7 +626,7 @@ // CHECK-LABEL: @test_svqshl_n_u32_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.uqshl.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -635,7 +635,7 @@ // CPP-CHECK-LABEL: @_Z19test_svqshl_n_u32_zu10__SVBool_tu12__SVUint32_ti( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.uqshl.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -651,7 +651,7 @@ // CHECK-LABEL: @test_svqshl_n_u64_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.uqshl.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -660,7 +660,7 @@ // CPP-CHECK-LABEL: @_Z19test_svqshl_n_u64_zu10__SVBool_tu12__SVUint64_tl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.uqshl.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -675,14 +675,14 @@ // CHECK-LABEL: @test_svqshl_n_s8_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqshl.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svqshl_n_s8_mu10__SVBool_tu10__SVInt8_ta( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqshl.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -697,7 +697,7 @@ // CHECK-LABEL: @test_svqshl_n_s16_m( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqshl.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -705,7 +705,7 @@ // CPP-CHECK-LABEL: @_Z19test_svqshl_n_s16_mu10__SVBool_tu11__SVInt16_ts( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqshl.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -720,7 +720,7 @@ // CHECK-LABEL: @test_svqshl_n_s32_m( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqshl.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -728,7 +728,7 @@ // CPP-CHECK-LABEL: @_Z19test_svqshl_n_s32_mu10__SVBool_tu11__SVInt32_ti( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqshl.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -743,7 +743,7 @@ // CHECK-LABEL: @test_svqshl_n_s64_m( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqshl.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -751,7 +751,7 @@ // CPP-CHECK-LABEL: @_Z19test_svqshl_n_s64_mu10__SVBool_tu11__SVInt64_tl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqshl.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -765,14 +765,14 @@ // CHECK-LABEL: @test_svqshl_n_u8_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqshl.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svqshl_n_u8_mu10__SVBool_tu11__SVUint8_ta( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqshl.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -787,7 +787,7 @@ // CHECK-LABEL: @test_svqshl_n_u16_m( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uqshl.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -795,7 +795,7 @@ // CPP-CHECK-LABEL: @_Z19test_svqshl_n_u16_mu10__SVBool_tu12__SVUint16_ts( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uqshl.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -810,7 +810,7 @@ // CHECK-LABEL: @test_svqshl_n_u32_m( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uqshl.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -818,7 +818,7 @@ // CPP-CHECK-LABEL: @_Z19test_svqshl_n_u32_mu10__SVBool_tu12__SVUint32_ti( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uqshl.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -833,7 +833,7 @@ // CHECK-LABEL: @test_svqshl_n_u64_m( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uqshl.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -841,7 +841,7 @@ // CPP-CHECK-LABEL: @_Z19test_svqshl_n_u64_mu10__SVBool_tu12__SVUint64_tl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uqshl.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -855,14 +855,14 @@ // CHECK-LABEL: @test_svqshl_n_s8_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqshl.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svqshl_n_s8_xu10__SVBool_tu10__SVInt8_ta( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqshl.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -877,7 +877,7 @@ // CHECK-LABEL: @test_svqshl_n_s16_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqshl.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -885,7 +885,7 @@ // CPP-CHECK-LABEL: @_Z19test_svqshl_n_s16_xu10__SVBool_tu11__SVInt16_ts( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqshl.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -900,7 +900,7 @@ // CHECK-LABEL: @test_svqshl_n_s32_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqshl.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -908,7 +908,7 @@ // CPP-CHECK-LABEL: @_Z19test_svqshl_n_s32_xu10__SVBool_tu11__SVInt32_ti( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqshl.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -923,7 +923,7 @@ // CHECK-LABEL: @test_svqshl_n_s64_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqshl.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -931,7 +931,7 @@ // CPP-CHECK-LABEL: @_Z19test_svqshl_n_s64_xu10__SVBool_tu11__SVInt64_tl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqshl.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -945,14 +945,14 @@ // CHECK-LABEL: @test_svqshl_n_u8_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqshl.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svqshl_n_u8_xu10__SVBool_tu11__SVUint8_ta( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqshl.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -967,7 +967,7 @@ // CHECK-LABEL: @test_svqshl_n_u16_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uqshl.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -975,7 +975,7 @@ // CPP-CHECK-LABEL: @_Z19test_svqshl_n_u16_xu10__SVBool_tu12__SVUint16_ts( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uqshl.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -990,7 +990,7 @@ // CHECK-LABEL: @test_svqshl_n_u32_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uqshl.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -998,7 +998,7 @@ // CPP-CHECK-LABEL: @_Z19test_svqshl_n_u32_xu10__SVBool_tu12__SVUint32_ti( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uqshl.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -1013,7 +1013,7 @@ // CHECK-LABEL: @test_svqshl_n_u64_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uqshl.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -1021,7 +1021,7 @@ // CPP-CHECK-LABEL: @_Z19test_svqshl_n_u64_xu10__SVBool_tu12__SVUint64_tl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uqshl.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qsub.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qsub.c --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qsub.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qsub.c @@ -479,7 +479,7 @@ // CHECK-LABEL: @test_svqsub_n_s8_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqsub.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) @@ -487,7 +487,7 @@ // // CPP-CHECK-LABEL: @_Z18test_svqsub_n_s8_zu10__SVBool_tu10__SVInt8_ta( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqsub.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) @@ -503,7 +503,7 @@ // CHECK-LABEL: @test_svqsub_n_s16_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.sqsub.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -512,7 +512,7 @@ // CPP-CHECK-LABEL: @_Z19test_svqsub_n_s16_zu10__SVBool_tu11__SVInt16_ts( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.sqsub.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -528,7 +528,7 @@ // CHECK-LABEL: @test_svqsub_n_s32_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.sqsub.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -537,7 +537,7 @@ // CPP-CHECK-LABEL: @_Z19test_svqsub_n_s32_zu10__SVBool_tu11__SVInt32_ti( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.sqsub.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -553,7 +553,7 @@ // CHECK-LABEL: @test_svqsub_n_s64_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.sqsub.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -562,7 +562,7 @@ // CPP-CHECK-LABEL: @_Z19test_svqsub_n_s64_zu10__SVBool_tu11__SVInt64_tl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.sqsub.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -577,7 +577,7 @@ // CHECK-LABEL: @test_svqsub_n_u8_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uqsub.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) @@ -585,7 +585,7 @@ // // CPP-CHECK-LABEL: @_Z18test_svqsub_n_u8_zu10__SVBool_tu11__SVUint8_th( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uqsub.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) @@ -601,7 +601,7 @@ // CHECK-LABEL: @test_svqsub_n_u16_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.uqsub.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -610,7 +610,7 @@ // CPP-CHECK-LABEL: @_Z19test_svqsub_n_u16_zu10__SVBool_tu12__SVUint16_tt( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.uqsub.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -626,7 +626,7 @@ // CHECK-LABEL: @test_svqsub_n_u32_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.uqsub.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -635,7 +635,7 @@ // CPP-CHECK-LABEL: @_Z19test_svqsub_n_u32_zu10__SVBool_tu12__SVUint32_tj( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.uqsub.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -651,7 +651,7 @@ // CHECK-LABEL: @test_svqsub_n_u64_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.uqsub.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -660,7 +660,7 @@ // CPP-CHECK-LABEL: @_Z19test_svqsub_n_u64_zu10__SVBool_tu12__SVUint64_tm( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.uqsub.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -675,14 +675,14 @@ // CHECK-LABEL: @test_svqsub_n_s8_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqsub.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svqsub_n_s8_mu10__SVBool_tu10__SVInt8_ta( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqsub.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -697,7 +697,7 @@ // CHECK-LABEL: @test_svqsub_n_s16_m( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqsub.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -705,7 +705,7 @@ // CPP-CHECK-LABEL: @_Z19test_svqsub_n_s16_mu10__SVBool_tu11__SVInt16_ts( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqsub.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -720,7 +720,7 @@ // CHECK-LABEL: @test_svqsub_n_s32_m( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqsub.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -728,7 +728,7 @@ // CPP-CHECK-LABEL: @_Z19test_svqsub_n_s32_mu10__SVBool_tu11__SVInt32_ti( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqsub.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -743,7 +743,7 @@ // CHECK-LABEL: @test_svqsub_n_s64_m( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqsub.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -751,7 +751,7 @@ // CPP-CHECK-LABEL: @_Z19test_svqsub_n_s64_mu10__SVBool_tu11__SVInt64_tl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqsub.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -765,14 +765,14 @@ // CHECK-LABEL: @test_svqsub_n_u8_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqsub.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svqsub_n_u8_mu10__SVBool_tu11__SVUint8_th( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqsub.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -787,7 +787,7 @@ // CHECK-LABEL: @test_svqsub_n_u16_m( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uqsub.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -795,7 +795,7 @@ // CPP-CHECK-LABEL: @_Z19test_svqsub_n_u16_mu10__SVBool_tu12__SVUint16_tt( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uqsub.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -810,7 +810,7 @@ // CHECK-LABEL: @test_svqsub_n_u32_m( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uqsub.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -818,7 +818,7 @@ // CPP-CHECK-LABEL: @_Z19test_svqsub_n_u32_mu10__SVBool_tu12__SVUint32_tj( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uqsub.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -833,7 +833,7 @@ // CHECK-LABEL: @test_svqsub_n_u64_m( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uqsub.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -841,7 +841,7 @@ // CPP-CHECK-LABEL: @_Z19test_svqsub_n_u64_mu10__SVBool_tu12__SVUint64_tm( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uqsub.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -855,14 +855,14 @@ // CHECK-LABEL: @test_svqsub_n_s8_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqsub.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svqsub_n_s8_xu10__SVBool_tu10__SVInt8_ta( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqsub.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -877,7 +877,7 @@ // CHECK-LABEL: @test_svqsub_n_s16_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqsub.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -885,7 +885,7 @@ // CPP-CHECK-LABEL: @_Z19test_svqsub_n_s16_xu10__SVBool_tu11__SVInt16_ts( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqsub.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -900,7 +900,7 @@ // CHECK-LABEL: @test_svqsub_n_s32_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqsub.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -908,7 +908,7 @@ // CPP-CHECK-LABEL: @_Z19test_svqsub_n_s32_xu10__SVBool_tu11__SVInt32_ti( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqsub.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -923,7 +923,7 @@ // CHECK-LABEL: @test_svqsub_n_s64_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqsub.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -931,7 +931,7 @@ // CPP-CHECK-LABEL: @_Z19test_svqsub_n_s64_xu10__SVBool_tu11__SVInt64_tl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqsub.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -945,14 +945,14 @@ // CHECK-LABEL: @test_svqsub_n_u8_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqsub.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svqsub_n_u8_xu10__SVBool_tu11__SVUint8_th( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqsub.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -967,7 +967,7 @@ // CHECK-LABEL: @test_svqsub_n_u16_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uqsub.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -975,7 +975,7 @@ // CPP-CHECK-LABEL: @_Z19test_svqsub_n_u16_xu10__SVBool_tu12__SVUint16_tt( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uqsub.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -990,7 +990,7 @@ // CHECK-LABEL: @test_svqsub_n_u32_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uqsub.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -998,7 +998,7 @@ // CPP-CHECK-LABEL: @_Z19test_svqsub_n_u32_xu10__SVBool_tu12__SVUint32_tj( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uqsub.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -1013,7 +1013,7 @@ // CHECK-LABEL: @test_svqsub_n_u64_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uqsub.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -1021,7 +1021,7 @@ // CPP-CHECK-LABEL: @_Z19test_svqsub_n_u64_xu10__SVBool_tu12__SVUint64_tm( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uqsub.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qsubr.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qsubr.c --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qsubr.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qsubr.c @@ -479,7 +479,7 @@ // CHECK-LABEL: @test_svqsubr_n_s8_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqsubr.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) @@ -487,7 +487,7 @@ // // CPP-CHECK-LABEL: @_Z19test_svqsubr_n_s8_zu10__SVBool_tu10__SVInt8_ta( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqsubr.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) @@ -503,7 +503,7 @@ // CHECK-LABEL: @test_svqsubr_n_s16_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.sqsubr.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -512,7 +512,7 @@ // CPP-CHECK-LABEL: @_Z20test_svqsubr_n_s16_zu10__SVBool_tu11__SVInt16_ts( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.sqsubr.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -528,7 +528,7 @@ // CHECK-LABEL: @test_svqsubr_n_s32_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.sqsubr.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -537,7 +537,7 @@ // CPP-CHECK-LABEL: @_Z20test_svqsubr_n_s32_zu10__SVBool_tu11__SVInt32_ti( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.sqsubr.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -553,7 +553,7 @@ // CHECK-LABEL: @test_svqsubr_n_s64_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.sqsubr.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -562,7 +562,7 @@ // CPP-CHECK-LABEL: @_Z20test_svqsubr_n_s64_zu10__SVBool_tu11__SVInt64_tl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.sqsubr.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -577,7 +577,7 @@ // CHECK-LABEL: @test_svqsubr_n_u8_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uqsubr.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) @@ -585,7 +585,7 @@ // // CPP-CHECK-LABEL: @_Z19test_svqsubr_n_u8_zu10__SVBool_tu11__SVUint8_th( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uqsubr.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) @@ -601,7 +601,7 @@ // CHECK-LABEL: @test_svqsubr_n_u16_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.uqsubr.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -610,7 +610,7 @@ // CPP-CHECK-LABEL: @_Z20test_svqsubr_n_u16_zu10__SVBool_tu12__SVUint16_tt( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.uqsubr.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -626,7 +626,7 @@ // CHECK-LABEL: @test_svqsubr_n_u32_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.uqsubr.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -635,7 +635,7 @@ // CPP-CHECK-LABEL: @_Z20test_svqsubr_n_u32_zu10__SVBool_tu12__SVUint32_tj( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.uqsubr.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -651,7 +651,7 @@ // CHECK-LABEL: @test_svqsubr_n_u64_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.uqsubr.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -660,7 +660,7 @@ // CPP-CHECK-LABEL: @_Z20test_svqsubr_n_u64_zu10__SVBool_tu12__SVUint64_tm( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.uqsubr.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -675,14 +675,14 @@ // CHECK-LABEL: @test_svqsubr_n_s8_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqsubr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z19test_svqsubr_n_s8_mu10__SVBool_tu10__SVInt8_ta( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqsubr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -697,7 +697,7 @@ // CHECK-LABEL: @test_svqsubr_n_s16_m( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqsubr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -705,7 +705,7 @@ // CPP-CHECK-LABEL: @_Z20test_svqsubr_n_s16_mu10__SVBool_tu11__SVInt16_ts( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqsubr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -720,7 +720,7 @@ // CHECK-LABEL: @test_svqsubr_n_s32_m( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqsubr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -728,7 +728,7 @@ // CPP-CHECK-LABEL: @_Z20test_svqsubr_n_s32_mu10__SVBool_tu11__SVInt32_ti( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqsubr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -743,7 +743,7 @@ // CHECK-LABEL: @test_svqsubr_n_s64_m( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqsubr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -751,7 +751,7 @@ // CPP-CHECK-LABEL: @_Z20test_svqsubr_n_s64_mu10__SVBool_tu11__SVInt64_tl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqsubr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -765,14 +765,14 @@ // CHECK-LABEL: @test_svqsubr_n_u8_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqsubr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z19test_svqsubr_n_u8_mu10__SVBool_tu11__SVUint8_th( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqsubr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -787,7 +787,7 @@ // CHECK-LABEL: @test_svqsubr_n_u16_m( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uqsubr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -795,7 +795,7 @@ // CPP-CHECK-LABEL: @_Z20test_svqsubr_n_u16_mu10__SVBool_tu12__SVUint16_tt( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uqsubr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -810,7 +810,7 @@ // CHECK-LABEL: @test_svqsubr_n_u32_m( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uqsubr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -818,7 +818,7 @@ // CPP-CHECK-LABEL: @_Z20test_svqsubr_n_u32_mu10__SVBool_tu12__SVUint32_tj( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uqsubr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -833,7 +833,7 @@ // CHECK-LABEL: @test_svqsubr_n_u64_m( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uqsubr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -841,7 +841,7 @@ // CPP-CHECK-LABEL: @_Z20test_svqsubr_n_u64_mu10__SVBool_tu12__SVUint64_tm( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uqsubr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -855,14 +855,14 @@ // CHECK-LABEL: @test_svqsubr_n_s8_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqsubr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z19test_svqsubr_n_s8_xu10__SVBool_tu10__SVInt8_ta( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqsubr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -877,7 +877,7 @@ // CHECK-LABEL: @test_svqsubr_n_s16_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqsubr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -885,7 +885,7 @@ // CPP-CHECK-LABEL: @_Z20test_svqsubr_n_s16_xu10__SVBool_tu11__SVInt16_ts( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqsubr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -900,7 +900,7 @@ // CHECK-LABEL: @test_svqsubr_n_s32_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqsubr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -908,7 +908,7 @@ // CPP-CHECK-LABEL: @_Z20test_svqsubr_n_s32_xu10__SVBool_tu11__SVInt32_ti( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqsubr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -923,7 +923,7 @@ // CHECK-LABEL: @test_svqsubr_n_s64_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqsubr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -931,7 +931,7 @@ // CPP-CHECK-LABEL: @_Z20test_svqsubr_n_s64_xu10__SVBool_tu11__SVInt64_tl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqsubr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -945,14 +945,14 @@ // CHECK-LABEL: @test_svqsubr_n_u8_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqsubr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z19test_svqsubr_n_u8_xu10__SVBool_tu11__SVUint8_th( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqsubr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -967,7 +967,7 @@ // CHECK-LABEL: @test_svqsubr_n_u16_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uqsubr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -975,7 +975,7 @@ // CPP-CHECK-LABEL: @_Z20test_svqsubr_n_u16_xu10__SVBool_tu12__SVUint16_tt( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uqsubr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -990,7 +990,7 @@ // CHECK-LABEL: @test_svqsubr_n_u32_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uqsubr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -998,7 +998,7 @@ // CPP-CHECK-LABEL: @_Z20test_svqsubr_n_u32_xu10__SVBool_tu12__SVUint32_tj( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uqsubr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -1013,7 +1013,7 @@ // CHECK-LABEL: @test_svqsubr_n_u64_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uqsubr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -1021,7 +1021,7 @@ // CPP-CHECK-LABEL: @_Z20test_svqsubr_n_u64_xu10__SVBool_tu12__SVUint64_tm( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uqsubr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_raddhnb.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_raddhnb.c --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_raddhnb.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_raddhnb.c @@ -121,14 +121,14 @@ // CHECK-LABEL: @test_svraddhnb_n_s16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.raddhnb.nxv8i16( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z20test_svraddhnb_n_s16u11__SVInt16_ts( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.raddhnb.nxv8i16( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -142,14 +142,14 @@ // CHECK-LABEL: @test_svraddhnb_n_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.raddhnb.nxv4i32( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z20test_svraddhnb_n_s32u11__SVInt32_ti( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.raddhnb.nxv4i32( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -163,14 +163,14 @@ // CHECK-LABEL: @test_svraddhnb_n_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.raddhnb.nxv2i64( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z20test_svraddhnb_n_s64u11__SVInt64_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.raddhnb.nxv2i64( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -184,14 +184,14 @@ // CHECK-LABEL: @test_svraddhnb_n_u16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.raddhnb.nxv8i16( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z20test_svraddhnb_n_u16u12__SVUint16_tt( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.raddhnb.nxv8i16( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -205,14 +205,14 @@ // CHECK-LABEL: @test_svraddhnb_n_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.raddhnb.nxv4i32( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z20test_svraddhnb_n_u32u12__SVUint32_tj( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.raddhnb.nxv4i32( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -226,14 +226,14 @@ // CHECK-LABEL: @test_svraddhnb_n_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.raddhnb.nxv2i64( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z20test_svraddhnb_n_u64u12__SVUint64_tm( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.raddhnb.nxv2i64( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_raddhnt.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_raddhnt.c --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_raddhnt.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_raddhnt.c @@ -121,14 +121,14 @@ // CHECK-LABEL: @test_svraddhnt_n_s16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.raddhnt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z20test_svraddhnt_n_s16u10__SVInt8_tu11__SVInt16_ts( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.raddhnt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -142,14 +142,14 @@ // CHECK-LABEL: @test_svraddhnt_n_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.raddhnt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z20test_svraddhnt_n_s32u11__SVInt16_tu11__SVInt32_ti( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.raddhnt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -163,14 +163,14 @@ // CHECK-LABEL: @test_svraddhnt_n_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.raddhnt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z20test_svraddhnt_n_s64u11__SVInt32_tu11__SVInt64_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.raddhnt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -184,14 +184,14 @@ // CHECK-LABEL: @test_svraddhnt_n_u16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.raddhnt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z20test_svraddhnt_n_u16u11__SVUint8_tu12__SVUint16_tt( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.raddhnt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -205,14 +205,14 @@ // CHECK-LABEL: @test_svraddhnt_n_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.raddhnt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z20test_svraddhnt_n_u32u12__SVUint16_tu12__SVUint32_tj( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.raddhnt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -226,14 +226,14 @@ // CHECK-LABEL: @test_svraddhnt_n_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.raddhnt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z20test_svraddhnt_n_u64u12__SVUint32_tu12__SVUint64_tm( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.raddhnt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_rhadd.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_rhadd.c --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_rhadd.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_rhadd.c @@ -167,14 +167,14 @@ // CHECK-LABEL: @test_svrhadd_n_s8_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.srhadd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z19test_svrhadd_n_s8_mu10__SVBool_tu10__SVInt8_ta( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.srhadd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -189,7 +189,7 @@ // CHECK-LABEL: @test_svrhadd_n_s16_m( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.srhadd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -197,7 +197,7 @@ // CPP-CHECK-LABEL: @_Z20test_svrhadd_n_s16_mu10__SVBool_tu11__SVInt16_ts( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.srhadd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -212,7 +212,7 @@ // CHECK-LABEL: @test_svrhadd_n_s32_m( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.srhadd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -220,7 +220,7 @@ // CPP-CHECK-LABEL: @_Z20test_svrhadd_n_s32_mu10__SVBool_tu11__SVInt32_ti( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.srhadd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -235,7 +235,7 @@ // CHECK-LABEL: @test_svrhadd_n_s64_m( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.srhadd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -243,7 +243,7 @@ // CPP-CHECK-LABEL: @_Z20test_svrhadd_n_s64_mu10__SVBool_tu11__SVInt64_tl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.srhadd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -257,14 +257,14 @@ // CHECK-LABEL: @test_svrhadd_n_u8_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.urhadd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z19test_svrhadd_n_u8_mu10__SVBool_tu11__SVUint8_th( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.urhadd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -279,7 +279,7 @@ // CHECK-LABEL: @test_svrhadd_n_u16_m( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.urhadd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -287,7 +287,7 @@ // CPP-CHECK-LABEL: @_Z20test_svrhadd_n_u16_mu10__SVBool_tu12__SVUint16_tt( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.urhadd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -302,7 +302,7 @@ // CHECK-LABEL: @test_svrhadd_n_u32_m( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.urhadd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -310,7 +310,7 @@ // CPP-CHECK-LABEL: @_Z20test_svrhadd_n_u32_mu10__SVBool_tu12__SVUint32_tj( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.urhadd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -325,7 +325,7 @@ // CHECK-LABEL: @test_svrhadd_n_u64_m( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.urhadd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -333,7 +333,7 @@ // CPP-CHECK-LABEL: @_Z20test_svrhadd_n_u64_mu10__SVBool_tu12__SVUint64_tm( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.urhadd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -512,7 +512,7 @@ // CHECK-LABEL: @test_svrhadd_n_s8_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.srhadd.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) @@ -520,7 +520,7 @@ // // CPP-CHECK-LABEL: @_Z19test_svrhadd_n_s8_zu10__SVBool_tu10__SVInt8_ta( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.srhadd.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) @@ -536,7 +536,7 @@ // CHECK-LABEL: @test_svrhadd_n_s16_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.srhadd.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -545,7 +545,7 @@ // CPP-CHECK-LABEL: @_Z20test_svrhadd_n_s16_zu10__SVBool_tu11__SVInt16_ts( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.srhadd.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -561,7 +561,7 @@ // CHECK-LABEL: @test_svrhadd_n_s32_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.srhadd.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -570,7 +570,7 @@ // CPP-CHECK-LABEL: @_Z20test_svrhadd_n_s32_zu10__SVBool_tu11__SVInt32_ti( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.srhadd.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -586,7 +586,7 @@ // CHECK-LABEL: @test_svrhadd_n_s64_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.srhadd.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -595,7 +595,7 @@ // CPP-CHECK-LABEL: @_Z20test_svrhadd_n_s64_zu10__SVBool_tu11__SVInt64_tl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.srhadd.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -610,7 +610,7 @@ // CHECK-LABEL: @test_svrhadd_n_u8_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.urhadd.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) @@ -618,7 +618,7 @@ // // CPP-CHECK-LABEL: @_Z19test_svrhadd_n_u8_zu10__SVBool_tu11__SVUint8_th( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.urhadd.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) @@ -634,7 +634,7 @@ // CHECK-LABEL: @test_svrhadd_n_u16_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.urhadd.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -643,7 +643,7 @@ // CPP-CHECK-LABEL: @_Z20test_svrhadd_n_u16_zu10__SVBool_tu12__SVUint16_tt( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.urhadd.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -659,7 +659,7 @@ // CHECK-LABEL: @test_svrhadd_n_u32_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.urhadd.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -668,7 +668,7 @@ // CPP-CHECK-LABEL: @_Z20test_svrhadd_n_u32_zu10__SVBool_tu12__SVUint32_tj( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.urhadd.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -684,7 +684,7 @@ // CHECK-LABEL: @test_svrhadd_n_u64_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.urhadd.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -693,7 +693,7 @@ // CPP-CHECK-LABEL: @_Z20test_svrhadd_n_u64_zu10__SVBool_tu12__SVUint64_tm( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.urhadd.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -857,14 +857,14 @@ // CHECK-LABEL: @test_svrhadd_n_s8_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.srhadd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z19test_svrhadd_n_s8_xu10__SVBool_tu10__SVInt8_ta( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.srhadd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -879,7 +879,7 @@ // CHECK-LABEL: @test_svrhadd_n_s16_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.srhadd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -887,7 +887,7 @@ // CPP-CHECK-LABEL: @_Z20test_svrhadd_n_s16_xu10__SVBool_tu11__SVInt16_ts( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.srhadd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -902,7 +902,7 @@ // CHECK-LABEL: @test_svrhadd_n_s32_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.srhadd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -910,7 +910,7 @@ // CPP-CHECK-LABEL: @_Z20test_svrhadd_n_s32_xu10__SVBool_tu11__SVInt32_ti( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.srhadd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -925,7 +925,7 @@ // CHECK-LABEL: @test_svrhadd_n_s64_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.srhadd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -933,7 +933,7 @@ // CPP-CHECK-LABEL: @_Z20test_svrhadd_n_s64_xu10__SVBool_tu11__SVInt64_tl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.srhadd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -947,14 +947,14 @@ // CHECK-LABEL: @test_svrhadd_n_u8_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.urhadd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z19test_svrhadd_n_u8_xu10__SVBool_tu11__SVUint8_th( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.urhadd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -969,7 +969,7 @@ // CHECK-LABEL: @test_svrhadd_n_u16_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.urhadd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -977,7 +977,7 @@ // CPP-CHECK-LABEL: @_Z20test_svrhadd_n_u16_xu10__SVBool_tu12__SVUint16_tt( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.urhadd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -992,7 +992,7 @@ // CHECK-LABEL: @test_svrhadd_n_u32_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.urhadd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -1000,7 +1000,7 @@ // CPP-CHECK-LABEL: @_Z20test_svrhadd_n_u32_xu10__SVBool_tu12__SVUint32_tj( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.urhadd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -1015,7 +1015,7 @@ // CHECK-LABEL: @test_svrhadd_n_u64_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.urhadd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -1023,7 +1023,7 @@ // CPP-CHECK-LABEL: @_Z20test_svrhadd_n_u64_xu10__SVBool_tu12__SVUint64_tm( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.urhadd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_rshl.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_rshl.c --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_rshl.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_rshl.c @@ -479,7 +479,7 @@ // CHECK-LABEL: @test_svrshl_n_s8_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.srshl.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) @@ -487,7 +487,7 @@ // // CPP-CHECK-LABEL: @_Z18test_svrshl_n_s8_zu10__SVBool_tu10__SVInt8_ta( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.srshl.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) @@ -503,7 +503,7 @@ // CHECK-LABEL: @test_svrshl_n_s16_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.srshl.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -512,7 +512,7 @@ // CPP-CHECK-LABEL: @_Z19test_svrshl_n_s16_zu10__SVBool_tu11__SVInt16_ts( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.srshl.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -528,7 +528,7 @@ // CHECK-LABEL: @test_svrshl_n_s32_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.srshl.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -537,7 +537,7 @@ // CPP-CHECK-LABEL: @_Z19test_svrshl_n_s32_zu10__SVBool_tu11__SVInt32_ti( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.srshl.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -553,7 +553,7 @@ // CHECK-LABEL: @test_svrshl_n_s64_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.srshl.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -562,7 +562,7 @@ // CPP-CHECK-LABEL: @_Z19test_svrshl_n_s64_zu10__SVBool_tu11__SVInt64_tl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.srshl.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -577,7 +577,7 @@ // CHECK-LABEL: @test_svrshl_n_u8_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.urshl.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) @@ -585,7 +585,7 @@ // // CPP-CHECK-LABEL: @_Z18test_svrshl_n_u8_zu10__SVBool_tu11__SVUint8_ta( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.urshl.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) @@ -601,7 +601,7 @@ // CHECK-LABEL: @test_svrshl_n_u16_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.urshl.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -610,7 +610,7 @@ // CPP-CHECK-LABEL: @_Z19test_svrshl_n_u16_zu10__SVBool_tu12__SVUint16_ts( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.urshl.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -626,7 +626,7 @@ // CHECK-LABEL: @test_svrshl_n_u32_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.urshl.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -635,7 +635,7 @@ // CPP-CHECK-LABEL: @_Z19test_svrshl_n_u32_zu10__SVBool_tu12__SVUint32_ti( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.urshl.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -651,7 +651,7 @@ // CHECK-LABEL: @test_svrshl_n_u64_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.urshl.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -660,7 +660,7 @@ // CPP-CHECK-LABEL: @_Z19test_svrshl_n_u64_zu10__SVBool_tu12__SVUint64_tl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.urshl.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -675,14 +675,14 @@ // CHECK-LABEL: @test_svrshl_n_s8_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.srshl.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svrshl_n_s8_mu10__SVBool_tu10__SVInt8_ta( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.srshl.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -697,7 +697,7 @@ // CHECK-LABEL: @test_svrshl_n_s16_m( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.srshl.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -705,7 +705,7 @@ // CPP-CHECK-LABEL: @_Z19test_svrshl_n_s16_mu10__SVBool_tu11__SVInt16_ts( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.srshl.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -720,7 +720,7 @@ // CHECK-LABEL: @test_svrshl_n_s32_m( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.srshl.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -728,7 +728,7 @@ // CPP-CHECK-LABEL: @_Z19test_svrshl_n_s32_mu10__SVBool_tu11__SVInt32_ti( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.srshl.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -743,7 +743,7 @@ // CHECK-LABEL: @test_svrshl_n_s64_m( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.srshl.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -751,7 +751,7 @@ // CPP-CHECK-LABEL: @_Z19test_svrshl_n_s64_mu10__SVBool_tu11__SVInt64_tl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.srshl.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -765,14 +765,14 @@ // CHECK-LABEL: @test_svrshl_n_u8_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.urshl.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svrshl_n_u8_mu10__SVBool_tu11__SVUint8_ta( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.urshl.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -787,7 +787,7 @@ // CHECK-LABEL: @test_svrshl_n_u16_m( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.urshl.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -795,7 +795,7 @@ // CPP-CHECK-LABEL: @_Z19test_svrshl_n_u16_mu10__SVBool_tu12__SVUint16_ts( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.urshl.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -810,7 +810,7 @@ // CHECK-LABEL: @test_svrshl_n_u32_m( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.urshl.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -818,7 +818,7 @@ // CPP-CHECK-LABEL: @_Z19test_svrshl_n_u32_mu10__SVBool_tu12__SVUint32_ti( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.urshl.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -833,7 +833,7 @@ // CHECK-LABEL: @test_svrshl_n_u64_m( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.urshl.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -841,7 +841,7 @@ // CPP-CHECK-LABEL: @_Z19test_svrshl_n_u64_mu10__SVBool_tu12__SVUint64_tl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.urshl.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -855,14 +855,14 @@ // CHECK-LABEL: @test_svrshl_n_s8_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.srshl.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svrshl_n_s8_xu10__SVBool_tu10__SVInt8_ta( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.srshl.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -877,7 +877,7 @@ // CHECK-LABEL: @test_svrshl_n_s16_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.srshl.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -885,7 +885,7 @@ // CPP-CHECK-LABEL: @_Z19test_svrshl_n_s16_xu10__SVBool_tu11__SVInt16_ts( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.srshl.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -900,7 +900,7 @@ // CHECK-LABEL: @test_svrshl_n_s32_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.srshl.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -908,7 +908,7 @@ // CPP-CHECK-LABEL: @_Z19test_svrshl_n_s32_xu10__SVBool_tu11__SVInt32_ti( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.srshl.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -923,7 +923,7 @@ // CHECK-LABEL: @test_svrshl_n_s64_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.srshl.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -931,7 +931,7 @@ // CPP-CHECK-LABEL: @_Z19test_svrshl_n_s64_xu10__SVBool_tu11__SVInt64_tl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.srshl.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -945,14 +945,14 @@ // CHECK-LABEL: @test_svrshl_n_u8_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.urshl.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svrshl_n_u8_xu10__SVBool_tu11__SVUint8_ta( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.urshl.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -967,7 +967,7 @@ // CHECK-LABEL: @test_svrshl_n_u16_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.urshl.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -975,7 +975,7 @@ // CPP-CHECK-LABEL: @_Z19test_svrshl_n_u16_xu10__SVBool_tu12__SVUint16_ts( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.urshl.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -990,7 +990,7 @@ // CHECK-LABEL: @test_svrshl_n_u32_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.urshl.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -998,7 +998,7 @@ // CPP-CHECK-LABEL: @_Z19test_svrshl_n_u32_xu10__SVBool_tu12__SVUint32_ti( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.urshl.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -1013,7 +1013,7 @@ // CHECK-LABEL: @test_svrshl_n_u64_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.urshl.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -1021,7 +1021,7 @@ // CPP-CHECK-LABEL: @_Z19test_svrshl_n_u64_xu10__SVBool_tu12__SVUint64_tl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.urshl.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_rsubhnb.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_rsubhnb.c --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_rsubhnb.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_rsubhnb.c @@ -121,14 +121,14 @@ // CHECK-LABEL: @test_svrsubhnb_n_s16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.rsubhnb.nxv8i16( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z20test_svrsubhnb_n_s16u11__SVInt16_ts( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.rsubhnb.nxv8i16( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -142,14 +142,14 @@ // CHECK-LABEL: @test_svrsubhnb_n_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.rsubhnb.nxv4i32( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z20test_svrsubhnb_n_s32u11__SVInt32_ti( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.rsubhnb.nxv4i32( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -163,14 +163,14 @@ // CHECK-LABEL: @test_svrsubhnb_n_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.rsubhnb.nxv2i64( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z20test_svrsubhnb_n_s64u11__SVInt64_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.rsubhnb.nxv2i64( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -184,14 +184,14 @@ // CHECK-LABEL: @test_svrsubhnb_n_u16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.rsubhnb.nxv8i16( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z20test_svrsubhnb_n_u16u12__SVUint16_tt( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.rsubhnb.nxv8i16( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -205,14 +205,14 @@ // CHECK-LABEL: @test_svrsubhnb_n_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.rsubhnb.nxv4i32( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z20test_svrsubhnb_n_u32u12__SVUint32_tj( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.rsubhnb.nxv4i32( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -226,14 +226,14 @@ // CHECK-LABEL: @test_svrsubhnb_n_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.rsubhnb.nxv2i64( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z20test_svrsubhnb_n_u64u12__SVUint64_tm( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.rsubhnb.nxv2i64( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_rsubhnt.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_rsubhnt.c --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_rsubhnt.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_rsubhnt.c @@ -121,14 +121,14 @@ // CHECK-LABEL: @test_svrsubhnt_n_s16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.rsubhnt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z20test_svrsubhnt_n_s16u10__SVInt8_tu11__SVInt16_ts( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.rsubhnt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -142,14 +142,14 @@ // CHECK-LABEL: @test_svrsubhnt_n_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.rsubhnt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z20test_svrsubhnt_n_s32u11__SVInt16_tu11__SVInt32_ti( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.rsubhnt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -163,14 +163,14 @@ // CHECK-LABEL: @test_svrsubhnt_n_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.rsubhnt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z20test_svrsubhnt_n_s64u11__SVInt32_tu11__SVInt64_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.rsubhnt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -184,14 +184,14 @@ // CHECK-LABEL: @test_svrsubhnt_n_u16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.rsubhnt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z20test_svrsubhnt_n_u16u11__SVUint8_tu12__SVUint16_tt( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.rsubhnt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -205,14 +205,14 @@ // CHECK-LABEL: @test_svrsubhnt_n_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.rsubhnt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z20test_svrsubhnt_n_u32u12__SVUint16_tu12__SVUint32_tj( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.rsubhnt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -226,14 +226,14 @@ // CHECK-LABEL: @test_svrsubhnt_n_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.rsubhnt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z20test_svrsubhnt_n_u64u12__SVUint32_tu12__SVUint64_tm( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.rsubhnt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_sbclb.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_sbclb.c --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_sbclb.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_sbclb.c @@ -53,14 +53,14 @@ // CHECK-LABEL: @test_svsbclb_n_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sbclb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svsbclb_n_u32u12__SVUint32_tu12__SVUint32_tj( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sbclb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -74,14 +74,14 @@ // CHECK-LABEL: @test_svsbclb_n_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sbclb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svsbclb_n_u64u12__SVUint64_tu12__SVUint64_tm( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sbclb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_sbclt.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_sbclt.c --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_sbclt.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_sbclt.c @@ -53,14 +53,14 @@ // CHECK-LABEL: @test_svsbclt_n_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sbclt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svsbclt_n_u32u12__SVUint32_tu12__SVUint32_tj( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sbclt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -74,14 +74,14 @@ // CHECK-LABEL: @test_svsbclt_n_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sbclt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svsbclt_n_u64u12__SVUint64_tu12__SVUint64_tm( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sbclt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_sqadd.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_sqadd.c --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_sqadd.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_sqadd.c @@ -93,14 +93,14 @@ // CHECK-LABEL: @test_svsqadd_n_u8_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.usqadd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z19test_svsqadd_n_u8_mu10__SVBool_tu11__SVUint8_ta( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.usqadd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -115,7 +115,7 @@ // CHECK-LABEL: @test_svsqadd_n_u16_m( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.usqadd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -123,7 +123,7 @@ // CPP-CHECK-LABEL: @_Z20test_svsqadd_n_u16_mu10__SVBool_tu12__SVUint16_ts( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.usqadd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -138,7 +138,7 @@ // CHECK-LABEL: @test_svsqadd_n_u32_m( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.usqadd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -146,7 +146,7 @@ // CPP-CHECK-LABEL: @_Z20test_svsqadd_n_u32_mu10__SVBool_tu12__SVUint32_ti( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.usqadd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -161,7 +161,7 @@ // CHECK-LABEL: @test_svsqadd_n_u64_m( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.usqadd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -169,7 +169,7 @@ // CPP-CHECK-LABEL: @_Z20test_svsqadd_n_u64_mu10__SVBool_tu12__SVUint64_tl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.usqadd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -265,7 +265,7 @@ // CHECK-LABEL: @test_svsqadd_n_u8_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.usqadd.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) @@ -273,7 +273,7 @@ // // CPP-CHECK-LABEL: @_Z19test_svsqadd_n_u8_zu10__SVBool_tu11__SVUint8_ta( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.usqadd.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) @@ -289,7 +289,7 @@ // CHECK-LABEL: @test_svsqadd_n_u16_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.usqadd.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -298,7 +298,7 @@ // CPP-CHECK-LABEL: @_Z20test_svsqadd_n_u16_zu10__SVBool_tu12__SVUint16_ts( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.usqadd.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -314,7 +314,7 @@ // CHECK-LABEL: @test_svsqadd_n_u32_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.usqadd.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -323,7 +323,7 @@ // CPP-CHECK-LABEL: @_Z20test_svsqadd_n_u32_zu10__SVBool_tu12__SVUint32_ti( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.usqadd.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -339,7 +339,7 @@ // CHECK-LABEL: @test_svsqadd_n_u64_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.usqadd.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -348,7 +348,7 @@ // CPP-CHECK-LABEL: @_Z20test_svsqadd_n_u64_zu10__SVBool_tu12__SVUint64_tl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.usqadd.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -438,14 +438,14 @@ // CHECK-LABEL: @test_svsqadd_n_u8_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.usqadd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z19test_svsqadd_n_u8_xu10__SVBool_tu11__SVUint8_ta( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.usqadd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -460,7 +460,7 @@ // CHECK-LABEL: @test_svsqadd_n_u16_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.usqadd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -468,7 +468,7 @@ // CPP-CHECK-LABEL: @_Z20test_svsqadd_n_u16_xu10__SVBool_tu12__SVUint16_ts( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.usqadd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -483,7 +483,7 @@ // CHECK-LABEL: @test_svsqadd_n_u32_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.usqadd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -491,7 +491,7 @@ // CPP-CHECK-LABEL: @_Z20test_svsqadd_n_u32_xu10__SVBool_tu12__SVUint32_ti( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.usqadd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -506,7 +506,7 @@ // CHECK-LABEL: @test_svsqadd_n_u64_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.usqadd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -514,7 +514,7 @@ // CPP-CHECK-LABEL: @_Z20test_svsqadd_n_u64_xu10__SVBool_tu12__SVUint64_tl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.usqadd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_subhnb.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_subhnb.c --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_subhnb.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_subhnb.c @@ -121,14 +121,14 @@ // CHECK-LABEL: @test_svsubhnb_n_s16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.subhnb.nxv8i16( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z19test_svsubhnb_n_s16u11__SVInt16_ts( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.subhnb.nxv8i16( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -142,14 +142,14 @@ // CHECK-LABEL: @test_svsubhnb_n_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.subhnb.nxv4i32( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z19test_svsubhnb_n_s32u11__SVInt32_ti( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.subhnb.nxv4i32( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -163,14 +163,14 @@ // CHECK-LABEL: @test_svsubhnb_n_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.subhnb.nxv2i64( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z19test_svsubhnb_n_s64u11__SVInt64_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.subhnb.nxv2i64( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -184,14 +184,14 @@ // CHECK-LABEL: @test_svsubhnb_n_u16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.subhnb.nxv8i16( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z19test_svsubhnb_n_u16u12__SVUint16_tt( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.subhnb.nxv8i16( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -205,14 +205,14 @@ // CHECK-LABEL: @test_svsubhnb_n_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.subhnb.nxv4i32( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z19test_svsubhnb_n_u32u12__SVUint32_tj( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.subhnb.nxv4i32( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -226,14 +226,14 @@ // CHECK-LABEL: @test_svsubhnb_n_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.subhnb.nxv2i64( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z19test_svsubhnb_n_u64u12__SVUint64_tm( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.subhnb.nxv2i64( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_subhnt.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_subhnt.c --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_subhnt.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_subhnt.c @@ -121,14 +121,14 @@ // CHECK-LABEL: @test_svsubhnt_n_s16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.subhnt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z19test_svsubhnt_n_s16u10__SVInt8_tu11__SVInt16_ts( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.subhnt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -142,14 +142,14 @@ // CHECK-LABEL: @test_svsubhnt_n_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.subhnt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z19test_svsubhnt_n_s32u11__SVInt16_tu11__SVInt32_ti( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.subhnt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -163,14 +163,14 @@ // CHECK-LABEL: @test_svsubhnt_n_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.subhnt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z19test_svsubhnt_n_s64u11__SVInt32_tu11__SVInt64_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.subhnt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -184,14 +184,14 @@ // CHECK-LABEL: @test_svsubhnt_n_u16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.subhnt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z19test_svsubhnt_n_u16u11__SVUint8_tu12__SVUint16_tt( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.subhnt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -205,14 +205,14 @@ // CHECK-LABEL: @test_svsubhnt_n_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.subhnt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z19test_svsubhnt_n_u32u12__SVUint16_tu12__SVUint32_tj( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.subhnt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -226,14 +226,14 @@ // CHECK-LABEL: @test_svsubhnt_n_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.subhnt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z19test_svsubhnt_n_u64u12__SVUint32_tu12__SVUint64_tm( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.subhnt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_sublb.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_sublb.c --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_sublb.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_sublb.c @@ -121,14 +121,14 @@ // CHECK-LABEL: @test_svsublb_n_s16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ssublb.nxv8i16( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svsublb_n_s16u10__SVInt8_ta( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ssublb.nxv8i16( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -142,14 +142,14 @@ // CHECK-LABEL: @test_svsublb_n_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ssublb.nxv4i32( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svsublb_n_s32u11__SVInt16_ts( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ssublb.nxv4i32( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -163,14 +163,14 @@ // CHECK-LABEL: @test_svsublb_n_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ssublb.nxv2i64( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svsublb_n_s64u11__SVInt32_ti( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ssublb.nxv2i64( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -184,14 +184,14 @@ // CHECK-LABEL: @test_svsublb_n_u16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.usublb.nxv8i16( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svsublb_n_u16u11__SVUint8_th( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.usublb.nxv8i16( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -205,14 +205,14 @@ // CHECK-LABEL: @test_svsublb_n_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.usublb.nxv4i32( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svsublb_n_u32u12__SVUint16_tt( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.usublb.nxv4i32( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -226,14 +226,14 @@ // CHECK-LABEL: @test_svsublb_n_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.usublb.nxv2i64( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svsublb_n_u64u12__SVUint32_tj( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.usublb.nxv2i64( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_sublbt.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_sublbt.c --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_sublbt.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_sublbt.c @@ -70,14 +70,14 @@ // CHECK-LABEL: @test_svsublbt_n_s16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ssublbt.nxv8i16( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z19test_svsublbt_n_s16u10__SVInt8_ta( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ssublbt.nxv8i16( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -91,14 +91,14 @@ // CHECK-LABEL: @test_svsublbt_n_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ssublbt.nxv4i32( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z19test_svsublbt_n_s32u11__SVInt16_ts( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ssublbt.nxv4i32( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -112,14 +112,14 @@ // CHECK-LABEL: @test_svsublbt_n_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ssublbt.nxv2i64( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z19test_svsublbt_n_s64u11__SVInt32_ti( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ssublbt.nxv2i64( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_sublt.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_sublt.c --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_sublt.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_sublt.c @@ -121,14 +121,14 @@ // CHECK-LABEL: @test_svsublt_n_s16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ssublt.nxv8i16( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svsublt_n_s16u10__SVInt8_ta( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ssublt.nxv8i16( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -142,14 +142,14 @@ // CHECK-LABEL: @test_svsublt_n_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ssublt.nxv4i32( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svsublt_n_s32u11__SVInt16_ts( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ssublt.nxv4i32( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -163,14 +163,14 @@ // CHECK-LABEL: @test_svsublt_n_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ssublt.nxv2i64( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svsublt_n_s64u11__SVInt32_ti( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ssublt.nxv2i64( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -184,14 +184,14 @@ // CHECK-LABEL: @test_svsublt_n_u16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.usublt.nxv8i16( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svsublt_n_u16u11__SVUint8_th( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.usublt.nxv8i16( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -205,14 +205,14 @@ // CHECK-LABEL: @test_svsublt_n_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.usublt.nxv4i32( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svsublt_n_u32u12__SVUint16_tt( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.usublt.nxv4i32( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -226,14 +226,14 @@ // CHECK-LABEL: @test_svsublt_n_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.usublt.nxv2i64( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svsublt_n_u64u12__SVUint32_tj( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.usublt.nxv2i64( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_subltb.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_subltb.c --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_subltb.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_subltb.c @@ -70,14 +70,14 @@ // CHECK-LABEL: @test_svsubltb_n_s16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ssubltb.nxv8i16( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z19test_svsubltb_n_s16u10__SVInt8_ta( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ssubltb.nxv8i16( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -91,14 +91,14 @@ // CHECK-LABEL: @test_svsubltb_n_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ssubltb.nxv4i32( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z19test_svsubltb_n_s32u11__SVInt16_ts( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ssubltb.nxv4i32( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -112,14 +112,14 @@ // CHECK-LABEL: @test_svsubltb_n_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ssubltb.nxv2i64( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z19test_svsubltb_n_s64u11__SVInt32_ti( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ssubltb.nxv2i64( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_subwb.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_subwb.c --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_subwb.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_subwb.c @@ -121,14 +121,14 @@ // CHECK-LABEL: @test_svsubwb_n_s16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ssubwb.nxv8i16( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svsubwb_n_s16u11__SVInt16_ta( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ssubwb.nxv8i16( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -142,14 +142,14 @@ // CHECK-LABEL: @test_svsubwb_n_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ssubwb.nxv4i32( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svsubwb_n_s32u11__SVInt32_ts( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ssubwb.nxv4i32( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -163,14 +163,14 @@ // CHECK-LABEL: @test_svsubwb_n_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ssubwb.nxv2i64( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svsubwb_n_s64u11__SVInt64_ti( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ssubwb.nxv2i64( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -184,14 +184,14 @@ // CHECK-LABEL: @test_svsubwb_n_u16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.usubwb.nxv8i16( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svsubwb_n_u16u12__SVUint16_th( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.usubwb.nxv8i16( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -205,14 +205,14 @@ // CHECK-LABEL: @test_svsubwb_n_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.usubwb.nxv4i32( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svsubwb_n_u32u12__SVUint32_tt( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.usubwb.nxv4i32( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -226,14 +226,14 @@ // CHECK-LABEL: @test_svsubwb_n_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.usubwb.nxv2i64( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svsubwb_n_u64u12__SVUint64_tj( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.usubwb.nxv2i64( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_subwt.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_subwt.c --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_subwt.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_subwt.c @@ -121,14 +121,14 @@ // CHECK-LABEL: @test_svsubwt_n_s16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ssubwt.nxv8i16( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svsubwt_n_s16u11__SVInt16_ta( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ssubwt.nxv8i16( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -142,14 +142,14 @@ // CHECK-LABEL: @test_svsubwt_n_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ssubwt.nxv4i32( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svsubwt_n_s32u11__SVInt32_ts( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ssubwt.nxv4i32( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -163,14 +163,14 @@ // CHECK-LABEL: @test_svsubwt_n_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ssubwt.nxv2i64( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svsubwt_n_s64u11__SVInt64_ti( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ssubwt.nxv2i64( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -184,14 +184,14 @@ // CHECK-LABEL: @test_svsubwt_n_u16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.usubwt.nxv8i16( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svsubwt_n_u16u12__SVUint16_th( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.usubwt.nxv8i16( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -205,14 +205,14 @@ // CHECK-LABEL: @test_svsubwt_n_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.usubwt.nxv4i32( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svsubwt_n_u32u12__SVUint32_tt( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.usubwt.nxv4i32( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -226,14 +226,14 @@ // CHECK-LABEL: @test_svsubwt_n_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.usubwt.nxv2i64( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svsubwt_n_u64u12__SVUint64_tj( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.usubwt.nxv2i64( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_uqadd.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_uqadd.c --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_uqadd.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_uqadd.c @@ -93,14 +93,14 @@ // CHECK-LABEL: @test_svuqadd_n_s8_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.suqadd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z19test_svuqadd_n_s8_mu10__SVBool_tu10__SVInt8_th( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.suqadd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -115,7 +115,7 @@ // CHECK-LABEL: @test_svuqadd_n_s16_m( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.suqadd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -123,7 +123,7 @@ // CPP-CHECK-LABEL: @_Z20test_svuqadd_n_s16_mu10__SVBool_tu11__SVInt16_tt( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.suqadd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -138,7 +138,7 @@ // CHECK-LABEL: @test_svuqadd_n_s32_m( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.suqadd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -146,7 +146,7 @@ // CPP-CHECK-LABEL: @_Z20test_svuqadd_n_s32_mu10__SVBool_tu11__SVInt32_tj( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.suqadd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -161,7 +161,7 @@ // CHECK-LABEL: @test_svuqadd_n_s64_m( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.suqadd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -169,7 +169,7 @@ // CPP-CHECK-LABEL: @_Z20test_svuqadd_n_s64_mu10__SVBool_tu11__SVInt64_tm( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.suqadd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -265,7 +265,7 @@ // CHECK-LABEL: @test_svuqadd_n_s8_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.suqadd.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) @@ -273,7 +273,7 @@ // // CPP-CHECK-LABEL: @_Z19test_svuqadd_n_s8_zu10__SVBool_tu10__SVInt8_th( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.suqadd.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) @@ -289,7 +289,7 @@ // CHECK-LABEL: @test_svuqadd_n_s16_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.suqadd.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -298,7 +298,7 @@ // CPP-CHECK-LABEL: @_Z20test_svuqadd_n_s16_zu10__SVBool_tu11__SVInt16_tt( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.suqadd.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -314,7 +314,7 @@ // CHECK-LABEL: @test_svuqadd_n_s32_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.suqadd.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -323,7 +323,7 @@ // CPP-CHECK-LABEL: @_Z20test_svuqadd_n_s32_zu10__SVBool_tu11__SVInt32_tj( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.suqadd.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -339,7 +339,7 @@ // CHECK-LABEL: @test_svuqadd_n_s64_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.suqadd.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -348,7 +348,7 @@ // CPP-CHECK-LABEL: @_Z20test_svuqadd_n_s64_zu10__SVBool_tu11__SVInt64_tm( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.suqadd.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) @@ -438,14 +438,14 @@ // CHECK-LABEL: @test_svuqadd_n_s8_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.suqadd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z19test_svuqadd_n_s8_xu10__SVBool_tu10__SVInt8_th( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.suqadd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] @@ -460,7 +460,7 @@ // CHECK-LABEL: @test_svuqadd_n_s16_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.suqadd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -468,7 +468,7 @@ // CPP-CHECK-LABEL: @_Z20test_svuqadd_n_s16_xu10__SVBool_tu11__SVInt16_tt( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.suqadd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -483,7 +483,7 @@ // CHECK-LABEL: @test_svuqadd_n_s32_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.suqadd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -491,7 +491,7 @@ // CPP-CHECK-LABEL: @_Z20test_svuqadd_n_s32_xu10__SVBool_tu11__SVInt32_tj( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.suqadd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] @@ -506,7 +506,7 @@ // CHECK-LABEL: @test_svuqadd_n_s64_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.suqadd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] @@ -514,7 +514,7 @@ // CPP-CHECK-LABEL: @_Z20test_svuqadd_n_s64_xu10__SVBool_tu11__SVInt64_tm( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i32 0 +// CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.suqadd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] diff --git a/clang/test/Headers/wasm.c b/clang/test/Headers/wasm.c --- a/clang/test/Headers/wasm.c +++ b/clang/test/Headers/wasm.c @@ -20,7 +20,7 @@ // CHECK-LABEL: @test_v128_load8_splat( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = load i8, i8* [[MEM:%.*]], align 1, !tbaa [[TBAA2]] -// CHECK-NEXT: [[VECINIT_I:%.*]] = insertelement <16 x i8> undef, i8 [[TMP0]], i32 0 +// CHECK-NEXT: [[VECINIT_I:%.*]] = insertelement <16 x i8> undef, i8 [[TMP0]], i64 0 // CHECK-NEXT: [[VECINIT16_I:%.*]] = shufflevector <16 x i8> [[VECINIT_I]], <16 x i8> poison, <16 x i32> zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = bitcast <16 x i8> [[VECINIT16_I]] to <4 x i32> // CHECK-NEXT: ret <4 x i32> [[TMP1]] @@ -33,7 +33,7 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[__V1_I:%.*]] = bitcast i8* [[MEM:%.*]] to i16* // CHECK-NEXT: [[TMP0:%.*]] = load i16, i16* [[__V1_I]], align 1, !tbaa [[TBAA2]] -// CHECK-NEXT: [[VECINIT_I:%.*]] = insertelement <8 x i16> undef, i16 [[TMP0]], i32 0 +// CHECK-NEXT: [[VECINIT_I:%.*]] = insertelement <8 x i16> undef, i16 [[TMP0]], i64 0 // CHECK-NEXT: [[VECINIT8_I:%.*]] = shufflevector <8 x i16> [[VECINIT_I]], <8 x i16> poison, <8 x i32> zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = bitcast <8 x i16> [[VECINIT8_I]] to <4 x i32> // CHECK-NEXT: ret <4 x i32> [[TMP1]] @@ -46,7 +46,7 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[__V1_I:%.*]] = bitcast i8* [[MEM:%.*]] to i32* // CHECK-NEXT: [[TMP0:%.*]] = load i32, i32* [[__V1_I]], align 1, !tbaa [[TBAA2]] -// CHECK-NEXT: [[VECINIT_I:%.*]] = insertelement <4 x i32> undef, i32 [[TMP0]], i32 0 +// CHECK-NEXT: [[VECINIT_I:%.*]] = insertelement <4 x i32> undef, i32 [[TMP0]], i64 0 // CHECK-NEXT: [[VECINIT4_I:%.*]] = shufflevector <4 x i32> [[VECINIT_I]], <4 x i32> poison, <4 x i32> zeroinitializer // CHECK-NEXT: ret <4 x i32> [[VECINIT4_I]] // @@ -58,7 +58,7 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[__V1_I:%.*]] = bitcast i8* [[MEM:%.*]] to i64* // CHECK-NEXT: [[TMP0:%.*]] = load i64, i64* [[__V1_I]], align 1, !tbaa [[TBAA2]] -// CHECK-NEXT: [[VECINIT_I:%.*]] = insertelement <2 x i64> undef, i64 [[TMP0]], i32 0 +// CHECK-NEXT: [[VECINIT_I:%.*]] = insertelement <2 x i64> undef, i64 [[TMP0]], i64 0 // CHECK-NEXT: [[VECINIT2_I:%.*]] = shufflevector <2 x i64> [[VECINIT_I]], <2 x i64> poison, <2 x i32> zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = bitcast <2 x i64> [[VECINIT2_I]] to <4 x i32> // CHECK-NEXT: ret <4 x i32> [[TMP1]] @@ -141,7 +141,7 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[__V1_I:%.*]] = bitcast i8* [[MEM:%.*]] to i32* // CHECK-NEXT: [[TMP0:%.*]] = load i32, i32* [[__V1_I]], align 1, !tbaa [[TBAA2]] -// CHECK-NEXT: [[VECINIT4_I:%.*]] = insertelement <4 x i32> , i32 [[TMP0]], i32 0 +// CHECK-NEXT: [[VECINIT4_I:%.*]] = insertelement <4 x i32> , i32 [[TMP0]], i64 0 // CHECK-NEXT: ret <4 x i32> [[VECINIT4_I]] // v128_t test_v128_load32_zero(const void *mem) { @@ -152,7 +152,7 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[__V1_I:%.*]] = bitcast i8* [[MEM:%.*]] to i64* // CHECK-NEXT: [[TMP0:%.*]] = load i64, i64* [[__V1_I]], align 1, !tbaa [[TBAA2]] -// CHECK-NEXT: [[VECINIT2_I:%.*]] = insertelement <2 x i64> , i64 [[TMP0]], i32 0 +// CHECK-NEXT: [[VECINIT2_I:%.*]] = insertelement <2 x i64> , i64 [[TMP0]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = bitcast <2 x i64> [[VECINIT2_I]] to <4 x i32> // CHECK-NEXT: ret <4 x i32> [[TMP1]] // @@ -164,7 +164,7 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = load i8, i8* [[PTR:%.*]], align 1, !tbaa [[TBAA2]] // CHECK-NEXT: [[TMP1:%.*]] = bitcast <4 x i32> [[VEC:%.*]] to <16 x i8> -// CHECK-NEXT: [[VECINS_I:%.*]] = insertelement <16 x i8> [[TMP1]], i8 [[TMP0]], i32 15 +// CHECK-NEXT: [[VECINS_I:%.*]] = insertelement <16 x i8> [[TMP1]], i8 [[TMP0]], i64 15 // CHECK-NEXT: [[TMP2:%.*]] = bitcast <16 x i8> [[VECINS_I]] to <4 x i32> // CHECK-NEXT: ret <4 x i32> [[TMP2]] // @@ -176,7 +176,7 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = load i16, i16* [[PTR:%.*]], align 1, !tbaa [[TBAA2]] // CHECK-NEXT: [[TMP1:%.*]] = bitcast <4 x i32> [[VEC:%.*]] to <8 x i16> -// CHECK-NEXT: [[VECINS_I:%.*]] = insertelement <8 x i16> [[TMP1]], i16 [[TMP0]], i32 7 +// CHECK-NEXT: [[VECINS_I:%.*]] = insertelement <8 x i16> [[TMP1]], i16 [[TMP0]], i64 7 // CHECK-NEXT: [[TMP2:%.*]] = bitcast <8 x i16> [[VECINS_I]] to <4 x i32> // CHECK-NEXT: ret <4 x i32> [[TMP2]] // @@ -187,7 +187,7 @@ // CHECK-LABEL: @test_v128_load32_lane( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = load i32, i32* [[PTR:%.*]], align 1, !tbaa [[TBAA2]] -// CHECK-NEXT: [[VECINS_I:%.*]] = insertelement <4 x i32> [[VEC:%.*]], i32 [[TMP0]], i32 3 +// CHECK-NEXT: [[VECINS_I:%.*]] = insertelement <4 x i32> [[VEC:%.*]], i32 [[TMP0]], i64 3 // CHECK-NEXT: ret <4 x i32> [[VECINS_I]] // v128_t test_v128_load32_lane(const uint32_t *ptr, v128_t vec) { @@ -198,7 +198,7 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = load i64, i64* [[PTR:%.*]], align 1, !tbaa [[TBAA2]] // CHECK-NEXT: [[TMP1:%.*]] = bitcast <4 x i32> [[VEC:%.*]] to <2 x i64> -// CHECK-NEXT: [[VECINS_I:%.*]] = insertelement <2 x i64> [[TMP1]], i64 [[TMP0]], i32 1 +// CHECK-NEXT: [[VECINS_I:%.*]] = insertelement <2 x i64> [[TMP1]], i64 [[TMP0]], i64 1 // CHECK-NEXT: [[TMP2:%.*]] = bitcast <2 x i64> [[VECINS_I]] to <4 x i32> // CHECK-NEXT: ret <4 x i32> [[TMP2]] // @@ -219,7 +219,7 @@ // CHECK-LABEL: @test_v128_store8_lane( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x i32> [[VEC:%.*]] to <16 x i8> -// CHECK-NEXT: [[VECEXT_I:%.*]] = extractelement <16 x i8> [[TMP0]], i32 15 +// CHECK-NEXT: [[VECEXT_I:%.*]] = extractelement <16 x i8> [[TMP0]], i64 15 // CHECK-NEXT: store i8 [[VECEXT_I]], i8* [[PTR:%.*]], align 1, !tbaa [[TBAA2]] // CHECK-NEXT: ret void // @@ -230,7 +230,7 @@ // CHECK-LABEL: @test_v128_store16_lane( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x i32> [[VEC:%.*]] to <8 x i16> -// CHECK-NEXT: [[VECEXT_I:%.*]] = extractelement <8 x i16> [[TMP0]], i32 7 +// CHECK-NEXT: [[VECEXT_I:%.*]] = extractelement <8 x i16> [[TMP0]], i64 7 // CHECK-NEXT: store i16 [[VECEXT_I]], i16* [[PTR:%.*]], align 1, !tbaa [[TBAA2]] // CHECK-NEXT: ret void // @@ -240,7 +240,7 @@ // CHECK-LABEL: @test_v128_store32_lane( // CHECK-NEXT: entry: -// CHECK-NEXT: [[VECEXT_I:%.*]] = extractelement <4 x i32> [[VEC:%.*]], i32 3 +// CHECK-NEXT: [[VECEXT_I:%.*]] = extractelement <4 x i32> [[VEC:%.*]], i64 3 // CHECK-NEXT: store i32 [[VECEXT_I]], i32* [[PTR:%.*]], align 1, !tbaa [[TBAA2]] // CHECK-NEXT: ret void // @@ -251,7 +251,7 @@ // CHECK-LABEL: @test_v128_store64_lane( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x i32> [[VEC:%.*]] to <2 x i64> -// CHECK-NEXT: [[VECEXT_I:%.*]] = extractelement <2 x i64> [[TMP0]], i32 1 +// CHECK-NEXT: [[VECEXT_I:%.*]] = extractelement <2 x i64> [[TMP0]], i64 1 // CHECK-NEXT: store i64 [[VECEXT_I]], i64* [[PTR:%.*]], align 1, !tbaa [[TBAA2]] // CHECK-NEXT: ret void // @@ -261,22 +261,22 @@ // CHECK-LABEL: @test_i8x16_make( // CHECK-NEXT: entry: -// CHECK-NEXT: [[VECINIT_I:%.*]] = insertelement <16 x i8> undef, i8 [[C0:%.*]], i32 0 -// CHECK-NEXT: [[VECINIT1_I:%.*]] = insertelement <16 x i8> [[VECINIT_I]], i8 [[C1:%.*]], i32 1 -// CHECK-NEXT: [[VECINIT2_I:%.*]] = insertelement <16 x i8> [[VECINIT1_I]], i8 [[C2:%.*]], i32 2 -// CHECK-NEXT: [[VECINIT3_I:%.*]] = insertelement <16 x i8> [[VECINIT2_I]], i8 [[C3:%.*]], i32 3 -// CHECK-NEXT: [[VECINIT4_I:%.*]] = insertelement <16 x i8> [[VECINIT3_I]], i8 [[C4:%.*]], i32 4 -// CHECK-NEXT: [[VECINIT5_I:%.*]] = insertelement <16 x i8> [[VECINIT4_I]], i8 [[C5:%.*]], i32 5 -// CHECK-NEXT: [[VECINIT6_I:%.*]] = insertelement <16 x i8> [[VECINIT5_I]], i8 [[C6:%.*]], i32 6 -// CHECK-NEXT: [[VECINIT7_I:%.*]] = insertelement <16 x i8> [[VECINIT6_I]], i8 [[C7:%.*]], i32 7 -// CHECK-NEXT: [[VECINIT8_I:%.*]] = insertelement <16 x i8> [[VECINIT7_I]], i8 [[C8:%.*]], i32 8 -// CHECK-NEXT: [[VECINIT9_I:%.*]] = insertelement <16 x i8> [[VECINIT8_I]], i8 [[C9:%.*]], i32 9 -// CHECK-NEXT: [[VECINIT10_I:%.*]] = insertelement <16 x i8> [[VECINIT9_I]], i8 [[C10:%.*]], i32 10 -// CHECK-NEXT: [[VECINIT11_I:%.*]] = insertelement <16 x i8> [[VECINIT10_I]], i8 [[C11:%.*]], i32 11 -// CHECK-NEXT: [[VECINIT12_I:%.*]] = insertelement <16 x i8> [[VECINIT11_I]], i8 [[C12:%.*]], i32 12 -// CHECK-NEXT: [[VECINIT13_I:%.*]] = insertelement <16 x i8> [[VECINIT12_I]], i8 [[C13:%.*]], i32 13 -// CHECK-NEXT: [[VECINIT14_I:%.*]] = insertelement <16 x i8> [[VECINIT13_I]], i8 [[C14:%.*]], i32 14 -// CHECK-NEXT: [[VECINIT15_I:%.*]] = insertelement <16 x i8> [[VECINIT14_I]], i8 [[C15:%.*]], i32 15 +// CHECK-NEXT: [[VECINIT_I:%.*]] = insertelement <16 x i8> undef, i8 [[C0:%.*]], i64 0 +// CHECK-NEXT: [[VECINIT1_I:%.*]] = insertelement <16 x i8> [[VECINIT_I]], i8 [[C1:%.*]], i64 1 +// CHECK-NEXT: [[VECINIT2_I:%.*]] = insertelement <16 x i8> [[VECINIT1_I]], i8 [[C2:%.*]], i64 2 +// CHECK-NEXT: [[VECINIT3_I:%.*]] = insertelement <16 x i8> [[VECINIT2_I]], i8 [[C3:%.*]], i64 3 +// CHECK-NEXT: [[VECINIT4_I:%.*]] = insertelement <16 x i8> [[VECINIT3_I]], i8 [[C4:%.*]], i64 4 +// CHECK-NEXT: [[VECINIT5_I:%.*]] = insertelement <16 x i8> [[VECINIT4_I]], i8 [[C5:%.*]], i64 5 +// CHECK-NEXT: [[VECINIT6_I:%.*]] = insertelement <16 x i8> [[VECINIT5_I]], i8 [[C6:%.*]], i64 6 +// CHECK-NEXT: [[VECINIT7_I:%.*]] = insertelement <16 x i8> [[VECINIT6_I]], i8 [[C7:%.*]], i64 7 +// CHECK-NEXT: [[VECINIT8_I:%.*]] = insertelement <16 x i8> [[VECINIT7_I]], i8 [[C8:%.*]], i64 8 +// CHECK-NEXT: [[VECINIT9_I:%.*]] = insertelement <16 x i8> [[VECINIT8_I]], i8 [[C9:%.*]], i64 9 +// CHECK-NEXT: [[VECINIT10_I:%.*]] = insertelement <16 x i8> [[VECINIT9_I]], i8 [[C10:%.*]], i64 10 +// CHECK-NEXT: [[VECINIT11_I:%.*]] = insertelement <16 x i8> [[VECINIT10_I]], i8 [[C11:%.*]], i64 11 +// CHECK-NEXT: [[VECINIT12_I:%.*]] = insertelement <16 x i8> [[VECINIT11_I]], i8 [[C12:%.*]], i64 12 +// CHECK-NEXT: [[VECINIT13_I:%.*]] = insertelement <16 x i8> [[VECINIT12_I]], i8 [[C13:%.*]], i64 13 +// CHECK-NEXT: [[VECINIT14_I:%.*]] = insertelement <16 x i8> [[VECINIT13_I]], i8 [[C14:%.*]], i64 14 +// CHECK-NEXT: [[VECINIT15_I:%.*]] = insertelement <16 x i8> [[VECINIT14_I]], i8 [[C15:%.*]], i64 15 // CHECK-NEXT: [[TMP0:%.*]] = bitcast <16 x i8> [[VECINIT15_I]] to <4 x i32> // CHECK-NEXT: ret <4 x i32> [[TMP0]] // @@ -286,22 +286,22 @@ // CHECK-LABEL: @test_u8x16_make( // CHECK-NEXT: entry: -// CHECK-NEXT: [[VECINIT_I:%.*]] = insertelement <16 x i8> undef, i8 [[C0:%.*]], i32 0 -// CHECK-NEXT: [[VECINIT1_I:%.*]] = insertelement <16 x i8> [[VECINIT_I]], i8 [[C1:%.*]], i32 1 -// CHECK-NEXT: [[VECINIT2_I:%.*]] = insertelement <16 x i8> [[VECINIT1_I]], i8 [[C2:%.*]], i32 2 -// CHECK-NEXT: [[VECINIT3_I:%.*]] = insertelement <16 x i8> [[VECINIT2_I]], i8 [[C3:%.*]], i32 3 -// CHECK-NEXT: [[VECINIT4_I:%.*]] = insertelement <16 x i8> [[VECINIT3_I]], i8 [[C4:%.*]], i32 4 -// CHECK-NEXT: [[VECINIT5_I:%.*]] = insertelement <16 x i8> [[VECINIT4_I]], i8 [[C5:%.*]], i32 5 -// CHECK-NEXT: [[VECINIT6_I:%.*]] = insertelement <16 x i8> [[VECINIT5_I]], i8 [[C6:%.*]], i32 6 -// CHECK-NEXT: [[VECINIT7_I:%.*]] = insertelement <16 x i8> [[VECINIT6_I]], i8 [[C7:%.*]], i32 7 -// CHECK-NEXT: [[VECINIT8_I:%.*]] = insertelement <16 x i8> [[VECINIT7_I]], i8 [[C8:%.*]], i32 8 -// CHECK-NEXT: [[VECINIT9_I:%.*]] = insertelement <16 x i8> [[VECINIT8_I]], i8 [[C9:%.*]], i32 9 -// CHECK-NEXT: [[VECINIT10_I:%.*]] = insertelement <16 x i8> [[VECINIT9_I]], i8 [[C10:%.*]], i32 10 -// CHECK-NEXT: [[VECINIT11_I:%.*]] = insertelement <16 x i8> [[VECINIT10_I]], i8 [[C11:%.*]], i32 11 -// CHECK-NEXT: [[VECINIT12_I:%.*]] = insertelement <16 x i8> [[VECINIT11_I]], i8 [[C12:%.*]], i32 12 -// CHECK-NEXT: [[VECINIT13_I:%.*]] = insertelement <16 x i8> [[VECINIT12_I]], i8 [[C13:%.*]], i32 13 -// CHECK-NEXT: [[VECINIT14_I:%.*]] = insertelement <16 x i8> [[VECINIT13_I]], i8 [[C14:%.*]], i32 14 -// CHECK-NEXT: [[VECINIT15_I:%.*]] = insertelement <16 x i8> [[VECINIT14_I]], i8 [[C15:%.*]], i32 15 +// CHECK-NEXT: [[VECINIT_I:%.*]] = insertelement <16 x i8> undef, i8 [[C0:%.*]], i64 0 +// CHECK-NEXT: [[VECINIT1_I:%.*]] = insertelement <16 x i8> [[VECINIT_I]], i8 [[C1:%.*]], i64 1 +// CHECK-NEXT: [[VECINIT2_I:%.*]] = insertelement <16 x i8> [[VECINIT1_I]], i8 [[C2:%.*]], i64 2 +// CHECK-NEXT: [[VECINIT3_I:%.*]] = insertelement <16 x i8> [[VECINIT2_I]], i8 [[C3:%.*]], i64 3 +// CHECK-NEXT: [[VECINIT4_I:%.*]] = insertelement <16 x i8> [[VECINIT3_I]], i8 [[C4:%.*]], i64 4 +// CHECK-NEXT: [[VECINIT5_I:%.*]] = insertelement <16 x i8> [[VECINIT4_I]], i8 [[C5:%.*]], i64 5 +// CHECK-NEXT: [[VECINIT6_I:%.*]] = insertelement <16 x i8> [[VECINIT5_I]], i8 [[C6:%.*]], i64 6 +// CHECK-NEXT: [[VECINIT7_I:%.*]] = insertelement <16 x i8> [[VECINIT6_I]], i8 [[C7:%.*]], i64 7 +// CHECK-NEXT: [[VECINIT8_I:%.*]] = insertelement <16 x i8> [[VECINIT7_I]], i8 [[C8:%.*]], i64 8 +// CHECK-NEXT: [[VECINIT9_I:%.*]] = insertelement <16 x i8> [[VECINIT8_I]], i8 [[C9:%.*]], i64 9 +// CHECK-NEXT: [[VECINIT10_I:%.*]] = insertelement <16 x i8> [[VECINIT9_I]], i8 [[C10:%.*]], i64 10 +// CHECK-NEXT: [[VECINIT11_I:%.*]] = insertelement <16 x i8> [[VECINIT10_I]], i8 [[C11:%.*]], i64 11 +// CHECK-NEXT: [[VECINIT12_I:%.*]] = insertelement <16 x i8> [[VECINIT11_I]], i8 [[C12:%.*]], i64 12 +// CHECK-NEXT: [[VECINIT13_I:%.*]] = insertelement <16 x i8> [[VECINIT12_I]], i8 [[C13:%.*]], i64 13 +// CHECK-NEXT: [[VECINIT14_I:%.*]] = insertelement <16 x i8> [[VECINIT13_I]], i8 [[C14:%.*]], i64 14 +// CHECK-NEXT: [[VECINIT15_I:%.*]] = insertelement <16 x i8> [[VECINIT14_I]], i8 [[C15:%.*]], i64 15 // CHECK-NEXT: [[TMP0:%.*]] = bitcast <16 x i8> [[VECINIT15_I]] to <4 x i32> // CHECK-NEXT: ret <4 x i32> [[TMP0]] // @@ -311,14 +311,14 @@ // CHECK-LABEL: @test_i16x8_make( // CHECK-NEXT: entry: -// CHECK-NEXT: [[VECINIT_I:%.*]] = insertelement <8 x i16> undef, i16 [[C0:%.*]], i32 0 -// CHECK-NEXT: [[VECINIT1_I:%.*]] = insertelement <8 x i16> [[VECINIT_I]], i16 [[C1:%.*]], i32 1 -// CHECK-NEXT: [[VECINIT2_I:%.*]] = insertelement <8 x i16> [[VECINIT1_I]], i16 [[C2:%.*]], i32 2 -// CHECK-NEXT: [[VECINIT3_I:%.*]] = insertelement <8 x i16> [[VECINIT2_I]], i16 [[C3:%.*]], i32 3 -// CHECK-NEXT: [[VECINIT4_I:%.*]] = insertelement <8 x i16> [[VECINIT3_I]], i16 [[C4:%.*]], i32 4 -// CHECK-NEXT: [[VECINIT5_I:%.*]] = insertelement <8 x i16> [[VECINIT4_I]], i16 [[C5:%.*]], i32 5 -// CHECK-NEXT: [[VECINIT6_I:%.*]] = insertelement <8 x i16> [[VECINIT5_I]], i16 [[C6:%.*]], i32 6 -// CHECK-NEXT: [[VECINIT7_I:%.*]] = insertelement <8 x i16> [[VECINIT6_I]], i16 [[C7:%.*]], i32 7 +// CHECK-NEXT: [[VECINIT_I:%.*]] = insertelement <8 x i16> undef, i16 [[C0:%.*]], i64 0 +// CHECK-NEXT: [[VECINIT1_I:%.*]] = insertelement <8 x i16> [[VECINIT_I]], i16 [[C1:%.*]], i64 1 +// CHECK-NEXT: [[VECINIT2_I:%.*]] = insertelement <8 x i16> [[VECINIT1_I]], i16 [[C2:%.*]], i64 2 +// CHECK-NEXT: [[VECINIT3_I:%.*]] = insertelement <8 x i16> [[VECINIT2_I]], i16 [[C3:%.*]], i64 3 +// CHECK-NEXT: [[VECINIT4_I:%.*]] = insertelement <8 x i16> [[VECINIT3_I]], i16 [[C4:%.*]], i64 4 +// CHECK-NEXT: [[VECINIT5_I:%.*]] = insertelement <8 x i16> [[VECINIT4_I]], i16 [[C5:%.*]], i64 5 +// CHECK-NEXT: [[VECINIT6_I:%.*]] = insertelement <8 x i16> [[VECINIT5_I]], i16 [[C6:%.*]], i64 6 +// CHECK-NEXT: [[VECINIT7_I:%.*]] = insertelement <8 x i16> [[VECINIT6_I]], i16 [[C7:%.*]], i64 7 // CHECK-NEXT: [[TMP0:%.*]] = bitcast <8 x i16> [[VECINIT7_I]] to <4 x i32> // CHECK-NEXT: ret <4 x i32> [[TMP0]] // @@ -328,14 +328,14 @@ // CHECK-LABEL: @test_u16x8_make( // CHECK-NEXT: entry: -// CHECK-NEXT: [[VECINIT_I:%.*]] = insertelement <8 x i16> undef, i16 [[C0:%.*]], i32 0 -// CHECK-NEXT: [[VECINIT1_I:%.*]] = insertelement <8 x i16> [[VECINIT_I]], i16 [[C1:%.*]], i32 1 -// CHECK-NEXT: [[VECINIT2_I:%.*]] = insertelement <8 x i16> [[VECINIT1_I]], i16 [[C2:%.*]], i32 2 -// CHECK-NEXT: [[VECINIT3_I:%.*]] = insertelement <8 x i16> [[VECINIT2_I]], i16 [[C3:%.*]], i32 3 -// CHECK-NEXT: [[VECINIT4_I:%.*]] = insertelement <8 x i16> [[VECINIT3_I]], i16 [[C4:%.*]], i32 4 -// CHECK-NEXT: [[VECINIT5_I:%.*]] = insertelement <8 x i16> [[VECINIT4_I]], i16 [[C5:%.*]], i32 5 -// CHECK-NEXT: [[VECINIT6_I:%.*]] = insertelement <8 x i16> [[VECINIT5_I]], i16 [[C6:%.*]], i32 6 -// CHECK-NEXT: [[VECINIT7_I:%.*]] = insertelement <8 x i16> [[VECINIT6_I]], i16 [[C7:%.*]], i32 7 +// CHECK-NEXT: [[VECINIT_I:%.*]] = insertelement <8 x i16> undef, i16 [[C0:%.*]], i64 0 +// CHECK-NEXT: [[VECINIT1_I:%.*]] = insertelement <8 x i16> [[VECINIT_I]], i16 [[C1:%.*]], i64 1 +// CHECK-NEXT: [[VECINIT2_I:%.*]] = insertelement <8 x i16> [[VECINIT1_I]], i16 [[C2:%.*]], i64 2 +// CHECK-NEXT: [[VECINIT3_I:%.*]] = insertelement <8 x i16> [[VECINIT2_I]], i16 [[C3:%.*]], i64 3 +// CHECK-NEXT: [[VECINIT4_I:%.*]] = insertelement <8 x i16> [[VECINIT3_I]], i16 [[C4:%.*]], i64 4 +// CHECK-NEXT: [[VECINIT5_I:%.*]] = insertelement <8 x i16> [[VECINIT4_I]], i16 [[C5:%.*]], i64 5 +// CHECK-NEXT: [[VECINIT6_I:%.*]] = insertelement <8 x i16> [[VECINIT5_I]], i16 [[C6:%.*]], i64 6 +// CHECK-NEXT: [[VECINIT7_I:%.*]] = insertelement <8 x i16> [[VECINIT6_I]], i16 [[C7:%.*]], i64 7 // CHECK-NEXT: [[TMP0:%.*]] = bitcast <8 x i16> [[VECINIT7_I]] to <4 x i32> // CHECK-NEXT: ret <4 x i32> [[TMP0]] // @@ -345,10 +345,10 @@ // CHECK-LABEL: @test_i32x4_make( // CHECK-NEXT: entry: -// CHECK-NEXT: [[VECINIT_I:%.*]] = insertelement <4 x i32> undef, i32 [[C0:%.*]], i32 0 -// CHECK-NEXT: [[VECINIT1_I:%.*]] = insertelement <4 x i32> [[VECINIT_I]], i32 [[C1:%.*]], i32 1 -// CHECK-NEXT: [[VECINIT2_I:%.*]] = insertelement <4 x i32> [[VECINIT1_I]], i32 [[C2:%.*]], i32 2 -// CHECK-NEXT: [[VECINIT3_I:%.*]] = insertelement <4 x i32> [[VECINIT2_I]], i32 [[C3:%.*]], i32 3 +// CHECK-NEXT: [[VECINIT_I:%.*]] = insertelement <4 x i32> undef, i32 [[C0:%.*]], i64 0 +// CHECK-NEXT: [[VECINIT1_I:%.*]] = insertelement <4 x i32> [[VECINIT_I]], i32 [[C1:%.*]], i64 1 +// CHECK-NEXT: [[VECINIT2_I:%.*]] = insertelement <4 x i32> [[VECINIT1_I]], i32 [[C2:%.*]], i64 2 +// CHECK-NEXT: [[VECINIT3_I:%.*]] = insertelement <4 x i32> [[VECINIT2_I]], i32 [[C3:%.*]], i64 3 // CHECK-NEXT: ret <4 x i32> [[VECINIT3_I]] // v128_t test_i32x4_make(int32_t c0, int32_t c1, int32_t c2, int32_t c3) { @@ -357,10 +357,10 @@ // CHECK-LABEL: @test_u32x4_make( // CHECK-NEXT: entry: -// CHECK-NEXT: [[VECINIT_I:%.*]] = insertelement <4 x i32> undef, i32 [[C0:%.*]], i32 0 -// CHECK-NEXT: [[VECINIT1_I:%.*]] = insertelement <4 x i32> [[VECINIT_I]], i32 [[C1:%.*]], i32 1 -// CHECK-NEXT: [[VECINIT2_I:%.*]] = insertelement <4 x i32> [[VECINIT1_I]], i32 [[C2:%.*]], i32 2 -// CHECK-NEXT: [[VECINIT3_I:%.*]] = insertelement <4 x i32> [[VECINIT2_I]], i32 [[C3:%.*]], i32 3 +// CHECK-NEXT: [[VECINIT_I:%.*]] = insertelement <4 x i32> undef, i32 [[C0:%.*]], i64 0 +// CHECK-NEXT: [[VECINIT1_I:%.*]] = insertelement <4 x i32> [[VECINIT_I]], i32 [[C1:%.*]], i64 1 +// CHECK-NEXT: [[VECINIT2_I:%.*]] = insertelement <4 x i32> [[VECINIT1_I]], i32 [[C2:%.*]], i64 2 +// CHECK-NEXT: [[VECINIT3_I:%.*]] = insertelement <4 x i32> [[VECINIT2_I]], i32 [[C3:%.*]], i64 3 // CHECK-NEXT: ret <4 x i32> [[VECINIT3_I]] // v128_t test_u32x4_make(uint32_t c0, uint32_t c1, uint32_t c2, uint32_t c3) { @@ -369,8 +369,8 @@ // CHECK-LABEL: @test_i64x2_make( // CHECK-NEXT: entry: -// CHECK-NEXT: [[VECINIT_I:%.*]] = insertelement <2 x i64> undef, i64 [[C0:%.*]], i32 0 -// CHECK-NEXT: [[VECINIT1_I:%.*]] = insertelement <2 x i64> [[VECINIT_I]], i64 [[C1:%.*]], i32 1 +// CHECK-NEXT: [[VECINIT_I:%.*]] = insertelement <2 x i64> undef, i64 [[C0:%.*]], i64 0 +// CHECK-NEXT: [[VECINIT1_I:%.*]] = insertelement <2 x i64> [[VECINIT_I]], i64 [[C1:%.*]], i64 1 // CHECK-NEXT: [[TMP0:%.*]] = bitcast <2 x i64> [[VECINIT1_I]] to <4 x i32> // CHECK-NEXT: ret <4 x i32> [[TMP0]] // @@ -380,8 +380,8 @@ // CHECK-LABEL: @test_u64x2_make( // CHECK-NEXT: entry: -// CHECK-NEXT: [[VECINIT_I:%.*]] = insertelement <2 x i64> undef, i64 [[C0:%.*]], i32 0 -// CHECK-NEXT: [[VECINIT1_I:%.*]] = insertelement <2 x i64> [[VECINIT_I]], i64 [[C1:%.*]], i32 1 +// CHECK-NEXT: [[VECINIT_I:%.*]] = insertelement <2 x i64> undef, i64 [[C0:%.*]], i64 0 +// CHECK-NEXT: [[VECINIT1_I:%.*]] = insertelement <2 x i64> [[VECINIT_I]], i64 [[C1:%.*]], i64 1 // CHECK-NEXT: [[TMP0:%.*]] = bitcast <2 x i64> [[VECINIT1_I]] to <4 x i32> // CHECK-NEXT: ret <4 x i32> [[TMP0]] // @@ -391,10 +391,10 @@ // CHECK-LABEL: @test_f32x4_make( // CHECK-NEXT: entry: -// CHECK-NEXT: [[VECINIT_I:%.*]] = insertelement <4 x float> undef, float [[C0:%.*]], i32 0 -// CHECK-NEXT: [[VECINIT1_I:%.*]] = insertelement <4 x float> [[VECINIT_I]], float [[C1:%.*]], i32 1 -// CHECK-NEXT: [[VECINIT2_I:%.*]] = insertelement <4 x float> [[VECINIT1_I]], float [[C2:%.*]], i32 2 -// CHECK-NEXT: [[VECINIT3_I:%.*]] = insertelement <4 x float> [[VECINIT2_I]], float [[C3:%.*]], i32 3 +// CHECK-NEXT: [[VECINIT_I:%.*]] = insertelement <4 x float> undef, float [[C0:%.*]], i64 0 +// CHECK-NEXT: [[VECINIT1_I:%.*]] = insertelement <4 x float> [[VECINIT_I]], float [[C1:%.*]], i64 1 +// CHECK-NEXT: [[VECINIT2_I:%.*]] = insertelement <4 x float> [[VECINIT1_I]], float [[C2:%.*]], i64 2 +// CHECK-NEXT: [[VECINIT3_I:%.*]] = insertelement <4 x float> [[VECINIT2_I]], float [[C3:%.*]], i64 3 // CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x float> [[VECINIT3_I]] to <4 x i32> // CHECK-NEXT: ret <4 x i32> [[TMP0]] // @@ -404,8 +404,8 @@ // CHECK-LABEL: @test_f64x2_make( // CHECK-NEXT: entry: -// CHECK-NEXT: [[VECINIT_I:%.*]] = insertelement <2 x double> undef, double [[C0:%.*]], i32 0 -// CHECK-NEXT: [[VECINIT1_I:%.*]] = insertelement <2 x double> [[VECINIT_I]], double [[C1:%.*]], i32 1 +// CHECK-NEXT: [[VECINIT_I:%.*]] = insertelement <2 x double> undef, double [[C0:%.*]], i64 0 +// CHECK-NEXT: [[VECINIT1_I:%.*]] = insertelement <2 x double> [[VECINIT_I]], double [[C1:%.*]], i64 1 // CHECK-NEXT: [[TMP0:%.*]] = bitcast <2 x double> [[VECINIT1_I]] to <4 x i32> // CHECK-NEXT: ret <4 x i32> [[TMP0]] // @@ -575,7 +575,7 @@ // CHECK-LABEL: @test_i8x16_splat( // CHECK-NEXT: entry: -// CHECK-NEXT: [[VECINIT_I:%.*]] = insertelement <16 x i8> undef, i8 [[A:%.*]], i32 0 +// CHECK-NEXT: [[VECINIT_I:%.*]] = insertelement <16 x i8> undef, i8 [[A:%.*]], i64 0 // CHECK-NEXT: [[VECINIT15_I:%.*]] = shufflevector <16 x i8> [[VECINIT_I]], <16 x i8> poison, <16 x i32> zeroinitializer // CHECK-NEXT: [[TMP0:%.*]] = bitcast <16 x i8> [[VECINIT15_I]] to <4 x i32> // CHECK-NEXT: ret <4 x i32> [[TMP0]] @@ -586,7 +586,7 @@ // CHECK-LABEL: @test_u8x16_splat( // CHECK-NEXT: entry: -// CHECK-NEXT: [[VECINIT_I:%.*]] = insertelement <16 x i8> undef, i8 [[A:%.*]], i32 0 +// CHECK-NEXT: [[VECINIT_I:%.*]] = insertelement <16 x i8> undef, i8 [[A:%.*]], i64 0 // CHECK-NEXT: [[VECINIT15_I:%.*]] = shufflevector <16 x i8> [[VECINIT_I]], <16 x i8> poison, <16 x i32> zeroinitializer // CHECK-NEXT: [[TMP0:%.*]] = bitcast <16 x i8> [[VECINIT15_I]] to <4 x i32> // CHECK-NEXT: ret <4 x i32> [[TMP0]] @@ -598,7 +598,7 @@ // CHECK-LABEL: @test_i8x16_extract_lane( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x i32> [[A:%.*]] to <16 x i8> -// CHECK-NEXT: [[VECEXT_I:%.*]] = extractelement <16 x i8> [[TMP0]], i32 15 +// CHECK-NEXT: [[VECEXT_I:%.*]] = extractelement <16 x i8> [[TMP0]], i64 15 // CHECK-NEXT: ret i8 [[VECEXT_I]] // int8_t test_i8x16_extract_lane(v128_t a) { @@ -608,7 +608,7 @@ // CHECK-LABEL: @test_u8x16_extract_lane( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x i32> [[A:%.*]] to <16 x i8> -// CHECK-NEXT: [[VECEXT_I:%.*]] = extractelement <16 x i8> [[TMP0]], i32 15 +// CHECK-NEXT: [[VECEXT_I:%.*]] = extractelement <16 x i8> [[TMP0]], i64 15 // CHECK-NEXT: ret i8 [[VECEXT_I]] // uint8_t test_u8x16_extract_lane(v128_t a) { @@ -618,7 +618,7 @@ // CHECK-LABEL: @test_i8x16_replace_lane( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x i32> [[A:%.*]] to <16 x i8> -// CHECK-NEXT: [[VECINS_I:%.*]] = insertelement <16 x i8> [[TMP0]], i8 [[B:%.*]], i32 15 +// CHECK-NEXT: [[VECINS_I:%.*]] = insertelement <16 x i8> [[TMP0]], i8 [[B:%.*]], i64 15 // CHECK-NEXT: [[TMP1:%.*]] = bitcast <16 x i8> [[VECINS_I]] to <4 x i32> // CHECK-NEXT: ret <4 x i32> [[TMP1]] // @@ -629,7 +629,7 @@ // CHECK-LABEL: @test_u8x16_replace_lane( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x i32> [[A:%.*]] to <16 x i8> -// CHECK-NEXT: [[VECINS_I:%.*]] = insertelement <16 x i8> [[TMP0]], i8 [[B:%.*]], i32 15 +// CHECK-NEXT: [[VECINS_I:%.*]] = insertelement <16 x i8> [[TMP0]], i8 [[B:%.*]], i64 15 // CHECK-NEXT: [[TMP1:%.*]] = bitcast <16 x i8> [[VECINS_I]] to <4 x i32> // CHECK-NEXT: ret <4 x i32> [[TMP1]] // @@ -639,7 +639,7 @@ // CHECK-LABEL: @test_i16x8_splat( // CHECK-NEXT: entry: -// CHECK-NEXT: [[VECINIT_I:%.*]] = insertelement <8 x i16> undef, i16 [[A:%.*]], i32 0 +// CHECK-NEXT: [[VECINIT_I:%.*]] = insertelement <8 x i16> undef, i16 [[A:%.*]], i64 0 // CHECK-NEXT: [[VECINIT7_I:%.*]] = shufflevector <8 x i16> [[VECINIT_I]], <8 x i16> poison, <8 x i32> zeroinitializer // CHECK-NEXT: [[TMP0:%.*]] = bitcast <8 x i16> [[VECINIT7_I]] to <4 x i32> // CHECK-NEXT: ret <4 x i32> [[TMP0]] @@ -650,7 +650,7 @@ // CHECK-LABEL: @test_u16x8_splat( // CHECK-NEXT: entry: -// CHECK-NEXT: [[VECINIT_I:%.*]] = insertelement <8 x i16> undef, i16 [[A:%.*]], i32 0 +// CHECK-NEXT: [[VECINIT_I:%.*]] = insertelement <8 x i16> undef, i16 [[A:%.*]], i64 0 // CHECK-NEXT: [[VECINIT7_I:%.*]] = shufflevector <8 x i16> [[VECINIT_I]], <8 x i16> poison, <8 x i32> zeroinitializer // CHECK-NEXT: [[TMP0:%.*]] = bitcast <8 x i16> [[VECINIT7_I]] to <4 x i32> // CHECK-NEXT: ret <4 x i32> [[TMP0]] @@ -662,7 +662,7 @@ // CHECK-LABEL: @test_i16x8_extract_lane( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x i32> [[A:%.*]] to <8 x i16> -// CHECK-NEXT: [[VECEXT_I:%.*]] = extractelement <8 x i16> [[TMP0]], i32 7 +// CHECK-NEXT: [[VECEXT_I:%.*]] = extractelement <8 x i16> [[TMP0]], i64 7 // CHECK-NEXT: ret i16 [[VECEXT_I]] // int16_t test_i16x8_extract_lane(v128_t a) { @@ -672,7 +672,7 @@ // CHECK-LABEL: @test_u16x8_extract_lane( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x i32> [[A:%.*]] to <8 x i16> -// CHECK-NEXT: [[VECEXT_I:%.*]] = extractelement <8 x i16> [[TMP0]], i32 7 +// CHECK-NEXT: [[VECEXT_I:%.*]] = extractelement <8 x i16> [[TMP0]], i64 7 // CHECK-NEXT: ret i16 [[VECEXT_I]] // uint16_t test_u16x8_extract_lane(v128_t a) { @@ -682,7 +682,7 @@ // CHECK-LABEL: @test_i16x8_replace_lane( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x i32> [[A:%.*]] to <8 x i16> -// CHECK-NEXT: [[VECINS_I:%.*]] = insertelement <8 x i16> [[TMP0]], i16 [[B:%.*]], i32 7 +// CHECK-NEXT: [[VECINS_I:%.*]] = insertelement <8 x i16> [[TMP0]], i16 [[B:%.*]], i64 7 // CHECK-NEXT: [[TMP1:%.*]] = bitcast <8 x i16> [[VECINS_I]] to <4 x i32> // CHECK-NEXT: ret <4 x i32> [[TMP1]] // @@ -693,7 +693,7 @@ // CHECK-LABEL: @test_u16x8_replace_lane( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x i32> [[A:%.*]] to <8 x i16> -// CHECK-NEXT: [[VECINS_I:%.*]] = insertelement <8 x i16> [[TMP0]], i16 [[B:%.*]], i32 7 +// CHECK-NEXT: [[VECINS_I:%.*]] = insertelement <8 x i16> [[TMP0]], i16 [[B:%.*]], i64 7 // CHECK-NEXT: [[TMP1:%.*]] = bitcast <8 x i16> [[VECINS_I]] to <4 x i32> // CHECK-NEXT: ret <4 x i32> [[TMP1]] // @@ -703,7 +703,7 @@ // CHECK-LABEL: @test_i32x4_splat( // CHECK-NEXT: entry: -// CHECK-NEXT: [[VECINIT_I:%.*]] = insertelement <4 x i32> undef, i32 [[A:%.*]], i32 0 +// CHECK-NEXT: [[VECINIT_I:%.*]] = insertelement <4 x i32> undef, i32 [[A:%.*]], i64 0 // CHECK-NEXT: [[VECINIT3_I:%.*]] = shufflevector <4 x i32> [[VECINIT_I]], <4 x i32> poison, <4 x i32> zeroinitializer // CHECK-NEXT: ret <4 x i32> [[VECINIT3_I]] // @@ -713,7 +713,7 @@ // CHECK-LABEL: @test_u32x4_splat( // CHECK-NEXT: entry: -// CHECK-NEXT: [[VECINIT_I:%.*]] = insertelement <4 x i32> undef, i32 [[A:%.*]], i32 0 +// CHECK-NEXT: [[VECINIT_I:%.*]] = insertelement <4 x i32> undef, i32 [[A:%.*]], i64 0 // CHECK-NEXT: [[VECINIT3_I:%.*]] = shufflevector <4 x i32> [[VECINIT_I]], <4 x i32> poison, <4 x i32> zeroinitializer // CHECK-NEXT: ret <4 x i32> [[VECINIT3_I]] // @@ -723,7 +723,7 @@ // CHECK-LABEL: @test_i32x4_extract_lane( // CHECK-NEXT: entry: -// CHECK-NEXT: [[VECEXT_I:%.*]] = extractelement <4 x i32> [[A:%.*]], i32 3 +// CHECK-NEXT: [[VECEXT_I:%.*]] = extractelement <4 x i32> [[A:%.*]], i64 3 // CHECK-NEXT: ret i32 [[VECEXT_I]] // int32_t test_i32x4_extract_lane(v128_t a) { @@ -732,7 +732,7 @@ // CHECK-LABEL: @test_u32x4_extract_lane( // CHECK-NEXT: entry: -// CHECK-NEXT: [[VECEXT_I:%.*]] = extractelement <4 x i32> [[A:%.*]], i32 3 +// CHECK-NEXT: [[VECEXT_I:%.*]] = extractelement <4 x i32> [[A:%.*]], i64 3 // CHECK-NEXT: ret i32 [[VECEXT_I]] // uint32_t test_u32x4_extract_lane(v128_t a) { @@ -741,7 +741,7 @@ // CHECK-LABEL: @test_i32x4_replace_lane( // CHECK-NEXT: entry: -// CHECK-NEXT: [[VECINS_I:%.*]] = insertelement <4 x i32> [[A:%.*]], i32 [[B:%.*]], i32 3 +// CHECK-NEXT: [[VECINS_I:%.*]] = insertelement <4 x i32> [[A:%.*]], i32 [[B:%.*]], i64 3 // CHECK-NEXT: ret <4 x i32> [[VECINS_I]] // v128_t test_i32x4_replace_lane(v128_t a, int32_t b) { @@ -750,7 +750,7 @@ // CHECK-LABEL: @test_u32x4_replace_lane( // CHECK-NEXT: entry: -// CHECK-NEXT: [[VECINS_I:%.*]] = insertelement <4 x i32> [[A:%.*]], i32 [[B:%.*]], i32 3 +// CHECK-NEXT: [[VECINS_I:%.*]] = insertelement <4 x i32> [[A:%.*]], i32 [[B:%.*]], i64 3 // CHECK-NEXT: ret <4 x i32> [[VECINS_I]] // v128_t test_u32x4_replace_lane(v128_t a, uint32_t b) { @@ -759,7 +759,7 @@ // CHECK-LABEL: @test_i64x2_splat( // CHECK-NEXT: entry: -// CHECK-NEXT: [[VECINIT_I:%.*]] = insertelement <2 x i64> undef, i64 [[A:%.*]], i32 0 +// CHECK-NEXT: [[VECINIT_I:%.*]] = insertelement <2 x i64> undef, i64 [[A:%.*]], i64 0 // CHECK-NEXT: [[VECINIT1_I:%.*]] = shufflevector <2 x i64> [[VECINIT_I]], <2 x i64> poison, <2 x i32> zeroinitializer // CHECK-NEXT: [[TMP0:%.*]] = bitcast <2 x i64> [[VECINIT1_I]] to <4 x i32> // CHECK-NEXT: ret <4 x i32> [[TMP0]] @@ -770,7 +770,7 @@ // CHECK-LABEL: @test_u64x2_splat( // CHECK-NEXT: entry: -// CHECK-NEXT: [[VECINIT_I:%.*]] = insertelement <2 x i64> undef, i64 [[A:%.*]], i32 0 +// CHECK-NEXT: [[VECINIT_I:%.*]] = insertelement <2 x i64> undef, i64 [[A:%.*]], i64 0 // CHECK-NEXT: [[VECINIT1_I:%.*]] = shufflevector <2 x i64> [[VECINIT_I]], <2 x i64> poison, <2 x i32> zeroinitializer // CHECK-NEXT: [[TMP0:%.*]] = bitcast <2 x i64> [[VECINIT1_I]] to <4 x i32> // CHECK-NEXT: ret <4 x i32> [[TMP0]] @@ -782,7 +782,7 @@ // CHECK-LABEL: @test_i64x2_extract_lane( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x i32> [[A:%.*]] to <2 x i64> -// CHECK-NEXT: [[VECEXT_I:%.*]] = extractelement <2 x i64> [[TMP0]], i32 1 +// CHECK-NEXT: [[VECEXT_I:%.*]] = extractelement <2 x i64> [[TMP0]], i64 1 // CHECK-NEXT: ret i64 [[VECEXT_I]] // int64_t test_i64x2_extract_lane(v128_t a) { @@ -792,7 +792,7 @@ // CHECK-LABEL: @test_u64x2_extract_lane( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x i32> [[A:%.*]] to <2 x i64> -// CHECK-NEXT: [[VECEXT_I:%.*]] = extractelement <2 x i64> [[TMP0]], i32 1 +// CHECK-NEXT: [[VECEXT_I:%.*]] = extractelement <2 x i64> [[TMP0]], i64 1 // CHECK-NEXT: ret i64 [[VECEXT_I]] // uint64_t test_u64x2_extract_lane(v128_t a) { @@ -802,7 +802,7 @@ // CHECK-LABEL: @test_i64x2_replace_lane( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x i32> [[A:%.*]] to <2 x i64> -// CHECK-NEXT: [[VECINS_I:%.*]] = insertelement <2 x i64> [[TMP0]], i64 [[B:%.*]], i32 1 +// CHECK-NEXT: [[VECINS_I:%.*]] = insertelement <2 x i64> [[TMP0]], i64 [[B:%.*]], i64 1 // CHECK-NEXT: [[TMP1:%.*]] = bitcast <2 x i64> [[VECINS_I]] to <4 x i32> // CHECK-NEXT: ret <4 x i32> [[TMP1]] // @@ -813,7 +813,7 @@ // CHECK-LABEL: @test_u64x2_replace_lane( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x i32> [[A:%.*]] to <2 x i64> -// CHECK-NEXT: [[VECINS_I:%.*]] = insertelement <2 x i64> [[TMP0]], i64 [[B:%.*]], i32 1 +// CHECK-NEXT: [[VECINS_I:%.*]] = insertelement <2 x i64> [[TMP0]], i64 [[B:%.*]], i64 1 // CHECK-NEXT: [[TMP1:%.*]] = bitcast <2 x i64> [[VECINS_I]] to <4 x i32> // CHECK-NEXT: ret <4 x i32> [[TMP1]] // @@ -823,7 +823,7 @@ // CHECK-LABEL: @test_f32x4_splat( // CHECK-NEXT: entry: -// CHECK-NEXT: [[VECINIT_I:%.*]] = insertelement <4 x float> undef, float [[A:%.*]], i32 0 +// CHECK-NEXT: [[VECINIT_I:%.*]] = insertelement <4 x float> undef, float [[A:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x float> [[VECINIT_I]] to <4 x i32> // CHECK-NEXT: [[TMP1:%.*]] = shufflevector <4 x i32> [[TMP0]], <4 x i32> poison, <4 x i32> zeroinitializer // CHECK-NEXT: ret <4 x i32> [[TMP1]] @@ -835,7 +835,7 @@ // CHECK-LABEL: @test_f32x4_extract_lane( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x i32> [[A:%.*]] to <4 x float> -// CHECK-NEXT: [[VECEXT_I:%.*]] = extractelement <4 x float> [[TMP0]], i32 3 +// CHECK-NEXT: [[VECEXT_I:%.*]] = extractelement <4 x float> [[TMP0]], i64 3 // CHECK-NEXT: ret float [[VECEXT_I]] // float test_f32x4_extract_lane(v128_t a) { @@ -845,7 +845,7 @@ // CHECK-LABEL: @test_f32x4_replace_lane( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x i32> [[A:%.*]] to <4 x float> -// CHECK-NEXT: [[VECINS_I:%.*]] = insertelement <4 x float> [[TMP0]], float [[B:%.*]], i32 3 +// CHECK-NEXT: [[VECINS_I:%.*]] = insertelement <4 x float> [[TMP0]], float [[B:%.*]], i64 3 // CHECK-NEXT: [[TMP1:%.*]] = bitcast <4 x float> [[VECINS_I]] to <4 x i32> // CHECK-NEXT: ret <4 x i32> [[TMP1]] // @@ -855,7 +855,7 @@ // CHECK-LABEL: @test_f64x2_splat( // CHECK-NEXT: entry: -// CHECK-NEXT: [[VECINIT_I:%.*]] = insertelement <2 x double> undef, double [[A:%.*]], i32 0 +// CHECK-NEXT: [[VECINIT_I:%.*]] = insertelement <2 x double> undef, double [[A:%.*]], i64 0 // CHECK-NEXT: [[VECINIT1_I:%.*]] = shufflevector <2 x double> [[VECINIT_I]], <2 x double> poison, <2 x i32> zeroinitializer // CHECK-NEXT: [[TMP0:%.*]] = bitcast <2 x double> [[VECINIT1_I]] to <4 x i32> // CHECK-NEXT: ret <4 x i32> [[TMP0]] @@ -867,7 +867,7 @@ // CHECK-LABEL: @test_f64x2_extract_lane( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x i32> [[A:%.*]] to <2 x double> -// CHECK-NEXT: [[VECEXT_I:%.*]] = extractelement <2 x double> [[TMP0]], i32 1 +// CHECK-NEXT: [[VECEXT_I:%.*]] = extractelement <2 x double> [[TMP0]], i64 1 // CHECK-NEXT: ret double [[VECEXT_I]] // double test_f64x2_extract_lane(v128_t a) { @@ -877,7 +877,7 @@ // CHECK-LABEL: @test_f64x2_replace_lane( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x i32> [[A:%.*]] to <2 x double> -// CHECK-NEXT: [[VECINS_I:%.*]] = insertelement <2 x double> [[TMP0]], double [[B:%.*]], i32 1 +// CHECK-NEXT: [[VECINS_I:%.*]] = insertelement <2 x double> [[TMP0]], double [[B:%.*]], i64 1 // CHECK-NEXT: [[TMP1:%.*]] = bitcast <2 x double> [[VECINS_I]] to <4 x i32> // CHECK-NEXT: ret <4 x i32> [[TMP1]] // @@ -1522,7 +1522,7 @@ // CHECK-LABEL: @test_v128_any_true( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x i32> [[A:%.*]] to <16 x i8> -// CHECK-NEXT: [[TMP1:%.*]] = tail call i32 @llvm.wasm.anytrue.v16i8(<16 x i8> [[TMP0]]) #[[ATTR6:[0-9]+]] +// CHECK-NEXT: [[TMP1:%.*]] = tail call i32 @llvm.wasm.anytrue.v16i8(<16 x i8> [[TMP0]]) #[[ATTR7:[0-9]+]] // CHECK-NEXT: [[TOBOOL_I:%.*]] = icmp ne i32 [[TMP1]], 0 // CHECK-NEXT: ret i1 [[TOBOOL_I]] // @@ -1532,7 +1532,7 @@ // CHECK-LABEL: @test_v128_bitselect( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call <4 x i32> @llvm.wasm.bitselect.v4i32(<4 x i32> [[A:%.*]], <4 x i32> [[B:%.*]], <4 x i32> [[MASK:%.*]]) #[[ATTR6]] +// CHECK-NEXT: [[TMP0:%.*]] = tail call <4 x i32> @llvm.wasm.bitselect.v4i32(<4 x i32> [[A:%.*]], <4 x i32> [[B:%.*]], <4 x i32> [[MASK:%.*]]) #[[ATTR7]] // CHECK-NEXT: ret <4 x i32> [[TMP0]] // v128_t test_v128_bitselect(v128_t a, v128_t b, v128_t mask) { @@ -1542,7 +1542,7 @@ // CHECK-LABEL: @test_i8x16_abs( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x i32> [[A:%.*]] to <16 x i8> -// CHECK-NEXT: [[TMP1:%.*]] = tail call <16 x i8> @llvm.abs.v16i8(<16 x i8> [[TMP0]], i1 false) #[[ATTR6]] +// CHECK-NEXT: [[TMP1:%.*]] = tail call <16 x i8> @llvm.abs.v16i8(<16 x i8> [[TMP0]], i1 false) #[[ATTR7]] // CHECK-NEXT: [[TMP2:%.*]] = bitcast <16 x i8> [[TMP1]] to <4 x i32> // CHECK-NEXT: ret <4 x i32> [[TMP2]] // @@ -1564,7 +1564,7 @@ // CHECK-LABEL: @test_i8x16_all_true( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x i32> [[A:%.*]] to <16 x i8> -// CHECK-NEXT: [[TMP1:%.*]] = tail call i32 @llvm.wasm.alltrue.v16i8(<16 x i8> [[TMP0]]) #[[ATTR6]] +// CHECK-NEXT: [[TMP1:%.*]] = tail call i32 @llvm.wasm.alltrue.v16i8(<16 x i8> [[TMP0]]) #[[ATTR7]] // CHECK-NEXT: [[TOBOOL_I:%.*]] = icmp ne i32 [[TMP1]], 0 // CHECK-NEXT: ret i1 [[TOBOOL_I]] // @@ -1575,7 +1575,7 @@ // CHECK-LABEL: @test_i8x16_bitmask( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x i32> [[A:%.*]] to <16 x i8> -// CHECK-NEXT: [[TMP1:%.*]] = tail call i32 @llvm.wasm.bitmask.v16i8(<16 x i8> [[TMP0]]) #[[ATTR6]] +// CHECK-NEXT: [[TMP1:%.*]] = tail call i32 @llvm.wasm.bitmask.v16i8(<16 x i8> [[TMP0]]) #[[ATTR7]] // CHECK-NEXT: ret i32 [[TMP1]] // uint32_t test_i8x16_bitmask(v128_t a) { @@ -1585,7 +1585,7 @@ // CHECK-LABEL: @test_i8x16_popcnt( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x i32> [[A:%.*]] to <16 x i8> -// CHECK-NEXT: [[TMP1:%.*]] = tail call <16 x i8> @llvm.ctpop.v16i8(<16 x i8> [[TMP0]]) #[[ATTR6]] +// CHECK-NEXT: [[TMP1:%.*]] = tail call <16 x i8> @llvm.ctpop.v16i8(<16 x i8> [[TMP0]]) #[[ATTR7]] // CHECK-NEXT: [[TMP2:%.*]] = bitcast <16 x i8> [[TMP1]] to <4 x i32> // CHECK-NEXT: ret <4 x i32> [[TMP2]] // @@ -1597,7 +1597,7 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x i32> [[A:%.*]] to <16 x i8> // CHECK-NEXT: [[TMP1:%.*]] = trunc i32 [[B:%.*]] to i8 -// CHECK-NEXT: [[TMP2:%.*]] = insertelement <16 x i8> undef, i8 [[TMP1]], i32 0 +// CHECK-NEXT: [[TMP2:%.*]] = insertelement <16 x i8> undef, i8 [[TMP1]], i64 0 // CHECK-NEXT: [[SH_PROM_I:%.*]] = shufflevector <16 x i8> [[TMP2]], <16 x i8> poison, <16 x i32> zeroinitializer // CHECK-NEXT: [[SHL_I:%.*]] = shl <16 x i8> [[TMP0]], [[SH_PROM_I]] // CHECK-NEXT: [[TMP3:%.*]] = bitcast <16 x i8> [[SHL_I]] to <4 x i32> @@ -1611,7 +1611,7 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x i32> [[A:%.*]] to <16 x i8> // CHECK-NEXT: [[TMP1:%.*]] = trunc i32 [[B:%.*]] to i8 -// CHECK-NEXT: [[TMP2:%.*]] = insertelement <16 x i8> undef, i8 [[TMP1]], i32 0 +// CHECK-NEXT: [[TMP2:%.*]] = insertelement <16 x i8> undef, i8 [[TMP1]], i64 0 // CHECK-NEXT: [[SH_PROM_I:%.*]] = shufflevector <16 x i8> [[TMP2]], <16 x i8> poison, <16 x i32> zeroinitializer // CHECK-NEXT: [[SHR_I:%.*]] = ashr <16 x i8> [[TMP0]], [[SH_PROM_I]] // CHECK-NEXT: [[TMP3:%.*]] = bitcast <16 x i8> [[SHR_I]] to <4 x i32> @@ -1625,7 +1625,7 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x i32> [[A:%.*]] to <16 x i8> // CHECK-NEXT: [[TMP1:%.*]] = trunc i32 [[B:%.*]] to i8 -// CHECK-NEXT: [[TMP2:%.*]] = insertelement <16 x i8> undef, i8 [[TMP1]], i32 0 +// CHECK-NEXT: [[TMP2:%.*]] = insertelement <16 x i8> undef, i8 [[TMP1]], i64 0 // CHECK-NEXT: [[SH_PROM_I:%.*]] = shufflevector <16 x i8> [[TMP2]], <16 x i8> poison, <16 x i32> zeroinitializer // CHECK-NEXT: [[SHR_I:%.*]] = lshr <16 x i8> [[TMP0]], [[SH_PROM_I]] // CHECK-NEXT: [[TMP3:%.*]] = bitcast <16 x i8> [[SHR_I]] to <4 x i32> @@ -1651,7 +1651,7 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x i32> [[A:%.*]] to <16 x i8> // CHECK-NEXT: [[TMP1:%.*]] = bitcast <4 x i32> [[B:%.*]] to <16 x i8> -// CHECK-NEXT: [[TMP2:%.*]] = tail call <16 x i8> @llvm.sadd.sat.v16i8(<16 x i8> [[TMP0]], <16 x i8> [[TMP1]]) #[[ATTR6]] +// CHECK-NEXT: [[TMP2:%.*]] = tail call <16 x i8> @llvm.sadd.sat.v16i8(<16 x i8> [[TMP0]], <16 x i8> [[TMP1]]) #[[ATTR7]] // CHECK-NEXT: [[TMP3:%.*]] = bitcast <16 x i8> [[TMP2]] to <4 x i32> // CHECK-NEXT: ret <4 x i32> [[TMP3]] // @@ -1663,7 +1663,7 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x i32> [[A:%.*]] to <16 x i8> // CHECK-NEXT: [[TMP1:%.*]] = bitcast <4 x i32> [[B:%.*]] to <16 x i8> -// CHECK-NEXT: [[TMP2:%.*]] = tail call <16 x i8> @llvm.uadd.sat.v16i8(<16 x i8> [[TMP0]], <16 x i8> [[TMP1]]) #[[ATTR6]] +// CHECK-NEXT: [[TMP2:%.*]] = tail call <16 x i8> @llvm.uadd.sat.v16i8(<16 x i8> [[TMP0]], <16 x i8> [[TMP1]]) #[[ATTR7]] // CHECK-NEXT: [[TMP3:%.*]] = bitcast <16 x i8> [[TMP2]] to <4 x i32> // CHECK-NEXT: ret <4 x i32> [[TMP3]] // @@ -1687,7 +1687,7 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x i32> [[A:%.*]] to <16 x i8> // CHECK-NEXT: [[TMP1:%.*]] = bitcast <4 x i32> [[B:%.*]] to <16 x i8> -// CHECK-NEXT: [[TMP2:%.*]] = tail call <16 x i8> @llvm.wasm.sub.sat.signed.v16i8(<16 x i8> [[TMP0]], <16 x i8> [[TMP1]]) #[[ATTR6]] +// CHECK-NEXT: [[TMP2:%.*]] = tail call <16 x i8> @llvm.wasm.sub.sat.signed.v16i8(<16 x i8> [[TMP0]], <16 x i8> [[TMP1]]) #[[ATTR7]] // CHECK-NEXT: [[TMP3:%.*]] = bitcast <16 x i8> [[TMP2]] to <4 x i32> // CHECK-NEXT: ret <4 x i32> [[TMP3]] // @@ -1699,7 +1699,7 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x i32> [[A:%.*]] to <16 x i8> // CHECK-NEXT: [[TMP1:%.*]] = bitcast <4 x i32> [[B:%.*]] to <16 x i8> -// CHECK-NEXT: [[TMP2:%.*]] = tail call <16 x i8> @llvm.wasm.sub.sat.unsigned.v16i8(<16 x i8> [[TMP0]], <16 x i8> [[TMP1]]) #[[ATTR6]] +// CHECK-NEXT: [[TMP2:%.*]] = tail call <16 x i8> @llvm.wasm.sub.sat.unsigned.v16i8(<16 x i8> [[TMP0]], <16 x i8> [[TMP1]]) #[[ATTR7]] // CHECK-NEXT: [[TMP3:%.*]] = bitcast <16 x i8> [[TMP2]] to <4 x i32> // CHECK-NEXT: ret <4 x i32> [[TMP3]] // @@ -1763,7 +1763,7 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x i32> [[A:%.*]] to <16 x i8> // CHECK-NEXT: [[TMP1:%.*]] = bitcast <4 x i32> [[B:%.*]] to <16 x i8> -// CHECK-NEXT: [[TMP2:%.*]] = tail call <16 x i8> @llvm.wasm.avgr.unsigned.v16i8(<16 x i8> [[TMP0]], <16 x i8> [[TMP1]]) #[[ATTR6]] +// CHECK-NEXT: [[TMP2:%.*]] = tail call <16 x i8> @llvm.wasm.avgr.unsigned.v16i8(<16 x i8> [[TMP0]], <16 x i8> [[TMP1]]) #[[ATTR7]] // CHECK-NEXT: [[TMP3:%.*]] = bitcast <16 x i8> [[TMP2]] to <4 x i32> // CHECK-NEXT: ret <4 x i32> [[TMP3]] // @@ -1774,7 +1774,7 @@ // CHECK-LABEL: @test_i16x8_abs( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x i32> [[A:%.*]] to <8 x i16> -// CHECK-NEXT: [[TMP1:%.*]] = tail call <8 x i16> @llvm.abs.v8i16(<8 x i16> [[TMP0]], i1 false) #[[ATTR6]] +// CHECK-NEXT: [[TMP1:%.*]] = tail call <8 x i16> @llvm.abs.v8i16(<8 x i16> [[TMP0]], i1 false) #[[ATTR7]] // CHECK-NEXT: [[TMP2:%.*]] = bitcast <8 x i16> [[TMP1]] to <4 x i32> // CHECK-NEXT: ret <4 x i32> [[TMP2]] // @@ -1796,7 +1796,7 @@ // CHECK-LABEL: @test_i16x8_all_true( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x i32> [[A:%.*]] to <8 x i16> -// CHECK-NEXT: [[TMP1:%.*]] = tail call i32 @llvm.wasm.alltrue.v8i16(<8 x i16> [[TMP0]]) #[[ATTR6]] +// CHECK-NEXT: [[TMP1:%.*]] = tail call i32 @llvm.wasm.alltrue.v8i16(<8 x i16> [[TMP0]]) #[[ATTR7]] // CHECK-NEXT: [[TOBOOL_I:%.*]] = icmp ne i32 [[TMP1]], 0 // CHECK-NEXT: ret i1 [[TOBOOL_I]] // @@ -1807,7 +1807,7 @@ // CHECK-LABEL: @test_i16x8_bitmask( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x i32> [[A:%.*]] to <8 x i16> -// CHECK-NEXT: [[TMP1:%.*]] = tail call i32 @llvm.wasm.bitmask.v8i16(<8 x i16> [[TMP0]]) #[[ATTR6]] +// CHECK-NEXT: [[TMP1:%.*]] = tail call i32 @llvm.wasm.bitmask.v8i16(<8 x i16> [[TMP0]]) #[[ATTR7]] // CHECK-NEXT: ret i32 [[TMP1]] // uint32_t test_i16x8_bitmask(v128_t a) { @@ -1818,7 +1818,7 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x i32> [[A:%.*]] to <8 x i16> // CHECK-NEXT: [[TMP1:%.*]] = trunc i32 [[B:%.*]] to i16 -// CHECK-NEXT: [[TMP2:%.*]] = insertelement <8 x i16> undef, i16 [[TMP1]], i32 0 +// CHECK-NEXT: [[TMP2:%.*]] = insertelement <8 x i16> undef, i16 [[TMP1]], i64 0 // CHECK-NEXT: [[SH_PROM_I:%.*]] = shufflevector <8 x i16> [[TMP2]], <8 x i16> poison, <8 x i32> zeroinitializer // CHECK-NEXT: [[SHL_I:%.*]] = shl <8 x i16> [[TMP0]], [[SH_PROM_I]] // CHECK-NEXT: [[TMP3:%.*]] = bitcast <8 x i16> [[SHL_I]] to <4 x i32> @@ -1832,7 +1832,7 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x i32> [[A:%.*]] to <8 x i16> // CHECK-NEXT: [[TMP1:%.*]] = trunc i32 [[B:%.*]] to i16 -// CHECK-NEXT: [[TMP2:%.*]] = insertelement <8 x i16> undef, i16 [[TMP1]], i32 0 +// CHECK-NEXT: [[TMP2:%.*]] = insertelement <8 x i16> undef, i16 [[TMP1]], i64 0 // CHECK-NEXT: [[SH_PROM_I:%.*]] = shufflevector <8 x i16> [[TMP2]], <8 x i16> poison, <8 x i32> zeroinitializer // CHECK-NEXT: [[SHR_I:%.*]] = ashr <8 x i16> [[TMP0]], [[SH_PROM_I]] // CHECK-NEXT: [[TMP3:%.*]] = bitcast <8 x i16> [[SHR_I]] to <4 x i32> @@ -1846,7 +1846,7 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x i32> [[A:%.*]] to <8 x i16> // CHECK-NEXT: [[TMP1:%.*]] = trunc i32 [[B:%.*]] to i16 -// CHECK-NEXT: [[TMP2:%.*]] = insertelement <8 x i16> undef, i16 [[TMP1]], i32 0 +// CHECK-NEXT: [[TMP2:%.*]] = insertelement <8 x i16> undef, i16 [[TMP1]], i64 0 // CHECK-NEXT: [[SH_PROM_I:%.*]] = shufflevector <8 x i16> [[TMP2]], <8 x i16> poison, <8 x i32> zeroinitializer // CHECK-NEXT: [[SHR_I:%.*]] = lshr <8 x i16> [[TMP0]], [[SH_PROM_I]] // CHECK-NEXT: [[TMP3:%.*]] = bitcast <8 x i16> [[SHR_I]] to <4 x i32> @@ -1872,7 +1872,7 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x i32> [[A:%.*]] to <8 x i16> // CHECK-NEXT: [[TMP1:%.*]] = bitcast <4 x i32> [[B:%.*]] to <8 x i16> -// CHECK-NEXT: [[TMP2:%.*]] = tail call <8 x i16> @llvm.sadd.sat.v8i16(<8 x i16> [[TMP0]], <8 x i16> [[TMP1]]) #[[ATTR6]] +// CHECK-NEXT: [[TMP2:%.*]] = tail call <8 x i16> @llvm.sadd.sat.v8i16(<8 x i16> [[TMP0]], <8 x i16> [[TMP1]]) #[[ATTR7]] // CHECK-NEXT: [[TMP3:%.*]] = bitcast <8 x i16> [[TMP2]] to <4 x i32> // CHECK-NEXT: ret <4 x i32> [[TMP3]] // @@ -1884,7 +1884,7 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x i32> [[A:%.*]] to <8 x i16> // CHECK-NEXT: [[TMP1:%.*]] = bitcast <4 x i32> [[B:%.*]] to <8 x i16> -// CHECK-NEXT: [[TMP2:%.*]] = tail call <8 x i16> @llvm.uadd.sat.v8i16(<8 x i16> [[TMP0]], <8 x i16> [[TMP1]]) #[[ATTR6]] +// CHECK-NEXT: [[TMP2:%.*]] = tail call <8 x i16> @llvm.uadd.sat.v8i16(<8 x i16> [[TMP0]], <8 x i16> [[TMP1]]) #[[ATTR7]] // CHECK-NEXT: [[TMP3:%.*]] = bitcast <8 x i16> [[TMP2]] to <4 x i32> // CHECK-NEXT: ret <4 x i32> [[TMP3]] // @@ -1908,7 +1908,7 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x i32> [[A:%.*]] to <8 x i16> // CHECK-NEXT: [[TMP1:%.*]] = bitcast <4 x i32> [[B:%.*]] to <8 x i16> -// CHECK-NEXT: [[TMP2:%.*]] = tail call <8 x i16> @llvm.wasm.sub.sat.signed.v8i16(<8 x i16> [[TMP0]], <8 x i16> [[TMP1]]) #[[ATTR6]] +// CHECK-NEXT: [[TMP2:%.*]] = tail call <8 x i16> @llvm.wasm.sub.sat.signed.v8i16(<8 x i16> [[TMP0]], <8 x i16> [[TMP1]]) #[[ATTR7]] // CHECK-NEXT: [[TMP3:%.*]] = bitcast <8 x i16> [[TMP2]] to <4 x i32> // CHECK-NEXT: ret <4 x i32> [[TMP3]] // @@ -1920,7 +1920,7 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x i32> [[A:%.*]] to <8 x i16> // CHECK-NEXT: [[TMP1:%.*]] = bitcast <4 x i32> [[B:%.*]] to <8 x i16> -// CHECK-NEXT: [[TMP2:%.*]] = tail call <8 x i16> @llvm.wasm.sub.sat.unsigned.v8i16(<8 x i16> [[TMP0]], <8 x i16> [[TMP1]]) #[[ATTR6]] +// CHECK-NEXT: [[TMP2:%.*]] = tail call <8 x i16> @llvm.wasm.sub.sat.unsigned.v8i16(<8 x i16> [[TMP0]], <8 x i16> [[TMP1]]) #[[ATTR7]] // CHECK-NEXT: [[TMP3:%.*]] = bitcast <8 x i16> [[TMP2]] to <4 x i32> // CHECK-NEXT: ret <4 x i32> [[TMP3]] // @@ -1996,7 +1996,7 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x i32> [[A:%.*]] to <8 x i16> // CHECK-NEXT: [[TMP1:%.*]] = bitcast <4 x i32> [[B:%.*]] to <8 x i16> -// CHECK-NEXT: [[TMP2:%.*]] = tail call <8 x i16> @llvm.wasm.avgr.unsigned.v8i16(<8 x i16> [[TMP0]], <8 x i16> [[TMP1]]) #[[ATTR6]] +// CHECK-NEXT: [[TMP2:%.*]] = tail call <8 x i16> @llvm.wasm.avgr.unsigned.v8i16(<8 x i16> [[TMP0]], <8 x i16> [[TMP1]]) #[[ATTR7]] // CHECK-NEXT: [[TMP3:%.*]] = bitcast <8 x i16> [[TMP2]] to <4 x i32> // CHECK-NEXT: ret <4 x i32> [[TMP3]] // @@ -2006,7 +2006,7 @@ // CHECK-LABEL: @test_i32x4_abs( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call <4 x i32> @llvm.abs.v4i32(<4 x i32> [[A:%.*]], i1 false) #[[ATTR6]] +// CHECK-NEXT: [[TMP0:%.*]] = tail call <4 x i32> @llvm.abs.v4i32(<4 x i32> [[A:%.*]], i1 false) #[[ATTR7]] // CHECK-NEXT: ret <4 x i32> [[TMP0]] // v128_t test_i32x4_abs(v128_t a) { @@ -2024,7 +2024,7 @@ // CHECK-LABEL: @test_i32x4_all_true( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call i32 @llvm.wasm.alltrue.v4i32(<4 x i32> [[A:%.*]]) #[[ATTR6]] +// CHECK-NEXT: [[TMP0:%.*]] = tail call i32 @llvm.wasm.alltrue.v4i32(<4 x i32> [[A:%.*]]) #[[ATTR7]] // CHECK-NEXT: [[TOBOOL_I:%.*]] = icmp ne i32 [[TMP0]], 0 // CHECK-NEXT: ret i1 [[TOBOOL_I]] // @@ -2034,7 +2034,7 @@ // CHECK-LABEL: @test_i32x4_bitmask( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call i32 @llvm.wasm.bitmask.v4i32(<4 x i32> [[A:%.*]]) #[[ATTR6]] +// CHECK-NEXT: [[TMP0:%.*]] = tail call i32 @llvm.wasm.bitmask.v4i32(<4 x i32> [[A:%.*]]) #[[ATTR7]] // CHECK-NEXT: ret i32 [[TMP0]] // uint32_t test_i32x4_bitmask(v128_t a) { @@ -2043,7 +2043,7 @@ // CHECK-LABEL: @test_i32x4_shl( // CHECK-NEXT: entry: -// CHECK-NEXT: [[SPLAT_SPLATINSERT_I:%.*]] = insertelement <4 x i32> poison, i32 [[B:%.*]], i32 0 +// CHECK-NEXT: [[SPLAT_SPLATINSERT_I:%.*]] = insertelement <4 x i32> poison, i32 [[B:%.*]], i64 0 // CHECK-NEXT: [[SPLAT_SPLAT_I:%.*]] = shufflevector <4 x i32> [[SPLAT_SPLATINSERT_I]], <4 x i32> poison, <4 x i32> zeroinitializer // CHECK-NEXT: [[SHL_I:%.*]] = shl <4 x i32> [[A:%.*]], [[SPLAT_SPLAT_I]] // CHECK-NEXT: ret <4 x i32> [[SHL_I]] @@ -2054,7 +2054,7 @@ // CHECK-LABEL: @test_i32x4_shr( // CHECK-NEXT: entry: -// CHECK-NEXT: [[SPLAT_SPLATINSERT_I:%.*]] = insertelement <4 x i32> poison, i32 [[B:%.*]], i32 0 +// CHECK-NEXT: [[SPLAT_SPLATINSERT_I:%.*]] = insertelement <4 x i32> poison, i32 [[B:%.*]], i64 0 // CHECK-NEXT: [[SPLAT_SPLAT_I:%.*]] = shufflevector <4 x i32> [[SPLAT_SPLATINSERT_I]], <4 x i32> poison, <4 x i32> zeroinitializer // CHECK-NEXT: [[SHR_I:%.*]] = ashr <4 x i32> [[A:%.*]], [[SPLAT_SPLAT_I]] // CHECK-NEXT: ret <4 x i32> [[SHR_I]] @@ -2065,7 +2065,7 @@ // CHECK-LABEL: @test_u32x4_shr( // CHECK-NEXT: entry: -// CHECK-NEXT: [[SPLAT_SPLATINSERT_I:%.*]] = insertelement <4 x i32> poison, i32 [[B:%.*]], i32 0 +// CHECK-NEXT: [[SPLAT_SPLATINSERT_I:%.*]] = insertelement <4 x i32> poison, i32 [[B:%.*]], i64 0 // CHECK-NEXT: [[SPLAT_SPLAT_I:%.*]] = shufflevector <4 x i32> [[SPLAT_SPLATINSERT_I]], <4 x i32> poison, <4 x i32> zeroinitializer // CHECK-NEXT: [[SHR_I:%.*]] = lshr <4 x i32> [[A:%.*]], [[SPLAT_SPLAT_I]] // CHECK-NEXT: ret <4 x i32> [[SHR_I]] @@ -2145,7 +2145,7 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x i32> [[A:%.*]] to <8 x i16> // CHECK-NEXT: [[TMP1:%.*]] = bitcast <4 x i32> [[B:%.*]] to <8 x i16> -// CHECK-NEXT: [[TMP2:%.*]] = tail call <4 x i32> @llvm.wasm.dot(<8 x i16> [[TMP0]], <8 x i16> [[TMP1]]) #[[ATTR6]] +// CHECK-NEXT: [[TMP2:%.*]] = tail call <4 x i32> @llvm.wasm.dot(<8 x i16> [[TMP0]], <8 x i16> [[TMP1]]) #[[ATTR7]] // CHECK-NEXT: ret <4 x i32> [[TMP2]] // v128_t test_i32x4_dot_i16x8(v128_t a, v128_t b) { @@ -2155,7 +2155,7 @@ // CHECK-LABEL: @test_i64x2_abs( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x i32> [[A:%.*]] to <2 x i64> -// CHECK-NEXT: [[TMP1:%.*]] = tail call <2 x i64> @llvm.abs.v2i64(<2 x i64> [[TMP0]], i1 false) #[[ATTR6]] +// CHECK-NEXT: [[TMP1:%.*]] = tail call <2 x i64> @llvm.abs.v2i64(<2 x i64> [[TMP0]], i1 false) #[[ATTR7]] // CHECK-NEXT: [[TMP2:%.*]] = bitcast <2 x i64> [[TMP1]] to <4 x i32> // CHECK-NEXT: ret <4 x i32> [[TMP2]] // @@ -2177,7 +2177,7 @@ // CHECK-LABEL: @test_i64x2_all_true( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x i32> [[A:%.*]] to <2 x i64> -// CHECK-NEXT: [[TMP1:%.*]] = tail call i32 @llvm.wasm.alltrue.v2i64(<2 x i64> [[TMP0]]) #[[ATTR6]] +// CHECK-NEXT: [[TMP1:%.*]] = tail call i32 @llvm.wasm.alltrue.v2i64(<2 x i64> [[TMP0]]) #[[ATTR7]] // CHECK-NEXT: [[TOBOOL_I:%.*]] = icmp ne i32 [[TMP1]], 0 // CHECK-NEXT: ret i1 [[TOBOOL_I]] // @@ -2188,7 +2188,7 @@ // CHECK-LABEL: @test_i64x2_bitmask( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x i32> [[A:%.*]] to <2 x i64> -// CHECK-NEXT: [[TMP1:%.*]] = tail call i32 @llvm.wasm.bitmask.v2i64(<2 x i64> [[TMP0]]) #[[ATTR6]] +// CHECK-NEXT: [[TMP1:%.*]] = tail call i32 @llvm.wasm.bitmask.v2i64(<2 x i64> [[TMP0]]) #[[ATTR7]] // CHECK-NEXT: ret i32 [[TMP1]] // uint32_t test_i64x2_bitmask(v128_t a) { @@ -2199,7 +2199,7 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x i32> [[A:%.*]] to <2 x i64> // CHECK-NEXT: [[CONV_I:%.*]] = zext i32 [[B:%.*]] to i64 -// CHECK-NEXT: [[SPLAT_SPLATINSERT_I:%.*]] = insertelement <2 x i64> poison, i64 [[CONV_I]], i32 0 +// CHECK-NEXT: [[SPLAT_SPLATINSERT_I:%.*]] = insertelement <2 x i64> poison, i64 [[CONV_I]], i64 0 // CHECK-NEXT: [[SPLAT_SPLAT_I:%.*]] = shufflevector <2 x i64> [[SPLAT_SPLATINSERT_I]], <2 x i64> poison, <2 x i32> zeroinitializer // CHECK-NEXT: [[SHL_I:%.*]] = shl <2 x i64> [[TMP0]], [[SPLAT_SPLAT_I]] // CHECK-NEXT: [[TMP1:%.*]] = bitcast <2 x i64> [[SHL_I]] to <4 x i32> @@ -2213,7 +2213,7 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x i32> [[A:%.*]] to <2 x i64> // CHECK-NEXT: [[CONV_I:%.*]] = zext i32 [[B:%.*]] to i64 -// CHECK-NEXT: [[SPLAT_SPLATINSERT_I:%.*]] = insertelement <2 x i64> poison, i64 [[CONV_I]], i32 0 +// CHECK-NEXT: [[SPLAT_SPLATINSERT_I:%.*]] = insertelement <2 x i64> poison, i64 [[CONV_I]], i64 0 // CHECK-NEXT: [[SPLAT_SPLAT_I:%.*]] = shufflevector <2 x i64> [[SPLAT_SPLATINSERT_I]], <2 x i64> poison, <2 x i32> zeroinitializer // CHECK-NEXT: [[SHR_I:%.*]] = ashr <2 x i64> [[TMP0]], [[SPLAT_SPLAT_I]] // CHECK-NEXT: [[TMP1:%.*]] = bitcast <2 x i64> [[SHR_I]] to <4 x i32> @@ -2227,7 +2227,7 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x i32> [[A:%.*]] to <2 x i64> // CHECK-NEXT: [[CONV_I:%.*]] = zext i32 [[B:%.*]] to i64 -// CHECK-NEXT: [[SPLAT_SPLATINSERT_I:%.*]] = insertelement <2 x i64> poison, i64 [[CONV_I]], i32 0 +// CHECK-NEXT: [[SPLAT_SPLATINSERT_I:%.*]] = insertelement <2 x i64> poison, i64 [[CONV_I]], i64 0 // CHECK-NEXT: [[SPLAT_SPLAT_I:%.*]] = shufflevector <2 x i64> [[SPLAT_SPLATINSERT_I]], <2 x i64> poison, <2 x i32> zeroinitializer // CHECK-NEXT: [[SHR_I:%.*]] = lshr <2 x i64> [[TMP0]], [[SPLAT_SPLAT_I]] // CHECK-NEXT: [[TMP1:%.*]] = bitcast <2 x i64> [[SHR_I]] to <4 x i32> @@ -2276,7 +2276,7 @@ // CHECK-LABEL: @test_f32x4_abs( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x i32> [[A:%.*]] to <4 x float> -// CHECK-NEXT: [[TMP1:%.*]] = tail call <4 x float> @llvm.fabs.v4f32(<4 x float> [[TMP0]]) #[[ATTR6]] +// CHECK-NEXT: [[TMP1:%.*]] = tail call <4 x float> @llvm.fabs.v4f32(<4 x float> [[TMP0]]) #[[ATTR7]] // CHECK-NEXT: [[TMP2:%.*]] = bitcast <4 x float> [[TMP1]] to <4 x i32> // CHECK-NEXT: ret <4 x i32> [[TMP2]] // @@ -2298,7 +2298,7 @@ // CHECK-LABEL: @test_f32x4_sqrt( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x i32> [[A:%.*]] to <4 x float> -// CHECK-NEXT: [[TMP1:%.*]] = tail call <4 x float> @llvm.sqrt.v4f32(<4 x float> [[TMP0]]) #[[ATTR6]] +// CHECK-NEXT: [[TMP1:%.*]] = tail call <4 x float> @llvm.sqrt.v4f32(<4 x float> [[TMP0]]) #[[ATTR7]] // CHECK-NEXT: [[TMP2:%.*]] = bitcast <4 x float> [[TMP1]] to <4 x i32> // CHECK-NEXT: ret <4 x i32> [[TMP2]] // @@ -2309,7 +2309,7 @@ // CHECK-LABEL: @test_f32x4_ceil( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x i32> [[A:%.*]] to <4 x float> -// CHECK-NEXT: [[TMP1:%.*]] = tail call <4 x float> @llvm.ceil.v4f32(<4 x float> [[TMP0]]) #[[ATTR6]] +// CHECK-NEXT: [[TMP1:%.*]] = tail call <4 x float> @llvm.ceil.v4f32(<4 x float> [[TMP0]]) #[[ATTR7]] // CHECK-NEXT: [[TMP2:%.*]] = bitcast <4 x float> [[TMP1]] to <4 x i32> // CHECK-NEXT: ret <4 x i32> [[TMP2]] // @@ -2320,7 +2320,7 @@ // CHECK-LABEL: @test_f32x4_floor( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x i32> [[A:%.*]] to <4 x float> -// CHECK-NEXT: [[TMP1:%.*]] = tail call <4 x float> @llvm.floor.v4f32(<4 x float> [[TMP0]]) #[[ATTR6]] +// CHECK-NEXT: [[TMP1:%.*]] = tail call <4 x float> @llvm.floor.v4f32(<4 x float> [[TMP0]]) #[[ATTR7]] // CHECK-NEXT: [[TMP2:%.*]] = bitcast <4 x float> [[TMP1]] to <4 x i32> // CHECK-NEXT: ret <4 x i32> [[TMP2]] // @@ -2331,7 +2331,7 @@ // CHECK-LABEL: @test_f32x4_trunc( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x i32> [[A:%.*]] to <4 x float> -// CHECK-NEXT: [[TMP1:%.*]] = tail call <4 x float> @llvm.trunc.v4f32(<4 x float> [[TMP0]]) #[[ATTR6]] +// CHECK-NEXT: [[TMP1:%.*]] = tail call <4 x float> @llvm.trunc.v4f32(<4 x float> [[TMP0]]) #[[ATTR7]] // CHECK-NEXT: [[TMP2:%.*]] = bitcast <4 x float> [[TMP1]] to <4 x i32> // CHECK-NEXT: ret <4 x i32> [[TMP2]] // @@ -2342,7 +2342,7 @@ // CHECK-LABEL: @test_f32x4_nearest( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x i32> [[A:%.*]] to <4 x float> -// CHECK-NEXT: [[TMP1:%.*]] = tail call <4 x float> @llvm.nearbyint.v4f32(<4 x float> [[TMP0]]) #[[ATTR6]] +// CHECK-NEXT: [[TMP1:%.*]] = tail call <4 x float> @llvm.nearbyint.v4f32(<4 x float> [[TMP0]]) #[[ATTR7]] // CHECK-NEXT: [[TMP2:%.*]] = bitcast <4 x float> [[TMP1]] to <4 x i32> // CHECK-NEXT: ret <4 x i32> [[TMP2]] // @@ -2402,7 +2402,7 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x i32> [[A:%.*]] to <4 x float> // CHECK-NEXT: [[TMP1:%.*]] = bitcast <4 x i32> [[B:%.*]] to <4 x float> -// CHECK-NEXT: [[TMP2:%.*]] = tail call <4 x float> @llvm.minimum.v4f32(<4 x float> [[TMP0]], <4 x float> [[TMP1]]) #[[ATTR6]] +// CHECK-NEXT: [[TMP2:%.*]] = tail call <4 x float> @llvm.minimum.v4f32(<4 x float> [[TMP0]], <4 x float> [[TMP1]]) #[[ATTR7]] // CHECK-NEXT: [[TMP3:%.*]] = bitcast <4 x float> [[TMP2]] to <4 x i32> // CHECK-NEXT: ret <4 x i32> [[TMP3]] // @@ -2414,7 +2414,7 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x i32> [[A:%.*]] to <4 x float> // CHECK-NEXT: [[TMP1:%.*]] = bitcast <4 x i32> [[B:%.*]] to <4 x float> -// CHECK-NEXT: [[TMP2:%.*]] = tail call <4 x float> @llvm.maximum.v4f32(<4 x float> [[TMP0]], <4 x float> [[TMP1]]) #[[ATTR6]] +// CHECK-NEXT: [[TMP2:%.*]] = tail call <4 x float> @llvm.maximum.v4f32(<4 x float> [[TMP0]], <4 x float> [[TMP1]]) #[[ATTR7]] // CHECK-NEXT: [[TMP3:%.*]] = bitcast <4 x float> [[TMP2]] to <4 x i32> // CHECK-NEXT: ret <4 x i32> [[TMP3]] // @@ -2426,7 +2426,7 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x i32> [[A:%.*]] to <4 x float> // CHECK-NEXT: [[TMP1:%.*]] = bitcast <4 x i32> [[B:%.*]] to <4 x float> -// CHECK-NEXT: [[TMP2:%.*]] = tail call <4 x float> @llvm.wasm.pmin.v4f32(<4 x float> [[TMP0]], <4 x float> [[TMP1]]) #[[ATTR6]] +// CHECK-NEXT: [[TMP2:%.*]] = tail call <4 x float> @llvm.wasm.pmin.v4f32(<4 x float> [[TMP0]], <4 x float> [[TMP1]]) #[[ATTR7]] // CHECK-NEXT: [[TMP3:%.*]] = bitcast <4 x float> [[TMP2]] to <4 x i32> // CHECK-NEXT: ret <4 x i32> [[TMP3]] // @@ -2438,7 +2438,7 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x i32> [[A:%.*]] to <4 x float> // CHECK-NEXT: [[TMP1:%.*]] = bitcast <4 x i32> [[B:%.*]] to <4 x float> -// CHECK-NEXT: [[TMP2:%.*]] = tail call <4 x float> @llvm.wasm.pmax.v4f32(<4 x float> [[TMP0]], <4 x float> [[TMP1]]) #[[ATTR6]] +// CHECK-NEXT: [[TMP2:%.*]] = tail call <4 x float> @llvm.wasm.pmax.v4f32(<4 x float> [[TMP0]], <4 x float> [[TMP1]]) #[[ATTR7]] // CHECK-NEXT: [[TMP3:%.*]] = bitcast <4 x float> [[TMP2]] to <4 x i32> // CHECK-NEXT: ret <4 x i32> [[TMP3]] // @@ -2449,7 +2449,7 @@ // CHECK-LABEL: @test_f64x2_abs( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x i32> [[A:%.*]] to <2 x double> -// CHECK-NEXT: [[TMP1:%.*]] = tail call <2 x double> @llvm.fabs.v2f64(<2 x double> [[TMP0]]) #[[ATTR6]] +// CHECK-NEXT: [[TMP1:%.*]] = tail call <2 x double> @llvm.fabs.v2f64(<2 x double> [[TMP0]]) #[[ATTR7]] // CHECK-NEXT: [[TMP2:%.*]] = bitcast <2 x double> [[TMP1]] to <4 x i32> // CHECK-NEXT: ret <4 x i32> [[TMP2]] // @@ -2471,7 +2471,7 @@ // CHECK-LABEL: @test_f64x2_sqrt( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x i32> [[A:%.*]] to <2 x double> -// CHECK-NEXT: [[TMP1:%.*]] = tail call <2 x double> @llvm.sqrt.v2f64(<2 x double> [[TMP0]]) #[[ATTR6]] +// CHECK-NEXT: [[TMP1:%.*]] = tail call <2 x double> @llvm.sqrt.v2f64(<2 x double> [[TMP0]]) #[[ATTR7]] // CHECK-NEXT: [[TMP2:%.*]] = bitcast <2 x double> [[TMP1]] to <4 x i32> // CHECK-NEXT: ret <4 x i32> [[TMP2]] // @@ -2482,7 +2482,7 @@ // CHECK-LABEL: @test_f64x2_ceil( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x i32> [[A:%.*]] to <2 x double> -// CHECK-NEXT: [[TMP1:%.*]] = tail call <2 x double> @llvm.ceil.v2f64(<2 x double> [[TMP0]]) #[[ATTR6]] +// CHECK-NEXT: [[TMP1:%.*]] = tail call <2 x double> @llvm.ceil.v2f64(<2 x double> [[TMP0]]) #[[ATTR7]] // CHECK-NEXT: [[TMP2:%.*]] = bitcast <2 x double> [[TMP1]] to <4 x i32> // CHECK-NEXT: ret <4 x i32> [[TMP2]] // @@ -2493,7 +2493,7 @@ // CHECK-LABEL: @test_f64x2_floor( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x i32> [[A:%.*]] to <2 x double> -// CHECK-NEXT: [[TMP1:%.*]] = tail call <2 x double> @llvm.floor.v2f64(<2 x double> [[TMP0]]) #[[ATTR6]] +// CHECK-NEXT: [[TMP1:%.*]] = tail call <2 x double> @llvm.floor.v2f64(<2 x double> [[TMP0]]) #[[ATTR7]] // CHECK-NEXT: [[TMP2:%.*]] = bitcast <2 x double> [[TMP1]] to <4 x i32> // CHECK-NEXT: ret <4 x i32> [[TMP2]] // @@ -2504,7 +2504,7 @@ // CHECK-LABEL: @test_f64x2_trunc( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x i32> [[A:%.*]] to <2 x double> -// CHECK-NEXT: [[TMP1:%.*]] = tail call <2 x double> @llvm.trunc.v2f64(<2 x double> [[TMP0]]) #[[ATTR6]] +// CHECK-NEXT: [[TMP1:%.*]] = tail call <2 x double> @llvm.trunc.v2f64(<2 x double> [[TMP0]]) #[[ATTR7]] // CHECK-NEXT: [[TMP2:%.*]] = bitcast <2 x double> [[TMP1]] to <4 x i32> // CHECK-NEXT: ret <4 x i32> [[TMP2]] // @@ -2515,7 +2515,7 @@ // CHECK-LABEL: @test_f64x2_nearest( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x i32> [[A:%.*]] to <2 x double> -// CHECK-NEXT: [[TMP1:%.*]] = tail call <2 x double> @llvm.nearbyint.v2f64(<2 x double> [[TMP0]]) #[[ATTR6]] +// CHECK-NEXT: [[TMP1:%.*]] = tail call <2 x double> @llvm.nearbyint.v2f64(<2 x double> [[TMP0]]) #[[ATTR7]] // CHECK-NEXT: [[TMP2:%.*]] = bitcast <2 x double> [[TMP1]] to <4 x i32> // CHECK-NEXT: ret <4 x i32> [[TMP2]] // @@ -2575,7 +2575,7 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x i32> [[A:%.*]] to <2 x double> // CHECK-NEXT: [[TMP1:%.*]] = bitcast <4 x i32> [[B:%.*]] to <2 x double> -// CHECK-NEXT: [[TMP2:%.*]] = tail call <2 x double> @llvm.minimum.v2f64(<2 x double> [[TMP0]], <2 x double> [[TMP1]]) #[[ATTR6]] +// CHECK-NEXT: [[TMP2:%.*]] = tail call <2 x double> @llvm.minimum.v2f64(<2 x double> [[TMP0]], <2 x double> [[TMP1]]) #[[ATTR7]] // CHECK-NEXT: [[TMP3:%.*]] = bitcast <2 x double> [[TMP2]] to <4 x i32> // CHECK-NEXT: ret <4 x i32> [[TMP3]] // @@ -2587,7 +2587,7 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x i32> [[A:%.*]] to <2 x double> // CHECK-NEXT: [[TMP1:%.*]] = bitcast <4 x i32> [[B:%.*]] to <2 x double> -// CHECK-NEXT: [[TMP2:%.*]] = tail call <2 x double> @llvm.maximum.v2f64(<2 x double> [[TMP0]], <2 x double> [[TMP1]]) #[[ATTR6]] +// CHECK-NEXT: [[TMP2:%.*]] = tail call <2 x double> @llvm.maximum.v2f64(<2 x double> [[TMP0]], <2 x double> [[TMP1]]) #[[ATTR7]] // CHECK-NEXT: [[TMP3:%.*]] = bitcast <2 x double> [[TMP2]] to <4 x i32> // CHECK-NEXT: ret <4 x i32> [[TMP3]] // @@ -2599,7 +2599,7 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x i32> [[A:%.*]] to <2 x double> // CHECK-NEXT: [[TMP1:%.*]] = bitcast <4 x i32> [[B:%.*]] to <2 x double> -// CHECK-NEXT: [[TMP2:%.*]] = tail call <2 x double> @llvm.wasm.pmin.v2f64(<2 x double> [[TMP0]], <2 x double> [[TMP1]]) #[[ATTR6]] +// CHECK-NEXT: [[TMP2:%.*]] = tail call <2 x double> @llvm.wasm.pmin.v2f64(<2 x double> [[TMP0]], <2 x double> [[TMP1]]) #[[ATTR7]] // CHECK-NEXT: [[TMP3:%.*]] = bitcast <2 x double> [[TMP2]] to <4 x i32> // CHECK-NEXT: ret <4 x i32> [[TMP3]] // @@ -2611,7 +2611,7 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x i32> [[A:%.*]] to <2 x double> // CHECK-NEXT: [[TMP1:%.*]] = bitcast <4 x i32> [[B:%.*]] to <2 x double> -// CHECK-NEXT: [[TMP2:%.*]] = tail call <2 x double> @llvm.wasm.pmax.v2f64(<2 x double> [[TMP0]], <2 x double> [[TMP1]]) #[[ATTR6]] +// CHECK-NEXT: [[TMP2:%.*]] = tail call <2 x double> @llvm.wasm.pmax.v2f64(<2 x double> [[TMP0]], <2 x double> [[TMP1]]) #[[ATTR7]] // CHECK-NEXT: [[TMP3:%.*]] = bitcast <2 x double> [[TMP2]] to <4 x i32> // CHECK-NEXT: ret <4 x i32> [[TMP3]] // @@ -2622,7 +2622,7 @@ // CHECK-LABEL: @test_i32x4_trunc_sat_f32x4( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x i32> [[A:%.*]] to <4 x float> -// CHECK-NEXT: [[TMP1:%.*]] = tail call <4 x i32> @llvm.fptosi.sat.v4i32.v4f32(<4 x float> [[TMP0]]) #[[ATTR6]] +// CHECK-NEXT: [[TMP1:%.*]] = tail call <4 x i32> @llvm.fptosi.sat.v4i32.v4f32(<4 x float> [[TMP0]]) #[[ATTR7]] // CHECK-NEXT: ret <4 x i32> [[TMP1]] // v128_t test_i32x4_trunc_sat_f32x4(v128_t a) { @@ -2632,7 +2632,7 @@ // CHECK-LABEL: @test_u32x4_trunc_sat_f32x4( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x i32> [[A:%.*]] to <4 x float> -// CHECK-NEXT: [[TMP1:%.*]] = tail call <4 x i32> @llvm.fptoui.sat.v4i32.v4f32(<4 x float> [[TMP0]]) #[[ATTR6]] +// CHECK-NEXT: [[TMP1:%.*]] = tail call <4 x i32> @llvm.fptoui.sat.v4i32.v4f32(<4 x float> [[TMP0]]) #[[ATTR7]] // CHECK-NEXT: ret <4 x i32> [[TMP1]] // v128_t test_u32x4_trunc_sat_f32x4(v128_t a) { @@ -2684,7 +2684,7 @@ // CHECK-LABEL: @test_i32x4_trunc_sat_f64x2_zero( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x i32> [[A:%.*]] to <2 x double> -// CHECK-NEXT: [[TMP1:%.*]] = tail call <2 x i32> @llvm.fptosi.sat.v2i32.v2f64(<2 x double> [[TMP0]]) #[[ATTR6]] +// CHECK-NEXT: [[TMP1:%.*]] = tail call <2 x i32> @llvm.fptosi.sat.v2i32.v2f64(<2 x double> [[TMP0]]) #[[ATTR7]] // CHECK-NEXT: [[TMP2:%.*]] = shufflevector <2 x i32> [[TMP1]], <2 x i32> zeroinitializer, <4 x i32> // CHECK-NEXT: ret <4 x i32> [[TMP2]] // @@ -2695,7 +2695,7 @@ // CHECK-LABEL: @test_u32x4_trunc_sat_f64x2_zero( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x i32> [[A:%.*]] to <2 x double> -// CHECK-NEXT: [[TMP1:%.*]] = tail call <2 x i32> @llvm.fptoui.sat.v2i32.v2f64(<2 x double> [[TMP0]]) #[[ATTR6]] +// CHECK-NEXT: [[TMP1:%.*]] = tail call <2 x i32> @llvm.fptoui.sat.v2i32.v2f64(<2 x double> [[TMP0]]) #[[ATTR7]] // CHECK-NEXT: [[TMP2:%.*]] = shufflevector <2 x i32> [[TMP1]], <2 x i32> zeroinitializer, <4 x i32> // CHECK-NEXT: ret <4 x i32> [[TMP2]] // @@ -2779,7 +2779,7 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x i32> [[A:%.*]] to <16 x i8> // CHECK-NEXT: [[TMP1:%.*]] = bitcast <4 x i32> [[B:%.*]] to <16 x i8> -// CHECK-NEXT: [[TMP2:%.*]] = tail call <16 x i8> @llvm.wasm.swizzle(<16 x i8> [[TMP0]], <16 x i8> [[TMP1]]) #[[ATTR6]] +// CHECK-NEXT: [[TMP2:%.*]] = tail call <16 x i8> @llvm.wasm.swizzle(<16 x i8> [[TMP0]], <16 x i8> [[TMP1]]) #[[ATTR7]] // CHECK-NEXT: [[TMP3:%.*]] = bitcast <16 x i8> [[TMP2]] to <4 x i32> // CHECK-NEXT: ret <4 x i32> [[TMP3]] // @@ -2791,7 +2791,7 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x i32> [[A:%.*]] to <8 x i16> // CHECK-NEXT: [[TMP1:%.*]] = bitcast <4 x i32> [[B:%.*]] to <8 x i16> -// CHECK-NEXT: [[TMP2:%.*]] = tail call <16 x i8> @llvm.wasm.narrow.signed.v16i8.v8i16(<8 x i16> [[TMP0]], <8 x i16> [[TMP1]]) #[[ATTR6]] +// CHECK-NEXT: [[TMP2:%.*]] = tail call <16 x i8> @llvm.wasm.narrow.signed.v16i8.v8i16(<8 x i16> [[TMP0]], <8 x i16> [[TMP1]]) #[[ATTR7]] // CHECK-NEXT: [[TMP3:%.*]] = bitcast <16 x i8> [[TMP2]] to <4 x i32> // CHECK-NEXT: ret <4 x i32> [[TMP3]] // @@ -2803,7 +2803,7 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x i32> [[A:%.*]] to <8 x i16> // CHECK-NEXT: [[TMP1:%.*]] = bitcast <4 x i32> [[B:%.*]] to <8 x i16> -// CHECK-NEXT: [[TMP2:%.*]] = tail call <16 x i8> @llvm.wasm.narrow.unsigned.v16i8.v8i16(<8 x i16> [[TMP0]], <8 x i16> [[TMP1]]) #[[ATTR6]] +// CHECK-NEXT: [[TMP2:%.*]] = tail call <16 x i8> @llvm.wasm.narrow.unsigned.v16i8.v8i16(<8 x i16> [[TMP0]], <8 x i16> [[TMP1]]) #[[ATTR7]] // CHECK-NEXT: [[TMP3:%.*]] = bitcast <16 x i8> [[TMP2]] to <4 x i32> // CHECK-NEXT: ret <4 x i32> [[TMP3]] // @@ -2813,7 +2813,7 @@ // CHECK-LABEL: @test_i16x8_narrow_i32x4( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call <8 x i16> @llvm.wasm.narrow.signed.v8i16.v4i32(<4 x i32> [[A:%.*]], <4 x i32> [[B:%.*]]) #[[ATTR6]] +// CHECK-NEXT: [[TMP0:%.*]] = tail call <8 x i16> @llvm.wasm.narrow.signed.v8i16.v4i32(<4 x i32> [[A:%.*]], <4 x i32> [[B:%.*]]) #[[ATTR7]] // CHECK-NEXT: [[TMP1:%.*]] = bitcast <8 x i16> [[TMP0]] to <4 x i32> // CHECK-NEXT: ret <4 x i32> [[TMP1]] // @@ -2823,7 +2823,7 @@ // CHECK-LABEL: @test_u16x8_narrow_i32x4( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call <8 x i16> @llvm.wasm.narrow.unsigned.v8i16.v4i32(<4 x i32> [[A:%.*]], <4 x i32> [[B:%.*]]) #[[ATTR6]] +// CHECK-NEXT: [[TMP0:%.*]] = tail call <8 x i16> @llvm.wasm.narrow.unsigned.v8i16.v4i32(<4 x i32> [[A:%.*]], <4 x i32> [[B:%.*]]) #[[ATTR7]] // CHECK-NEXT: [[TMP1:%.*]] = bitcast <8 x i16> [[TMP0]] to <4 x i32> // CHECK-NEXT: ret <4 x i32> [[TMP1]] // @@ -2970,7 +2970,7 @@ // CHECK-LABEL: @test_i16x8_extadd_pairwise_i8x16( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x i32> [[A:%.*]] to <16 x i8> -// CHECK-NEXT: [[TMP1:%.*]] = tail call <8 x i16> @llvm.wasm.extadd.pairwise.signed.v8i16(<16 x i8> [[TMP0]]) #[[ATTR6]] +// CHECK-NEXT: [[TMP1:%.*]] = tail call <8 x i16> @llvm.wasm.extadd.pairwise.signed.v8i16(<16 x i8> [[TMP0]]) #[[ATTR7]] // CHECK-NEXT: [[TMP2:%.*]] = bitcast <8 x i16> [[TMP1]] to <4 x i32> // CHECK-NEXT: ret <4 x i32> [[TMP2]] // @@ -2981,7 +2981,7 @@ // CHECK-LABEL: @test_u16x8_extadd_pairwise_u8x16( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x i32> [[A:%.*]] to <16 x i8> -// CHECK-NEXT: [[TMP1:%.*]] = tail call <8 x i16> @llvm.wasm.extadd.pairwise.unsigned.v8i16(<16 x i8> [[TMP0]]) #[[ATTR6]] +// CHECK-NEXT: [[TMP1:%.*]] = tail call <8 x i16> @llvm.wasm.extadd.pairwise.unsigned.v8i16(<16 x i8> [[TMP0]]) #[[ATTR7]] // CHECK-NEXT: [[TMP2:%.*]] = bitcast <8 x i16> [[TMP1]] to <4 x i32> // CHECK-NEXT: ret <4 x i32> [[TMP2]] // @@ -2992,7 +2992,7 @@ // CHECK-LABEL: @test_i32x4_extadd_pairwise_i16x8( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x i32> [[A:%.*]] to <8 x i16> -// CHECK-NEXT: [[TMP1:%.*]] = tail call <4 x i32> @llvm.wasm.extadd.pairwise.signed.v4i32(<8 x i16> [[TMP0]]) #[[ATTR6]] +// CHECK-NEXT: [[TMP1:%.*]] = tail call <4 x i32> @llvm.wasm.extadd.pairwise.signed.v4i32(<8 x i16> [[TMP0]]) #[[ATTR7]] // CHECK-NEXT: ret <4 x i32> [[TMP1]] // v128_t test_i32x4_extadd_pairwise_i16x8(v128_t a) { @@ -3002,7 +3002,7 @@ // CHECK-LABEL: @test_u32x4_extadd_pairwise_u16x8( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x i32> [[A:%.*]] to <8 x i16> -// CHECK-NEXT: [[TMP1:%.*]] = tail call <4 x i32> @llvm.wasm.extadd.pairwise.unsigned.v4i32(<8 x i16> [[TMP0]]) #[[ATTR6]] +// CHECK-NEXT: [[TMP1:%.*]] = tail call <4 x i32> @llvm.wasm.extadd.pairwise.unsigned.v4i32(<8 x i16> [[TMP0]]) #[[ATTR7]] // CHECK-NEXT: ret <4 x i32> [[TMP1]] // v128_t test_u32x4_extadd_pairwise_u16x8(v128_t a) { @@ -3193,7 +3193,7 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x i32> [[A:%.*]] to <8 x i16> // CHECK-NEXT: [[TMP1:%.*]] = bitcast <4 x i32> [[B:%.*]] to <8 x i16> -// CHECK-NEXT: [[TMP2:%.*]] = tail call <8 x i16> @llvm.wasm.q15mulr.sat.signed(<8 x i16> [[TMP0]], <8 x i16> [[TMP1]]) #[[ATTR6]] +// CHECK-NEXT: [[TMP2:%.*]] = tail call <8 x i16> @llvm.wasm.q15mulr.sat.signed(<8 x i16> [[TMP0]], <8 x i16> [[TMP1]]) #[[ATTR7]] // CHECK-NEXT: [[TMP3:%.*]] = bitcast <8 x i16> [[TMP2]] to <4 x i32> // CHECK-NEXT: ret <4 x i32> [[TMP3]] // diff --git a/llvm/lib/Transforms/InstCombine/InstCombineVectorOps.cpp b/llvm/lib/Transforms/InstCombine/InstCombineVectorOps.cpp --- a/llvm/lib/Transforms/InstCombine/InstCombineVectorOps.cpp +++ b/llvm/lib/Transforms/InstCombine/InstCombineVectorOps.cpp @@ -363,6 +363,18 @@ return UnionUsedElts; } +/// Given a constant index for a extractelement or insertelement instruction, +/// return it with the canonical type if it isn't already canonical. We +/// arbitrarily pick 64 bit as our canonical type. The actual bitwidth doesn't +/// matter, we just want a consistent type to simplify CSE. +ConstantInt *getPreferredVectorIndex(ConstantInt *IndexC) { + const unsigned IndexBW = IndexC->getType()->getBitWidth(); + if (IndexBW == 64 || IndexC->getValue().getActiveBits() > 64) + return nullptr; + return ConstantInt::get(IndexC->getContext(), + IndexC->getValue().zextOrTrunc(64)); +} + Instruction *InstCombinerImpl::visitExtractElementInst(ExtractElementInst &EI) { Value *SrcVec = EI.getVectorOperand(); Value *Index = EI.getIndexOperand(); @@ -374,6 +386,10 @@ // find a previously computed scalar that was inserted into the vector. auto *IndexC = dyn_cast(Index); if (IndexC) { + // Canonicalize type of constant indices to i64 to simplify CSE + if (auto *NewIdx = getPreferredVectorIndex(IndexC)) + return replaceOperand(EI, 1, NewIdx); + ElementCount EC = EI.getVectorOperandType()->getElementCount(); unsigned NumElts = EC.getKnownMinValue(); @@ -1478,6 +1494,11 @@ VecOp, ScalarOp, IdxOp, SQ.getWithInstruction(&IE))) return replaceInstUsesWith(IE, V); + // Canonicalize type of constant indices to i64 to simplify CSE + if (auto *IndexC = dyn_cast(IdxOp)) + if (auto *NewIdx = getPreferredVectorIndex(IndexC)) + return replaceOperand(IE, 2, NewIdx); + // If the scalar is bitcast and inserted into undef, do the insert in the // source type followed by bitcast. // TODO: Generalize for insert into any constant, not just undef? diff --git a/llvm/test/Transforms/InstCombine/AArch64/sve-intrinsic-opts-dup.ll b/llvm/test/Transforms/InstCombine/AArch64/sve-intrinsic-opts-dup.ll --- a/llvm/test/Transforms/InstCombine/AArch64/sve-intrinsic-opts-dup.ll +++ b/llvm/test/Transforms/InstCombine/AArch64/sve-intrinsic-opts-dup.ll @@ -47,7 +47,7 @@ define @dupx_splat_convert(i16 %s) #0 { ; CHECK-LABEL: @dupx_splat_convert( -; CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[S:%.*]], i32 0 +; CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[S:%.*]], i64 0 ; CHECK-NEXT: [[SPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer ; CHECK-NEXT: ret [[SPLAT]] ; diff --git a/llvm/test/Transforms/InstCombine/AArch64/sve-intrinsic-opts-lasta-lastb.ll b/llvm/test/Transforms/InstCombine/AArch64/sve-intrinsic-opts-lasta-lastb.ll --- a/llvm/test/Transforms/InstCombine/AArch64/sve-intrinsic-opts-lasta-lastb.ll +++ b/llvm/test/Transforms/InstCombine/AArch64/sve-intrinsic-opts-lasta-lastb.ll @@ -287,7 +287,7 @@ ; Check that we don't do anything as the binary op has multiple uses. define i8 @lastb_binop_nochange( %pg, i8 %scalar, %vector) #0 { ; OPT-LABEL: @lastb_binop_nochange( -; OPT-NEXT: [[SPLAT_INSERT:%.*]] = insertelement poison, i8 [[SCALAR:%.*]], i32 0 +; OPT-NEXT: [[SPLAT_INSERT:%.*]] = insertelement poison, i8 [[SCALAR:%.*]], i64 0 ; OPT-NEXT: [[SPLAT:%.*]] = shufflevector [[SPLAT_INSERT]], poison, zeroinitializer ; OPT-NEXT: [[BINOP:%.*]] = sdiv [[VECTOR:%.*]], [[SPLAT]] ; OPT-NEXT: [[LAST:%.*]] = tail call i8 @llvm.aarch64.sve.lastb.nxv16i8( [[PG:%.*]], [[BINOP]]) diff --git a/llvm/test/Transforms/InstCombine/AArch64/sve-intrinsic-opts-unpkhi-unpklo.ll b/llvm/test/Transforms/InstCombine/AArch64/sve-intrinsic-opts-unpkhi-unpklo.ll --- a/llvm/test/Transforms/InstCombine/AArch64/sve-intrinsic-opts-unpkhi-unpklo.ll +++ b/llvm/test/Transforms/InstCombine/AArch64/sve-intrinsic-opts-unpkhi-unpklo.ll @@ -6,7 +6,7 @@ define @uunpkhi_splat(i16 %a) #0 { ; CHECK-LABEL: @uunpkhi_splat( ; CHECK-NEXT: [[TMP1:%.*]] = zext i16 [[A:%.*]] to i32 -; CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[TMP1]], i32 0 +; CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[TMP1]], i64 0 ; CHECK-NEXT: [[UNPACK:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer ; CHECK-NEXT: ret [[UNPACK]] ; @@ -19,7 +19,7 @@ define @uunpklo_splat(i16 %a) #0 { ; CHECK-LABEL: @uunpklo_splat( ; CHECK-NEXT: [[TMP1:%.*]] = zext i16 [[A:%.*]] to i32 -; CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[TMP1]], i32 0 +; CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[TMP1]], i64 0 ; CHECK-NEXT: [[UNPACK:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer ; CHECK-NEXT: ret [[UNPACK]] ; @@ -32,7 +32,7 @@ define @sunpkhi_splat(i16 %a) #0 { ; CHECK-LABEL: @sunpkhi_splat( ; CHECK-NEXT: [[TMP1:%.*]] = sext i16 [[A:%.*]] to i32 -; CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[TMP1]], i32 0 +; CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[TMP1]], i64 0 ; CHECK-NEXT: [[UNPACK:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer ; CHECK-NEXT: ret [[UNPACK]] ; @@ -45,7 +45,7 @@ define @sunpklo_splat(i16 %a) #0 { ; CHECK-LABEL: @sunpklo_splat( ; CHECK-NEXT: [[TMP1:%.*]] = sext i16 [[A:%.*]] to i32 -; CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[TMP1]], i32 0 +; CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[TMP1]], i64 0 ; CHECK-NEXT: [[UNPACK:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer ; CHECK-NEXT: ret [[UNPACK]] ; diff --git a/llvm/test/Transforms/InstCombine/AArch64/sve-intrinsic-tbl-dupx.ll b/llvm/test/Transforms/InstCombine/AArch64/sve-intrinsic-tbl-dupx.ll --- a/llvm/test/Transforms/InstCombine/AArch64/sve-intrinsic-tbl-dupx.ll +++ b/llvm/test/Transforms/InstCombine/AArch64/sve-intrinsic-tbl-dupx.ll @@ -8,8 +8,8 @@ define @dup_ext_i8( %data) #0 { ; ; CHECK-LABEL: @dup_ext_i8( -; CHECK-NEXT: [[TMP1:%.*]] = extractelement [[DATA:%.*]], i8 1 -; CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[TMP1]], i32 0 +; CHECK-NEXT: [[TMP1:%.*]] = extractelement [[DATA:%.*]], i64 1 +; CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[TMP1]], i64 0 ; CHECK-NEXT: [[OUT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer ; CHECK-NEXT: ret [[OUT]] ; @@ -21,8 +21,8 @@ define @dup_ext_i16( %data) #0 { ; ; CHECK-LABEL: @dup_ext_i16( -; CHECK-NEXT: [[TMP1:%.*]] = extractelement [[DATA:%.*]], i16 1 -; CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[TMP1]], i32 0 +; CHECK-NEXT: [[TMP1:%.*]] = extractelement [[DATA:%.*]], i64 1 +; CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[TMP1]], i64 0 ; CHECK-NEXT: [[OUT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer ; CHECK-NEXT: ret [[OUT]] ; @@ -34,8 +34,8 @@ define @dup_ext_i32( %data) #0 { ; ; CHECK-LABEL: @dup_ext_i32( -; CHECK-NEXT: [[TMP1:%.*]] = extractelement [[DATA:%.*]], i32 1 -; CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[TMP1]], i32 0 +; CHECK-NEXT: [[TMP1:%.*]] = extractelement [[DATA:%.*]], i64 1 +; CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[TMP1]], i64 0 ; CHECK-NEXT: [[OUT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer ; CHECK-NEXT: ret [[OUT]] ; @@ -48,7 +48,7 @@ ; ; CHECK-LABEL: @dup_ext_i64( ; CHECK-NEXT: [[TMP1:%.*]] = extractelement [[DATA:%.*]], i64 1 -; CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[TMP1]], i32 0 +; CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[TMP1]], i64 0 ; CHECK-NEXT: [[OUT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer ; CHECK-NEXT: ret [[OUT]] ; @@ -60,8 +60,8 @@ define @dup_ext_f16( %data) #0 { ; ; CHECK-LABEL: @dup_ext_f16( -; CHECK-NEXT: [[TMP1:%.*]] = extractelement [[DATA:%.*]], i16 1 -; CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[TMP1]], i32 0 +; CHECK-NEXT: [[TMP1:%.*]] = extractelement [[DATA:%.*]], i64 1 +; CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[TMP1]], i64 0 ; CHECK-NEXT: [[OUT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer ; CHECK-NEXT: ret [[OUT]] ; @@ -73,8 +73,8 @@ define @dup_ext_f32( %data) #0 { ; ; CHECK-LABEL: @dup_ext_f32( -; CHECK-NEXT: [[TMP1:%.*]] = extractelement [[DATA:%.*]], i32 1 -; CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[TMP1]], i32 0 +; CHECK-NEXT: [[TMP1:%.*]] = extractelement [[DATA:%.*]], i64 1 +; CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[TMP1]], i64 0 ; CHECK-NEXT: [[OUT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer ; CHECK-NEXT: ret [[OUT]] ; @@ -87,7 +87,7 @@ ; ; CHECK-LABEL: @dup_ext_f64( ; CHECK-NEXT: [[TMP1:%.*]] = extractelement [[DATA:%.*]], i64 1 -; CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[TMP1]], i32 0 +; CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[TMP1]], i64 0 ; CHECK-NEXT: [[OUT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer ; CHECK-NEXT: ret [[OUT]] ; diff --git a/llvm/test/Transforms/InstCombine/AMDGPU/amdgcn-demanded-vector-elts-inseltpoison.ll b/llvm/test/Transforms/InstCombine/AMDGPU/amdgcn-demanded-vector-elts-inseltpoison.ll --- a/llvm/test/Transforms/InstCombine/AMDGPU/amdgcn-demanded-vector-elts-inseltpoison.ll +++ b/llvm/test/Transforms/InstCombine/AMDGPU/amdgcn-demanded-vector-elts-inseltpoison.ll @@ -54,7 +54,7 @@ define amdgpu_ps float @extract_elt1_buffer_load_v2f32(<4 x i32> inreg %rsrc, i32 %idx, i32 %ofs) #0 { ; CHECK-LABEL: @extract_elt1_buffer_load_v2f32( ; CHECK-NEXT: [[DATA:%.*]] = call <2 x float> @llvm.amdgcn.buffer.load.v2f32(<4 x i32> [[RSRC:%.*]], i32 [[IDX:%.*]], i32 [[OFS:%.*]], i1 false, i1 false) -; CHECK-NEXT: [[ELT1:%.*]] = extractelement <2 x float> [[DATA]], i32 1 +; CHECK-NEXT: [[ELT1:%.*]] = extractelement <2 x float> [[DATA]], i64 1 ; CHECK-NEXT: ret float [[ELT1]] ; %data = call <2 x float> @llvm.amdgcn.buffer.load.v2f32(<4 x i32> %rsrc, i32 %idx, i32 %ofs, i1 false, i1 false) @@ -75,7 +75,7 @@ define amdgpu_ps float @extract_elt1_buffer_load_v4f32(<4 x i32> inreg %rsrc, i32 %idx, i32 %ofs) #0 { ; CHECK-LABEL: @extract_elt1_buffer_load_v4f32( ; CHECK-NEXT: [[DATA:%.*]] = call <2 x float> @llvm.amdgcn.buffer.load.v2f32(<4 x i32> [[RSRC:%.*]], i32 [[IDX:%.*]], i32 [[OFS:%.*]], i1 false, i1 false) -; CHECK-NEXT: [[ELT1:%.*]] = extractelement <2 x float> [[DATA]], i32 1 +; CHECK-NEXT: [[ELT1:%.*]] = extractelement <2 x float> [[DATA]], i64 1 ; CHECK-NEXT: ret float [[ELT1]] ; %data = call <4 x float> @llvm.amdgcn.buffer.load.v4f32(<4 x i32> %rsrc, i32 %idx, i32 %ofs, i1 false, i1 false) @@ -86,7 +86,7 @@ define amdgpu_ps float @extract_elt2_buffer_load_v4f32(<4 x i32> inreg %rsrc, i32 %idx, i32 %ofs) #0 { ; CHECK-LABEL: @extract_elt2_buffer_load_v4f32( ; CHECK-NEXT: [[DATA:%.*]] = call <3 x float> @llvm.amdgcn.buffer.load.v3f32(<4 x i32> [[RSRC:%.*]], i32 [[IDX:%.*]], i32 [[OFS:%.*]], i1 false, i1 false) -; CHECK-NEXT: [[ELT1:%.*]] = extractelement <3 x float> [[DATA]], i32 2 +; CHECK-NEXT: [[ELT1:%.*]] = extractelement <3 x float> [[DATA]], i64 2 ; CHECK-NEXT: ret float [[ELT1]] ; %data = call <4 x float> @llvm.amdgcn.buffer.load.v4f32(<4 x i32> %rsrc, i32 %idx, i32 %ofs, i1 false, i1 false) @@ -97,7 +97,7 @@ define amdgpu_ps float @extract_elt3_buffer_load_v4f32(<4 x i32> inreg %rsrc, i32 %idx, i32 %ofs) #0 { ; CHECK-LABEL: @extract_elt3_buffer_load_v4f32( ; CHECK-NEXT: [[DATA:%.*]] = call <4 x float> @llvm.amdgcn.buffer.load.v4f32(<4 x i32> [[RSRC:%.*]], i32 [[IDX:%.*]], i32 [[OFS:%.*]], i1 false, i1 false) -; CHECK-NEXT: [[ELT1:%.*]] = extractelement <4 x float> [[DATA]], i32 3 +; CHECK-NEXT: [[ELT1:%.*]] = extractelement <4 x float> [[DATA]], i64 3 ; CHECK-NEXT: ret float [[ELT1]] ; %data = call <4 x float> @llvm.amdgcn.buffer.load.v4f32(<4 x i32> %rsrc, i32 %idx, i32 %ofs, i1 false, i1 false) @@ -172,8 +172,8 @@ define amdgpu_ps { float, float } @extract_elt0_elt1_buffer_load_v4f32_2(<4 x i32> inreg %rsrc, i32 %idx, i32 %ofs) #0 { ; CHECK-LABEL: @extract_elt0_elt1_buffer_load_v4f32_2( ; CHECK-NEXT: [[DATA:%.*]] = call <2 x float> @llvm.amdgcn.buffer.load.v2f32(<4 x i32> [[RSRC:%.*]], i32 [[IDX:%.*]], i32 [[OFS:%.*]], i1 false, i1 false) -; CHECK-NEXT: [[ELT0:%.*]] = extractelement <2 x float> [[DATA]], i32 0 -; CHECK-NEXT: [[ELT1:%.*]] = extractelement <2 x float> [[DATA]], i32 1 +; CHECK-NEXT: [[ELT0:%.*]] = extractelement <2 x float> [[DATA]], i64 0 +; CHECK-NEXT: [[ELT1:%.*]] = extractelement <2 x float> [[DATA]], i64 1 ; CHECK-NEXT: [[INS0:%.*]] = insertvalue { float, float } undef, float [[ELT0]], 0 ; CHECK-NEXT: [[INS1:%.*]] = insertvalue { float, float } [[INS0]], float [[ELT1]], 1 ; CHECK-NEXT: ret { float, float } [[INS1]] @@ -189,9 +189,9 @@ define amdgpu_ps { float, float, float } @extract_elt0_elt1_elt2_buffer_load_v4f32_2(<4 x i32> inreg %rsrc, i32 %idx, i32 %ofs) #0 { ; CHECK-LABEL: @extract_elt0_elt1_elt2_buffer_load_v4f32_2( ; CHECK-NEXT: [[DATA:%.*]] = call <3 x float> @llvm.amdgcn.buffer.load.v3f32(<4 x i32> [[RSRC:%.*]], i32 [[IDX:%.*]], i32 [[OFS:%.*]], i1 false, i1 false) -; CHECK-NEXT: [[ELT0:%.*]] = extractelement <3 x float> [[DATA]], i32 0 -; CHECK-NEXT: [[ELT1:%.*]] = extractelement <3 x float> [[DATA]], i32 1 -; CHECK-NEXT: [[ELT2:%.*]] = extractelement <3 x float> [[DATA]], i32 2 +; CHECK-NEXT: [[ELT0:%.*]] = extractelement <3 x float> [[DATA]], i64 0 +; CHECK-NEXT: [[ELT1:%.*]] = extractelement <3 x float> [[DATA]], i64 1 +; CHECK-NEXT: [[ELT2:%.*]] = extractelement <3 x float> [[DATA]], i64 2 ; CHECK-NEXT: [[INS0:%.*]] = insertvalue { float, float, float } undef, float [[ELT0]], 0 ; CHECK-NEXT: [[INS1:%.*]] = insertvalue { float, float, float } [[INS0]], float [[ELT1]], 1 ; CHECK-NEXT: [[INS2:%.*]] = insertvalue { float, float, float } [[INS1]], float [[ELT2]], 2 @@ -273,7 +273,7 @@ define amdgpu_ps float @extract_elt1_buffer_load_v3f32(<4 x i32> inreg %rsrc, i32 %idx, i32 %ofs) #0 { ; CHECK-LABEL: @extract_elt1_buffer_load_v3f32( ; CHECK-NEXT: [[DATA:%.*]] = call <2 x float> @llvm.amdgcn.buffer.load.v2f32(<4 x i32> [[RSRC:%.*]], i32 [[IDX:%.*]], i32 [[OFS:%.*]], i1 false, i1 false) -; CHECK-NEXT: [[ELT1:%.*]] = extractelement <2 x float> [[DATA]], i32 1 +; CHECK-NEXT: [[ELT1:%.*]] = extractelement <2 x float> [[DATA]], i64 1 ; CHECK-NEXT: ret float [[ELT1]] ; %data = call <3 x float> @llvm.amdgcn.buffer.load.v3f32(<4 x i32> %rsrc, i32 %idx, i32 %ofs, i1 false, i1 false) @@ -284,7 +284,7 @@ define amdgpu_ps float @extract_elt2_buffer_load_v3f32(<4 x i32> inreg %rsrc, i32 %idx, i32 %ofs) #0 { ; CHECK-LABEL: @extract_elt2_buffer_load_v3f32( ; CHECK-NEXT: [[DATA:%.*]] = call <3 x float> @llvm.amdgcn.buffer.load.v3f32(<4 x i32> [[RSRC:%.*]], i32 [[IDX:%.*]], i32 [[OFS:%.*]], i1 false, i1 false) -; CHECK-NEXT: [[ELT1:%.*]] = extractelement <3 x float> [[DATA]], i32 2 +; CHECK-NEXT: [[ELT1:%.*]] = extractelement <3 x float> [[DATA]], i64 2 ; CHECK-NEXT: ret float [[ELT1]] ; %data = call <3 x float> @llvm.amdgcn.buffer.load.v3f32(<4 x i32> %rsrc, i32 %idx, i32 %ofs, i1 false, i1 false) @@ -378,7 +378,7 @@ ; CHECK-NEXT: [[VAR:%.*]] = call <2 x float> @llvm.amdgcn.buffer.load.format.v2f32(<4 x i32> undef, i32 [[ARG:%.*]], i32 16, i1 false, i1 false) ; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <2 x float> [[VAR]], <2 x float> poison, <4 x i32> ; CHECK-NEXT: [[VAR1:%.*]] = bitcast <4 x float> [[TMP1]] to <2 x double> -; CHECK-NEXT: [[VAR2:%.*]] = extractelement <2 x double> [[VAR1]], i32 0 +; CHECK-NEXT: [[VAR2:%.*]] = extractelement <2 x double> [[VAR1]], i64 0 ; CHECK-NEXT: ret double [[VAR2]] ; %var = call <4 x float> @llvm.amdgcn.buffer.load.format.v4f32(<4 x i32> undef, i32 %arg, i32 16, i1 false, i1 false) #3 @@ -1265,7 +1265,7 @@ define amdgpu_ps float @extract_elt1_raw_buffer_load_format_v2f32(<4 x i32> inreg %rsrc, i32 %ofs, i32 %sofs) #0 { ; CHECK-LABEL: @extract_elt1_raw_buffer_load_format_v2f32( ; CHECK-NEXT: [[DATA:%.*]] = call <2 x float> @llvm.amdgcn.raw.buffer.load.format.v2f32(<4 x i32> [[RSRC:%.*]], i32 [[OFS:%.*]], i32 [[SOFS:%.*]], i32 0) -; CHECK-NEXT: [[ELT1:%.*]] = extractelement <2 x float> [[DATA]], i32 1 +; CHECK-NEXT: [[ELT1:%.*]] = extractelement <2 x float> [[DATA]], i64 1 ; CHECK-NEXT: ret float [[ELT1]] ; %data = call <2 x float> @llvm.amdgcn.raw.buffer.load.format.v2f32(<4 x i32> %rsrc, i32 %ofs, i32 %sofs, i32 0) @@ -1286,7 +1286,7 @@ define amdgpu_ps float @extract_elt1_raw_buffer_load_format_v4f32(<4 x i32> inreg %rsrc, i32 %ofs, i32 %sofs) #0 { ; CHECK-LABEL: @extract_elt1_raw_buffer_load_format_v4f32( ; CHECK-NEXT: [[DATA:%.*]] = call <2 x float> @llvm.amdgcn.raw.buffer.load.format.v2f32(<4 x i32> [[RSRC:%.*]], i32 [[OFS:%.*]], i32 [[SOFS:%.*]], i32 0) -; CHECK-NEXT: [[ELT1:%.*]] = extractelement <2 x float> [[DATA]], i32 1 +; CHECK-NEXT: [[ELT1:%.*]] = extractelement <2 x float> [[DATA]], i64 1 ; CHECK-NEXT: ret float [[ELT1]] ; %data = call <4 x float> @llvm.amdgcn.raw.buffer.load.format.v4f32(<4 x i32> %rsrc, i32 %ofs, i32 %sofs, i32 0) @@ -1297,7 +1297,7 @@ define amdgpu_ps float @extract_elt2_raw_buffer_load_format_v4f32(<4 x i32> inreg %rsrc, i32 %ofs, i32 %sofs) #0 { ; CHECK-LABEL: @extract_elt2_raw_buffer_load_format_v4f32( ; CHECK-NEXT: [[DATA:%.*]] = call <3 x float> @llvm.amdgcn.raw.buffer.load.format.v3f32(<4 x i32> [[RSRC:%.*]], i32 [[OFS:%.*]], i32 [[SOFS:%.*]], i32 0) -; CHECK-NEXT: [[ELT1:%.*]] = extractelement <3 x float> [[DATA]], i32 2 +; CHECK-NEXT: [[ELT1:%.*]] = extractelement <3 x float> [[DATA]], i64 2 ; CHECK-NEXT: ret float [[ELT1]] ; %data = call <4 x float> @llvm.amdgcn.raw.buffer.load.format.v4f32(<4 x i32> %rsrc, i32 %ofs, i32 %sofs, i32 0) @@ -1308,7 +1308,7 @@ define amdgpu_ps float @extract_elt3_raw_buffer_load_format_v4f32(<4 x i32> inreg %rsrc, i32 %ofs, i32 %sofs) #0 { ; CHECK-LABEL: @extract_elt3_raw_buffer_load_format_v4f32( ; CHECK-NEXT: [[DATA:%.*]] = call <4 x float> @llvm.amdgcn.raw.buffer.load.format.v4f32(<4 x i32> [[RSRC:%.*]], i32 [[OFS:%.*]], i32 [[SOFS:%.*]], i32 0) -; CHECK-NEXT: [[ELT1:%.*]] = extractelement <4 x float> [[DATA]], i32 3 +; CHECK-NEXT: [[ELT1:%.*]] = extractelement <4 x float> [[DATA]], i64 3 ; CHECK-NEXT: ret float [[ELT1]] ; %data = call <4 x float> @llvm.amdgcn.raw.buffer.load.format.v4f32(<4 x i32> %rsrc, i32 %ofs, i32 %sofs, i32 0) @@ -1393,7 +1393,7 @@ define amdgpu_ps float @extract_elt1_raw_buffer_load_format_v3f32(<4 x i32> inreg %rsrc, i32 %ofs, i32 %sofs) #0 { ; CHECK-LABEL: @extract_elt1_raw_buffer_load_format_v3f32( ; CHECK-NEXT: [[DATA:%.*]] = call <2 x float> @llvm.amdgcn.raw.buffer.load.format.v2f32(<4 x i32> [[RSRC:%.*]], i32 [[OFS:%.*]], i32 [[SOFS:%.*]], i32 0) -; CHECK-NEXT: [[ELT1:%.*]] = extractelement <2 x float> [[DATA]], i32 1 +; CHECK-NEXT: [[ELT1:%.*]] = extractelement <2 x float> [[DATA]], i64 1 ; CHECK-NEXT: ret float [[ELT1]] ; %data = call <3 x float> @llvm.amdgcn.raw.buffer.load.format.v3f32(<4 x i32> %rsrc, i32 %ofs, i32 %sofs, i32 0) @@ -1404,7 +1404,7 @@ define amdgpu_ps float @extract_elt2_raw_buffer_load_format_v3f32(<4 x i32> inreg %rsrc, i32 %ofs, i32 %sofs) #0 { ; CHECK-LABEL: @extract_elt2_raw_buffer_load_format_v3f32( ; CHECK-NEXT: [[DATA:%.*]] = call <3 x float> @llvm.amdgcn.raw.buffer.load.format.v3f32(<4 x i32> [[RSRC:%.*]], i32 [[OFS:%.*]], i32 [[SOFS:%.*]], i32 0) -; CHECK-NEXT: [[ELT1:%.*]] = extractelement <3 x float> [[DATA]], i32 2 +; CHECK-NEXT: [[ELT1:%.*]] = extractelement <3 x float> [[DATA]], i64 2 ; CHECK-NEXT: ret float [[ELT1]] ; %data = call <3 x float> @llvm.amdgcn.raw.buffer.load.format.v3f32(<4 x i32> %rsrc, i32 %ofs, i32 %sofs, i32 0) @@ -1925,7 +1925,7 @@ define amdgpu_ps float @extract_elt1_struct_buffer_load_format_v2f32(<4 x i32> inreg %rsrc, i32 %idx, i32 %ofs, i32 %sofs) #0 { ; CHECK-LABEL: @extract_elt1_struct_buffer_load_format_v2f32( ; CHECK-NEXT: [[DATA:%.*]] = call <2 x float> @llvm.amdgcn.struct.buffer.load.format.v2f32(<4 x i32> [[RSRC:%.*]], i32 [[IDX:%.*]], i32 [[OFS:%.*]], i32 [[SOFS:%.*]], i32 0) -; CHECK-NEXT: [[ELT1:%.*]] = extractelement <2 x float> [[DATA]], i32 1 +; CHECK-NEXT: [[ELT1:%.*]] = extractelement <2 x float> [[DATA]], i64 1 ; CHECK-NEXT: ret float [[ELT1]] ; %data = call <2 x float> @llvm.amdgcn.struct.buffer.load.format.v2f32(<4 x i32> %rsrc, i32 %idx, i32 %ofs, i32 %sofs, i32 0) @@ -1946,7 +1946,7 @@ define amdgpu_ps float @extract_elt1_struct_buffer_load_format_v4f32(<4 x i32> inreg %rsrc, i32 %idx, i32 %ofs, i32 %sofs) #0 { ; CHECK-LABEL: @extract_elt1_struct_buffer_load_format_v4f32( ; CHECK-NEXT: [[DATA:%.*]] = call <2 x float> @llvm.amdgcn.struct.buffer.load.format.v2f32(<4 x i32> [[RSRC:%.*]], i32 [[IDX:%.*]], i32 [[OFS:%.*]], i32 [[SOFS:%.*]], i32 0) -; CHECK-NEXT: [[ELT1:%.*]] = extractelement <2 x float> [[DATA]], i32 1 +; CHECK-NEXT: [[ELT1:%.*]] = extractelement <2 x float> [[DATA]], i64 1 ; CHECK-NEXT: ret float [[ELT1]] ; %data = call <4 x float> @llvm.amdgcn.struct.buffer.load.format.v4f32(<4 x i32> %rsrc, i32 %idx, i32 %ofs, i32 %sofs, i32 0) @@ -1957,7 +1957,7 @@ define amdgpu_ps float @extract_elt2_struct_buffer_load_format_v4f32(<4 x i32> inreg %rsrc, i32 %idx, i32 %ofs, i32 %sofs) #0 { ; CHECK-LABEL: @extract_elt2_struct_buffer_load_format_v4f32( ; CHECK-NEXT: [[DATA:%.*]] = call <3 x float> @llvm.amdgcn.struct.buffer.load.format.v3f32(<4 x i32> [[RSRC:%.*]], i32 [[IDX:%.*]], i32 [[OFS:%.*]], i32 [[SOFS:%.*]], i32 0) -; CHECK-NEXT: [[ELT1:%.*]] = extractelement <3 x float> [[DATA]], i32 2 +; CHECK-NEXT: [[ELT1:%.*]] = extractelement <3 x float> [[DATA]], i64 2 ; CHECK-NEXT: ret float [[ELT1]] ; %data = call <4 x float> @llvm.amdgcn.struct.buffer.load.format.v4f32(<4 x i32> %rsrc, i32 %idx, i32 %ofs, i32 %sofs, i32 0) @@ -1968,7 +1968,7 @@ define amdgpu_ps float @extract_elt3_struct_buffer_load_format_v4f32(<4 x i32> inreg %rsrc, i32 %idx, i32 %ofs, i32 %sofs) #0 { ; CHECK-LABEL: @extract_elt3_struct_buffer_load_format_v4f32( ; CHECK-NEXT: [[DATA:%.*]] = call <4 x float> @llvm.amdgcn.struct.buffer.load.format.v4f32(<4 x i32> [[RSRC:%.*]], i32 [[IDX:%.*]], i32 [[OFS:%.*]], i32 [[SOFS:%.*]], i32 0) -; CHECK-NEXT: [[ELT1:%.*]] = extractelement <4 x float> [[DATA]], i32 3 +; CHECK-NEXT: [[ELT1:%.*]] = extractelement <4 x float> [[DATA]], i64 3 ; CHECK-NEXT: ret float [[ELT1]] ; %data = call <4 x float> @llvm.amdgcn.struct.buffer.load.format.v4f32(<4 x i32> %rsrc, i32 %idx, i32 %ofs, i32 %sofs, i32 0) @@ -2053,7 +2053,7 @@ define amdgpu_ps float @extract_elt1_struct_buffer_load_format_v3f32(<4 x i32> inreg %rsrc, i32 %idx, i32 %ofs, i32 %sofs) #0 { ; CHECK-LABEL: @extract_elt1_struct_buffer_load_format_v3f32( ; CHECK-NEXT: [[DATA:%.*]] = call <2 x float> @llvm.amdgcn.struct.buffer.load.format.v2f32(<4 x i32> [[RSRC:%.*]], i32 [[IDX:%.*]], i32 [[OFS:%.*]], i32 [[SOFS:%.*]], i32 0) -; CHECK-NEXT: [[ELT1:%.*]] = extractelement <2 x float> [[DATA]], i32 1 +; CHECK-NEXT: [[ELT1:%.*]] = extractelement <2 x float> [[DATA]], i64 1 ; CHECK-NEXT: ret float [[ELT1]] ; %data = call <3 x float> @llvm.amdgcn.struct.buffer.load.format.v3f32(<4 x i32> %rsrc, i32 %idx, i32 %ofs, i32 %sofs, i32 0) @@ -2064,7 +2064,7 @@ define amdgpu_ps float @extract_elt2_struct_buffer_load_format_v3f32(<4 x i32> inreg %rsrc, i32 %idx, i32 %ofs, i32 %sofs) #0 { ; CHECK-LABEL: @extract_elt2_struct_buffer_load_format_v3f32( ; CHECK-NEXT: [[DATA:%.*]] = call <3 x float> @llvm.amdgcn.struct.buffer.load.format.v3f32(<4 x i32> [[RSRC:%.*]], i32 [[IDX:%.*]], i32 [[OFS:%.*]], i32 [[SOFS:%.*]], i32 0) -; CHECK-NEXT: [[ELT1:%.*]] = extractelement <3 x float> [[DATA]], i32 2 +; CHECK-NEXT: [[ELT1:%.*]] = extractelement <3 x float> [[DATA]], i64 2 ; CHECK-NEXT: ret float [[ELT1]] ; %data = call <3 x float> @llvm.amdgcn.struct.buffer.load.format.v3f32(<4 x i32> %rsrc, i32 %idx, i32 %ofs, i32 %sofs, i32 0) @@ -2167,7 +2167,7 @@ define amdgpu_ps float @extract_elt1_raw_tbuffer_load_v2f32(<4 x i32> inreg %rsrc, i32 %arg0, i32 inreg %arg1) #0 { ; CHECK-LABEL: @extract_elt1_raw_tbuffer_load_v2f32( ; CHECK-NEXT: [[DATA:%.*]] = call <2 x float> @llvm.amdgcn.raw.tbuffer.load.v2f32(<4 x i32> [[RSRC:%.*]], i32 [[ARG0:%.*]], i32 [[ARG1:%.*]], i32 78, i32 0) -; CHECK-NEXT: [[ELT1:%.*]] = extractelement <2 x float> [[DATA]], i32 1 +; CHECK-NEXT: [[ELT1:%.*]] = extractelement <2 x float> [[DATA]], i64 1 ; CHECK-NEXT: ret float [[ELT1]] ; %data = call <2 x float> @llvm.amdgcn.raw.tbuffer.load.v2f32(<4 x i32> %rsrc, i32 %arg0, i32 %arg1, i32 78, i32 0) @@ -2188,7 +2188,7 @@ define amdgpu_ps float @extract_elt1_raw_tbuffer_load_v4f32(<4 x i32> inreg %rsrc, i32 %arg0, i32 inreg %arg1) #0 { ; CHECK-LABEL: @extract_elt1_raw_tbuffer_load_v4f32( ; CHECK-NEXT: [[DATA:%.*]] = call <2 x float> @llvm.amdgcn.raw.tbuffer.load.v2f32(<4 x i32> [[RSRC:%.*]], i32 [[ARG0:%.*]], i32 [[ARG1:%.*]], i32 78, i32 0) -; CHECK-NEXT: [[ELT1:%.*]] = extractelement <2 x float> [[DATA]], i32 1 +; CHECK-NEXT: [[ELT1:%.*]] = extractelement <2 x float> [[DATA]], i64 1 ; CHECK-NEXT: ret float [[ELT1]] ; %data = call <4 x float> @llvm.amdgcn.raw.tbuffer.load.v4f32(<4 x i32> %rsrc, i32 %arg0, i32 %arg1, i32 78, i32 0) @@ -2199,7 +2199,7 @@ define amdgpu_ps float @extract_elt2_raw_tbuffer_load_v4f32(<4 x i32> inreg %rsrc, i32 %arg0, i32 inreg %arg1) #0 { ; CHECK-LABEL: @extract_elt2_raw_tbuffer_load_v4f32( ; CHECK-NEXT: [[DATA:%.*]] = call <3 x float> @llvm.amdgcn.raw.tbuffer.load.v3f32(<4 x i32> [[RSRC:%.*]], i32 [[ARG0:%.*]], i32 [[ARG1:%.*]], i32 78, i32 0) -; CHECK-NEXT: [[ELT1:%.*]] = extractelement <3 x float> [[DATA]], i32 2 +; CHECK-NEXT: [[ELT1:%.*]] = extractelement <3 x float> [[DATA]], i64 2 ; CHECK-NEXT: ret float [[ELT1]] ; %data = call <4 x float> @llvm.amdgcn.raw.tbuffer.load.v4f32(<4 x i32> %rsrc, i32 %arg0, i32 %arg1, i32 78, i32 0) @@ -2210,7 +2210,7 @@ define amdgpu_ps float @extract_elt3_raw_tbuffer_load_v4f32(<4 x i32> inreg %rsrc, i32 %arg0, i32 inreg %arg1) #0 { ; CHECK-LABEL: @extract_elt3_raw_tbuffer_load_v4f32( ; CHECK-NEXT: [[DATA:%.*]] = call <4 x float> @llvm.amdgcn.raw.tbuffer.load.v4f32(<4 x i32> [[RSRC:%.*]], i32 [[ARG0:%.*]], i32 [[ARG1:%.*]], i32 78, i32 0) -; CHECK-NEXT: [[ELT1:%.*]] = extractelement <4 x float> [[DATA]], i32 3 +; CHECK-NEXT: [[ELT1:%.*]] = extractelement <4 x float> [[DATA]], i64 3 ; CHECK-NEXT: ret float [[ELT1]] ; %data = call <4 x float> @llvm.amdgcn.raw.tbuffer.load.v4f32(<4 x i32> %rsrc, i32 %arg0, i32 %arg1, i32 78, i32 0) @@ -2295,7 +2295,7 @@ define amdgpu_ps float @extract_elt1_raw_tbuffer_load_v3f32(<4 x i32> inreg %rsrc, i32 %arg0, i32 inreg %arg1) #0 { ; CHECK-LABEL: @extract_elt1_raw_tbuffer_load_v3f32( ; CHECK-NEXT: [[DATA:%.*]] = call <2 x float> @llvm.amdgcn.raw.tbuffer.load.v2f32(<4 x i32> [[RSRC:%.*]], i32 [[ARG0:%.*]], i32 [[ARG1:%.*]], i32 78, i32 0) -; CHECK-NEXT: [[ELT1:%.*]] = extractelement <2 x float> [[DATA]], i32 1 +; CHECK-NEXT: [[ELT1:%.*]] = extractelement <2 x float> [[DATA]], i64 1 ; CHECK-NEXT: ret float [[ELT1]] ; %data = call <3 x float> @llvm.amdgcn.raw.tbuffer.load.v3f32(<4 x i32> %rsrc, i32 %arg0, i32 %arg1, i32 78, i32 0) @@ -2306,7 +2306,7 @@ define amdgpu_ps float @extract_elt2_raw_tbuffer_load_v3f32(<4 x i32> inreg %rsrc, i32 %arg0, i32 inreg %arg1) #0 { ; CHECK-LABEL: @extract_elt2_raw_tbuffer_load_v3f32( ; CHECK-NEXT: [[DATA:%.*]] = call <3 x float> @llvm.amdgcn.raw.tbuffer.load.v3f32(<4 x i32> [[RSRC:%.*]], i32 [[ARG0:%.*]], i32 [[ARG1:%.*]], i32 78, i32 0) -; CHECK-NEXT: [[ELT1:%.*]] = extractelement <3 x float> [[DATA]], i32 2 +; CHECK-NEXT: [[ELT1:%.*]] = extractelement <3 x float> [[DATA]], i64 2 ; CHECK-NEXT: ret float [[ELT1]] ; %data = call <3 x float> @llvm.amdgcn.raw.tbuffer.load.v3f32(<4 x i32> %rsrc, i32 %arg0, i32 %arg1, i32 78, i32 0) @@ -2367,7 +2367,7 @@ define amdgpu_ps half @extract_elt3_raw_tbuffer_load_v4f16(<4 x i32> inreg %rsrc, i32 %arg0, i32 inreg %arg1) #0 { ; CHECK-LABEL: @extract_elt3_raw_tbuffer_load_v4f16( ; CHECK-NEXT: [[DATA:%.*]] = call <4 x half> @llvm.amdgcn.raw.tbuffer.load.v4f16(<4 x i32> [[RSRC:%.*]], i32 [[ARG0:%.*]], i32 [[ARG1:%.*]], i32 78, i32 0) -; CHECK-NEXT: [[ELT1:%.*]] = extractelement <4 x half> [[DATA]], i32 3 +; CHECK-NEXT: [[ELT1:%.*]] = extractelement <4 x half> [[DATA]], i64 3 ; CHECK-NEXT: ret half [[ELT1]] ; %data = call <4 x half> @llvm.amdgcn.raw.tbuffer.load.v4f16(<4 x i32> %rsrc, i32 %arg0, i32 %arg1, i32 78, i32 0) @@ -2378,7 +2378,7 @@ define amdgpu_ps half @extract_elt2_raw_tbuffer_load_v4f16(<4 x i32> inreg %rsrc, i32 %arg0, i32 inreg %arg1) #0 { ; CHECK-LABEL: @extract_elt2_raw_tbuffer_load_v4f16( ; CHECK-NEXT: [[DATA:%.*]] = call <3 x half> @llvm.amdgcn.raw.tbuffer.load.v3f16(<4 x i32> [[RSRC:%.*]], i32 [[ARG0:%.*]], i32 [[ARG1:%.*]], i32 78, i32 0) -; CHECK-NEXT: [[ELT1:%.*]] = extractelement <3 x half> [[DATA]], i32 2 +; CHECK-NEXT: [[ELT1:%.*]] = extractelement <3 x half> [[DATA]], i64 2 ; CHECK-NEXT: ret half [[ELT1]] ; %data = call <4 x half> @llvm.amdgcn.raw.tbuffer.load.v4f16(<4 x i32> %rsrc, i32 %arg0, i32 %arg1, i32 78, i32 0) @@ -2389,7 +2389,7 @@ define amdgpu_ps half @extract_elt1_raw_tbuffer_load_v4f16(<4 x i32> inreg %rsrc, i32 %arg0, i32 inreg %arg1) #0 { ; CHECK-LABEL: @extract_elt1_raw_tbuffer_load_v4f16( ; CHECK-NEXT: [[DATA:%.*]] = call <2 x half> @llvm.amdgcn.raw.tbuffer.load.v2f16(<4 x i32> [[RSRC:%.*]], i32 [[ARG0:%.*]], i32 [[ARG1:%.*]], i32 78, i32 0) -; CHECK-NEXT: [[ELT1:%.*]] = extractelement <2 x half> [[DATA]], i32 1 +; CHECK-NEXT: [[ELT1:%.*]] = extractelement <2 x half> [[DATA]], i64 1 ; CHECK-NEXT: ret half [[ELT1]] ; %data = call <4 x half> @llvm.amdgcn.raw.tbuffer.load.v4f16(<4 x i32> %rsrc, i32 %arg0, i32 %arg1, i32 78, i32 0) @@ -2456,7 +2456,7 @@ define amdgpu_ps float @extract_elt1_struct_tbuffer_load_v2f32(<4 x i32> inreg %rsrc, i32 %arg0, i32 %arg1, i32 inreg %arg2) #0 { ; CHECK-LABEL: @extract_elt1_struct_tbuffer_load_v2f32( ; CHECK-NEXT: [[DATA:%.*]] = call <2 x float> @llvm.amdgcn.struct.tbuffer.load.v2f32(<4 x i32> [[RSRC:%.*]], i32 [[ARG0:%.*]], i32 [[ARG1:%.*]], i32 [[ARG2:%.*]], i32 78, i32 0) -; CHECK-NEXT: [[ELT1:%.*]] = extractelement <2 x float> [[DATA]], i32 1 +; CHECK-NEXT: [[ELT1:%.*]] = extractelement <2 x float> [[DATA]], i64 1 ; CHECK-NEXT: ret float [[ELT1]] ; %data = call <2 x float> @llvm.amdgcn.struct.tbuffer.load.v2f32(<4 x i32> %rsrc, i32 %arg0, i32 %arg1, i32 %arg2, i32 78, i32 0) @@ -2477,7 +2477,7 @@ define amdgpu_ps float @extract_elt1_struct_tbuffer_load_v4f32(<4 x i32> inreg %rsrc, i32 %arg0, i32 %arg1, i32 inreg %arg2) #0 { ; CHECK-LABEL: @extract_elt1_struct_tbuffer_load_v4f32( ; CHECK-NEXT: [[DATA:%.*]] = call <2 x float> @llvm.amdgcn.struct.tbuffer.load.v2f32(<4 x i32> [[RSRC:%.*]], i32 [[ARG0:%.*]], i32 [[ARG1:%.*]], i32 [[ARG2:%.*]], i32 78, i32 0) -; CHECK-NEXT: [[ELT1:%.*]] = extractelement <2 x float> [[DATA]], i32 1 +; CHECK-NEXT: [[ELT1:%.*]] = extractelement <2 x float> [[DATA]], i64 1 ; CHECK-NEXT: ret float [[ELT1]] ; %data = call <4 x float> @llvm.amdgcn.struct.tbuffer.load.v4f32(<4 x i32> %rsrc, i32 %arg0, i32 %arg1, i32 %arg2, i32 78, i32 0) @@ -2488,7 +2488,7 @@ define amdgpu_ps float @extract_elt2_struct_tbuffer_load_v4f32(<4 x i32> inreg %rsrc, i32 %arg0, i32 %arg1, i32 inreg %arg2) #0 { ; CHECK-LABEL: @extract_elt2_struct_tbuffer_load_v4f32( ; CHECK-NEXT: [[DATA:%.*]] = call <3 x float> @llvm.amdgcn.struct.tbuffer.load.v3f32(<4 x i32> [[RSRC:%.*]], i32 [[ARG0:%.*]], i32 [[ARG1:%.*]], i32 [[ARG2:%.*]], i32 78, i32 0) -; CHECK-NEXT: [[ELT1:%.*]] = extractelement <3 x float> [[DATA]], i32 2 +; CHECK-NEXT: [[ELT1:%.*]] = extractelement <3 x float> [[DATA]], i64 2 ; CHECK-NEXT: ret float [[ELT1]] ; %data = call <4 x float> @llvm.amdgcn.struct.tbuffer.load.v4f32(<4 x i32> %rsrc, i32 %arg0, i32 %arg1, i32 %arg2, i32 78, i32 0) @@ -2499,7 +2499,7 @@ define amdgpu_ps float @extract_elt3_struct_tbuffer_load_v4f32(<4 x i32> inreg %rsrc, i32 %arg0, i32 %arg1, i32 inreg %arg2) #0 { ; CHECK-LABEL: @extract_elt3_struct_tbuffer_load_v4f32( ; CHECK-NEXT: [[DATA:%.*]] = call <4 x float> @llvm.amdgcn.struct.tbuffer.load.v4f32(<4 x i32> [[RSRC:%.*]], i32 [[ARG0:%.*]], i32 [[ARG1:%.*]], i32 [[ARG2:%.*]], i32 78, i32 0) -; CHECK-NEXT: [[ELT1:%.*]] = extractelement <4 x float> [[DATA]], i32 3 +; CHECK-NEXT: [[ELT1:%.*]] = extractelement <4 x float> [[DATA]], i64 3 ; CHECK-NEXT: ret float [[ELT1]] ; %data = call <4 x float> @llvm.amdgcn.struct.tbuffer.load.v4f32(<4 x i32> %rsrc, i32 %arg0, i32 %arg1, i32 %arg2, i32 78, i32 0) @@ -2584,7 +2584,7 @@ define amdgpu_ps float @extract_elt1_struct_tbuffer_load_v3f32(<4 x i32> inreg %rsrc, i32 %arg0, i32 %arg1, i32 inreg %arg2) #0 { ; CHECK-LABEL: @extract_elt1_struct_tbuffer_load_v3f32( ; CHECK-NEXT: [[DATA:%.*]] = call <2 x float> @llvm.amdgcn.struct.tbuffer.load.v2f32(<4 x i32> [[RSRC:%.*]], i32 [[ARG0:%.*]], i32 [[ARG1:%.*]], i32 [[ARG2:%.*]], i32 78, i32 0) -; CHECK-NEXT: [[ELT1:%.*]] = extractelement <2 x float> [[DATA]], i32 1 +; CHECK-NEXT: [[ELT1:%.*]] = extractelement <2 x float> [[DATA]], i64 1 ; CHECK-NEXT: ret float [[ELT1]] ; %data = call <3 x float> @llvm.amdgcn.struct.tbuffer.load.v3f32(<4 x i32> %rsrc, i32 %arg0, i32 %arg1, i32 %arg2, i32 78, i32 0) @@ -2595,7 +2595,7 @@ define amdgpu_ps float @extract_elt2_struct_tbuffer_load_v3f32(<4 x i32> inreg %rsrc, i32 %arg0, i32 %arg1, i32 inreg %arg2) #0 { ; CHECK-LABEL: @extract_elt2_struct_tbuffer_load_v3f32( ; CHECK-NEXT: [[DATA:%.*]] = call <3 x float> @llvm.amdgcn.struct.tbuffer.load.v3f32(<4 x i32> [[RSRC:%.*]], i32 [[ARG0:%.*]], i32 [[ARG1:%.*]], i32 [[ARG2:%.*]], i32 78, i32 0) -; CHECK-NEXT: [[ELT1:%.*]] = extractelement <3 x float> [[DATA]], i32 2 +; CHECK-NEXT: [[ELT1:%.*]] = extractelement <3 x float> [[DATA]], i64 2 ; CHECK-NEXT: ret float [[ELT1]] ; %data = call <3 x float> @llvm.amdgcn.struct.tbuffer.load.v3f32(<4 x i32> %rsrc, i32 %arg0, i32 %arg1, i32 %arg2, i32 78, i32 0) @@ -2697,7 +2697,7 @@ define amdgpu_ps float @extract_elt1_tbuffer_load_v2f32(<4 x i32> inreg %rsrc, i32 %arg0, i32 %arg1) #0 { ; CHECK-LABEL: @extract_elt1_tbuffer_load_v2f32( ; CHECK-NEXT: [[DATA:%.*]] = call <2 x float> @llvm.amdgcn.tbuffer.load.v2f32(<4 x i32> [[RSRC:%.*]], i32 [[ARG0:%.*]], i32 [[ARG1:%.*]], i32 0, i32 0, i32 14, i32 4, i1 false, i1 false) -; CHECK-NEXT: [[ELT1:%.*]] = extractelement <2 x float> [[DATA]], i32 1 +; CHECK-NEXT: [[ELT1:%.*]] = extractelement <2 x float> [[DATA]], i64 1 ; CHECK-NEXT: ret float [[ELT1]] ; %data = call <2 x float> @llvm.amdgcn.tbuffer.load.v2f32(<4 x i32> %rsrc, i32 %arg0, i32 %arg1, i32 0, i32 0, i32 14, i32 4, i1 false, i1 false) @@ -2718,7 +2718,7 @@ define amdgpu_ps float @extract_elt1_tbuffer_load_v4f32(<4 x i32> inreg %rsrc, i32 %arg0, i32 %arg1) #0 { ; CHECK-LABEL: @extract_elt1_tbuffer_load_v4f32( ; CHECK-NEXT: [[DATA:%.*]] = call <2 x float> @llvm.amdgcn.tbuffer.load.v2f32(<4 x i32> [[RSRC:%.*]], i32 [[ARG0:%.*]], i32 [[ARG1:%.*]], i32 0, i32 0, i32 14, i32 4, i1 false, i1 false) -; CHECK-NEXT: [[ELT1:%.*]] = extractelement <2 x float> [[DATA]], i32 1 +; CHECK-NEXT: [[ELT1:%.*]] = extractelement <2 x float> [[DATA]], i64 1 ; CHECK-NEXT: ret float [[ELT1]] ; %data = call <4 x float> @llvm.amdgcn.tbuffer.load.v4f32(<4 x i32> %rsrc, i32 %arg0, i32 %arg1, i32 0, i32 0, i32 14, i32 4, i1 false, i1 false) @@ -2729,7 +2729,7 @@ define amdgpu_ps float @extract_elt2_tbuffer_load_v4f32(<4 x i32> inreg %rsrc, i32 %arg0, i32 %arg1) #0 { ; CHECK-LABEL: @extract_elt2_tbuffer_load_v4f32( ; CHECK-NEXT: [[DATA:%.*]] = call <3 x float> @llvm.amdgcn.tbuffer.load.v3f32(<4 x i32> [[RSRC:%.*]], i32 [[ARG0:%.*]], i32 [[ARG1:%.*]], i32 0, i32 0, i32 14, i32 4, i1 false, i1 false) -; CHECK-NEXT: [[ELT1:%.*]] = extractelement <3 x float> [[DATA]], i32 2 +; CHECK-NEXT: [[ELT1:%.*]] = extractelement <3 x float> [[DATA]], i64 2 ; CHECK-NEXT: ret float [[ELT1]] ; %data = call <4 x float> @llvm.amdgcn.tbuffer.load.v4f32(<4 x i32> %rsrc, i32 %arg0, i32 %arg1, i32 0, i32 0, i32 14, i32 4, i1 false, i1 false) @@ -2740,7 +2740,7 @@ define amdgpu_ps float @extract_elt3_tbuffer_load_v4f32(<4 x i32> inreg %rsrc, i32 %arg0, i32 %arg1) #0 { ; CHECK-LABEL: @extract_elt3_tbuffer_load_v4f32( ; CHECK-NEXT: [[DATA:%.*]] = call <4 x float> @llvm.amdgcn.tbuffer.load.v4f32(<4 x i32> [[RSRC:%.*]], i32 [[ARG0:%.*]], i32 [[ARG1:%.*]], i32 0, i32 0, i32 14, i32 4, i1 false, i1 false) -; CHECK-NEXT: [[ELT1:%.*]] = extractelement <4 x float> [[DATA]], i32 3 +; CHECK-NEXT: [[ELT1:%.*]] = extractelement <4 x float> [[DATA]], i64 3 ; CHECK-NEXT: ret float [[ELT1]] ; %data = call <4 x float> @llvm.amdgcn.tbuffer.load.v4f32(<4 x i32> %rsrc, i32 %arg0, i32 %arg1, i32 0, i32 0, i32 14, i32 4, i1 false, i1 false) @@ -2825,7 +2825,7 @@ define amdgpu_ps float @extract_elt1_tbuffer_load_v3f32(<4 x i32> inreg %rsrc, i32 %arg0, i32 %arg1) #0 { ; CHECK-LABEL: @extract_elt1_tbuffer_load_v3f32( ; CHECK-NEXT: [[DATA:%.*]] = call <2 x float> @llvm.amdgcn.tbuffer.load.v2f32(<4 x i32> [[RSRC:%.*]], i32 [[ARG0:%.*]], i32 [[ARG1:%.*]], i32 0, i32 0, i32 14, i32 4, i1 false, i1 false) -; CHECK-NEXT: [[ELT1:%.*]] = extractelement <2 x float> [[DATA]], i32 1 +; CHECK-NEXT: [[ELT1:%.*]] = extractelement <2 x float> [[DATA]], i64 1 ; CHECK-NEXT: ret float [[ELT1]] ; %data = call <3 x float> @llvm.amdgcn.tbuffer.load.v3f32(<4 x i32> %rsrc, i32 %arg0, i32 %arg1, i32 0, i32 0, i32 14, i32 4, i1 false, i1 false) @@ -2836,7 +2836,7 @@ define amdgpu_ps float @extract_elt2_tbuffer_load_v3f32(<4 x i32> inreg %rsrc, i32 %arg0, i32 %arg1) #0 { ; CHECK-LABEL: @extract_elt2_tbuffer_load_v3f32( ; CHECK-NEXT: [[DATA:%.*]] = call <3 x float> @llvm.amdgcn.tbuffer.load.v3f32(<4 x i32> [[RSRC:%.*]], i32 [[ARG0:%.*]], i32 [[ARG1:%.*]], i32 0, i32 0, i32 14, i32 4, i1 false, i1 false) -; CHECK-NEXT: [[ELT1:%.*]] = extractelement <3 x float> [[DATA]], i32 2 +; CHECK-NEXT: [[ELT1:%.*]] = extractelement <3 x float> [[DATA]], i64 2 ; CHECK-NEXT: ret float [[ELT1]] ; %data = call <3 x float> @llvm.amdgcn.tbuffer.load.v3f32(<4 x i32> %rsrc, i32 %arg0, i32 %arg1, i32 0, i32 0, i32 14, i32 4, i1 false, i1 false) @@ -2914,7 +2914,7 @@ ; CHECK-LABEL: @extract_elt0_image_sample_1d_v4f32_f32_tfe( ; CHECK-NEXT: [[DATA:%.*]] = call { <4 x float>, i32 } @llvm.amdgcn.image.sample.1d.sl_v4f32i32s.f32(i32 15, float [[VADDR:%.*]], <8 x i32> [[SAMPLER:%.*]], <4 x i32> [[RSRC:%.*]], i1 false, i32 1, i32 0) ; CHECK-NEXT: [[DATA_VEC:%.*]] = extractvalue { <4 x float>, i32 } [[DATA]], 0 -; CHECK-NEXT: [[ELT0:%.*]] = extractelement <4 x float> [[DATA_VEC]], i32 0 +; CHECK-NEXT: [[ELT0:%.*]] = extractelement <4 x float> [[DATA_VEC]], i64 0 ; CHECK-NEXT: ret float [[ELT0]] ; %data = call {<4 x float>,i32} @llvm.amdgcn.image.sample.1d.sl_v4f32i32s.f32(i32 15, float %vaddr, <8 x i32> %sampler, <4 x i32> %rsrc, i1 false, i32 1, i32 0) @@ -2928,7 +2928,7 @@ ; CHECK-LABEL: @extract_elt0_image_sample_1d_v4f32_f32_lwe( ; CHECK-NEXT: [[DATA:%.*]] = call { <4 x float>, i32 } @llvm.amdgcn.image.sample.1d.sl_v4f32i32s.f32(i32 15, float [[VADDR:%.*]], <8 x i32> [[SAMPLER:%.*]], <4 x i32> [[RSRC:%.*]], i1 false, i32 2, i32 0) ; CHECK-NEXT: [[DATA_VEC:%.*]] = extractvalue { <4 x float>, i32 } [[DATA]], 0 -; CHECK-NEXT: [[ELT0:%.*]] = extractelement <4 x float> [[DATA_VEC]], i32 0 +; CHECK-NEXT: [[ELT0:%.*]] = extractelement <4 x float> [[DATA_VEC]], i64 0 ; CHECK-NEXT: ret float [[ELT0]] ; %data = call {<4 x float>,i32} @llvm.amdgcn.image.sample.1d.sl_v4f32i32s.f32(i32 15, float %vaddr, <8 x i32> %sampler, <4 x i32> %rsrc, i1 false, i32 2, i32 0) @@ -3029,7 +3029,7 @@ define amdgpu_ps <2 x float> @extract_elt0_elt1_dmask_0001_image_sample_1d_v4f32_f32(float %s, <8 x i32> inreg %sampler, <4 x i32> inreg %rsrc) #0 { ; CHECK-LABEL: @extract_elt0_elt1_dmask_0001_image_sample_1d_v4f32_f32( ; CHECK-NEXT: [[DATA:%.*]] = call float @llvm.amdgcn.image.sample.1d.f32.f32(i32 1, float [[S:%.*]], <8 x i32> [[SAMPLER:%.*]], <4 x i32> [[RSRC:%.*]], i1 false, i32 0, i32 0) -; CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x float> undef, float [[DATA]], i32 0 +; CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x float> undef, float [[DATA]], i64 0 ; CHECK-NEXT: ret <2 x float> [[TMP1]] ; %data = call <4 x float> @llvm.amdgcn.image.sample.1d.v4f32.f32(i32 1, float %s, <8 x i32> %sampler, <4 x i32> %rsrc, i1 false, i32 0, i32 0) @@ -3070,7 +3070,7 @@ define amdgpu_ps <3 x float> @extract_elt0_elt1_elt2_dmask_0001_image_sample_1d_v4f32_f32(float %s, <8 x i32> inreg %sampler, <4 x i32> inreg %rsrc) #0 { ; CHECK-LABEL: @extract_elt0_elt1_elt2_dmask_0001_image_sample_1d_v4f32_f32( ; CHECK-NEXT: [[DATA:%.*]] = call float @llvm.amdgcn.image.sample.1d.f32.f32(i32 1, float [[S:%.*]], <8 x i32> [[SAMPLER:%.*]], <4 x i32> [[RSRC:%.*]], i1 false, i32 0, i32 0) -; CHECK-NEXT: [[TMP1:%.*]] = insertelement <3 x float> undef, float [[DATA]], i32 0 +; CHECK-NEXT: [[TMP1:%.*]] = insertelement <3 x float> undef, float [[DATA]], i64 0 ; CHECK-NEXT: ret <3 x float> [[TMP1]] ; %data = call <4 x float> @llvm.amdgcn.image.sample.1d.v4f32.f32(i32 1, float %s, <8 x i32> %sampler, <4 x i32> %rsrc, i1 false, i32 0, i32 0) @@ -3822,7 +3822,7 @@ define amdgpu_ps float @extract_elt0_image_gather4_2d_v4f32_f32(float %s, float %t, <8 x i32> inreg %sampler, <4 x i32> inreg %rsrc) #0 { ; CHECK-LABEL: @extract_elt0_image_gather4_2d_v4f32_f32( ; CHECK-NEXT: [[DATA:%.*]] = call <4 x float> @llvm.amdgcn.image.gather4.2d.v4f32.f32(i32 1, float [[S:%.*]], float [[T:%.*]], <8 x i32> [[SAMPLER:%.*]], <4 x i32> [[RSRC:%.*]], i1 false, i32 0, i32 0) -; CHECK-NEXT: [[ELT0:%.*]] = extractelement <4 x float> [[DATA]], i32 0 +; CHECK-NEXT: [[ELT0:%.*]] = extractelement <4 x float> [[DATA]], i64 0 ; CHECK-NEXT: ret float [[ELT0]] ; %data = call <4 x float> @llvm.amdgcn.image.gather4.2d.v4f32.f32(i32 1, float %s, float %t, <8 x i32> %sampler, <4 x i32> %rsrc, i1 false, i32 0, i32 0) @@ -3839,7 +3839,7 @@ define amdgpu_ps float @extract_elt0_image_gather4_cl_2d_v4f32_f32(float %s, float %t, float %clamp, <8 x i32> inreg %sampler, <4 x i32> inreg %rsrc) #0 { ; CHECK-LABEL: @extract_elt0_image_gather4_cl_2d_v4f32_f32( ; CHECK-NEXT: [[DATA:%.*]] = call <4 x float> @llvm.amdgcn.image.gather4.cl.2d.v4f32.f32(i32 2, float [[S:%.*]], float [[T:%.*]], float [[CLAMP:%.*]], <8 x i32> [[SAMPLER:%.*]], <4 x i32> [[RSRC:%.*]], i1 false, i32 0, i32 0) -; CHECK-NEXT: [[ELT0:%.*]] = extractelement <4 x float> [[DATA]], i32 0 +; CHECK-NEXT: [[ELT0:%.*]] = extractelement <4 x float> [[DATA]], i64 0 ; CHECK-NEXT: ret float [[ELT0]] ; %data = call <4 x float> @llvm.amdgcn.image.gather4.cl.2d.v4f32.f32(i32 2, float %s, float %t, float %clamp, <8 x i32> %sampler, <4 x i32> %rsrc, i1 false, i32 0, i32 0) @@ -3856,7 +3856,7 @@ define amdgpu_ps float @extract_elt0_image_gather4_l_2d_v4f32_f32(float %s, float %t, float %lod, <8 x i32> inreg %sampler, <4 x i32> inreg %rsrc) #0 { ; CHECK-LABEL: @extract_elt0_image_gather4_l_2d_v4f32_f32( ; CHECK-NEXT: [[DATA:%.*]] = call <4 x float> @llvm.amdgcn.image.gather4.l.2d.v4f32.f32(i32 4, float [[S:%.*]], float [[T:%.*]], float [[LOD:%.*]], <8 x i32> [[SAMPLER:%.*]], <4 x i32> [[RSRC:%.*]], i1 false, i32 0, i32 0) -; CHECK-NEXT: [[ELT0:%.*]] = extractelement <4 x float> [[DATA]], i32 0 +; CHECK-NEXT: [[ELT0:%.*]] = extractelement <4 x float> [[DATA]], i64 0 ; CHECK-NEXT: ret float [[ELT0]] ; %data = call <4 x float> @llvm.amdgcn.image.gather4.l.2d.v4f32.f32(i32 4, float %s, float %t, float %lod, <8 x i32> %sampler, <4 x i32> %rsrc, i1 false, i32 0, i32 0) @@ -3873,7 +3873,7 @@ define amdgpu_ps float @extract_elt0_image_gather4_b_2darray_v4f32_f32_f32(float %bias, float %s, float %t, float %slice, <8 x i32> inreg %sampler, <4 x i32> inreg %rsrc) #0 { ; CHECK-LABEL: @extract_elt0_image_gather4_b_2darray_v4f32_f32_f32( ; CHECK-NEXT: [[DATA:%.*]] = call <4 x float> @llvm.amdgcn.image.gather4.b.2darray.v4f32.f32.f32(i32 8, float [[BIAS:%.*]], float [[S:%.*]], float [[T:%.*]], float [[SLICE:%.*]], <8 x i32> [[SAMPLER:%.*]], <4 x i32> [[RSRC:%.*]], i1 false, i32 0, i32 0) -; CHECK-NEXT: [[ELT0:%.*]] = extractelement <4 x float> [[DATA]], i32 0 +; CHECK-NEXT: [[ELT0:%.*]] = extractelement <4 x float> [[DATA]], i64 0 ; CHECK-NEXT: ret float [[ELT0]] ; %data = call <4 x float> @llvm.amdgcn.image.gather4.b.2darray.v4f32.f32.f32(i32 8, float %bias, float %s, float %t, float %slice, <8 x i32> %sampler, <4 x i32> %rsrc, i1 false, i32 0, i32 0) @@ -3890,7 +3890,7 @@ define amdgpu_ps float @extract_elt0_image_gather4_b_cl_cube_v4f32_f32_f32(float %bias, float %s, float %t, float %face, float %clamp, <8 x i32> inreg %sampler, <4 x i32> inreg %rsrc) #0 { ; CHECK-LABEL: @extract_elt0_image_gather4_b_cl_cube_v4f32_f32_f32( ; CHECK-NEXT: [[DATA:%.*]] = call <4 x float> @llvm.amdgcn.image.gather4.b.cl.cube.v4f32.f32.f32(i32 1, float [[BIAS:%.*]], float [[S:%.*]], float [[T:%.*]], float [[FACE:%.*]], float [[CLAMP:%.*]], <8 x i32> [[SAMPLER:%.*]], <4 x i32> [[RSRC:%.*]], i1 false, i32 0, i32 0) -; CHECK-NEXT: [[ELT0:%.*]] = extractelement <4 x float> [[DATA]], i32 0 +; CHECK-NEXT: [[ELT0:%.*]] = extractelement <4 x float> [[DATA]], i64 0 ; CHECK-NEXT: ret float [[ELT0]] ; %data = call <4 x float> @llvm.amdgcn.image.gather4.b.cl.cube.v4f32.f32.f32(i32 1, float %bias, float %s, float %t, float %face, float %clamp, <8 x i32> %sampler, <4 x i32> %rsrc, i1 false, i32 0, i32 0) @@ -3907,7 +3907,7 @@ define amdgpu_ps float @extract_elt0_image_gather4_lz_2d_v4f32_f16(half %s, half %t, <8 x i32> inreg %sampler, <4 x i32> inreg %rsrc) #0 { ; CHECK-LABEL: @extract_elt0_image_gather4_lz_2d_v4f32_f16( ; CHECK-NEXT: [[DATA:%.*]] = call <4 x float> @llvm.amdgcn.image.gather4.lz.2d.v4f32.f16(i32 1, half [[S:%.*]], half [[T:%.*]], <8 x i32> [[SAMPLER:%.*]], <4 x i32> [[RSRC:%.*]], i1 false, i32 0, i32 0) -; CHECK-NEXT: [[ELT0:%.*]] = extractelement <4 x float> [[DATA]], i32 0 +; CHECK-NEXT: [[ELT0:%.*]] = extractelement <4 x float> [[DATA]], i64 0 ; CHECK-NEXT: ret float [[ELT0]] ; %data = call <4 x float> @llvm.amdgcn.image.gather4.lz.2d.v4f32.f16(i32 1, half %s, half %t, <8 x i32> %sampler, <4 x i32> %rsrc, i1 false, i32 0, i32 0) @@ -3924,7 +3924,7 @@ define amdgpu_ps float @extract_elt0_image_gather4_o_2d_v4f32_f32(i32 %offset, float %s, float %t, <8 x i32> inreg %gather4r, <4 x i32> inreg %rsrc) #0 { ; CHECK-LABEL: @extract_elt0_image_gather4_o_2d_v4f32_f32( ; CHECK-NEXT: [[DATA:%.*]] = call <4 x float> @llvm.amdgcn.image.gather4.o.2d.v4f32.f32(i32 1, i32 [[OFFSET:%.*]], float [[S:%.*]], float [[T:%.*]], <8 x i32> [[GATHER4R:%.*]], <4 x i32> [[RSRC:%.*]], i1 false, i32 0, i32 0) -; CHECK-NEXT: [[ELT0:%.*]] = extractelement <4 x float> [[DATA]], i32 0 +; CHECK-NEXT: [[ELT0:%.*]] = extractelement <4 x float> [[DATA]], i64 0 ; CHECK-NEXT: ret float [[ELT0]] ; %data = call <4 x float> @llvm.amdgcn.image.gather4.o.2d.v4f32.f32(i32 1, i32 %offset, float %s, float %t, <8 x i32> %gather4r, <4 x i32> %rsrc, i1 false, i32 0, i32 0) @@ -3941,7 +3941,7 @@ define amdgpu_ps float @extract_elt0_image_gather4_cl_o_2d_v4f32_f32(i32 %offset, float %s, float %t, float %clamp, <8 x i32> inreg %gather4r, <4 x i32> inreg %rsrc) #0 { ; CHECK-LABEL: @extract_elt0_image_gather4_cl_o_2d_v4f32_f32( ; CHECK-NEXT: [[DATA:%.*]] = call <4 x float> @llvm.amdgcn.image.gather4.cl.o.2d.v4f32.f32(i32 1, i32 [[OFFSET:%.*]], float [[S:%.*]], float [[T:%.*]], float [[CLAMP:%.*]], <8 x i32> [[GATHER4R:%.*]], <4 x i32> [[RSRC:%.*]], i1 false, i32 0, i32 0) -; CHECK-NEXT: [[ELT0:%.*]] = extractelement <4 x float> [[DATA]], i32 0 +; CHECK-NEXT: [[ELT0:%.*]] = extractelement <4 x float> [[DATA]], i64 0 ; CHECK-NEXT: ret float [[ELT0]] ; %data = call <4 x float> @llvm.amdgcn.image.gather4.cl.o.2d.v4f32.f32(i32 1, i32 %offset, float %s, float %t, float %clamp, <8 x i32> %gather4r, <4 x i32> %rsrc, i1 false, i32 0, i32 0) @@ -3958,7 +3958,7 @@ define amdgpu_ps float @extract_elt0_image_gather4_l_o_2d_v4f32_f32(i32 %offset, float %s, float %t, float %lod, <8 x i32> inreg %gather4r, <4 x i32> inreg %rsrc) #0 { ; CHECK-LABEL: @extract_elt0_image_gather4_l_o_2d_v4f32_f32( ; CHECK-NEXT: [[DATA:%.*]] = call <4 x float> @llvm.amdgcn.image.gather4.l.o.2d.v4f32.f32(i32 1, i32 [[OFFSET:%.*]], float [[S:%.*]], float [[T:%.*]], float [[LOD:%.*]], <8 x i32> [[GATHER4R:%.*]], <4 x i32> [[RSRC:%.*]], i1 false, i32 0, i32 0) -; CHECK-NEXT: [[ELT0:%.*]] = extractelement <4 x float> [[DATA]], i32 0 +; CHECK-NEXT: [[ELT0:%.*]] = extractelement <4 x float> [[DATA]], i64 0 ; CHECK-NEXT: ret float [[ELT0]] ; %data = call <4 x float> @llvm.amdgcn.image.gather4.l.o.2d.v4f32.f32(i32 1, i32 %offset, float %s, float %t, float %lod, <8 x i32> %gather4r, <4 x i32> %rsrc, i1 false, i32 0, i32 0) @@ -3975,7 +3975,7 @@ define amdgpu_ps float @extract_elt0_image_gather4_b_o_2d_v4f32_f32_f32(i32 %offset, float %bias, float %s, float %t, <8 x i32> inreg %gather4r, <4 x i32> inreg %rsrc) #0 { ; CHECK-LABEL: @extract_elt0_image_gather4_b_o_2d_v4f32_f32_f32( ; CHECK-NEXT: [[DATA:%.*]] = call <4 x float> @llvm.amdgcn.image.gather4.b.o.2d.v4f32.f32.f32(i32 1, i32 [[OFFSET:%.*]], float [[BIAS:%.*]], float [[S:%.*]], float [[T:%.*]], <8 x i32> [[GATHER4R:%.*]], <4 x i32> [[RSRC:%.*]], i1 false, i32 0, i32 0) -; CHECK-NEXT: [[ELT0:%.*]] = extractelement <4 x float> [[DATA]], i32 0 +; CHECK-NEXT: [[ELT0:%.*]] = extractelement <4 x float> [[DATA]], i64 0 ; CHECK-NEXT: ret float [[ELT0]] ; %data = call <4 x float> @llvm.amdgcn.image.gather4.b.o.2d.v4f32.f32.f32(i32 1, i32 %offset, float %bias, float %s, float %t, <8 x i32> %gather4r, <4 x i32> %rsrc, i1 false, i32 0, i32 0) @@ -3992,7 +3992,7 @@ define amdgpu_ps float @extract_elt0_image_gather4_b_cl_o_2d_v4f32_f32_f32(i32 %offset, float %bias, float %s, float %t, float %clamp, <8 x i32> inreg %gather4r, <4 x i32> inreg %rsrc) #0 { ; CHECK-LABEL: @extract_elt0_image_gather4_b_cl_o_2d_v4f32_f32_f32( ; CHECK-NEXT: [[DATA:%.*]] = call <4 x float> @llvm.amdgcn.image.gather4.b.cl.o.2d.v4f32.f32.f32(i32 1, i32 [[OFFSET:%.*]], float [[BIAS:%.*]], float [[S:%.*]], float [[T:%.*]], float [[CLAMP:%.*]], <8 x i32> [[GATHER4R:%.*]], <4 x i32> [[RSRC:%.*]], i1 false, i32 0, i32 0) -; CHECK-NEXT: [[ELT0:%.*]] = extractelement <4 x float> [[DATA]], i32 0 +; CHECK-NEXT: [[ELT0:%.*]] = extractelement <4 x float> [[DATA]], i64 0 ; CHECK-NEXT: ret float [[ELT0]] ; %data = call <4 x float> @llvm.amdgcn.image.gather4.b.cl.o.2d.v4f32.f32.f32(i32 1, i32 %offset, float %bias, float %s, float %t, float %clamp, <8 x i32> %gather4r, <4 x i32> %rsrc, i1 false, i32 0, i32 0) @@ -4009,7 +4009,7 @@ define amdgpu_ps float @extract_elt0_image_gather4_lz_o_2d_v4f32_f32(i32 %offset, float %s, float %t, <8 x i32> inreg %gather4r, <4 x i32> inreg %rsrc) #0 { ; CHECK-LABEL: @extract_elt0_image_gather4_lz_o_2d_v4f32_f32( ; CHECK-NEXT: [[DATA:%.*]] = call <4 x float> @llvm.amdgcn.image.gather4.lz.o.2d.v4f32.f32(i32 1, i32 [[OFFSET:%.*]], float [[S:%.*]], float [[T:%.*]], <8 x i32> [[GATHER4R:%.*]], <4 x i32> [[RSRC:%.*]], i1 false, i32 0, i32 0) -; CHECK-NEXT: [[ELT0:%.*]] = extractelement <4 x float> [[DATA]], i32 0 +; CHECK-NEXT: [[ELT0:%.*]] = extractelement <4 x float> [[DATA]], i64 0 ; CHECK-NEXT: ret float [[ELT0]] ; %data = call <4 x float> @llvm.amdgcn.image.gather4.lz.o.2d.v4f32.f32(i32 1, i32 %offset, float %s, float %t, <8 x i32> %gather4r, <4 x i32> %rsrc, i1 false, i32 0, i32 0) @@ -4026,7 +4026,7 @@ define amdgpu_ps float @extract_elt0_image_gather4_c_o_2d_v4f32_f32(i32 %offset, float %zcompare, float %s, float %t, <8 x i32> inreg %gather4r, <4 x i32> inreg %rsrc) #0 { ; CHECK-LABEL: @extract_elt0_image_gather4_c_o_2d_v4f32_f32( ; CHECK-NEXT: [[DATA:%.*]] = call <4 x float> @llvm.amdgcn.image.gather4.c.o.2d.v4f32.f32(i32 1, i32 [[OFFSET:%.*]], float [[ZCOMPARE:%.*]], float [[S:%.*]], float [[T:%.*]], <8 x i32> [[GATHER4R:%.*]], <4 x i32> [[RSRC:%.*]], i1 false, i32 0, i32 0) -; CHECK-NEXT: [[ELT0:%.*]] = extractelement <4 x float> [[DATA]], i32 0 +; CHECK-NEXT: [[ELT0:%.*]] = extractelement <4 x float> [[DATA]], i64 0 ; CHECK-NEXT: ret float [[ELT0]] ; %data = call <4 x float> @llvm.amdgcn.image.gather4.c.o.2d.v4f32.f32(i32 1, i32 %offset, float %zcompare, float %s, float %t, <8 x i32> %gather4r, <4 x i32> %rsrc, i1 false, i32 0, i32 0) @@ -4043,7 +4043,7 @@ define amdgpu_ps float @extract_elt0_image_gather4_c_cl_o_2d_v4f32_f32(i32 %offset, float %zcompare, float %s, float %t, float %clamp, <8 x i32> inreg %gather4r, <4 x i32> inreg %rsrc) #0 { ; CHECK-LABEL: @extract_elt0_image_gather4_c_cl_o_2d_v4f32_f32( ; CHECK-NEXT: [[DATA:%.*]] = call <4 x float> @llvm.amdgcn.image.gather4.c.cl.o.2d.v4f32.f32(i32 1, i32 [[OFFSET:%.*]], float [[ZCOMPARE:%.*]], float [[S:%.*]], float [[T:%.*]], float [[CLAMP:%.*]], <8 x i32> [[GATHER4R:%.*]], <4 x i32> [[RSRC:%.*]], i1 false, i32 0, i32 0) -; CHECK-NEXT: [[ELT0:%.*]] = extractelement <4 x float> [[DATA]], i32 0 +; CHECK-NEXT: [[ELT0:%.*]] = extractelement <4 x float> [[DATA]], i64 0 ; CHECK-NEXT: ret float [[ELT0]] ; %data = call <4 x float> @llvm.amdgcn.image.gather4.c.cl.o.2d.v4f32.f32(i32 1, i32 %offset, float %zcompare, float %s, float %t, float %clamp, <8 x i32> %gather4r, <4 x i32> %rsrc, i1 false, i32 0, i32 0) @@ -4060,7 +4060,7 @@ define amdgpu_ps float @extract_elt0_image_gather4_c_l_o_2d_v4f32_f32(i32 %offset, float %zcompare, float %s, float %t, float %lod, <8 x i32> inreg %gather4r, <4 x i32> inreg %rsrc) #0 { ; CHECK-LABEL: @extract_elt0_image_gather4_c_l_o_2d_v4f32_f32( ; CHECK-NEXT: [[DATA:%.*]] = call <4 x float> @llvm.amdgcn.image.gather4.c.l.o.2d.v4f32.f32(i32 1, i32 [[OFFSET:%.*]], float [[ZCOMPARE:%.*]], float [[S:%.*]], float [[T:%.*]], float [[LOD:%.*]], <8 x i32> [[GATHER4R:%.*]], <4 x i32> [[RSRC:%.*]], i1 false, i32 0, i32 0) -; CHECK-NEXT: [[ELT0:%.*]] = extractelement <4 x float> [[DATA]], i32 0 +; CHECK-NEXT: [[ELT0:%.*]] = extractelement <4 x float> [[DATA]], i64 0 ; CHECK-NEXT: ret float [[ELT0]] ; %data = call <4 x float> @llvm.amdgcn.image.gather4.c.l.o.2d.v4f32.f32(i32 1, i32 %offset, float %zcompare, float %s, float %t, float %lod, <8 x i32> %gather4r, <4 x i32> %rsrc, i1 false, i32 0, i32 0) @@ -4077,7 +4077,7 @@ define amdgpu_ps float @extract_elt0_image_gather4_c_b_o_2d_v4f32_f32_f32(i32 %offset, float %bias, float %zcompare, float %s, float %t, <8 x i32> inreg %gather4r, <4 x i32> inreg %rsrc) #0 { ; CHECK-LABEL: @extract_elt0_image_gather4_c_b_o_2d_v4f32_f32_f32( ; CHECK-NEXT: [[DATA:%.*]] = call <4 x float> @llvm.amdgcn.image.gather4.c.b.o.2d.v4f32.f32.f32(i32 1, i32 [[OFFSET:%.*]], float [[BIAS:%.*]], float [[ZCOMPARE:%.*]], float [[S:%.*]], float [[T:%.*]], <8 x i32> [[GATHER4R:%.*]], <4 x i32> [[RSRC:%.*]], i1 false, i32 0, i32 0) -; CHECK-NEXT: [[ELT0:%.*]] = extractelement <4 x float> [[DATA]], i32 0 +; CHECK-NEXT: [[ELT0:%.*]] = extractelement <4 x float> [[DATA]], i64 0 ; CHECK-NEXT: ret float [[ELT0]] ; %data = call <4 x float> @llvm.amdgcn.image.gather4.c.b.o.2d.v4f32.f32.f32(i32 1, i32 %offset, float %bias, float %zcompare, float %s, float %t, <8 x i32> %gather4r, <4 x i32> %rsrc, i1 false, i32 0, i32 0) @@ -4094,7 +4094,7 @@ define amdgpu_ps float @extract_elt0_image_gather4_c_b_cl_o_2d_v4f32_f32_f32(i32 %offset, float %bias, float %zcompare, float %s, float %t, float %clamp, <8 x i32> inreg %gather4r, <4 x i32> inreg %rsrc) #0 { ; CHECK-LABEL: @extract_elt0_image_gather4_c_b_cl_o_2d_v4f32_f32_f32( ; CHECK-NEXT: [[DATA:%.*]] = call <4 x float> @llvm.amdgcn.image.gather4.c.b.cl.o.2d.v4f32.f32.f32(i32 1, i32 [[OFFSET:%.*]], float [[BIAS:%.*]], float [[ZCOMPARE:%.*]], float [[S:%.*]], float [[T:%.*]], float [[CLAMP:%.*]], <8 x i32> [[GATHER4R:%.*]], <4 x i32> [[RSRC:%.*]], i1 false, i32 0, i32 0) -; CHECK-NEXT: [[ELT0:%.*]] = extractelement <4 x float> [[DATA]], i32 0 +; CHECK-NEXT: [[ELT0:%.*]] = extractelement <4 x float> [[DATA]], i64 0 ; CHECK-NEXT: ret float [[ELT0]] ; %data = call <4 x float> @llvm.amdgcn.image.gather4.c.b.cl.o.2d.v4f32.f32.f32(i32 1, i32 %offset, float %bias, float %zcompare, float %s, float %t, float %clamp, <8 x i32> %gather4r, <4 x i32> %rsrc, i1 false, i32 0, i32 0) @@ -4111,7 +4111,7 @@ define amdgpu_ps float @extract_elt0_image_gather4_c_lz_o_2d_v4f32_f32(i32 %offset, float %zcompare, float %s, float %t, <8 x i32> inreg %gather4r, <4 x i32> inreg %rsrc) #0 { ; CHECK-LABEL: @extract_elt0_image_gather4_c_lz_o_2d_v4f32_f32( ; CHECK-NEXT: [[DATA:%.*]] = call <4 x float> @llvm.amdgcn.image.gather4.c.lz.o.2d.v4f32.f32(i32 1, i32 [[OFFSET:%.*]], float [[ZCOMPARE:%.*]], float [[S:%.*]], float [[T:%.*]], <8 x i32> [[GATHER4R:%.*]], <4 x i32> [[RSRC:%.*]], i1 false, i32 0, i32 0) -; CHECK-NEXT: [[ELT0:%.*]] = extractelement <4 x float> [[DATA]], i32 0 +; CHECK-NEXT: [[ELT0:%.*]] = extractelement <4 x float> [[DATA]], i64 0 ; CHECK-NEXT: ret float [[ELT0]] ; %data = call <4 x float> @llvm.amdgcn.image.gather4.c.lz.o.2d.v4f32.f32(i32 1, i32 %offset, float %zcompare, float %s, float %t, <8 x i32> %gather4r, <4 x i32> %rsrc, i1 false, i32 0, i32 0) @@ -4193,7 +4193,7 @@ ; CHECK-LABEL: @extract_elt0_tfe_image_load_1d_v4f32i32_i32( ; CHECK-NEXT: [[DATA:%.*]] = call { <4 x float>, i32 } @llvm.amdgcn.image.load.1d.sl_v4f32i32s.i32(i32 15, i32 [[S:%.*]], <8 x i32> [[RSRC:%.*]], i32 0, i32 1) ; CHECK-NEXT: [[RGBA:%.*]] = extractvalue { <4 x float>, i32 } [[DATA]], 0 -; CHECK-NEXT: [[ELT0:%.*]] = extractelement <4 x float> [[RGBA]], i32 0 +; CHECK-NEXT: [[ELT0:%.*]] = extractelement <4 x float> [[RGBA]], i64 0 ; CHECK-NEXT: ret float [[ELT0]] ; %data = call { <4 x float>, i32 } @llvm.amdgcn.image.load.1d.sl_v4f32i32s.i32(i32 15, i32 %s, <8 x i32> %rsrc, i32 0, i32 1) diff --git a/llvm/test/Transforms/InstCombine/AMDGPU/amdgcn-demanded-vector-elts.ll b/llvm/test/Transforms/InstCombine/AMDGPU/amdgcn-demanded-vector-elts.ll --- a/llvm/test/Transforms/InstCombine/AMDGPU/amdgcn-demanded-vector-elts.ll +++ b/llvm/test/Transforms/InstCombine/AMDGPU/amdgcn-demanded-vector-elts.ll @@ -54,7 +54,7 @@ define amdgpu_ps float @extract_elt1_buffer_load_v2f32(<4 x i32> inreg %rsrc, i32 %idx, i32 %ofs) #0 { ; CHECK-LABEL: @extract_elt1_buffer_load_v2f32( ; CHECK-NEXT: [[DATA:%.*]] = call <2 x float> @llvm.amdgcn.buffer.load.v2f32(<4 x i32> [[RSRC:%.*]], i32 [[IDX:%.*]], i32 [[OFS:%.*]], i1 false, i1 false) -; CHECK-NEXT: [[ELT1:%.*]] = extractelement <2 x float> [[DATA]], i32 1 +; CHECK-NEXT: [[ELT1:%.*]] = extractelement <2 x float> [[DATA]], i64 1 ; CHECK-NEXT: ret float [[ELT1]] ; %data = call <2 x float> @llvm.amdgcn.buffer.load.v2f32(<4 x i32> %rsrc, i32 %idx, i32 %ofs, i1 false, i1 false) @@ -75,7 +75,7 @@ define amdgpu_ps float @extract_elt1_buffer_load_v4f32(<4 x i32> inreg %rsrc, i32 %idx, i32 %ofs) #0 { ; CHECK-LABEL: @extract_elt1_buffer_load_v4f32( ; CHECK-NEXT: [[DATA:%.*]] = call <2 x float> @llvm.amdgcn.buffer.load.v2f32(<4 x i32> [[RSRC:%.*]], i32 [[IDX:%.*]], i32 [[OFS:%.*]], i1 false, i1 false) -; CHECK-NEXT: [[ELT1:%.*]] = extractelement <2 x float> [[DATA]], i32 1 +; CHECK-NEXT: [[ELT1:%.*]] = extractelement <2 x float> [[DATA]], i64 1 ; CHECK-NEXT: ret float [[ELT1]] ; %data = call <4 x float> @llvm.amdgcn.buffer.load.v4f32(<4 x i32> %rsrc, i32 %idx, i32 %ofs, i1 false, i1 false) @@ -86,7 +86,7 @@ define amdgpu_ps float @extract_elt2_buffer_load_v4f32(<4 x i32> inreg %rsrc, i32 %idx, i32 %ofs) #0 { ; CHECK-LABEL: @extract_elt2_buffer_load_v4f32( ; CHECK-NEXT: [[DATA:%.*]] = call <3 x float> @llvm.amdgcn.buffer.load.v3f32(<4 x i32> [[RSRC:%.*]], i32 [[IDX:%.*]], i32 [[OFS:%.*]], i1 false, i1 false) -; CHECK-NEXT: [[ELT1:%.*]] = extractelement <3 x float> [[DATA]], i32 2 +; CHECK-NEXT: [[ELT1:%.*]] = extractelement <3 x float> [[DATA]], i64 2 ; CHECK-NEXT: ret float [[ELT1]] ; %data = call <4 x float> @llvm.amdgcn.buffer.load.v4f32(<4 x i32> %rsrc, i32 %idx, i32 %ofs, i1 false, i1 false) @@ -97,7 +97,7 @@ define amdgpu_ps float @extract_elt3_buffer_load_v4f32(<4 x i32> inreg %rsrc, i32 %idx, i32 %ofs) #0 { ; CHECK-LABEL: @extract_elt3_buffer_load_v4f32( ; CHECK-NEXT: [[DATA:%.*]] = call <4 x float> @llvm.amdgcn.buffer.load.v4f32(<4 x i32> [[RSRC:%.*]], i32 [[IDX:%.*]], i32 [[OFS:%.*]], i1 false, i1 false) -; CHECK-NEXT: [[ELT1:%.*]] = extractelement <4 x float> [[DATA]], i32 3 +; CHECK-NEXT: [[ELT1:%.*]] = extractelement <4 x float> [[DATA]], i64 3 ; CHECK-NEXT: ret float [[ELT1]] ; %data = call <4 x float> @llvm.amdgcn.buffer.load.v4f32(<4 x i32> %rsrc, i32 %idx, i32 %ofs, i1 false, i1 false) @@ -172,8 +172,8 @@ define amdgpu_ps { float, float } @extract_elt0_elt1_buffer_load_v4f32_2(<4 x i32> inreg %rsrc, i32 %idx, i32 %ofs) #0 { ; CHECK-LABEL: @extract_elt0_elt1_buffer_load_v4f32_2( ; CHECK-NEXT: [[DATA:%.*]] = call <2 x float> @llvm.amdgcn.buffer.load.v2f32(<4 x i32> [[RSRC:%.*]], i32 [[IDX:%.*]], i32 [[OFS:%.*]], i1 false, i1 false) -; CHECK-NEXT: [[ELT0:%.*]] = extractelement <2 x float> [[DATA]], i32 0 -; CHECK-NEXT: [[ELT1:%.*]] = extractelement <2 x float> [[DATA]], i32 1 +; CHECK-NEXT: [[ELT0:%.*]] = extractelement <2 x float> [[DATA]], i64 0 +; CHECK-NEXT: [[ELT1:%.*]] = extractelement <2 x float> [[DATA]], i64 1 ; CHECK-NEXT: [[INS0:%.*]] = insertvalue { float, float } undef, float [[ELT0]], 0 ; CHECK-NEXT: [[INS1:%.*]] = insertvalue { float, float } [[INS0]], float [[ELT1]], 1 ; CHECK-NEXT: ret { float, float } [[INS1]] @@ -189,9 +189,9 @@ define amdgpu_ps { float, float, float } @extract_elt0_elt1_elt2_buffer_load_v4f32_2(<4 x i32> inreg %rsrc, i32 %idx, i32 %ofs) #0 { ; CHECK-LABEL: @extract_elt0_elt1_elt2_buffer_load_v4f32_2( ; CHECK-NEXT: [[DATA:%.*]] = call <3 x float> @llvm.amdgcn.buffer.load.v3f32(<4 x i32> [[RSRC:%.*]], i32 [[IDX:%.*]], i32 [[OFS:%.*]], i1 false, i1 false) -; CHECK-NEXT: [[ELT0:%.*]] = extractelement <3 x float> [[DATA]], i32 0 -; CHECK-NEXT: [[ELT1:%.*]] = extractelement <3 x float> [[DATA]], i32 1 -; CHECK-NEXT: [[ELT2:%.*]] = extractelement <3 x float> [[DATA]], i32 2 +; CHECK-NEXT: [[ELT0:%.*]] = extractelement <3 x float> [[DATA]], i64 0 +; CHECK-NEXT: [[ELT1:%.*]] = extractelement <3 x float> [[DATA]], i64 1 +; CHECK-NEXT: [[ELT2:%.*]] = extractelement <3 x float> [[DATA]], i64 2 ; CHECK-NEXT: [[INS0:%.*]] = insertvalue { float, float, float } undef, float [[ELT0]], 0 ; CHECK-NEXT: [[INS1:%.*]] = insertvalue { float, float, float } [[INS0]], float [[ELT1]], 1 ; CHECK-NEXT: [[INS2:%.*]] = insertvalue { float, float, float } [[INS1]], float [[ELT2]], 2 @@ -273,7 +273,7 @@ define amdgpu_ps float @extract_elt1_buffer_load_v3f32(<4 x i32> inreg %rsrc, i32 %idx, i32 %ofs) #0 { ; CHECK-LABEL: @extract_elt1_buffer_load_v3f32( ; CHECK-NEXT: [[DATA:%.*]] = call <2 x float> @llvm.amdgcn.buffer.load.v2f32(<4 x i32> [[RSRC:%.*]], i32 [[IDX:%.*]], i32 [[OFS:%.*]], i1 false, i1 false) -; CHECK-NEXT: [[ELT1:%.*]] = extractelement <2 x float> [[DATA]], i32 1 +; CHECK-NEXT: [[ELT1:%.*]] = extractelement <2 x float> [[DATA]], i64 1 ; CHECK-NEXT: ret float [[ELT1]] ; %data = call <3 x float> @llvm.amdgcn.buffer.load.v3f32(<4 x i32> %rsrc, i32 %idx, i32 %ofs, i1 false, i1 false) @@ -284,7 +284,7 @@ define amdgpu_ps float @extract_elt2_buffer_load_v3f32(<4 x i32> inreg %rsrc, i32 %idx, i32 %ofs) #0 { ; CHECK-LABEL: @extract_elt2_buffer_load_v3f32( ; CHECK-NEXT: [[DATA:%.*]] = call <3 x float> @llvm.amdgcn.buffer.load.v3f32(<4 x i32> [[RSRC:%.*]], i32 [[IDX:%.*]], i32 [[OFS:%.*]], i1 false, i1 false) -; CHECK-NEXT: [[ELT1:%.*]] = extractelement <3 x float> [[DATA]], i32 2 +; CHECK-NEXT: [[ELT1:%.*]] = extractelement <3 x float> [[DATA]], i64 2 ; CHECK-NEXT: ret float [[ELT1]] ; %data = call <3 x float> @llvm.amdgcn.buffer.load.v3f32(<4 x i32> %rsrc, i32 %idx, i32 %ofs, i1 false, i1 false) @@ -378,7 +378,7 @@ ; CHECK-NEXT: [[VAR:%.*]] = call <2 x float> @llvm.amdgcn.buffer.load.format.v2f32(<4 x i32> undef, i32 [[ARG:%.*]], i32 16, i1 false, i1 false) ; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <2 x float> [[VAR]], <2 x float> poison, <4 x i32> ; CHECK-NEXT: [[VAR1:%.*]] = bitcast <4 x float> [[TMP1]] to <2 x double> -; CHECK-NEXT: [[VAR2:%.*]] = extractelement <2 x double> [[VAR1]], i32 0 +; CHECK-NEXT: [[VAR2:%.*]] = extractelement <2 x double> [[VAR1]], i64 0 ; CHECK-NEXT: ret double [[VAR2]] ; %var = call <4 x float> @llvm.amdgcn.buffer.load.format.v4f32(<4 x i32> undef, i32 %arg, i32 16, i1 false, i1 false) #3 @@ -1265,7 +1265,7 @@ define amdgpu_ps float @extract_elt1_raw_buffer_load_format_v2f32(<4 x i32> inreg %rsrc, i32 %ofs, i32 %sofs) #0 { ; CHECK-LABEL: @extract_elt1_raw_buffer_load_format_v2f32( ; CHECK-NEXT: [[DATA:%.*]] = call <2 x float> @llvm.amdgcn.raw.buffer.load.format.v2f32(<4 x i32> [[RSRC:%.*]], i32 [[OFS:%.*]], i32 [[SOFS:%.*]], i32 0) -; CHECK-NEXT: [[ELT1:%.*]] = extractelement <2 x float> [[DATA]], i32 1 +; CHECK-NEXT: [[ELT1:%.*]] = extractelement <2 x float> [[DATA]], i64 1 ; CHECK-NEXT: ret float [[ELT1]] ; %data = call <2 x float> @llvm.amdgcn.raw.buffer.load.format.v2f32(<4 x i32> %rsrc, i32 %ofs, i32 %sofs, i32 0) @@ -1286,7 +1286,7 @@ define amdgpu_ps float @extract_elt1_raw_buffer_load_format_v4f32(<4 x i32> inreg %rsrc, i32 %ofs, i32 %sofs) #0 { ; CHECK-LABEL: @extract_elt1_raw_buffer_load_format_v4f32( ; CHECK-NEXT: [[DATA:%.*]] = call <2 x float> @llvm.amdgcn.raw.buffer.load.format.v2f32(<4 x i32> [[RSRC:%.*]], i32 [[OFS:%.*]], i32 [[SOFS:%.*]], i32 0) -; CHECK-NEXT: [[ELT1:%.*]] = extractelement <2 x float> [[DATA]], i32 1 +; CHECK-NEXT: [[ELT1:%.*]] = extractelement <2 x float> [[DATA]], i64 1 ; CHECK-NEXT: ret float [[ELT1]] ; %data = call <4 x float> @llvm.amdgcn.raw.buffer.load.format.v4f32(<4 x i32> %rsrc, i32 %ofs, i32 %sofs, i32 0) @@ -1297,7 +1297,7 @@ define amdgpu_ps float @extract_elt2_raw_buffer_load_format_v4f32(<4 x i32> inreg %rsrc, i32 %ofs, i32 %sofs) #0 { ; CHECK-LABEL: @extract_elt2_raw_buffer_load_format_v4f32( ; CHECK-NEXT: [[DATA:%.*]] = call <3 x float> @llvm.amdgcn.raw.buffer.load.format.v3f32(<4 x i32> [[RSRC:%.*]], i32 [[OFS:%.*]], i32 [[SOFS:%.*]], i32 0) -; CHECK-NEXT: [[ELT1:%.*]] = extractelement <3 x float> [[DATA]], i32 2 +; CHECK-NEXT: [[ELT1:%.*]] = extractelement <3 x float> [[DATA]], i64 2 ; CHECK-NEXT: ret float [[ELT1]] ; %data = call <4 x float> @llvm.amdgcn.raw.buffer.load.format.v4f32(<4 x i32> %rsrc, i32 %ofs, i32 %sofs, i32 0) @@ -1308,7 +1308,7 @@ define amdgpu_ps float @extract_elt3_raw_buffer_load_format_v4f32(<4 x i32> inreg %rsrc, i32 %ofs, i32 %sofs) #0 { ; CHECK-LABEL: @extract_elt3_raw_buffer_load_format_v4f32( ; CHECK-NEXT: [[DATA:%.*]] = call <4 x float> @llvm.amdgcn.raw.buffer.load.format.v4f32(<4 x i32> [[RSRC:%.*]], i32 [[OFS:%.*]], i32 [[SOFS:%.*]], i32 0) -; CHECK-NEXT: [[ELT1:%.*]] = extractelement <4 x float> [[DATA]], i32 3 +; CHECK-NEXT: [[ELT1:%.*]] = extractelement <4 x float> [[DATA]], i64 3 ; CHECK-NEXT: ret float [[ELT1]] ; %data = call <4 x float> @llvm.amdgcn.raw.buffer.load.format.v4f32(<4 x i32> %rsrc, i32 %ofs, i32 %sofs, i32 0) @@ -1393,7 +1393,7 @@ define amdgpu_ps float @extract_elt1_raw_buffer_load_format_v3f32(<4 x i32> inreg %rsrc, i32 %ofs, i32 %sofs) #0 { ; CHECK-LABEL: @extract_elt1_raw_buffer_load_format_v3f32( ; CHECK-NEXT: [[DATA:%.*]] = call <2 x float> @llvm.amdgcn.raw.buffer.load.format.v2f32(<4 x i32> [[RSRC:%.*]], i32 [[OFS:%.*]], i32 [[SOFS:%.*]], i32 0) -; CHECK-NEXT: [[ELT1:%.*]] = extractelement <2 x float> [[DATA]], i32 1 +; CHECK-NEXT: [[ELT1:%.*]] = extractelement <2 x float> [[DATA]], i64 1 ; CHECK-NEXT: ret float [[ELT1]] ; %data = call <3 x float> @llvm.amdgcn.raw.buffer.load.format.v3f32(<4 x i32> %rsrc, i32 %ofs, i32 %sofs, i32 0) @@ -1404,7 +1404,7 @@ define amdgpu_ps float @extract_elt2_raw_buffer_load_format_v3f32(<4 x i32> inreg %rsrc, i32 %ofs, i32 %sofs) #0 { ; CHECK-LABEL: @extract_elt2_raw_buffer_load_format_v3f32( ; CHECK-NEXT: [[DATA:%.*]] = call <3 x float> @llvm.amdgcn.raw.buffer.load.format.v3f32(<4 x i32> [[RSRC:%.*]], i32 [[OFS:%.*]], i32 [[SOFS:%.*]], i32 0) -; CHECK-NEXT: [[ELT1:%.*]] = extractelement <3 x float> [[DATA]], i32 2 +; CHECK-NEXT: [[ELT1:%.*]] = extractelement <3 x float> [[DATA]], i64 2 ; CHECK-NEXT: ret float [[ELT1]] ; %data = call <3 x float> @llvm.amdgcn.raw.buffer.load.format.v3f32(<4 x i32> %rsrc, i32 %ofs, i32 %sofs, i32 0) @@ -1925,7 +1925,7 @@ define amdgpu_ps float @extract_elt1_struct_buffer_load_format_v2f32(<4 x i32> inreg %rsrc, i32 %idx, i32 %ofs, i32 %sofs) #0 { ; CHECK-LABEL: @extract_elt1_struct_buffer_load_format_v2f32( ; CHECK-NEXT: [[DATA:%.*]] = call <2 x float> @llvm.amdgcn.struct.buffer.load.format.v2f32(<4 x i32> [[RSRC:%.*]], i32 [[IDX:%.*]], i32 [[OFS:%.*]], i32 [[SOFS:%.*]], i32 0) -; CHECK-NEXT: [[ELT1:%.*]] = extractelement <2 x float> [[DATA]], i32 1 +; CHECK-NEXT: [[ELT1:%.*]] = extractelement <2 x float> [[DATA]], i64 1 ; CHECK-NEXT: ret float [[ELT1]] ; %data = call <2 x float> @llvm.amdgcn.struct.buffer.load.format.v2f32(<4 x i32> %rsrc, i32 %idx, i32 %ofs, i32 %sofs, i32 0) @@ -1946,7 +1946,7 @@ define amdgpu_ps float @extract_elt1_struct_buffer_load_format_v4f32(<4 x i32> inreg %rsrc, i32 %idx, i32 %ofs, i32 %sofs) #0 { ; CHECK-LABEL: @extract_elt1_struct_buffer_load_format_v4f32( ; CHECK-NEXT: [[DATA:%.*]] = call <2 x float> @llvm.amdgcn.struct.buffer.load.format.v2f32(<4 x i32> [[RSRC:%.*]], i32 [[IDX:%.*]], i32 [[OFS:%.*]], i32 [[SOFS:%.*]], i32 0) -; CHECK-NEXT: [[ELT1:%.*]] = extractelement <2 x float> [[DATA]], i32 1 +; CHECK-NEXT: [[ELT1:%.*]] = extractelement <2 x float> [[DATA]], i64 1 ; CHECK-NEXT: ret float [[ELT1]] ; %data = call <4 x float> @llvm.amdgcn.struct.buffer.load.format.v4f32(<4 x i32> %rsrc, i32 %idx, i32 %ofs, i32 %sofs, i32 0) @@ -1957,7 +1957,7 @@ define amdgpu_ps float @extract_elt2_struct_buffer_load_format_v4f32(<4 x i32> inreg %rsrc, i32 %idx, i32 %ofs, i32 %sofs) #0 { ; CHECK-LABEL: @extract_elt2_struct_buffer_load_format_v4f32( ; CHECK-NEXT: [[DATA:%.*]] = call <3 x float> @llvm.amdgcn.struct.buffer.load.format.v3f32(<4 x i32> [[RSRC:%.*]], i32 [[IDX:%.*]], i32 [[OFS:%.*]], i32 [[SOFS:%.*]], i32 0) -; CHECK-NEXT: [[ELT1:%.*]] = extractelement <3 x float> [[DATA]], i32 2 +; CHECK-NEXT: [[ELT1:%.*]] = extractelement <3 x float> [[DATA]], i64 2 ; CHECK-NEXT: ret float [[ELT1]] ; %data = call <4 x float> @llvm.amdgcn.struct.buffer.load.format.v4f32(<4 x i32> %rsrc, i32 %idx, i32 %ofs, i32 %sofs, i32 0) @@ -1968,7 +1968,7 @@ define amdgpu_ps float @extract_elt3_struct_buffer_load_format_v4f32(<4 x i32> inreg %rsrc, i32 %idx, i32 %ofs, i32 %sofs) #0 { ; CHECK-LABEL: @extract_elt3_struct_buffer_load_format_v4f32( ; CHECK-NEXT: [[DATA:%.*]] = call <4 x float> @llvm.amdgcn.struct.buffer.load.format.v4f32(<4 x i32> [[RSRC:%.*]], i32 [[IDX:%.*]], i32 [[OFS:%.*]], i32 [[SOFS:%.*]], i32 0) -; CHECK-NEXT: [[ELT1:%.*]] = extractelement <4 x float> [[DATA]], i32 3 +; CHECK-NEXT: [[ELT1:%.*]] = extractelement <4 x float> [[DATA]], i64 3 ; CHECK-NEXT: ret float [[ELT1]] ; %data = call <4 x float> @llvm.amdgcn.struct.buffer.load.format.v4f32(<4 x i32> %rsrc, i32 %idx, i32 %ofs, i32 %sofs, i32 0) @@ -2053,7 +2053,7 @@ define amdgpu_ps float @extract_elt1_struct_buffer_load_format_v3f32(<4 x i32> inreg %rsrc, i32 %idx, i32 %ofs, i32 %sofs) #0 { ; CHECK-LABEL: @extract_elt1_struct_buffer_load_format_v3f32( ; CHECK-NEXT: [[DATA:%.*]] = call <2 x float> @llvm.amdgcn.struct.buffer.load.format.v2f32(<4 x i32> [[RSRC:%.*]], i32 [[IDX:%.*]], i32 [[OFS:%.*]], i32 [[SOFS:%.*]], i32 0) -; CHECK-NEXT: [[ELT1:%.*]] = extractelement <2 x float> [[DATA]], i32 1 +; CHECK-NEXT: [[ELT1:%.*]] = extractelement <2 x float> [[DATA]], i64 1 ; CHECK-NEXT: ret float [[ELT1]] ; %data = call <3 x float> @llvm.amdgcn.struct.buffer.load.format.v3f32(<4 x i32> %rsrc, i32 %idx, i32 %ofs, i32 %sofs, i32 0) @@ -2064,7 +2064,7 @@ define amdgpu_ps float @extract_elt2_struct_buffer_load_format_v3f32(<4 x i32> inreg %rsrc, i32 %idx, i32 %ofs, i32 %sofs) #0 { ; CHECK-LABEL: @extract_elt2_struct_buffer_load_format_v3f32( ; CHECK-NEXT: [[DATA:%.*]] = call <3 x float> @llvm.amdgcn.struct.buffer.load.format.v3f32(<4 x i32> [[RSRC:%.*]], i32 [[IDX:%.*]], i32 [[OFS:%.*]], i32 [[SOFS:%.*]], i32 0) -; CHECK-NEXT: [[ELT1:%.*]] = extractelement <3 x float> [[DATA]], i32 2 +; CHECK-NEXT: [[ELT1:%.*]] = extractelement <3 x float> [[DATA]], i64 2 ; CHECK-NEXT: ret float [[ELT1]] ; %data = call <3 x float> @llvm.amdgcn.struct.buffer.load.format.v3f32(<4 x i32> %rsrc, i32 %idx, i32 %ofs, i32 %sofs, i32 0) @@ -2167,7 +2167,7 @@ define amdgpu_ps float @extract_elt1_raw_tbuffer_load_v2f32(<4 x i32> inreg %rsrc, i32 %arg0, i32 inreg %arg1) #0 { ; CHECK-LABEL: @extract_elt1_raw_tbuffer_load_v2f32( ; CHECK-NEXT: [[DATA:%.*]] = call <2 x float> @llvm.amdgcn.raw.tbuffer.load.v2f32(<4 x i32> [[RSRC:%.*]], i32 [[ARG0:%.*]], i32 [[ARG1:%.*]], i32 78, i32 0) -; CHECK-NEXT: [[ELT1:%.*]] = extractelement <2 x float> [[DATA]], i32 1 +; CHECK-NEXT: [[ELT1:%.*]] = extractelement <2 x float> [[DATA]], i64 1 ; CHECK-NEXT: ret float [[ELT1]] ; %data = call <2 x float> @llvm.amdgcn.raw.tbuffer.load.v2f32(<4 x i32> %rsrc, i32 %arg0, i32 %arg1, i32 78, i32 0) @@ -2188,7 +2188,7 @@ define amdgpu_ps float @extract_elt1_raw_tbuffer_load_v4f32(<4 x i32> inreg %rsrc, i32 %arg0, i32 inreg %arg1) #0 { ; CHECK-LABEL: @extract_elt1_raw_tbuffer_load_v4f32( ; CHECK-NEXT: [[DATA:%.*]] = call <2 x float> @llvm.amdgcn.raw.tbuffer.load.v2f32(<4 x i32> [[RSRC:%.*]], i32 [[ARG0:%.*]], i32 [[ARG1:%.*]], i32 78, i32 0) -; CHECK-NEXT: [[ELT1:%.*]] = extractelement <2 x float> [[DATA]], i32 1 +; CHECK-NEXT: [[ELT1:%.*]] = extractelement <2 x float> [[DATA]], i64 1 ; CHECK-NEXT: ret float [[ELT1]] ; %data = call <4 x float> @llvm.amdgcn.raw.tbuffer.load.v4f32(<4 x i32> %rsrc, i32 %arg0, i32 %arg1, i32 78, i32 0) @@ -2199,7 +2199,7 @@ define amdgpu_ps float @extract_elt2_raw_tbuffer_load_v4f32(<4 x i32> inreg %rsrc, i32 %arg0, i32 inreg %arg1) #0 { ; CHECK-LABEL: @extract_elt2_raw_tbuffer_load_v4f32( ; CHECK-NEXT: [[DATA:%.*]] = call <3 x float> @llvm.amdgcn.raw.tbuffer.load.v3f32(<4 x i32> [[RSRC:%.*]], i32 [[ARG0:%.*]], i32 [[ARG1:%.*]], i32 78, i32 0) -; CHECK-NEXT: [[ELT1:%.*]] = extractelement <3 x float> [[DATA]], i32 2 +; CHECK-NEXT: [[ELT1:%.*]] = extractelement <3 x float> [[DATA]], i64 2 ; CHECK-NEXT: ret float [[ELT1]] ; %data = call <4 x float> @llvm.amdgcn.raw.tbuffer.load.v4f32(<4 x i32> %rsrc, i32 %arg0, i32 %arg1, i32 78, i32 0) @@ -2210,7 +2210,7 @@ define amdgpu_ps float @extract_elt3_raw_tbuffer_load_v4f32(<4 x i32> inreg %rsrc, i32 %arg0, i32 inreg %arg1) #0 { ; CHECK-LABEL: @extract_elt3_raw_tbuffer_load_v4f32( ; CHECK-NEXT: [[DATA:%.*]] = call <4 x float> @llvm.amdgcn.raw.tbuffer.load.v4f32(<4 x i32> [[RSRC:%.*]], i32 [[ARG0:%.*]], i32 [[ARG1:%.*]], i32 78, i32 0) -; CHECK-NEXT: [[ELT1:%.*]] = extractelement <4 x float> [[DATA]], i32 3 +; CHECK-NEXT: [[ELT1:%.*]] = extractelement <4 x float> [[DATA]], i64 3 ; CHECK-NEXT: ret float [[ELT1]] ; %data = call <4 x float> @llvm.amdgcn.raw.tbuffer.load.v4f32(<4 x i32> %rsrc, i32 %arg0, i32 %arg1, i32 78, i32 0) @@ -2295,7 +2295,7 @@ define amdgpu_ps float @extract_elt1_raw_tbuffer_load_v3f32(<4 x i32> inreg %rsrc, i32 %arg0, i32 inreg %arg1) #0 { ; CHECK-LABEL: @extract_elt1_raw_tbuffer_load_v3f32( ; CHECK-NEXT: [[DATA:%.*]] = call <2 x float> @llvm.amdgcn.raw.tbuffer.load.v2f32(<4 x i32> [[RSRC:%.*]], i32 [[ARG0:%.*]], i32 [[ARG1:%.*]], i32 78, i32 0) -; CHECK-NEXT: [[ELT1:%.*]] = extractelement <2 x float> [[DATA]], i32 1 +; CHECK-NEXT: [[ELT1:%.*]] = extractelement <2 x float> [[DATA]], i64 1 ; CHECK-NEXT: ret float [[ELT1]] ; %data = call <3 x float> @llvm.amdgcn.raw.tbuffer.load.v3f32(<4 x i32> %rsrc, i32 %arg0, i32 %arg1, i32 78, i32 0) @@ -2306,7 +2306,7 @@ define amdgpu_ps float @extract_elt2_raw_tbuffer_load_v3f32(<4 x i32> inreg %rsrc, i32 %arg0, i32 inreg %arg1) #0 { ; CHECK-LABEL: @extract_elt2_raw_tbuffer_load_v3f32( ; CHECK-NEXT: [[DATA:%.*]] = call <3 x float> @llvm.amdgcn.raw.tbuffer.load.v3f32(<4 x i32> [[RSRC:%.*]], i32 [[ARG0:%.*]], i32 [[ARG1:%.*]], i32 78, i32 0) -; CHECK-NEXT: [[ELT1:%.*]] = extractelement <3 x float> [[DATA]], i32 2 +; CHECK-NEXT: [[ELT1:%.*]] = extractelement <3 x float> [[DATA]], i64 2 ; CHECK-NEXT: ret float [[ELT1]] ; %data = call <3 x float> @llvm.amdgcn.raw.tbuffer.load.v3f32(<4 x i32> %rsrc, i32 %arg0, i32 %arg1, i32 78, i32 0) @@ -2367,7 +2367,7 @@ define amdgpu_ps half @extract_elt3_raw_tbuffer_load_v4f16(<4 x i32> inreg %rsrc, i32 %arg0, i32 inreg %arg1) #0 { ; CHECK-LABEL: @extract_elt3_raw_tbuffer_load_v4f16( ; CHECK-NEXT: [[DATA:%.*]] = call <4 x half> @llvm.amdgcn.raw.tbuffer.load.v4f16(<4 x i32> [[RSRC:%.*]], i32 [[ARG0:%.*]], i32 [[ARG1:%.*]], i32 78, i32 0) -; CHECK-NEXT: [[ELT1:%.*]] = extractelement <4 x half> [[DATA]], i32 3 +; CHECK-NEXT: [[ELT1:%.*]] = extractelement <4 x half> [[DATA]], i64 3 ; CHECK-NEXT: ret half [[ELT1]] ; %data = call <4 x half> @llvm.amdgcn.raw.tbuffer.load.v4f16(<4 x i32> %rsrc, i32 %arg0, i32 %arg1, i32 78, i32 0) @@ -2378,7 +2378,7 @@ define amdgpu_ps half @extract_elt2_raw_tbuffer_load_v4f16(<4 x i32> inreg %rsrc, i32 %arg0, i32 inreg %arg1) #0 { ; CHECK-LABEL: @extract_elt2_raw_tbuffer_load_v4f16( ; CHECK-NEXT: [[DATA:%.*]] = call <3 x half> @llvm.amdgcn.raw.tbuffer.load.v3f16(<4 x i32> [[RSRC:%.*]], i32 [[ARG0:%.*]], i32 [[ARG1:%.*]], i32 78, i32 0) -; CHECK-NEXT: [[ELT1:%.*]] = extractelement <3 x half> [[DATA]], i32 2 +; CHECK-NEXT: [[ELT1:%.*]] = extractelement <3 x half> [[DATA]], i64 2 ; CHECK-NEXT: ret half [[ELT1]] ; %data = call <4 x half> @llvm.amdgcn.raw.tbuffer.load.v4f16(<4 x i32> %rsrc, i32 %arg0, i32 %arg1, i32 78, i32 0) @@ -2389,7 +2389,7 @@ define amdgpu_ps half @extract_elt1_raw_tbuffer_load_v4f16(<4 x i32> inreg %rsrc, i32 %arg0, i32 inreg %arg1) #0 { ; CHECK-LABEL: @extract_elt1_raw_tbuffer_load_v4f16( ; CHECK-NEXT: [[DATA:%.*]] = call <2 x half> @llvm.amdgcn.raw.tbuffer.load.v2f16(<4 x i32> [[RSRC:%.*]], i32 [[ARG0:%.*]], i32 [[ARG1:%.*]], i32 78, i32 0) -; CHECK-NEXT: [[ELT1:%.*]] = extractelement <2 x half> [[DATA]], i32 1 +; CHECK-NEXT: [[ELT1:%.*]] = extractelement <2 x half> [[DATA]], i64 1 ; CHECK-NEXT: ret half [[ELT1]] ; %data = call <4 x half> @llvm.amdgcn.raw.tbuffer.load.v4f16(<4 x i32> %rsrc, i32 %arg0, i32 %arg1, i32 78, i32 0) @@ -2456,7 +2456,7 @@ define amdgpu_ps float @extract_elt1_struct_tbuffer_load_v2f32(<4 x i32> inreg %rsrc, i32 %arg0, i32 %arg1, i32 inreg %arg2) #0 { ; CHECK-LABEL: @extract_elt1_struct_tbuffer_load_v2f32( ; CHECK-NEXT: [[DATA:%.*]] = call <2 x float> @llvm.amdgcn.struct.tbuffer.load.v2f32(<4 x i32> [[RSRC:%.*]], i32 [[ARG0:%.*]], i32 [[ARG1:%.*]], i32 [[ARG2:%.*]], i32 78, i32 0) -; CHECK-NEXT: [[ELT1:%.*]] = extractelement <2 x float> [[DATA]], i32 1 +; CHECK-NEXT: [[ELT1:%.*]] = extractelement <2 x float> [[DATA]], i64 1 ; CHECK-NEXT: ret float [[ELT1]] ; %data = call <2 x float> @llvm.amdgcn.struct.tbuffer.load.v2f32(<4 x i32> %rsrc, i32 %arg0, i32 %arg1, i32 %arg2, i32 78, i32 0) @@ -2477,7 +2477,7 @@ define amdgpu_ps float @extract_elt1_struct_tbuffer_load_v4f32(<4 x i32> inreg %rsrc, i32 %arg0, i32 %arg1, i32 inreg %arg2) #0 { ; CHECK-LABEL: @extract_elt1_struct_tbuffer_load_v4f32( ; CHECK-NEXT: [[DATA:%.*]] = call <2 x float> @llvm.amdgcn.struct.tbuffer.load.v2f32(<4 x i32> [[RSRC:%.*]], i32 [[ARG0:%.*]], i32 [[ARG1:%.*]], i32 [[ARG2:%.*]], i32 78, i32 0) -; CHECK-NEXT: [[ELT1:%.*]] = extractelement <2 x float> [[DATA]], i32 1 +; CHECK-NEXT: [[ELT1:%.*]] = extractelement <2 x float> [[DATA]], i64 1 ; CHECK-NEXT: ret float [[ELT1]] ; %data = call <4 x float> @llvm.amdgcn.struct.tbuffer.load.v4f32(<4 x i32> %rsrc, i32 %arg0, i32 %arg1, i32 %arg2, i32 78, i32 0) @@ -2488,7 +2488,7 @@ define amdgpu_ps float @extract_elt2_struct_tbuffer_load_v4f32(<4 x i32> inreg %rsrc, i32 %arg0, i32 %arg1, i32 inreg %arg2) #0 { ; CHECK-LABEL: @extract_elt2_struct_tbuffer_load_v4f32( ; CHECK-NEXT: [[DATA:%.*]] = call <3 x float> @llvm.amdgcn.struct.tbuffer.load.v3f32(<4 x i32> [[RSRC:%.*]], i32 [[ARG0:%.*]], i32 [[ARG1:%.*]], i32 [[ARG2:%.*]], i32 78, i32 0) -; CHECK-NEXT: [[ELT1:%.*]] = extractelement <3 x float> [[DATA]], i32 2 +; CHECK-NEXT: [[ELT1:%.*]] = extractelement <3 x float> [[DATA]], i64 2 ; CHECK-NEXT: ret float [[ELT1]] ; %data = call <4 x float> @llvm.amdgcn.struct.tbuffer.load.v4f32(<4 x i32> %rsrc, i32 %arg0, i32 %arg1, i32 %arg2, i32 78, i32 0) @@ -2499,7 +2499,7 @@ define amdgpu_ps float @extract_elt3_struct_tbuffer_load_v4f32(<4 x i32> inreg %rsrc, i32 %arg0, i32 %arg1, i32 inreg %arg2) #0 { ; CHECK-LABEL: @extract_elt3_struct_tbuffer_load_v4f32( ; CHECK-NEXT: [[DATA:%.*]] = call <4 x float> @llvm.amdgcn.struct.tbuffer.load.v4f32(<4 x i32> [[RSRC:%.*]], i32 [[ARG0:%.*]], i32 [[ARG1:%.*]], i32 [[ARG2:%.*]], i32 78, i32 0) -; CHECK-NEXT: [[ELT1:%.*]] = extractelement <4 x float> [[DATA]], i32 3 +; CHECK-NEXT: [[ELT1:%.*]] = extractelement <4 x float> [[DATA]], i64 3 ; CHECK-NEXT: ret float [[ELT1]] ; %data = call <4 x float> @llvm.amdgcn.struct.tbuffer.load.v4f32(<4 x i32> %rsrc, i32 %arg0, i32 %arg1, i32 %arg2, i32 78, i32 0) @@ -2584,7 +2584,7 @@ define amdgpu_ps float @extract_elt1_struct_tbuffer_load_v3f32(<4 x i32> inreg %rsrc, i32 %arg0, i32 %arg1, i32 inreg %arg2) #0 { ; CHECK-LABEL: @extract_elt1_struct_tbuffer_load_v3f32( ; CHECK-NEXT: [[DATA:%.*]] = call <2 x float> @llvm.amdgcn.struct.tbuffer.load.v2f32(<4 x i32> [[RSRC:%.*]], i32 [[ARG0:%.*]], i32 [[ARG1:%.*]], i32 [[ARG2:%.*]], i32 78, i32 0) -; CHECK-NEXT: [[ELT1:%.*]] = extractelement <2 x float> [[DATA]], i32 1 +; CHECK-NEXT: [[ELT1:%.*]] = extractelement <2 x float> [[DATA]], i64 1 ; CHECK-NEXT: ret float [[ELT1]] ; %data = call <3 x float> @llvm.amdgcn.struct.tbuffer.load.v3f32(<4 x i32> %rsrc, i32 %arg0, i32 %arg1, i32 %arg2, i32 78, i32 0) @@ -2595,7 +2595,7 @@ define amdgpu_ps float @extract_elt2_struct_tbuffer_load_v3f32(<4 x i32> inreg %rsrc, i32 %arg0, i32 %arg1, i32 inreg %arg2) #0 { ; CHECK-LABEL: @extract_elt2_struct_tbuffer_load_v3f32( ; CHECK-NEXT: [[DATA:%.*]] = call <3 x float> @llvm.amdgcn.struct.tbuffer.load.v3f32(<4 x i32> [[RSRC:%.*]], i32 [[ARG0:%.*]], i32 [[ARG1:%.*]], i32 [[ARG2:%.*]], i32 78, i32 0) -; CHECK-NEXT: [[ELT1:%.*]] = extractelement <3 x float> [[DATA]], i32 2 +; CHECK-NEXT: [[ELT1:%.*]] = extractelement <3 x float> [[DATA]], i64 2 ; CHECK-NEXT: ret float [[ELT1]] ; %data = call <3 x float> @llvm.amdgcn.struct.tbuffer.load.v3f32(<4 x i32> %rsrc, i32 %arg0, i32 %arg1, i32 %arg2, i32 78, i32 0) @@ -2697,7 +2697,7 @@ define amdgpu_ps float @extract_elt1_tbuffer_load_v2f32(<4 x i32> inreg %rsrc, i32 %arg0, i32 %arg1) #0 { ; CHECK-LABEL: @extract_elt1_tbuffer_load_v2f32( ; CHECK-NEXT: [[DATA:%.*]] = call <2 x float> @llvm.amdgcn.tbuffer.load.v2f32(<4 x i32> [[RSRC:%.*]], i32 [[ARG0:%.*]], i32 [[ARG1:%.*]], i32 0, i32 0, i32 14, i32 4, i1 false, i1 false) -; CHECK-NEXT: [[ELT1:%.*]] = extractelement <2 x float> [[DATA]], i32 1 +; CHECK-NEXT: [[ELT1:%.*]] = extractelement <2 x float> [[DATA]], i64 1 ; CHECK-NEXT: ret float [[ELT1]] ; %data = call <2 x float> @llvm.amdgcn.tbuffer.load.v2f32(<4 x i32> %rsrc, i32 %arg0, i32 %arg1, i32 0, i32 0, i32 14, i32 4, i1 false, i1 false) @@ -2718,7 +2718,7 @@ define amdgpu_ps float @extract_elt1_tbuffer_load_v4f32(<4 x i32> inreg %rsrc, i32 %arg0, i32 %arg1) #0 { ; CHECK-LABEL: @extract_elt1_tbuffer_load_v4f32( ; CHECK-NEXT: [[DATA:%.*]] = call <2 x float> @llvm.amdgcn.tbuffer.load.v2f32(<4 x i32> [[RSRC:%.*]], i32 [[ARG0:%.*]], i32 [[ARG1:%.*]], i32 0, i32 0, i32 14, i32 4, i1 false, i1 false) -; CHECK-NEXT: [[ELT1:%.*]] = extractelement <2 x float> [[DATA]], i32 1 +; CHECK-NEXT: [[ELT1:%.*]] = extractelement <2 x float> [[DATA]], i64 1 ; CHECK-NEXT: ret float [[ELT1]] ; %data = call <4 x float> @llvm.amdgcn.tbuffer.load.v4f32(<4 x i32> %rsrc, i32 %arg0, i32 %arg1, i32 0, i32 0, i32 14, i32 4, i1 false, i1 false) @@ -2729,7 +2729,7 @@ define amdgpu_ps float @extract_elt2_tbuffer_load_v4f32(<4 x i32> inreg %rsrc, i32 %arg0, i32 %arg1) #0 { ; CHECK-LABEL: @extract_elt2_tbuffer_load_v4f32( ; CHECK-NEXT: [[DATA:%.*]] = call <3 x float> @llvm.amdgcn.tbuffer.load.v3f32(<4 x i32> [[RSRC:%.*]], i32 [[ARG0:%.*]], i32 [[ARG1:%.*]], i32 0, i32 0, i32 14, i32 4, i1 false, i1 false) -; CHECK-NEXT: [[ELT1:%.*]] = extractelement <3 x float> [[DATA]], i32 2 +; CHECK-NEXT: [[ELT1:%.*]] = extractelement <3 x float> [[DATA]], i64 2 ; CHECK-NEXT: ret float [[ELT1]] ; %data = call <4 x float> @llvm.amdgcn.tbuffer.load.v4f32(<4 x i32> %rsrc, i32 %arg0, i32 %arg1, i32 0, i32 0, i32 14, i32 4, i1 false, i1 false) @@ -2740,7 +2740,7 @@ define amdgpu_ps float @extract_elt3_tbuffer_load_v4f32(<4 x i32> inreg %rsrc, i32 %arg0, i32 %arg1) #0 { ; CHECK-LABEL: @extract_elt3_tbuffer_load_v4f32( ; CHECK-NEXT: [[DATA:%.*]] = call <4 x float> @llvm.amdgcn.tbuffer.load.v4f32(<4 x i32> [[RSRC:%.*]], i32 [[ARG0:%.*]], i32 [[ARG1:%.*]], i32 0, i32 0, i32 14, i32 4, i1 false, i1 false) -; CHECK-NEXT: [[ELT1:%.*]] = extractelement <4 x float> [[DATA]], i32 3 +; CHECK-NEXT: [[ELT1:%.*]] = extractelement <4 x float> [[DATA]], i64 3 ; CHECK-NEXT: ret float [[ELT1]] ; %data = call <4 x float> @llvm.amdgcn.tbuffer.load.v4f32(<4 x i32> %rsrc, i32 %arg0, i32 %arg1, i32 0, i32 0, i32 14, i32 4, i1 false, i1 false) @@ -2825,7 +2825,7 @@ define amdgpu_ps float @extract_elt1_tbuffer_load_v3f32(<4 x i32> inreg %rsrc, i32 %arg0, i32 %arg1) #0 { ; CHECK-LABEL: @extract_elt1_tbuffer_load_v3f32( ; CHECK-NEXT: [[DATA:%.*]] = call <2 x float> @llvm.amdgcn.tbuffer.load.v2f32(<4 x i32> [[RSRC:%.*]], i32 [[ARG0:%.*]], i32 [[ARG1:%.*]], i32 0, i32 0, i32 14, i32 4, i1 false, i1 false) -; CHECK-NEXT: [[ELT1:%.*]] = extractelement <2 x float> [[DATA]], i32 1 +; CHECK-NEXT: [[ELT1:%.*]] = extractelement <2 x float> [[DATA]], i64 1 ; CHECK-NEXT: ret float [[ELT1]] ; %data = call <3 x float> @llvm.amdgcn.tbuffer.load.v3f32(<4 x i32> %rsrc, i32 %arg0, i32 %arg1, i32 0, i32 0, i32 14, i32 4, i1 false, i1 false) @@ -2836,7 +2836,7 @@ define amdgpu_ps float @extract_elt2_tbuffer_load_v3f32(<4 x i32> inreg %rsrc, i32 %arg0, i32 %arg1) #0 { ; CHECK-LABEL: @extract_elt2_tbuffer_load_v3f32( ; CHECK-NEXT: [[DATA:%.*]] = call <3 x float> @llvm.amdgcn.tbuffer.load.v3f32(<4 x i32> [[RSRC:%.*]], i32 [[ARG0:%.*]], i32 [[ARG1:%.*]], i32 0, i32 0, i32 14, i32 4, i1 false, i1 false) -; CHECK-NEXT: [[ELT1:%.*]] = extractelement <3 x float> [[DATA]], i32 2 +; CHECK-NEXT: [[ELT1:%.*]] = extractelement <3 x float> [[DATA]], i64 2 ; CHECK-NEXT: ret float [[ELT1]] ; %data = call <3 x float> @llvm.amdgcn.tbuffer.load.v3f32(<4 x i32> %rsrc, i32 %arg0, i32 %arg1, i32 0, i32 0, i32 14, i32 4, i1 false, i1 false) @@ -2914,7 +2914,7 @@ ; CHECK-LABEL: @extract_elt0_image_sample_1d_v4f32_f32_tfe( ; CHECK-NEXT: [[DATA:%.*]] = call { <4 x float>, i32 } @llvm.amdgcn.image.sample.1d.sl_v4f32i32s.f32(i32 15, float [[VADDR:%.*]], <8 x i32> [[SAMPLER:%.*]], <4 x i32> [[RSRC:%.*]], i1 false, i32 1, i32 0) ; CHECK-NEXT: [[DATA_VEC:%.*]] = extractvalue { <4 x float>, i32 } [[DATA]], 0 -; CHECK-NEXT: [[ELT0:%.*]] = extractelement <4 x float> [[DATA_VEC]], i32 0 +; CHECK-NEXT: [[ELT0:%.*]] = extractelement <4 x float> [[DATA_VEC]], i64 0 ; CHECK-NEXT: ret float [[ELT0]] ; %data = call {<4 x float>,i32} @llvm.amdgcn.image.sample.1d.sl_v4f32i32s.f32(i32 15, float %vaddr, <8 x i32> %sampler, <4 x i32> %rsrc, i1 false, i32 1, i32 0) @@ -2928,7 +2928,7 @@ ; CHECK-LABEL: @extract_elt0_image_sample_1d_v4f32_f32_lwe( ; CHECK-NEXT: [[DATA:%.*]] = call { <4 x float>, i32 } @llvm.amdgcn.image.sample.1d.sl_v4f32i32s.f32(i32 15, float [[VADDR:%.*]], <8 x i32> [[SAMPLER:%.*]], <4 x i32> [[RSRC:%.*]], i1 false, i32 2, i32 0) ; CHECK-NEXT: [[DATA_VEC:%.*]] = extractvalue { <4 x float>, i32 } [[DATA]], 0 -; CHECK-NEXT: [[ELT0:%.*]] = extractelement <4 x float> [[DATA_VEC]], i32 0 +; CHECK-NEXT: [[ELT0:%.*]] = extractelement <4 x float> [[DATA_VEC]], i64 0 ; CHECK-NEXT: ret float [[ELT0]] ; %data = call {<4 x float>,i32} @llvm.amdgcn.image.sample.1d.sl_v4f32i32s.f32(i32 15, float %vaddr, <8 x i32> %sampler, <4 x i32> %rsrc, i1 false, i32 2, i32 0) @@ -3029,7 +3029,7 @@ define amdgpu_ps <2 x float> @extract_elt0_elt1_dmask_0001_image_sample_1d_v4f32_f32(float %s, <8 x i32> inreg %sampler, <4 x i32> inreg %rsrc) #0 { ; CHECK-LABEL: @extract_elt0_elt1_dmask_0001_image_sample_1d_v4f32_f32( ; CHECK-NEXT: [[DATA:%.*]] = call float @llvm.amdgcn.image.sample.1d.f32.f32(i32 1, float [[S:%.*]], <8 x i32> [[SAMPLER:%.*]], <4 x i32> [[RSRC:%.*]], i1 false, i32 0, i32 0) -; CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x float> undef, float [[DATA]], i32 0 +; CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x float> undef, float [[DATA]], i64 0 ; CHECK-NEXT: ret <2 x float> [[TMP1]] ; %data = call <4 x float> @llvm.amdgcn.image.sample.1d.v4f32.f32(i32 1, float %s, <8 x i32> %sampler, <4 x i32> %rsrc, i1 false, i32 0, i32 0) @@ -3070,7 +3070,7 @@ define amdgpu_ps <3 x float> @extract_elt0_elt1_elt2_dmask_0001_image_sample_1d_v4f32_f32(float %s, <8 x i32> inreg %sampler, <4 x i32> inreg %rsrc) #0 { ; CHECK-LABEL: @extract_elt0_elt1_elt2_dmask_0001_image_sample_1d_v4f32_f32( ; CHECK-NEXT: [[DATA:%.*]] = call float @llvm.amdgcn.image.sample.1d.f32.f32(i32 1, float [[S:%.*]], <8 x i32> [[SAMPLER:%.*]], <4 x i32> [[RSRC:%.*]], i1 false, i32 0, i32 0) -; CHECK-NEXT: [[TMP1:%.*]] = insertelement <3 x float> undef, float [[DATA]], i32 0 +; CHECK-NEXT: [[TMP1:%.*]] = insertelement <3 x float> undef, float [[DATA]], i64 0 ; CHECK-NEXT: ret <3 x float> [[TMP1]] ; %data = call <4 x float> @llvm.amdgcn.image.sample.1d.v4f32.f32(i32 1, float %s, <8 x i32> %sampler, <4 x i32> %rsrc, i1 false, i32 0, i32 0) @@ -3822,7 +3822,7 @@ define amdgpu_ps float @extract_elt0_image_gather4_2d_v4f32_f32(float %s, float %t, <8 x i32> inreg %sampler, <4 x i32> inreg %rsrc) #0 { ; CHECK-LABEL: @extract_elt0_image_gather4_2d_v4f32_f32( ; CHECK-NEXT: [[DATA:%.*]] = call <4 x float> @llvm.amdgcn.image.gather4.2d.v4f32.f32(i32 1, float [[S:%.*]], float [[T:%.*]], <8 x i32> [[SAMPLER:%.*]], <4 x i32> [[RSRC:%.*]], i1 false, i32 0, i32 0) -; CHECK-NEXT: [[ELT0:%.*]] = extractelement <4 x float> [[DATA]], i32 0 +; CHECK-NEXT: [[ELT0:%.*]] = extractelement <4 x float> [[DATA]], i64 0 ; CHECK-NEXT: ret float [[ELT0]] ; %data = call <4 x float> @llvm.amdgcn.image.gather4.2d.v4f32.f32(i32 1, float %s, float %t, <8 x i32> %sampler, <4 x i32> %rsrc, i1 false, i32 0, i32 0) @@ -3839,7 +3839,7 @@ define amdgpu_ps float @extract_elt0_image_gather4_cl_2d_v4f32_f32(float %s, float %t, float %clamp, <8 x i32> inreg %sampler, <4 x i32> inreg %rsrc) #0 { ; CHECK-LABEL: @extract_elt0_image_gather4_cl_2d_v4f32_f32( ; CHECK-NEXT: [[DATA:%.*]] = call <4 x float> @llvm.amdgcn.image.gather4.cl.2d.v4f32.f32(i32 2, float [[S:%.*]], float [[T:%.*]], float [[CLAMP:%.*]], <8 x i32> [[SAMPLER:%.*]], <4 x i32> [[RSRC:%.*]], i1 false, i32 0, i32 0) -; CHECK-NEXT: [[ELT0:%.*]] = extractelement <4 x float> [[DATA]], i32 0 +; CHECK-NEXT: [[ELT0:%.*]] = extractelement <4 x float> [[DATA]], i64 0 ; CHECK-NEXT: ret float [[ELT0]] ; %data = call <4 x float> @llvm.amdgcn.image.gather4.cl.2d.v4f32.f32(i32 2, float %s, float %t, float %clamp, <8 x i32> %sampler, <4 x i32> %rsrc, i1 false, i32 0, i32 0) @@ -3856,7 +3856,7 @@ define amdgpu_ps float @extract_elt0_image_gather4_l_2d_v4f32_f32(float %s, float %t, float %lod, <8 x i32> inreg %sampler, <4 x i32> inreg %rsrc) #0 { ; CHECK-LABEL: @extract_elt0_image_gather4_l_2d_v4f32_f32( ; CHECK-NEXT: [[DATA:%.*]] = call <4 x float> @llvm.amdgcn.image.gather4.l.2d.v4f32.f32(i32 4, float [[S:%.*]], float [[T:%.*]], float [[LOD:%.*]], <8 x i32> [[SAMPLER:%.*]], <4 x i32> [[RSRC:%.*]], i1 false, i32 0, i32 0) -; CHECK-NEXT: [[ELT0:%.*]] = extractelement <4 x float> [[DATA]], i32 0 +; CHECK-NEXT: [[ELT0:%.*]] = extractelement <4 x float> [[DATA]], i64 0 ; CHECK-NEXT: ret float [[ELT0]] ; %data = call <4 x float> @llvm.amdgcn.image.gather4.l.2d.v4f32.f32(i32 4, float %s, float %t, float %lod, <8 x i32> %sampler, <4 x i32> %rsrc, i1 false, i32 0, i32 0) @@ -3873,7 +3873,7 @@ define amdgpu_ps float @extract_elt0_image_gather4_b_2darray_v4f32_f32_f32(float %bias, float %s, float %t, float %slice, <8 x i32> inreg %sampler, <4 x i32> inreg %rsrc) #0 { ; CHECK-LABEL: @extract_elt0_image_gather4_b_2darray_v4f32_f32_f32( ; CHECK-NEXT: [[DATA:%.*]] = call <4 x float> @llvm.amdgcn.image.gather4.b.2darray.v4f32.f32.f32(i32 8, float [[BIAS:%.*]], float [[S:%.*]], float [[T:%.*]], float [[SLICE:%.*]], <8 x i32> [[SAMPLER:%.*]], <4 x i32> [[RSRC:%.*]], i1 false, i32 0, i32 0) -; CHECK-NEXT: [[ELT0:%.*]] = extractelement <4 x float> [[DATA]], i32 0 +; CHECK-NEXT: [[ELT0:%.*]] = extractelement <4 x float> [[DATA]], i64 0 ; CHECK-NEXT: ret float [[ELT0]] ; %data = call <4 x float> @llvm.amdgcn.image.gather4.b.2darray.v4f32.f32.f32(i32 8, float %bias, float %s, float %t, float %slice, <8 x i32> %sampler, <4 x i32> %rsrc, i1 false, i32 0, i32 0) @@ -3890,7 +3890,7 @@ define amdgpu_ps float @extract_elt0_image_gather4_b_cl_cube_v4f32_f32_f32(float %bias, float %s, float %t, float %face, float %clamp, <8 x i32> inreg %sampler, <4 x i32> inreg %rsrc) #0 { ; CHECK-LABEL: @extract_elt0_image_gather4_b_cl_cube_v4f32_f32_f32( ; CHECK-NEXT: [[DATA:%.*]] = call <4 x float> @llvm.amdgcn.image.gather4.b.cl.cube.v4f32.f32.f32(i32 1, float [[BIAS:%.*]], float [[S:%.*]], float [[T:%.*]], float [[FACE:%.*]], float [[CLAMP:%.*]], <8 x i32> [[SAMPLER:%.*]], <4 x i32> [[RSRC:%.*]], i1 false, i32 0, i32 0) -; CHECK-NEXT: [[ELT0:%.*]] = extractelement <4 x float> [[DATA]], i32 0 +; CHECK-NEXT: [[ELT0:%.*]] = extractelement <4 x float> [[DATA]], i64 0 ; CHECK-NEXT: ret float [[ELT0]] ; %data = call <4 x float> @llvm.amdgcn.image.gather4.b.cl.cube.v4f32.f32.f32(i32 1, float %bias, float %s, float %t, float %face, float %clamp, <8 x i32> %sampler, <4 x i32> %rsrc, i1 false, i32 0, i32 0) @@ -3907,7 +3907,7 @@ define amdgpu_ps float @extract_elt0_image_gather4_lz_2d_v4f32_f16(half %s, half %t, <8 x i32> inreg %sampler, <4 x i32> inreg %rsrc) #0 { ; CHECK-LABEL: @extract_elt0_image_gather4_lz_2d_v4f32_f16( ; CHECK-NEXT: [[DATA:%.*]] = call <4 x float> @llvm.amdgcn.image.gather4.lz.2d.v4f32.f16(i32 1, half [[S:%.*]], half [[T:%.*]], <8 x i32> [[SAMPLER:%.*]], <4 x i32> [[RSRC:%.*]], i1 false, i32 0, i32 0) -; CHECK-NEXT: [[ELT0:%.*]] = extractelement <4 x float> [[DATA]], i32 0 +; CHECK-NEXT: [[ELT0:%.*]] = extractelement <4 x float> [[DATA]], i64 0 ; CHECK-NEXT: ret float [[ELT0]] ; %data = call <4 x float> @llvm.amdgcn.image.gather4.lz.2d.v4f32.f16(i32 1, half %s, half %t, <8 x i32> %sampler, <4 x i32> %rsrc, i1 false, i32 0, i32 0) @@ -3924,7 +3924,7 @@ define amdgpu_ps float @extract_elt0_image_gather4_o_2d_v4f32_f32(i32 %offset, float %s, float %t, <8 x i32> inreg %gather4r, <4 x i32> inreg %rsrc) #0 { ; CHECK-LABEL: @extract_elt0_image_gather4_o_2d_v4f32_f32( ; CHECK-NEXT: [[DATA:%.*]] = call <4 x float> @llvm.amdgcn.image.gather4.o.2d.v4f32.f32(i32 1, i32 [[OFFSET:%.*]], float [[S:%.*]], float [[T:%.*]], <8 x i32> [[GATHER4R:%.*]], <4 x i32> [[RSRC:%.*]], i1 false, i32 0, i32 0) -; CHECK-NEXT: [[ELT0:%.*]] = extractelement <4 x float> [[DATA]], i32 0 +; CHECK-NEXT: [[ELT0:%.*]] = extractelement <4 x float> [[DATA]], i64 0 ; CHECK-NEXT: ret float [[ELT0]] ; %data = call <4 x float> @llvm.amdgcn.image.gather4.o.2d.v4f32.f32(i32 1, i32 %offset, float %s, float %t, <8 x i32> %gather4r, <4 x i32> %rsrc, i1 false, i32 0, i32 0) @@ -3941,7 +3941,7 @@ define amdgpu_ps float @extract_elt0_image_gather4_cl_o_2d_v4f32_f32(i32 %offset, float %s, float %t, float %clamp, <8 x i32> inreg %gather4r, <4 x i32> inreg %rsrc) #0 { ; CHECK-LABEL: @extract_elt0_image_gather4_cl_o_2d_v4f32_f32( ; CHECK-NEXT: [[DATA:%.*]] = call <4 x float> @llvm.amdgcn.image.gather4.cl.o.2d.v4f32.f32(i32 1, i32 [[OFFSET:%.*]], float [[S:%.*]], float [[T:%.*]], float [[CLAMP:%.*]], <8 x i32> [[GATHER4R:%.*]], <4 x i32> [[RSRC:%.*]], i1 false, i32 0, i32 0) -; CHECK-NEXT: [[ELT0:%.*]] = extractelement <4 x float> [[DATA]], i32 0 +; CHECK-NEXT: [[ELT0:%.*]] = extractelement <4 x float> [[DATA]], i64 0 ; CHECK-NEXT: ret float [[ELT0]] ; %data = call <4 x float> @llvm.amdgcn.image.gather4.cl.o.2d.v4f32.f32(i32 1, i32 %offset, float %s, float %t, float %clamp, <8 x i32> %gather4r, <4 x i32> %rsrc, i1 false, i32 0, i32 0) @@ -3958,7 +3958,7 @@ define amdgpu_ps float @extract_elt0_image_gather4_l_o_2d_v4f32_f32(i32 %offset, float %s, float %t, float %lod, <8 x i32> inreg %gather4r, <4 x i32> inreg %rsrc) #0 { ; CHECK-LABEL: @extract_elt0_image_gather4_l_o_2d_v4f32_f32( ; CHECK-NEXT: [[DATA:%.*]] = call <4 x float> @llvm.amdgcn.image.gather4.l.o.2d.v4f32.f32(i32 1, i32 [[OFFSET:%.*]], float [[S:%.*]], float [[T:%.*]], float [[LOD:%.*]], <8 x i32> [[GATHER4R:%.*]], <4 x i32> [[RSRC:%.*]], i1 false, i32 0, i32 0) -; CHECK-NEXT: [[ELT0:%.*]] = extractelement <4 x float> [[DATA]], i32 0 +; CHECK-NEXT: [[ELT0:%.*]] = extractelement <4 x float> [[DATA]], i64 0 ; CHECK-NEXT: ret float [[ELT0]] ; %data = call <4 x float> @llvm.amdgcn.image.gather4.l.o.2d.v4f32.f32(i32 1, i32 %offset, float %s, float %t, float %lod, <8 x i32> %gather4r, <4 x i32> %rsrc, i1 false, i32 0, i32 0) @@ -3975,7 +3975,7 @@ define amdgpu_ps float @extract_elt0_image_gather4_b_o_2d_v4f32_f32_f32(i32 %offset, float %bias, float %s, float %t, <8 x i32> inreg %gather4r, <4 x i32> inreg %rsrc) #0 { ; CHECK-LABEL: @extract_elt0_image_gather4_b_o_2d_v4f32_f32_f32( ; CHECK-NEXT: [[DATA:%.*]] = call <4 x float> @llvm.amdgcn.image.gather4.b.o.2d.v4f32.f32.f32(i32 1, i32 [[OFFSET:%.*]], float [[BIAS:%.*]], float [[S:%.*]], float [[T:%.*]], <8 x i32> [[GATHER4R:%.*]], <4 x i32> [[RSRC:%.*]], i1 false, i32 0, i32 0) -; CHECK-NEXT: [[ELT0:%.*]] = extractelement <4 x float> [[DATA]], i32 0 +; CHECK-NEXT: [[ELT0:%.*]] = extractelement <4 x float> [[DATA]], i64 0 ; CHECK-NEXT: ret float [[ELT0]] ; %data = call <4 x float> @llvm.amdgcn.image.gather4.b.o.2d.v4f32.f32.f32(i32 1, i32 %offset, float %bias, float %s, float %t, <8 x i32> %gather4r, <4 x i32> %rsrc, i1 false, i32 0, i32 0) @@ -3992,7 +3992,7 @@ define amdgpu_ps float @extract_elt0_image_gather4_b_cl_o_2d_v4f32_f32_f32(i32 %offset, float %bias, float %s, float %t, float %clamp, <8 x i32> inreg %gather4r, <4 x i32> inreg %rsrc) #0 { ; CHECK-LABEL: @extract_elt0_image_gather4_b_cl_o_2d_v4f32_f32_f32( ; CHECK-NEXT: [[DATA:%.*]] = call <4 x float> @llvm.amdgcn.image.gather4.b.cl.o.2d.v4f32.f32.f32(i32 1, i32 [[OFFSET:%.*]], float [[BIAS:%.*]], float [[S:%.*]], float [[T:%.*]], float [[CLAMP:%.*]], <8 x i32> [[GATHER4R:%.*]], <4 x i32> [[RSRC:%.*]], i1 false, i32 0, i32 0) -; CHECK-NEXT: [[ELT0:%.*]] = extractelement <4 x float> [[DATA]], i32 0 +; CHECK-NEXT: [[ELT0:%.*]] = extractelement <4 x float> [[DATA]], i64 0 ; CHECK-NEXT: ret float [[ELT0]] ; %data = call <4 x float> @llvm.amdgcn.image.gather4.b.cl.o.2d.v4f32.f32.f32(i32 1, i32 %offset, float %bias, float %s, float %t, float %clamp, <8 x i32> %gather4r, <4 x i32> %rsrc, i1 false, i32 0, i32 0) @@ -4009,7 +4009,7 @@ define amdgpu_ps float @extract_elt0_image_gather4_lz_o_2d_v4f32_f32(i32 %offset, float %s, float %t, <8 x i32> inreg %gather4r, <4 x i32> inreg %rsrc) #0 { ; CHECK-LABEL: @extract_elt0_image_gather4_lz_o_2d_v4f32_f32( ; CHECK-NEXT: [[DATA:%.*]] = call <4 x float> @llvm.amdgcn.image.gather4.lz.o.2d.v4f32.f32(i32 1, i32 [[OFFSET:%.*]], float [[S:%.*]], float [[T:%.*]], <8 x i32> [[GATHER4R:%.*]], <4 x i32> [[RSRC:%.*]], i1 false, i32 0, i32 0) -; CHECK-NEXT: [[ELT0:%.*]] = extractelement <4 x float> [[DATA]], i32 0 +; CHECK-NEXT: [[ELT0:%.*]] = extractelement <4 x float> [[DATA]], i64 0 ; CHECK-NEXT: ret float [[ELT0]] ; %data = call <4 x float> @llvm.amdgcn.image.gather4.lz.o.2d.v4f32.f32(i32 1, i32 %offset, float %s, float %t, <8 x i32> %gather4r, <4 x i32> %rsrc, i1 false, i32 0, i32 0) @@ -4026,7 +4026,7 @@ define amdgpu_ps float @extract_elt0_image_gather4_c_o_2d_v4f32_f32(i32 %offset, float %zcompare, float %s, float %t, <8 x i32> inreg %gather4r, <4 x i32> inreg %rsrc) #0 { ; CHECK-LABEL: @extract_elt0_image_gather4_c_o_2d_v4f32_f32( ; CHECK-NEXT: [[DATA:%.*]] = call <4 x float> @llvm.amdgcn.image.gather4.c.o.2d.v4f32.f32(i32 1, i32 [[OFFSET:%.*]], float [[ZCOMPARE:%.*]], float [[S:%.*]], float [[T:%.*]], <8 x i32> [[GATHER4R:%.*]], <4 x i32> [[RSRC:%.*]], i1 false, i32 0, i32 0) -; CHECK-NEXT: [[ELT0:%.*]] = extractelement <4 x float> [[DATA]], i32 0 +; CHECK-NEXT: [[ELT0:%.*]] = extractelement <4 x float> [[DATA]], i64 0 ; CHECK-NEXT: ret float [[ELT0]] ; %data = call <4 x float> @llvm.amdgcn.image.gather4.c.o.2d.v4f32.f32(i32 1, i32 %offset, float %zcompare, float %s, float %t, <8 x i32> %gather4r, <4 x i32> %rsrc, i1 false, i32 0, i32 0) @@ -4043,7 +4043,7 @@ define amdgpu_ps float @extract_elt0_image_gather4_c_cl_o_2d_v4f32_f32(i32 %offset, float %zcompare, float %s, float %t, float %clamp, <8 x i32> inreg %gather4r, <4 x i32> inreg %rsrc) #0 { ; CHECK-LABEL: @extract_elt0_image_gather4_c_cl_o_2d_v4f32_f32( ; CHECK-NEXT: [[DATA:%.*]] = call <4 x float> @llvm.amdgcn.image.gather4.c.cl.o.2d.v4f32.f32(i32 1, i32 [[OFFSET:%.*]], float [[ZCOMPARE:%.*]], float [[S:%.*]], float [[T:%.*]], float [[CLAMP:%.*]], <8 x i32> [[GATHER4R:%.*]], <4 x i32> [[RSRC:%.*]], i1 false, i32 0, i32 0) -; CHECK-NEXT: [[ELT0:%.*]] = extractelement <4 x float> [[DATA]], i32 0 +; CHECK-NEXT: [[ELT0:%.*]] = extractelement <4 x float> [[DATA]], i64 0 ; CHECK-NEXT: ret float [[ELT0]] ; %data = call <4 x float> @llvm.amdgcn.image.gather4.c.cl.o.2d.v4f32.f32(i32 1, i32 %offset, float %zcompare, float %s, float %t, float %clamp, <8 x i32> %gather4r, <4 x i32> %rsrc, i1 false, i32 0, i32 0) @@ -4060,7 +4060,7 @@ define amdgpu_ps float @extract_elt0_image_gather4_c_l_o_2d_v4f32_f32(i32 %offset, float %zcompare, float %s, float %t, float %lod, <8 x i32> inreg %gather4r, <4 x i32> inreg %rsrc) #0 { ; CHECK-LABEL: @extract_elt0_image_gather4_c_l_o_2d_v4f32_f32( ; CHECK-NEXT: [[DATA:%.*]] = call <4 x float> @llvm.amdgcn.image.gather4.c.l.o.2d.v4f32.f32(i32 1, i32 [[OFFSET:%.*]], float [[ZCOMPARE:%.*]], float [[S:%.*]], float [[T:%.*]], float [[LOD:%.*]], <8 x i32> [[GATHER4R:%.*]], <4 x i32> [[RSRC:%.*]], i1 false, i32 0, i32 0) -; CHECK-NEXT: [[ELT0:%.*]] = extractelement <4 x float> [[DATA]], i32 0 +; CHECK-NEXT: [[ELT0:%.*]] = extractelement <4 x float> [[DATA]], i64 0 ; CHECK-NEXT: ret float [[ELT0]] ; %data = call <4 x float> @llvm.amdgcn.image.gather4.c.l.o.2d.v4f32.f32(i32 1, i32 %offset, float %zcompare, float %s, float %t, float %lod, <8 x i32> %gather4r, <4 x i32> %rsrc, i1 false, i32 0, i32 0) @@ -4077,7 +4077,7 @@ define amdgpu_ps float @extract_elt0_image_gather4_c_b_o_2d_v4f32_f32_f32(i32 %offset, float %bias, float %zcompare, float %s, float %t, <8 x i32> inreg %gather4r, <4 x i32> inreg %rsrc) #0 { ; CHECK-LABEL: @extract_elt0_image_gather4_c_b_o_2d_v4f32_f32_f32( ; CHECK-NEXT: [[DATA:%.*]] = call <4 x float> @llvm.amdgcn.image.gather4.c.b.o.2d.v4f32.f32.f32(i32 1, i32 [[OFFSET:%.*]], float [[BIAS:%.*]], float [[ZCOMPARE:%.*]], float [[S:%.*]], float [[T:%.*]], <8 x i32> [[GATHER4R:%.*]], <4 x i32> [[RSRC:%.*]], i1 false, i32 0, i32 0) -; CHECK-NEXT: [[ELT0:%.*]] = extractelement <4 x float> [[DATA]], i32 0 +; CHECK-NEXT: [[ELT0:%.*]] = extractelement <4 x float> [[DATA]], i64 0 ; CHECK-NEXT: ret float [[ELT0]] ; %data = call <4 x float> @llvm.amdgcn.image.gather4.c.b.o.2d.v4f32.f32.f32(i32 1, i32 %offset, float %bias, float %zcompare, float %s, float %t, <8 x i32> %gather4r, <4 x i32> %rsrc, i1 false, i32 0, i32 0) @@ -4094,7 +4094,7 @@ define amdgpu_ps float @extract_elt0_image_gather4_c_b_cl_o_2d_v4f32_f32_f32(i32 %offset, float %bias, float %zcompare, float %s, float %t, float %clamp, <8 x i32> inreg %gather4r, <4 x i32> inreg %rsrc) #0 { ; CHECK-LABEL: @extract_elt0_image_gather4_c_b_cl_o_2d_v4f32_f32_f32( ; CHECK-NEXT: [[DATA:%.*]] = call <4 x float> @llvm.amdgcn.image.gather4.c.b.cl.o.2d.v4f32.f32.f32(i32 1, i32 [[OFFSET:%.*]], float [[BIAS:%.*]], float [[ZCOMPARE:%.*]], float [[S:%.*]], float [[T:%.*]], float [[CLAMP:%.*]], <8 x i32> [[GATHER4R:%.*]], <4 x i32> [[RSRC:%.*]], i1 false, i32 0, i32 0) -; CHECK-NEXT: [[ELT0:%.*]] = extractelement <4 x float> [[DATA]], i32 0 +; CHECK-NEXT: [[ELT0:%.*]] = extractelement <4 x float> [[DATA]], i64 0 ; CHECK-NEXT: ret float [[ELT0]] ; %data = call <4 x float> @llvm.amdgcn.image.gather4.c.b.cl.o.2d.v4f32.f32.f32(i32 1, i32 %offset, float %bias, float %zcompare, float %s, float %t, float %clamp, <8 x i32> %gather4r, <4 x i32> %rsrc, i1 false, i32 0, i32 0) @@ -4111,7 +4111,7 @@ define amdgpu_ps float @extract_elt0_image_gather4_c_lz_o_2d_v4f32_f32(i32 %offset, float %zcompare, float %s, float %t, <8 x i32> inreg %gather4r, <4 x i32> inreg %rsrc) #0 { ; CHECK-LABEL: @extract_elt0_image_gather4_c_lz_o_2d_v4f32_f32( ; CHECK-NEXT: [[DATA:%.*]] = call <4 x float> @llvm.amdgcn.image.gather4.c.lz.o.2d.v4f32.f32(i32 1, i32 [[OFFSET:%.*]], float [[ZCOMPARE:%.*]], float [[S:%.*]], float [[T:%.*]], <8 x i32> [[GATHER4R:%.*]], <4 x i32> [[RSRC:%.*]], i1 false, i32 0, i32 0) -; CHECK-NEXT: [[ELT0:%.*]] = extractelement <4 x float> [[DATA]], i32 0 +; CHECK-NEXT: [[ELT0:%.*]] = extractelement <4 x float> [[DATA]], i64 0 ; CHECK-NEXT: ret float [[ELT0]] ; %data = call <4 x float> @llvm.amdgcn.image.gather4.c.lz.o.2d.v4f32.f32(i32 1, i32 %offset, float %zcompare, float %s, float %t, <8 x i32> %gather4r, <4 x i32> %rsrc, i1 false, i32 0, i32 0) @@ -4193,7 +4193,7 @@ ; CHECK-LABEL: @extract_elt0_tfe_image_load_1d_v4f32i32_i32( ; CHECK-NEXT: [[DATA:%.*]] = call { <4 x float>, i32 } @llvm.amdgcn.image.load.1d.sl_v4f32i32s.i32(i32 15, i32 [[S:%.*]], <8 x i32> [[RSRC:%.*]], i32 0, i32 1) ; CHECK-NEXT: [[RGBA:%.*]] = extractvalue { <4 x float>, i32 } [[DATA]], 0 -; CHECK-NEXT: [[ELT0:%.*]] = extractelement <4 x float> [[RGBA]], i32 0 +; CHECK-NEXT: [[ELT0:%.*]] = extractelement <4 x float> [[RGBA]], i64 0 ; CHECK-NEXT: ret float [[ELT0]] ; %data = call { <4 x float>, i32 } @llvm.amdgcn.image.load.1d.sl_v4f32i32s.i32(i32 15, i32 %s, <8 x i32> %rsrc, i32 0, i32 1) diff --git a/llvm/test/Transforms/InstCombine/ExtractCast.ll b/llvm/test/Transforms/InstCombine/ExtractCast.ll --- a/llvm/test/Transforms/InstCombine/ExtractCast.ll +++ b/llvm/test/Transforms/InstCombine/ExtractCast.ll @@ -4,7 +4,7 @@ define i32 @a(<4 x i64> %I) { ; CHECK-LABEL: @a( ; CHECK-NEXT: [[TMP1:%.*]] = bitcast <4 x i64> [[I:%.*]] to <8 x i32> -; CHECK-NEXT: [[K:%.*]] = extractelement <8 x i32> [[TMP1]], i32 6 +; CHECK-NEXT: [[K:%.*]] = extractelement <8 x i32> [[TMP1]], i64 6 ; CHECK-NEXT: ret i32 [[K]] ; %J = trunc <4 x i64> %I to <4 x i32> @@ -14,7 +14,7 @@ define i32 @b(<4 x float> %I) { ; CHECK-LABEL: @b( -; CHECK-NEXT: [[TMP1:%.*]] = extractelement <4 x float> [[I:%.*]], i32 3 +; CHECK-NEXT: [[TMP1:%.*]] = extractelement <4 x float> [[I:%.*]], i64 3 ; CHECK-NEXT: [[K:%.*]] = fptosi float [[TMP1]] to i32 ; CHECK-NEXT: ret i32 [[K]] ; diff --git a/llvm/test/Transforms/InstCombine/X86/x86-addsub-inseltpoison.ll b/llvm/test/Transforms/InstCombine/X86/x86-addsub-inseltpoison.ll --- a/llvm/test/Transforms/InstCombine/X86/x86-addsub-inseltpoison.ll +++ b/llvm/test/Transforms/InstCombine/X86/x86-addsub-inseltpoison.ll @@ -15,7 +15,7 @@ ; CHECK-LABEL: @elts_addsub_v2f64( ; CHECK-NEXT: [[TMP3:%.*]] = shufflevector <2 x double> [[TMP1:%.*]], <2 x double> poison, <2 x i32> ; CHECK-NEXT: [[TMP4:%.*]] = fsub <2 x double> [[TMP0:%.*]], [[TMP3]] -; CHECK-NEXT: [[TMP5:%.*]] = extractelement <2 x double> [[TMP4]], i32 0 +; CHECK-NEXT: [[TMP5:%.*]] = extractelement <2 x double> [[TMP4]], i64 0 ; CHECK-NEXT: ret double [[TMP5]] ; %3 = shufflevector <2 x double> %0, <2 x double> poison, <2 x i32> @@ -28,7 +28,7 @@ define double @elts_addsub_v2f64_sub(<2 x double> %0, <2 x double> %1) { ; CHECK-LABEL: @elts_addsub_v2f64_sub( ; CHECK-NEXT: [[TMP3:%.*]] = fsub <2 x double> [[TMP0:%.*]], [[TMP1:%.*]] -; CHECK-NEXT: [[TMP4:%.*]] = extractelement <2 x double> [[TMP3]], i32 0 +; CHECK-NEXT: [[TMP4:%.*]] = extractelement <2 x double> [[TMP3]], i64 0 ; CHECK-NEXT: ret double [[TMP4]] ; %3 = shufflevector <2 x double> %0, <2 x double> poison, <2 x i32> @@ -41,8 +41,8 @@ define float @elts_addsub_v4f32(<4 x float> %0, <4 x float> %1) { ; CHECK-LABEL: @elts_addsub_v4f32( ; CHECK-NEXT: [[TMP3:%.*]] = tail call <4 x float> @llvm.x86.sse3.addsub.ps(<4 x float> [[TMP0:%.*]], <4 x float> [[TMP1:%.*]]) -; CHECK-NEXT: [[TMP4:%.*]] = extractelement <4 x float> [[TMP3]], i32 0 -; CHECK-NEXT: [[TMP5:%.*]] = extractelement <4 x float> [[TMP3]], i32 1 +; CHECK-NEXT: [[TMP4:%.*]] = extractelement <4 x float> [[TMP3]], i64 0 +; CHECK-NEXT: [[TMP5:%.*]] = extractelement <4 x float> [[TMP3]], i64 1 ; CHECK-NEXT: [[TMP6:%.*]] = fadd float [[TMP4]], [[TMP5]] ; CHECK-NEXT: ret float [[TMP6]] ; @@ -58,8 +58,8 @@ define float @elts_addsub_v4f32_add(<4 x float> %0, <4 x float> %1) { ; CHECK-LABEL: @elts_addsub_v4f32_add( ; CHECK-NEXT: [[TMP3:%.*]] = fadd <4 x float> [[TMP0:%.*]], [[TMP1:%.*]] -; CHECK-NEXT: [[TMP4:%.*]] = extractelement <4 x float> [[TMP3]], i32 1 -; CHECK-NEXT: [[TMP5:%.*]] = extractelement <4 x float> [[TMP3]], i32 1 +; CHECK-NEXT: [[TMP4:%.*]] = extractelement <4 x float> [[TMP3]], i64 1 +; CHECK-NEXT: [[TMP5:%.*]] = extractelement <4 x float> [[TMP3]], i64 1 ; CHECK-NEXT: [[TMP6:%.*]] = fadd float [[TMP4]], [[TMP5]] ; CHECK-NEXT: ret float [[TMP6]] ; @@ -75,8 +75,8 @@ define double @elts_addsub_v4f64(<4 x double> %0, <4 x double> %1) { ; CHECK-LABEL: @elts_addsub_v4f64( ; CHECK-NEXT: [[TMP3:%.*]] = tail call <4 x double> @llvm.x86.avx.addsub.pd.256(<4 x double> [[TMP0:%.*]], <4 x double> [[TMP1:%.*]]) -; CHECK-NEXT: [[TMP4:%.*]] = extractelement <4 x double> [[TMP3]], i32 0 -; CHECK-NEXT: [[TMP5:%.*]] = extractelement <4 x double> [[TMP3]], i32 1 +; CHECK-NEXT: [[TMP4:%.*]] = extractelement <4 x double> [[TMP3]], i64 0 +; CHECK-NEXT: [[TMP5:%.*]] = extractelement <4 x double> [[TMP3]], i64 1 ; CHECK-NEXT: [[TMP6:%.*]] = fadd double [[TMP4]], [[TMP5]] ; CHECK-NEXT: ret double [[TMP6]] ; @@ -92,8 +92,8 @@ define double @elts_addsub_v4f64_add(<4 x double> %0, <4 x double> %1) { ; CHECK-LABEL: @elts_addsub_v4f64_add( ; CHECK-NEXT: [[TMP3:%.*]] = fadd <4 x double> [[TMP0:%.*]], [[TMP1:%.*]] -; CHECK-NEXT: [[TMP4:%.*]] = extractelement <4 x double> [[TMP3]], i32 1 -; CHECK-NEXT: [[TMP5:%.*]] = extractelement <4 x double> [[TMP3]], i32 3 +; CHECK-NEXT: [[TMP4:%.*]] = extractelement <4 x double> [[TMP3]], i64 1 +; CHECK-NEXT: [[TMP5:%.*]] = extractelement <4 x double> [[TMP3]], i64 3 ; CHECK-NEXT: [[TMP6:%.*]] = fadd double [[TMP4]], [[TMP5]] ; CHECK-NEXT: ret double [[TMP6]] ; @@ -109,8 +109,8 @@ define float @elts_addsub_v8f32(<8 x float> %0, <8 x float> %1) { ; CHECK-LABEL: @elts_addsub_v8f32( ; CHECK-NEXT: [[TMP3:%.*]] = tail call <8 x float> @llvm.x86.avx.addsub.ps.256(<8 x float> [[TMP0:%.*]], <8 x float> [[TMP1:%.*]]) -; CHECK-NEXT: [[TMP4:%.*]] = extractelement <8 x float> [[TMP3]], i32 0 -; CHECK-NEXT: [[TMP5:%.*]] = extractelement <8 x float> [[TMP3]], i32 1 +; CHECK-NEXT: [[TMP4:%.*]] = extractelement <8 x float> [[TMP3]], i64 0 +; CHECK-NEXT: [[TMP5:%.*]] = extractelement <8 x float> [[TMP3]], i64 1 ; CHECK-NEXT: [[TMP6:%.*]] = fadd float [[TMP4]], [[TMP5]] ; CHECK-NEXT: ret float [[TMP6]] ; @@ -126,8 +126,8 @@ define float @elts_addsub_v8f32_sub(<8 x float> %0, <8 x float> %1) { ; CHECK-LABEL: @elts_addsub_v8f32_sub( ; CHECK-NEXT: [[TMP3:%.*]] = fsub <8 x float> [[TMP0:%.*]], [[TMP1:%.*]] -; CHECK-NEXT: [[TMP4:%.*]] = extractelement <8 x float> [[TMP3]], i32 0 -; CHECK-NEXT: [[TMP5:%.*]] = extractelement <8 x float> [[TMP3]], i32 4 +; CHECK-NEXT: [[TMP4:%.*]] = extractelement <8 x float> [[TMP3]], i64 0 +; CHECK-NEXT: [[TMP5:%.*]] = extractelement <8 x float> [[TMP3]], i64 4 ; CHECK-NEXT: [[TMP6:%.*]] = fadd float [[TMP4]], [[TMP5]] ; CHECK-NEXT: ret float [[TMP6]] ; @@ -142,13 +142,13 @@ define void @PR46277(float %0, float %1, float %2, float %3, <4 x float> %4, float* %5) { ; CHECK-LABEL: @PR46277( -; CHECK-NEXT: [[TMP7:%.*]] = insertelement <4 x float> poison, float [[TMP0:%.*]], i32 0 -; CHECK-NEXT: [[TMP8:%.*]] = insertelement <4 x float> [[TMP7]], float [[TMP1:%.*]], i32 1 +; CHECK-NEXT: [[TMP7:%.*]] = insertelement <4 x float> poison, float [[TMP0:%.*]], i64 0 +; CHECK-NEXT: [[TMP8:%.*]] = insertelement <4 x float> [[TMP7]], float [[TMP1:%.*]], i64 1 ; CHECK-NEXT: [[TMP9:%.*]] = tail call <4 x float> @llvm.x86.sse3.addsub.ps(<4 x float> [[TMP8]], <4 x float> [[TMP4:%.*]]) -; CHECK-NEXT: [[TMP10:%.*]] = extractelement <4 x float> [[TMP9]], i32 0 +; CHECK-NEXT: [[TMP10:%.*]] = extractelement <4 x float> [[TMP9]], i64 0 ; CHECK-NEXT: [[TMP11:%.*]] = getelementptr inbounds float, float* [[TMP5:%.*]], i64 1 ; CHECK-NEXT: store float [[TMP10]], float* [[TMP5]], align 4 -; CHECK-NEXT: [[TMP12:%.*]] = extractelement <4 x float> [[TMP9]], i32 1 +; CHECK-NEXT: [[TMP12:%.*]] = extractelement <4 x float> [[TMP9]], i64 1 ; CHECK-NEXT: store float [[TMP12]], float* [[TMP11]], align 4 ; CHECK-NEXT: ret void ; @@ -169,7 +169,7 @@ ; CHECK-LABEL: @PR48476_fsub( ; CHECK-NEXT: [[TMP1:%.*]] = fsub <2 x double> , [[X:%.*]] ; CHECK-NEXT: [[T2:%.*]] = call <2 x double> @llvm.x86.sse2.cmp.sd(<2 x double> [[TMP1]], <2 x double> [[X]], i8 6) -; CHECK-NEXT: [[VECEXT:%.*]] = extractelement <2 x double> [[T2]], i32 0 +; CHECK-NEXT: [[VECEXT:%.*]] = extractelement <2 x double> [[T2]], i64 0 ; CHECK-NEXT: ret double [[VECEXT]] ; %t1 = call <2 x double> @llvm.x86.sse3.addsub.pd(<2 x double> zeroinitializer, <2 x double> %x) @@ -183,7 +183,7 @@ ; CHECK-NEXT: [[TMP1:%.*]] = fadd <2 x double> [[X:%.*]], ; CHECK-NEXT: [[S:%.*]] = shufflevector <2 x double> [[TMP1]], <2 x double> poison, <2 x i32> ; CHECK-NEXT: [[TMP2:%.*]] = fsub <2 x double> [[S]], [[X]] -; CHECK-NEXT: [[VECEXT:%.*]] = extractelement <2 x double> [[TMP2]], i32 0 +; CHECK-NEXT: [[VECEXT:%.*]] = extractelement <2 x double> [[TMP2]], i64 0 ; CHECK-NEXT: ret double [[VECEXT]] ; %t1 = call <2 x double> @llvm.x86.sse3.addsub.pd(<2 x double> zeroinitializer, <2 x double> %x) diff --git a/llvm/test/Transforms/InstCombine/X86/x86-addsub.ll b/llvm/test/Transforms/InstCombine/X86/x86-addsub.ll --- a/llvm/test/Transforms/InstCombine/X86/x86-addsub.ll +++ b/llvm/test/Transforms/InstCombine/X86/x86-addsub.ll @@ -15,7 +15,7 @@ ; CHECK-LABEL: @elts_addsub_v2f64( ; CHECK-NEXT: [[TMP3:%.*]] = shufflevector <2 x double> [[TMP1:%.*]], <2 x double> undef, <2 x i32> ; CHECK-NEXT: [[TMP4:%.*]] = fsub <2 x double> [[TMP0:%.*]], [[TMP3]] -; CHECK-NEXT: [[TMP5:%.*]] = extractelement <2 x double> [[TMP4]], i32 0 +; CHECK-NEXT: [[TMP5:%.*]] = extractelement <2 x double> [[TMP4]], i64 0 ; CHECK-NEXT: ret double [[TMP5]] ; %3 = shufflevector <2 x double> %0, <2 x double> undef, <2 x i32> @@ -28,7 +28,7 @@ define double @elts_addsub_v2f64_sub(<2 x double> %0, <2 x double> %1) { ; CHECK-LABEL: @elts_addsub_v2f64_sub( ; CHECK-NEXT: [[TMP3:%.*]] = fsub <2 x double> [[TMP0:%.*]], [[TMP1:%.*]] -; CHECK-NEXT: [[TMP4:%.*]] = extractelement <2 x double> [[TMP3]], i32 0 +; CHECK-NEXT: [[TMP4:%.*]] = extractelement <2 x double> [[TMP3]], i64 0 ; CHECK-NEXT: ret double [[TMP4]] ; %3 = shufflevector <2 x double> %0, <2 x double> undef, <2 x i32> @@ -41,8 +41,8 @@ define float @elts_addsub_v4f32(<4 x float> %0, <4 x float> %1) { ; CHECK-LABEL: @elts_addsub_v4f32( ; CHECK-NEXT: [[TMP3:%.*]] = tail call <4 x float> @llvm.x86.sse3.addsub.ps(<4 x float> [[TMP0:%.*]], <4 x float> [[TMP1:%.*]]) -; CHECK-NEXT: [[TMP4:%.*]] = extractelement <4 x float> [[TMP3]], i32 0 -; CHECK-NEXT: [[TMP5:%.*]] = extractelement <4 x float> [[TMP3]], i32 1 +; CHECK-NEXT: [[TMP4:%.*]] = extractelement <4 x float> [[TMP3]], i64 0 +; CHECK-NEXT: [[TMP5:%.*]] = extractelement <4 x float> [[TMP3]], i64 1 ; CHECK-NEXT: [[TMP6:%.*]] = fadd float [[TMP4]], [[TMP5]] ; CHECK-NEXT: ret float [[TMP6]] ; @@ -58,8 +58,8 @@ define float @elts_addsub_v4f32_add(<4 x float> %0, <4 x float> %1) { ; CHECK-LABEL: @elts_addsub_v4f32_add( ; CHECK-NEXT: [[TMP3:%.*]] = fadd <4 x float> [[TMP0:%.*]], [[TMP1:%.*]] -; CHECK-NEXT: [[TMP4:%.*]] = extractelement <4 x float> [[TMP3]], i32 1 -; CHECK-NEXT: [[TMP5:%.*]] = extractelement <4 x float> [[TMP3]], i32 1 +; CHECK-NEXT: [[TMP4:%.*]] = extractelement <4 x float> [[TMP3]], i64 1 +; CHECK-NEXT: [[TMP5:%.*]] = extractelement <4 x float> [[TMP3]], i64 1 ; CHECK-NEXT: [[TMP6:%.*]] = fadd float [[TMP4]], [[TMP5]] ; CHECK-NEXT: ret float [[TMP6]] ; @@ -75,8 +75,8 @@ define double @elts_addsub_v4f64(<4 x double> %0, <4 x double> %1) { ; CHECK-LABEL: @elts_addsub_v4f64( ; CHECK-NEXT: [[TMP3:%.*]] = tail call <4 x double> @llvm.x86.avx.addsub.pd.256(<4 x double> [[TMP0:%.*]], <4 x double> [[TMP1:%.*]]) -; CHECK-NEXT: [[TMP4:%.*]] = extractelement <4 x double> [[TMP3]], i32 0 -; CHECK-NEXT: [[TMP5:%.*]] = extractelement <4 x double> [[TMP3]], i32 1 +; CHECK-NEXT: [[TMP4:%.*]] = extractelement <4 x double> [[TMP3]], i64 0 +; CHECK-NEXT: [[TMP5:%.*]] = extractelement <4 x double> [[TMP3]], i64 1 ; CHECK-NEXT: [[TMP6:%.*]] = fadd double [[TMP4]], [[TMP5]] ; CHECK-NEXT: ret double [[TMP6]] ; @@ -92,8 +92,8 @@ define double @elts_addsub_v4f64_add(<4 x double> %0, <4 x double> %1) { ; CHECK-LABEL: @elts_addsub_v4f64_add( ; CHECK-NEXT: [[TMP3:%.*]] = fadd <4 x double> [[TMP0:%.*]], [[TMP1:%.*]] -; CHECK-NEXT: [[TMP4:%.*]] = extractelement <4 x double> [[TMP3]], i32 1 -; CHECK-NEXT: [[TMP5:%.*]] = extractelement <4 x double> [[TMP3]], i32 3 +; CHECK-NEXT: [[TMP4:%.*]] = extractelement <4 x double> [[TMP3]], i64 1 +; CHECK-NEXT: [[TMP5:%.*]] = extractelement <4 x double> [[TMP3]], i64 3 ; CHECK-NEXT: [[TMP6:%.*]] = fadd double [[TMP4]], [[TMP5]] ; CHECK-NEXT: ret double [[TMP6]] ; @@ -109,8 +109,8 @@ define float @elts_addsub_v8f32(<8 x float> %0, <8 x float> %1) { ; CHECK-LABEL: @elts_addsub_v8f32( ; CHECK-NEXT: [[TMP3:%.*]] = tail call <8 x float> @llvm.x86.avx.addsub.ps.256(<8 x float> [[TMP0:%.*]], <8 x float> [[TMP1:%.*]]) -; CHECK-NEXT: [[TMP4:%.*]] = extractelement <8 x float> [[TMP3]], i32 0 -; CHECK-NEXT: [[TMP5:%.*]] = extractelement <8 x float> [[TMP3]], i32 1 +; CHECK-NEXT: [[TMP4:%.*]] = extractelement <8 x float> [[TMP3]], i64 0 +; CHECK-NEXT: [[TMP5:%.*]] = extractelement <8 x float> [[TMP3]], i64 1 ; CHECK-NEXT: [[TMP6:%.*]] = fadd float [[TMP4]], [[TMP5]] ; CHECK-NEXT: ret float [[TMP6]] ; @@ -126,8 +126,8 @@ define float @elts_addsub_v8f32_sub(<8 x float> %0, <8 x float> %1) { ; CHECK-LABEL: @elts_addsub_v8f32_sub( ; CHECK-NEXT: [[TMP3:%.*]] = fsub <8 x float> [[TMP0:%.*]], [[TMP1:%.*]] -; CHECK-NEXT: [[TMP4:%.*]] = extractelement <8 x float> [[TMP3]], i32 0 -; CHECK-NEXT: [[TMP5:%.*]] = extractelement <8 x float> [[TMP3]], i32 4 +; CHECK-NEXT: [[TMP4:%.*]] = extractelement <8 x float> [[TMP3]], i64 0 +; CHECK-NEXT: [[TMP5:%.*]] = extractelement <8 x float> [[TMP3]], i64 4 ; CHECK-NEXT: [[TMP6:%.*]] = fadd float [[TMP4]], [[TMP5]] ; CHECK-NEXT: ret float [[TMP6]] ; @@ -142,13 +142,13 @@ define void @PR46277(float %0, float %1, float %2, float %3, <4 x float> %4, float* %5) { ; CHECK-LABEL: @PR46277( -; CHECK-NEXT: [[TMP7:%.*]] = insertelement <4 x float> undef, float [[TMP0:%.*]], i32 0 -; CHECK-NEXT: [[TMP8:%.*]] = insertelement <4 x float> [[TMP7]], float [[TMP1:%.*]], i32 1 +; CHECK-NEXT: [[TMP7:%.*]] = insertelement <4 x float> undef, float [[TMP0:%.*]], i64 0 +; CHECK-NEXT: [[TMP8:%.*]] = insertelement <4 x float> [[TMP7]], float [[TMP1:%.*]], i64 1 ; CHECK-NEXT: [[TMP9:%.*]] = tail call <4 x float> @llvm.x86.sse3.addsub.ps(<4 x float> [[TMP8]], <4 x float> [[TMP4:%.*]]) -; CHECK-NEXT: [[TMP10:%.*]] = extractelement <4 x float> [[TMP9]], i32 0 +; CHECK-NEXT: [[TMP10:%.*]] = extractelement <4 x float> [[TMP9]], i64 0 ; CHECK-NEXT: [[TMP11:%.*]] = getelementptr inbounds float, float* [[TMP5:%.*]], i64 1 ; CHECK-NEXT: store float [[TMP10]], float* [[TMP5]], align 4 -; CHECK-NEXT: [[TMP12:%.*]] = extractelement <4 x float> [[TMP9]], i32 1 +; CHECK-NEXT: [[TMP12:%.*]] = extractelement <4 x float> [[TMP9]], i64 1 ; CHECK-NEXT: store float [[TMP12]], float* [[TMP11]], align 4 ; CHECK-NEXT: ret void ; @@ -169,7 +169,7 @@ ; CHECK-LABEL: @PR48476_fsub( ; CHECK-NEXT: [[TMP1:%.*]] = fsub <2 x double> , [[X:%.*]] ; CHECK-NEXT: [[T2:%.*]] = call <2 x double> @llvm.x86.sse2.cmp.sd(<2 x double> [[TMP1]], <2 x double> [[X]], i8 6) -; CHECK-NEXT: [[VECEXT:%.*]] = extractelement <2 x double> [[T2]], i32 0 +; CHECK-NEXT: [[VECEXT:%.*]] = extractelement <2 x double> [[T2]], i64 0 ; CHECK-NEXT: ret double [[VECEXT]] ; %t1 = call <2 x double> @llvm.x86.sse3.addsub.pd(<2 x double> zeroinitializer, <2 x double> %x) @@ -183,7 +183,7 @@ ; CHECK-NEXT: [[TMP1:%.*]] = fadd <2 x double> [[X:%.*]], ; CHECK-NEXT: [[S:%.*]] = shufflevector <2 x double> [[TMP1]], <2 x double> undef, <2 x i32> ; CHECK-NEXT: [[TMP2:%.*]] = fsub <2 x double> [[S]], [[X]] -; CHECK-NEXT: [[VECEXT:%.*]] = extractelement <2 x double> [[TMP2]], i32 0 +; CHECK-NEXT: [[VECEXT:%.*]] = extractelement <2 x double> [[TMP2]], i64 0 ; CHECK-NEXT: ret double [[VECEXT]] ; %t1 = call <2 x double> @llvm.x86.sse3.addsub.pd(<2 x double> zeroinitializer, <2 x double> %x) diff --git a/llvm/test/Transforms/InstCombine/X86/x86-avx512-inseltpoison.ll b/llvm/test/Transforms/InstCombine/X86/x86-avx512-inseltpoison.ll --- a/llvm/test/Transforms/InstCombine/X86/x86-avx512-inseltpoison.ll +++ b/llvm/test/Transforms/InstCombine/X86/x86-avx512-inseltpoison.ll @@ -813,21 +813,21 @@ define i64 @test(float %f, double %d) { ; ; CHECK-LABEL: @test( -; CHECK-NEXT: [[V03:%.*]] = insertelement <4 x float> poison, float [[F:%.*]], i32 0 +; CHECK-NEXT: [[V03:%.*]] = insertelement <4 x float> poison, float [[F:%.*]], i64 0 ; CHECK-NEXT: [[T0:%.*]] = tail call i32 @llvm.x86.avx512.vcvtss2si32(<4 x float> [[V03]], i32 4) -; CHECK-NEXT: [[V13:%.*]] = insertelement <4 x float> poison, float [[F]], i32 0 +; CHECK-NEXT: [[V13:%.*]] = insertelement <4 x float> poison, float [[F]], i64 0 ; CHECK-NEXT: [[T1:%.*]] = tail call i64 @llvm.x86.avx512.vcvtss2si64(<4 x float> [[V13]], i32 4) -; CHECK-NEXT: [[V23:%.*]] = insertelement <4 x float> poison, float [[F]], i32 0 +; CHECK-NEXT: [[V23:%.*]] = insertelement <4 x float> poison, float [[F]], i64 0 ; CHECK-NEXT: [[T2:%.*]] = tail call i32 @llvm.x86.avx512.cvttss2si(<4 x float> [[V23]], i32 4) -; CHECK-NEXT: [[V33:%.*]] = insertelement <4 x float> poison, float [[F]], i32 0 +; CHECK-NEXT: [[V33:%.*]] = insertelement <4 x float> poison, float [[F]], i64 0 ; CHECK-NEXT: [[T3:%.*]] = tail call i64 @llvm.x86.avx512.cvttss2si64(<4 x float> [[V33]], i32 4) -; CHECK-NEXT: [[V41:%.*]] = insertelement <2 x double> poison, double [[D:%.*]], i32 0 +; CHECK-NEXT: [[V41:%.*]] = insertelement <2 x double> poison, double [[D:%.*]], i64 0 ; CHECK-NEXT: [[T4:%.*]] = tail call i32 @llvm.x86.avx512.vcvtsd2si32(<2 x double> [[V41]], i32 4) -; CHECK-NEXT: [[V51:%.*]] = insertelement <2 x double> poison, double [[D]], i32 0 +; CHECK-NEXT: [[V51:%.*]] = insertelement <2 x double> poison, double [[D]], i64 0 ; CHECK-NEXT: [[T5:%.*]] = tail call i64 @llvm.x86.avx512.vcvtsd2si64(<2 x double> [[V51]], i32 4) -; CHECK-NEXT: [[V61:%.*]] = insertelement <2 x double> poison, double [[D]], i32 0 +; CHECK-NEXT: [[V61:%.*]] = insertelement <2 x double> poison, double [[D]], i64 0 ; CHECK-NEXT: [[T6:%.*]] = tail call i32 @llvm.x86.avx512.cvttsd2si(<2 x double> [[V61]], i32 4) -; CHECK-NEXT: [[V71:%.*]] = insertelement <2 x double> poison, double [[D]], i32 0 +; CHECK-NEXT: [[V71:%.*]] = insertelement <2 x double> poison, double [[D]], i64 0 ; CHECK-NEXT: [[T7:%.*]] = tail call i64 @llvm.x86.avx512.cvttsd2si64(<2 x double> [[V71]], i32 4) ; CHECK-NEXT: [[T8:%.*]] = add i32 [[T0]], [[T2]] ; CHECK-NEXT: [[T9:%.*]] = add i32 [[T4]], [[T6]] @@ -894,21 +894,21 @@ define i64 @test2(float %f, double %d) { ; ; CHECK-LABEL: @test2( -; CHECK-NEXT: [[V03:%.*]] = insertelement <4 x float> poison, float [[F:%.*]], i32 0 +; CHECK-NEXT: [[V03:%.*]] = insertelement <4 x float> poison, float [[F:%.*]], i64 0 ; CHECK-NEXT: [[T0:%.*]] = tail call i32 @llvm.x86.avx512.vcvtss2usi32(<4 x float> [[V03]], i32 4) -; CHECK-NEXT: [[V13:%.*]] = insertelement <4 x float> poison, float [[F]], i32 0 +; CHECK-NEXT: [[V13:%.*]] = insertelement <4 x float> poison, float [[F]], i64 0 ; CHECK-NEXT: [[T1:%.*]] = tail call i64 @llvm.x86.avx512.vcvtss2usi64(<4 x float> [[V13]], i32 4) -; CHECK-NEXT: [[V23:%.*]] = insertelement <4 x float> poison, float [[F]], i32 0 +; CHECK-NEXT: [[V23:%.*]] = insertelement <4 x float> poison, float [[F]], i64 0 ; CHECK-NEXT: [[T2:%.*]] = tail call i32 @llvm.x86.avx512.cvttss2usi(<4 x float> [[V23]], i32 4) -; CHECK-NEXT: [[V33:%.*]] = insertelement <4 x float> poison, float [[F]], i32 0 +; CHECK-NEXT: [[V33:%.*]] = insertelement <4 x float> poison, float [[F]], i64 0 ; CHECK-NEXT: [[T3:%.*]] = tail call i64 @llvm.x86.avx512.cvttss2usi64(<4 x float> [[V33]], i32 4) -; CHECK-NEXT: [[V41:%.*]] = insertelement <2 x double> poison, double [[D:%.*]], i32 0 +; CHECK-NEXT: [[V41:%.*]] = insertelement <2 x double> poison, double [[D:%.*]], i64 0 ; CHECK-NEXT: [[T4:%.*]] = tail call i32 @llvm.x86.avx512.vcvtsd2usi32(<2 x double> [[V41]], i32 4) -; CHECK-NEXT: [[V51:%.*]] = insertelement <2 x double> poison, double [[D]], i32 0 +; CHECK-NEXT: [[V51:%.*]] = insertelement <2 x double> poison, double [[D]], i64 0 ; CHECK-NEXT: [[T5:%.*]] = tail call i64 @llvm.x86.avx512.vcvtsd2usi64(<2 x double> [[V51]], i32 4) -; CHECK-NEXT: [[V61:%.*]] = insertelement <2 x double> poison, double [[D]], i32 0 +; CHECK-NEXT: [[V61:%.*]] = insertelement <2 x double> poison, double [[D]], i64 0 ; CHECK-NEXT: [[T6:%.*]] = tail call i32 @llvm.x86.avx512.cvttsd2usi(<2 x double> [[V61]], i32 4) -; CHECK-NEXT: [[V71:%.*]] = insertelement <2 x double> poison, double [[D]], i32 0 +; CHECK-NEXT: [[V71:%.*]] = insertelement <2 x double> poison, double [[D]], i64 0 ; CHECK-NEXT: [[T7:%.*]] = tail call i64 @llvm.x86.avx512.cvttsd2usi64(<2 x double> [[V71]], i32 4) ; CHECK-NEXT: [[T8:%.*]] = add i32 [[T0]], [[T2]] ; CHECK-NEXT: [[T9:%.*]] = add i32 [[T4]], [[T6]] @@ -978,8 +978,8 @@ ; ; CHECK-LABEL: @test_mask_vfmadd_ss( ; CHECK-NEXT: [[TMP1:%.*]] = extractelement <4 x float> [[A:%.*]], i64 0 -; CHECK-NEXT: [[TMP2:%.*]] = extractelement <4 x float> [[B:%.*]], i32 0 -; CHECK-NEXT: [[TMP3:%.*]] = extractelement <4 x float> [[C:%.*]], i32 0 +; CHECK-NEXT: [[TMP2:%.*]] = extractelement <4 x float> [[B:%.*]], i64 0 +; CHECK-NEXT: [[TMP3:%.*]] = extractelement <4 x float> [[C:%.*]], i64 0 ; CHECK-NEXT: [[TMP4:%.*]] = call float @llvm.fma.f32(float [[TMP1]], float [[TMP2]], float [[TMP3]]) ; CHECK-NEXT: [[TMP5:%.*]] = and i8 [[MASK:%.*]], 1 ; CHECK-NEXT: [[DOTNOT:%.*]] = icmp eq i8 [[TMP5]], 0 @@ -1007,7 +1007,7 @@ define float @test_mask_vfmadd_ss_0(<4 x float> %a, <4 x float> %b, <4 x float> %c, i8 %mask) { ; ; CHECK-LABEL: @test_mask_vfmadd_ss_0( -; CHECK-NEXT: [[TMP1:%.*]] = extractelement <4 x float> [[A:%.*]], i32 0 +; CHECK-NEXT: [[TMP1:%.*]] = extractelement <4 x float> [[A:%.*]], i64 0 ; CHECK-NEXT: [[TMP2:%.*]] = extractelement <4 x float> [[B:%.*]], i64 0 ; CHECK-NEXT: [[TMP3:%.*]] = extractelement <4 x float> [[C:%.*]], i64 0 ; CHECK-NEXT: [[TMP4:%.*]] = call float @llvm.fma.f32(float [[TMP1]], float [[TMP2]], float [[TMP3]]) @@ -1126,8 +1126,8 @@ ; ; CHECK-LABEL: @test_maskz_vfmadd_ss( ; CHECK-NEXT: [[TMP1:%.*]] = extractelement <4 x float> [[A:%.*]], i64 0 -; CHECK-NEXT: [[TMP2:%.*]] = extractelement <4 x float> [[B:%.*]], i32 0 -; CHECK-NEXT: [[TMP3:%.*]] = extractelement <4 x float> [[C:%.*]], i32 0 +; CHECK-NEXT: [[TMP2:%.*]] = extractelement <4 x float> [[B:%.*]], i64 0 +; CHECK-NEXT: [[TMP3:%.*]] = extractelement <4 x float> [[C:%.*]], i64 0 ; CHECK-NEXT: [[TMP4:%.*]] = call float @llvm.fma.f32(float [[TMP1]], float [[TMP2]], float [[TMP3]]) ; CHECK-NEXT: [[TMP5:%.*]] = and i8 [[MASK:%.*]], 1 ; CHECK-NEXT: [[DOTNOT:%.*]] = icmp eq i8 [[TMP5]], 0 @@ -1155,7 +1155,7 @@ define float @test_maskz_vfmadd_ss_0(<4 x float> %a, <4 x float> %b, <4 x float> %c, i8 %mask) { ; ; CHECK-LABEL: @test_maskz_vfmadd_ss_0( -; CHECK-NEXT: [[TMP1:%.*]] = extractelement <4 x float> [[A:%.*]], i32 0 +; CHECK-NEXT: [[TMP1:%.*]] = extractelement <4 x float> [[A:%.*]], i64 0 ; CHECK-NEXT: [[TMP2:%.*]] = extractelement <4 x float> [[B:%.*]], i64 0 ; CHECK-NEXT: [[TMP3:%.*]] = extractelement <4 x float> [[C:%.*]], i64 0 ; CHECK-NEXT: [[TMP4:%.*]] = call float @llvm.fma.f32(float [[TMP1]], float [[TMP2]], float [[TMP3]]) @@ -1271,8 +1271,8 @@ define <4 x float> @test_mask3_vfmadd_ss(<4 x float> %a, <4 x float> %b, <4 x float> %c, i8 %mask) { ; ; CHECK-LABEL: @test_mask3_vfmadd_ss( -; CHECK-NEXT: [[TMP1:%.*]] = extractelement <4 x float> [[A:%.*]], i32 0 -; CHECK-NEXT: [[TMP2:%.*]] = extractelement <4 x float> [[B:%.*]], i32 0 +; CHECK-NEXT: [[TMP1:%.*]] = extractelement <4 x float> [[A:%.*]], i64 0 +; CHECK-NEXT: [[TMP2:%.*]] = extractelement <4 x float> [[B:%.*]], i64 0 ; CHECK-NEXT: [[TMP3:%.*]] = extractelement <4 x float> [[C:%.*]], i64 0 ; CHECK-NEXT: [[TMP4:%.*]] = call float @llvm.fma.f32(float [[TMP1]], float [[TMP2]], float [[TMP3]]) ; CHECK-NEXT: [[TMP5:%.*]] = and i8 [[MASK:%.*]], 1 @@ -1303,7 +1303,7 @@ ; CHECK-LABEL: @test_mask3_vfmadd_ss_0( ; CHECK-NEXT: [[TMP1:%.*]] = extractelement <4 x float> [[A:%.*]], i64 0 ; CHECK-NEXT: [[TMP2:%.*]] = extractelement <4 x float> [[B:%.*]], i64 0 -; CHECK-NEXT: [[TMP3:%.*]] = extractelement <4 x float> [[C:%.*]], i32 0 +; CHECK-NEXT: [[TMP3:%.*]] = extractelement <4 x float> [[C:%.*]], i64 0 ; CHECK-NEXT: [[TMP4:%.*]] = call float @llvm.fma.f32(float [[TMP1]], float [[TMP2]], float [[TMP3]]) ; CHECK-NEXT: [[TMP5:%.*]] = and i8 [[MASK:%.*]], 1 ; CHECK-NEXT: [[DOTNOT:%.*]] = icmp eq i8 [[TMP5]], 0 @@ -1417,8 +1417,8 @@ define <4 x float> @test_mask3_vfmsub_ss(<4 x float> %a, <4 x float> %b, <4 x float> %c, i8 %mask) { ; ; CHECK-LABEL: @test_mask3_vfmsub_ss( -; CHECK-NEXT: [[TMP1:%.*]] = extractelement <4 x float> [[A:%.*]], i32 0 -; CHECK-NEXT: [[TMP2:%.*]] = extractelement <4 x float> [[B:%.*]], i32 0 +; CHECK-NEXT: [[TMP1:%.*]] = extractelement <4 x float> [[A:%.*]], i64 0 +; CHECK-NEXT: [[TMP2:%.*]] = extractelement <4 x float> [[B:%.*]], i64 0 ; CHECK-NEXT: [[TMP3:%.*]] = extractelement <4 x float> [[C:%.*]], i64 0 ; CHECK-NEXT: [[TMP4:%.*]] = fneg float [[TMP3]] ; CHECK-NEXT: [[TMP5:%.*]] = call float @llvm.fma.f32(float [[TMP1]], float [[TMP2]], float [[TMP4]]) @@ -1453,10 +1453,10 @@ ; CHECK-LABEL: @test_mask3_vfmsub_ss_0( ; CHECK-NEXT: [[TMP1:%.*]] = extractelement <4 x float> [[A:%.*]], i64 0 ; CHECK-NEXT: [[TMP2:%.*]] = extractelement <4 x float> [[B:%.*]], i64 0 -; CHECK-NEXT: [[TMP3:%.*]] = extractelement <4 x float> [[C:%.*]], i32 0 +; CHECK-NEXT: [[TMP3:%.*]] = extractelement <4 x float> [[C:%.*]], i64 0 ; CHECK-NEXT: [[TMP4:%.*]] = fneg float [[TMP3]] ; CHECK-NEXT: [[TMP5:%.*]] = call float @llvm.fma.f32(float [[TMP1]], float [[TMP2]], float [[TMP4]]) -; CHECK-NEXT: [[TMP6:%.*]] = extractelement <4 x float> [[C]], i32 0 +; CHECK-NEXT: [[TMP6:%.*]] = extractelement <4 x float> [[C]], i64 0 ; CHECK-NEXT: [[TMP7:%.*]] = and i8 [[MASK:%.*]], 1 ; CHECK-NEXT: [[DOTNOT:%.*]] = icmp eq i8 [[TMP7]], 0 ; CHECK-NEXT: [[TMP8:%.*]] = select i1 [[DOTNOT]], float [[TMP6]], float [[TMP5]] @@ -1625,9 +1625,9 @@ define <4 x float> @test_mask3_vfnmsub_ss(<4 x float> %a, <4 x float> %b, <4 x float> %c, i8 %mask) { ; ; CHECK-LABEL: @test_mask3_vfnmsub_ss( -; CHECK-NEXT: [[TMP1:%.*]] = extractelement <4 x float> [[A:%.*]], i32 0 +; CHECK-NEXT: [[TMP1:%.*]] = extractelement <4 x float> [[A:%.*]], i64 0 ; CHECK-NEXT: [[TMP2:%.*]] = fneg float [[TMP1]] -; CHECK-NEXT: [[TMP3:%.*]] = extractelement <4 x float> [[B:%.*]], i32 0 +; CHECK-NEXT: [[TMP3:%.*]] = extractelement <4 x float> [[B:%.*]], i64 0 ; CHECK-NEXT: [[TMP4:%.*]] = extractelement <4 x float> [[C:%.*]], i64 0 ; CHECK-NEXT: [[TMP5:%.*]] = fneg float [[TMP4]] ; CHECK-NEXT: [[TMP6:%.*]] = call float @llvm.fma.f32(float [[TMP2]], float [[TMP3]], float [[TMP5]]) @@ -1664,10 +1664,10 @@ ; CHECK-NEXT: [[TMP1:%.*]] = extractelement <4 x float> [[A:%.*]], i64 0 ; CHECK-NEXT: [[TMP2:%.*]] = fneg float [[TMP1]] ; CHECK-NEXT: [[TMP3:%.*]] = extractelement <4 x float> [[B:%.*]], i64 0 -; CHECK-NEXT: [[TMP4:%.*]] = extractelement <4 x float> [[C:%.*]], i32 0 +; CHECK-NEXT: [[TMP4:%.*]] = extractelement <4 x float> [[C:%.*]], i64 0 ; CHECK-NEXT: [[TMP5:%.*]] = fneg float [[TMP4]] ; CHECK-NEXT: [[TMP6:%.*]] = call float @llvm.fma.f32(float [[TMP2]], float [[TMP3]], float [[TMP5]]) -; CHECK-NEXT: [[TMP7:%.*]] = extractelement <4 x float> [[C]], i32 0 +; CHECK-NEXT: [[TMP7:%.*]] = extractelement <4 x float> [[C]], i64 0 ; CHECK-NEXT: [[TMP8:%.*]] = and i8 [[MASK:%.*]], 1 ; CHECK-NEXT: [[DOTNOT:%.*]] = icmp eq i8 [[TMP8]], 0 ; CHECK-NEXT: [[TMP9:%.*]] = select i1 [[DOTNOT]], float [[TMP7]], float [[TMP6]] @@ -3607,8 +3607,8 @@ define i32 @test_comi_ss_0(float %a, float %b) { ; ; CHECK-LABEL: @test_comi_ss_0( -; CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x float> poison, float [[A:%.*]], i32 0 -; CHECK-NEXT: [[TMP2:%.*]] = insertelement <4 x float> poison, float [[B:%.*]], i32 0 +; CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x float> poison, float [[A:%.*]], i64 0 +; CHECK-NEXT: [[TMP2:%.*]] = insertelement <4 x float> poison, float [[B:%.*]], i64 0 ; CHECK-NEXT: [[TMP3:%.*]] = tail call i32 @llvm.x86.avx512.vcomi.ss(<4 x float> [[TMP1]], <4 x float> [[TMP2]], i32 0, i32 4) ; CHECK-NEXT: ret i32 [[TMP3]] ; @@ -3629,8 +3629,8 @@ define i32 @test_comi_sd_0(double %a, double %b) { ; ; CHECK-LABEL: @test_comi_sd_0( -; CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x double> poison, double [[A:%.*]], i32 0 -; CHECK-NEXT: [[TMP2:%.*]] = insertelement <2 x double> poison, double [[B:%.*]], i32 0 +; CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x double> poison, double [[A:%.*]], i64 0 +; CHECK-NEXT: [[TMP2:%.*]] = insertelement <2 x double> poison, double [[B:%.*]], i64 0 ; CHECK-NEXT: [[TMP3:%.*]] = tail call i32 @llvm.x86.avx512.vcomi.sd(<2 x double> [[TMP1]], <2 x double> [[TMP2]], i32 0, i32 4) ; CHECK-NEXT: ret i32 [[TMP3]] ; diff --git a/llvm/test/Transforms/InstCombine/X86/x86-avx512.ll b/llvm/test/Transforms/InstCombine/X86/x86-avx512.ll --- a/llvm/test/Transforms/InstCombine/X86/x86-avx512.ll +++ b/llvm/test/Transforms/InstCombine/X86/x86-avx512.ll @@ -813,21 +813,21 @@ define i64 @test(float %f, double %d) { ; ; CHECK-LABEL: @test( -; CHECK-NEXT: [[V03:%.*]] = insertelement <4 x float> poison, float [[F:%.*]], i32 0 +; CHECK-NEXT: [[V03:%.*]] = insertelement <4 x float> poison, float [[F:%.*]], i64 0 ; CHECK-NEXT: [[T0:%.*]] = tail call i32 @llvm.x86.avx512.vcvtss2si32(<4 x float> [[V03]], i32 4) -; CHECK-NEXT: [[V13:%.*]] = insertelement <4 x float> poison, float [[F]], i32 0 +; CHECK-NEXT: [[V13:%.*]] = insertelement <4 x float> poison, float [[F]], i64 0 ; CHECK-NEXT: [[T1:%.*]] = tail call i64 @llvm.x86.avx512.vcvtss2si64(<4 x float> [[V13]], i32 4) -; CHECK-NEXT: [[V23:%.*]] = insertelement <4 x float> poison, float [[F]], i32 0 +; CHECK-NEXT: [[V23:%.*]] = insertelement <4 x float> poison, float [[F]], i64 0 ; CHECK-NEXT: [[T2:%.*]] = tail call i32 @llvm.x86.avx512.cvttss2si(<4 x float> [[V23]], i32 4) -; CHECK-NEXT: [[V33:%.*]] = insertelement <4 x float> poison, float [[F]], i32 0 +; CHECK-NEXT: [[V33:%.*]] = insertelement <4 x float> poison, float [[F]], i64 0 ; CHECK-NEXT: [[T3:%.*]] = tail call i64 @llvm.x86.avx512.cvttss2si64(<4 x float> [[V33]], i32 4) -; CHECK-NEXT: [[V41:%.*]] = insertelement <2 x double> poison, double [[D:%.*]], i32 0 +; CHECK-NEXT: [[V41:%.*]] = insertelement <2 x double> poison, double [[D:%.*]], i64 0 ; CHECK-NEXT: [[T4:%.*]] = tail call i32 @llvm.x86.avx512.vcvtsd2si32(<2 x double> [[V41]], i32 4) -; CHECK-NEXT: [[V51:%.*]] = insertelement <2 x double> poison, double [[D]], i32 0 +; CHECK-NEXT: [[V51:%.*]] = insertelement <2 x double> poison, double [[D]], i64 0 ; CHECK-NEXT: [[T5:%.*]] = tail call i64 @llvm.x86.avx512.vcvtsd2si64(<2 x double> [[V51]], i32 4) -; CHECK-NEXT: [[V61:%.*]] = insertelement <2 x double> poison, double [[D]], i32 0 +; CHECK-NEXT: [[V61:%.*]] = insertelement <2 x double> poison, double [[D]], i64 0 ; CHECK-NEXT: [[T6:%.*]] = tail call i32 @llvm.x86.avx512.cvttsd2si(<2 x double> [[V61]], i32 4) -; CHECK-NEXT: [[V71:%.*]] = insertelement <2 x double> poison, double [[D]], i32 0 +; CHECK-NEXT: [[V71:%.*]] = insertelement <2 x double> poison, double [[D]], i64 0 ; CHECK-NEXT: [[T7:%.*]] = tail call i64 @llvm.x86.avx512.cvttsd2si64(<2 x double> [[V71]], i32 4) ; CHECK-NEXT: [[T8:%.*]] = add i32 [[T0]], [[T2]] ; CHECK-NEXT: [[T9:%.*]] = add i32 [[T4]], [[T6]] @@ -894,21 +894,21 @@ define i64 @test2(float %f, double %d) { ; ; CHECK-LABEL: @test2( -; CHECK-NEXT: [[V03:%.*]] = insertelement <4 x float> poison, float [[F:%.*]], i32 0 +; CHECK-NEXT: [[V03:%.*]] = insertelement <4 x float> poison, float [[F:%.*]], i64 0 ; CHECK-NEXT: [[T0:%.*]] = tail call i32 @llvm.x86.avx512.vcvtss2usi32(<4 x float> [[V03]], i32 4) -; CHECK-NEXT: [[V13:%.*]] = insertelement <4 x float> poison, float [[F]], i32 0 +; CHECK-NEXT: [[V13:%.*]] = insertelement <4 x float> poison, float [[F]], i64 0 ; CHECK-NEXT: [[T1:%.*]] = tail call i64 @llvm.x86.avx512.vcvtss2usi64(<4 x float> [[V13]], i32 4) -; CHECK-NEXT: [[V23:%.*]] = insertelement <4 x float> poison, float [[F]], i32 0 +; CHECK-NEXT: [[V23:%.*]] = insertelement <4 x float> poison, float [[F]], i64 0 ; CHECK-NEXT: [[T2:%.*]] = tail call i32 @llvm.x86.avx512.cvttss2usi(<4 x float> [[V23]], i32 4) -; CHECK-NEXT: [[V33:%.*]] = insertelement <4 x float> poison, float [[F]], i32 0 +; CHECK-NEXT: [[V33:%.*]] = insertelement <4 x float> poison, float [[F]], i64 0 ; CHECK-NEXT: [[T3:%.*]] = tail call i64 @llvm.x86.avx512.cvttss2usi64(<4 x float> [[V33]], i32 4) -; CHECK-NEXT: [[V41:%.*]] = insertelement <2 x double> poison, double [[D:%.*]], i32 0 +; CHECK-NEXT: [[V41:%.*]] = insertelement <2 x double> poison, double [[D:%.*]], i64 0 ; CHECK-NEXT: [[T4:%.*]] = tail call i32 @llvm.x86.avx512.vcvtsd2usi32(<2 x double> [[V41]], i32 4) -; CHECK-NEXT: [[V51:%.*]] = insertelement <2 x double> poison, double [[D]], i32 0 +; CHECK-NEXT: [[V51:%.*]] = insertelement <2 x double> poison, double [[D]], i64 0 ; CHECK-NEXT: [[T5:%.*]] = tail call i64 @llvm.x86.avx512.vcvtsd2usi64(<2 x double> [[V51]], i32 4) -; CHECK-NEXT: [[V61:%.*]] = insertelement <2 x double> poison, double [[D]], i32 0 +; CHECK-NEXT: [[V61:%.*]] = insertelement <2 x double> poison, double [[D]], i64 0 ; CHECK-NEXT: [[T6:%.*]] = tail call i32 @llvm.x86.avx512.cvttsd2usi(<2 x double> [[V61]], i32 4) -; CHECK-NEXT: [[V71:%.*]] = insertelement <2 x double> poison, double [[D]], i32 0 +; CHECK-NEXT: [[V71:%.*]] = insertelement <2 x double> poison, double [[D]], i64 0 ; CHECK-NEXT: [[T7:%.*]] = tail call i64 @llvm.x86.avx512.cvttsd2usi64(<2 x double> [[V71]], i32 4) ; CHECK-NEXT: [[T8:%.*]] = add i32 [[T0]], [[T2]] ; CHECK-NEXT: [[T9:%.*]] = add i32 [[T4]], [[T6]] @@ -978,8 +978,8 @@ ; ; CHECK-LABEL: @test_mask_vfmadd_ss( ; CHECK-NEXT: [[TMP1:%.*]] = extractelement <4 x float> [[A:%.*]], i64 0 -; CHECK-NEXT: [[TMP2:%.*]] = extractelement <4 x float> [[B:%.*]], i32 0 -; CHECK-NEXT: [[TMP3:%.*]] = extractelement <4 x float> [[C:%.*]], i32 0 +; CHECK-NEXT: [[TMP2:%.*]] = extractelement <4 x float> [[B:%.*]], i64 0 +; CHECK-NEXT: [[TMP3:%.*]] = extractelement <4 x float> [[C:%.*]], i64 0 ; CHECK-NEXT: [[TMP4:%.*]] = call float @llvm.fma.f32(float [[TMP1]], float [[TMP2]], float [[TMP3]]) ; CHECK-NEXT: [[TMP5:%.*]] = and i8 [[MASK:%.*]], 1 ; CHECK-NEXT: [[DOTNOT:%.*]] = icmp eq i8 [[TMP5]], 0 @@ -1007,7 +1007,7 @@ define float @test_mask_vfmadd_ss_0(<4 x float> %a, <4 x float> %b, <4 x float> %c, i8 %mask) { ; ; CHECK-LABEL: @test_mask_vfmadd_ss_0( -; CHECK-NEXT: [[TMP1:%.*]] = extractelement <4 x float> [[A:%.*]], i32 0 +; CHECK-NEXT: [[TMP1:%.*]] = extractelement <4 x float> [[A:%.*]], i64 0 ; CHECK-NEXT: [[TMP2:%.*]] = extractelement <4 x float> [[B:%.*]], i64 0 ; CHECK-NEXT: [[TMP3:%.*]] = extractelement <4 x float> [[C:%.*]], i64 0 ; CHECK-NEXT: [[TMP4:%.*]] = call float @llvm.fma.f32(float [[TMP1]], float [[TMP2]], float [[TMP3]]) @@ -1126,8 +1126,8 @@ ; ; CHECK-LABEL: @test_maskz_vfmadd_ss( ; CHECK-NEXT: [[TMP1:%.*]] = extractelement <4 x float> [[A:%.*]], i64 0 -; CHECK-NEXT: [[TMP2:%.*]] = extractelement <4 x float> [[B:%.*]], i32 0 -; CHECK-NEXT: [[TMP3:%.*]] = extractelement <4 x float> [[C:%.*]], i32 0 +; CHECK-NEXT: [[TMP2:%.*]] = extractelement <4 x float> [[B:%.*]], i64 0 +; CHECK-NEXT: [[TMP3:%.*]] = extractelement <4 x float> [[C:%.*]], i64 0 ; CHECK-NEXT: [[TMP4:%.*]] = call float @llvm.fma.f32(float [[TMP1]], float [[TMP2]], float [[TMP3]]) ; CHECK-NEXT: [[TMP5:%.*]] = and i8 [[MASK:%.*]], 1 ; CHECK-NEXT: [[DOTNOT:%.*]] = icmp eq i8 [[TMP5]], 0 @@ -1155,7 +1155,7 @@ define float @test_maskz_vfmadd_ss_0(<4 x float> %a, <4 x float> %b, <4 x float> %c, i8 %mask) { ; ; CHECK-LABEL: @test_maskz_vfmadd_ss_0( -; CHECK-NEXT: [[TMP1:%.*]] = extractelement <4 x float> [[A:%.*]], i32 0 +; CHECK-NEXT: [[TMP1:%.*]] = extractelement <4 x float> [[A:%.*]], i64 0 ; CHECK-NEXT: [[TMP2:%.*]] = extractelement <4 x float> [[B:%.*]], i64 0 ; CHECK-NEXT: [[TMP3:%.*]] = extractelement <4 x float> [[C:%.*]], i64 0 ; CHECK-NEXT: [[TMP4:%.*]] = call float @llvm.fma.f32(float [[TMP1]], float [[TMP2]], float [[TMP3]]) @@ -1271,8 +1271,8 @@ define <4 x float> @test_mask3_vfmadd_ss(<4 x float> %a, <4 x float> %b, <4 x float> %c, i8 %mask) { ; ; CHECK-LABEL: @test_mask3_vfmadd_ss( -; CHECK-NEXT: [[TMP1:%.*]] = extractelement <4 x float> [[A:%.*]], i32 0 -; CHECK-NEXT: [[TMP2:%.*]] = extractelement <4 x float> [[B:%.*]], i32 0 +; CHECK-NEXT: [[TMP1:%.*]] = extractelement <4 x float> [[A:%.*]], i64 0 +; CHECK-NEXT: [[TMP2:%.*]] = extractelement <4 x float> [[B:%.*]], i64 0 ; CHECK-NEXT: [[TMP3:%.*]] = extractelement <4 x float> [[C:%.*]], i64 0 ; CHECK-NEXT: [[TMP4:%.*]] = call float @llvm.fma.f32(float [[TMP1]], float [[TMP2]], float [[TMP3]]) ; CHECK-NEXT: [[TMP5:%.*]] = and i8 [[MASK:%.*]], 1 @@ -1303,7 +1303,7 @@ ; CHECK-LABEL: @test_mask3_vfmadd_ss_0( ; CHECK-NEXT: [[TMP1:%.*]] = extractelement <4 x float> [[A:%.*]], i64 0 ; CHECK-NEXT: [[TMP2:%.*]] = extractelement <4 x float> [[B:%.*]], i64 0 -; CHECK-NEXT: [[TMP3:%.*]] = extractelement <4 x float> [[C:%.*]], i32 0 +; CHECK-NEXT: [[TMP3:%.*]] = extractelement <4 x float> [[C:%.*]], i64 0 ; CHECK-NEXT: [[TMP4:%.*]] = call float @llvm.fma.f32(float [[TMP1]], float [[TMP2]], float [[TMP3]]) ; CHECK-NEXT: [[TMP5:%.*]] = and i8 [[MASK:%.*]], 1 ; CHECK-NEXT: [[DOTNOT:%.*]] = icmp eq i8 [[TMP5]], 0 @@ -1417,8 +1417,8 @@ define <4 x float> @test_mask3_vfmsub_ss(<4 x float> %a, <4 x float> %b, <4 x float> %c, i8 %mask) { ; ; CHECK-LABEL: @test_mask3_vfmsub_ss( -; CHECK-NEXT: [[TMP1:%.*]] = extractelement <4 x float> [[A:%.*]], i32 0 -; CHECK-NEXT: [[TMP2:%.*]] = extractelement <4 x float> [[B:%.*]], i32 0 +; CHECK-NEXT: [[TMP1:%.*]] = extractelement <4 x float> [[A:%.*]], i64 0 +; CHECK-NEXT: [[TMP2:%.*]] = extractelement <4 x float> [[B:%.*]], i64 0 ; CHECK-NEXT: [[TMP3:%.*]] = extractelement <4 x float> [[C:%.*]], i64 0 ; CHECK-NEXT: [[TMP4:%.*]] = fneg float [[TMP3]] ; CHECK-NEXT: [[TMP5:%.*]] = call float @llvm.fma.f32(float [[TMP1]], float [[TMP2]], float [[TMP4]]) @@ -1453,10 +1453,10 @@ ; CHECK-LABEL: @test_mask3_vfmsub_ss_0( ; CHECK-NEXT: [[TMP1:%.*]] = extractelement <4 x float> [[A:%.*]], i64 0 ; CHECK-NEXT: [[TMP2:%.*]] = extractelement <4 x float> [[B:%.*]], i64 0 -; CHECK-NEXT: [[TMP3:%.*]] = extractelement <4 x float> [[C:%.*]], i32 0 +; CHECK-NEXT: [[TMP3:%.*]] = extractelement <4 x float> [[C:%.*]], i64 0 ; CHECK-NEXT: [[TMP4:%.*]] = fneg float [[TMP3]] ; CHECK-NEXT: [[TMP5:%.*]] = call float @llvm.fma.f32(float [[TMP1]], float [[TMP2]], float [[TMP4]]) -; CHECK-NEXT: [[TMP6:%.*]] = extractelement <4 x float> [[C]], i32 0 +; CHECK-NEXT: [[TMP6:%.*]] = extractelement <4 x float> [[C]], i64 0 ; CHECK-NEXT: [[TMP7:%.*]] = and i8 [[MASK:%.*]], 1 ; CHECK-NEXT: [[DOTNOT:%.*]] = icmp eq i8 [[TMP7]], 0 ; CHECK-NEXT: [[TMP8:%.*]] = select i1 [[DOTNOT]], float [[TMP6]], float [[TMP5]] @@ -1625,9 +1625,9 @@ define <4 x float> @test_mask3_vfnmsub_ss(<4 x float> %a, <4 x float> %b, <4 x float> %c, i8 %mask) { ; ; CHECK-LABEL: @test_mask3_vfnmsub_ss( -; CHECK-NEXT: [[TMP1:%.*]] = extractelement <4 x float> [[A:%.*]], i32 0 +; CHECK-NEXT: [[TMP1:%.*]] = extractelement <4 x float> [[A:%.*]], i64 0 ; CHECK-NEXT: [[TMP2:%.*]] = fneg float [[TMP1]] -; CHECK-NEXT: [[TMP3:%.*]] = extractelement <4 x float> [[B:%.*]], i32 0 +; CHECK-NEXT: [[TMP3:%.*]] = extractelement <4 x float> [[B:%.*]], i64 0 ; CHECK-NEXT: [[TMP4:%.*]] = extractelement <4 x float> [[C:%.*]], i64 0 ; CHECK-NEXT: [[TMP5:%.*]] = fneg float [[TMP4]] ; CHECK-NEXT: [[TMP6:%.*]] = call float @llvm.fma.f32(float [[TMP2]], float [[TMP3]], float [[TMP5]]) @@ -1664,10 +1664,10 @@ ; CHECK-NEXT: [[TMP1:%.*]] = extractelement <4 x float> [[A:%.*]], i64 0 ; CHECK-NEXT: [[TMP2:%.*]] = fneg float [[TMP1]] ; CHECK-NEXT: [[TMP3:%.*]] = extractelement <4 x float> [[B:%.*]], i64 0 -; CHECK-NEXT: [[TMP4:%.*]] = extractelement <4 x float> [[C:%.*]], i32 0 +; CHECK-NEXT: [[TMP4:%.*]] = extractelement <4 x float> [[C:%.*]], i64 0 ; CHECK-NEXT: [[TMP5:%.*]] = fneg float [[TMP4]] ; CHECK-NEXT: [[TMP6:%.*]] = call float @llvm.fma.f32(float [[TMP2]], float [[TMP3]], float [[TMP5]]) -; CHECK-NEXT: [[TMP7:%.*]] = extractelement <4 x float> [[C]], i32 0 +; CHECK-NEXT: [[TMP7:%.*]] = extractelement <4 x float> [[C]], i64 0 ; CHECK-NEXT: [[TMP8:%.*]] = and i8 [[MASK:%.*]], 1 ; CHECK-NEXT: [[DOTNOT:%.*]] = icmp eq i8 [[TMP8]], 0 ; CHECK-NEXT: [[TMP9:%.*]] = select i1 [[DOTNOT]], float [[TMP7]], float [[TMP6]] @@ -3607,8 +3607,8 @@ define i32 @test_comi_ss_0(float %a, float %b) { ; ; CHECK-LABEL: @test_comi_ss_0( -; CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x float> poison, float [[A:%.*]], i32 0 -; CHECK-NEXT: [[TMP2:%.*]] = insertelement <4 x float> poison, float [[B:%.*]], i32 0 +; CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x float> poison, float [[A:%.*]], i64 0 +; CHECK-NEXT: [[TMP2:%.*]] = insertelement <4 x float> poison, float [[B:%.*]], i64 0 ; CHECK-NEXT: [[TMP3:%.*]] = tail call i32 @llvm.x86.avx512.vcomi.ss(<4 x float> [[TMP1]], <4 x float> [[TMP2]], i32 0, i32 4) ; CHECK-NEXT: ret i32 [[TMP3]] ; @@ -3629,8 +3629,8 @@ define i32 @test_comi_sd_0(double %a, double %b) { ; ; CHECK-LABEL: @test_comi_sd_0( -; CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x double> poison, double [[A:%.*]], i32 0 -; CHECK-NEXT: [[TMP2:%.*]] = insertelement <2 x double> poison, double [[B:%.*]], i32 0 +; CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x double> poison, double [[A:%.*]], i64 0 +; CHECK-NEXT: [[TMP2:%.*]] = insertelement <2 x double> poison, double [[B:%.*]], i64 0 ; CHECK-NEXT: [[TMP3:%.*]] = tail call i32 @llvm.x86.avx512.vcomi.sd(<2 x double> [[TMP1]], <2 x double> [[TMP2]], i32 0, i32 4) ; CHECK-NEXT: ret i32 [[TMP3]] ; diff --git a/llvm/test/Transforms/InstCombine/X86/x86-fma.ll b/llvm/test/Transforms/InstCombine/X86/x86-fma.ll --- a/llvm/test/Transforms/InstCombine/X86/x86-fma.ll +++ b/llvm/test/Transforms/InstCombine/X86/x86-fma.ll @@ -6,8 +6,8 @@ ; ; CHECK-LABEL: @test_vfmadd_ss( ; CHECK-NEXT: [[TMP1:%.*]] = extractelement <4 x float> [[A:%.*]], i64 0 -; CHECK-NEXT: [[TMP2:%.*]] = extractelement <4 x float> [[B:%.*]], i32 0 -; CHECK-NEXT: [[TMP3:%.*]] = extractelement <4 x float> [[C:%.*]], i32 0 +; CHECK-NEXT: [[TMP2:%.*]] = extractelement <4 x float> [[B:%.*]], i64 0 +; CHECK-NEXT: [[TMP3:%.*]] = extractelement <4 x float> [[C:%.*]], i64 0 ; CHECK-NEXT: [[TMP4:%.*]] = call float @llvm.fma.f32(float [[TMP1]], float [[TMP2]], float [[TMP3]]) ; CHECK-NEXT: [[TMP5:%.*]] = insertelement <4 x float> [[A]], float [[TMP4]], i64 0 ; CHECK-NEXT: ret <4 x float> [[TMP5]] @@ -29,7 +29,7 @@ define float @test_vfmadd_ss_0(<4 x float> %a, <4 x float> %b, <4 x float> %c) { ; ; CHECK-LABEL: @test_vfmadd_ss_0( -; CHECK-NEXT: [[TMP1:%.*]] = extractelement <4 x float> [[A:%.*]], i32 0 +; CHECK-NEXT: [[TMP1:%.*]] = extractelement <4 x float> [[A:%.*]], i64 0 ; CHECK-NEXT: [[TMP2:%.*]] = extractelement <4 x float> [[B:%.*]], i64 0 ; CHECK-NEXT: [[TMP3:%.*]] = extractelement <4 x float> [[C:%.*]], i64 0 ; CHECK-NEXT: [[TMP4:%.*]] = call float @llvm.fma.f32(float [[TMP1]], float [[TMP2]], float [[TMP3]]) diff --git a/llvm/test/Transforms/InstCombine/X86/x86-insertps.ll b/llvm/test/Transforms/InstCombine/X86/x86-insertps.ll --- a/llvm/test/Transforms/InstCombine/X86/x86-insertps.ll +++ b/llvm/test/Transforms/InstCombine/X86/x86-insertps.ll @@ -58,7 +58,7 @@ define <4 x float> @insertps_0xc1(<4 x float> %v1, <4 x float> %v2) { ; CHECK-LABEL: @insertps_0xc1( -; CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x float> [[V1:%.*]], float 0.000000e+00, i32 0 +; CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x float> [[V1:%.*]], float 0.000000e+00, i64 0 ; CHECK-NEXT: ret <4 x float> [[TMP1]] ; %res = call <4 x float> @llvm.x86.sse41.insertps(<4 x float> %v1, <4 x float> %v2, i8 193) diff --git a/llvm/test/Transforms/InstCombine/X86/x86-pshufb-inseltpoison.ll b/llvm/test/Transforms/InstCombine/X86/x86-pshufb-inseltpoison.ll --- a/llvm/test/Transforms/InstCombine/X86/x86-pshufb-inseltpoison.ll +++ b/llvm/test/Transforms/InstCombine/X86/x86-pshufb-inseltpoison.ll @@ -498,7 +498,7 @@ define <64 x i8> @demanded_elts_insertion_avx512(<64 x i8> %InVec, <64 x i8> %BaseMask, i8 %M0, i8 %M30) { ; CHECK-LABEL: @demanded_elts_insertion_avx512( -; CHECK-NEXT: [[TMP1:%.*]] = insertelement <64 x i8> poison, i8 [[M0:%.*]], i32 0 +; CHECK-NEXT: [[TMP1:%.*]] = insertelement <64 x i8> poison, i8 [[M0:%.*]], i64 0 ; CHECK-NEXT: [[TMP2:%.*]] = tail call <64 x i8> @llvm.x86.avx512.pshuf.b.512(<64 x i8> [[INVEC:%.*]], <64 x i8> [[TMP1]]) ; CHECK-NEXT: [[TMP3:%.*]] = shufflevector <64 x i8> [[TMP2]], <64 x i8> poison, <64 x i32> zeroinitializer ; CHECK-NEXT: ret <64 x i8> [[TMP3]] diff --git a/llvm/test/Transforms/InstCombine/X86/x86-pshufb.ll b/llvm/test/Transforms/InstCombine/X86/x86-pshufb.ll --- a/llvm/test/Transforms/InstCombine/X86/x86-pshufb.ll +++ b/llvm/test/Transforms/InstCombine/X86/x86-pshufb.ll @@ -498,7 +498,7 @@ define <64 x i8> @demanded_elts_insertion_avx512(<64 x i8> %InVec, <64 x i8> %BaseMask, i8 %M0, i8 %M30) { ; CHECK-LABEL: @demanded_elts_insertion_avx512( -; CHECK-NEXT: [[TMP1:%.*]] = insertelement <64 x i8> poison, i8 [[M0:%.*]], i32 0 +; CHECK-NEXT: [[TMP1:%.*]] = insertelement <64 x i8> poison, i8 [[M0:%.*]], i64 0 ; CHECK-NEXT: [[TMP2:%.*]] = tail call <64 x i8> @llvm.x86.avx512.pshuf.b.512(<64 x i8> [[INVEC:%.*]], <64 x i8> [[TMP1]]) ; CHECK-NEXT: [[TMP3:%.*]] = shufflevector <64 x i8> [[TMP2]], <64 x i8> undef, <64 x i32> zeroinitializer ; CHECK-NEXT: ret <64 x i8> [[TMP3]] diff --git a/llvm/test/Transforms/InstCombine/X86/x86-sse-inseltpoison.ll b/llvm/test/Transforms/InstCombine/X86/x86-sse-inseltpoison.ll --- a/llvm/test/Transforms/InstCombine/X86/x86-sse-inseltpoison.ll +++ b/llvm/test/Transforms/InstCombine/X86/x86-sse-inseltpoison.ll @@ -4,9 +4,9 @@ define float @test_rcp_ss_0(float %a) { ; CHECK-LABEL: @test_rcp_ss_0( -; CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x float> poison, float [[A:%.*]], i32 0 +; CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x float> poison, float [[A:%.*]], i64 0 ; CHECK-NEXT: [[TMP2:%.*]] = tail call <4 x float> @llvm.x86.sse.rcp.ss(<4 x float> [[TMP1]]) -; CHECK-NEXT: [[TMP3:%.*]] = extractelement <4 x float> [[TMP2]], i32 0 +; CHECK-NEXT: [[TMP3:%.*]] = extractelement <4 x float> [[TMP2]], i64 0 ; CHECK-NEXT: ret float [[TMP3]] ; %1 = insertelement <4 x float> poison, float %a, i32 0 @@ -60,9 +60,9 @@ define float @test_rsqrt_ss_0(float %a) { ; CHECK-LABEL: @test_rsqrt_ss_0( -; CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x float> poison, float [[A:%.*]], i32 0 +; CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x float> poison, float [[A:%.*]], i64 0 ; CHECK-NEXT: [[TMP2:%.*]] = tail call <4 x float> @llvm.x86.sse.rsqrt.ss(<4 x float> [[TMP1]]) -; CHECK-NEXT: [[TMP3:%.*]] = extractelement <4 x float> [[TMP2]], i32 0 +; CHECK-NEXT: [[TMP3:%.*]] = extractelement <4 x float> [[TMP2]], i64 0 ; CHECK-NEXT: ret float [[TMP3]] ; %1 = insertelement <4 x float> poison, float %a, i32 0 @@ -273,10 +273,10 @@ define float @test_min_ss_0(float %a, float %b) { ; CHECK-LABEL: @test_min_ss_0( -; CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x float> poison, float [[A:%.*]], i32 0 -; CHECK-NEXT: [[TMP2:%.*]] = insertelement <4 x float> poison, float [[B:%.*]], i32 0 +; CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x float> poison, float [[A:%.*]], i64 0 +; CHECK-NEXT: [[TMP2:%.*]] = insertelement <4 x float> poison, float [[B:%.*]], i64 0 ; CHECK-NEXT: [[TMP3:%.*]] = tail call <4 x float> @llvm.x86.sse.min.ss(<4 x float> [[TMP1]], <4 x float> [[TMP2]]) -; CHECK-NEXT: [[TMP4:%.*]] = extractelement <4 x float> [[TMP3]], i32 0 +; CHECK-NEXT: [[TMP4:%.*]] = extractelement <4 x float> [[TMP3]], i64 0 ; CHECK-NEXT: ret float [[TMP4]] ; %1 = insertelement <4 x float> poison, float %a, i32 0 @@ -308,9 +308,9 @@ define float @test_min_ss_3(float %a) { ; CHECK-LABEL: @test_min_ss_3( -; CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x float> , float [[A:%.*]], i32 0 +; CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x float> , float [[A:%.*]], i64 0 ; CHECK-NEXT: [[TMP2:%.*]] = tail call <4 x float> @llvm.x86.sse.min.ss(<4 x float> [[TMP1]], <4 x float> [[TMP1]]) -; CHECK-NEXT: [[TMP3:%.*]] = extractelement <4 x float> [[TMP2]], i32 0 +; CHECK-NEXT: [[TMP3:%.*]] = extractelement <4 x float> [[TMP2]], i64 0 ; CHECK-NEXT: ret float [[TMP3]] ; %1 = insertelement <4 x float> zeroinitializer, float %a, i32 0 @@ -333,10 +333,10 @@ define float @test_max_ss_0(float %a, float %b) { ; CHECK-LABEL: @test_max_ss_0( -; CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x float> poison, float [[A:%.*]], i32 0 -; CHECK-NEXT: [[TMP2:%.*]] = insertelement <4 x float> poison, float [[B:%.*]], i32 0 +; CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x float> poison, float [[A:%.*]], i64 0 +; CHECK-NEXT: [[TMP2:%.*]] = insertelement <4 x float> poison, float [[B:%.*]], i64 0 ; CHECK-NEXT: [[TMP3:%.*]] = tail call <4 x float> @llvm.x86.sse.max.ss(<4 x float> [[TMP1]], <4 x float> [[TMP2]]) -; CHECK-NEXT: [[TMP4:%.*]] = extractelement <4 x float> [[TMP3]], i32 0 +; CHECK-NEXT: [[TMP4:%.*]] = extractelement <4 x float> [[TMP3]], i64 0 ; CHECK-NEXT: ret float [[TMP4]] ; %1 = insertelement <4 x float> poison, float %a, i32 0 @@ -368,9 +368,9 @@ define float @test_max_ss_4(float %a) { ; CHECK-LABEL: @test_max_ss_4( -; CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x float> , float [[A:%.*]], i32 0 +; CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x float> , float [[A:%.*]], i64 0 ; CHECK-NEXT: [[TMP2:%.*]] = tail call <4 x float> @llvm.x86.sse.max.ss(<4 x float> [[TMP1]], <4 x float> [[TMP1]]) -; CHECK-NEXT: [[TMP3:%.*]] = extractelement <4 x float> [[TMP2]], i32 0 +; CHECK-NEXT: [[TMP3:%.*]] = extractelement <4 x float> [[TMP2]], i64 0 ; CHECK-NEXT: ret float [[TMP3]] ; %1 = insertelement <4 x float> zeroinitializer, float %a, i32 0 @@ -393,10 +393,10 @@ define float @test_cmp_ss_0(float %a, float %b) { ; CHECK-LABEL: @test_cmp_ss_0( -; CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x float> poison, float [[A:%.*]], i32 0 -; CHECK-NEXT: [[TMP2:%.*]] = insertelement <4 x float> poison, float [[B:%.*]], i32 0 +; CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x float> poison, float [[A:%.*]], i64 0 +; CHECK-NEXT: [[TMP2:%.*]] = insertelement <4 x float> poison, float [[B:%.*]], i64 0 ; CHECK-NEXT: [[TMP3:%.*]] = tail call <4 x float> @llvm.x86.sse.cmp.ss(<4 x float> [[TMP1]], <4 x float> [[TMP2]], i8 0) -; CHECK-NEXT: [[R:%.*]] = extractelement <4 x float> [[TMP3]], i32 0 +; CHECK-NEXT: [[R:%.*]] = extractelement <4 x float> [[TMP3]], i64 0 ; CHECK-NEXT: ret float [[R]] ; %1 = insertelement <4 x float> poison, float %a, i32 0 @@ -428,9 +428,9 @@ define float @test_cmp_ss_2(float %a) { ; CHECK-LABEL: @test_cmp_ss_2( -; CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x float> , float [[A:%.*]], i32 0 +; CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x float> , float [[A:%.*]], i64 0 ; CHECK-NEXT: [[TMP2:%.*]] = tail call <4 x float> @llvm.x86.sse.cmp.ss(<4 x float> [[TMP1]], <4 x float> [[TMP1]], i8 3) -; CHECK-NEXT: [[TMP3:%.*]] = extractelement <4 x float> [[TMP2]], i32 0 +; CHECK-NEXT: [[TMP3:%.*]] = extractelement <4 x float> [[TMP2]], i64 0 ; CHECK-NEXT: ret float [[TMP3]] ; %1 = insertelement <4 x float> zeroinitializer, float %a, i32 0 @@ -441,8 +441,8 @@ define i32 @test_comieq_ss_0(float %a, float %b) { ; CHECK-LABEL: @test_comieq_ss_0( -; CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x float> poison, float [[A:%.*]], i32 0 -; CHECK-NEXT: [[TMP2:%.*]] = insertelement <4 x float> poison, float [[B:%.*]], i32 0 +; CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x float> poison, float [[A:%.*]], i64 0 +; CHECK-NEXT: [[TMP2:%.*]] = insertelement <4 x float> poison, float [[B:%.*]], i64 0 ; CHECK-NEXT: [[TMP3:%.*]] = tail call i32 @llvm.x86.sse.comieq.ss(<4 x float> [[TMP1]], <4 x float> [[TMP2]]) ; CHECK-NEXT: ret i32 [[TMP3]] ; @@ -460,8 +460,8 @@ define i32 @test_comige_ss_0(float %a, float %b) { ; CHECK-LABEL: @test_comige_ss_0( -; CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x float> poison, float [[A:%.*]], i32 0 -; CHECK-NEXT: [[TMP2:%.*]] = insertelement <4 x float> poison, float [[B:%.*]], i32 0 +; CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x float> poison, float [[A:%.*]], i64 0 +; CHECK-NEXT: [[TMP2:%.*]] = insertelement <4 x float> poison, float [[B:%.*]], i64 0 ; CHECK-NEXT: [[TMP3:%.*]] = tail call i32 @llvm.x86.sse.comige.ss(<4 x float> [[TMP1]], <4 x float> [[TMP2]]) ; CHECK-NEXT: ret i32 [[TMP3]] ; @@ -479,8 +479,8 @@ define i32 @test_comigt_ss_0(float %a, float %b) { ; CHECK-LABEL: @test_comigt_ss_0( -; CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x float> poison, float [[A:%.*]], i32 0 -; CHECK-NEXT: [[TMP2:%.*]] = insertelement <4 x float> poison, float [[B:%.*]], i32 0 +; CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x float> poison, float [[A:%.*]], i64 0 +; CHECK-NEXT: [[TMP2:%.*]] = insertelement <4 x float> poison, float [[B:%.*]], i64 0 ; CHECK-NEXT: [[TMP3:%.*]] = tail call i32 @llvm.x86.sse.comigt.ss(<4 x float> [[TMP1]], <4 x float> [[TMP2]]) ; CHECK-NEXT: ret i32 [[TMP3]] ; @@ -498,8 +498,8 @@ define i32 @test_comile_ss_0(float %a, float %b) { ; CHECK-LABEL: @test_comile_ss_0( -; CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x float> poison, float [[A:%.*]], i32 0 -; CHECK-NEXT: [[TMP2:%.*]] = insertelement <4 x float> poison, float [[B:%.*]], i32 0 +; CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x float> poison, float [[A:%.*]], i64 0 +; CHECK-NEXT: [[TMP2:%.*]] = insertelement <4 x float> poison, float [[B:%.*]], i64 0 ; CHECK-NEXT: [[TMP3:%.*]] = tail call i32 @llvm.x86.sse.comile.ss(<4 x float> [[TMP1]], <4 x float> [[TMP2]]) ; CHECK-NEXT: ret i32 [[TMP3]] ; @@ -517,8 +517,8 @@ define i32 @test_comilt_ss_0(float %a, float %b) { ; CHECK-LABEL: @test_comilt_ss_0( -; CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x float> poison, float [[A:%.*]], i32 0 -; CHECK-NEXT: [[TMP2:%.*]] = insertelement <4 x float> poison, float [[B:%.*]], i32 0 +; CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x float> poison, float [[A:%.*]], i64 0 +; CHECK-NEXT: [[TMP2:%.*]] = insertelement <4 x float> poison, float [[B:%.*]], i64 0 ; CHECK-NEXT: [[TMP3:%.*]] = tail call i32 @llvm.x86.sse.comilt.ss(<4 x float> [[TMP1]], <4 x float> [[TMP2]]) ; CHECK-NEXT: ret i32 [[TMP3]] ; @@ -536,8 +536,8 @@ define i32 @test_comineq_ss_0(float %a, float %b) { ; CHECK-LABEL: @test_comineq_ss_0( -; CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x float> poison, float [[A:%.*]], i32 0 -; CHECK-NEXT: [[TMP2:%.*]] = insertelement <4 x float> poison, float [[B:%.*]], i32 0 +; CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x float> poison, float [[A:%.*]], i64 0 +; CHECK-NEXT: [[TMP2:%.*]] = insertelement <4 x float> poison, float [[B:%.*]], i64 0 ; CHECK-NEXT: [[TMP3:%.*]] = tail call i32 @llvm.x86.sse.comineq.ss(<4 x float> [[TMP1]], <4 x float> [[TMP2]]) ; CHECK-NEXT: ret i32 [[TMP3]] ; @@ -555,8 +555,8 @@ define i32 @test_ucomieq_ss_0(float %a, float %b) { ; CHECK-LABEL: @test_ucomieq_ss_0( -; CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x float> poison, float [[A:%.*]], i32 0 -; CHECK-NEXT: [[TMP2:%.*]] = insertelement <4 x float> poison, float [[B:%.*]], i32 0 +; CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x float> poison, float [[A:%.*]], i64 0 +; CHECK-NEXT: [[TMP2:%.*]] = insertelement <4 x float> poison, float [[B:%.*]], i64 0 ; CHECK-NEXT: [[TMP3:%.*]] = tail call i32 @llvm.x86.sse.ucomieq.ss(<4 x float> [[TMP1]], <4 x float> [[TMP2]]) ; CHECK-NEXT: ret i32 [[TMP3]] ; @@ -574,8 +574,8 @@ define i32 @test_ucomige_ss_0(float %a, float %b) { ; CHECK-LABEL: @test_ucomige_ss_0( -; CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x float> poison, float [[A:%.*]], i32 0 -; CHECK-NEXT: [[TMP2:%.*]] = insertelement <4 x float> poison, float [[B:%.*]], i32 0 +; CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x float> poison, float [[A:%.*]], i64 0 +; CHECK-NEXT: [[TMP2:%.*]] = insertelement <4 x float> poison, float [[B:%.*]], i64 0 ; CHECK-NEXT: [[TMP3:%.*]] = tail call i32 @llvm.x86.sse.ucomige.ss(<4 x float> [[TMP1]], <4 x float> [[TMP2]]) ; CHECK-NEXT: ret i32 [[TMP3]] ; @@ -593,8 +593,8 @@ define i32 @test_ucomigt_ss_0(float %a, float %b) { ; CHECK-LABEL: @test_ucomigt_ss_0( -; CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x float> poison, float [[A:%.*]], i32 0 -; CHECK-NEXT: [[TMP2:%.*]] = insertelement <4 x float> poison, float [[B:%.*]], i32 0 +; CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x float> poison, float [[A:%.*]], i64 0 +; CHECK-NEXT: [[TMP2:%.*]] = insertelement <4 x float> poison, float [[B:%.*]], i64 0 ; CHECK-NEXT: [[TMP3:%.*]] = tail call i32 @llvm.x86.sse.ucomigt.ss(<4 x float> [[TMP1]], <4 x float> [[TMP2]]) ; CHECK-NEXT: ret i32 [[TMP3]] ; @@ -612,8 +612,8 @@ define i32 @test_ucomile_ss_0(float %a, float %b) { ; CHECK-LABEL: @test_ucomile_ss_0( -; CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x float> poison, float [[A:%.*]], i32 0 -; CHECK-NEXT: [[TMP2:%.*]] = insertelement <4 x float> poison, float [[B:%.*]], i32 0 +; CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x float> poison, float [[A:%.*]], i64 0 +; CHECK-NEXT: [[TMP2:%.*]] = insertelement <4 x float> poison, float [[B:%.*]], i64 0 ; CHECK-NEXT: [[TMP3:%.*]] = tail call i32 @llvm.x86.sse.ucomile.ss(<4 x float> [[TMP1]], <4 x float> [[TMP2]]) ; CHECK-NEXT: ret i32 [[TMP3]] ; @@ -631,8 +631,8 @@ define i32 @test_ucomilt_ss_0(float %a, float %b) { ; CHECK-LABEL: @test_ucomilt_ss_0( -; CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x float> poison, float [[A:%.*]], i32 0 -; CHECK-NEXT: [[TMP2:%.*]] = insertelement <4 x float> poison, float [[B:%.*]], i32 0 +; CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x float> poison, float [[A:%.*]], i64 0 +; CHECK-NEXT: [[TMP2:%.*]] = insertelement <4 x float> poison, float [[B:%.*]], i64 0 ; CHECK-NEXT: [[TMP3:%.*]] = tail call i32 @llvm.x86.sse.ucomilt.ss(<4 x float> [[TMP1]], <4 x float> [[TMP2]]) ; CHECK-NEXT: ret i32 [[TMP3]] ; @@ -650,8 +650,8 @@ define i32 @test_ucomineq_ss_0(float %a, float %b) { ; CHECK-LABEL: @test_ucomineq_ss_0( -; CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x float> poison, float [[A:%.*]], i32 0 -; CHECK-NEXT: [[TMP2:%.*]] = insertelement <4 x float> poison, float [[B:%.*]], i32 0 +; CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x float> poison, float [[A:%.*]], i64 0 +; CHECK-NEXT: [[TMP2:%.*]] = insertelement <4 x float> poison, float [[B:%.*]], i64 0 ; CHECK-NEXT: [[TMP3:%.*]] = tail call i32 @llvm.x86.sse.ucomineq.ss(<4 x float> [[TMP1]], <4 x float> [[TMP2]]) ; CHECK-NEXT: ret i32 [[TMP3]] ; diff --git a/llvm/test/Transforms/InstCombine/X86/x86-sse.ll b/llvm/test/Transforms/InstCombine/X86/x86-sse.ll --- a/llvm/test/Transforms/InstCombine/X86/x86-sse.ll +++ b/llvm/test/Transforms/InstCombine/X86/x86-sse.ll @@ -4,9 +4,9 @@ define float @test_rcp_ss_0(float %a) { ; CHECK-LABEL: @test_rcp_ss_0( -; CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x float> poison, float [[A:%.*]], i32 0 +; CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x float> poison, float [[A:%.*]], i64 0 ; CHECK-NEXT: [[TMP2:%.*]] = tail call <4 x float> @llvm.x86.sse.rcp.ss(<4 x float> [[TMP1]]) -; CHECK-NEXT: [[TMP3:%.*]] = extractelement <4 x float> [[TMP2]], i32 0 +; CHECK-NEXT: [[TMP3:%.*]] = extractelement <4 x float> [[TMP2]], i64 0 ; CHECK-NEXT: ret float [[TMP3]] ; %1 = insertelement <4 x float> undef, float %a, i32 0 @@ -60,9 +60,9 @@ define float @test_rsqrt_ss_0(float %a) { ; CHECK-LABEL: @test_rsqrt_ss_0( -; CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x float> poison, float [[A:%.*]], i32 0 +; CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x float> poison, float [[A:%.*]], i64 0 ; CHECK-NEXT: [[TMP2:%.*]] = tail call <4 x float> @llvm.x86.sse.rsqrt.ss(<4 x float> [[TMP1]]) -; CHECK-NEXT: [[TMP3:%.*]] = extractelement <4 x float> [[TMP2]], i32 0 +; CHECK-NEXT: [[TMP3:%.*]] = extractelement <4 x float> [[TMP2]], i64 0 ; CHECK-NEXT: ret float [[TMP3]] ; %1 = insertelement <4 x float> undef, float %a, i32 0 @@ -273,10 +273,10 @@ define float @test_min_ss_0(float %a, float %b) { ; CHECK-LABEL: @test_min_ss_0( -; CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x float> poison, float [[A:%.*]], i32 0 -; CHECK-NEXT: [[TMP2:%.*]] = insertelement <4 x float> poison, float [[B:%.*]], i32 0 +; CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x float> poison, float [[A:%.*]], i64 0 +; CHECK-NEXT: [[TMP2:%.*]] = insertelement <4 x float> poison, float [[B:%.*]], i64 0 ; CHECK-NEXT: [[TMP3:%.*]] = tail call <4 x float> @llvm.x86.sse.min.ss(<4 x float> [[TMP1]], <4 x float> [[TMP2]]) -; CHECK-NEXT: [[TMP4:%.*]] = extractelement <4 x float> [[TMP3]], i32 0 +; CHECK-NEXT: [[TMP4:%.*]] = extractelement <4 x float> [[TMP3]], i64 0 ; CHECK-NEXT: ret float [[TMP4]] ; %1 = insertelement <4 x float> undef, float %a, i32 0 @@ -308,9 +308,9 @@ define float @test_min_ss_3(float %a) { ; CHECK-LABEL: @test_min_ss_3( -; CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x float> , float [[A:%.*]], i32 0 +; CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x float> , float [[A:%.*]], i64 0 ; CHECK-NEXT: [[TMP2:%.*]] = tail call <4 x float> @llvm.x86.sse.min.ss(<4 x float> [[TMP1]], <4 x float> [[TMP1]]) -; CHECK-NEXT: [[TMP3:%.*]] = extractelement <4 x float> [[TMP2]], i32 0 +; CHECK-NEXT: [[TMP3:%.*]] = extractelement <4 x float> [[TMP2]], i64 0 ; CHECK-NEXT: ret float [[TMP3]] ; %1 = insertelement <4 x float> zeroinitializer, float %a, i32 0 @@ -333,10 +333,10 @@ define float @test_max_ss_0(float %a, float %b) { ; CHECK-LABEL: @test_max_ss_0( -; CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x float> poison, float [[A:%.*]], i32 0 -; CHECK-NEXT: [[TMP2:%.*]] = insertelement <4 x float> poison, float [[B:%.*]], i32 0 +; CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x float> poison, float [[A:%.*]], i64 0 +; CHECK-NEXT: [[TMP2:%.*]] = insertelement <4 x float> poison, float [[B:%.*]], i64 0 ; CHECK-NEXT: [[TMP3:%.*]] = tail call <4 x float> @llvm.x86.sse.max.ss(<4 x float> [[TMP1]], <4 x float> [[TMP2]]) -; CHECK-NEXT: [[TMP4:%.*]] = extractelement <4 x float> [[TMP3]], i32 0 +; CHECK-NEXT: [[TMP4:%.*]] = extractelement <4 x float> [[TMP3]], i64 0 ; CHECK-NEXT: ret float [[TMP4]] ; %1 = insertelement <4 x float> undef, float %a, i32 0 @@ -368,9 +368,9 @@ define float @test_max_ss_4(float %a) { ; CHECK-LABEL: @test_max_ss_4( -; CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x float> , float [[A:%.*]], i32 0 +; CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x float> , float [[A:%.*]], i64 0 ; CHECK-NEXT: [[TMP2:%.*]] = tail call <4 x float> @llvm.x86.sse.max.ss(<4 x float> [[TMP1]], <4 x float> [[TMP1]]) -; CHECK-NEXT: [[TMP3:%.*]] = extractelement <4 x float> [[TMP2]], i32 0 +; CHECK-NEXT: [[TMP3:%.*]] = extractelement <4 x float> [[TMP2]], i64 0 ; CHECK-NEXT: ret float [[TMP3]] ; %1 = insertelement <4 x float> zeroinitializer, float %a, i32 0 @@ -393,10 +393,10 @@ define float @test_cmp_ss_0(float %a, float %b) { ; CHECK-LABEL: @test_cmp_ss_0( -; CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x float> poison, float [[A:%.*]], i32 0 -; CHECK-NEXT: [[TMP2:%.*]] = insertelement <4 x float> poison, float [[B:%.*]], i32 0 +; CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x float> poison, float [[A:%.*]], i64 0 +; CHECK-NEXT: [[TMP2:%.*]] = insertelement <4 x float> poison, float [[B:%.*]], i64 0 ; CHECK-NEXT: [[TMP3:%.*]] = tail call <4 x float> @llvm.x86.sse.cmp.ss(<4 x float> [[TMP1]], <4 x float> [[TMP2]], i8 0) -; CHECK-NEXT: [[R:%.*]] = extractelement <4 x float> [[TMP3]], i32 0 +; CHECK-NEXT: [[R:%.*]] = extractelement <4 x float> [[TMP3]], i64 0 ; CHECK-NEXT: ret float [[R]] ; %1 = insertelement <4 x float> undef, float %a, i32 0 @@ -428,9 +428,9 @@ define float @test_cmp_ss_2(float %a) { ; CHECK-LABEL: @test_cmp_ss_2( -; CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x float> , float [[A:%.*]], i32 0 +; CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x float> , float [[A:%.*]], i64 0 ; CHECK-NEXT: [[TMP2:%.*]] = tail call <4 x float> @llvm.x86.sse.cmp.ss(<4 x float> [[TMP1]], <4 x float> [[TMP1]], i8 3) -; CHECK-NEXT: [[TMP3:%.*]] = extractelement <4 x float> [[TMP2]], i32 0 +; CHECK-NEXT: [[TMP3:%.*]] = extractelement <4 x float> [[TMP2]], i64 0 ; CHECK-NEXT: ret float [[TMP3]] ; %1 = insertelement <4 x float> zeroinitializer, float %a, i32 0 @@ -441,8 +441,8 @@ define i32 @test_comieq_ss_0(float %a, float %b) { ; CHECK-LABEL: @test_comieq_ss_0( -; CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x float> poison, float [[A:%.*]], i32 0 -; CHECK-NEXT: [[TMP2:%.*]] = insertelement <4 x float> poison, float [[B:%.*]], i32 0 +; CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x float> poison, float [[A:%.*]], i64 0 +; CHECK-NEXT: [[TMP2:%.*]] = insertelement <4 x float> poison, float [[B:%.*]], i64 0 ; CHECK-NEXT: [[TMP3:%.*]] = tail call i32 @llvm.x86.sse.comieq.ss(<4 x float> [[TMP1]], <4 x float> [[TMP2]]) ; CHECK-NEXT: ret i32 [[TMP3]] ; @@ -460,8 +460,8 @@ define i32 @test_comige_ss_0(float %a, float %b) { ; CHECK-LABEL: @test_comige_ss_0( -; CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x float> poison, float [[A:%.*]], i32 0 -; CHECK-NEXT: [[TMP2:%.*]] = insertelement <4 x float> poison, float [[B:%.*]], i32 0 +; CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x float> poison, float [[A:%.*]], i64 0 +; CHECK-NEXT: [[TMP2:%.*]] = insertelement <4 x float> poison, float [[B:%.*]], i64 0 ; CHECK-NEXT: [[TMP3:%.*]] = tail call i32 @llvm.x86.sse.comige.ss(<4 x float> [[TMP1]], <4 x float> [[TMP2]]) ; CHECK-NEXT: ret i32 [[TMP3]] ; @@ -479,8 +479,8 @@ define i32 @test_comigt_ss_0(float %a, float %b) { ; CHECK-LABEL: @test_comigt_ss_0( -; CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x float> poison, float [[A:%.*]], i32 0 -; CHECK-NEXT: [[TMP2:%.*]] = insertelement <4 x float> poison, float [[B:%.*]], i32 0 +; CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x float> poison, float [[A:%.*]], i64 0 +; CHECK-NEXT: [[TMP2:%.*]] = insertelement <4 x float> poison, float [[B:%.*]], i64 0 ; CHECK-NEXT: [[TMP3:%.*]] = tail call i32 @llvm.x86.sse.comigt.ss(<4 x float> [[TMP1]], <4 x float> [[TMP2]]) ; CHECK-NEXT: ret i32 [[TMP3]] ; @@ -498,8 +498,8 @@ define i32 @test_comile_ss_0(float %a, float %b) { ; CHECK-LABEL: @test_comile_ss_0( -; CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x float> poison, float [[A:%.*]], i32 0 -; CHECK-NEXT: [[TMP2:%.*]] = insertelement <4 x float> poison, float [[B:%.*]], i32 0 +; CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x float> poison, float [[A:%.*]], i64 0 +; CHECK-NEXT: [[TMP2:%.*]] = insertelement <4 x float> poison, float [[B:%.*]], i64 0 ; CHECK-NEXT: [[TMP3:%.*]] = tail call i32 @llvm.x86.sse.comile.ss(<4 x float> [[TMP1]], <4 x float> [[TMP2]]) ; CHECK-NEXT: ret i32 [[TMP3]] ; @@ -517,8 +517,8 @@ define i32 @test_comilt_ss_0(float %a, float %b) { ; CHECK-LABEL: @test_comilt_ss_0( -; CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x float> poison, float [[A:%.*]], i32 0 -; CHECK-NEXT: [[TMP2:%.*]] = insertelement <4 x float> poison, float [[B:%.*]], i32 0 +; CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x float> poison, float [[A:%.*]], i64 0 +; CHECK-NEXT: [[TMP2:%.*]] = insertelement <4 x float> poison, float [[B:%.*]], i64 0 ; CHECK-NEXT: [[TMP3:%.*]] = tail call i32 @llvm.x86.sse.comilt.ss(<4 x float> [[TMP1]], <4 x float> [[TMP2]]) ; CHECK-NEXT: ret i32 [[TMP3]] ; @@ -536,8 +536,8 @@ define i32 @test_comineq_ss_0(float %a, float %b) { ; CHECK-LABEL: @test_comineq_ss_0( -; CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x float> poison, float [[A:%.*]], i32 0 -; CHECK-NEXT: [[TMP2:%.*]] = insertelement <4 x float> poison, float [[B:%.*]], i32 0 +; CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x float> poison, float [[A:%.*]], i64 0 +; CHECK-NEXT: [[TMP2:%.*]] = insertelement <4 x float> poison, float [[B:%.*]], i64 0 ; CHECK-NEXT: [[TMP3:%.*]] = tail call i32 @llvm.x86.sse.comineq.ss(<4 x float> [[TMP1]], <4 x float> [[TMP2]]) ; CHECK-NEXT: ret i32 [[TMP3]] ; @@ -555,8 +555,8 @@ define i32 @test_ucomieq_ss_0(float %a, float %b) { ; CHECK-LABEL: @test_ucomieq_ss_0( -; CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x float> poison, float [[A:%.*]], i32 0 -; CHECK-NEXT: [[TMP2:%.*]] = insertelement <4 x float> poison, float [[B:%.*]], i32 0 +; CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x float> poison, float [[A:%.*]], i64 0 +; CHECK-NEXT: [[TMP2:%.*]] = insertelement <4 x float> poison, float [[B:%.*]], i64 0 ; CHECK-NEXT: [[TMP3:%.*]] = tail call i32 @llvm.x86.sse.ucomieq.ss(<4 x float> [[TMP1]], <4 x float> [[TMP2]]) ; CHECK-NEXT: ret i32 [[TMP3]] ; @@ -574,8 +574,8 @@ define i32 @test_ucomige_ss_0(float %a, float %b) { ; CHECK-LABEL: @test_ucomige_ss_0( -; CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x float> poison, float [[A:%.*]], i32 0 -; CHECK-NEXT: [[TMP2:%.*]] = insertelement <4 x float> poison, float [[B:%.*]], i32 0 +; CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x float> poison, float [[A:%.*]], i64 0 +; CHECK-NEXT: [[TMP2:%.*]] = insertelement <4 x float> poison, float [[B:%.*]], i64 0 ; CHECK-NEXT: [[TMP3:%.*]] = tail call i32 @llvm.x86.sse.ucomige.ss(<4 x float> [[TMP1]], <4 x float> [[TMP2]]) ; CHECK-NEXT: ret i32 [[TMP3]] ; @@ -593,8 +593,8 @@ define i32 @test_ucomigt_ss_0(float %a, float %b) { ; CHECK-LABEL: @test_ucomigt_ss_0( -; CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x float> poison, float [[A:%.*]], i32 0 -; CHECK-NEXT: [[TMP2:%.*]] = insertelement <4 x float> poison, float [[B:%.*]], i32 0 +; CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x float> poison, float [[A:%.*]], i64 0 +; CHECK-NEXT: [[TMP2:%.*]] = insertelement <4 x float> poison, float [[B:%.*]], i64 0 ; CHECK-NEXT: [[TMP3:%.*]] = tail call i32 @llvm.x86.sse.ucomigt.ss(<4 x float> [[TMP1]], <4 x float> [[TMP2]]) ; CHECK-NEXT: ret i32 [[TMP3]] ; @@ -612,8 +612,8 @@ define i32 @test_ucomile_ss_0(float %a, float %b) { ; CHECK-LABEL: @test_ucomile_ss_0( -; CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x float> poison, float [[A:%.*]], i32 0 -; CHECK-NEXT: [[TMP2:%.*]] = insertelement <4 x float> poison, float [[B:%.*]], i32 0 +; CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x float> poison, float [[A:%.*]], i64 0 +; CHECK-NEXT: [[TMP2:%.*]] = insertelement <4 x float> poison, float [[B:%.*]], i64 0 ; CHECK-NEXT: [[TMP3:%.*]] = tail call i32 @llvm.x86.sse.ucomile.ss(<4 x float> [[TMP1]], <4 x float> [[TMP2]]) ; CHECK-NEXT: ret i32 [[TMP3]] ; @@ -631,8 +631,8 @@ define i32 @test_ucomilt_ss_0(float %a, float %b) { ; CHECK-LABEL: @test_ucomilt_ss_0( -; CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x float> poison, float [[A:%.*]], i32 0 -; CHECK-NEXT: [[TMP2:%.*]] = insertelement <4 x float> poison, float [[B:%.*]], i32 0 +; CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x float> poison, float [[A:%.*]], i64 0 +; CHECK-NEXT: [[TMP2:%.*]] = insertelement <4 x float> poison, float [[B:%.*]], i64 0 ; CHECK-NEXT: [[TMP3:%.*]] = tail call i32 @llvm.x86.sse.ucomilt.ss(<4 x float> [[TMP1]], <4 x float> [[TMP2]]) ; CHECK-NEXT: ret i32 [[TMP3]] ; @@ -650,8 +650,8 @@ define i32 @test_ucomineq_ss_0(float %a, float %b) { ; CHECK-LABEL: @test_ucomineq_ss_0( -; CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x float> poison, float [[A:%.*]], i32 0 -; CHECK-NEXT: [[TMP2:%.*]] = insertelement <4 x float> poison, float [[B:%.*]], i32 0 +; CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x float> poison, float [[A:%.*]], i64 0 +; CHECK-NEXT: [[TMP2:%.*]] = insertelement <4 x float> poison, float [[B:%.*]], i64 0 ; CHECK-NEXT: [[TMP3:%.*]] = tail call i32 @llvm.x86.sse.ucomineq.ss(<4 x float> [[TMP1]], <4 x float> [[TMP2]]) ; CHECK-NEXT: ret i32 [[TMP3]] ; diff --git a/llvm/test/Transforms/InstCombine/X86/x86-sse2-inseltpoison.ll b/llvm/test/Transforms/InstCombine/X86/x86-sse2-inseltpoison.ll --- a/llvm/test/Transforms/InstCombine/X86/x86-sse2-inseltpoison.ll +++ b/llvm/test/Transforms/InstCombine/X86/x86-sse2-inseltpoison.ll @@ -189,10 +189,10 @@ define double @test_min_sd_0(double %a, double %b) { ; CHECK-LABEL: @test_min_sd_0( -; CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x double> poison, double [[A:%.*]], i32 0 -; CHECK-NEXT: [[TMP2:%.*]] = insertelement <2 x double> poison, double [[B:%.*]], i32 0 +; CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x double> poison, double [[A:%.*]], i64 0 +; CHECK-NEXT: [[TMP2:%.*]] = insertelement <2 x double> poison, double [[B:%.*]], i64 0 ; CHECK-NEXT: [[TMP3:%.*]] = tail call <2 x double> @llvm.x86.sse2.min.sd(<2 x double> [[TMP1]], <2 x double> [[TMP2]]) -; CHECK-NEXT: [[TMP4:%.*]] = extractelement <2 x double> [[TMP3]], i32 0 +; CHECK-NEXT: [[TMP4:%.*]] = extractelement <2 x double> [[TMP3]], i64 0 ; CHECK-NEXT: ret double [[TMP4]] ; %1 = insertelement <2 x double> poison, double %a, i32 0 @@ -219,9 +219,9 @@ define double @test_min_sd_2(double %a) { ; CHECK-LABEL: @test_min_sd_2( -; CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x double> , double [[A:%.*]], i32 0 +; CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x double> , double [[A:%.*]], i64 0 ; CHECK-NEXT: [[TMP2:%.*]] = tail call <2 x double> @llvm.x86.sse2.min.sd(<2 x double> [[TMP1]], <2 x double> [[TMP1]]) -; CHECK-NEXT: [[TMP3:%.*]] = extractelement <2 x double> [[TMP2]], i32 0 +; CHECK-NEXT: [[TMP3:%.*]] = extractelement <2 x double> [[TMP2]], i64 0 ; CHECK-NEXT: ret double [[TMP3]] ; %1 = insertelement <2 x double> zeroinitializer, double %a, i32 0 @@ -242,10 +242,10 @@ define double @test_max_sd_0(double %a, double %b) { ; CHECK-LABEL: @test_max_sd_0( -; CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x double> poison, double [[A:%.*]], i32 0 -; CHECK-NEXT: [[TMP2:%.*]] = insertelement <2 x double> poison, double [[B:%.*]], i32 0 +; CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x double> poison, double [[A:%.*]], i64 0 +; CHECK-NEXT: [[TMP2:%.*]] = insertelement <2 x double> poison, double [[B:%.*]], i64 0 ; CHECK-NEXT: [[TMP3:%.*]] = tail call <2 x double> @llvm.x86.sse2.max.sd(<2 x double> [[TMP1]], <2 x double> [[TMP2]]) -; CHECK-NEXT: [[TMP4:%.*]] = extractelement <2 x double> [[TMP3]], i32 0 +; CHECK-NEXT: [[TMP4:%.*]] = extractelement <2 x double> [[TMP3]], i64 0 ; CHECK-NEXT: ret double [[TMP4]] ; %1 = insertelement <2 x double> poison, double %a, i32 0 @@ -272,9 +272,9 @@ define double @test_max_sd_2(double %a) { ; CHECK-LABEL: @test_max_sd_2( -; CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x double> , double [[A:%.*]], i32 0 +; CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x double> , double [[A:%.*]], i64 0 ; CHECK-NEXT: [[TMP2:%.*]] = tail call <2 x double> @llvm.x86.sse2.max.sd(<2 x double> [[TMP1]], <2 x double> [[TMP1]]) -; CHECK-NEXT: [[TMP3:%.*]] = extractelement <2 x double> [[TMP2]], i32 0 +; CHECK-NEXT: [[TMP3:%.*]] = extractelement <2 x double> [[TMP2]], i64 0 ; CHECK-NEXT: ret double [[TMP3]] ; %1 = insertelement <2 x double> zeroinitializer, double %a, i32 0 @@ -295,10 +295,10 @@ define double @test_cmp_sd_0(double %a, double %b) { ; CHECK-LABEL: @test_cmp_sd_0( -; CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x double> poison, double [[A:%.*]], i32 0 -; CHECK-NEXT: [[TMP2:%.*]] = insertelement <2 x double> poison, double [[B:%.*]], i32 0 +; CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x double> poison, double [[A:%.*]], i64 0 +; CHECK-NEXT: [[TMP2:%.*]] = insertelement <2 x double> poison, double [[B:%.*]], i64 0 ; CHECK-NEXT: [[TMP3:%.*]] = tail call <2 x double> @llvm.x86.sse2.cmp.sd(<2 x double> [[TMP1]], <2 x double> [[TMP2]], i8 0) -; CHECK-NEXT: [[TMP4:%.*]] = extractelement <2 x double> [[TMP3]], i32 0 +; CHECK-NEXT: [[TMP4:%.*]] = extractelement <2 x double> [[TMP3]], i64 0 ; CHECK-NEXT: ret double [[TMP4]] ; %1 = insertelement <2 x double> poison, double %a, i32 0 @@ -325,9 +325,9 @@ define double @test_cmp_sd_2(double %a) { ; CHECK-LABEL: @test_cmp_sd_2( -; CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x double> , double [[A:%.*]], i32 0 +; CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x double> , double [[A:%.*]], i64 0 ; CHECK-NEXT: [[TMP2:%.*]] = tail call <2 x double> @llvm.x86.sse2.cmp.sd(<2 x double> [[TMP1]], <2 x double> [[TMP1]], i8 3) -; CHECK-NEXT: [[TMP3:%.*]] = extractelement <2 x double> [[TMP2]], i32 0 +; CHECK-NEXT: [[TMP3:%.*]] = extractelement <2 x double> [[TMP2]], i64 0 ; CHECK-NEXT: ret double [[TMP3]] ; %1 = insertelement <2 x double> zeroinitializer, double %a, i32 0 @@ -338,8 +338,8 @@ define i32 @test_comieq_sd_0(double %a, double %b) { ; CHECK-LABEL: @test_comieq_sd_0( -; CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x double> poison, double [[A:%.*]], i32 0 -; CHECK-NEXT: [[TMP2:%.*]] = insertelement <2 x double> poison, double [[B:%.*]], i32 0 +; CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x double> poison, double [[A:%.*]], i64 0 +; CHECK-NEXT: [[TMP2:%.*]] = insertelement <2 x double> poison, double [[B:%.*]], i64 0 ; CHECK-NEXT: [[TMP3:%.*]] = tail call i32 @llvm.x86.sse2.comieq.sd(<2 x double> [[TMP1]], <2 x double> [[TMP2]]) ; CHECK-NEXT: ret i32 [[TMP3]] ; @@ -353,8 +353,8 @@ define i32 @test_comige_sd_0(double %a, double %b) { ; CHECK-LABEL: @test_comige_sd_0( -; CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x double> poison, double [[A:%.*]], i32 0 -; CHECK-NEXT: [[TMP2:%.*]] = insertelement <2 x double> poison, double [[B:%.*]], i32 0 +; CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x double> poison, double [[A:%.*]], i64 0 +; CHECK-NEXT: [[TMP2:%.*]] = insertelement <2 x double> poison, double [[B:%.*]], i64 0 ; CHECK-NEXT: [[TMP3:%.*]] = tail call i32 @llvm.x86.sse2.comige.sd(<2 x double> [[TMP1]], <2 x double> [[TMP2]]) ; CHECK-NEXT: ret i32 [[TMP3]] ; @@ -368,8 +368,8 @@ define i32 @test_comigt_sd_0(double %a, double %b) { ; CHECK-LABEL: @test_comigt_sd_0( -; CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x double> poison, double [[A:%.*]], i32 0 -; CHECK-NEXT: [[TMP2:%.*]] = insertelement <2 x double> poison, double [[B:%.*]], i32 0 +; CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x double> poison, double [[A:%.*]], i64 0 +; CHECK-NEXT: [[TMP2:%.*]] = insertelement <2 x double> poison, double [[B:%.*]], i64 0 ; CHECK-NEXT: [[TMP3:%.*]] = tail call i32 @llvm.x86.sse2.comigt.sd(<2 x double> [[TMP1]], <2 x double> [[TMP2]]) ; CHECK-NEXT: ret i32 [[TMP3]] ; @@ -383,8 +383,8 @@ define i32 @test_comile_sd_0(double %a, double %b) { ; CHECK-LABEL: @test_comile_sd_0( -; CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x double> poison, double [[A:%.*]], i32 0 -; CHECK-NEXT: [[TMP2:%.*]] = insertelement <2 x double> poison, double [[B:%.*]], i32 0 +; CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x double> poison, double [[A:%.*]], i64 0 +; CHECK-NEXT: [[TMP2:%.*]] = insertelement <2 x double> poison, double [[B:%.*]], i64 0 ; CHECK-NEXT: [[TMP3:%.*]] = tail call i32 @llvm.x86.sse2.comile.sd(<2 x double> [[TMP1]], <2 x double> [[TMP2]]) ; CHECK-NEXT: ret i32 [[TMP3]] ; @@ -398,8 +398,8 @@ define i32 @test_comilt_sd_0(double %a, double %b) { ; CHECK-LABEL: @test_comilt_sd_0( -; CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x double> poison, double [[A:%.*]], i32 0 -; CHECK-NEXT: [[TMP2:%.*]] = insertelement <2 x double> poison, double [[B:%.*]], i32 0 +; CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x double> poison, double [[A:%.*]], i64 0 +; CHECK-NEXT: [[TMP2:%.*]] = insertelement <2 x double> poison, double [[B:%.*]], i64 0 ; CHECK-NEXT: [[TMP3:%.*]] = tail call i32 @llvm.x86.sse2.comilt.sd(<2 x double> [[TMP1]], <2 x double> [[TMP2]]) ; CHECK-NEXT: ret i32 [[TMP3]] ; @@ -413,8 +413,8 @@ define i32 @test_comineq_sd_0(double %a, double %b) { ; CHECK-LABEL: @test_comineq_sd_0( -; CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x double> poison, double [[A:%.*]], i32 0 -; CHECK-NEXT: [[TMP2:%.*]] = insertelement <2 x double> poison, double [[B:%.*]], i32 0 +; CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x double> poison, double [[A:%.*]], i64 0 +; CHECK-NEXT: [[TMP2:%.*]] = insertelement <2 x double> poison, double [[B:%.*]], i64 0 ; CHECK-NEXT: [[TMP3:%.*]] = tail call i32 @llvm.x86.sse2.comineq.sd(<2 x double> [[TMP1]], <2 x double> [[TMP2]]) ; CHECK-NEXT: ret i32 [[TMP3]] ; @@ -428,8 +428,8 @@ define i32 @test_ucomieq_sd_0(double %a, double %b) { ; CHECK-LABEL: @test_ucomieq_sd_0( -; CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x double> poison, double [[A:%.*]], i32 0 -; CHECK-NEXT: [[TMP2:%.*]] = insertelement <2 x double> poison, double [[B:%.*]], i32 0 +; CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x double> poison, double [[A:%.*]], i64 0 +; CHECK-NEXT: [[TMP2:%.*]] = insertelement <2 x double> poison, double [[B:%.*]], i64 0 ; CHECK-NEXT: [[TMP3:%.*]] = tail call i32 @llvm.x86.sse2.ucomieq.sd(<2 x double> [[TMP1]], <2 x double> [[TMP2]]) ; CHECK-NEXT: ret i32 [[TMP3]] ; @@ -443,8 +443,8 @@ define i32 @test_ucomige_sd_0(double %a, double %b) { ; CHECK-LABEL: @test_ucomige_sd_0( -; CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x double> poison, double [[A:%.*]], i32 0 -; CHECK-NEXT: [[TMP2:%.*]] = insertelement <2 x double> poison, double [[B:%.*]], i32 0 +; CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x double> poison, double [[A:%.*]], i64 0 +; CHECK-NEXT: [[TMP2:%.*]] = insertelement <2 x double> poison, double [[B:%.*]], i64 0 ; CHECK-NEXT: [[TMP3:%.*]] = tail call i32 @llvm.x86.sse2.ucomige.sd(<2 x double> [[TMP1]], <2 x double> [[TMP2]]) ; CHECK-NEXT: ret i32 [[TMP3]] ; @@ -458,8 +458,8 @@ define i32 @test_ucomigt_sd_0(double %a, double %b) { ; CHECK-LABEL: @test_ucomigt_sd_0( -; CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x double> poison, double [[A:%.*]], i32 0 -; CHECK-NEXT: [[TMP2:%.*]] = insertelement <2 x double> poison, double [[B:%.*]], i32 0 +; CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x double> poison, double [[A:%.*]], i64 0 +; CHECK-NEXT: [[TMP2:%.*]] = insertelement <2 x double> poison, double [[B:%.*]], i64 0 ; CHECK-NEXT: [[TMP3:%.*]] = tail call i32 @llvm.x86.sse2.ucomigt.sd(<2 x double> [[TMP1]], <2 x double> [[TMP2]]) ; CHECK-NEXT: ret i32 [[TMP3]] ; @@ -473,8 +473,8 @@ define i32 @test_ucomile_sd_0(double %a, double %b) { ; CHECK-LABEL: @test_ucomile_sd_0( -; CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x double> poison, double [[A:%.*]], i32 0 -; CHECK-NEXT: [[TMP2:%.*]] = insertelement <2 x double> poison, double [[B:%.*]], i32 0 +; CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x double> poison, double [[A:%.*]], i64 0 +; CHECK-NEXT: [[TMP2:%.*]] = insertelement <2 x double> poison, double [[B:%.*]], i64 0 ; CHECK-NEXT: [[TMP3:%.*]] = tail call i32 @llvm.x86.sse2.ucomile.sd(<2 x double> [[TMP1]], <2 x double> [[TMP2]]) ; CHECK-NEXT: ret i32 [[TMP3]] ; @@ -488,8 +488,8 @@ define i32 @test_ucomilt_sd_0(double %a, double %b) { ; CHECK-LABEL: @test_ucomilt_sd_0( -; CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x double> poison, double [[A:%.*]], i32 0 -; CHECK-NEXT: [[TMP2:%.*]] = insertelement <2 x double> poison, double [[B:%.*]], i32 0 +; CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x double> poison, double [[A:%.*]], i64 0 +; CHECK-NEXT: [[TMP2:%.*]] = insertelement <2 x double> poison, double [[B:%.*]], i64 0 ; CHECK-NEXT: [[TMP3:%.*]] = tail call i32 @llvm.x86.sse2.ucomilt.sd(<2 x double> [[TMP1]], <2 x double> [[TMP2]]) ; CHECK-NEXT: ret i32 [[TMP3]] ; @@ -503,8 +503,8 @@ define i32 @test_ucomineq_sd_0(double %a, double %b) { ; CHECK-LABEL: @test_ucomineq_sd_0( -; CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x double> poison, double [[A:%.*]], i32 0 -; CHECK-NEXT: [[TMP2:%.*]] = insertelement <2 x double> poison, double [[B:%.*]], i32 0 +; CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x double> poison, double [[A:%.*]], i64 0 +; CHECK-NEXT: [[TMP2:%.*]] = insertelement <2 x double> poison, double [[B:%.*]], i64 0 ; CHECK-NEXT: [[TMP3:%.*]] = tail call i32 @llvm.x86.sse2.ucomineq.sd(<2 x double> [[TMP1]], <2 x double> [[TMP2]]) ; CHECK-NEXT: ret i32 [[TMP3]] ; diff --git a/llvm/test/Transforms/InstCombine/X86/x86-sse2.ll b/llvm/test/Transforms/InstCombine/X86/x86-sse2.ll --- a/llvm/test/Transforms/InstCombine/X86/x86-sse2.ll +++ b/llvm/test/Transforms/InstCombine/X86/x86-sse2.ll @@ -189,10 +189,10 @@ define double @test_min_sd_0(double %a, double %b) { ; CHECK-LABEL: @test_min_sd_0( -; CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x double> poison, double [[A:%.*]], i32 0 -; CHECK-NEXT: [[TMP2:%.*]] = insertelement <2 x double> poison, double [[B:%.*]], i32 0 +; CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x double> poison, double [[A:%.*]], i64 0 +; CHECK-NEXT: [[TMP2:%.*]] = insertelement <2 x double> poison, double [[B:%.*]], i64 0 ; CHECK-NEXT: [[TMP3:%.*]] = tail call <2 x double> @llvm.x86.sse2.min.sd(<2 x double> [[TMP1]], <2 x double> [[TMP2]]) -; CHECK-NEXT: [[TMP4:%.*]] = extractelement <2 x double> [[TMP3]], i32 0 +; CHECK-NEXT: [[TMP4:%.*]] = extractelement <2 x double> [[TMP3]], i64 0 ; CHECK-NEXT: ret double [[TMP4]] ; %1 = insertelement <2 x double> undef, double %a, i32 0 @@ -219,9 +219,9 @@ define double @test_min_sd_2(double %a) { ; CHECK-LABEL: @test_min_sd_2( -; CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x double> , double [[A:%.*]], i32 0 +; CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x double> , double [[A:%.*]], i64 0 ; CHECK-NEXT: [[TMP2:%.*]] = tail call <2 x double> @llvm.x86.sse2.min.sd(<2 x double> [[TMP1]], <2 x double> [[TMP1]]) -; CHECK-NEXT: [[TMP3:%.*]] = extractelement <2 x double> [[TMP2]], i32 0 +; CHECK-NEXT: [[TMP3:%.*]] = extractelement <2 x double> [[TMP2]], i64 0 ; CHECK-NEXT: ret double [[TMP3]] ; %1 = insertelement <2 x double> zeroinitializer, double %a, i32 0 @@ -242,10 +242,10 @@ define double @test_max_sd_0(double %a, double %b) { ; CHECK-LABEL: @test_max_sd_0( -; CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x double> poison, double [[A:%.*]], i32 0 -; CHECK-NEXT: [[TMP2:%.*]] = insertelement <2 x double> poison, double [[B:%.*]], i32 0 +; CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x double> poison, double [[A:%.*]], i64 0 +; CHECK-NEXT: [[TMP2:%.*]] = insertelement <2 x double> poison, double [[B:%.*]], i64 0 ; CHECK-NEXT: [[TMP3:%.*]] = tail call <2 x double> @llvm.x86.sse2.max.sd(<2 x double> [[TMP1]], <2 x double> [[TMP2]]) -; CHECK-NEXT: [[TMP4:%.*]] = extractelement <2 x double> [[TMP3]], i32 0 +; CHECK-NEXT: [[TMP4:%.*]] = extractelement <2 x double> [[TMP3]], i64 0 ; CHECK-NEXT: ret double [[TMP4]] ; %1 = insertelement <2 x double> undef, double %a, i32 0 @@ -272,9 +272,9 @@ define double @test_max_sd_2(double %a) { ; CHECK-LABEL: @test_max_sd_2( -; CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x double> , double [[A:%.*]], i32 0 +; CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x double> , double [[A:%.*]], i64 0 ; CHECK-NEXT: [[TMP2:%.*]] = tail call <2 x double> @llvm.x86.sse2.max.sd(<2 x double> [[TMP1]], <2 x double> [[TMP1]]) -; CHECK-NEXT: [[TMP3:%.*]] = extractelement <2 x double> [[TMP2]], i32 0 +; CHECK-NEXT: [[TMP3:%.*]] = extractelement <2 x double> [[TMP2]], i64 0 ; CHECK-NEXT: ret double [[TMP3]] ; %1 = insertelement <2 x double> zeroinitializer, double %a, i32 0 @@ -295,10 +295,10 @@ define double @test_cmp_sd_0(double %a, double %b) { ; CHECK-LABEL: @test_cmp_sd_0( -; CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x double> poison, double [[A:%.*]], i32 0 -; CHECK-NEXT: [[TMP2:%.*]] = insertelement <2 x double> poison, double [[B:%.*]], i32 0 +; CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x double> poison, double [[A:%.*]], i64 0 +; CHECK-NEXT: [[TMP2:%.*]] = insertelement <2 x double> poison, double [[B:%.*]], i64 0 ; CHECK-NEXT: [[TMP3:%.*]] = tail call <2 x double> @llvm.x86.sse2.cmp.sd(<2 x double> [[TMP1]], <2 x double> [[TMP2]], i8 0) -; CHECK-NEXT: [[TMP4:%.*]] = extractelement <2 x double> [[TMP3]], i32 0 +; CHECK-NEXT: [[TMP4:%.*]] = extractelement <2 x double> [[TMP3]], i64 0 ; CHECK-NEXT: ret double [[TMP4]] ; %1 = insertelement <2 x double> undef, double %a, i32 0 @@ -325,9 +325,9 @@ define double @test_cmp_sd_2(double %a) { ; CHECK-LABEL: @test_cmp_sd_2( -; CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x double> , double [[A:%.*]], i32 0 +; CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x double> , double [[A:%.*]], i64 0 ; CHECK-NEXT: [[TMP2:%.*]] = tail call <2 x double> @llvm.x86.sse2.cmp.sd(<2 x double> [[TMP1]], <2 x double> [[TMP1]], i8 3) -; CHECK-NEXT: [[TMP3:%.*]] = extractelement <2 x double> [[TMP2]], i32 0 +; CHECK-NEXT: [[TMP3:%.*]] = extractelement <2 x double> [[TMP2]], i64 0 ; CHECK-NEXT: ret double [[TMP3]] ; %1 = insertelement <2 x double> zeroinitializer, double %a, i32 0 @@ -338,8 +338,8 @@ define i32 @test_comieq_sd_0(double %a, double %b) { ; CHECK-LABEL: @test_comieq_sd_0( -; CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x double> poison, double [[A:%.*]], i32 0 -; CHECK-NEXT: [[TMP2:%.*]] = insertelement <2 x double> poison, double [[B:%.*]], i32 0 +; CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x double> poison, double [[A:%.*]], i64 0 +; CHECK-NEXT: [[TMP2:%.*]] = insertelement <2 x double> poison, double [[B:%.*]], i64 0 ; CHECK-NEXT: [[TMP3:%.*]] = tail call i32 @llvm.x86.sse2.comieq.sd(<2 x double> [[TMP1]], <2 x double> [[TMP2]]) ; CHECK-NEXT: ret i32 [[TMP3]] ; @@ -353,8 +353,8 @@ define i32 @test_comige_sd_0(double %a, double %b) { ; CHECK-LABEL: @test_comige_sd_0( -; CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x double> poison, double [[A:%.*]], i32 0 -; CHECK-NEXT: [[TMP2:%.*]] = insertelement <2 x double> poison, double [[B:%.*]], i32 0 +; CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x double> poison, double [[A:%.*]], i64 0 +; CHECK-NEXT: [[TMP2:%.*]] = insertelement <2 x double> poison, double [[B:%.*]], i64 0 ; CHECK-NEXT: [[TMP3:%.*]] = tail call i32 @llvm.x86.sse2.comige.sd(<2 x double> [[TMP1]], <2 x double> [[TMP2]]) ; CHECK-NEXT: ret i32 [[TMP3]] ; @@ -368,8 +368,8 @@ define i32 @test_comigt_sd_0(double %a, double %b) { ; CHECK-LABEL: @test_comigt_sd_0( -; CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x double> poison, double [[A:%.*]], i32 0 -; CHECK-NEXT: [[TMP2:%.*]] = insertelement <2 x double> poison, double [[B:%.*]], i32 0 +; CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x double> poison, double [[A:%.*]], i64 0 +; CHECK-NEXT: [[TMP2:%.*]] = insertelement <2 x double> poison, double [[B:%.*]], i64 0 ; CHECK-NEXT: [[TMP3:%.*]] = tail call i32 @llvm.x86.sse2.comigt.sd(<2 x double> [[TMP1]], <2 x double> [[TMP2]]) ; CHECK-NEXT: ret i32 [[TMP3]] ; @@ -383,8 +383,8 @@ define i32 @test_comile_sd_0(double %a, double %b) { ; CHECK-LABEL: @test_comile_sd_0( -; CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x double> poison, double [[A:%.*]], i32 0 -; CHECK-NEXT: [[TMP2:%.*]] = insertelement <2 x double> poison, double [[B:%.*]], i32 0 +; CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x double> poison, double [[A:%.*]], i64 0 +; CHECK-NEXT: [[TMP2:%.*]] = insertelement <2 x double> poison, double [[B:%.*]], i64 0 ; CHECK-NEXT: [[TMP3:%.*]] = tail call i32 @llvm.x86.sse2.comile.sd(<2 x double> [[TMP1]], <2 x double> [[TMP2]]) ; CHECK-NEXT: ret i32 [[TMP3]] ; @@ -398,8 +398,8 @@ define i32 @test_comilt_sd_0(double %a, double %b) { ; CHECK-LABEL: @test_comilt_sd_0( -; CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x double> poison, double [[A:%.*]], i32 0 -; CHECK-NEXT: [[TMP2:%.*]] = insertelement <2 x double> poison, double [[B:%.*]], i32 0 +; CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x double> poison, double [[A:%.*]], i64 0 +; CHECK-NEXT: [[TMP2:%.*]] = insertelement <2 x double> poison, double [[B:%.*]], i64 0 ; CHECK-NEXT: [[TMP3:%.*]] = tail call i32 @llvm.x86.sse2.comilt.sd(<2 x double> [[TMP1]], <2 x double> [[TMP2]]) ; CHECK-NEXT: ret i32 [[TMP3]] ; @@ -413,8 +413,8 @@ define i32 @test_comineq_sd_0(double %a, double %b) { ; CHECK-LABEL: @test_comineq_sd_0( -; CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x double> poison, double [[A:%.*]], i32 0 -; CHECK-NEXT: [[TMP2:%.*]] = insertelement <2 x double> poison, double [[B:%.*]], i32 0 +; CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x double> poison, double [[A:%.*]], i64 0 +; CHECK-NEXT: [[TMP2:%.*]] = insertelement <2 x double> poison, double [[B:%.*]], i64 0 ; CHECK-NEXT: [[TMP3:%.*]] = tail call i32 @llvm.x86.sse2.comineq.sd(<2 x double> [[TMP1]], <2 x double> [[TMP2]]) ; CHECK-NEXT: ret i32 [[TMP3]] ; @@ -428,8 +428,8 @@ define i32 @test_ucomieq_sd_0(double %a, double %b) { ; CHECK-LABEL: @test_ucomieq_sd_0( -; CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x double> poison, double [[A:%.*]], i32 0 -; CHECK-NEXT: [[TMP2:%.*]] = insertelement <2 x double> poison, double [[B:%.*]], i32 0 +; CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x double> poison, double [[A:%.*]], i64 0 +; CHECK-NEXT: [[TMP2:%.*]] = insertelement <2 x double> poison, double [[B:%.*]], i64 0 ; CHECK-NEXT: [[TMP3:%.*]] = tail call i32 @llvm.x86.sse2.ucomieq.sd(<2 x double> [[TMP1]], <2 x double> [[TMP2]]) ; CHECK-NEXT: ret i32 [[TMP3]] ; @@ -443,8 +443,8 @@ define i32 @test_ucomige_sd_0(double %a, double %b) { ; CHECK-LABEL: @test_ucomige_sd_0( -; CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x double> poison, double [[A:%.*]], i32 0 -; CHECK-NEXT: [[TMP2:%.*]] = insertelement <2 x double> poison, double [[B:%.*]], i32 0 +; CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x double> poison, double [[A:%.*]], i64 0 +; CHECK-NEXT: [[TMP2:%.*]] = insertelement <2 x double> poison, double [[B:%.*]], i64 0 ; CHECK-NEXT: [[TMP3:%.*]] = tail call i32 @llvm.x86.sse2.ucomige.sd(<2 x double> [[TMP1]], <2 x double> [[TMP2]]) ; CHECK-NEXT: ret i32 [[TMP3]] ; @@ -458,8 +458,8 @@ define i32 @test_ucomigt_sd_0(double %a, double %b) { ; CHECK-LABEL: @test_ucomigt_sd_0( -; CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x double> poison, double [[A:%.*]], i32 0 -; CHECK-NEXT: [[TMP2:%.*]] = insertelement <2 x double> poison, double [[B:%.*]], i32 0 +; CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x double> poison, double [[A:%.*]], i64 0 +; CHECK-NEXT: [[TMP2:%.*]] = insertelement <2 x double> poison, double [[B:%.*]], i64 0 ; CHECK-NEXT: [[TMP3:%.*]] = tail call i32 @llvm.x86.sse2.ucomigt.sd(<2 x double> [[TMP1]], <2 x double> [[TMP2]]) ; CHECK-NEXT: ret i32 [[TMP3]] ; @@ -473,8 +473,8 @@ define i32 @test_ucomile_sd_0(double %a, double %b) { ; CHECK-LABEL: @test_ucomile_sd_0( -; CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x double> poison, double [[A:%.*]], i32 0 -; CHECK-NEXT: [[TMP2:%.*]] = insertelement <2 x double> poison, double [[B:%.*]], i32 0 +; CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x double> poison, double [[A:%.*]], i64 0 +; CHECK-NEXT: [[TMP2:%.*]] = insertelement <2 x double> poison, double [[B:%.*]], i64 0 ; CHECK-NEXT: [[TMP3:%.*]] = tail call i32 @llvm.x86.sse2.ucomile.sd(<2 x double> [[TMP1]], <2 x double> [[TMP2]]) ; CHECK-NEXT: ret i32 [[TMP3]] ; @@ -488,8 +488,8 @@ define i32 @test_ucomilt_sd_0(double %a, double %b) { ; CHECK-LABEL: @test_ucomilt_sd_0( -; CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x double> poison, double [[A:%.*]], i32 0 -; CHECK-NEXT: [[TMP2:%.*]] = insertelement <2 x double> poison, double [[B:%.*]], i32 0 +; CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x double> poison, double [[A:%.*]], i64 0 +; CHECK-NEXT: [[TMP2:%.*]] = insertelement <2 x double> poison, double [[B:%.*]], i64 0 ; CHECK-NEXT: [[TMP3:%.*]] = tail call i32 @llvm.x86.sse2.ucomilt.sd(<2 x double> [[TMP1]], <2 x double> [[TMP2]]) ; CHECK-NEXT: ret i32 [[TMP3]] ; @@ -503,8 +503,8 @@ define i32 @test_ucomineq_sd_0(double %a, double %b) { ; CHECK-LABEL: @test_ucomineq_sd_0( -; CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x double> poison, double [[A:%.*]], i32 0 -; CHECK-NEXT: [[TMP2:%.*]] = insertelement <2 x double> poison, double [[B:%.*]], i32 0 +; CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x double> poison, double [[A:%.*]], i64 0 +; CHECK-NEXT: [[TMP2:%.*]] = insertelement <2 x double> poison, double [[B:%.*]], i64 0 ; CHECK-NEXT: [[TMP3:%.*]] = tail call i32 @llvm.x86.sse2.ucomineq.sd(<2 x double> [[TMP1]], <2 x double> [[TMP2]]) ; CHECK-NEXT: ret i32 [[TMP3]] ; diff --git a/llvm/test/Transforms/InstCombine/X86/x86-sse41-inseltpoison.ll b/llvm/test/Transforms/InstCombine/X86/x86-sse41-inseltpoison.ll --- a/llvm/test/Transforms/InstCombine/X86/x86-sse41-inseltpoison.ll +++ b/llvm/test/Transforms/InstCombine/X86/x86-sse41-inseltpoison.ll @@ -15,9 +15,9 @@ define double @test_round_sd_0(double %a, double %b) { ; CHECK-LABEL: @test_round_sd_0( -; CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x double> poison, double [[B:%.*]], i32 0 +; CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x double> poison, double [[B:%.*]], i64 0 ; CHECK-NEXT: [[TMP2:%.*]] = tail call <2 x double> @llvm.x86.sse41.round.sd(<2 x double> poison, <2 x double> [[TMP1]], i32 10) -; CHECK-NEXT: [[TMP3:%.*]] = extractelement <2 x double> [[TMP2]], i32 0 +; CHECK-NEXT: [[TMP3:%.*]] = extractelement <2 x double> [[TMP2]], i64 0 ; CHECK-NEXT: ret double [[TMP3]] ; %1 = insertelement <2 x double> poison, double %a, i32 0 @@ -44,9 +44,9 @@ define double @test_round_sd_2(double %a) { ; CHECK-LABEL: @test_round_sd_2( -; CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x double> poison, double [[A:%.*]], i32 0 +; CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x double> poison, double [[A:%.*]], i64 0 ; CHECK-NEXT: [[TMP2:%.*]] = tail call <2 x double> @llvm.x86.sse41.round.sd(<2 x double> poison, <2 x double> [[TMP1]], i32 10) -; CHECK-NEXT: [[TMP3:%.*]] = extractelement <2 x double> [[TMP2]], i32 0 +; CHECK-NEXT: [[TMP3:%.*]] = extractelement <2 x double> [[TMP2]], i64 0 ; CHECK-NEXT: ret double [[TMP3]] ; %1 = insertelement <2 x double> zeroinitializer, double %a, i32 0 @@ -72,9 +72,9 @@ define float @test_round_ss_0(float %a, float %b) { ; CHECK-LABEL: @test_round_ss_0( -; CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x float> poison, float [[B:%.*]], i32 0 +; CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x float> poison, float [[B:%.*]], i64 0 ; CHECK-NEXT: [[TMP2:%.*]] = tail call <4 x float> @llvm.x86.sse41.round.ss(<4 x float> poison, <4 x float> [[TMP1]], i32 10) -; CHECK-NEXT: [[R:%.*]] = extractelement <4 x float> [[TMP2]], i32 0 +; CHECK-NEXT: [[R:%.*]] = extractelement <4 x float> [[TMP2]], i64 0 ; CHECK-NEXT: ret float [[R]] ; %1 = insertelement <4 x float> poison, float %a, i32 0 @@ -109,9 +109,9 @@ define float @test_round_ss_3(float %a) { ; CHECK-LABEL: @test_round_ss_3( -; CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x float> poison, float [[A:%.*]], i32 0 +; CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x float> poison, float [[A:%.*]], i64 0 ; CHECK-NEXT: [[TMP2:%.*]] = tail call <4 x float> @llvm.x86.sse41.round.ss(<4 x float> poison, <4 x float> [[TMP1]], i32 10) -; CHECK-NEXT: [[TMP3:%.*]] = extractelement <4 x float> [[TMP2]], i32 0 +; CHECK-NEXT: [[TMP3:%.*]] = extractelement <4 x float> [[TMP2]], i64 0 ; CHECK-NEXT: ret float [[TMP3]] ; %1 = insertelement <4 x float> zeroinitializer, float %a, i32 0 diff --git a/llvm/test/Transforms/InstCombine/X86/x86-sse41.ll b/llvm/test/Transforms/InstCombine/X86/x86-sse41.ll --- a/llvm/test/Transforms/InstCombine/X86/x86-sse41.ll +++ b/llvm/test/Transforms/InstCombine/X86/x86-sse41.ll @@ -15,9 +15,9 @@ define double @test_round_sd_0(double %a, double %b) { ; CHECK-LABEL: @test_round_sd_0( -; CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x double> poison, double [[B:%.*]], i32 0 +; CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x double> poison, double [[B:%.*]], i64 0 ; CHECK-NEXT: [[TMP2:%.*]] = tail call <2 x double> @llvm.x86.sse41.round.sd(<2 x double> poison, <2 x double> [[TMP1]], i32 10) -; CHECK-NEXT: [[TMP3:%.*]] = extractelement <2 x double> [[TMP2]], i32 0 +; CHECK-NEXT: [[TMP3:%.*]] = extractelement <2 x double> [[TMP2]], i64 0 ; CHECK-NEXT: ret double [[TMP3]] ; %1 = insertelement <2 x double> undef, double %a, i32 0 @@ -44,9 +44,9 @@ define double @test_round_sd_2(double %a) { ; CHECK-LABEL: @test_round_sd_2( -; CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x double> poison, double [[A:%.*]], i32 0 +; CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x double> poison, double [[A:%.*]], i64 0 ; CHECK-NEXT: [[TMP2:%.*]] = tail call <2 x double> @llvm.x86.sse41.round.sd(<2 x double> poison, <2 x double> [[TMP1]], i32 10) -; CHECK-NEXT: [[TMP3:%.*]] = extractelement <2 x double> [[TMP2]], i32 0 +; CHECK-NEXT: [[TMP3:%.*]] = extractelement <2 x double> [[TMP2]], i64 0 ; CHECK-NEXT: ret double [[TMP3]] ; %1 = insertelement <2 x double> zeroinitializer, double %a, i32 0 @@ -72,9 +72,9 @@ define float @test_round_ss_0(float %a, float %b) { ; CHECK-LABEL: @test_round_ss_0( -; CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x float> poison, float [[B:%.*]], i32 0 +; CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x float> poison, float [[B:%.*]], i64 0 ; CHECK-NEXT: [[TMP2:%.*]] = tail call <4 x float> @llvm.x86.sse41.round.ss(<4 x float> poison, <4 x float> [[TMP1]], i32 10) -; CHECK-NEXT: [[R:%.*]] = extractelement <4 x float> [[TMP2]], i32 0 +; CHECK-NEXT: [[R:%.*]] = extractelement <4 x float> [[TMP2]], i64 0 ; CHECK-NEXT: ret float [[R]] ; %1 = insertelement <4 x float> undef, float %a, i32 0 @@ -109,9 +109,9 @@ define float @test_round_ss_3(float %a) { ; CHECK-LABEL: @test_round_ss_3( -; CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x float> poison, float [[A:%.*]], i32 0 +; CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x float> poison, float [[A:%.*]], i64 0 ; CHECK-NEXT: [[TMP2:%.*]] = tail call <4 x float> @llvm.x86.sse41.round.ss(<4 x float> poison, <4 x float> [[TMP1]], i32 10) -; CHECK-NEXT: [[TMP3:%.*]] = extractelement <4 x float> [[TMP2]], i32 0 +; CHECK-NEXT: [[TMP3:%.*]] = extractelement <4 x float> [[TMP2]], i64 0 ; CHECK-NEXT: ret float [[TMP3]] ; %1 = insertelement <4 x float> zeroinitializer, float %a, i32 0 diff --git a/llvm/test/Transforms/InstCombine/X86/x86-vec_demanded_elts-inseltpoison.ll b/llvm/test/Transforms/InstCombine/X86/x86-vec_demanded_elts-inseltpoison.ll --- a/llvm/test/Transforms/InstCombine/X86/x86-vec_demanded_elts-inseltpoison.ll +++ b/llvm/test/Transforms/InstCombine/X86/x86-vec_demanded_elts-inseltpoison.ll @@ -7,7 +7,7 @@ ; CHECK-LABEL: @test1( ; CHECK-NEXT: [[TMP1:%.*]] = fadd float [[F:%.*]], -1.000000e+00 ; CHECK-NEXT: [[TMP2:%.*]] = fmul float [[TMP1]], 5.000000e-01 -; CHECK-NEXT: [[TMP3:%.*]] = insertelement <4 x float> poison, float [[TMP2]], i32 0 +; CHECK-NEXT: [[TMP3:%.*]] = insertelement <4 x float> poison, float [[TMP2]], i64 0 ; CHECK-NEXT: [[TMP48:%.*]] = tail call <4 x float> @llvm.x86.sse.min.ss(<4 x float> [[TMP3]], <4 x float> ) ; CHECK-NEXT: [[TMP59:%.*]] = tail call <4 x float> @llvm.x86.sse.max.ss(<4 x float> [[TMP48]], <4 x float> ) ; CHECK-NEXT: [[TMP_UPGRD_1:%.*]] = tail call i32 @llvm.x86.sse.cvttss2si(<4 x float> [[TMP59]]) @@ -30,21 +30,21 @@ define i64 @test3(float %f, double %d) { ; ; CHECK-LABEL: @test3( -; CHECK-NEXT: [[V03:%.*]] = insertelement <4 x float> poison, float [[F:%.*]], i32 0 +; CHECK-NEXT: [[V03:%.*]] = insertelement <4 x float> poison, float [[F:%.*]], i64 0 ; CHECK-NEXT: [[TMP0:%.*]] = tail call i32 @llvm.x86.sse.cvtss2si(<4 x float> [[V03]]) -; CHECK-NEXT: [[V13:%.*]] = insertelement <4 x float> poison, float [[F]], i32 0 +; CHECK-NEXT: [[V13:%.*]] = insertelement <4 x float> poison, float [[F]], i64 0 ; CHECK-NEXT: [[TMP1:%.*]] = tail call i64 @llvm.x86.sse.cvtss2si64(<4 x float> [[V13]]) -; CHECK-NEXT: [[V23:%.*]] = insertelement <4 x float> poison, float [[F]], i32 0 +; CHECK-NEXT: [[V23:%.*]] = insertelement <4 x float> poison, float [[F]], i64 0 ; CHECK-NEXT: [[TMP2:%.*]] = tail call i32 @llvm.x86.sse.cvttss2si(<4 x float> [[V23]]) -; CHECK-NEXT: [[V33:%.*]] = insertelement <4 x float> poison, float [[F]], i32 0 +; CHECK-NEXT: [[V33:%.*]] = insertelement <4 x float> poison, float [[F]], i64 0 ; CHECK-NEXT: [[TMP3:%.*]] = tail call i64 @llvm.x86.sse.cvttss2si64(<4 x float> [[V33]]) -; CHECK-NEXT: [[V41:%.*]] = insertelement <2 x double> poison, double [[D:%.*]], i32 0 +; CHECK-NEXT: [[V41:%.*]] = insertelement <2 x double> poison, double [[D:%.*]], i64 0 ; CHECK-NEXT: [[TMP4:%.*]] = tail call i32 @llvm.x86.sse2.cvtsd2si(<2 x double> [[V41]]) -; CHECK-NEXT: [[V51:%.*]] = insertelement <2 x double> poison, double [[D]], i32 0 +; CHECK-NEXT: [[V51:%.*]] = insertelement <2 x double> poison, double [[D]], i64 0 ; CHECK-NEXT: [[TMP5:%.*]] = tail call i64 @llvm.x86.sse2.cvtsd2si64(<2 x double> [[V51]]) -; CHECK-NEXT: [[V61:%.*]] = insertelement <2 x double> poison, double [[D]], i32 0 +; CHECK-NEXT: [[V61:%.*]] = insertelement <2 x double> poison, double [[D]], i64 0 ; CHECK-NEXT: [[TMP6:%.*]] = tail call i32 @llvm.x86.sse2.cvttsd2si(<2 x double> [[V61]]) -; CHECK-NEXT: [[V71:%.*]] = insertelement <2 x double> poison, double [[D]], i32 0 +; CHECK-NEXT: [[V71:%.*]] = insertelement <2 x double> poison, double [[D]], i64 0 ; CHECK-NEXT: [[TMP7:%.*]] = tail call i64 @llvm.x86.sse2.cvttsd2si64(<2 x double> [[V71]]) ; CHECK-NEXT: [[TMP8:%.*]] = add i32 [[TMP0]], [[TMP2]] ; CHECK-NEXT: [[TMP9:%.*]] = add i32 [[TMP4]], [[TMP6]] diff --git a/llvm/test/Transforms/InstCombine/X86/x86-vec_demanded_elts.ll b/llvm/test/Transforms/InstCombine/X86/x86-vec_demanded_elts.ll --- a/llvm/test/Transforms/InstCombine/X86/x86-vec_demanded_elts.ll +++ b/llvm/test/Transforms/InstCombine/X86/x86-vec_demanded_elts.ll @@ -6,7 +6,7 @@ ; CHECK-LABEL: @test1( ; CHECK-NEXT: [[TMP1:%.*]] = fadd float [[F:%.*]], -1.000000e+00 ; CHECK-NEXT: [[TMP2:%.*]] = fmul float [[TMP1]], 5.000000e-01 -; CHECK-NEXT: [[TMP3:%.*]] = insertelement <4 x float> poison, float [[TMP2]], i32 0 +; CHECK-NEXT: [[TMP3:%.*]] = insertelement <4 x float> poison, float [[TMP2]], i64 0 ; CHECK-NEXT: [[TMP48:%.*]] = tail call <4 x float> @llvm.x86.sse.min.ss(<4 x float> [[TMP3]], <4 x float> ) ; CHECK-NEXT: [[TMP59:%.*]] = tail call <4 x float> @llvm.x86.sse.max.ss(<4 x float> [[TMP48]], <4 x float> ) ; CHECK-NEXT: [[TMP_UPGRD_1:%.*]] = tail call i32 @llvm.x86.sse.cvttss2si(<4 x float> [[TMP59]]) @@ -28,21 +28,21 @@ define i64 @test3(float %f, double %d) { ; CHECK-LABEL: @test3( -; CHECK-NEXT: [[V03:%.*]] = insertelement <4 x float> poison, float [[F:%.*]], i32 0 +; CHECK-NEXT: [[V03:%.*]] = insertelement <4 x float> poison, float [[F:%.*]], i64 0 ; CHECK-NEXT: [[TMP0:%.*]] = tail call i32 @llvm.x86.sse.cvtss2si(<4 x float> [[V03]]) -; CHECK-NEXT: [[V13:%.*]] = insertelement <4 x float> poison, float [[F]], i32 0 +; CHECK-NEXT: [[V13:%.*]] = insertelement <4 x float> poison, float [[F]], i64 0 ; CHECK-NEXT: [[TMP1:%.*]] = tail call i64 @llvm.x86.sse.cvtss2si64(<4 x float> [[V13]]) -; CHECK-NEXT: [[V23:%.*]] = insertelement <4 x float> poison, float [[F]], i32 0 +; CHECK-NEXT: [[V23:%.*]] = insertelement <4 x float> poison, float [[F]], i64 0 ; CHECK-NEXT: [[TMP2:%.*]] = tail call i32 @llvm.x86.sse.cvttss2si(<4 x float> [[V23]]) -; CHECK-NEXT: [[V33:%.*]] = insertelement <4 x float> poison, float [[F]], i32 0 +; CHECK-NEXT: [[V33:%.*]] = insertelement <4 x float> poison, float [[F]], i64 0 ; CHECK-NEXT: [[TMP3:%.*]] = tail call i64 @llvm.x86.sse.cvttss2si64(<4 x float> [[V33]]) -; CHECK-NEXT: [[V41:%.*]] = insertelement <2 x double> poison, double [[D:%.*]], i32 0 +; CHECK-NEXT: [[V41:%.*]] = insertelement <2 x double> poison, double [[D:%.*]], i64 0 ; CHECK-NEXT: [[TMP4:%.*]] = tail call i32 @llvm.x86.sse2.cvtsd2si(<2 x double> [[V41]]) -; CHECK-NEXT: [[V51:%.*]] = insertelement <2 x double> poison, double [[D]], i32 0 +; CHECK-NEXT: [[V51:%.*]] = insertelement <2 x double> poison, double [[D]], i64 0 ; CHECK-NEXT: [[TMP5:%.*]] = tail call i64 @llvm.x86.sse2.cvtsd2si64(<2 x double> [[V51]]) -; CHECK-NEXT: [[V61:%.*]] = insertelement <2 x double> poison, double [[D]], i32 0 +; CHECK-NEXT: [[V61:%.*]] = insertelement <2 x double> poison, double [[D]], i64 0 ; CHECK-NEXT: [[TMP6:%.*]] = tail call i32 @llvm.x86.sse2.cvttsd2si(<2 x double> [[V61]]) -; CHECK-NEXT: [[V71:%.*]] = insertelement <2 x double> poison, double [[D]], i32 0 +; CHECK-NEXT: [[V71:%.*]] = insertelement <2 x double> poison, double [[D]], i64 0 ; CHECK-NEXT: [[TMP7:%.*]] = tail call i64 @llvm.x86.sse2.cvttsd2si64(<2 x double> [[V71]]) ; CHECK-NEXT: [[TMP8:%.*]] = add i32 [[TMP0]], [[TMP2]] ; CHECK-NEXT: [[TMP9:%.*]] = add i32 [[TMP4]], [[TMP6]] diff --git a/llvm/test/Transforms/InstCombine/X86/x86-vector-shifts-inseltpoison.ll b/llvm/test/Transforms/InstCombine/X86/x86-vector-shifts-inseltpoison.ll --- a/llvm/test/Transforms/InstCombine/X86/x86-vector-shifts-inseltpoison.ll +++ b/llvm/test/Transforms/InstCombine/X86/x86-vector-shifts-inseltpoison.ll @@ -2790,7 +2790,7 @@ ; CHECK-LABEL: @sse2_psrai_w_128_masked( ; CHECK-NEXT: [[TMP1:%.*]] = trunc i32 [[A:%.*]] to i16 ; CHECK-NEXT: [[TMP2:%.*]] = and i16 [[TMP1]], 15 -; CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <8 x i16> poison, i16 [[TMP2]], i32 0 +; CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <8 x i16> poison, i16 [[TMP2]], i64 0 ; CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector <8 x i16> [[DOTSPLATINSERT]], <8 x i16> poison, <8 x i32> zeroinitializer ; CHECK-NEXT: [[TMP3:%.*]] = ashr <8 x i16> [[V:%.*]], [[DOTSPLAT]] ; CHECK-NEXT: ret <8 x i16> [[TMP3]] @@ -2803,7 +2803,7 @@ define <8 x i32> @avx2_psrai_d_256_masked(<8 x i32> %v, i32 %a) { ; CHECK-LABEL: @avx2_psrai_d_256_masked( ; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[A:%.*]], 31 -; CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <8 x i32> poison, i32 [[TMP1]], i32 0 +; CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <8 x i32> poison, i32 [[TMP1]], i64 0 ; CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector <8 x i32> [[DOTSPLATINSERT]], <8 x i32> poison, <8 x i32> zeroinitializer ; CHECK-NEXT: [[TMP2:%.*]] = ashr <8 x i32> [[V:%.*]], [[DOTSPLAT]] ; CHECK-NEXT: ret <8 x i32> [[TMP2]] @@ -2817,7 +2817,7 @@ ; CHECK-LABEL: @avx512_psrai_q_512_masked( ; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[A:%.*]], 63 ; CHECK-NEXT: [[TMP2:%.*]] = zext i32 [[TMP1]] to i64 -; CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <8 x i64> poison, i64 [[TMP2]], i32 0 +; CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <8 x i64> poison, i64 [[TMP2]], i64 0 ; CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector <8 x i64> [[DOTSPLATINSERT]], <8 x i64> poison, <8 x i32> zeroinitializer ; CHECK-NEXT: [[TMP3:%.*]] = ashr <8 x i64> [[V:%.*]], [[DOTSPLAT]] ; CHECK-NEXT: ret <8 x i64> [[TMP3]] @@ -2830,7 +2830,7 @@ define <4 x i32> @sse2_psrli_d_128_masked(<4 x i32> %v, i32 %a) { ; CHECK-LABEL: @sse2_psrli_d_128_masked( ; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[A:%.*]], 31 -; CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <4 x i32> poison, i32 [[TMP1]], i32 0 +; CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <4 x i32> poison, i32 [[TMP1]], i64 0 ; CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector <4 x i32> [[DOTSPLATINSERT]], <4 x i32> poison, <4 x i32> zeroinitializer ; CHECK-NEXT: [[TMP2:%.*]] = lshr <4 x i32> [[V:%.*]], [[DOTSPLAT]] ; CHECK-NEXT: ret <4 x i32> [[TMP2]] @@ -2844,7 +2844,7 @@ ; CHECK-LABEL: @avx2_psrli_q_256_masked( ; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[A:%.*]], 63 ; CHECK-NEXT: [[TMP2:%.*]] = zext i32 [[TMP1]] to i64 -; CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <4 x i64> poison, i64 [[TMP2]], i32 0 +; CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <4 x i64> poison, i64 [[TMP2]], i64 0 ; CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector <4 x i64> [[DOTSPLATINSERT]], <4 x i64> poison, <4 x i32> zeroinitializer ; CHECK-NEXT: [[TMP3:%.*]] = lshr <4 x i64> [[V:%.*]], [[DOTSPLAT]] ; CHECK-NEXT: ret <4 x i64> [[TMP3]] @@ -2858,7 +2858,7 @@ ; CHECK-LABEL: @avx512_psrli_w_512_masked( ; CHECK-NEXT: [[TMP1:%.*]] = trunc i32 [[A:%.*]] to i16 ; CHECK-NEXT: [[TMP2:%.*]] = and i16 [[TMP1]], 15 -; CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <32 x i16> poison, i16 [[TMP2]], i32 0 +; CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <32 x i16> poison, i16 [[TMP2]], i64 0 ; CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector <32 x i16> [[DOTSPLATINSERT]], <32 x i16> poison, <32 x i32> zeroinitializer ; CHECK-NEXT: [[TMP3:%.*]] = lshr <32 x i16> [[V:%.*]], [[DOTSPLAT]] ; CHECK-NEXT: ret <32 x i16> [[TMP3]] @@ -2872,7 +2872,7 @@ ; CHECK-LABEL: @sse2_pslli_q_128_masked( ; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[A:%.*]], 63 ; CHECK-NEXT: [[TMP2:%.*]] = zext i32 [[TMP1]] to i64 -; CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <2 x i64> poison, i64 [[TMP2]], i32 0 +; CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <2 x i64> poison, i64 [[TMP2]], i64 0 ; CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector <2 x i64> [[DOTSPLATINSERT]], <2 x i64> poison, <2 x i32> zeroinitializer ; CHECK-NEXT: [[TMP3:%.*]] = shl <2 x i64> [[V:%.*]], [[DOTSPLAT]] ; CHECK-NEXT: ret <2 x i64> [[TMP3]] @@ -2886,7 +2886,7 @@ ; CHECK-LABEL: @avx2_pslli_w_256_masked( ; CHECK-NEXT: [[TMP1:%.*]] = trunc i32 [[A:%.*]] to i16 ; CHECK-NEXT: [[TMP2:%.*]] = and i16 [[TMP1]], 15 -; CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <16 x i16> poison, i16 [[TMP2]], i32 0 +; CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <16 x i16> poison, i16 [[TMP2]], i64 0 ; CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector <16 x i16> [[DOTSPLATINSERT]], <16 x i16> poison, <16 x i32> zeroinitializer ; CHECK-NEXT: [[TMP3:%.*]] = shl <16 x i16> [[V:%.*]], [[DOTSPLAT]] ; CHECK-NEXT: ret <16 x i16> [[TMP3]] @@ -2899,7 +2899,7 @@ define <16 x i32> @avx512_pslli_d_512_masked(<16 x i32> %v, i32 %a) { ; CHECK-LABEL: @avx512_pslli_d_512_masked( ; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[A:%.*]], 31 -; CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <16 x i32> poison, i32 [[TMP1]], i32 0 +; CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <16 x i32> poison, i32 [[TMP1]], i64 0 ; CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector <16 x i32> [[DOTSPLATINSERT]], <16 x i32> poison, <16 x i32> zeroinitializer ; CHECK-NEXT: [[TMP2:%.*]] = shl <16 x i32> [[V:%.*]], [[DOTSPLAT]] ; CHECK-NEXT: ret <16 x i32> [[TMP2]] diff --git a/llvm/test/Transforms/InstCombine/X86/x86-vector-shifts.ll b/llvm/test/Transforms/InstCombine/X86/x86-vector-shifts.ll --- a/llvm/test/Transforms/InstCombine/X86/x86-vector-shifts.ll +++ b/llvm/test/Transforms/InstCombine/X86/x86-vector-shifts.ll @@ -2769,7 +2769,7 @@ ; CHECK-LABEL: @sse2_psll_q_128_masked_bitcast( ; CHECK-NEXT: [[B:%.*]] = bitcast <2 x i64> [[A:%.*]] to <4 x i32> ; CHECK-NEXT: [[M:%.*]] = and <4 x i32> [[B]], -; CHECK-NEXT: [[I:%.*]] = insertelement <4 x i32> [[M]], i32 0, i32 1 +; CHECK-NEXT: [[I:%.*]] = insertelement <4 x i32> [[M]], i32 0, i64 1 ; CHECK-NEXT: [[SHAMT:%.*]] = bitcast <4 x i32> [[I]] to <2 x i64> ; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <2 x i64> [[SHAMT]], <2 x i64> poison, <2 x i32> zeroinitializer ; CHECK-NEXT: [[TMP2:%.*]] = shl <2 x i64> [[V:%.*]], [[TMP1]] @@ -2789,7 +2789,7 @@ ; CHECK-LABEL: @sse2_psll_q_128_masked_bitcast_overshift( ; CHECK-NEXT: [[B:%.*]] = bitcast <2 x i64> [[A:%.*]] to <4 x i32> ; CHECK-NEXT: [[M:%.*]] = and <4 x i32> [[B]], -; CHECK-NEXT: [[I:%.*]] = insertelement <4 x i32> [[M]], i32 1, i32 1 +; CHECK-NEXT: [[I:%.*]] = insertelement <4 x i32> [[M]], i32 1, i64 1 ; CHECK-NEXT: [[SHAMT:%.*]] = bitcast <4 x i32> [[I]] to <2 x i64> ; CHECK-NEXT: [[R:%.*]] = tail call <2 x i64> @llvm.x86.sse2.psll.q(<2 x i64> [[V:%.*]], <2 x i64> [[SHAMT]]) ; CHECK-NEXT: ret <2 x i64> [[R]] @@ -2830,7 +2830,7 @@ ; CHECK-LABEL: @sse2_psrai_w_128_masked( ; CHECK-NEXT: [[TMP1:%.*]] = trunc i32 [[A:%.*]] to i16 ; CHECK-NEXT: [[TMP2:%.*]] = and i16 [[TMP1]], 15 -; CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <8 x i16> poison, i16 [[TMP2]], i32 0 +; CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <8 x i16> poison, i16 [[TMP2]], i64 0 ; CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector <8 x i16> [[DOTSPLATINSERT]], <8 x i16> poison, <8 x i32> zeroinitializer ; CHECK-NEXT: [[TMP3:%.*]] = ashr <8 x i16> [[V:%.*]], [[DOTSPLAT]] ; CHECK-NEXT: ret <8 x i16> [[TMP3]] @@ -2843,7 +2843,7 @@ define <8 x i32> @avx2_psrai_d_256_masked(<8 x i32> %v, i32 %a) { ; CHECK-LABEL: @avx2_psrai_d_256_masked( ; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[A:%.*]], 31 -; CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <8 x i32> poison, i32 [[TMP1]], i32 0 +; CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <8 x i32> poison, i32 [[TMP1]], i64 0 ; CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector <8 x i32> [[DOTSPLATINSERT]], <8 x i32> poison, <8 x i32> zeroinitializer ; CHECK-NEXT: [[TMP2:%.*]] = ashr <8 x i32> [[V:%.*]], [[DOTSPLAT]] ; CHECK-NEXT: ret <8 x i32> [[TMP2]] @@ -2857,7 +2857,7 @@ ; CHECK-LABEL: @avx512_psrai_q_512_masked( ; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[A:%.*]], 63 ; CHECK-NEXT: [[TMP2:%.*]] = zext i32 [[TMP1]] to i64 -; CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <8 x i64> poison, i64 [[TMP2]], i32 0 +; CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <8 x i64> poison, i64 [[TMP2]], i64 0 ; CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector <8 x i64> [[DOTSPLATINSERT]], <8 x i64> poison, <8 x i32> zeroinitializer ; CHECK-NEXT: [[TMP3:%.*]] = ashr <8 x i64> [[V:%.*]], [[DOTSPLAT]] ; CHECK-NEXT: ret <8 x i64> [[TMP3]] @@ -2870,7 +2870,7 @@ define <4 x i32> @sse2_psrli_d_128_masked(<4 x i32> %v, i32 %a) { ; CHECK-LABEL: @sse2_psrli_d_128_masked( ; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[A:%.*]], 31 -; CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <4 x i32> poison, i32 [[TMP1]], i32 0 +; CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <4 x i32> poison, i32 [[TMP1]], i64 0 ; CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector <4 x i32> [[DOTSPLATINSERT]], <4 x i32> poison, <4 x i32> zeroinitializer ; CHECK-NEXT: [[TMP2:%.*]] = lshr <4 x i32> [[V:%.*]], [[DOTSPLAT]] ; CHECK-NEXT: ret <4 x i32> [[TMP2]] @@ -2884,7 +2884,7 @@ ; CHECK-LABEL: @avx2_psrli_q_256_masked( ; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[A:%.*]], 63 ; CHECK-NEXT: [[TMP2:%.*]] = zext i32 [[TMP1]] to i64 -; CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <4 x i64> poison, i64 [[TMP2]], i32 0 +; CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <4 x i64> poison, i64 [[TMP2]], i64 0 ; CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector <4 x i64> [[DOTSPLATINSERT]], <4 x i64> poison, <4 x i32> zeroinitializer ; CHECK-NEXT: [[TMP3:%.*]] = lshr <4 x i64> [[V:%.*]], [[DOTSPLAT]] ; CHECK-NEXT: ret <4 x i64> [[TMP3]] @@ -2898,7 +2898,7 @@ ; CHECK-LABEL: @avx512_psrli_w_512_masked( ; CHECK-NEXT: [[TMP1:%.*]] = trunc i32 [[A:%.*]] to i16 ; CHECK-NEXT: [[TMP2:%.*]] = and i16 [[TMP1]], 15 -; CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <32 x i16> poison, i16 [[TMP2]], i32 0 +; CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <32 x i16> poison, i16 [[TMP2]], i64 0 ; CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector <32 x i16> [[DOTSPLATINSERT]], <32 x i16> poison, <32 x i32> zeroinitializer ; CHECK-NEXT: [[TMP3:%.*]] = lshr <32 x i16> [[V:%.*]], [[DOTSPLAT]] ; CHECK-NEXT: ret <32 x i16> [[TMP3]] @@ -2912,7 +2912,7 @@ ; CHECK-LABEL: @sse2_pslli_q_128_masked( ; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[A:%.*]], 63 ; CHECK-NEXT: [[TMP2:%.*]] = zext i32 [[TMP1]] to i64 -; CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <2 x i64> poison, i64 [[TMP2]], i32 0 +; CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <2 x i64> poison, i64 [[TMP2]], i64 0 ; CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector <2 x i64> [[DOTSPLATINSERT]], <2 x i64> poison, <2 x i32> zeroinitializer ; CHECK-NEXT: [[TMP3:%.*]] = shl <2 x i64> [[V:%.*]], [[DOTSPLAT]] ; CHECK-NEXT: ret <2 x i64> [[TMP3]] @@ -2926,7 +2926,7 @@ ; CHECK-LABEL: @avx2_pslli_w_256_masked( ; CHECK-NEXT: [[TMP1:%.*]] = trunc i32 [[A:%.*]] to i16 ; CHECK-NEXT: [[TMP2:%.*]] = and i16 [[TMP1]], 15 -; CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <16 x i16> poison, i16 [[TMP2]], i32 0 +; CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <16 x i16> poison, i16 [[TMP2]], i64 0 ; CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector <16 x i16> [[DOTSPLATINSERT]], <16 x i16> poison, <16 x i32> zeroinitializer ; CHECK-NEXT: [[TMP3:%.*]] = shl <16 x i16> [[V:%.*]], [[DOTSPLAT]] ; CHECK-NEXT: ret <16 x i16> [[TMP3]] @@ -2939,7 +2939,7 @@ define <16 x i32> @avx512_pslli_d_512_masked(<16 x i32> %v, i32 %a) { ; CHECK-LABEL: @avx512_pslli_d_512_masked( ; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[A:%.*]], 31 -; CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <16 x i32> poison, i32 [[TMP1]], i32 0 +; CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <16 x i32> poison, i32 [[TMP1]], i64 0 ; CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector <16 x i32> [[DOTSPLATINSERT]], <16 x i32> poison, <16 x i32> zeroinitializer ; CHECK-NEXT: [[TMP2:%.*]] = shl <16 x i32> [[V:%.*]], [[DOTSPLAT]] ; CHECK-NEXT: ret <16 x i32> [[TMP2]] diff --git a/llvm/test/Transforms/InstCombine/X86/x86-vpermil-inseltpoison.ll b/llvm/test/Transforms/InstCombine/X86/x86-vpermil-inseltpoison.ll --- a/llvm/test/Transforms/InstCombine/X86/x86-vpermil-inseltpoison.ll +++ b/llvm/test/Transforms/InstCombine/X86/x86-vpermil-inseltpoison.ll @@ -281,7 +281,7 @@ define <8 x double> @elts_test_vpermilvar_pd_512(<8 x double> %a0, <8 x i64> %a1, i64 %a2) { ; CHECK-LABEL: @elts_test_vpermilvar_pd_512( -; CHECK-NEXT: [[TMP1:%.*]] = insertelement <8 x i64> poison, i64 [[A2:%.*]], i32 0 +; CHECK-NEXT: [[TMP1:%.*]] = insertelement <8 x i64> poison, i64 [[A2:%.*]], i64 0 ; CHECK-NEXT: [[TMP2:%.*]] = tail call <8 x double> @llvm.x86.avx512.vpermilvar.pd.512(<8 x double> [[A0:%.*]], <8 x i64> [[TMP1]]) ; CHECK-NEXT: [[TMP3:%.*]] = shufflevector <8 x double> [[TMP2]], <8 x double> poison, <8 x i32> zeroinitializer ; CHECK-NEXT: ret <8 x double> [[TMP3]] diff --git a/llvm/test/Transforms/InstCombine/X86/x86-vpermil.ll b/llvm/test/Transforms/InstCombine/X86/x86-vpermil.ll --- a/llvm/test/Transforms/InstCombine/X86/x86-vpermil.ll +++ b/llvm/test/Transforms/InstCombine/X86/x86-vpermil.ll @@ -281,7 +281,7 @@ define <8 x double> @elts_test_vpermilvar_pd_512(<8 x double> %a0, <8 x i64> %a1, i64 %a2) { ; CHECK-LABEL: @elts_test_vpermilvar_pd_512( -; CHECK-NEXT: [[TMP1:%.*]] = insertelement <8 x i64> poison, i64 [[A2:%.*]], i32 0 +; CHECK-NEXT: [[TMP1:%.*]] = insertelement <8 x i64> poison, i64 [[A2:%.*]], i64 0 ; CHECK-NEXT: [[TMP2:%.*]] = tail call <8 x double> @llvm.x86.avx512.vpermilvar.pd.512(<8 x double> [[A0:%.*]], <8 x i64> [[TMP1]]) ; CHECK-NEXT: [[TMP3:%.*]] = shufflevector <8 x double> [[TMP2]], <8 x double> undef, <8 x i32> zeroinitializer ; CHECK-NEXT: ret <8 x double> [[TMP3]] diff --git a/llvm/test/Transforms/InstCombine/X86/x86-xop-inseltpoison.ll b/llvm/test/Transforms/InstCombine/X86/x86-xop-inseltpoison.ll --- a/llvm/test/Transforms/InstCombine/X86/x86-xop-inseltpoison.ll +++ b/llvm/test/Transforms/InstCombine/X86/x86-xop-inseltpoison.ll @@ -13,9 +13,9 @@ define double @test_vfrcz_sd_0(double %a) { ; CHECK-LABEL: @test_vfrcz_sd_0( -; CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x double> poison, double [[A:%.*]], i32 0 +; CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x double> poison, double [[A:%.*]], i64 0 ; CHECK-NEXT: [[TMP2:%.*]] = tail call <2 x double> @llvm.x86.xop.vfrcz.sd(<2 x double> [[TMP1]]) -; CHECK-NEXT: [[TMP3:%.*]] = extractelement <2 x double> [[TMP2]], i32 0 +; CHECK-NEXT: [[TMP3:%.*]] = extractelement <2 x double> [[TMP2]], i64 0 ; CHECK-NEXT: ret double [[TMP3]] ; %1 = insertelement <2 x double> poison, double %a, i32 0 @@ -50,9 +50,9 @@ define float @test_vfrcz_ss_0(float %a) { ; CHECK-LABEL: @test_vfrcz_ss_0( -; CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x float> poison, float [[A:%.*]], i32 0 +; CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x float> poison, float [[A:%.*]], i64 0 ; CHECK-NEXT: [[TMP2:%.*]] = tail call <4 x float> @llvm.x86.xop.vfrcz.ss(<4 x float> [[TMP1]]) -; CHECK-NEXT: [[TMP3:%.*]] = extractelement <4 x float> [[TMP2]], i32 0 +; CHECK-NEXT: [[TMP3:%.*]] = extractelement <4 x float> [[TMP2]], i64 0 ; CHECK-NEXT: ret float [[TMP3]] ; %1 = insertelement <4 x float> poison, float %a, i32 0 diff --git a/llvm/test/Transforms/InstCombine/X86/x86-xop.ll b/llvm/test/Transforms/InstCombine/X86/x86-xop.ll --- a/llvm/test/Transforms/InstCombine/X86/x86-xop.ll +++ b/llvm/test/Transforms/InstCombine/X86/x86-xop.ll @@ -13,9 +13,9 @@ define double @test_vfrcz_sd_0(double %a) { ; CHECK-LABEL: @test_vfrcz_sd_0( -; CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x double> poison, double [[A:%.*]], i32 0 +; CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x double> poison, double [[A:%.*]], i64 0 ; CHECK-NEXT: [[TMP2:%.*]] = tail call <2 x double> @llvm.x86.xop.vfrcz.sd(<2 x double> [[TMP1]]) -; CHECK-NEXT: [[TMP3:%.*]] = extractelement <2 x double> [[TMP2]], i32 0 +; CHECK-NEXT: [[TMP3:%.*]] = extractelement <2 x double> [[TMP2]], i64 0 ; CHECK-NEXT: ret double [[TMP3]] ; %1 = insertelement <2 x double> undef, double %a, i32 0 @@ -50,9 +50,9 @@ define float @test_vfrcz_ss_0(float %a) { ; CHECK-LABEL: @test_vfrcz_ss_0( -; CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x float> poison, float [[A:%.*]], i32 0 +; CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x float> poison, float [[A:%.*]], i64 0 ; CHECK-NEXT: [[TMP2:%.*]] = tail call <4 x float> @llvm.x86.xop.vfrcz.ss(<4 x float> [[TMP1]]) -; CHECK-NEXT: [[TMP3:%.*]] = extractelement <4 x float> [[TMP2]], i32 0 +; CHECK-NEXT: [[TMP3:%.*]] = extractelement <4 x float> [[TMP2]], i64 0 ; CHECK-NEXT: ret float [[TMP3]] ; %1 = insertelement <4 x float> undef, float %a, i32 0 diff --git a/llvm/test/Transforms/InstCombine/bitcast-bigendian.ll b/llvm/test/Transforms/InstCombine/bitcast-bigendian.ll --- a/llvm/test/Transforms/InstCombine/bitcast-bigendian.ll +++ b/llvm/test/Transforms/InstCombine/bitcast-bigendian.ll @@ -9,9 +9,9 @@ define float @test2(<2 x float> %A, <2 x i32> %B) { ; CHECK-LABEL: @test2( -; CHECK-NEXT: [[TMP24:%.*]] = extractelement <2 x float> [[A:%.*]], i32 1 +; CHECK-NEXT: [[TMP24:%.*]] = extractelement <2 x float> [[A:%.*]], i64 1 ; CHECK-NEXT: [[BC:%.*]] = bitcast <2 x i32> [[B:%.*]] to <2 x float> -; CHECK-NEXT: [[TMP4:%.*]] = extractelement <2 x float> [[BC]], i32 1 +; CHECK-NEXT: [[TMP4:%.*]] = extractelement <2 x float> [[BC]], i64 1 ; CHECK-NEXT: [[ADD:%.*]] = fadd float [[TMP24]], [[TMP4]] ; CHECK-NEXT: ret float [[ADD]] ; @@ -29,9 +29,9 @@ define float @test3(<2 x float> %A, <2 x i64> %B) { ; CHECK-LABEL: @test3( -; CHECK-NEXT: [[TMP24:%.*]] = extractelement <2 x float> [[A:%.*]], i32 0 +; CHECK-NEXT: [[TMP24:%.*]] = extractelement <2 x float> [[A:%.*]], i64 0 ; CHECK-NEXT: [[BC2:%.*]] = bitcast <2 x i64> [[B:%.*]] to <4 x float> -; CHECK-NEXT: [[TMP4:%.*]] = extractelement <4 x float> [[BC2]], i32 1 +; CHECK-NEXT: [[TMP4:%.*]] = extractelement <4 x float> [[BC2]], i64 1 ; CHECK-NEXT: [[ADD:%.*]] = fadd float [[TMP24]], [[TMP4]] ; CHECK-NEXT: ret float [[ADD]] ; @@ -51,8 +51,8 @@ define <2 x i32> @test4(i32 %A, i32 %B){ ; CHECK-LABEL: @test4( -; CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x i32> poison, i32 [[B:%.*]], i32 0 -; CHECK-NEXT: [[TMP2:%.*]] = insertelement <2 x i32> [[TMP1]], i32 [[A:%.*]], i32 1 +; CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x i32> poison, i32 [[B:%.*]], i64 0 +; CHECK-NEXT: [[TMP2:%.*]] = insertelement <2 x i32> [[TMP1]], i32 [[A:%.*]], i64 1 ; CHECK-NEXT: ret <2 x i32> [[TMP2]] ; %tmp38 = zext i32 %A to i64 @@ -65,8 +65,8 @@ define <2 x float> @test5(float %A, float %B) { ; CHECK-LABEL: @test5( -; CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x float> poison, float [[B:%.*]], i32 0 -; CHECK-NEXT: [[TMP2:%.*]] = insertelement <2 x float> [[TMP1]], float [[A:%.*]], i32 1 +; CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x float> poison, float [[B:%.*]], i64 0 +; CHECK-NEXT: [[TMP2:%.*]] = insertelement <2 x float> [[TMP1]], float [[A:%.*]], i64 1 ; CHECK-NEXT: ret <2 x float> [[TMP2]] ; %tmp37 = bitcast float %A to i32 @@ -81,7 +81,7 @@ define <2 x float> @test6(float %A){ ; CHECK-LABEL: @test6( -; CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x float> , float [[A:%.*]], i32 0 +; CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x float> , float [[A:%.*]], i64 0 ; CHECK-NEXT: ret <2 x float> [[TMP1]] ; %tmp23 = bitcast float %A to i32 diff --git a/llvm/test/Transforms/InstCombine/bitcast-inselt-bitcast.ll b/llvm/test/Transforms/InstCombine/bitcast-inselt-bitcast.ll --- a/llvm/test/Transforms/InstCombine/bitcast-inselt-bitcast.ll +++ b/llvm/test/Transforms/InstCombine/bitcast-inselt-bitcast.ll @@ -10,7 +10,7 @@ define i16 @insert0_v2i8(i16 %x, i8 %y) { ; BE-LABEL: @insert0_v2i8( ; BE-NEXT: [[V:%.*]] = bitcast i16 [[X:%.*]] to <2 x i8> -; BE-NEXT: [[I:%.*]] = insertelement <2 x i8> [[V]], i8 [[Y:%.*]], i8 0 +; BE-NEXT: [[I:%.*]] = insertelement <2 x i8> [[V]], i8 [[Y:%.*]], i64 0 ; BE-NEXT: [[R:%.*]] = bitcast <2 x i8> [[I]] to i16 ; BE-NEXT: ret i16 [[R]] ; @@ -38,7 +38,7 @@ ; ; LE-LABEL: @insert1_v2i8( ; LE-NEXT: [[V:%.*]] = bitcast i16 [[X:%.*]] to <2 x i8> -; LE-NEXT: [[I:%.*]] = insertelement <2 x i8> [[V]], i8 [[Y:%.*]], i8 1 +; LE-NEXT: [[I:%.*]] = insertelement <2 x i8> [[V]], i8 [[Y:%.*]], i64 1 ; LE-NEXT: [[R:%.*]] = bitcast <2 x i8> [[I]] to i16 ; LE-NEXT: ret i16 [[R]] ; @@ -54,7 +54,7 @@ define i32 @insert0_v4i8(i32 %x, i8 %y) { ; BE-LABEL: @insert0_v4i8( ; BE-NEXT: [[V:%.*]] = bitcast i32 [[X:%.*]] to <4 x i8> -; BE-NEXT: [[I:%.*]] = insertelement <4 x i8> [[V]], i8 [[Y:%.*]], i8 0 +; BE-NEXT: [[I:%.*]] = insertelement <4 x i8> [[V]], i8 [[Y:%.*]], i64 0 ; BE-NEXT: [[R:%.*]] = bitcast <4 x i8> [[I]] to i32 ; BE-NEXT: ret i32 [[R]] ; @@ -75,17 +75,11 @@ ; half type can not be used in zext instruction (and so the transform is avoided). define i32 @insert0_v2half(i32 %x, half %y) { -; BE-LABEL: @insert0_v2half( -; BE-NEXT: [[V:%.*]] = bitcast i32 [[X:%.*]] to <2 x half> -; BE-NEXT: [[I:%.*]] = insertelement <2 x half> [[V]], half [[Y:%.*]], i8 0 -; BE-NEXT: [[R:%.*]] = bitcast <2 x half> [[I]] to i32 -; BE-NEXT: ret i32 [[R]] -; -; LE-LABEL: @insert0_v2half( -; LE-NEXT: [[V:%.*]] = bitcast i32 [[X:%.*]] to <2 x half> -; LE-NEXT: [[I:%.*]] = insertelement <2 x half> [[V]], half [[Y:%.*]], i8 0 -; LE-NEXT: [[R:%.*]] = bitcast <2 x half> [[I]] to i32 -; LE-NEXT: ret i32 [[R]] +; ALL-LABEL: @insert0_v2half( +; ALL-NEXT: [[V:%.*]] = bitcast i32 [[X:%.*]] to <2 x half> +; ALL-NEXT: [[I:%.*]] = insertelement <2 x half> [[V]], half [[Y:%.*]], i64 0 +; ALL-NEXT: [[R:%.*]] = bitcast <2 x half> [[I]] to i32 +; ALL-NEXT: ret i32 [[R]] ; %v = bitcast i32 %x to <2 x half> %i = insertelement <2 x half> %v, half %y, i8 0 @@ -99,7 +93,7 @@ define i64 @insert0_v4i16(i64 %x, i16 %y) { ; BE-LABEL: @insert0_v4i16( ; BE-NEXT: [[V:%.*]] = bitcast i64 [[X:%.*]] to <4 x i16> -; BE-NEXT: [[I:%.*]] = insertelement <4 x i16> [[V]], i16 [[Y:%.*]], i8 0 +; BE-NEXT: [[I:%.*]] = insertelement <4 x i16> [[V]], i16 [[Y:%.*]], i64 0 ; BE-NEXT: [[R:%.*]] = bitcast <4 x i16> [[I]] to i64 ; BE-NEXT: ret i64 [[R]] ; @@ -120,7 +114,7 @@ define i64 @insert1_v4i16(i64 %x, i16 %y) { ; ALL-LABEL: @insert1_v4i16( ; ALL-NEXT: [[V:%.*]] = bitcast i64 [[X:%.*]] to <4 x i16> -; ALL-NEXT: [[I:%.*]] = insertelement <4 x i16> [[V]], i16 [[Y:%.*]], i8 1 +; ALL-NEXT: [[I:%.*]] = insertelement <4 x i16> [[V]], i16 [[Y:%.*]], i64 1 ; ALL-NEXT: [[R:%.*]] = bitcast <4 x i16> [[I]] to i64 ; ALL-NEXT: ret i64 [[R]] ; @@ -142,7 +136,7 @@ ; ; LE-LABEL: @insert3_v4i16( ; LE-NEXT: [[V:%.*]] = bitcast i64 [[X:%.*]] to <4 x i16> -; LE-NEXT: [[I:%.*]] = insertelement <4 x i16> [[V]], i16 [[Y:%.*]], i8 3 +; LE-NEXT: [[I:%.*]] = insertelement <4 x i16> [[V]], i16 [[Y:%.*]], i64 3 ; LE-NEXT: [[R:%.*]] = bitcast <4 x i16> [[I]] to i64 ; LE-NEXT: ret i64 [[R]] ; @@ -157,7 +151,7 @@ define i128 @insert0_v4i32(i128 %x, i32 %y) { ; ALL-LABEL: @insert0_v4i32( ; ALL-NEXT: [[V:%.*]] = bitcast i128 [[X:%.*]] to <4 x i32> -; ALL-NEXT: [[I:%.*]] = insertelement <4 x i32> [[V]], i32 [[Y:%.*]], i8 0 +; ALL-NEXT: [[I:%.*]] = insertelement <4 x i32> [[V]], i32 [[Y:%.*]], i64 0 ; ALL-NEXT: [[R:%.*]] = bitcast <4 x i32> [[I]] to i128 ; ALL-NEXT: ret i128 [[R]] ; @@ -173,7 +167,7 @@ ; ALL-LABEL: @insert0_v2i8_use1( ; ALL-NEXT: [[V:%.*]] = bitcast i16 [[X:%.*]] to <2 x i8> ; ALL-NEXT: call void @use(<2 x i8> [[V]]) -; ALL-NEXT: [[I:%.*]] = insertelement <2 x i8> [[V]], i8 [[Y:%.*]], i8 0 +; ALL-NEXT: [[I:%.*]] = insertelement <2 x i8> [[V]], i8 [[Y:%.*]], i64 0 ; ALL-NEXT: [[R:%.*]] = bitcast <2 x i8> [[I]] to i16 ; ALL-NEXT: ret i16 [[R]] ; @@ -189,7 +183,7 @@ define i16 @insert0_v2i8_use2(i16 %x, i8 %y) { ; ALL-LABEL: @insert0_v2i8_use2( ; ALL-NEXT: [[V:%.*]] = bitcast i16 [[X:%.*]] to <2 x i8> -; ALL-NEXT: [[I:%.*]] = insertelement <2 x i8> [[V]], i8 [[Y:%.*]], i8 0 +; ALL-NEXT: [[I:%.*]] = insertelement <2 x i8> [[V]], i8 [[Y:%.*]], i64 0 ; ALL-NEXT: call void @use(<2 x i8> [[I]]) ; ALL-NEXT: [[R:%.*]] = bitcast <2 x i8> [[I]] to i16 ; ALL-NEXT: ret i16 [[R]] diff --git a/llvm/test/Transforms/InstCombine/bitcast-inseltpoison.ll b/llvm/test/Transforms/InstCombine/bitcast-inseltpoison.ll --- a/llvm/test/Transforms/InstCombine/bitcast-inseltpoison.ll +++ b/llvm/test/Transforms/InstCombine/bitcast-inseltpoison.ll @@ -289,9 +289,9 @@ ; rdar://7892780 define float @test2(<2 x float> %A, <2 x i32> %B) { ; CHECK-LABEL: @test2( -; CHECK-NEXT: [[TMP24:%.*]] = extractelement <2 x float> [[A:%.*]], i32 0 +; CHECK-NEXT: [[TMP24:%.*]] = extractelement <2 x float> [[A:%.*]], i64 0 ; CHECK-NEXT: [[BC:%.*]] = bitcast <2 x i32> [[B:%.*]] to <2 x float> -; CHECK-NEXT: [[TMP4:%.*]] = extractelement <2 x float> [[BC]], i32 0 +; CHECK-NEXT: [[TMP4:%.*]] = extractelement <2 x float> [[BC]], i64 0 ; CHECK-NEXT: [[ADD:%.*]] = fadd float [[TMP24]], [[TMP4]] ; CHECK-NEXT: ret float [[ADD]] ; @@ -311,9 +311,9 @@ ; rdar://7892780 define float @test3(<2 x float> %A, <2 x i64> %B) { ; CHECK-LABEL: @test3( -; CHECK-NEXT: [[TMP24:%.*]] = extractelement <2 x float> [[A:%.*]], i32 1 +; CHECK-NEXT: [[TMP24:%.*]] = extractelement <2 x float> [[A:%.*]], i64 1 ; CHECK-NEXT: [[BC2:%.*]] = bitcast <2 x i64> [[B:%.*]] to <4 x float> -; CHECK-NEXT: [[TMP4:%.*]] = extractelement <4 x float> [[BC2]], i32 2 +; CHECK-NEXT: [[TMP4:%.*]] = extractelement <4 x float> [[BC2]], i64 2 ; CHECK-NEXT: [[ADD:%.*]] = fadd float [[TMP24]], [[TMP4]] ; CHECK-NEXT: ret float [[ADD]] ; @@ -335,7 +335,7 @@ define float @bitcast_extelt1(<2 x float> %A) { ; CHECK-LABEL: @bitcast_extelt1( -; CHECK-NEXT: [[BC2:%.*]] = extractelement <2 x float> [[A:%.*]], i32 0 +; CHECK-NEXT: [[BC2:%.*]] = extractelement <2 x float> [[A:%.*]], i64 0 ; CHECK-NEXT: ret float [[BC2]] ; %bc1 = bitcast <2 x float> %A to <2 x i32> @@ -349,7 +349,7 @@ define i64 @bitcast_extelt2(<4 x float> %A) { ; CHECK-LABEL: @bitcast_extelt2( ; CHECK-NEXT: [[BC:%.*]] = bitcast <4 x float> [[A:%.*]] to <2 x i64> -; CHECK-NEXT: [[BC2:%.*]] = extractelement <2 x i64> [[BC]], i32 1 +; CHECK-NEXT: [[BC2:%.*]] = extractelement <2 x i64> [[BC]], i64 1 ; CHECK-NEXT: ret i64 [[BC2]] ; %bc1 = bitcast <4 x float> %A to <2 x double> @@ -363,7 +363,7 @@ define <2 x i32> @bitcast_extelt3(<2 x i32> %A) { ; CHECK-LABEL: @bitcast_extelt3( ; CHECK-NEXT: [[BC1:%.*]] = bitcast <2 x i32> [[A:%.*]] to <1 x i64> -; CHECK-NEXT: [[EXT:%.*]] = extractelement <1 x i64> [[BC1]], i32 0 +; CHECK-NEXT: [[EXT:%.*]] = extractelement <1 x i64> [[BC1]], i64 0 ; CHECK-NEXT: [[BC2:%.*]] = bitcast i64 [[EXT]] to <2 x i32> ; CHECK-NEXT: ret <2 x i32> [[BC2]] ; @@ -378,7 +378,7 @@ define double @bitcast_extelt4(i128 %A) { ; CHECK-LABEL: @bitcast_extelt4( ; CHECK-NEXT: [[BC:%.*]] = bitcast i128 [[A:%.*]] to <2 x double> -; CHECK-NEXT: [[BC2:%.*]] = extractelement <2 x double> [[BC]], i32 0 +; CHECK-NEXT: [[BC2:%.*]] = extractelement <2 x double> [[BC]], i64 0 ; CHECK-NEXT: ret double [[BC2]] ; %bc1 = bitcast i128 %A to <2 x i64> @@ -389,8 +389,8 @@ define <2 x i32> @test4(i32 %A, i32 %B){ ; CHECK-LABEL: @test4( -; CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x i32> poison, i32 [[A:%.*]], i32 0 -; CHECK-NEXT: [[TMP2:%.*]] = insertelement <2 x i32> [[TMP1]], i32 [[B:%.*]], i32 1 +; CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x i32> poison, i32 [[A:%.*]], i64 0 +; CHECK-NEXT: [[TMP2:%.*]] = insertelement <2 x i32> [[TMP1]], i32 [[B:%.*]], i64 1 ; CHECK-NEXT: ret <2 x i32> [[TMP2]] ; %tmp38 = zext i32 %A to i64 @@ -404,8 +404,8 @@ ; rdar://8360454 define <2 x float> @test5(float %A, float %B) { ; CHECK-LABEL: @test5( -; CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x float> poison, float [[A:%.*]], i32 0 -; CHECK-NEXT: [[TMP2:%.*]] = insertelement <2 x float> [[TMP1]], float [[B:%.*]], i32 1 +; CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x float> poison, float [[A:%.*]], i64 0 +; CHECK-NEXT: [[TMP2:%.*]] = insertelement <2 x float> [[TMP1]], float [[B:%.*]], i64 1 ; CHECK-NEXT: ret <2 x float> [[TMP2]] ; %tmp37 = bitcast float %A to i32 @@ -420,7 +420,7 @@ define <2 x float> @test6(float %A){ ; CHECK-LABEL: @test6( -; CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x float> , float [[A:%.*]], i32 1 +; CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x float> , float [[A:%.*]], i64 1 ; CHECK-NEXT: ret <2 x float> [[TMP1]] ; %tmp23 = bitcast float %A to i32 @@ -565,7 +565,7 @@ ; Ensure that we do not crash when looking at such a weird bitcast. define i8* @bitcast_from_single_element_pointer_vector_to_pointer(<1 x i8*> %ptrvec) { ; CHECK-LABEL: @bitcast_from_single_element_pointer_vector_to_pointer( -; CHECK-NEXT: [[TMP1:%.*]] = extractelement <1 x i8*> [[PTRVEC:%.*]], i32 0 +; CHECK-NEXT: [[TMP1:%.*]] = extractelement <1 x i8*> [[PTRVEC:%.*]], i64 0 ; CHECK-NEXT: ret i8* [[TMP1]] ; %ptr = bitcast <1 x i8*> %ptrvec to i8* diff --git a/llvm/test/Transforms/InstCombine/bitcast-vec-canon-inseltpoison.ll b/llvm/test/Transforms/InstCombine/bitcast-vec-canon-inseltpoison.ll --- a/llvm/test/Transforms/InstCombine/bitcast-vec-canon-inseltpoison.ll +++ b/llvm/test/Transforms/InstCombine/bitcast-vec-canon-inseltpoison.ll @@ -4,7 +4,7 @@ define double @a(<1 x i64> %y) { ; CHECK-LABEL: @a( ; CHECK-NEXT: [[BC:%.*]] = bitcast <1 x i64> [[Y:%.*]] to <1 x double> -; CHECK-NEXT: [[C:%.*]] = extractelement <1 x double> [[BC]], i32 0 +; CHECK-NEXT: [[C:%.*]] = extractelement <1 x double> [[BC]], i64 0 ; CHECK-NEXT: ret double [[C]] ; %c = bitcast <1 x i64> %y to double @@ -13,7 +13,7 @@ define i64 @b(<1 x i64> %y) { ; CHECK-LABEL: @b( -; CHECK-NEXT: [[TMP1:%.*]] = extractelement <1 x i64> [[Y:%.*]], i32 0 +; CHECK-NEXT: [[TMP1:%.*]] = extractelement <1 x i64> [[Y:%.*]], i64 0 ; CHECK-NEXT: ret i64 [[TMP1]] ; %c = bitcast <1 x i64> %y to i64 @@ -31,7 +31,7 @@ define <1 x i64> @d(i64 %y) { ; CHECK-LABEL: @d( -; CHECK-NEXT: [[TMP1:%.*]] = insertelement <1 x i64> poison, i64 [[Y:%.*]], i32 0 +; CHECK-NEXT: [[TMP1:%.*]] = insertelement <1 x i64> poison, i64 [[Y:%.*]], i64 0 ; CHECK-NEXT: ret <1 x i64> [[TMP1]] ; %c = bitcast i64 %y to <1 x i64> @@ -40,7 +40,7 @@ define x86_mmx @e(<1 x i64> %y) { ; CHECK-LABEL: @e( -; CHECK-NEXT: [[TMP1:%.*]] = extractelement <1 x i64> [[Y:%.*]], i32 0 +; CHECK-NEXT: [[TMP1:%.*]] = extractelement <1 x i64> [[Y:%.*]], i64 0 ; CHECK-NEXT: [[C:%.*]] = bitcast i64 [[TMP1]] to x86_mmx ; CHECK-NEXT: ret x86_mmx [[C]] ; @@ -51,7 +51,7 @@ define <1 x i64> @f(x86_mmx %y) { ; CHECK-LABEL: @f( ; CHECK-NEXT: [[TMP1:%.*]] = bitcast x86_mmx [[Y:%.*]] to i64 -; CHECK-NEXT: [[C:%.*]] = insertelement <1 x i64> poison, i64 [[TMP1]], i32 0 +; CHECK-NEXT: [[C:%.*]] = insertelement <1 x i64> poison, i64 [[TMP1]], i64 0 ; CHECK-NEXT: ret <1 x i64> [[C]] ; %c = bitcast x86_mmx %y to <1 x i64> @@ -154,8 +154,8 @@ define <2 x i64> @PR45748(double %x, double %y) { ; CHECK-LABEL: @PR45748( -; CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x double> undef, double [[X:%.*]], i32 0 -; CHECK-NEXT: [[TMP2:%.*]] = insertelement <2 x double> [[TMP1]], double [[Y:%.*]], i32 1 +; CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x double> undef, double [[X:%.*]], i64 0 +; CHECK-NEXT: [[TMP2:%.*]] = insertelement <2 x double> [[TMP1]], double [[Y:%.*]], i64 1 ; CHECK-NEXT: [[I1:%.*]] = bitcast <2 x double> [[TMP2]] to <2 x i64> ; CHECK-NEXT: ret <2 x i64> [[I1]] ; diff --git a/llvm/test/Transforms/InstCombine/bitcast-vec-canon.ll b/llvm/test/Transforms/InstCombine/bitcast-vec-canon.ll --- a/llvm/test/Transforms/InstCombine/bitcast-vec-canon.ll +++ b/llvm/test/Transforms/InstCombine/bitcast-vec-canon.ll @@ -4,7 +4,7 @@ define double @a(<1 x i64> %y) { ; CHECK-LABEL: @a( ; CHECK-NEXT: [[BC:%.*]] = bitcast <1 x i64> [[Y:%.*]] to <1 x double> -; CHECK-NEXT: [[C:%.*]] = extractelement <1 x double> [[BC]], i32 0 +; CHECK-NEXT: [[C:%.*]] = extractelement <1 x double> [[BC]], i64 0 ; CHECK-NEXT: ret double [[C]] ; %c = bitcast <1 x i64> %y to double @@ -13,7 +13,7 @@ define i64 @b(<1 x i64> %y) { ; CHECK-LABEL: @b( -; CHECK-NEXT: [[TMP1:%.*]] = extractelement <1 x i64> [[Y:%.*]], i32 0 +; CHECK-NEXT: [[TMP1:%.*]] = extractelement <1 x i64> [[Y:%.*]], i64 0 ; CHECK-NEXT: ret i64 [[TMP1]] ; %c = bitcast <1 x i64> %y to i64 @@ -31,7 +31,7 @@ define <1 x i64> @d(i64 %y) { ; CHECK-LABEL: @d( -; CHECK-NEXT: [[TMP1:%.*]] = insertelement <1 x i64> poison, i64 [[Y:%.*]], i32 0 +; CHECK-NEXT: [[TMP1:%.*]] = insertelement <1 x i64> poison, i64 [[Y:%.*]], i64 0 ; CHECK-NEXT: ret <1 x i64> [[TMP1]] ; %c = bitcast i64 %y to <1 x i64> @@ -40,7 +40,7 @@ define x86_mmx @e(<1 x i64> %y) { ; CHECK-LABEL: @e( -; CHECK-NEXT: [[TMP1:%.*]] = extractelement <1 x i64> [[Y:%.*]], i32 0 +; CHECK-NEXT: [[TMP1:%.*]] = extractelement <1 x i64> [[Y:%.*]], i64 0 ; CHECK-NEXT: [[C:%.*]] = bitcast i64 [[TMP1]] to x86_mmx ; CHECK-NEXT: ret x86_mmx [[C]] ; @@ -51,7 +51,7 @@ define <1 x i64> @f(x86_mmx %y) { ; CHECK-LABEL: @f( ; CHECK-NEXT: [[TMP1:%.*]] = bitcast x86_mmx [[Y:%.*]] to i64 -; CHECK-NEXT: [[C:%.*]] = insertelement <1 x i64> poison, i64 [[TMP1]], i32 0 +; CHECK-NEXT: [[C:%.*]] = insertelement <1 x i64> poison, i64 [[TMP1]], i64 0 ; CHECK-NEXT: ret <1 x i64> [[C]] ; %c = bitcast x86_mmx %y to <1 x i64> @@ -154,8 +154,8 @@ define <2 x i64> @PR45748(double %x, double %y) { ; CHECK-LABEL: @PR45748( -; CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x double> undef, double [[X:%.*]], i32 0 -; CHECK-NEXT: [[TMP2:%.*]] = insertelement <2 x double> [[TMP1]], double [[Y:%.*]], i32 1 +; CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x double> undef, double [[X:%.*]], i64 0 +; CHECK-NEXT: [[TMP2:%.*]] = insertelement <2 x double> [[TMP1]], double [[Y:%.*]], i64 1 ; CHECK-NEXT: [[I1:%.*]] = bitcast <2 x double> [[TMP2]] to <2 x i64> ; CHECK-NEXT: ret <2 x i64> [[I1]] ; diff --git a/llvm/test/Transforms/InstCombine/bitcast.ll b/llvm/test/Transforms/InstCombine/bitcast.ll --- a/llvm/test/Transforms/InstCombine/bitcast.ll +++ b/llvm/test/Transforms/InstCombine/bitcast.ll @@ -289,9 +289,9 @@ ; rdar://7892780 define float @test2(<2 x float> %A, <2 x i32> %B) { ; CHECK-LABEL: @test2( -; CHECK-NEXT: [[TMP24:%.*]] = extractelement <2 x float> [[A:%.*]], i32 0 +; CHECK-NEXT: [[TMP24:%.*]] = extractelement <2 x float> [[A:%.*]], i64 0 ; CHECK-NEXT: [[BC:%.*]] = bitcast <2 x i32> [[B:%.*]] to <2 x float> -; CHECK-NEXT: [[TMP4:%.*]] = extractelement <2 x float> [[BC]], i32 0 +; CHECK-NEXT: [[TMP4:%.*]] = extractelement <2 x float> [[BC]], i64 0 ; CHECK-NEXT: [[ADD:%.*]] = fadd float [[TMP24]], [[TMP4]] ; CHECK-NEXT: ret float [[ADD]] ; @@ -311,9 +311,9 @@ ; rdar://7892780 define float @test3(<2 x float> %A, <2 x i64> %B) { ; CHECK-LABEL: @test3( -; CHECK-NEXT: [[TMP24:%.*]] = extractelement <2 x float> [[A:%.*]], i32 1 +; CHECK-NEXT: [[TMP24:%.*]] = extractelement <2 x float> [[A:%.*]], i64 1 ; CHECK-NEXT: [[BC2:%.*]] = bitcast <2 x i64> [[B:%.*]] to <4 x float> -; CHECK-NEXT: [[TMP4:%.*]] = extractelement <4 x float> [[BC2]], i32 2 +; CHECK-NEXT: [[TMP4:%.*]] = extractelement <4 x float> [[BC2]], i64 2 ; CHECK-NEXT: [[ADD:%.*]] = fadd float [[TMP24]], [[TMP4]] ; CHECK-NEXT: ret float [[ADD]] ; @@ -335,7 +335,7 @@ define float @bitcast_extelt1(<2 x float> %A) { ; CHECK-LABEL: @bitcast_extelt1( -; CHECK-NEXT: [[BC2:%.*]] = extractelement <2 x float> [[A:%.*]], i32 0 +; CHECK-NEXT: [[BC2:%.*]] = extractelement <2 x float> [[A:%.*]], i64 0 ; CHECK-NEXT: ret float [[BC2]] ; %bc1 = bitcast <2 x float> %A to <2 x i32> @@ -349,7 +349,7 @@ define i64 @bitcast_extelt2(<4 x float> %A) { ; CHECK-LABEL: @bitcast_extelt2( ; CHECK-NEXT: [[BC:%.*]] = bitcast <4 x float> [[A:%.*]] to <2 x i64> -; CHECK-NEXT: [[BC2:%.*]] = extractelement <2 x i64> [[BC]], i32 1 +; CHECK-NEXT: [[BC2:%.*]] = extractelement <2 x i64> [[BC]], i64 1 ; CHECK-NEXT: ret i64 [[BC2]] ; %bc1 = bitcast <4 x float> %A to <2 x double> @@ -363,7 +363,7 @@ define <2 x i32> @bitcast_extelt3(<2 x i32> %A) { ; CHECK-LABEL: @bitcast_extelt3( ; CHECK-NEXT: [[BC1:%.*]] = bitcast <2 x i32> [[A:%.*]] to <1 x i64> -; CHECK-NEXT: [[EXT:%.*]] = extractelement <1 x i64> [[BC1]], i32 0 +; CHECK-NEXT: [[EXT:%.*]] = extractelement <1 x i64> [[BC1]], i64 0 ; CHECK-NEXT: [[BC2:%.*]] = bitcast i64 [[EXT]] to <2 x i32> ; CHECK-NEXT: ret <2 x i32> [[BC2]] ; @@ -378,7 +378,7 @@ define double @bitcast_extelt4(i128 %A) { ; CHECK-LABEL: @bitcast_extelt4( ; CHECK-NEXT: [[BC:%.*]] = bitcast i128 [[A:%.*]] to <2 x double> -; CHECK-NEXT: [[BC2:%.*]] = extractelement <2 x double> [[BC]], i32 0 +; CHECK-NEXT: [[BC2:%.*]] = extractelement <2 x double> [[BC]], i64 0 ; CHECK-NEXT: ret double [[BC2]] ; %bc1 = bitcast i128 %A to <2 x i64> @@ -389,8 +389,8 @@ define <2 x i32> @test4(i32 %A, i32 %B){ ; CHECK-LABEL: @test4( -; CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x i32> poison, i32 [[A:%.*]], i32 0 -; CHECK-NEXT: [[TMP2:%.*]] = insertelement <2 x i32> [[TMP1]], i32 [[B:%.*]], i32 1 +; CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x i32> poison, i32 [[A:%.*]], i64 0 +; CHECK-NEXT: [[TMP2:%.*]] = insertelement <2 x i32> [[TMP1]], i32 [[B:%.*]], i64 1 ; CHECK-NEXT: ret <2 x i32> [[TMP2]] ; %tmp38 = zext i32 %A to i64 @@ -404,8 +404,8 @@ ; rdar://8360454 define <2 x float> @test5(float %A, float %B) { ; CHECK-LABEL: @test5( -; CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x float> poison, float [[A:%.*]], i32 0 -; CHECK-NEXT: [[TMP2:%.*]] = insertelement <2 x float> [[TMP1]], float [[B:%.*]], i32 1 +; CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x float> poison, float [[A:%.*]], i64 0 +; CHECK-NEXT: [[TMP2:%.*]] = insertelement <2 x float> [[TMP1]], float [[B:%.*]], i64 1 ; CHECK-NEXT: ret <2 x float> [[TMP2]] ; %tmp37 = bitcast float %A to i32 @@ -420,7 +420,7 @@ define <2 x float> @test6(float %A){ ; CHECK-LABEL: @test6( -; CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x float> , float [[A:%.*]], i32 1 +; CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x float> , float [[A:%.*]], i64 1 ; CHECK-NEXT: ret <2 x float> [[TMP1]] ; %tmp23 = bitcast float %A to i32 @@ -573,7 +573,7 @@ ; Ensure that we do not crash when looking at such a weird bitcast. define i8* @bitcast_from_single_element_pointer_vector_to_pointer(<1 x i8*> %ptrvec) { ; CHECK-LABEL: @bitcast_from_single_element_pointer_vector_to_pointer( -; CHECK-NEXT: [[TMP1:%.*]] = extractelement <1 x i8*> [[PTRVEC:%.*]], i32 0 +; CHECK-NEXT: [[TMP1:%.*]] = extractelement <1 x i8*> [[PTRVEC:%.*]], i64 0 ; CHECK-NEXT: ret i8* [[TMP1]] ; %ptr = bitcast <1 x i8*> %ptrvec to i8* diff --git a/llvm/test/Transforms/InstCombine/broadcast-inseltpoison.ll b/llvm/test/Transforms/InstCombine/broadcast-inseltpoison.ll --- a/llvm/test/Transforms/InstCombine/broadcast-inseltpoison.ll +++ b/llvm/test/Transforms/InstCombine/broadcast-inseltpoison.ll @@ -3,7 +3,7 @@ define <4 x float> @good1(float %arg) { ; CHECK-LABEL: @good1( -; CHECK-NEXT: [[T:%.*]] = insertelement <4 x float> poison, float [[ARG:%.*]], i32 0 +; CHECK-NEXT: [[T:%.*]] = insertelement <4 x float> poison, float [[ARG:%.*]], i64 0 ; CHECK-NEXT: [[T6:%.*]] = shufflevector <4 x float> [[T]], <4 x float> poison, <4 x i32> zeroinitializer ; CHECK-NEXT: ret <4 x float> [[T6]] ; @@ -16,7 +16,7 @@ define <4 x float> @good2(float %arg) { ; CHECK-LABEL: @good2( -; CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x float> poison, float [[ARG:%.*]], i32 0 +; CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x float> poison, float [[ARG:%.*]], i64 0 ; CHECK-NEXT: [[T6:%.*]] = shufflevector <4 x float> [[TMP1]], <4 x float> poison, <4 x i32> zeroinitializer ; CHECK-NEXT: ret <4 x float> [[T6]] ; @@ -29,7 +29,7 @@ define <4 x float> @good3(float %arg) { ; CHECK-LABEL: @good3( -; CHECK-NEXT: [[T:%.*]] = insertelement <4 x float> poison, float [[ARG:%.*]], i32 0 +; CHECK-NEXT: [[T:%.*]] = insertelement <4 x float> poison, float [[ARG:%.*]], i64 0 ; CHECK-NEXT: [[T6:%.*]] = shufflevector <4 x float> [[T]], <4 x float> poison, <4 x i32> zeroinitializer ; CHECK-NEXT: ret <4 x float> [[T6]] ; @@ -42,7 +42,7 @@ define <4 x float> @good4(float %arg) { ; CHECK-LABEL: @good4( -; CHECK-NEXT: [[T:%.*]] = insertelement <4 x float> poison, float [[ARG:%.*]], i32 0 +; CHECK-NEXT: [[T:%.*]] = insertelement <4 x float> poison, float [[ARG:%.*]], i64 0 ; CHECK-NEXT: [[TMP1:%.*]] = fadd <4 x float> [[T]], [[T]] ; CHECK-NEXT: [[T7:%.*]] = shufflevector <4 x float> [[TMP1]], <4 x float> poison, <4 x i32> zeroinitializer ; CHECK-NEXT: ret <4 x float> [[T7]] @@ -57,7 +57,7 @@ define <4 x float> @good5(float %v) { ; CHECK-LABEL: @good5( -; CHECK-NEXT: [[INS1:%.*]] = insertelement <4 x float> poison, float [[V:%.*]], i32 0 +; CHECK-NEXT: [[INS1:%.*]] = insertelement <4 x float> poison, float [[V:%.*]], i64 0 ; CHECK-NEXT: [[A1:%.*]] = fadd <4 x float> [[INS1]], [[INS1]] ; CHECK-NEXT: [[INS4:%.*]] = shufflevector <4 x float> [[INS1]], <4 x float> poison, <4 x i32> zeroinitializer ; CHECK-NEXT: [[RES:%.*]] = fadd <4 x float> [[A1]], [[INS4]] @@ -76,7 +76,7 @@ define <4 x float> @splat_undef1(float %arg) { ; CHECK-LABEL: @splat_undef1( -; CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x float> poison, float [[ARG:%.*]], i32 0 +; CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x float> poison, float [[ARG:%.*]], i64 0 ; CHECK-NEXT: [[T6:%.*]] = shufflevector <4 x float> [[TMP1]], <4 x float> poison, <4 x i32> ; CHECK-NEXT: ret <4 x float> [[T6]] ; @@ -91,7 +91,7 @@ define <4 x float> @splat_undef2(float %arg) { ; CHECK-LABEL: @splat_undef2( -; CHECK-NEXT: [[T:%.*]] = insertelement <4 x float> poison, float [[ARG:%.*]], i32 0 +; CHECK-NEXT: [[T:%.*]] = insertelement <4 x float> poison, float [[ARG:%.*]], i64 0 ; CHECK-NEXT: [[T6:%.*]] = shufflevector <4 x float> [[T]], <4 x float> poison, <4 x i32> ; CHECK-NEXT: ret <4 x float> [[T6]] ; @@ -103,10 +103,10 @@ define <4 x float> @bad3(float %arg, float %arg2) { ; CHECK-LABEL: @bad3( -; CHECK-NEXT: [[T:%.*]] = insertelement <4 x float> poison, float [[ARG:%.*]], i32 0 -; CHECK-NEXT: [[T4:%.*]] = insertelement <4 x float> [[T]], float [[ARG2:%.*]], i32 1 -; CHECK-NEXT: [[T5:%.*]] = insertelement <4 x float> [[T4]], float [[ARG]], i32 2 -; CHECK-NEXT: [[T6:%.*]] = insertelement <4 x float> [[T5]], float [[ARG]], i32 3 +; CHECK-NEXT: [[T:%.*]] = insertelement <4 x float> poison, float [[ARG:%.*]], i64 0 +; CHECK-NEXT: [[T4:%.*]] = insertelement <4 x float> [[T]], float [[ARG2:%.*]], i64 1 +; CHECK-NEXT: [[T5:%.*]] = insertelement <4 x float> [[T4]], float [[ARG]], i64 2 +; CHECK-NEXT: [[T6:%.*]] = insertelement <4 x float> [[T5]], float [[ARG]], i64 3 ; CHECK-NEXT: ret <4 x float> [[T6]] ; %t = insertelement <4 x float> poison, float %arg, i32 0 @@ -118,7 +118,7 @@ define <1 x float> @bad4(float %arg) { ; CHECK-LABEL: @bad4( -; CHECK-NEXT: [[T:%.*]] = insertelement <1 x float> poison, float [[ARG:%.*]], i32 0 +; CHECK-NEXT: [[T:%.*]] = insertelement <1 x float> poison, float [[ARG:%.*]], i64 0 ; CHECK-NEXT: ret <1 x float> [[T]] ; %t = insertelement <1 x float> poison, float %arg, i32 0 @@ -130,7 +130,7 @@ define <4 x float> @splat_undef3(float %arg) { ; CHECK-LABEL: @splat_undef3( -; CHECK-NEXT: [[T:%.*]] = insertelement <4 x float> poison, float [[ARG:%.*]], i32 0 +; CHECK-NEXT: [[T:%.*]] = insertelement <4 x float> poison, float [[ARG:%.*]], i64 0 ; CHECK-NEXT: [[T4:%.*]] = shufflevector <4 x float> [[T]], <4 x float> poison, <4 x i32> ; CHECK-NEXT: [[T6:%.*]] = shufflevector <4 x float> [[T]], <4 x float> poison, <4 x i32> zeroinitializer ; CHECK-NEXT: [[T7:%.*]] = fadd <4 x float> [[T6]], [[T4]] @@ -146,10 +146,10 @@ define <4 x float> @bad6(float %arg, i32 %k) { ; CHECK-LABEL: @bad6( -; CHECK-NEXT: [[T:%.*]] = insertelement <4 x float> poison, float [[ARG:%.*]], i32 0 -; CHECK-NEXT: [[T4:%.*]] = insertelement <4 x float> [[T]], float [[ARG]], i32 1 +; CHECK-NEXT: [[T:%.*]] = insertelement <4 x float> poison, float [[ARG:%.*]], i64 0 +; CHECK-NEXT: [[T4:%.*]] = insertelement <4 x float> [[T]], float [[ARG]], i64 1 ; CHECK-NEXT: [[T5:%.*]] = insertelement <4 x float> [[T4]], float [[ARG]], i32 [[K:%.*]] -; CHECK-NEXT: [[T6:%.*]] = insertelement <4 x float> [[T5]], float [[ARG]], i32 3 +; CHECK-NEXT: [[T6:%.*]] = insertelement <4 x float> [[T5]], float [[ARG]], i64 3 ; CHECK-NEXT: ret <4 x float> [[T6]] ; %t = insertelement <4 x float> poison, float %arg, i32 0 @@ -161,11 +161,11 @@ define <4 x float> @bad7(float %v) { ; CHECK-LABEL: @bad7( -; CHECK-NEXT: [[INS1:%.*]] = insertelement <4 x float> poison, float [[V:%.*]], i32 1 +; CHECK-NEXT: [[INS1:%.*]] = insertelement <4 x float> poison, float [[V:%.*]], i64 1 ; CHECK-NEXT: [[A1:%.*]] = fadd <4 x float> [[INS1]], [[INS1]] -; CHECK-NEXT: [[INS2:%.*]] = insertelement <4 x float> [[INS1]], float [[V]], i32 2 -; CHECK-NEXT: [[INS3:%.*]] = insertelement <4 x float> [[INS2]], float [[V]], i32 3 -; CHECK-NEXT: [[INS4:%.*]] = insertelement <4 x float> [[INS3]], float [[V]], i32 0 +; CHECK-NEXT: [[INS2:%.*]] = insertelement <4 x float> [[INS1]], float [[V]], i64 2 +; CHECK-NEXT: [[INS3:%.*]] = insertelement <4 x float> [[INS2]], float [[V]], i64 3 +; CHECK-NEXT: [[INS4:%.*]] = insertelement <4 x float> [[INS3]], float [[V]], i64 0 ; CHECK-NEXT: [[RES:%.*]] = fadd <4 x float> [[A1]], [[INS4]] ; CHECK-NEXT: ret <4 x float> [[RES]] ; diff --git a/llvm/test/Transforms/InstCombine/broadcast.ll b/llvm/test/Transforms/InstCombine/broadcast.ll --- a/llvm/test/Transforms/InstCombine/broadcast.ll +++ b/llvm/test/Transforms/InstCombine/broadcast.ll @@ -3,7 +3,7 @@ define <4 x float> @good1(float %arg) { ; CHECK-LABEL: @good1( -; CHECK-NEXT: [[T:%.*]] = insertelement <4 x float> undef, float [[ARG:%.*]], i32 0 +; CHECK-NEXT: [[T:%.*]] = insertelement <4 x float> undef, float [[ARG:%.*]], i64 0 ; CHECK-NEXT: [[T6:%.*]] = shufflevector <4 x float> [[T]], <4 x float> poison, <4 x i32> zeroinitializer ; CHECK-NEXT: ret <4 x float> [[T6]] ; @@ -16,7 +16,7 @@ define <4 x float> @good2(float %arg) { ; CHECK-LABEL: @good2( -; CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x float> poison, float [[ARG:%.*]], i32 0 +; CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x float> poison, float [[ARG:%.*]], i64 0 ; CHECK-NEXT: [[T6:%.*]] = shufflevector <4 x float> [[TMP1]], <4 x float> poison, <4 x i32> zeroinitializer ; CHECK-NEXT: ret <4 x float> [[T6]] ; @@ -29,7 +29,7 @@ define <4 x float> @good3(float %arg) { ; CHECK-LABEL: @good3( -; CHECK-NEXT: [[T:%.*]] = insertelement <4 x float> poison, float [[ARG:%.*]], i32 0 +; CHECK-NEXT: [[T:%.*]] = insertelement <4 x float> poison, float [[ARG:%.*]], i64 0 ; CHECK-NEXT: [[T6:%.*]] = shufflevector <4 x float> [[T]], <4 x float> poison, <4 x i32> zeroinitializer ; CHECK-NEXT: ret <4 x float> [[T6]] ; @@ -42,7 +42,7 @@ define <4 x float> @good4(float %arg) { ; CHECK-LABEL: @good4( -; CHECK-NEXT: [[T:%.*]] = insertelement <4 x float> poison, float [[ARG:%.*]], i32 0 +; CHECK-NEXT: [[T:%.*]] = insertelement <4 x float> poison, float [[ARG:%.*]], i64 0 ; CHECK-NEXT: [[TMP1:%.*]] = fadd <4 x float> [[T]], [[T]] ; CHECK-NEXT: [[T7:%.*]] = shufflevector <4 x float> [[TMP1]], <4 x float> poison, <4 x i32> zeroinitializer ; CHECK-NEXT: ret <4 x float> [[T7]] @@ -57,7 +57,7 @@ define <4 x float> @good5(float %v) { ; CHECK-LABEL: @good5( -; CHECK-NEXT: [[INS1:%.*]] = insertelement <4 x float> undef, float [[V:%.*]], i32 0 +; CHECK-NEXT: [[INS1:%.*]] = insertelement <4 x float> undef, float [[V:%.*]], i64 0 ; CHECK-NEXT: [[A1:%.*]] = fadd <4 x float> [[INS1]], [[INS1]] ; CHECK-NEXT: [[INS4:%.*]] = shufflevector <4 x float> [[INS1]], <4 x float> poison, <4 x i32> zeroinitializer ; CHECK-NEXT: [[RES:%.*]] = fadd <4 x float> [[A1]], [[INS4]] @@ -76,7 +76,7 @@ define <4 x float> @splat_undef1(float %arg) { ; CHECK-LABEL: @splat_undef1( -; CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x float> poison, float [[ARG:%.*]], i32 0 +; CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x float> poison, float [[ARG:%.*]], i64 0 ; CHECK-NEXT: [[T6:%.*]] = shufflevector <4 x float> [[TMP1]], <4 x float> poison, <4 x i32> ; CHECK-NEXT: ret <4 x float> [[T6]] ; @@ -91,7 +91,7 @@ define <4 x float> @splat_undef2(float %arg) { ; CHECK-LABEL: @splat_undef2( -; CHECK-NEXT: [[T:%.*]] = insertelement <4 x float> undef, float [[ARG:%.*]], i32 0 +; CHECK-NEXT: [[T:%.*]] = insertelement <4 x float> undef, float [[ARG:%.*]], i64 0 ; CHECK-NEXT: [[T6:%.*]] = shufflevector <4 x float> [[T]], <4 x float> poison, <4 x i32> ; CHECK-NEXT: ret <4 x float> [[T6]] ; @@ -103,10 +103,10 @@ define <4 x float> @bad3(float %arg, float %arg2) { ; CHECK-LABEL: @bad3( -; CHECK-NEXT: [[T:%.*]] = insertelement <4 x float> undef, float [[ARG:%.*]], i32 0 -; CHECK-NEXT: [[T4:%.*]] = insertelement <4 x float> [[T]], float [[ARG2:%.*]], i32 1 -; CHECK-NEXT: [[T5:%.*]] = insertelement <4 x float> [[T4]], float [[ARG]], i32 2 -; CHECK-NEXT: [[T6:%.*]] = insertelement <4 x float> [[T5]], float [[ARG]], i32 3 +; CHECK-NEXT: [[T:%.*]] = insertelement <4 x float> undef, float [[ARG:%.*]], i64 0 +; CHECK-NEXT: [[T4:%.*]] = insertelement <4 x float> [[T]], float [[ARG2:%.*]], i64 1 +; CHECK-NEXT: [[T5:%.*]] = insertelement <4 x float> [[T4]], float [[ARG]], i64 2 +; CHECK-NEXT: [[T6:%.*]] = insertelement <4 x float> [[T5]], float [[ARG]], i64 3 ; CHECK-NEXT: ret <4 x float> [[T6]] ; %t = insertelement <4 x float> undef, float %arg, i32 0 @@ -118,7 +118,7 @@ define <1 x float> @bad4(float %arg) { ; CHECK-LABEL: @bad4( -; CHECK-NEXT: [[T:%.*]] = insertelement <1 x float> undef, float [[ARG:%.*]], i32 0 +; CHECK-NEXT: [[T:%.*]] = insertelement <1 x float> undef, float [[ARG:%.*]], i64 0 ; CHECK-NEXT: ret <1 x float> [[T]] ; %t = insertelement <1 x float> undef, float %arg, i32 0 @@ -130,7 +130,7 @@ define <4 x float> @splat_undef3(float %arg) { ; CHECK-LABEL: @splat_undef3( -; CHECK-NEXT: [[T:%.*]] = insertelement <4 x float> undef, float [[ARG:%.*]], i32 0 +; CHECK-NEXT: [[T:%.*]] = insertelement <4 x float> undef, float [[ARG:%.*]], i64 0 ; CHECK-NEXT: [[T4:%.*]] = shufflevector <4 x float> [[T]], <4 x float> poison, <4 x i32> ; CHECK-NEXT: [[T6:%.*]] = shufflevector <4 x float> [[T]], <4 x float> poison, <4 x i32> zeroinitializer ; CHECK-NEXT: [[T7:%.*]] = fadd <4 x float> [[T6]], [[T4]] @@ -146,10 +146,10 @@ define <4 x float> @bad6(float %arg, i32 %k) { ; CHECK-LABEL: @bad6( -; CHECK-NEXT: [[T:%.*]] = insertelement <4 x float> undef, float [[ARG:%.*]], i32 0 -; CHECK-NEXT: [[T4:%.*]] = insertelement <4 x float> [[T]], float [[ARG]], i32 1 +; CHECK-NEXT: [[T:%.*]] = insertelement <4 x float> undef, float [[ARG:%.*]], i64 0 +; CHECK-NEXT: [[T4:%.*]] = insertelement <4 x float> [[T]], float [[ARG]], i64 1 ; CHECK-NEXT: [[T5:%.*]] = insertelement <4 x float> [[T4]], float [[ARG]], i32 [[K:%.*]] -; CHECK-NEXT: [[T6:%.*]] = insertelement <4 x float> [[T5]], float [[ARG]], i32 3 +; CHECK-NEXT: [[T6:%.*]] = insertelement <4 x float> [[T5]], float [[ARG]], i64 3 ; CHECK-NEXT: ret <4 x float> [[T6]] ; %t = insertelement <4 x float> undef, float %arg, i32 0 @@ -161,11 +161,11 @@ define <4 x float> @bad7(float %v) { ; CHECK-LABEL: @bad7( -; CHECK-NEXT: [[INS1:%.*]] = insertelement <4 x float> undef, float [[V:%.*]], i32 1 +; CHECK-NEXT: [[INS1:%.*]] = insertelement <4 x float> undef, float [[V:%.*]], i64 1 ; CHECK-NEXT: [[A1:%.*]] = fadd <4 x float> [[INS1]], [[INS1]] -; CHECK-NEXT: [[INS2:%.*]] = insertelement <4 x float> [[INS1]], float [[V]], i32 2 -; CHECK-NEXT: [[INS3:%.*]] = insertelement <4 x float> [[INS2]], float [[V]], i32 3 -; CHECK-NEXT: [[INS4:%.*]] = insertelement <4 x float> [[INS3]], float [[V]], i32 0 +; CHECK-NEXT: [[INS2:%.*]] = insertelement <4 x float> [[INS1]], float [[V]], i64 2 +; CHECK-NEXT: [[INS3:%.*]] = insertelement <4 x float> [[INS2]], float [[V]], i64 3 +; CHECK-NEXT: [[INS4:%.*]] = insertelement <4 x float> [[INS3]], float [[V]], i64 0 ; CHECK-NEXT: [[RES:%.*]] = fadd <4 x float> [[A1]], [[INS4]] ; CHECK-NEXT: ret <4 x float> [[RES]] ; diff --git a/llvm/test/Transforms/InstCombine/cast_ptr.ll b/llvm/test/Transforms/InstCombine/cast_ptr.ll --- a/llvm/test/Transforms/InstCombine/cast_ptr.ll +++ b/llvm/test/Transforms/InstCombine/cast_ptr.ll @@ -178,7 +178,7 @@ ; CHECK-LABEL: @insertelt_intptr_trunc( ; CHECK-NEXT: [[TMP1:%.*]] = trunc <2 x i64> [[X:%.*]] to <2 x i32> ; CHECK-NEXT: [[TMP2:%.*]] = ptrtoint i32* [[P:%.*]] to i32 -; CHECK-NEXT: [[R:%.*]] = insertelement <2 x i32> [[TMP1]], i32 [[TMP2]], i32 0 +; CHECK-NEXT: [[R:%.*]] = insertelement <2 x i32> [[TMP1]], i32 [[TMP2]], i64 0 ; CHECK-NEXT: ret <2 x i32> [[R]] ; %v = inttoptr <2 x i64> %x to <2 x i32*> @@ -191,7 +191,7 @@ ; CHECK-LABEL: @insertelt_intptr_zext( ; CHECK-NEXT: [[TMP1:%.*]] = zext <2 x i8> [[X:%.*]] to <2 x i32> ; CHECK-NEXT: [[TMP2:%.*]] = ptrtoint i32* [[P:%.*]] to i32 -; CHECK-NEXT: [[R:%.*]] = insertelement <2 x i32> [[TMP1]], i32 [[TMP2]], i32 1 +; CHECK-NEXT: [[R:%.*]] = insertelement <2 x i32> [[TMP1]], i32 [[TMP2]], i64 1 ; CHECK-NEXT: ret <2 x i32> [[R]] ; %v = inttoptr <2 x i8> %x to <2 x i32*> @@ -204,7 +204,7 @@ ; CHECK-LABEL: @insertelt_intptr_zext_zext( ; CHECK-NEXT: [[TMP1:%.*]] = zext <2 x i8> [[X:%.*]] to <2 x i32> ; CHECK-NEXT: [[TMP2:%.*]] = ptrtoint i32* [[P:%.*]] to i32 -; CHECK-NEXT: [[TMP3:%.*]] = insertelement <2 x i32> [[TMP1]], i32 [[TMP2]], i32 0 +; CHECK-NEXT: [[TMP3:%.*]] = insertelement <2 x i32> [[TMP1]], i32 [[TMP2]], i64 0 ; CHECK-NEXT: [[R:%.*]] = zext <2 x i32> [[TMP3]] to <2 x i64> ; CHECK-NEXT: ret <2 x i64> [[R]] ; @@ -221,7 +221,7 @@ ; CHECK-NEXT: [[V:%.*]] = inttoptr <2 x i32> [[X:%.*]] to <2 x i32*> ; CHECK-NEXT: call void @use(<2 x i32*> [[V]]) ; CHECK-NEXT: [[TMP1:%.*]] = ptrtoint i32* [[P:%.*]] to i32 -; CHECK-NEXT: [[R:%.*]] = insertelement <2 x i32> [[X]], i32 [[TMP1]], i32 0 +; CHECK-NEXT: [[R:%.*]] = insertelement <2 x i32> [[X]], i32 [[TMP1]], i64 0 ; CHECK-NEXT: ret <2 x i32> [[R]] ; %v = inttoptr <2 x i32> %x to <2 x i32*> @@ -234,7 +234,7 @@ define <2 x i32> @insertelt_extra_use2(<2 x i32> %x, i32* %p) { ; CHECK-LABEL: @insertelt_extra_use2( ; CHECK-NEXT: [[V:%.*]] = inttoptr <2 x i32> [[X:%.*]] to <2 x i32*> -; CHECK-NEXT: [[I:%.*]] = insertelement <2 x i32*> [[V]], i32* [[P:%.*]], i32 0 +; CHECK-NEXT: [[I:%.*]] = insertelement <2 x i32*> [[V]], i32* [[P:%.*]], i64 0 ; CHECK-NEXT: call void @use(<2 x i32*> [[I]]) ; CHECK-NEXT: [[R:%.*]] = ptrtoint <2 x i32*> [[I]] to <2 x i32> ; CHECK-NEXT: ret <2 x i32> [[R]] diff --git a/llvm/test/Transforms/InstCombine/extractelement-inseltpoison.ll b/llvm/test/Transforms/InstCombine/extractelement-inseltpoison.ll --- a/llvm/test/Transforms/InstCombine/extractelement-inseltpoison.ll +++ b/llvm/test/Transforms/InstCombine/extractelement-inseltpoison.ll @@ -12,7 +12,7 @@ define i32 @extractelement_type_out_of_range(<2 x i32> %x) { ; ANY-LABEL: @extractelement_type_out_of_range( -; ANY-NEXT: [[E1:%.*]] = extractelement <2 x i32> [[X:%.*]], i128 0 +; ANY-NEXT: [[E1:%.*]] = extractelement <2 x i32> [[X:%.*]], i64 0 ; ANY-NEXT: ret i32 [[E1]] ; %E1 = extractelement <2 x i32> %x, i128 0 @@ -128,7 +128,7 @@ define i8 @bitcasted_inselt_wide_source_wrong_insert(<2 x i32> %v, i32 %x) { ; ANY-LABEL: @bitcasted_inselt_wide_source_wrong_insert( ; ANY-NEXT: [[B:%.*]] = bitcast <2 x i32> [[V:%.*]] to <8 x i8> -; ANY-NEXT: [[R:%.*]] = extractelement <8 x i8> [[B]], i32 2 +; ANY-NEXT: [[R:%.*]] = extractelement <8 x i8> [[B]], i64 2 ; ANY-NEXT: ret i8 [[R]] ; %i = insertelement <2 x i32> %v, i32 %x, i32 1 @@ -143,14 +143,14 @@ define i8 @bitcasted_inselt_wide_source_uses(i32 %x) { ; LE-LABEL: @bitcasted_inselt_wide_source_uses( -; LE-NEXT: [[I:%.*]] = insertelement <2 x i32> poison, i32 [[X:%.*]], i32 0 +; LE-NEXT: [[I:%.*]] = insertelement <2 x i32> poison, i32 [[X:%.*]], i64 0 ; LE-NEXT: [[B:%.*]] = bitcast <2 x i32> [[I]] to <8 x i8> ; LE-NEXT: call void @use(<8 x i8> [[B]]) -; LE-NEXT: [[R:%.*]] = extractelement <8 x i8> [[B]], i32 3 +; LE-NEXT: [[R:%.*]] = extractelement <8 x i8> [[B]], i64 3 ; LE-NEXT: ret i8 [[R]] ; ; BE-LABEL: @bitcasted_inselt_wide_source_uses( -; BE-NEXT: [[I:%.*]] = insertelement <2 x i32> poison, i32 [[X:%.*]], i32 0 +; BE-NEXT: [[I:%.*]] = insertelement <2 x i32> poison, i32 [[X:%.*]], i64 0 ; BE-NEXT: [[B:%.*]] = bitcast <2 x i32> [[I]] to <8 x i8> ; BE-NEXT: call void @use(<8 x i8> [[B]]) ; BE-NEXT: [[R:%.*]] = trunc i32 [[X]] to i8 @@ -186,10 +186,10 @@ define float @bitcasted_inselt_to_FP_uses(i128 %x) { ; ANY-LABEL: @bitcasted_inselt_to_FP_uses( -; ANY-NEXT: [[I:%.*]] = insertelement <2 x i128> poison, i128 [[X:%.*]], i32 0 +; ANY-NEXT: [[I:%.*]] = insertelement <2 x i128> poison, i128 [[X:%.*]], i64 0 ; ANY-NEXT: call void @use_v2i128(<2 x i128> [[I]]) ; ANY-NEXT: [[B:%.*]] = bitcast <2 x i128> [[I]] to <8 x float> -; ANY-NEXT: [[R:%.*]] = extractelement <8 x float> [[B]], i32 1 +; ANY-NEXT: [[R:%.*]] = extractelement <8 x float> [[B]], i64 1 ; ANY-NEXT: ret float [[R]] ; %i = insertelement <2 x i128> poison, i128 %x, i32 0 @@ -201,10 +201,10 @@ define float @bitcasted_inselt_to_FP_uses2(i128 %x) { ; ANY-LABEL: @bitcasted_inselt_to_FP_uses2( -; ANY-NEXT: [[I:%.*]] = insertelement <2 x i128> poison, i128 [[X:%.*]], i32 0 +; ANY-NEXT: [[I:%.*]] = insertelement <2 x i128> poison, i128 [[X:%.*]], i64 0 ; ANY-NEXT: [[B:%.*]] = bitcast <2 x i128> [[I]] to <8 x float> ; ANY-NEXT: call void @use_v8f32(<8 x float> [[B]]) -; ANY-NEXT: [[R:%.*]] = extractelement <8 x float> [[B]], i32 1 +; ANY-NEXT: [[R:%.*]] = extractelement <8 x float> [[B]], i64 1 ; ANY-NEXT: ret float [[R]] ; %i = insertelement <2 x i128> poison, i128 %x, i32 0 @@ -237,10 +237,10 @@ define i16 @bitcasted_inselt_from_FP_uses(double %x) { ; ANY-LABEL: @bitcasted_inselt_from_FP_uses( -; ANY-NEXT: [[I:%.*]] = insertelement <2 x double> poison, double [[X:%.*]], i32 0 +; ANY-NEXT: [[I:%.*]] = insertelement <2 x double> poison, double [[X:%.*]], i64 0 ; ANY-NEXT: call void @use_v2f64(<2 x double> [[I]]) ; ANY-NEXT: [[B:%.*]] = bitcast <2 x double> [[I]] to <8 x i16> -; ANY-NEXT: [[R:%.*]] = extractelement <8 x i16> [[B]], i32 1 +; ANY-NEXT: [[R:%.*]] = extractelement <8 x i16> [[B]], i64 1 ; ANY-NEXT: ret i16 [[R]] ; %i = insertelement <2 x double> poison, double %x, i32 0 @@ -252,10 +252,10 @@ define i16 @bitcasted_inselt_from_FP_uses2(double %x) { ; ANY-LABEL: @bitcasted_inselt_from_FP_uses2( -; ANY-NEXT: [[I:%.*]] = insertelement <2 x double> poison, double [[X:%.*]], i32 0 +; ANY-NEXT: [[I:%.*]] = insertelement <2 x double> poison, double [[X:%.*]], i64 0 ; ANY-NEXT: [[B:%.*]] = bitcast <2 x double> [[I]] to <8 x i16> ; ANY-NEXT: call void @use_v8i16(<8 x i16> [[B]]) -; ANY-NEXT: [[R:%.*]] = extractelement <8 x i16> [[B]], i32 1 +; ANY-NEXT: [[R:%.*]] = extractelement <8 x i16> [[B]], i64 1 ; ANY-NEXT: ret i16 [[R]] ; %i = insertelement <2 x double> poison, double %x, i32 0 @@ -267,9 +267,9 @@ define float @bitcasted_inselt_to_and_from_FP(double %x) { ; ANY-LABEL: @bitcasted_inselt_to_and_from_FP( -; ANY-NEXT: [[I:%.*]] = insertelement <2 x double> poison, double [[X:%.*]], i32 0 +; ANY-NEXT: [[I:%.*]] = insertelement <2 x double> poison, double [[X:%.*]], i64 0 ; ANY-NEXT: [[B:%.*]] = bitcast <2 x double> [[I]] to <4 x float> -; ANY-NEXT: [[R:%.*]] = extractelement <4 x float> [[B]], i32 1 +; ANY-NEXT: [[R:%.*]] = extractelement <4 x float> [[B]], i64 1 ; ANY-NEXT: ret float [[R]] ; %i = insertelement <2 x double> poison, double %x, i32 0 @@ -280,10 +280,10 @@ define float @bitcasted_inselt_to_and_from_FP_uses(double %x) { ; ANY-LABEL: @bitcasted_inselt_to_and_from_FP_uses( -; ANY-NEXT: [[I:%.*]] = insertelement <2 x double> poison, double [[X:%.*]], i32 0 +; ANY-NEXT: [[I:%.*]] = insertelement <2 x double> poison, double [[X:%.*]], i64 0 ; ANY-NEXT: call void @use_v2f64(<2 x double> [[I]]) ; ANY-NEXT: [[B:%.*]] = bitcast <2 x double> [[I]] to <4 x float> -; ANY-NEXT: [[R:%.*]] = extractelement <4 x float> [[B]], i32 1 +; ANY-NEXT: [[R:%.*]] = extractelement <4 x float> [[B]], i64 1 ; ANY-NEXT: ret float [[R]] ; %i = insertelement <2 x double> poison, double %x, i32 0 @@ -297,10 +297,10 @@ define float @bitcasted_inselt_to_and_from_FP_uses2(double %x) { ; ANY-LABEL: @bitcasted_inselt_to_and_from_FP_uses2( -; ANY-NEXT: [[I:%.*]] = insertelement <2 x double> poison, double [[X:%.*]], i32 0 +; ANY-NEXT: [[I:%.*]] = insertelement <2 x double> poison, double [[X:%.*]], i64 0 ; ANY-NEXT: [[B:%.*]] = bitcast <2 x double> [[I]] to <4 x float> ; ANY-NEXT: call void @use_v4f32(<4 x float> [[B]]) -; ANY-NEXT: [[R:%.*]] = extractelement <4 x float> [[B]], i32 1 +; ANY-NEXT: [[R:%.*]] = extractelement <4 x float> [[B]], i64 1 ; ANY-NEXT: ret float [[R]] ; %i = insertelement <2 x double> poison, double %x, i32 0 @@ -317,7 +317,7 @@ ; ANY-LABEL: @invalid_extractelement( ; ANY-NEXT: [[TMP1:%.*]] = shufflevector <2 x double> [[A:%.*]], <2 x double> poison, <4 x i32> ; ANY-NEXT: [[T4:%.*]] = shufflevector <4 x double> [[B:%.*]], <4 x double> [[TMP1]], <4 x i32> -; ANY-NEXT: [[E:%.*]] = extractelement <4 x double> [[B]], i32 1 +; ANY-NEXT: [[E:%.*]] = extractelement <4 x double> [[B]], i64 1 ; ANY-NEXT: store double [[E]], double* [[P:%.*]], align 8 ; ANY-NEXT: ret <4 x double> [[T4]] ; diff --git a/llvm/test/Transforms/InstCombine/extractelement.ll b/llvm/test/Transforms/InstCombine/extractelement.ll --- a/llvm/test/Transforms/InstCombine/extractelement.ll +++ b/llvm/test/Transforms/InstCombine/extractelement.ll @@ -12,7 +12,7 @@ define i32 @extractelement_type_out_of_range(<2 x i32> %x) { ; ANY-LABEL: @extractelement_type_out_of_range( -; ANY-NEXT: [[E1:%.*]] = extractelement <2 x i32> [[X:%.*]], i128 0 +; ANY-NEXT: [[E1:%.*]] = extractelement <2 x i32> [[X:%.*]], i64 0 ; ANY-NEXT: ret i32 [[E1]] ; %E1 = extractelement <2 x i32> %x, i128 0 @@ -128,7 +128,7 @@ define i8 @bitcasted_inselt_wide_source_wrong_insert(<2 x i32> %v, i32 %x) { ; ANY-LABEL: @bitcasted_inselt_wide_source_wrong_insert( ; ANY-NEXT: [[B:%.*]] = bitcast <2 x i32> [[V:%.*]] to <8 x i8> -; ANY-NEXT: [[R:%.*]] = extractelement <8 x i8> [[B]], i32 2 +; ANY-NEXT: [[R:%.*]] = extractelement <8 x i8> [[B]], i64 2 ; ANY-NEXT: ret i8 [[R]] ; %i = insertelement <2 x i32> %v, i32 %x, i32 1 @@ -143,14 +143,14 @@ define i8 @bitcasted_inselt_wide_source_uses(i32 %x) { ; LE-LABEL: @bitcasted_inselt_wide_source_uses( -; LE-NEXT: [[I:%.*]] = insertelement <2 x i32> undef, i32 [[X:%.*]], i32 0 +; LE-NEXT: [[I:%.*]] = insertelement <2 x i32> undef, i32 [[X:%.*]], i64 0 ; LE-NEXT: [[B:%.*]] = bitcast <2 x i32> [[I]] to <8 x i8> ; LE-NEXT: call void @use(<8 x i8> [[B]]) -; LE-NEXT: [[R:%.*]] = extractelement <8 x i8> [[B]], i32 3 +; LE-NEXT: [[R:%.*]] = extractelement <8 x i8> [[B]], i64 3 ; LE-NEXT: ret i8 [[R]] ; ; BE-LABEL: @bitcasted_inselt_wide_source_uses( -; BE-NEXT: [[I:%.*]] = insertelement <2 x i32> undef, i32 [[X:%.*]], i32 0 +; BE-NEXT: [[I:%.*]] = insertelement <2 x i32> undef, i32 [[X:%.*]], i64 0 ; BE-NEXT: [[B:%.*]] = bitcast <2 x i32> [[I]] to <8 x i8> ; BE-NEXT: call void @use(<8 x i8> [[B]]) ; BE-NEXT: [[R:%.*]] = trunc i32 [[X]] to i8 @@ -186,10 +186,10 @@ define float @bitcasted_inselt_to_FP_uses(i128 %x) { ; ANY-LABEL: @bitcasted_inselt_to_FP_uses( -; ANY-NEXT: [[I:%.*]] = insertelement <2 x i128> undef, i128 [[X:%.*]], i32 0 +; ANY-NEXT: [[I:%.*]] = insertelement <2 x i128> undef, i128 [[X:%.*]], i64 0 ; ANY-NEXT: call void @use_v2i128(<2 x i128> [[I]]) ; ANY-NEXT: [[B:%.*]] = bitcast <2 x i128> [[I]] to <8 x float> -; ANY-NEXT: [[R:%.*]] = extractelement <8 x float> [[B]], i32 1 +; ANY-NEXT: [[R:%.*]] = extractelement <8 x float> [[B]], i64 1 ; ANY-NEXT: ret float [[R]] ; %i = insertelement <2 x i128> undef, i128 %x, i32 0 @@ -201,10 +201,10 @@ define float @bitcasted_inselt_to_FP_uses2(i128 %x) { ; ANY-LABEL: @bitcasted_inselt_to_FP_uses2( -; ANY-NEXT: [[I:%.*]] = insertelement <2 x i128> undef, i128 [[X:%.*]], i32 0 +; ANY-NEXT: [[I:%.*]] = insertelement <2 x i128> undef, i128 [[X:%.*]], i64 0 ; ANY-NEXT: [[B:%.*]] = bitcast <2 x i128> [[I]] to <8 x float> ; ANY-NEXT: call void @use_v8f32(<8 x float> [[B]]) -; ANY-NEXT: [[R:%.*]] = extractelement <8 x float> [[B]], i32 1 +; ANY-NEXT: [[R:%.*]] = extractelement <8 x float> [[B]], i64 1 ; ANY-NEXT: ret float [[R]] ; %i = insertelement <2 x i128> undef, i128 %x, i32 0 @@ -237,10 +237,10 @@ define i16 @bitcasted_inselt_from_FP_uses(double %x) { ; ANY-LABEL: @bitcasted_inselt_from_FP_uses( -; ANY-NEXT: [[I:%.*]] = insertelement <2 x double> undef, double [[X:%.*]], i32 0 +; ANY-NEXT: [[I:%.*]] = insertelement <2 x double> undef, double [[X:%.*]], i64 0 ; ANY-NEXT: call void @use_v2f64(<2 x double> [[I]]) ; ANY-NEXT: [[B:%.*]] = bitcast <2 x double> [[I]] to <8 x i16> -; ANY-NEXT: [[R:%.*]] = extractelement <8 x i16> [[B]], i32 1 +; ANY-NEXT: [[R:%.*]] = extractelement <8 x i16> [[B]], i64 1 ; ANY-NEXT: ret i16 [[R]] ; %i = insertelement <2 x double> undef, double %x, i32 0 @@ -252,10 +252,10 @@ define i16 @bitcasted_inselt_from_FP_uses2(double %x) { ; ANY-LABEL: @bitcasted_inselt_from_FP_uses2( -; ANY-NEXT: [[I:%.*]] = insertelement <2 x double> undef, double [[X:%.*]], i32 0 +; ANY-NEXT: [[I:%.*]] = insertelement <2 x double> undef, double [[X:%.*]], i64 0 ; ANY-NEXT: [[B:%.*]] = bitcast <2 x double> [[I]] to <8 x i16> ; ANY-NEXT: call void @use_v8i16(<8 x i16> [[B]]) -; ANY-NEXT: [[R:%.*]] = extractelement <8 x i16> [[B]], i32 1 +; ANY-NEXT: [[R:%.*]] = extractelement <8 x i16> [[B]], i64 1 ; ANY-NEXT: ret i16 [[R]] ; %i = insertelement <2 x double> undef, double %x, i32 0 @@ -267,9 +267,9 @@ define float @bitcasted_inselt_to_and_from_FP(double %x) { ; ANY-LABEL: @bitcasted_inselt_to_and_from_FP( -; ANY-NEXT: [[I:%.*]] = insertelement <2 x double> undef, double [[X:%.*]], i32 0 +; ANY-NEXT: [[I:%.*]] = insertelement <2 x double> undef, double [[X:%.*]], i64 0 ; ANY-NEXT: [[B:%.*]] = bitcast <2 x double> [[I]] to <4 x float> -; ANY-NEXT: [[R:%.*]] = extractelement <4 x float> [[B]], i32 1 +; ANY-NEXT: [[R:%.*]] = extractelement <4 x float> [[B]], i64 1 ; ANY-NEXT: ret float [[R]] ; %i = insertelement <2 x double> undef, double %x, i32 0 @@ -280,10 +280,10 @@ define float @bitcasted_inselt_to_and_from_FP_uses(double %x) { ; ANY-LABEL: @bitcasted_inselt_to_and_from_FP_uses( -; ANY-NEXT: [[I:%.*]] = insertelement <2 x double> undef, double [[X:%.*]], i32 0 +; ANY-NEXT: [[I:%.*]] = insertelement <2 x double> undef, double [[X:%.*]], i64 0 ; ANY-NEXT: call void @use_v2f64(<2 x double> [[I]]) ; ANY-NEXT: [[B:%.*]] = bitcast <2 x double> [[I]] to <4 x float> -; ANY-NEXT: [[R:%.*]] = extractelement <4 x float> [[B]], i32 1 +; ANY-NEXT: [[R:%.*]] = extractelement <4 x float> [[B]], i64 1 ; ANY-NEXT: ret float [[R]] ; %i = insertelement <2 x double> undef, double %x, i32 0 @@ -297,10 +297,10 @@ define float @bitcasted_inselt_to_and_from_FP_uses2(double %x) { ; ANY-LABEL: @bitcasted_inselt_to_and_from_FP_uses2( -; ANY-NEXT: [[I:%.*]] = insertelement <2 x double> undef, double [[X:%.*]], i32 0 +; ANY-NEXT: [[I:%.*]] = insertelement <2 x double> undef, double [[X:%.*]], i64 0 ; ANY-NEXT: [[B:%.*]] = bitcast <2 x double> [[I]] to <4 x float> ; ANY-NEXT: call void @use_v4f32(<4 x float> [[B]]) -; ANY-NEXT: [[R:%.*]] = extractelement <4 x float> [[B]], i32 1 +; ANY-NEXT: [[R:%.*]] = extractelement <4 x float> [[B]], i64 1 ; ANY-NEXT: ret float [[R]] ; %i = insertelement <2 x double> undef, double %x, i32 0 @@ -317,7 +317,7 @@ ; ANY-LABEL: @invalid_extractelement( ; ANY-NEXT: [[TMP1:%.*]] = shufflevector <2 x double> [[A:%.*]], <2 x double> poison, <4 x i32> ; ANY-NEXT: [[T4:%.*]] = shufflevector <4 x double> [[B:%.*]], <4 x double> [[TMP1]], <4 x i32> -; ANY-NEXT: [[E:%.*]] = extractelement <4 x double> [[B]], i32 1 +; ANY-NEXT: [[E:%.*]] = extractelement <4 x double> [[B]], i64 1 ; ANY-NEXT: store double [[E]], double* [[P:%.*]], align 8 ; ANY-NEXT: ret <4 x double> [[T4]] ; @@ -399,7 +399,7 @@ define i8 @bitcast_fp_index0(float %x) { ; ANY-LABEL: @bitcast_fp_index0( ; ANY-NEXT: [[V:%.*]] = bitcast float [[X:%.*]] to <4 x i8> -; ANY-NEXT: [[R:%.*]] = extractelement <4 x i8> [[V]], i8 0 +; ANY-NEXT: [[R:%.*]] = extractelement <4 x i8> [[V]], i64 0 ; ANY-NEXT: ret i8 [[R]] ; %v = bitcast float %x to <4 x i8> @@ -412,7 +412,7 @@ define half @bitcast_fpvec_index0(i32 %x) { ; ANY-LABEL: @bitcast_fpvec_index0( ; ANY-NEXT: [[V:%.*]] = bitcast i32 [[X:%.*]] to <2 x half> -; ANY-NEXT: [[R:%.*]] = extractelement <2 x half> [[V]], i8 0 +; ANY-NEXT: [[R:%.*]] = extractelement <2 x half> [[V]], i64 0 ; ANY-NEXT: ret half [[R]] ; %v = bitcast i32 %x to <2 x half> diff --git a/llvm/test/Transforms/InstCombine/fmul-inseltpoison.ll b/llvm/test/Transforms/InstCombine/fmul-inseltpoison.ll --- a/llvm/test/Transforms/InstCombine/fmul-inseltpoison.ll +++ b/llvm/test/Transforms/InstCombine/fmul-inseltpoison.ll @@ -13,7 +13,7 @@ ; CHECK-NEXT: [[LOCAL_VAR_7_0:%.*]] = phi <4 x float> [ , [[ENTRY:%.*]] ], [ [[TMP0:%.*]], [[FOR_BODY:%.*]] ] ; CHECK-NEXT: br i1 undef, label [[FOR_BODY]], label [[FOR_END:%.*]] ; CHECK: for.body: -; CHECK-NEXT: [[TMP0]] = insertelement <4 x float> [[LOCAL_VAR_7_0]], float 0.000000e+00, i32 2 +; CHECK-NEXT: [[TMP0]] = insertelement <4 x float> [[LOCAL_VAR_7_0]], float 0.000000e+00, i64 2 ; CHECK-NEXT: br label [[FOR_COND]] ; CHECK: for.end: ; CHECK-NEXT: ret void diff --git a/llvm/test/Transforms/InstCombine/fmul.ll b/llvm/test/Transforms/InstCombine/fmul.ll --- a/llvm/test/Transforms/InstCombine/fmul.ll +++ b/llvm/test/Transforms/InstCombine/fmul.ll @@ -380,7 +380,7 @@ ; CHECK-NEXT: [[LOCAL_VAR_7_0:%.*]] = phi <4 x float> [ , [[ENTRY:%.*]] ], [ [[TMP0:%.*]], [[FOR_BODY:%.*]] ] ; CHECK-NEXT: br i1 undef, label [[FOR_BODY]], label [[FOR_END:%.*]] ; CHECK: for.body: -; CHECK-NEXT: [[TMP0]] = insertelement <4 x float> [[LOCAL_VAR_7_0]], float 0.000000e+00, i32 2 +; CHECK-NEXT: [[TMP0]] = insertelement <4 x float> [[LOCAL_VAR_7_0]], float 0.000000e+00, i64 2 ; CHECK-NEXT: br label [[FOR_COND]] ; CHECK: for.end: ; CHECK-NEXT: ret void diff --git a/llvm/test/Transforms/InstCombine/gep-inbounds-null.ll b/llvm/test/Transforms/InstCombine/gep-inbounds-null.ll --- a/llvm/test/Transforms/InstCombine/gep-inbounds-null.ll +++ b/llvm/test/Transforms/InstCombine/gep-inbounds-null.ll @@ -90,7 +90,7 @@ define <2 x i1> @test_vector_index(i8* %base, <2 x i64> %idx) { ; CHECK-LABEL: @test_vector_index( ; CHECK-NEXT: entry: -; CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <2 x i8*> poison, i8* [[BASE:%.*]], i32 0 +; CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <2 x i8*> poison, i8* [[BASE:%.*]], i64 0 ; CHECK-NEXT: [[TMP0:%.*]] = icmp eq <2 x i8*> [[DOTSPLATINSERT]], zeroinitializer ; CHECK-NEXT: [[CND:%.*]] = shufflevector <2 x i1> [[TMP0]], <2 x i1> poison, <2 x i32> zeroinitializer ; CHECK-NEXT: ret <2 x i1> [[CND]] diff --git a/llvm/test/Transforms/InstCombine/gep-vector-indices.ll b/llvm/test/Transforms/InstCombine/gep-vector-indices.ll --- a/llvm/test/Transforms/InstCombine/gep-vector-indices.ll +++ b/llvm/test/Transforms/InstCombine/gep-vector-indices.ll @@ -25,8 +25,8 @@ define i32* @vector_indices_v2i64_ext0(i32* %a, <2 x i64> %indices) { ; CHECK-LABEL: @vector_indices_v2i64_ext0( -; CHECK-NEXT: [[TMP0:%.*]] = extractelement <2 x i64> [[INDICES:%.*]], i32 0 -; CHECK-NEXT: [[RES:%.*]] = getelementptr i32, i32* [[A:%.*]], i64 [[TMP0]] +; CHECK-NEXT: [[TMP1:%.*]] = extractelement <2 x i64> [[INDICES:%.*]], i64 0 +; CHECK-NEXT: [[RES:%.*]] = getelementptr i32, i32* [[A:%.*]], i64 [[TMP1]] ; CHECK-NEXT: ret i32* [[RES]] ; %gep = getelementptr i32, i32* %a, <2 x i64> %indices @@ -36,8 +36,8 @@ define i32* @vector_indices_nxv1i64_ext0(i32* %a, %indices) { ; CHECK-LABEL: @vector_indices_nxv1i64_ext0( -; CHECK-NEXT: [[TMP0:%.*]] = extractelement [[INDICES:%.*]], i32 0 -; CHECK-NEXT: [[RES:%.*]] = getelementptr i32, i32* [[A:%.*]], i64 [[TMP0]] +; CHECK-NEXT: [[TMP1:%.*]] = extractelement [[INDICES:%.*]], i64 0 +; CHECK-NEXT: [[RES:%.*]] = getelementptr i32, i32* [[A:%.*]], i64 [[TMP1]] ; CHECK-NEXT: ret i32* [[RES]] ; %gep = getelementptr i32, i32* %a, %indices @@ -99,7 +99,7 @@ define i32* @vector_indices_nxv2i64_ext3(i32* %a, %indices) { ; CHECK-LABEL: @vector_indices_nxv2i64_ext3( ; CHECK-NEXT: [[GEP:%.*]] = getelementptr i32, i32* [[A:%.*]], [[INDICES:%.*]] -; CHECK-NEXT: [[RES:%.*]] = extractelement [[GEP]], i32 3 +; CHECK-NEXT: [[RES:%.*]] = extractelement [[GEP]], i64 3 ; CHECK-NEXT: ret i32* [[RES]] ; %gep = getelementptr i32, i32* %a, %indices @@ -121,8 +121,8 @@ define void @vector_indices_nxv2i64_mulitple_use(i32* %a, %indices, i32** %b, i32** %c) { ; CHECK-LABEL: @vector_indices_nxv2i64_mulitple_use( ; CHECK-NEXT: [[GEP:%.*]] = getelementptr i32, i32* [[A:%.*]], [[INDICES:%.*]] -; CHECK-NEXT: [[LANE0:%.*]] = extractelement [[GEP]], i32 0 -; CHECK-NEXT: [[LANE1:%.*]] = extractelement [[GEP]], i32 1 +; CHECK-NEXT: [[LANE0:%.*]] = extractelement [[GEP]], i64 0 +; CHECK-NEXT: [[LANE1:%.*]] = extractelement [[GEP]], i64 1 ; CHECK-NEXT: store i32* [[LANE0]], i32** [[B:%.*]], align 8 ; CHECK-NEXT: store i32* [[LANE1]], i32** [[C:%.*]], align 8 ; CHECK-NEXT: ret void @@ -138,7 +138,7 @@ define i32* @vector_ptrs_and_indices_ext0( %a, %indices) { ; CHECK-LABEL: @vector_ptrs_and_indices_ext0( ; CHECK-NEXT: [[GEP:%.*]] = getelementptr i32, [[A:%.*]], [[INDICES:%.*]] -; CHECK-NEXT: [[RES:%.*]] = extractelement [[GEP]], i32 0 +; CHECK-NEXT: [[RES:%.*]] = extractelement [[GEP]], i64 0 ; CHECK-NEXT: ret i32* [[RES]] ; %gep = getelementptr i32, %a, %indices diff --git a/llvm/test/Transforms/InstCombine/getelementptr.ll b/llvm/test/Transforms/InstCombine/getelementptr.ll --- a/llvm/test/Transforms/InstCombine/getelementptr.ll +++ b/llvm/test/Transforms/InstCombine/getelementptr.ll @@ -215,7 +215,7 @@ define <2 x i1> @test13_vector2(i64 %X, <2 x %S*> %P) nounwind { ; CHECK-LABEL: @test13_vector2( -; CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <2 x i64> poison, i64 [[X:%.*]], i32 0 +; CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <2 x i64> poison, i64 [[X:%.*]], i64 0 ; CHECK-NEXT: [[TMP1:%.*]] = shl <2 x i64> [[DOTSPLATINSERT]], ; CHECK-NEXT: [[TMP2:%.*]] = icmp eq <2 x i64> [[TMP1]], ; CHECK-NEXT: [[C:%.*]] = shufflevector <2 x i1> [[TMP2]], <2 x i1> poison, <2 x i32> zeroinitializer @@ -230,7 +230,7 @@ ; This is a test of icmp + shl nuw in disguise - 4611... is 0x3fff... define <2 x i1> @test13_vector3(i64 %X, <2 x %S*> %P) nounwind { ; CHECK-LABEL: @test13_vector3( -; CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <2 x i64> poison, i64 [[X:%.*]], i32 0 +; CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <2 x i64> poison, i64 [[X:%.*]], i64 0 ; CHECK-NEXT: [[TMP1:%.*]] = shl <2 x i64> [[DOTSPLATINSERT]], ; CHECK-NEXT: [[TMP2:%.*]] = icmp eq <2 x i64> [[TMP1]], ; CHECK-NEXT: [[C:%.*]] = shufflevector <2 x i1> [[TMP2]], <2 x i1> poison, <2 x i32> zeroinitializer diff --git a/llvm/test/Transforms/InstCombine/icmp-bc-vec-inseltpoison.ll b/llvm/test/Transforms/InstCombine/icmp-bc-vec-inseltpoison.ll --- a/llvm/test/Transforms/InstCombine/icmp-bc-vec-inseltpoison.ll +++ b/llvm/test/Transforms/InstCombine/icmp-bc-vec-inseltpoison.ll @@ -88,7 +88,7 @@ ; Make sure we don't try to fold if the compared-to constant isn't a splatted value define i1 @test_i8_nopattern(i8 %val) { ; CHECK-LABEL: @test_i8_nopattern( -; CHECK-NEXT: [[INSVEC:%.*]] = insertelement <4 x i8> poison, i8 [[VAL:%.*]], i32 0 +; CHECK-NEXT: [[INSVEC:%.*]] = insertelement <4 x i8> poison, i8 [[VAL:%.*]], i64 0 ; CHECK-NEXT: [[VEC:%.*]] = shufflevector <4 x i8> [[INSVEC]], <4 x i8> poison, <4 x i32> zeroinitializer ; CHECK-NEXT: [[CAST:%.*]] = bitcast <4 x i8> [[VEC]] to i32 ; CHECK-NEXT: [[COND:%.*]] = icmp eq i32 [[CAST]], 1212696647 @@ -116,7 +116,7 @@ define i1 @extending_shuffle_with_weird_types(<2 x i9> %v) { ; CHECK-LABEL: @extending_shuffle_with_weird_types( -; CHECK-NEXT: [[TMP1:%.*]] = extractelement <2 x i9> [[V:%.*]], i32 0 +; CHECK-NEXT: [[TMP1:%.*]] = extractelement <2 x i9> [[V:%.*]], i64 0 ; CHECK-NEXT: [[CMP:%.*]] = icmp slt i9 [[TMP1]], 1 ; CHECK-NEXT: ret i1 [[CMP]] ; diff --git a/llvm/test/Transforms/InstCombine/icmp-bc-vec.ll b/llvm/test/Transforms/InstCombine/icmp-bc-vec.ll --- a/llvm/test/Transforms/InstCombine/icmp-bc-vec.ll +++ b/llvm/test/Transforms/InstCombine/icmp-bc-vec.ll @@ -88,7 +88,7 @@ ; Make sure we don't try to fold if the compared-to constant isn't a splatted value define i1 @test_i8_nopattern(i8 %val) { ; CHECK-LABEL: @test_i8_nopattern( -; CHECK-NEXT: [[INSVEC:%.*]] = insertelement <4 x i8> undef, i8 [[VAL:%.*]], i32 0 +; CHECK-NEXT: [[INSVEC:%.*]] = insertelement <4 x i8> undef, i8 [[VAL:%.*]], i64 0 ; CHECK-NEXT: [[VEC:%.*]] = shufflevector <4 x i8> [[INSVEC]], <4 x i8> undef, <4 x i32> zeroinitializer ; CHECK-NEXT: [[CAST:%.*]] = bitcast <4 x i8> [[VEC]] to i32 ; CHECK-NEXT: [[COND:%.*]] = icmp eq i32 [[CAST]], 1212696647 @@ -116,7 +116,7 @@ define i1 @extending_shuffle_with_weird_types(<2 x i9> %v) { ; CHECK-LABEL: @extending_shuffle_with_weird_types( -; CHECK-NEXT: [[TMP1:%.*]] = extractelement <2 x i9> [[V:%.*]], i32 0 +; CHECK-NEXT: [[TMP1:%.*]] = extractelement <2 x i9> [[V:%.*]], i64 0 ; CHECK-NEXT: [[CMP:%.*]] = icmp slt i9 [[TMP1]], 1 ; CHECK-NEXT: ret i1 [[CMP]] ; diff --git a/llvm/test/Transforms/InstCombine/inselt-binop-inseltpoison.ll b/llvm/test/Transforms/InstCombine/inselt-binop-inseltpoison.ll --- a/llvm/test/Transforms/InstCombine/inselt-binop-inseltpoison.ll +++ b/llvm/test/Transforms/InstCombine/inselt-binop-inseltpoison.ll @@ -3,7 +3,7 @@ define <2 x i8> @add_constant(i8 %x) { ; CHECK-LABEL: @add_constant( -; CHECK-NEXT: [[INS:%.*]] = insertelement <2 x i8> poison, i8 [[X:%.*]], i32 0 +; CHECK-NEXT: [[INS:%.*]] = insertelement <2 x i8> poison, i8 [[X:%.*]], i64 0 ; CHECK-NEXT: [[BO:%.*]] = add <2 x i8> [[INS]], ; CHECK-NEXT: ret <2 x i8> [[BO]] ; @@ -14,7 +14,7 @@ define <2 x i8> @add_constant_not_undef_lane(i8 %x) { ; CHECK-LABEL: @add_constant_not_undef_lane( -; CHECK-NEXT: [[INS:%.*]] = insertelement <2 x i8> poison, i8 [[X:%.*]], i32 0 +; CHECK-NEXT: [[INS:%.*]] = insertelement <2 x i8> poison, i8 [[X:%.*]], i64 0 ; CHECK-NEXT: [[BO:%.*]] = add <2 x i8> [[INS]], ; CHECK-NEXT: ret <2 x i8> [[BO]] ; @@ -27,7 +27,7 @@ define <2 x i8> @sub_constant_op0(i8 %x) { ; CHECK-LABEL: @sub_constant_op0( -; CHECK-NEXT: [[INS:%.*]] = insertelement <2 x i8> poison, i8 [[X:%.*]], i32 1 +; CHECK-NEXT: [[INS:%.*]] = insertelement <2 x i8> poison, i8 [[X:%.*]], i64 1 ; CHECK-NEXT: [[BO:%.*]] = sub nuw nsw <2 x i8> , [[INS]] ; CHECK-NEXT: ret <2 x i8> [[BO]] ; @@ -38,7 +38,7 @@ define <2 x i8> @sub_constant_op0_not_undef_lane(i8 %x) { ; CHECK-LABEL: @sub_constant_op0_not_undef_lane( -; CHECK-NEXT: [[INS:%.*]] = insertelement <2 x i8> poison, i8 [[X:%.*]], i32 1 +; CHECK-NEXT: [[INS:%.*]] = insertelement <2 x i8> poison, i8 [[X:%.*]], i64 1 ; CHECK-NEXT: [[BO:%.*]] = sub nuw <2 x i8> , [[INS]] ; CHECK-NEXT: ret <2 x i8> [[BO]] ; @@ -49,7 +49,7 @@ define <2 x i8> @sub_constant_op1(i8 %x) { ; CHECK-LABEL: @sub_constant_op1( -; CHECK-NEXT: [[INS:%.*]] = insertelement <2 x i8> poison, i8 [[X:%.*]], i32 0 +; CHECK-NEXT: [[INS:%.*]] = insertelement <2 x i8> poison, i8 [[X:%.*]], i64 0 ; CHECK-NEXT: [[BO:%.*]] = add <2 x i8> [[INS]], ; CHECK-NEXT: ret <2 x i8> [[BO]] ; @@ -60,7 +60,7 @@ define <2 x i8> @sub_constant_op1_not_undef_lane(i8 %x) { ; CHECK-LABEL: @sub_constant_op1_not_undef_lane( -; CHECK-NEXT: [[INS:%.*]] = insertelement <2 x i8> poison, i8 [[X:%.*]], i32 0 +; CHECK-NEXT: [[INS:%.*]] = insertelement <2 x i8> poison, i8 [[X:%.*]], i64 0 ; CHECK-NEXT: [[BO:%.*]] = add <2 x i8> [[INS]], ; CHECK-NEXT: ret <2 x i8> [[BO]] ; @@ -71,7 +71,7 @@ define <3 x i8> @mul_constant(i8 %x) { ; CHECK-LABEL: @mul_constant( -; CHECK-NEXT: [[INS:%.*]] = insertelement <3 x i8> poison, i8 [[X:%.*]], i32 2 +; CHECK-NEXT: [[INS:%.*]] = insertelement <3 x i8> poison, i8 [[X:%.*]], i64 2 ; CHECK-NEXT: [[BO:%.*]] = mul <3 x i8> [[INS]], ; CHECK-NEXT: ret <3 x i8> [[BO]] ; @@ -82,7 +82,7 @@ define <3 x i8> @mul_constant_not_undef_lane(i8 %x) { ; CHECK-LABEL: @mul_constant_not_undef_lane( -; CHECK-NEXT: [[INS:%.*]] = insertelement <3 x i8> poison, i8 [[X:%.*]], i32 2 +; CHECK-NEXT: [[INS:%.*]] = insertelement <3 x i8> poison, i8 [[X:%.*]], i64 2 ; CHECK-NEXT: [[BO:%.*]] = mul <3 x i8> [[INS]], ; CHECK-NEXT: ret <3 x i8> [[BO]] ; @@ -93,7 +93,7 @@ define <2 x i8> @shl_constant_op0(i8 %x) { ; CHECK-LABEL: @shl_constant_op0( -; CHECK-NEXT: [[INS:%.*]] = insertelement <2 x i8> poison, i8 [[X:%.*]], i32 1 +; CHECK-NEXT: [[INS:%.*]] = insertelement <2 x i8> poison, i8 [[X:%.*]], i64 1 ; CHECK-NEXT: [[BO:%.*]] = shl <2 x i8> , [[INS]] ; CHECK-NEXT: ret <2 x i8> [[BO]] ; @@ -104,7 +104,7 @@ define <2 x i8> @shl_constant_op0_not_undef_lane(i8 %x) { ; CHECK-LABEL: @shl_constant_op0_not_undef_lane( -; CHECK-NEXT: [[INS:%.*]] = insertelement <2 x i8> poison, i8 [[X:%.*]], i32 1 +; CHECK-NEXT: [[INS:%.*]] = insertelement <2 x i8> poison, i8 [[X:%.*]], i64 1 ; CHECK-NEXT: [[BO:%.*]] = shl <2 x i8> , [[INS]] ; CHECK-NEXT: ret <2 x i8> [[BO]] ; @@ -115,7 +115,7 @@ define <2 x i8> @shl_constant_op1(i8 %x) { ; CHECK-LABEL: @shl_constant_op1( -; CHECK-NEXT: [[INS:%.*]] = insertelement <2 x i8> poison, i8 [[X:%.*]], i32 0 +; CHECK-NEXT: [[INS:%.*]] = insertelement <2 x i8> poison, i8 [[X:%.*]], i64 0 ; CHECK-NEXT: [[BO:%.*]] = shl nuw <2 x i8> [[INS]], ; CHECK-NEXT: ret <2 x i8> [[BO]] ; @@ -126,7 +126,7 @@ define <2 x i8> @shl_constant_op1_not_undef_lane(i8 %x) { ; CHECK-LABEL: @shl_constant_op1_not_undef_lane( -; CHECK-NEXT: [[INS:%.*]] = insertelement <2 x i8> poison, i8 [[X:%.*]], i32 0 +; CHECK-NEXT: [[INS:%.*]] = insertelement <2 x i8> poison, i8 [[X:%.*]], i64 0 ; CHECK-NEXT: [[BO:%.*]] = shl nuw <2 x i8> [[INS]], ; CHECK-NEXT: ret <2 x i8> [[BO]] ; @@ -137,7 +137,7 @@ define <2 x i8> @ashr_constant_op0(i8 %x) { ; CHECK-LABEL: @ashr_constant_op0( -; CHECK-NEXT: [[INS:%.*]] = insertelement <2 x i8> poison, i8 [[X:%.*]], i32 1 +; CHECK-NEXT: [[INS:%.*]] = insertelement <2 x i8> poison, i8 [[X:%.*]], i64 1 ; CHECK-NEXT: [[BO:%.*]] = ashr exact <2 x i8> , [[INS]] ; CHECK-NEXT: ret <2 x i8> [[BO]] ; @@ -148,7 +148,7 @@ define <2 x i8> @ashr_constant_op0_not_undef_lane(i8 %x) { ; CHECK-LABEL: @ashr_constant_op0_not_undef_lane( -; CHECK-NEXT: [[INS:%.*]] = insertelement <2 x i8> poison, i8 [[X:%.*]], i32 1 +; CHECK-NEXT: [[INS:%.*]] = insertelement <2 x i8> poison, i8 [[X:%.*]], i64 1 ; CHECK-NEXT: [[BO:%.*]] = lshr <2 x i8> , [[INS]] ; CHECK-NEXT: ret <2 x i8> [[BO]] ; @@ -159,7 +159,7 @@ define <2 x i8> @ashr_constant_op1(i8 %x) { ; CHECK-LABEL: @ashr_constant_op1( -; CHECK-NEXT: [[INS:%.*]] = insertelement <2 x i8> poison, i8 [[X:%.*]], i32 0 +; CHECK-NEXT: [[INS:%.*]] = insertelement <2 x i8> poison, i8 [[X:%.*]], i64 0 ; CHECK-NEXT: [[BO:%.*]] = ashr <2 x i8> [[INS]], ; CHECK-NEXT: ret <2 x i8> [[BO]] ; @@ -170,7 +170,7 @@ define <2 x i8> @ashr_constant_op1_not_undef_lane(i8 %x) { ; CHECK-LABEL: @ashr_constant_op1_not_undef_lane( -; CHECK-NEXT: [[INS:%.*]] = insertelement <2 x i8> poison, i8 [[X:%.*]], i32 0 +; CHECK-NEXT: [[INS:%.*]] = insertelement <2 x i8> poison, i8 [[X:%.*]], i64 0 ; CHECK-NEXT: [[BO:%.*]] = ashr <2 x i8> [[INS]], ; CHECK-NEXT: ret <2 x i8> [[BO]] ; @@ -181,7 +181,7 @@ define <2 x i8> @lshr_constant_op0(i8 %x) { ; CHECK-LABEL: @lshr_constant_op0( -; CHECK-NEXT: [[INS:%.*]] = insertelement <2 x i8> poison, i8 [[X:%.*]], i32 0 +; CHECK-NEXT: [[INS:%.*]] = insertelement <2 x i8> poison, i8 [[X:%.*]], i64 0 ; CHECK-NEXT: [[BO:%.*]] = lshr <2 x i8> , [[INS]] ; CHECK-NEXT: ret <2 x i8> [[BO]] ; @@ -192,7 +192,7 @@ define <2 x i8> @lshr_constant_op0_not_undef_lane(i8 %x) { ; CHECK-LABEL: @lshr_constant_op0_not_undef_lane( -; CHECK-NEXT: [[INS:%.*]] = insertelement <2 x i8> poison, i8 [[X:%.*]], i32 0 +; CHECK-NEXT: [[INS:%.*]] = insertelement <2 x i8> poison, i8 [[X:%.*]], i64 0 ; CHECK-NEXT: [[BO:%.*]] = lshr <2 x i8> , [[INS]] ; CHECK-NEXT: ret <2 x i8> [[BO]] ; @@ -203,7 +203,7 @@ define <2 x i8> @lshr_constant_op1(i8 %x) { ; CHECK-LABEL: @lshr_constant_op1( -; CHECK-NEXT: [[INS:%.*]] = insertelement <2 x i8> poison, i8 [[X:%.*]], i32 1 +; CHECK-NEXT: [[INS:%.*]] = insertelement <2 x i8> poison, i8 [[X:%.*]], i64 1 ; CHECK-NEXT: [[BO:%.*]] = lshr exact <2 x i8> [[INS]], ; CHECK-NEXT: ret <2 x i8> [[BO]] ; @@ -214,7 +214,7 @@ define <2 x i8> @lshr_constant_op1_not_undef_lane(i8 %x) { ; CHECK-LABEL: @lshr_constant_op1_not_undef_lane( -; CHECK-NEXT: [[INS:%.*]] = insertelement <2 x i8> poison, i8 [[X:%.*]], i32 1 +; CHECK-NEXT: [[INS:%.*]] = insertelement <2 x i8> poison, i8 [[X:%.*]], i64 1 ; CHECK-NEXT: [[BO:%.*]] = lshr exact <2 x i8> [[INS]], ; CHECK-NEXT: ret <2 x i8> [[BO]] ; @@ -225,7 +225,7 @@ define <2 x i8> @urem_constant_op0(i8 %x) { ; CHECK-LABEL: @urem_constant_op0( -; CHECK-NEXT: [[INS:%.*]] = insertelement <2 x i8> poison, i8 [[X:%.*]], i32 0 +; CHECK-NEXT: [[INS:%.*]] = insertelement <2 x i8> poison, i8 [[X:%.*]], i64 0 ; CHECK-NEXT: [[BO:%.*]] = urem <2 x i8> , [[INS]] ; CHECK-NEXT: ret <2 x i8> [[BO]] ; @@ -236,7 +236,7 @@ define <2 x i8> @urem_constant_op0_not_undef_lane(i8 %x) { ; CHECK-LABEL: @urem_constant_op0_not_undef_lane( -; CHECK-NEXT: [[INS:%.*]] = insertelement <2 x i8> poison, i8 [[X:%.*]], i32 0 +; CHECK-NEXT: [[INS:%.*]] = insertelement <2 x i8> poison, i8 [[X:%.*]], i64 0 ; CHECK-NEXT: [[BO:%.*]] = urem <2 x i8> , [[INS]] ; CHECK-NEXT: ret <2 x i8> [[BO]] ; @@ -256,7 +256,7 @@ define <2 x i8> @urem_constant_op1_not_undef_lane(i8 %x) { ; CHECK-LABEL: @urem_constant_op1_not_undef_lane( -; CHECK-NEXT: [[INS:%.*]] = insertelement <2 x i8> poison, i8 [[X:%.*]], i32 1 +; CHECK-NEXT: [[INS:%.*]] = insertelement <2 x i8> poison, i8 [[X:%.*]], i64 1 ; CHECK-NEXT: [[BO:%.*]] = urem <2 x i8> [[INS]], ; CHECK-NEXT: ret <2 x i8> [[BO]] ; @@ -267,7 +267,7 @@ define <2 x i8> @srem_constant_op0(i8 %x) { ; CHECK-LABEL: @srem_constant_op0( -; CHECK-NEXT: [[INS:%.*]] = insertelement <2 x i8> poison, i8 [[X:%.*]], i32 0 +; CHECK-NEXT: [[INS:%.*]] = insertelement <2 x i8> poison, i8 [[X:%.*]], i64 0 ; CHECK-NEXT: [[BO:%.*]] = srem <2 x i8> , [[INS]] ; CHECK-NEXT: ret <2 x i8> [[BO]] ; @@ -278,7 +278,7 @@ define <2 x i8> @srem_constant_op0_not_undef_lane(i8 %x) { ; CHECK-LABEL: @srem_constant_op0_not_undef_lane( -; CHECK-NEXT: [[INS:%.*]] = insertelement <2 x i8> poison, i8 [[X:%.*]], i32 0 +; CHECK-NEXT: [[INS:%.*]] = insertelement <2 x i8> poison, i8 [[X:%.*]], i64 0 ; CHECK-NEXT: [[BO:%.*]] = srem <2 x i8> , [[INS]] ; CHECK-NEXT: ret <2 x i8> [[BO]] ; @@ -298,7 +298,7 @@ define <2 x i8> @srem_constant_op1_not_undef_lane(i8 %x) { ; CHECK-LABEL: @srem_constant_op1_not_undef_lane( -; CHECK-NEXT: [[INS:%.*]] = insertelement <2 x i8> poison, i8 [[X:%.*]], i32 1 +; CHECK-NEXT: [[INS:%.*]] = insertelement <2 x i8> poison, i8 [[X:%.*]], i64 1 ; CHECK-NEXT: [[BO:%.*]] = srem <2 x i8> [[INS]], ; CHECK-NEXT: ret <2 x i8> [[BO]] ; @@ -309,7 +309,7 @@ define <2 x i8> @udiv_constant_op0(i8 %x) { ; CHECK-LABEL: @udiv_constant_op0( -; CHECK-NEXT: [[INS:%.*]] = insertelement <2 x i8> poison, i8 [[X:%.*]], i32 0 +; CHECK-NEXT: [[INS:%.*]] = insertelement <2 x i8> poison, i8 [[X:%.*]], i64 0 ; CHECK-NEXT: [[BO:%.*]] = udiv exact <2 x i8> , [[INS]] ; CHECK-NEXT: ret <2 x i8> [[BO]] ; @@ -320,7 +320,7 @@ define <2 x i8> @udiv_constant_op0_not_undef_lane(i8 %x) { ; CHECK-LABEL: @udiv_constant_op0_not_undef_lane( -; CHECK-NEXT: [[INS:%.*]] = insertelement <2 x i8> poison, i8 [[X:%.*]], i32 0 +; CHECK-NEXT: [[INS:%.*]] = insertelement <2 x i8> poison, i8 [[X:%.*]], i64 0 ; CHECK-NEXT: [[BO:%.*]] = udiv exact <2 x i8> , [[INS]] ; CHECK-NEXT: ret <2 x i8> [[BO]] ; @@ -340,7 +340,7 @@ define <2 x i8> @udiv_constant_op1_not_undef_lane(i8 %x) { ; CHECK-LABEL: @udiv_constant_op1_not_undef_lane( -; CHECK-NEXT: [[INS:%.*]] = insertelement <2 x i8> poison, i8 [[X:%.*]], i32 1 +; CHECK-NEXT: [[INS:%.*]] = insertelement <2 x i8> poison, i8 [[X:%.*]], i64 1 ; CHECK-NEXT: [[BO:%.*]] = udiv <2 x i8> [[INS]], ; CHECK-NEXT: ret <2 x i8> [[BO]] ; @@ -351,7 +351,7 @@ define <2 x i8> @sdiv_constant_op0(i8 %x) { ; CHECK-LABEL: @sdiv_constant_op0( -; CHECK-NEXT: [[INS:%.*]] = insertelement <2 x i8> poison, i8 [[X:%.*]], i32 0 +; CHECK-NEXT: [[INS:%.*]] = insertelement <2 x i8> poison, i8 [[X:%.*]], i64 0 ; CHECK-NEXT: [[BO:%.*]] = sdiv <2 x i8> , [[INS]] ; CHECK-NEXT: ret <2 x i8> [[BO]] ; @@ -362,7 +362,7 @@ define <2 x i8> @sdiv_constant_op0_not_undef_lane(i8 %x) { ; CHECK-LABEL: @sdiv_constant_op0_not_undef_lane( -; CHECK-NEXT: [[INS:%.*]] = insertelement <2 x i8> poison, i8 [[X:%.*]], i32 0 +; CHECK-NEXT: [[INS:%.*]] = insertelement <2 x i8> poison, i8 [[X:%.*]], i64 0 ; CHECK-NEXT: [[BO:%.*]] = sdiv <2 x i8> , [[INS]] ; CHECK-NEXT: ret <2 x i8> [[BO]] ; @@ -382,7 +382,7 @@ define <2 x i8> @sdiv_constant_op1_not_undef_lane(i8 %x) { ; CHECK-LABEL: @sdiv_constant_op1_not_undef_lane( -; CHECK-NEXT: [[INS:%.*]] = insertelement <2 x i8> poison, i8 [[X:%.*]], i32 1 +; CHECK-NEXT: [[INS:%.*]] = insertelement <2 x i8> poison, i8 [[X:%.*]], i64 1 ; CHECK-NEXT: [[BO:%.*]] = sdiv exact <2 x i8> [[INS]], ; CHECK-NEXT: ret <2 x i8> [[BO]] ; @@ -393,7 +393,7 @@ define <2 x i8> @and_constant(i8 %x) { ; CHECK-LABEL: @and_constant( -; CHECK-NEXT: [[INS:%.*]] = insertelement <2 x i8> poison, i8 [[X:%.*]], i32 0 +; CHECK-NEXT: [[INS:%.*]] = insertelement <2 x i8> poison, i8 [[X:%.*]], i64 0 ; CHECK-NEXT: [[BO:%.*]] = and <2 x i8> [[INS]], ; CHECK-NEXT: ret <2 x i8> [[BO]] ; @@ -404,7 +404,7 @@ define <2 x i8> @and_constant_not_undef_lane(i8 %x) { ; CHECK-LABEL: @and_constant_not_undef_lane( -; CHECK-NEXT: [[INS:%.*]] = insertelement <2 x i8> poison, i8 [[X:%.*]], i32 0 +; CHECK-NEXT: [[INS:%.*]] = insertelement <2 x i8> poison, i8 [[X:%.*]], i64 0 ; CHECK-NEXT: [[BO:%.*]] = and <2 x i8> [[INS]], ; CHECK-NEXT: ret <2 x i8> [[BO]] ; @@ -415,7 +415,7 @@ define <2 x i8> @or_constant(i8 %x) { ; CHECK-LABEL: @or_constant( -; CHECK-NEXT: [[INS:%.*]] = insertelement <2 x i8> poison, i8 [[X:%.*]], i32 1 +; CHECK-NEXT: [[INS:%.*]] = insertelement <2 x i8> poison, i8 [[X:%.*]], i64 1 ; CHECK-NEXT: [[BO:%.*]] = or <2 x i8> [[INS]], ; CHECK-NEXT: ret <2 x i8> [[BO]] ; @@ -426,7 +426,7 @@ define <2 x i8> @or_constant_not_undef_lane(i8 %x) { ; CHECK-LABEL: @or_constant_not_undef_lane( -; CHECK-NEXT: [[INS:%.*]] = insertelement <2 x i8> poison, i8 [[X:%.*]], i32 1 +; CHECK-NEXT: [[INS:%.*]] = insertelement <2 x i8> poison, i8 [[X:%.*]], i64 1 ; CHECK-NEXT: [[BO:%.*]] = or <2 x i8> [[INS]], ; CHECK-NEXT: ret <2 x i8> [[BO]] ; @@ -437,7 +437,7 @@ define <2 x i8> @xor_constant(i8 %x) { ; CHECK-LABEL: @xor_constant( -; CHECK-NEXT: [[INS:%.*]] = insertelement <2 x i8> poison, i8 [[X:%.*]], i32 0 +; CHECK-NEXT: [[INS:%.*]] = insertelement <2 x i8> poison, i8 [[X:%.*]], i64 0 ; CHECK-NEXT: [[BO:%.*]] = xor <2 x i8> [[INS]], ; CHECK-NEXT: ret <2 x i8> [[BO]] ; @@ -448,7 +448,7 @@ define <2 x i8> @xor_constant_not_undef_lane(i8 %x) { ; CHECK-LABEL: @xor_constant_not_undef_lane( -; CHECK-NEXT: [[INS:%.*]] = insertelement <2 x i8> poison, i8 [[X:%.*]], i32 0 +; CHECK-NEXT: [[INS:%.*]] = insertelement <2 x i8> poison, i8 [[X:%.*]], i64 0 ; CHECK-NEXT: [[BO:%.*]] = xor <2 x i8> [[INS]], ; CHECK-NEXT: ret <2 x i8> [[BO]] ; @@ -459,7 +459,7 @@ define <2 x float> @fadd_constant(float %x) { ; CHECK-LABEL: @fadd_constant( -; CHECK-NEXT: [[INS:%.*]] = insertelement <2 x float> poison, float [[X:%.*]], i32 0 +; CHECK-NEXT: [[INS:%.*]] = insertelement <2 x float> poison, float [[X:%.*]], i64 0 ; CHECK-NEXT: [[BO:%.*]] = fadd <2 x float> [[INS]], ; CHECK-NEXT: ret <2 x float> [[BO]] ; @@ -470,7 +470,7 @@ define <2 x float> @fadd_constant_not_undef_lane(float %x) { ; CHECK-LABEL: @fadd_constant_not_undef_lane( -; CHECK-NEXT: [[INS:%.*]] = insertelement <2 x float> poison, float [[X:%.*]], i32 1 +; CHECK-NEXT: [[INS:%.*]] = insertelement <2 x float> poison, float [[X:%.*]], i64 1 ; CHECK-NEXT: [[BO:%.*]] = fadd <2 x float> [[INS]], ; CHECK-NEXT: ret <2 x float> [[BO]] ; @@ -481,7 +481,7 @@ define <2 x float> @fsub_constant_op0(float %x) { ; CHECK-LABEL: @fsub_constant_op0( -; CHECK-NEXT: [[INS:%.*]] = insertelement <2 x float> poison, float [[X:%.*]], i32 0 +; CHECK-NEXT: [[INS:%.*]] = insertelement <2 x float> poison, float [[X:%.*]], i64 0 ; CHECK-NEXT: [[BO:%.*]] = fsub fast <2 x float> , [[INS]] ; CHECK-NEXT: ret <2 x float> [[BO]] ; @@ -492,7 +492,7 @@ define <2 x float> @fsub_constant_op0_not_undef_lane(float %x) { ; CHECK-LABEL: @fsub_constant_op0_not_undef_lane( -; CHECK-NEXT: [[INS:%.*]] = insertelement <2 x float> poison, float [[X:%.*]], i32 1 +; CHECK-NEXT: [[INS:%.*]] = insertelement <2 x float> poison, float [[X:%.*]], i64 1 ; CHECK-NEXT: [[BO:%.*]] = fsub nsz <2 x float> , [[INS]] ; CHECK-NEXT: ret <2 x float> [[BO]] ; @@ -503,7 +503,7 @@ define <2 x float> @fsub_constant_op1(float %x) { ; CHECK-LABEL: @fsub_constant_op1( -; CHECK-NEXT: [[INS:%.*]] = insertelement <2 x float> poison, float [[X:%.*]], i32 1 +; CHECK-NEXT: [[INS:%.*]] = insertelement <2 x float> poison, float [[X:%.*]], i64 1 ; CHECK-NEXT: [[BO:%.*]] = fadd <2 x float> [[INS]], ; CHECK-NEXT: ret <2 x float> [[BO]] ; @@ -514,7 +514,7 @@ define <2 x float> @fsub_constant_op1_not_undef_lane(float %x) { ; CHECK-LABEL: @fsub_constant_op1_not_undef_lane( -; CHECK-NEXT: [[INS:%.*]] = insertelement <2 x float> poison, float [[X:%.*]], i32 0 +; CHECK-NEXT: [[INS:%.*]] = insertelement <2 x float> poison, float [[X:%.*]], i64 0 ; CHECK-NEXT: [[BO:%.*]] = fadd <2 x float> [[INS]], ; CHECK-NEXT: ret <2 x float> [[BO]] ; @@ -525,7 +525,7 @@ define <2 x float> @fmul_constant(float %x) { ; CHECK-LABEL: @fmul_constant( -; CHECK-NEXT: [[INS:%.*]] = insertelement <2 x float> poison, float [[X:%.*]], i32 0 +; CHECK-NEXT: [[INS:%.*]] = insertelement <2 x float> poison, float [[X:%.*]], i64 0 ; CHECK-NEXT: [[BO:%.*]] = fmul reassoc <2 x float> [[INS]], ; CHECK-NEXT: ret <2 x float> [[BO]] ; @@ -536,7 +536,7 @@ define <2 x float> @fmul_constant_not_undef_lane(float %x) { ; CHECK-LABEL: @fmul_constant_not_undef_lane( -; CHECK-NEXT: [[INS:%.*]] = insertelement <2 x float> poison, float [[X:%.*]], i32 1 +; CHECK-NEXT: [[INS:%.*]] = insertelement <2 x float> poison, float [[X:%.*]], i64 1 ; CHECK-NEXT: [[BO:%.*]] = fmul <2 x float> [[INS]], ; CHECK-NEXT: ret <2 x float> [[BO]] ; @@ -547,7 +547,7 @@ define <2 x float> @fdiv_constant_op0(float %x) { ; CHECK-LABEL: @fdiv_constant_op0( -; CHECK-NEXT: [[INS:%.*]] = insertelement <2 x float> poison, float [[X:%.*]], i32 1 +; CHECK-NEXT: [[INS:%.*]] = insertelement <2 x float> poison, float [[X:%.*]], i64 1 ; CHECK-NEXT: [[BO:%.*]] = fdiv nnan <2 x float> , [[INS]] ; CHECK-NEXT: ret <2 x float> [[BO]] ; @@ -558,7 +558,7 @@ define <2 x float> @fdiv_constant_op0_not_undef_lane(float %x) { ; CHECK-LABEL: @fdiv_constant_op0_not_undef_lane( -; CHECK-NEXT: [[INS:%.*]] = insertelement <2 x float> poison, float [[X:%.*]], i32 0 +; CHECK-NEXT: [[INS:%.*]] = insertelement <2 x float> poison, float [[X:%.*]], i64 0 ; CHECK-NEXT: [[BO:%.*]] = fdiv ninf <2 x float> , [[INS]] ; CHECK-NEXT: ret <2 x float> [[BO]] ; @@ -569,7 +569,7 @@ define <2 x float> @fdiv_constant_op1(float %x) { ; CHECK-LABEL: @fdiv_constant_op1( -; CHECK-NEXT: [[INS:%.*]] = insertelement <2 x float> poison, float [[X:%.*]], i32 0 +; CHECK-NEXT: [[INS:%.*]] = insertelement <2 x float> poison, float [[X:%.*]], i64 0 ; CHECK-NEXT: [[BO:%.*]] = fdiv <2 x float> [[INS]], ; CHECK-NEXT: ret <2 x float> [[BO]] ; @@ -580,7 +580,7 @@ define <2 x float> @fdiv_constant_op1_not_undef_lane(float %x) { ; CHECK-LABEL: @fdiv_constant_op1_not_undef_lane( -; CHECK-NEXT: [[INS:%.*]] = insertelement <2 x float> poison, float [[X:%.*]], i32 0 +; CHECK-NEXT: [[INS:%.*]] = insertelement <2 x float> poison, float [[X:%.*]], i64 0 ; CHECK-NEXT: [[BO:%.*]] = fdiv <2 x float> [[INS]], ; CHECK-NEXT: ret <2 x float> [[BO]] ; @@ -591,7 +591,7 @@ define <2 x float> @frem_constant_op0(float %x) { ; CHECK-LABEL: @frem_constant_op0( -; CHECK-NEXT: [[INS:%.*]] = insertelement <2 x float> poison, float [[X:%.*]], i32 0 +; CHECK-NEXT: [[INS:%.*]] = insertelement <2 x float> poison, float [[X:%.*]], i64 0 ; CHECK-NEXT: [[BO:%.*]] = frem fast <2 x float> , [[INS]] ; CHECK-NEXT: ret <2 x float> [[BO]] ; @@ -602,7 +602,7 @@ define <2 x float> @frem_constant_op0_not_undef_lane(float %x) { ; CHECK-LABEL: @frem_constant_op0_not_undef_lane( -; CHECK-NEXT: [[INS:%.*]] = insertelement <2 x float> poison, float [[X:%.*]], i32 1 +; CHECK-NEXT: [[INS:%.*]] = insertelement <2 x float> poison, float [[X:%.*]], i64 1 ; CHECK-NEXT: [[BO:%.*]] = frem <2 x float> , [[INS]] ; CHECK-NEXT: ret <2 x float> [[BO]] ; @@ -613,7 +613,7 @@ define <2 x float> @frem_constant_op1(float %x) { ; CHECK-LABEL: @frem_constant_op1( -; CHECK-NEXT: [[INS:%.*]] = insertelement <2 x float> poison, float [[X:%.*]], i32 1 +; CHECK-NEXT: [[INS:%.*]] = insertelement <2 x float> poison, float [[X:%.*]], i64 1 ; CHECK-NEXT: [[BO:%.*]] = frem ninf <2 x float> [[INS]], ; CHECK-NEXT: ret <2 x float> [[BO]] ; @@ -624,7 +624,7 @@ define <2 x float> @frem_constant_op1_not_undef_lane(float %x) { ; CHECK-LABEL: @frem_constant_op1_not_undef_lane( -; CHECK-NEXT: [[INS:%.*]] = insertelement <2 x float> poison, float [[X:%.*]], i32 0 +; CHECK-NEXT: [[INS:%.*]] = insertelement <2 x float> poison, float [[X:%.*]], i64 0 ; CHECK-NEXT: [[BO:%.*]] = frem nnan <2 x float> [[INS]], ; CHECK-NEXT: ret <2 x float> [[BO]] ; diff --git a/llvm/test/Transforms/InstCombine/inselt-binop.ll b/llvm/test/Transforms/InstCombine/inselt-binop.ll --- a/llvm/test/Transforms/InstCombine/inselt-binop.ll +++ b/llvm/test/Transforms/InstCombine/inselt-binop.ll @@ -3,7 +3,7 @@ define <2 x i8> @add_constant(i8 %x) { ; CHECK-LABEL: @add_constant( -; CHECK-NEXT: [[INS:%.*]] = insertelement <2 x i8> undef, i8 [[X:%.*]], i32 0 +; CHECK-NEXT: [[INS:%.*]] = insertelement <2 x i8> undef, i8 [[X:%.*]], i64 0 ; CHECK-NEXT: [[BO:%.*]] = add <2 x i8> [[INS]], ; CHECK-NEXT: ret <2 x i8> [[BO]] ; @@ -14,7 +14,7 @@ define <2 x i8> @add_constant_not_undef_lane(i8 %x) { ; CHECK-LABEL: @add_constant_not_undef_lane( -; CHECK-NEXT: [[INS:%.*]] = insertelement <2 x i8> undef, i8 [[X:%.*]], i32 0 +; CHECK-NEXT: [[INS:%.*]] = insertelement <2 x i8> undef, i8 [[X:%.*]], i64 0 ; CHECK-NEXT: [[BO:%.*]] = add <2 x i8> [[INS]], ; CHECK-NEXT: ret <2 x i8> [[BO]] ; @@ -27,7 +27,7 @@ define <2 x i8> @sub_constant_op0(i8 %x) { ; CHECK-LABEL: @sub_constant_op0( -; CHECK-NEXT: [[INS:%.*]] = insertelement <2 x i8> undef, i8 [[X:%.*]], i32 1 +; CHECK-NEXT: [[INS:%.*]] = insertelement <2 x i8> undef, i8 [[X:%.*]], i64 1 ; CHECK-NEXT: [[BO:%.*]] = sub nuw nsw <2 x i8> , [[INS]] ; CHECK-NEXT: ret <2 x i8> [[BO]] ; @@ -38,7 +38,7 @@ define <2 x i8> @sub_constant_op0_not_undef_lane(i8 %x) { ; CHECK-LABEL: @sub_constant_op0_not_undef_lane( -; CHECK-NEXT: [[INS:%.*]] = insertelement <2 x i8> undef, i8 [[X:%.*]], i32 1 +; CHECK-NEXT: [[INS:%.*]] = insertelement <2 x i8> undef, i8 [[X:%.*]], i64 1 ; CHECK-NEXT: [[BO:%.*]] = sub nuw <2 x i8> , [[INS]] ; CHECK-NEXT: ret <2 x i8> [[BO]] ; @@ -49,7 +49,7 @@ define <2 x i8> @sub_constant_op1(i8 %x) { ; CHECK-LABEL: @sub_constant_op1( -; CHECK-NEXT: [[INS:%.*]] = insertelement <2 x i8> undef, i8 [[X:%.*]], i32 0 +; CHECK-NEXT: [[INS:%.*]] = insertelement <2 x i8> undef, i8 [[X:%.*]], i64 0 ; CHECK-NEXT: [[BO:%.*]] = add <2 x i8> [[INS]], ; CHECK-NEXT: ret <2 x i8> [[BO]] ; @@ -60,7 +60,7 @@ define <2 x i8> @sub_constant_op1_not_undef_lane(i8 %x) { ; CHECK-LABEL: @sub_constant_op1_not_undef_lane( -; CHECK-NEXT: [[INS:%.*]] = insertelement <2 x i8> undef, i8 [[X:%.*]], i32 0 +; CHECK-NEXT: [[INS:%.*]] = insertelement <2 x i8> undef, i8 [[X:%.*]], i64 0 ; CHECK-NEXT: [[BO:%.*]] = add <2 x i8> [[INS]], ; CHECK-NEXT: ret <2 x i8> [[BO]] ; @@ -71,7 +71,7 @@ define <3 x i8> @mul_constant(i8 %x) { ; CHECK-LABEL: @mul_constant( -; CHECK-NEXT: [[INS:%.*]] = insertelement <3 x i8> undef, i8 [[X:%.*]], i32 2 +; CHECK-NEXT: [[INS:%.*]] = insertelement <3 x i8> undef, i8 [[X:%.*]], i64 2 ; CHECK-NEXT: [[BO:%.*]] = mul <3 x i8> [[INS]], ; CHECK-NEXT: ret <3 x i8> [[BO]] ; @@ -82,7 +82,7 @@ define <3 x i8> @mul_constant_not_undef_lane(i8 %x) { ; CHECK-LABEL: @mul_constant_not_undef_lane( -; CHECK-NEXT: [[INS:%.*]] = insertelement <3 x i8> undef, i8 [[X:%.*]], i32 2 +; CHECK-NEXT: [[INS:%.*]] = insertelement <3 x i8> undef, i8 [[X:%.*]], i64 2 ; CHECK-NEXT: [[BO:%.*]] = mul <3 x i8> [[INS]], ; CHECK-NEXT: ret <3 x i8> [[BO]] ; @@ -93,7 +93,7 @@ define <2 x i8> @shl_constant_op0(i8 %x) { ; CHECK-LABEL: @shl_constant_op0( -; CHECK-NEXT: [[INS:%.*]] = insertelement <2 x i8> undef, i8 [[X:%.*]], i32 1 +; CHECK-NEXT: [[INS:%.*]] = insertelement <2 x i8> undef, i8 [[X:%.*]], i64 1 ; CHECK-NEXT: [[BO:%.*]] = shl <2 x i8> , [[INS]] ; CHECK-NEXT: ret <2 x i8> [[BO]] ; @@ -104,7 +104,7 @@ define <2 x i8> @shl_constant_op0_not_undef_lane(i8 %x) { ; CHECK-LABEL: @shl_constant_op0_not_undef_lane( -; CHECK-NEXT: [[INS:%.*]] = insertelement <2 x i8> undef, i8 [[X:%.*]], i32 1 +; CHECK-NEXT: [[INS:%.*]] = insertelement <2 x i8> undef, i8 [[X:%.*]], i64 1 ; CHECK-NEXT: [[BO:%.*]] = shl <2 x i8> , [[INS]] ; CHECK-NEXT: ret <2 x i8> [[BO]] ; @@ -115,7 +115,7 @@ define <2 x i8> @shl_constant_op1(i8 %x) { ; CHECK-LABEL: @shl_constant_op1( -; CHECK-NEXT: [[INS:%.*]] = insertelement <2 x i8> undef, i8 [[X:%.*]], i32 0 +; CHECK-NEXT: [[INS:%.*]] = insertelement <2 x i8> undef, i8 [[X:%.*]], i64 0 ; CHECK-NEXT: [[BO:%.*]] = shl nuw <2 x i8> [[INS]], ; CHECK-NEXT: ret <2 x i8> [[BO]] ; @@ -126,7 +126,7 @@ define <2 x i8> @shl_constant_op1_not_undef_lane(i8 %x) { ; CHECK-LABEL: @shl_constant_op1_not_undef_lane( -; CHECK-NEXT: [[INS:%.*]] = insertelement <2 x i8> undef, i8 [[X:%.*]], i32 0 +; CHECK-NEXT: [[INS:%.*]] = insertelement <2 x i8> undef, i8 [[X:%.*]], i64 0 ; CHECK-NEXT: [[BO:%.*]] = shl nuw <2 x i8> [[INS]], ; CHECK-NEXT: ret <2 x i8> [[BO]] ; @@ -137,7 +137,7 @@ define <2 x i8> @ashr_constant_op0(i8 %x) { ; CHECK-LABEL: @ashr_constant_op0( -; CHECK-NEXT: [[INS:%.*]] = insertelement <2 x i8> undef, i8 [[X:%.*]], i32 1 +; CHECK-NEXT: [[INS:%.*]] = insertelement <2 x i8> undef, i8 [[X:%.*]], i64 1 ; CHECK-NEXT: [[BO:%.*]] = ashr exact <2 x i8> , [[INS]] ; CHECK-NEXT: ret <2 x i8> [[BO]] ; @@ -148,7 +148,7 @@ define <2 x i8> @ashr_constant_op0_not_undef_lane(i8 %x) { ; CHECK-LABEL: @ashr_constant_op0_not_undef_lane( -; CHECK-NEXT: [[INS:%.*]] = insertelement <2 x i8> undef, i8 [[X:%.*]], i32 1 +; CHECK-NEXT: [[INS:%.*]] = insertelement <2 x i8> undef, i8 [[X:%.*]], i64 1 ; CHECK-NEXT: [[BO:%.*]] = lshr <2 x i8> , [[INS]] ; CHECK-NEXT: ret <2 x i8> [[BO]] ; @@ -159,7 +159,7 @@ define <2 x i8> @ashr_constant_op1(i8 %x) { ; CHECK-LABEL: @ashr_constant_op1( -; CHECK-NEXT: [[INS:%.*]] = insertelement <2 x i8> undef, i8 [[X:%.*]], i32 0 +; CHECK-NEXT: [[INS:%.*]] = insertelement <2 x i8> undef, i8 [[X:%.*]], i64 0 ; CHECK-NEXT: [[BO:%.*]] = ashr <2 x i8> [[INS]], ; CHECK-NEXT: ret <2 x i8> [[BO]] ; @@ -170,7 +170,7 @@ define <2 x i8> @ashr_constant_op1_not_undef_lane(i8 %x) { ; CHECK-LABEL: @ashr_constant_op1_not_undef_lane( -; CHECK-NEXT: [[INS:%.*]] = insertelement <2 x i8> undef, i8 [[X:%.*]], i32 0 +; CHECK-NEXT: [[INS:%.*]] = insertelement <2 x i8> undef, i8 [[X:%.*]], i64 0 ; CHECK-NEXT: [[BO:%.*]] = ashr <2 x i8> [[INS]], ; CHECK-NEXT: ret <2 x i8> [[BO]] ; @@ -181,7 +181,7 @@ define <2 x i8> @lshr_constant_op0(i8 %x) { ; CHECK-LABEL: @lshr_constant_op0( -; CHECK-NEXT: [[INS:%.*]] = insertelement <2 x i8> undef, i8 [[X:%.*]], i32 0 +; CHECK-NEXT: [[INS:%.*]] = insertelement <2 x i8> undef, i8 [[X:%.*]], i64 0 ; CHECK-NEXT: [[BO:%.*]] = lshr <2 x i8> , [[INS]] ; CHECK-NEXT: ret <2 x i8> [[BO]] ; @@ -192,7 +192,7 @@ define <2 x i8> @lshr_constant_op0_not_undef_lane(i8 %x) { ; CHECK-LABEL: @lshr_constant_op0_not_undef_lane( -; CHECK-NEXT: [[INS:%.*]] = insertelement <2 x i8> undef, i8 [[X:%.*]], i32 0 +; CHECK-NEXT: [[INS:%.*]] = insertelement <2 x i8> undef, i8 [[X:%.*]], i64 0 ; CHECK-NEXT: [[BO:%.*]] = lshr <2 x i8> , [[INS]] ; CHECK-NEXT: ret <2 x i8> [[BO]] ; @@ -203,7 +203,7 @@ define <2 x i8> @lshr_constant_op1(i8 %x) { ; CHECK-LABEL: @lshr_constant_op1( -; CHECK-NEXT: [[INS:%.*]] = insertelement <2 x i8> undef, i8 [[X:%.*]], i32 1 +; CHECK-NEXT: [[INS:%.*]] = insertelement <2 x i8> undef, i8 [[X:%.*]], i64 1 ; CHECK-NEXT: [[BO:%.*]] = lshr exact <2 x i8> [[INS]], ; CHECK-NEXT: ret <2 x i8> [[BO]] ; @@ -214,7 +214,7 @@ define <2 x i8> @lshr_constant_op1_not_undef_lane(i8 %x) { ; CHECK-LABEL: @lshr_constant_op1_not_undef_lane( -; CHECK-NEXT: [[INS:%.*]] = insertelement <2 x i8> undef, i8 [[X:%.*]], i32 1 +; CHECK-NEXT: [[INS:%.*]] = insertelement <2 x i8> undef, i8 [[X:%.*]], i64 1 ; CHECK-NEXT: [[BO:%.*]] = lshr exact <2 x i8> [[INS]], ; CHECK-NEXT: ret <2 x i8> [[BO]] ; @@ -225,7 +225,7 @@ define <2 x i8> @urem_constant_op0(i8 %x) { ; CHECK-LABEL: @urem_constant_op0( -; CHECK-NEXT: [[INS:%.*]] = insertelement <2 x i8> undef, i8 [[X:%.*]], i32 0 +; CHECK-NEXT: [[INS:%.*]] = insertelement <2 x i8> undef, i8 [[X:%.*]], i64 0 ; CHECK-NEXT: [[BO:%.*]] = urem <2 x i8> , [[INS]] ; CHECK-NEXT: ret <2 x i8> [[BO]] ; @@ -236,7 +236,7 @@ define <2 x i8> @urem_constant_op0_not_undef_lane(i8 %x) { ; CHECK-LABEL: @urem_constant_op0_not_undef_lane( -; CHECK-NEXT: [[INS:%.*]] = insertelement <2 x i8> undef, i8 [[X:%.*]], i32 0 +; CHECK-NEXT: [[INS:%.*]] = insertelement <2 x i8> undef, i8 [[X:%.*]], i64 0 ; CHECK-NEXT: [[BO:%.*]] = urem <2 x i8> , [[INS]] ; CHECK-NEXT: ret <2 x i8> [[BO]] ; @@ -256,7 +256,7 @@ define <2 x i8> @urem_constant_op1_not_undef_lane(i8 %x) { ; CHECK-LABEL: @urem_constant_op1_not_undef_lane( -; CHECK-NEXT: [[INS:%.*]] = insertelement <2 x i8> undef, i8 [[X:%.*]], i32 1 +; CHECK-NEXT: [[INS:%.*]] = insertelement <2 x i8> undef, i8 [[X:%.*]], i64 1 ; CHECK-NEXT: [[BO:%.*]] = urem <2 x i8> [[INS]], ; CHECK-NEXT: ret <2 x i8> [[BO]] ; @@ -267,7 +267,7 @@ define <2 x i8> @srem_constant_op0(i8 %x) { ; CHECK-LABEL: @srem_constant_op0( -; CHECK-NEXT: [[INS:%.*]] = insertelement <2 x i8> undef, i8 [[X:%.*]], i32 0 +; CHECK-NEXT: [[INS:%.*]] = insertelement <2 x i8> undef, i8 [[X:%.*]], i64 0 ; CHECK-NEXT: [[BO:%.*]] = srem <2 x i8> , [[INS]] ; CHECK-NEXT: ret <2 x i8> [[BO]] ; @@ -278,7 +278,7 @@ define <2 x i8> @srem_constant_op0_not_undef_lane(i8 %x) { ; CHECK-LABEL: @srem_constant_op0_not_undef_lane( -; CHECK-NEXT: [[INS:%.*]] = insertelement <2 x i8> undef, i8 [[X:%.*]], i32 0 +; CHECK-NEXT: [[INS:%.*]] = insertelement <2 x i8> undef, i8 [[X:%.*]], i64 0 ; CHECK-NEXT: [[BO:%.*]] = srem <2 x i8> , [[INS]] ; CHECK-NEXT: ret <2 x i8> [[BO]] ; @@ -298,7 +298,7 @@ define <2 x i8> @srem_constant_op1_not_undef_lane(i8 %x) { ; CHECK-LABEL: @srem_constant_op1_not_undef_lane( -; CHECK-NEXT: [[INS:%.*]] = insertelement <2 x i8> undef, i8 [[X:%.*]], i32 1 +; CHECK-NEXT: [[INS:%.*]] = insertelement <2 x i8> undef, i8 [[X:%.*]], i64 1 ; CHECK-NEXT: [[BO:%.*]] = srem <2 x i8> [[INS]], ; CHECK-NEXT: ret <2 x i8> [[BO]] ; @@ -309,7 +309,7 @@ define <2 x i8> @udiv_constant_op0(i8 %x) { ; CHECK-LABEL: @udiv_constant_op0( -; CHECK-NEXT: [[INS:%.*]] = insertelement <2 x i8> undef, i8 [[X:%.*]], i32 0 +; CHECK-NEXT: [[INS:%.*]] = insertelement <2 x i8> undef, i8 [[X:%.*]], i64 0 ; CHECK-NEXT: [[BO:%.*]] = udiv exact <2 x i8> , [[INS]] ; CHECK-NEXT: ret <2 x i8> [[BO]] ; @@ -320,7 +320,7 @@ define <2 x i8> @udiv_constant_op0_not_undef_lane(i8 %x) { ; CHECK-LABEL: @udiv_constant_op0_not_undef_lane( -; CHECK-NEXT: [[INS:%.*]] = insertelement <2 x i8> undef, i8 [[X:%.*]], i32 0 +; CHECK-NEXT: [[INS:%.*]] = insertelement <2 x i8> undef, i8 [[X:%.*]], i64 0 ; CHECK-NEXT: [[BO:%.*]] = udiv exact <2 x i8> , [[INS]] ; CHECK-NEXT: ret <2 x i8> [[BO]] ; @@ -340,7 +340,7 @@ define <2 x i8> @udiv_constant_op1_not_undef_lane(i8 %x) { ; CHECK-LABEL: @udiv_constant_op1_not_undef_lane( -; CHECK-NEXT: [[INS:%.*]] = insertelement <2 x i8> undef, i8 [[X:%.*]], i32 1 +; CHECK-NEXT: [[INS:%.*]] = insertelement <2 x i8> undef, i8 [[X:%.*]], i64 1 ; CHECK-NEXT: [[BO:%.*]] = udiv <2 x i8> [[INS]], ; CHECK-NEXT: ret <2 x i8> [[BO]] ; @@ -351,7 +351,7 @@ define <2 x i8> @sdiv_constant_op0(i8 %x) { ; CHECK-LABEL: @sdiv_constant_op0( -; CHECK-NEXT: [[INS:%.*]] = insertelement <2 x i8> undef, i8 [[X:%.*]], i32 0 +; CHECK-NEXT: [[INS:%.*]] = insertelement <2 x i8> undef, i8 [[X:%.*]], i64 0 ; CHECK-NEXT: [[BO:%.*]] = sdiv <2 x i8> , [[INS]] ; CHECK-NEXT: ret <2 x i8> [[BO]] ; @@ -362,7 +362,7 @@ define <2 x i8> @sdiv_constant_op0_not_undef_lane(i8 %x) { ; CHECK-LABEL: @sdiv_constant_op0_not_undef_lane( -; CHECK-NEXT: [[INS:%.*]] = insertelement <2 x i8> undef, i8 [[X:%.*]], i32 0 +; CHECK-NEXT: [[INS:%.*]] = insertelement <2 x i8> undef, i8 [[X:%.*]], i64 0 ; CHECK-NEXT: [[BO:%.*]] = sdiv <2 x i8> , [[INS]] ; CHECK-NEXT: ret <2 x i8> [[BO]] ; @@ -382,7 +382,7 @@ define <2 x i8> @sdiv_constant_op1_not_undef_lane(i8 %x) { ; CHECK-LABEL: @sdiv_constant_op1_not_undef_lane( -; CHECK-NEXT: [[INS:%.*]] = insertelement <2 x i8> undef, i8 [[X:%.*]], i32 1 +; CHECK-NEXT: [[INS:%.*]] = insertelement <2 x i8> undef, i8 [[X:%.*]], i64 1 ; CHECK-NEXT: [[BO:%.*]] = sdiv exact <2 x i8> [[INS]], ; CHECK-NEXT: ret <2 x i8> [[BO]] ; @@ -393,7 +393,7 @@ define <2 x i8> @and_constant(i8 %x) { ; CHECK-LABEL: @and_constant( -; CHECK-NEXT: [[INS:%.*]] = insertelement <2 x i8> undef, i8 [[X:%.*]], i32 0 +; CHECK-NEXT: [[INS:%.*]] = insertelement <2 x i8> undef, i8 [[X:%.*]], i64 0 ; CHECK-NEXT: [[BO:%.*]] = and <2 x i8> [[INS]], ; CHECK-NEXT: ret <2 x i8> [[BO]] ; @@ -404,7 +404,7 @@ define <2 x i8> @and_constant_not_undef_lane(i8 %x) { ; CHECK-LABEL: @and_constant_not_undef_lane( -; CHECK-NEXT: [[INS:%.*]] = insertelement <2 x i8> undef, i8 [[X:%.*]], i32 0 +; CHECK-NEXT: [[INS:%.*]] = insertelement <2 x i8> undef, i8 [[X:%.*]], i64 0 ; CHECK-NEXT: [[BO:%.*]] = and <2 x i8> [[INS]], ; CHECK-NEXT: ret <2 x i8> [[BO]] ; @@ -415,7 +415,7 @@ define <2 x i8> @or_constant(i8 %x) { ; CHECK-LABEL: @or_constant( -; CHECK-NEXT: [[INS:%.*]] = insertelement <2 x i8> undef, i8 [[X:%.*]], i32 1 +; CHECK-NEXT: [[INS:%.*]] = insertelement <2 x i8> undef, i8 [[X:%.*]], i64 1 ; CHECK-NEXT: [[BO:%.*]] = or <2 x i8> [[INS]], ; CHECK-NEXT: ret <2 x i8> [[BO]] ; @@ -426,7 +426,7 @@ define <2 x i8> @or_constant_not_undef_lane(i8 %x) { ; CHECK-LABEL: @or_constant_not_undef_lane( -; CHECK-NEXT: [[INS:%.*]] = insertelement <2 x i8> undef, i8 [[X:%.*]], i32 1 +; CHECK-NEXT: [[INS:%.*]] = insertelement <2 x i8> undef, i8 [[X:%.*]], i64 1 ; CHECK-NEXT: [[BO:%.*]] = or <2 x i8> [[INS]], ; CHECK-NEXT: ret <2 x i8> [[BO]] ; @@ -437,7 +437,7 @@ define <2 x i8> @xor_constant(i8 %x) { ; CHECK-LABEL: @xor_constant( -; CHECK-NEXT: [[INS:%.*]] = insertelement <2 x i8> undef, i8 [[X:%.*]], i32 0 +; CHECK-NEXT: [[INS:%.*]] = insertelement <2 x i8> undef, i8 [[X:%.*]], i64 0 ; CHECK-NEXT: [[BO:%.*]] = xor <2 x i8> [[INS]], ; CHECK-NEXT: ret <2 x i8> [[BO]] ; @@ -448,7 +448,7 @@ define <2 x i8> @xor_constant_not_undef_lane(i8 %x) { ; CHECK-LABEL: @xor_constant_not_undef_lane( -; CHECK-NEXT: [[INS:%.*]] = insertelement <2 x i8> undef, i8 [[X:%.*]], i32 0 +; CHECK-NEXT: [[INS:%.*]] = insertelement <2 x i8> undef, i8 [[X:%.*]], i64 0 ; CHECK-NEXT: [[BO:%.*]] = xor <2 x i8> [[INS]], ; CHECK-NEXT: ret <2 x i8> [[BO]] ; @@ -459,7 +459,7 @@ define <2 x float> @fadd_constant(float %x) { ; CHECK-LABEL: @fadd_constant( -; CHECK-NEXT: [[INS:%.*]] = insertelement <2 x float> undef, float [[X:%.*]], i32 0 +; CHECK-NEXT: [[INS:%.*]] = insertelement <2 x float> undef, float [[X:%.*]], i64 0 ; CHECK-NEXT: [[BO:%.*]] = fadd <2 x float> [[INS]], ; CHECK-NEXT: ret <2 x float> [[BO]] ; @@ -470,7 +470,7 @@ define <2 x float> @fadd_constant_not_undef_lane(float %x) { ; CHECK-LABEL: @fadd_constant_not_undef_lane( -; CHECK-NEXT: [[INS:%.*]] = insertelement <2 x float> undef, float [[X:%.*]], i32 1 +; CHECK-NEXT: [[INS:%.*]] = insertelement <2 x float> undef, float [[X:%.*]], i64 1 ; CHECK-NEXT: [[BO:%.*]] = fadd <2 x float> [[INS]], ; CHECK-NEXT: ret <2 x float> [[BO]] ; @@ -481,7 +481,7 @@ define <2 x float> @fsub_constant_op0(float %x) { ; CHECK-LABEL: @fsub_constant_op0( -; CHECK-NEXT: [[INS:%.*]] = insertelement <2 x float> undef, float [[X:%.*]], i32 0 +; CHECK-NEXT: [[INS:%.*]] = insertelement <2 x float> undef, float [[X:%.*]], i64 0 ; CHECK-NEXT: [[BO:%.*]] = fsub fast <2 x float> , [[INS]] ; CHECK-NEXT: ret <2 x float> [[BO]] ; @@ -492,7 +492,7 @@ define <2 x float> @fsub_constant_op0_not_undef_lane(float %x) { ; CHECK-LABEL: @fsub_constant_op0_not_undef_lane( -; CHECK-NEXT: [[INS:%.*]] = insertelement <2 x float> undef, float [[X:%.*]], i32 1 +; CHECK-NEXT: [[INS:%.*]] = insertelement <2 x float> undef, float [[X:%.*]], i64 1 ; CHECK-NEXT: [[BO:%.*]] = fsub nsz <2 x float> , [[INS]] ; CHECK-NEXT: ret <2 x float> [[BO]] ; @@ -503,7 +503,7 @@ define <2 x float> @fsub_constant_op1(float %x) { ; CHECK-LABEL: @fsub_constant_op1( -; CHECK-NEXT: [[INS:%.*]] = insertelement <2 x float> undef, float [[X:%.*]], i32 1 +; CHECK-NEXT: [[INS:%.*]] = insertelement <2 x float> undef, float [[X:%.*]], i64 1 ; CHECK-NEXT: [[BO:%.*]] = fadd <2 x float> [[INS]], ; CHECK-NEXT: ret <2 x float> [[BO]] ; @@ -514,7 +514,7 @@ define <2 x float> @fsub_constant_op1_not_undef_lane(float %x) { ; CHECK-LABEL: @fsub_constant_op1_not_undef_lane( -; CHECK-NEXT: [[INS:%.*]] = insertelement <2 x float> undef, float [[X:%.*]], i32 0 +; CHECK-NEXT: [[INS:%.*]] = insertelement <2 x float> undef, float [[X:%.*]], i64 0 ; CHECK-NEXT: [[BO:%.*]] = fadd <2 x float> [[INS]], ; CHECK-NEXT: ret <2 x float> [[BO]] ; @@ -525,7 +525,7 @@ define <2 x float> @fmul_constant(float %x) { ; CHECK-LABEL: @fmul_constant( -; CHECK-NEXT: [[INS:%.*]] = insertelement <2 x float> undef, float [[X:%.*]], i32 0 +; CHECK-NEXT: [[INS:%.*]] = insertelement <2 x float> undef, float [[X:%.*]], i64 0 ; CHECK-NEXT: [[BO:%.*]] = fmul reassoc <2 x float> [[INS]], ; CHECK-NEXT: ret <2 x float> [[BO]] ; @@ -536,7 +536,7 @@ define <2 x float> @fmul_constant_not_undef_lane(float %x) { ; CHECK-LABEL: @fmul_constant_not_undef_lane( -; CHECK-NEXT: [[INS:%.*]] = insertelement <2 x float> undef, float [[X:%.*]], i32 1 +; CHECK-NEXT: [[INS:%.*]] = insertelement <2 x float> undef, float [[X:%.*]], i64 1 ; CHECK-NEXT: [[BO:%.*]] = fmul <2 x float> [[INS]], ; CHECK-NEXT: ret <2 x float> [[BO]] ; @@ -547,7 +547,7 @@ define <2 x float> @fdiv_constant_op0(float %x) { ; CHECK-LABEL: @fdiv_constant_op0( -; CHECK-NEXT: [[INS:%.*]] = insertelement <2 x float> undef, float [[X:%.*]], i32 1 +; CHECK-NEXT: [[INS:%.*]] = insertelement <2 x float> undef, float [[X:%.*]], i64 1 ; CHECK-NEXT: [[BO:%.*]] = fdiv nnan <2 x float> , [[INS]] ; CHECK-NEXT: ret <2 x float> [[BO]] ; @@ -558,7 +558,7 @@ define <2 x float> @fdiv_constant_op0_not_undef_lane(float %x) { ; CHECK-LABEL: @fdiv_constant_op0_not_undef_lane( -; CHECK-NEXT: [[INS:%.*]] = insertelement <2 x float> undef, float [[X:%.*]], i32 0 +; CHECK-NEXT: [[INS:%.*]] = insertelement <2 x float> undef, float [[X:%.*]], i64 0 ; CHECK-NEXT: [[BO:%.*]] = fdiv ninf <2 x float> , [[INS]] ; CHECK-NEXT: ret <2 x float> [[BO]] ; @@ -569,7 +569,7 @@ define <2 x float> @fdiv_constant_op1(float %x) { ; CHECK-LABEL: @fdiv_constant_op1( -; CHECK-NEXT: [[INS:%.*]] = insertelement <2 x float> undef, float [[X:%.*]], i32 0 +; CHECK-NEXT: [[INS:%.*]] = insertelement <2 x float> undef, float [[X:%.*]], i64 0 ; CHECK-NEXT: [[BO:%.*]] = fdiv <2 x float> [[INS]], ; CHECK-NEXT: ret <2 x float> [[BO]] ; @@ -580,7 +580,7 @@ define <2 x float> @fdiv_constant_op1_not_undef_lane(float %x) { ; CHECK-LABEL: @fdiv_constant_op1_not_undef_lane( -; CHECK-NEXT: [[INS:%.*]] = insertelement <2 x float> undef, float [[X:%.*]], i32 0 +; CHECK-NEXT: [[INS:%.*]] = insertelement <2 x float> undef, float [[X:%.*]], i64 0 ; CHECK-NEXT: [[BO:%.*]] = fdiv <2 x float> [[INS]], ; CHECK-NEXT: ret <2 x float> [[BO]] ; @@ -591,7 +591,7 @@ define <2 x float> @frem_constant_op0(float %x) { ; CHECK-LABEL: @frem_constant_op0( -; CHECK-NEXT: [[INS:%.*]] = insertelement <2 x float> undef, float [[X:%.*]], i32 0 +; CHECK-NEXT: [[INS:%.*]] = insertelement <2 x float> undef, float [[X:%.*]], i64 0 ; CHECK-NEXT: [[BO:%.*]] = frem fast <2 x float> , [[INS]] ; CHECK-NEXT: ret <2 x float> [[BO]] ; @@ -602,7 +602,7 @@ define <2 x float> @frem_constant_op0_not_undef_lane(float %x) { ; CHECK-LABEL: @frem_constant_op0_not_undef_lane( -; CHECK-NEXT: [[INS:%.*]] = insertelement <2 x float> undef, float [[X:%.*]], i32 1 +; CHECK-NEXT: [[INS:%.*]] = insertelement <2 x float> undef, float [[X:%.*]], i64 1 ; CHECK-NEXT: [[BO:%.*]] = frem <2 x float> , [[INS]] ; CHECK-NEXT: ret <2 x float> [[BO]] ; @@ -613,7 +613,7 @@ define <2 x float> @frem_constant_op1(float %x) { ; CHECK-LABEL: @frem_constant_op1( -; CHECK-NEXT: [[INS:%.*]] = insertelement <2 x float> undef, float [[X:%.*]], i32 1 +; CHECK-NEXT: [[INS:%.*]] = insertelement <2 x float> undef, float [[X:%.*]], i64 1 ; CHECK-NEXT: [[BO:%.*]] = frem ninf <2 x float> [[INS]], ; CHECK-NEXT: ret <2 x float> [[BO]] ; @@ -624,7 +624,7 @@ define <2 x float> @frem_constant_op1_not_undef_lane(float %x) { ; CHECK-LABEL: @frem_constant_op1_not_undef_lane( -; CHECK-NEXT: [[INS:%.*]] = insertelement <2 x float> undef, float [[X:%.*]], i32 0 +; CHECK-NEXT: [[INS:%.*]] = insertelement <2 x float> undef, float [[X:%.*]], i64 0 ; CHECK-NEXT: [[BO:%.*]] = frem nnan <2 x float> [[INS]], ; CHECK-NEXT: ret <2 x float> [[BO]] ; diff --git a/llvm/test/Transforms/InstCombine/insert-const-shuf.ll b/llvm/test/Transforms/InstCombine/insert-const-shuf.ll --- a/llvm/test/Transforms/InstCombine/insert-const-shuf.ll +++ b/llvm/test/Transforms/InstCombine/insert-const-shuf.ll @@ -40,7 +40,7 @@ define <4 x float> @disguisedSelect(<4 x float> %x) { ; CHECK-LABEL: @disguisedSelect( ; CHECK-NEXT: [[SHUF:%.*]] = shufflevector <4 x float> [[X:%.*]], <4 x float> , <4 x i32> -; CHECK-NEXT: [[INS:%.*]] = insertelement <4 x float> [[SHUF]], float 4.000000e+00, i32 0 +; CHECK-NEXT: [[INS:%.*]] = insertelement <4 x float> [[SHUF]], float 4.000000e+00, i64 0 ; CHECK-NEXT: ret <4 x float> [[INS]] ; %shuf = shufflevector <4 x float> %x, <4 x float> , <4 x i32> @@ -53,7 +53,7 @@ define <4 x float> @notSelectButNoMaskDifference(<4 x float> %x) { ; CHECK-LABEL: @notSelectButNoMaskDifference( ; CHECK-NEXT: [[SHUF:%.*]] = shufflevector <4 x float> [[X:%.*]], <4 x float> , <4 x i32> -; CHECK-NEXT: [[INS:%.*]] = insertelement <4 x float> [[SHUF]], float 4.000000e+00, i32 3 +; CHECK-NEXT: [[INS:%.*]] = insertelement <4 x float> [[SHUF]], float 4.000000e+00, i64 3 ; CHECK-NEXT: ret <4 x float> [[INS]] ; %shuf = shufflevector <4 x float> %x, <4 x float> , <4 x i32> @@ -66,7 +66,7 @@ define <4 x float> @tooRisky(<4 x float> %x) { ; CHECK-LABEL: @tooRisky( ; CHECK-NEXT: [[SHUF:%.*]] = shufflevector <4 x float> [[X:%.*]], <4 x float> , <4 x i32> -; CHECK-NEXT: [[INS:%.*]] = insertelement <4 x float> [[SHUF]], float 4.000000e+00, i32 3 +; CHECK-NEXT: [[INS:%.*]] = insertelement <4 x float> [[SHUF]], float 4.000000e+00, i64 3 ; CHECK-NEXT: ret <4 x float> [[INS]] ; %shuf = shufflevector <4 x float> %x, <4 x float> , <4 x i32> @@ -80,7 +80,7 @@ define <3 x float> @twoShufUses(<3 x float> %x) { ; CHECK-LABEL: @twoShufUses( ; CHECK-NEXT: [[SHUF:%.*]] = shufflevector <3 x float> [[X:%.*]], <3 x float> , <3 x i32> -; CHECK-NEXT: [[INS:%.*]] = insertelement <3 x float> [[SHUF]], float 4.200000e+01, i2 1 +; CHECK-NEXT: [[INS:%.*]] = insertelement <3 x float> [[SHUF]], float 4.200000e+01, i64 1 ; CHECK-NEXT: [[ADD:%.*]] = fadd <3 x float> [[SHUF]], [[INS]] ; CHECK-NEXT: ret <3 x float> [[ADD]] ; @@ -95,7 +95,7 @@ define <5 x i8> @longerMask(<3 x i8> %x) { ; CHECK-LABEL: @longerMask( ; CHECK-NEXT: [[SHUF:%.*]] = shufflevector <3 x i8> [[X:%.*]], <3 x i8> , <5 x i32> -; CHECK-NEXT: [[INS:%.*]] = insertelement <5 x i8> [[SHUF]], i8 42, i17 4 +; CHECK-NEXT: [[INS:%.*]] = insertelement <5 x i8> [[SHUF]], i8 42, i64 4 ; CHECK-NEXT: ret <5 x i8> [[INS]] ; %shuf = shufflevector <3 x i8> %x, <3 x i8> , <5 x i32> @@ -108,7 +108,7 @@ define <3 x i8> @shorterMask(<5 x i8> %x) { ; CHECK-LABEL: @shorterMask( ; CHECK-NEXT: [[SHUF:%.*]] = shufflevector <5 x i8> [[X:%.*]], <5 x i8> poison, <3 x i32> -; CHECK-NEXT: [[INS:%.*]] = insertelement <3 x i8> [[SHUF]], i8 42, i21 0 +; CHECK-NEXT: [[INS:%.*]] = insertelement <3 x i8> [[SHUF]], i8 42, i64 0 ; CHECK-NEXT: ret <3 x i8> [[INS]] ; %shuf = shufflevector <5 x i8> %x, <5 x i8> , <3 x i32> diff --git a/llvm/test/Transforms/InstCombine/insert-extract-shuffle-inseltpoison.ll b/llvm/test/Transforms/InstCombine/insert-extract-shuffle-inseltpoison.ll --- a/llvm/test/Transforms/InstCombine/insert-extract-shuffle-inseltpoison.ll +++ b/llvm/test/Transforms/InstCombine/insert-extract-shuffle-inseltpoison.ll @@ -103,16 +103,16 @@ define <8 x i16> @pr25999(<4 x i16> %t0, i1 %b) { ; CHECK-LABEL: @pr25999( -; CHECK-NEXT: [[T1:%.*]] = extractelement <4 x i16> [[T0:%.*]], i32 2 +; CHECK-NEXT: [[T1:%.*]] = extractelement <4 x i16> [[T0:%.*]], i64 2 ; CHECK-NEXT: br i1 [[B:%.*]], label [[IF:%.*]], label [[END:%.*]] ; CHECK: if: ; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <4 x i16> [[T0]], <4 x i16> poison, <8 x i32> -; CHECK-NEXT: [[T3:%.*]] = insertelement <8 x i16> , i16 [[T1]], i32 3 +; CHECK-NEXT: [[T3:%.*]] = insertelement <8 x i16> , i16 [[T1]], i64 3 ; CHECK-NEXT: [[T5:%.*]] = shufflevector <8 x i16> [[T3]], <8 x i16> [[TMP1]], <8 x i32> ; CHECK-NEXT: ret <8 x i16> [[T5]] ; CHECK: end: ; CHECK-NEXT: [[A1:%.*]] = add i16 [[T1]], 4 -; CHECK-NEXT: [[T6:%.*]] = insertelement <8 x i16> , i16 [[A1]], i32 0 +; CHECK-NEXT: [[T6:%.*]] = insertelement <8 x i16> , i16 [[A1]], i64 0 ; CHECK-NEXT: ret <8 x i16> [[T6]] ; @@ -205,13 +205,13 @@ ; CHECK-NEXT: [[LD:%.*]] = load <2 x double>, <2 x double>* [[TMP:%.*]], align 16 ; CHECK-NEXT: br i1 [[B:%.*]], label [[IF:%.*]], label [[END:%.*]] ; CHECK: if: -; CHECK-NEXT: [[E2:%.*]] = extractelement <2 x double> [[LD]], i32 1 -; CHECK-NEXT: [[I1:%.*]] = insertelement <4 x double> , double [[E2]], i32 3 +; CHECK-NEXT: [[E2:%.*]] = extractelement <2 x double> [[LD]], i64 1 +; CHECK-NEXT: [[I1:%.*]] = insertelement <4 x double> , double [[E2]], i64 3 ; CHECK-NEXT: br label [[END]] ; CHECK: end: ; CHECK-NEXT: [[PH:%.*]] = phi <4 x double> [ undef, [[ENTRY:%.*]] ], [ [[I1]], [[IF]] ] -; CHECK-NEXT: [[E1:%.*]] = extractelement <2 x double> [[LD]], i32 0 -; CHECK-NEXT: [[E3:%.*]] = extractelement <4 x double> [[PH]], i32 1 +; CHECK-NEXT: [[E1:%.*]] = extractelement <2 x double> [[LD]], i64 0 +; CHECK-NEXT: [[E3:%.*]] = extractelement <4 x double> [[PH]], i64 1 ; CHECK-NEXT: [[MU:%.*]] = fmul double [[E1]], [[E3]] ; CHECK-NEXT: ret double [[MU]] ; @@ -239,13 +239,13 @@ define <4 x float> @PR30923(<2 x float> %x) { ; CHECK-LABEL: @PR30923( ; CHECK-NEXT: bb1: -; CHECK-NEXT: [[EXT1:%.*]] = extractelement <2 x float> [[X:%.*]], i32 1 +; CHECK-NEXT: [[EXT1:%.*]] = extractelement <2 x float> [[X:%.*]], i64 1 ; CHECK-NEXT: store float [[EXT1]], float* undef, align 4 ; CHECK-NEXT: br label [[BB2:%.*]] ; CHECK: bb2: -; CHECK-NEXT: [[EXT2:%.*]] = extractelement <2 x float> [[X]], i32 0 -; CHECK-NEXT: [[INS1:%.*]] = insertelement <4 x float> , float [[EXT2]], i32 2 -; CHECK-NEXT: [[INS2:%.*]] = insertelement <4 x float> [[INS1]], float [[EXT1]], i32 3 +; CHECK-NEXT: [[EXT2:%.*]] = extractelement <2 x float> [[X]], i64 0 +; CHECK-NEXT: [[INS1:%.*]] = insertelement <4 x float> , float [[EXT2]], i64 2 +; CHECK-NEXT: [[INS2:%.*]] = insertelement <4 x float> [[INS1]], float [[EXT1]], i64 3 ; CHECK-NEXT: ret <4 x float> [[INS2]] ; bb1: @@ -288,11 +288,11 @@ define <4 x float> @collectShuffleElts(<2 x float> %x, float %y) { ; CHECK-LABEL: @collectShuffleElts( -; CHECK-NEXT: [[X0:%.*]] = extractelement <2 x float> [[X:%.*]], i32 0 -; CHECK-NEXT: [[X1:%.*]] = extractelement <2 x float> [[X]], i32 1 -; CHECK-NEXT: [[V1:%.*]] = insertelement <4 x float> poison, float [[X0]], i32 1 -; CHECK-NEXT: [[V2:%.*]] = insertelement <4 x float> [[V1]], float [[X1]], i32 2 -; CHECK-NEXT: [[V3:%.*]] = insertelement <4 x float> [[V2]], float [[Y:%.*]], i32 3 +; CHECK-NEXT: [[X0:%.*]] = extractelement <2 x float> [[X:%.*]], i64 0 +; CHECK-NEXT: [[X1:%.*]] = extractelement <2 x float> [[X]], i64 1 +; CHECK-NEXT: [[V1:%.*]] = insertelement <4 x float> poison, float [[X0]], i64 1 +; CHECK-NEXT: [[V2:%.*]] = insertelement <4 x float> [[V1]], float [[X1]], i64 2 +; CHECK-NEXT: [[V3:%.*]] = insertelement <4 x float> [[V2]], float [[Y:%.*]], i64 3 ; CHECK-NEXT: ret <4 x float> [[V3]] ; %x0 = extractelement <2 x float> %x, i32 0 @@ -307,7 +307,7 @@ define <4 x float> @insert_shuffle(float %x, <4 x float> %y) { ; CHECK-LABEL: @insert_shuffle( -; CHECK-NEXT: [[R:%.*]] = insertelement <4 x float> [[Y:%.*]], float [[X:%.*]], i32 0 +; CHECK-NEXT: [[R:%.*]] = insertelement <4 x float> [[Y:%.*]], float [[X:%.*]], i64 0 ; CHECK-NEXT: ret <4 x float> [[R]] ; %xv = insertelement <4 x float> poison, float %x, i32 0 @@ -319,7 +319,7 @@ define <4 x float> @insert_shuffle_translate(float %x, <4 x float> %y) { ; CHECK-LABEL: @insert_shuffle_translate( -; CHECK-NEXT: [[R:%.*]] = insertelement <4 x float> [[Y:%.*]], float [[X:%.*]], i32 1 +; CHECK-NEXT: [[R:%.*]] = insertelement <4 x float> [[Y:%.*]], float [[X:%.*]], i64 1 ; CHECK-NEXT: ret <4 x float> [[R]] ; %xv = insertelement <4 x float> poison, float %x, i32 0 @@ -331,7 +331,7 @@ define <4 x float> @insert_not_undef_shuffle_translate(float %x, <4 x float> %y, <4 x float> %q) { ; CHECK-LABEL: @insert_not_undef_shuffle_translate( -; CHECK-NEXT: [[R:%.*]] = insertelement <4 x float> [[Y:%.*]], float [[X:%.*]], i32 2 +; CHECK-NEXT: [[R:%.*]] = insertelement <4 x float> [[Y:%.*]], float [[X:%.*]], i64 2 ; CHECK-NEXT: ret <4 x float> [[R]] ; %xv = insertelement <4 x float> %q, float %x, i32 3 @@ -343,7 +343,7 @@ define <4 x float> @insert_not_undef_shuffle_translate_commute(float %x, <4 x float> %y, <4 x float> %q) { ; CHECK-LABEL: @insert_not_undef_shuffle_translate_commute( -; CHECK-NEXT: [[R:%.*]] = insertelement <4 x float> [[Y:%.*]], float [[X:%.*]], i32 1 +; CHECK-NEXT: [[R:%.*]] = insertelement <4 x float> [[Y:%.*]], float [[X:%.*]], i64 1 ; CHECK-NEXT: ret <4 x float> [[R]] ; %xv = insertelement <4 x float> %q, float %x, i32 2 @@ -355,8 +355,8 @@ define <4 x float> @insert_insert_shuffle_translate(float %x1, float %x2, <4 x float> %q) { ; CHECK-LABEL: @insert_insert_shuffle_translate( -; CHECK-NEXT: [[XV2:%.*]] = insertelement <4 x float> [[Q:%.*]], float [[X2:%.*]], i32 2 -; CHECK-NEXT: [[R:%.*]] = insertelement <4 x float> [[XV2]], float [[X1:%.*]], i32 1 +; CHECK-NEXT: [[XV2:%.*]] = insertelement <4 x float> [[Q:%.*]], float [[X2:%.*]], i64 2 +; CHECK-NEXT: [[R:%.*]] = insertelement <4 x float> [[XV2]], float [[X1:%.*]], i64 1 ; CHECK-NEXT: ret <4 x float> [[R]] ; %xv1 = insertelement <4 x float> %q, float %x1, i32 0 @@ -369,8 +369,8 @@ define <4 x float> @insert_insert_shuffle_translate_commute(float %x1, float %x2, <4 x float> %q) { ; CHECK-LABEL: @insert_insert_shuffle_translate_commute( -; CHECK-NEXT: [[XV1:%.*]] = insertelement <4 x float> [[Q:%.*]], float [[X1:%.*]], i32 0 -; CHECK-NEXT: [[R:%.*]] = insertelement <4 x float> [[XV1]], float [[X2:%.*]], i32 1 +; CHECK-NEXT: [[XV1:%.*]] = insertelement <4 x float> [[Q:%.*]], float [[X1:%.*]], i64 0 +; CHECK-NEXT: [[R:%.*]] = insertelement <4 x float> [[XV1]], float [[X2:%.*]], i64 1 ; CHECK-NEXT: ret <4 x float> [[R]] ; %xv1 = insertelement <4 x float> %q, float %x1, i32 0 @@ -384,8 +384,8 @@ define <4 x float> @insert_insert_shuffle_translate_wrong_mask(float %x1, float %x2, <4 x float> %q) { ; CHECK-LABEL: @insert_insert_shuffle_translate_wrong_mask( -; CHECK-NEXT: [[XV1:%.*]] = insertelement <4 x float> [[Q:%.*]], float [[X1:%.*]], i32 0 -; CHECK-NEXT: [[XV2:%.*]] = insertelement <4 x float> [[Q]], float [[X2:%.*]], i32 2 +; CHECK-NEXT: [[XV1:%.*]] = insertelement <4 x float> [[Q:%.*]], float [[X1:%.*]], i64 0 +; CHECK-NEXT: [[XV2:%.*]] = insertelement <4 x float> [[Q]], float [[X2:%.*]], i64 2 ; CHECK-NEXT: [[R:%.*]] = shufflevector <4 x float> [[XV1]], <4 x float> [[XV2]], <4 x i32> ; CHECK-NEXT: ret <4 x float> [[R]] ; @@ -401,9 +401,9 @@ define <4 x float> @insert_not_undef_shuffle_translate_commute_uses(float %x, <4 x float> %y, <4 x float> %q) { ; CHECK-LABEL: @insert_not_undef_shuffle_translate_commute_uses( -; CHECK-NEXT: [[XV:%.*]] = insertelement <4 x float> [[Q:%.*]], float [[X:%.*]], i32 2 +; CHECK-NEXT: [[XV:%.*]] = insertelement <4 x float> [[Q:%.*]], float [[X:%.*]], i64 2 ; CHECK-NEXT: call void @use(<4 x float> [[XV]]) -; CHECK-NEXT: [[R:%.*]] = insertelement <4 x float> [[Y:%.*]], float [[X]], i32 0 +; CHECK-NEXT: [[R:%.*]] = insertelement <4 x float> [[Y:%.*]], float [[X]], i64 0 ; CHECK-NEXT: ret <4 x float> [[R]] ; %xv = insertelement <4 x float> %q, float %x, i32 2 @@ -416,7 +416,7 @@ define <5 x float> @insert_not_undef_shuffle_translate_commute_lengthen(float %x, <4 x float> %y, <4 x float> %q) { ; CHECK-LABEL: @insert_not_undef_shuffle_translate_commute_lengthen( -; CHECK-NEXT: [[XV:%.*]] = insertelement <4 x float> poison, float [[X:%.*]], i32 2 +; CHECK-NEXT: [[XV:%.*]] = insertelement <4 x float> poison, float [[X:%.*]], i64 2 ; CHECK-NEXT: [[R:%.*]] = shufflevector <4 x float> [[Y:%.*]], <4 x float> [[XV]], <5 x i32> ; CHECK-NEXT: ret <5 x float> [[R]] ; @@ -427,7 +427,7 @@ define <4 x float> @insert_nonzero_index_splat(float %x) { ; CHECK-LABEL: @insert_nonzero_index_splat( -; CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x float> undef, float [[X:%.*]], i32 0 +; CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x float> undef, float [[X:%.*]], i64 0 ; CHECK-NEXT: [[SPLAT:%.*]] = shufflevector <4 x float> [[TMP1]], <4 x float> poison, <4 x i32> ; CHECK-NEXT: ret <4 x float> [[SPLAT]] ; @@ -438,7 +438,7 @@ define <3 x double> @insert_nonzero_index_splat_narrow(double %x) { ; CHECK-LABEL: @insert_nonzero_index_splat_narrow( -; CHECK-NEXT: [[TMP1:%.*]] = insertelement <3 x double> undef, double [[X:%.*]], i32 0 +; CHECK-NEXT: [[TMP1:%.*]] = insertelement <3 x double> undef, double [[X:%.*]], i64 0 ; CHECK-NEXT: [[SPLAT:%.*]] = shufflevector <3 x double> [[TMP1]], <3 x double> poison, <3 x i32> ; CHECK-NEXT: ret <3 x double> [[SPLAT]] ; @@ -449,7 +449,7 @@ define <5 x i7> @insert_nonzero_index_splat_widen(i7 %x) { ; CHECK-LABEL: @insert_nonzero_index_splat_widen( -; CHECK-NEXT: [[TMP1:%.*]] = insertelement <5 x i7> undef, i7 [[X:%.*]], i32 0 +; CHECK-NEXT: [[TMP1:%.*]] = insertelement <5 x i7> undef, i7 [[X:%.*]], i64 0 ; CHECK-NEXT: [[SPLAT:%.*]] = shufflevector <5 x i7> [[TMP1]], <5 x i7> poison, <5 x i32> ; CHECK-NEXT: ret <5 x i7> [[SPLAT]] ; @@ -462,7 +462,7 @@ define <4 x float> @insert_nonzero_index_splat_extra_use(float %x) { ; CHECK-LABEL: @insert_nonzero_index_splat_extra_use( -; CHECK-NEXT: [[XV:%.*]] = insertelement <4 x float> poison, float [[X:%.*]], i32 2 +; CHECK-NEXT: [[XV:%.*]] = insertelement <4 x float> poison, float [[X:%.*]], i64 2 ; CHECK-NEXT: call void @use(<4 x float> [[XV]]) ; CHECK-NEXT: [[SPLAT:%.*]] = shufflevector <4 x float> [[XV]], <4 x float> poison, <4 x i32> ; CHECK-NEXT: ret <4 x float> [[SPLAT]] @@ -477,7 +477,7 @@ define <4 x float> @insert_nonzero_index_splat_wrong_base(float %x, <4 x float> %y) { ; CHECK-LABEL: @insert_nonzero_index_splat_wrong_base( -; CHECK-NEXT: [[XV:%.*]] = insertelement <4 x float> [[Y:%.*]], float [[X:%.*]], i32 2 +; CHECK-NEXT: [[XV:%.*]] = insertelement <4 x float> [[Y:%.*]], float [[X:%.*]], i64 2 ; CHECK-NEXT: [[SPLAT:%.*]] = shufflevector <4 x float> [[XV]], <4 x float> poison, <4 x i32> ; CHECK-NEXT: ret <4 x float> [[SPLAT]] ; @@ -501,7 +501,7 @@ define <4 x float> @insert_in_splat(float %x) { ; CHECK-LABEL: @insert_in_splat( -; CHECK-NEXT: [[XV:%.*]] = insertelement <4 x float> poison, float [[X:%.*]], i32 0 +; CHECK-NEXT: [[XV:%.*]] = insertelement <4 x float> poison, float [[X:%.*]], i64 0 ; CHECK-NEXT: [[R:%.*]] = shufflevector <4 x float> [[XV]], <4 x float> poison, <4 x i32> ; CHECK-NEXT: ret <4 x float> [[R]] ; @@ -513,7 +513,7 @@ define <4 x float> @insert_in_splat_extra_uses(float %x) { ; CHECK-LABEL: @insert_in_splat_extra_uses( -; CHECK-NEXT: [[XV:%.*]] = insertelement <4 x float> poison, float [[X:%.*]], i32 0 +; CHECK-NEXT: [[XV:%.*]] = insertelement <4 x float> poison, float [[X:%.*]], i64 0 ; CHECK-NEXT: call void @use(<4 x float> [[XV]]) ; CHECK-NEXT: [[SPLAT:%.*]] = shufflevector <4 x float> [[XV]], <4 x float> poison, <4 x i32> ; CHECK-NEXT: call void @use(<4 x float> [[SPLAT]]) @@ -532,7 +532,7 @@ define <4 x float> @insert_in_splat_variable_index(float %x, i32 %y) { ; CHECK-LABEL: @insert_in_splat_variable_index( -; CHECK-NEXT: [[XV:%.*]] = insertelement <4 x float> poison, float [[X:%.*]], i32 0 +; CHECK-NEXT: [[XV:%.*]] = insertelement <4 x float> poison, float [[X:%.*]], i64 0 ; CHECK-NEXT: [[SPLAT:%.*]] = shufflevector <4 x float> [[XV]], <4 x float> poison, <4 x i32> ; CHECK-NEXT: [[R:%.*]] = insertelement <4 x float> [[SPLAT]], float [[X]], i32 [[Y:%.*]] ; CHECK-NEXT: ret <4 x float> [[R]] @@ -547,9 +547,9 @@ define <4 x float> @insert_in_nonsplat(float %x, <4 x float> %y) { ; CHECK-LABEL: @insert_in_nonsplat( -; CHECK-NEXT: [[XV:%.*]] = insertelement <4 x float> poison, float [[X:%.*]], i32 0 +; CHECK-NEXT: [[XV:%.*]] = insertelement <4 x float> poison, float [[X:%.*]], i64 0 ; CHECK-NEXT: [[SPLAT:%.*]] = shufflevector <4 x float> [[XV]], <4 x float> [[Y:%.*]], <4 x i32> -; CHECK-NEXT: [[R:%.*]] = insertelement <4 x float> [[SPLAT]], float [[X]], i32 3 +; CHECK-NEXT: [[R:%.*]] = insertelement <4 x float> [[SPLAT]], float [[X]], i64 3 ; CHECK-NEXT: ret <4 x float> [[R]] ; %xv = insertelement <4 x float> poison, float %x, i32 0 @@ -562,9 +562,9 @@ define <4 x float> @insert_in_nonsplat2(float %x, <4 x float> %y) { ; CHECK-LABEL: @insert_in_nonsplat2( -; CHECK-NEXT: [[XV:%.*]] = insertelement <4 x float> [[Y:%.*]], float [[X:%.*]], i32 0 +; CHECK-NEXT: [[XV:%.*]] = insertelement <4 x float> [[Y:%.*]], float [[X:%.*]], i64 0 ; CHECK-NEXT: [[SPLAT:%.*]] = shufflevector <4 x float> [[XV]], <4 x float> poison, <4 x i32> -; CHECK-NEXT: [[R:%.*]] = insertelement <4 x float> [[SPLAT]], float [[X]], i32 3 +; CHECK-NEXT: [[R:%.*]] = insertelement <4 x float> [[SPLAT]], float [[X]], i64 3 ; CHECK-NEXT: ret <4 x float> [[R]] ; %xv = insertelement <4 x float> %y, float %x, i32 0 @@ -576,7 +576,7 @@ define <4 x i8> @shuf_identity_padding(<2 x i8> %x, i8 %y) { ; CHECK-LABEL: @shuf_identity_padding( ; CHECK-NEXT: [[V1:%.*]] = shufflevector <2 x i8> [[X:%.*]], <2 x i8> poison, <4 x i32> -; CHECK-NEXT: [[V2:%.*]] = insertelement <4 x i8> [[V1]], i8 [[Y:%.*]], i32 2 +; CHECK-NEXT: [[V2:%.*]] = insertelement <4 x i8> [[V1]], i8 [[Y:%.*]], i64 2 ; CHECK-NEXT: ret <4 x i8> [[V2]] ; %v0 = shufflevector <2 x i8> %x, <2 x i8> poison, <4 x i32> @@ -589,7 +589,7 @@ define <3 x i8> @shuf_identity_extract(<4 x i8> %x, i8 %y) { ; CHECK-LABEL: @shuf_identity_extract( ; CHECK-NEXT: [[V1:%.*]] = shufflevector <4 x i8> [[X:%.*]], <4 x i8> poison, <3 x i32> -; CHECK-NEXT: [[V2:%.*]] = insertelement <3 x i8> [[V1]], i8 [[Y:%.*]], i32 2 +; CHECK-NEXT: [[V2:%.*]] = insertelement <3 x i8> [[V1]], i8 [[Y:%.*]], i64 2 ; CHECK-NEXT: ret <3 x i8> [[V2]] ; %v0 = shufflevector <4 x i8> %x, <4 x i8> poison, <3 x i32> @@ -604,7 +604,7 @@ ; CHECK-NEXT: [[V0:%.*]] = shufflevector <6 x float> [[X:%.*]], <6 x float> poison, <4 x i32> ; CHECK-NEXT: call void @use(<4 x float> [[V0]]) ; CHECK-NEXT: [[V1:%.*]] = shufflevector <6 x float> [[X]], <6 x float> poison, <4 x i32> -; CHECK-NEXT: [[V2:%.*]] = insertelement <4 x float> [[V1]], float [[Y:%.*]], i32 1 +; CHECK-NEXT: [[V2:%.*]] = insertelement <4 x float> [[V1]], float [[Y:%.*]], i64 1 ; CHECK-NEXT: ret <4 x float> [[V2]] ; %v0 = shufflevector <6 x float> %x, <6 x float> poison, <4 x i32> @@ -622,7 +622,7 @@ ; CHECK-NEXT: [[V0:%.*]] = shufflevector <2 x i8> [[X:%.*]], <2 x i8> poison, <4 x i32> ; CHECK-NEXT: [[X1:%.*]] = extractelement <2 x i8> [[X]], i32 [[INDEX:%.*]] ; CHECK-NEXT: [[V1:%.*]] = insertelement <4 x i8> [[V0]], i8 [[X1]], i32 [[INDEX]] -; CHECK-NEXT: [[V2:%.*]] = insertelement <4 x i8> [[V1]], i8 [[Y:%.*]], i32 2 +; CHECK-NEXT: [[V2:%.*]] = insertelement <4 x i8> [[V1]], i8 [[Y:%.*]], i64 2 ; CHECK-NEXT: ret <4 x i8> [[V2]] ; %v0 = shufflevector <2 x i8> %x, <2 x i8> poison, <4 x i32> @@ -637,9 +637,9 @@ define <4 x i8> @shuf_identity_padding_wrong_source_vec(<2 x i8> %x, i8 %y, <2 x i8> %other) { ; CHECK-LABEL: @shuf_identity_padding_wrong_source_vec( ; CHECK-NEXT: [[V0:%.*]] = shufflevector <2 x i8> [[X:%.*]], <2 x i8> poison, <4 x i32> -; CHECK-NEXT: [[X1:%.*]] = extractelement <2 x i8> [[OTHER:%.*]], i32 1 -; CHECK-NEXT: [[V1:%.*]] = insertelement <4 x i8> [[V0]], i8 [[X1]], i32 1 -; CHECK-NEXT: [[V2:%.*]] = insertelement <4 x i8> [[V1]], i8 [[Y:%.*]], i32 2 +; CHECK-NEXT: [[X1:%.*]] = extractelement <2 x i8> [[OTHER:%.*]], i64 1 +; CHECK-NEXT: [[V1:%.*]] = insertelement <4 x i8> [[V0]], i8 [[X1]], i64 1 +; CHECK-NEXT: [[V2:%.*]] = insertelement <4 x i8> [[V1]], i8 [[Y:%.*]], i64 2 ; CHECK-NEXT: ret <4 x i8> [[V2]] ; %v0 = shufflevector <2 x i8> %x, <2 x i8> poison, <4 x i32> @@ -654,9 +654,9 @@ define <4 x i8> @shuf_identity_padding_wrong_index(<2 x i8> %x, i8 %y) { ; CHECK-LABEL: @shuf_identity_padding_wrong_index( ; CHECK-NEXT: [[V0:%.*]] = shufflevector <2 x i8> [[X:%.*]], <2 x i8> poison, <4 x i32> -; CHECK-NEXT: [[X1:%.*]] = extractelement <2 x i8> [[X]], i32 1 -; CHECK-NEXT: [[V1:%.*]] = insertelement <4 x i8> [[V0]], i8 [[X1]], i32 2 -; CHECK-NEXT: [[V2:%.*]] = insertelement <4 x i8> [[V1]], i8 [[Y:%.*]], i32 3 +; CHECK-NEXT: [[X1:%.*]] = extractelement <2 x i8> [[X]], i64 1 +; CHECK-NEXT: [[V1:%.*]] = insertelement <4 x i8> [[V0]], i8 [[X1]], i64 2 +; CHECK-NEXT: [[V2:%.*]] = insertelement <4 x i8> [[V1]], i8 [[Y:%.*]], i64 3 ; CHECK-NEXT: ret <4 x i8> [[V2]] ; %v0 = shufflevector <2 x i8> %x, <2 x i8> poison, <4 x i32> @@ -668,7 +668,7 @@ define <4 x float> @insert_undemanded_element_op0(<4 x float> %x, <4 x float> %y) { ; CHECK-LABEL: @insert_undemanded_element_op0( -; CHECK-NEXT: [[INS:%.*]] = insertelement <4 x float> [[X:%.*]], float 4.200000e+01, i32 3 +; CHECK-NEXT: [[INS:%.*]] = insertelement <4 x float> [[X:%.*]], float 4.200000e+01, i64 3 ; CHECK-NEXT: call void @use(<4 x float> [[INS]]) ; CHECK-NEXT: [[S:%.*]] = shufflevector <4 x float> [[X]], <4 x float> [[Y:%.*]], <4 x i32> ; CHECK-NEXT: ret <4 x float> [[S]] @@ -681,7 +681,7 @@ define <4 x float> @insert_undemanded_element_op1(<4 x float> %x, <4 x float> %y) { ; CHECK-LABEL: @insert_undemanded_element_op1( -; CHECK-NEXT: [[INS:%.*]] = insertelement <4 x float> [[X:%.*]], float 4.200000e+01, i32 3 +; CHECK-NEXT: [[INS:%.*]] = insertelement <4 x float> [[X:%.*]], float 4.200000e+01, i64 3 ; CHECK-NEXT: call void @use(<4 x float> [[INS]]) ; CHECK-NEXT: [[S:%.*]] = shufflevector <4 x float> [[Y:%.*]], <4 x float> [[X]], <4 x i32> ; CHECK-NEXT: ret <4 x float> [[S]] @@ -696,7 +696,7 @@ define <4 x float> @insert_demanded_element_op0(<4 x float> %x, <4 x float> %y) { ; CHECK-LABEL: @insert_demanded_element_op0( -; CHECK-NEXT: [[INS:%.*]] = insertelement <4 x float> [[X:%.*]], float 4.200000e+01, i32 3 +; CHECK-NEXT: [[INS:%.*]] = insertelement <4 x float> [[X:%.*]], float 4.200000e+01, i64 3 ; CHECK-NEXT: call void @use(<4 x float> [[INS]]) ; CHECK-NEXT: [[S:%.*]] = shufflevector <4 x float> [[INS]], <4 x float> [[Y:%.*]], <4 x i32> ; CHECK-NEXT: ret <4 x float> [[S]] @@ -711,7 +711,7 @@ define <4 x float> @insert_demanded_element_op1(<4 x float> %x, <4 x float> %y) { ; CHECK-LABEL: @insert_demanded_element_op1( -; CHECK-NEXT: [[INS:%.*]] = insertelement <4 x float> [[X:%.*]], float 4.300000e+01, i32 3 +; CHECK-NEXT: [[INS:%.*]] = insertelement <4 x float> [[X:%.*]], float 4.300000e+01, i64 3 ; CHECK-NEXT: call void @use(<4 x float> [[INS]]) ; CHECK-NEXT: [[S:%.*]] = shufflevector <4 x float> [[Y:%.*]], <4 x float> [[INS]], <4 x i32> ; CHECK-NEXT: ret <4 x float> [[S]] @@ -724,7 +724,7 @@ define <4 x float> @splat_constant(<4 x float> %x) { ; CHECK-LABEL: @splat_constant( -; CHECK-NEXT: [[INS3:%.*]] = insertelement <4 x float> [[X:%.*]], float 3.000000e+00, i32 3 +; CHECK-NEXT: [[INS3:%.*]] = insertelement <4 x float> [[X:%.*]], float 3.000000e+00, i64 3 ; CHECK-NEXT: [[R:%.*]] = fadd <4 x float> [[INS3]], ; CHECK-NEXT: ret <4 x float> [[R]] ; diff --git a/llvm/test/Transforms/InstCombine/insert-extract-shuffle.ll b/llvm/test/Transforms/InstCombine/insert-extract-shuffle.ll --- a/llvm/test/Transforms/InstCombine/insert-extract-shuffle.ll +++ b/llvm/test/Transforms/InstCombine/insert-extract-shuffle.ll @@ -103,16 +103,16 @@ define <8 x i16> @pr25999(<4 x i16> %t0, i1 %b) { ; CHECK-LABEL: @pr25999( -; CHECK-NEXT: [[T1:%.*]] = extractelement <4 x i16> [[T0:%.*]], i32 2 +; CHECK-NEXT: [[T1:%.*]] = extractelement <4 x i16> [[T0:%.*]], i64 2 ; CHECK-NEXT: br i1 [[B:%.*]], label [[IF:%.*]], label [[END:%.*]] ; CHECK: if: ; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <4 x i16> [[T0]], <4 x i16> poison, <8 x i32> -; CHECK-NEXT: [[T3:%.*]] = insertelement <8 x i16> , i16 [[T1]], i32 3 +; CHECK-NEXT: [[T3:%.*]] = insertelement <8 x i16> , i16 [[T1]], i64 3 ; CHECK-NEXT: [[T5:%.*]] = shufflevector <8 x i16> [[T3]], <8 x i16> [[TMP1]], <8 x i32> ; CHECK-NEXT: ret <8 x i16> [[T5]] ; CHECK: end: ; CHECK-NEXT: [[A1:%.*]] = add i16 [[T1]], 4 -; CHECK-NEXT: [[T6:%.*]] = insertelement <8 x i16> , i16 [[A1]], i32 0 +; CHECK-NEXT: [[T6:%.*]] = insertelement <8 x i16> , i16 [[A1]], i64 0 ; CHECK-NEXT: ret <8 x i16> [[T6]] ; @@ -205,13 +205,13 @@ ; CHECK-NEXT: [[LD:%.*]] = load <2 x double>, <2 x double>* [[TMP:%.*]], align 16 ; CHECK-NEXT: br i1 [[B:%.*]], label [[IF:%.*]], label [[END:%.*]] ; CHECK: if: -; CHECK-NEXT: [[E2:%.*]] = extractelement <2 x double> [[LD]], i32 1 -; CHECK-NEXT: [[I1:%.*]] = insertelement <4 x double> , double [[E2]], i32 3 +; CHECK-NEXT: [[E2:%.*]] = extractelement <2 x double> [[LD]], i64 1 +; CHECK-NEXT: [[I1:%.*]] = insertelement <4 x double> , double [[E2]], i64 3 ; CHECK-NEXT: br label [[END]] ; CHECK: end: ; CHECK-NEXT: [[PH:%.*]] = phi <4 x double> [ undef, [[ENTRY:%.*]] ], [ [[I1]], [[IF]] ] -; CHECK-NEXT: [[E1:%.*]] = extractelement <2 x double> [[LD]], i32 0 -; CHECK-NEXT: [[E3:%.*]] = extractelement <4 x double> [[PH]], i32 1 +; CHECK-NEXT: [[E1:%.*]] = extractelement <2 x double> [[LD]], i64 0 +; CHECK-NEXT: [[E3:%.*]] = extractelement <4 x double> [[PH]], i64 1 ; CHECK-NEXT: [[MU:%.*]] = fmul double [[E1]], [[E3]] ; CHECK-NEXT: ret double [[MU]] ; @@ -239,13 +239,13 @@ define <4 x float> @PR30923(<2 x float> %x) { ; CHECK-LABEL: @PR30923( ; CHECK-NEXT: bb1: -; CHECK-NEXT: [[EXT1:%.*]] = extractelement <2 x float> [[X:%.*]], i32 1 +; CHECK-NEXT: [[EXT1:%.*]] = extractelement <2 x float> [[X:%.*]], i64 1 ; CHECK-NEXT: store float [[EXT1]], float* undef, align 4 ; CHECK-NEXT: br label [[BB2:%.*]] ; CHECK: bb2: -; CHECK-NEXT: [[EXT2:%.*]] = extractelement <2 x float> [[X]], i32 0 -; CHECK-NEXT: [[INS1:%.*]] = insertelement <4 x float> , float [[EXT2]], i32 2 -; CHECK-NEXT: [[INS2:%.*]] = insertelement <4 x float> [[INS1]], float [[EXT1]], i32 3 +; CHECK-NEXT: [[EXT2:%.*]] = extractelement <2 x float> [[X]], i64 0 +; CHECK-NEXT: [[INS1:%.*]] = insertelement <4 x float> , float [[EXT2]], i64 2 +; CHECK-NEXT: [[INS2:%.*]] = insertelement <4 x float> [[INS1]], float [[EXT1]], i64 3 ; CHECK-NEXT: ret <4 x float> [[INS2]] ; bb1: @@ -288,11 +288,11 @@ define <4 x float> @collectShuffleElts(<2 x float> %x, float %y) { ; CHECK-LABEL: @collectShuffleElts( -; CHECK-NEXT: [[X0:%.*]] = extractelement <2 x float> [[X:%.*]], i32 0 -; CHECK-NEXT: [[X1:%.*]] = extractelement <2 x float> [[X]], i32 1 -; CHECK-NEXT: [[V1:%.*]] = insertelement <4 x float> undef, float [[X0]], i32 1 -; CHECK-NEXT: [[V2:%.*]] = insertelement <4 x float> [[V1]], float [[X1]], i32 2 -; CHECK-NEXT: [[V3:%.*]] = insertelement <4 x float> [[V2]], float [[Y:%.*]], i32 3 +; CHECK-NEXT: [[X0:%.*]] = extractelement <2 x float> [[X:%.*]], i64 0 +; CHECK-NEXT: [[X1:%.*]] = extractelement <2 x float> [[X]], i64 1 +; CHECK-NEXT: [[V1:%.*]] = insertelement <4 x float> undef, float [[X0]], i64 1 +; CHECK-NEXT: [[V2:%.*]] = insertelement <4 x float> [[V1]], float [[X1]], i64 2 +; CHECK-NEXT: [[V3:%.*]] = insertelement <4 x float> [[V2]], float [[Y:%.*]], i64 3 ; CHECK-NEXT: ret <4 x float> [[V3]] ; %x0 = extractelement <2 x float> %x, i32 0 @@ -307,7 +307,7 @@ define <4 x float> @insert_shuffle(float %x, <4 x float> %y) { ; CHECK-LABEL: @insert_shuffle( -; CHECK-NEXT: [[R:%.*]] = insertelement <4 x float> [[Y:%.*]], float [[X:%.*]], i32 0 +; CHECK-NEXT: [[R:%.*]] = insertelement <4 x float> [[Y:%.*]], float [[X:%.*]], i64 0 ; CHECK-NEXT: ret <4 x float> [[R]] ; %xv = insertelement <4 x float> undef, float %x, i32 0 @@ -319,7 +319,7 @@ define <4 x float> @insert_shuffle_translate(float %x, <4 x float> %y) { ; CHECK-LABEL: @insert_shuffle_translate( -; CHECK-NEXT: [[R:%.*]] = insertelement <4 x float> [[Y:%.*]], float [[X:%.*]], i32 1 +; CHECK-NEXT: [[R:%.*]] = insertelement <4 x float> [[Y:%.*]], float [[X:%.*]], i64 1 ; CHECK-NEXT: ret <4 x float> [[R]] ; %xv = insertelement <4 x float> undef, float %x, i32 0 @@ -331,7 +331,7 @@ define <4 x float> @insert_not_undef_shuffle_translate(float %x, <4 x float> %y, <4 x float> %q) { ; CHECK-LABEL: @insert_not_undef_shuffle_translate( -; CHECK-NEXT: [[R:%.*]] = insertelement <4 x float> [[Y:%.*]], float [[X:%.*]], i32 2 +; CHECK-NEXT: [[R:%.*]] = insertelement <4 x float> [[Y:%.*]], float [[X:%.*]], i64 2 ; CHECK-NEXT: ret <4 x float> [[R]] ; %xv = insertelement <4 x float> %q, float %x, i32 3 @@ -343,7 +343,7 @@ define <4 x float> @insert_not_undef_shuffle_translate_commute(float %x, <4 x float> %y, <4 x float> %q) { ; CHECK-LABEL: @insert_not_undef_shuffle_translate_commute( -; CHECK-NEXT: [[R:%.*]] = insertelement <4 x float> [[Y:%.*]], float [[X:%.*]], i32 1 +; CHECK-NEXT: [[R:%.*]] = insertelement <4 x float> [[Y:%.*]], float [[X:%.*]], i64 1 ; CHECK-NEXT: ret <4 x float> [[R]] ; %xv = insertelement <4 x float> %q, float %x, i32 2 @@ -355,8 +355,8 @@ define <4 x float> @insert_insert_shuffle_translate(float %x1, float %x2, <4 x float> %q) { ; CHECK-LABEL: @insert_insert_shuffle_translate( -; CHECK-NEXT: [[XV2:%.*]] = insertelement <4 x float> [[Q:%.*]], float [[X2:%.*]], i32 2 -; CHECK-NEXT: [[R:%.*]] = insertelement <4 x float> [[XV2]], float [[X1:%.*]], i32 1 +; CHECK-NEXT: [[XV2:%.*]] = insertelement <4 x float> [[Q:%.*]], float [[X2:%.*]], i64 2 +; CHECK-NEXT: [[R:%.*]] = insertelement <4 x float> [[XV2]], float [[X1:%.*]], i64 1 ; CHECK-NEXT: ret <4 x float> [[R]] ; %xv1 = insertelement <4 x float> %q, float %x1, i32 0 @@ -369,8 +369,8 @@ define <4 x float> @insert_insert_shuffle_translate_commute(float %x1, float %x2, <4 x float> %q) { ; CHECK-LABEL: @insert_insert_shuffle_translate_commute( -; CHECK-NEXT: [[XV1:%.*]] = insertelement <4 x float> [[Q:%.*]], float [[X1:%.*]], i32 0 -; CHECK-NEXT: [[R:%.*]] = insertelement <4 x float> [[XV1]], float [[X2:%.*]], i32 1 +; CHECK-NEXT: [[XV1:%.*]] = insertelement <4 x float> [[Q:%.*]], float [[X1:%.*]], i64 0 +; CHECK-NEXT: [[R:%.*]] = insertelement <4 x float> [[XV1]], float [[X2:%.*]], i64 1 ; CHECK-NEXT: ret <4 x float> [[R]] ; %xv1 = insertelement <4 x float> %q, float %x1, i32 0 @@ -384,8 +384,8 @@ define <4 x float> @insert_insert_shuffle_translate_wrong_mask(float %x1, float %x2, <4 x float> %q) { ; CHECK-LABEL: @insert_insert_shuffle_translate_wrong_mask( -; CHECK-NEXT: [[XV1:%.*]] = insertelement <4 x float> [[Q:%.*]], float [[X1:%.*]], i32 0 -; CHECK-NEXT: [[XV2:%.*]] = insertelement <4 x float> [[Q]], float [[X2:%.*]], i32 2 +; CHECK-NEXT: [[XV1:%.*]] = insertelement <4 x float> [[Q:%.*]], float [[X1:%.*]], i64 0 +; CHECK-NEXT: [[XV2:%.*]] = insertelement <4 x float> [[Q]], float [[X2:%.*]], i64 2 ; CHECK-NEXT: [[R:%.*]] = shufflevector <4 x float> [[XV1]], <4 x float> [[XV2]], <4 x i32> ; CHECK-NEXT: ret <4 x float> [[R]] ; @@ -401,9 +401,9 @@ define <4 x float> @insert_not_undef_shuffle_translate_commute_uses(float %x, <4 x float> %y, <4 x float> %q) { ; CHECK-LABEL: @insert_not_undef_shuffle_translate_commute_uses( -; CHECK-NEXT: [[XV:%.*]] = insertelement <4 x float> [[Q:%.*]], float [[X:%.*]], i32 2 +; CHECK-NEXT: [[XV:%.*]] = insertelement <4 x float> [[Q:%.*]], float [[X:%.*]], i64 2 ; CHECK-NEXT: call void @use(<4 x float> [[XV]]) -; CHECK-NEXT: [[R:%.*]] = insertelement <4 x float> [[Y:%.*]], float [[X]], i32 0 +; CHECK-NEXT: [[R:%.*]] = insertelement <4 x float> [[Y:%.*]], float [[X]], i64 0 ; CHECK-NEXT: ret <4 x float> [[R]] ; %xv = insertelement <4 x float> %q, float %x, i32 2 @@ -416,7 +416,7 @@ define <5 x float> @insert_not_undef_shuffle_translate_commute_lengthen(float %x, <4 x float> %y, <4 x float> %q) { ; CHECK-LABEL: @insert_not_undef_shuffle_translate_commute_lengthen( -; CHECK-NEXT: [[XV:%.*]] = insertelement <4 x float> poison, float [[X:%.*]], i32 2 +; CHECK-NEXT: [[XV:%.*]] = insertelement <4 x float> poison, float [[X:%.*]], i64 2 ; CHECK-NEXT: [[R:%.*]] = shufflevector <4 x float> [[Y:%.*]], <4 x float> [[XV]], <5 x i32> ; CHECK-NEXT: ret <5 x float> [[R]] ; @@ -427,7 +427,7 @@ define <4 x float> @insert_nonzero_index_splat(float %x) { ; CHECK-LABEL: @insert_nonzero_index_splat( -; CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x float> undef, float [[X:%.*]], i32 0 +; CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x float> undef, float [[X:%.*]], i64 0 ; CHECK-NEXT: [[SPLAT:%.*]] = shufflevector <4 x float> [[TMP1]], <4 x float> poison, <4 x i32> ; CHECK-NEXT: ret <4 x float> [[SPLAT]] ; @@ -438,7 +438,7 @@ define <3 x double> @insert_nonzero_index_splat_narrow(double %x) { ; CHECK-LABEL: @insert_nonzero_index_splat_narrow( -; CHECK-NEXT: [[TMP1:%.*]] = insertelement <3 x double> undef, double [[X:%.*]], i32 0 +; CHECK-NEXT: [[TMP1:%.*]] = insertelement <3 x double> undef, double [[X:%.*]], i64 0 ; CHECK-NEXT: [[SPLAT:%.*]] = shufflevector <3 x double> [[TMP1]], <3 x double> poison, <3 x i32> ; CHECK-NEXT: ret <3 x double> [[SPLAT]] ; @@ -449,7 +449,7 @@ define <5 x i7> @insert_nonzero_index_splat_widen(i7 %x) { ; CHECK-LABEL: @insert_nonzero_index_splat_widen( -; CHECK-NEXT: [[TMP1:%.*]] = insertelement <5 x i7> undef, i7 [[X:%.*]], i32 0 +; CHECK-NEXT: [[TMP1:%.*]] = insertelement <5 x i7> undef, i7 [[X:%.*]], i64 0 ; CHECK-NEXT: [[SPLAT:%.*]] = shufflevector <5 x i7> [[TMP1]], <5 x i7> poison, <5 x i32> ; CHECK-NEXT: ret <5 x i7> [[SPLAT]] ; @@ -462,7 +462,7 @@ define <4 x float> @insert_nonzero_index_splat_extra_use(float %x) { ; CHECK-LABEL: @insert_nonzero_index_splat_extra_use( -; CHECK-NEXT: [[XV:%.*]] = insertelement <4 x float> undef, float [[X:%.*]], i32 2 +; CHECK-NEXT: [[XV:%.*]] = insertelement <4 x float> undef, float [[X:%.*]], i64 2 ; CHECK-NEXT: call void @use(<4 x float> [[XV]]) ; CHECK-NEXT: [[SPLAT:%.*]] = shufflevector <4 x float> [[XV]], <4 x float> undef, <4 x i32> ; CHECK-NEXT: ret <4 x float> [[SPLAT]] @@ -477,7 +477,7 @@ define <4 x float> @insert_nonzero_index_splat_wrong_base(float %x, <4 x float> %y) { ; CHECK-LABEL: @insert_nonzero_index_splat_wrong_base( -; CHECK-NEXT: [[XV:%.*]] = insertelement <4 x float> [[Y:%.*]], float [[X:%.*]], i32 2 +; CHECK-NEXT: [[XV:%.*]] = insertelement <4 x float> [[Y:%.*]], float [[X:%.*]], i64 2 ; CHECK-NEXT: [[SPLAT:%.*]] = shufflevector <4 x float> [[XV]], <4 x float> undef, <4 x i32> ; CHECK-NEXT: ret <4 x float> [[SPLAT]] ; @@ -501,7 +501,7 @@ define <4 x float> @insert_in_splat(float %x) { ; CHECK-LABEL: @insert_in_splat( -; CHECK-NEXT: [[XV:%.*]] = insertelement <4 x float> undef, float [[X:%.*]], i32 0 +; CHECK-NEXT: [[XV:%.*]] = insertelement <4 x float> undef, float [[X:%.*]], i64 0 ; CHECK-NEXT: [[R:%.*]] = shufflevector <4 x float> [[XV]], <4 x float> poison, <4 x i32> ; CHECK-NEXT: ret <4 x float> [[R]] ; @@ -513,7 +513,7 @@ define <4 x float> @insert_in_splat_extra_uses(float %x) { ; CHECK-LABEL: @insert_in_splat_extra_uses( -; CHECK-NEXT: [[XV:%.*]] = insertelement <4 x float> undef, float [[X:%.*]], i32 0 +; CHECK-NEXT: [[XV:%.*]] = insertelement <4 x float> undef, float [[X:%.*]], i64 0 ; CHECK-NEXT: call void @use(<4 x float> [[XV]]) ; CHECK-NEXT: [[SPLAT:%.*]] = shufflevector <4 x float> [[XV]], <4 x float> undef, <4 x i32> ; CHECK-NEXT: call void @use(<4 x float> [[SPLAT]]) @@ -532,7 +532,7 @@ define <4 x float> @insert_in_splat_variable_index(float %x, i32 %y) { ; CHECK-LABEL: @insert_in_splat_variable_index( -; CHECK-NEXT: [[XV:%.*]] = insertelement <4 x float> undef, float [[X:%.*]], i32 0 +; CHECK-NEXT: [[XV:%.*]] = insertelement <4 x float> undef, float [[X:%.*]], i64 0 ; CHECK-NEXT: [[SPLAT:%.*]] = shufflevector <4 x float> [[XV]], <4 x float> undef, <4 x i32> ; CHECK-NEXT: [[R:%.*]] = insertelement <4 x float> [[SPLAT]], float [[X]], i32 [[Y:%.*]] ; CHECK-NEXT: ret <4 x float> [[R]] @@ -547,9 +547,9 @@ define <4 x float> @insert_in_nonsplat(float %x, <4 x float> %y) { ; CHECK-LABEL: @insert_in_nonsplat( -; CHECK-NEXT: [[XV:%.*]] = insertelement <4 x float> undef, float [[X:%.*]], i32 0 +; CHECK-NEXT: [[XV:%.*]] = insertelement <4 x float> undef, float [[X:%.*]], i64 0 ; CHECK-NEXT: [[SPLAT:%.*]] = shufflevector <4 x float> [[XV]], <4 x float> [[Y:%.*]], <4 x i32> -; CHECK-NEXT: [[R:%.*]] = insertelement <4 x float> [[SPLAT]], float [[X]], i32 3 +; CHECK-NEXT: [[R:%.*]] = insertelement <4 x float> [[SPLAT]], float [[X]], i64 3 ; CHECK-NEXT: ret <4 x float> [[R]] ; %xv = insertelement <4 x float> undef, float %x, i32 0 @@ -562,9 +562,9 @@ define <4 x float> @insert_in_nonsplat2(float %x, <4 x float> %y) { ; CHECK-LABEL: @insert_in_nonsplat2( -; CHECK-NEXT: [[XV:%.*]] = insertelement <4 x float> [[Y:%.*]], float [[X:%.*]], i32 0 +; CHECK-NEXT: [[XV:%.*]] = insertelement <4 x float> [[Y:%.*]], float [[X:%.*]], i64 0 ; CHECK-NEXT: [[SPLAT:%.*]] = shufflevector <4 x float> [[XV]], <4 x float> undef, <4 x i32> -; CHECK-NEXT: [[R:%.*]] = insertelement <4 x float> [[SPLAT]], float [[X]], i32 3 +; CHECK-NEXT: [[R:%.*]] = insertelement <4 x float> [[SPLAT]], float [[X]], i64 3 ; CHECK-NEXT: ret <4 x float> [[R]] ; %xv = insertelement <4 x float> %y, float %x, i32 0 @@ -576,7 +576,7 @@ define <4 x i8> @shuf_identity_padding(<2 x i8> %x, i8 %y) { ; CHECK-LABEL: @shuf_identity_padding( ; CHECK-NEXT: [[V1:%.*]] = shufflevector <2 x i8> [[X:%.*]], <2 x i8> undef, <4 x i32> -; CHECK-NEXT: [[V2:%.*]] = insertelement <4 x i8> [[V1]], i8 [[Y:%.*]], i32 2 +; CHECK-NEXT: [[V2:%.*]] = insertelement <4 x i8> [[V1]], i8 [[Y:%.*]], i64 2 ; CHECK-NEXT: ret <4 x i8> [[V2]] ; %v0 = shufflevector <2 x i8> %x, <2 x i8> undef, <4 x i32> @@ -589,7 +589,7 @@ define <3 x i8> @shuf_identity_extract(<4 x i8> %x, i8 %y) { ; CHECK-LABEL: @shuf_identity_extract( ; CHECK-NEXT: [[V1:%.*]] = shufflevector <4 x i8> [[X:%.*]], <4 x i8> undef, <3 x i32> -; CHECK-NEXT: [[V2:%.*]] = insertelement <3 x i8> [[V1]], i8 [[Y:%.*]], i32 2 +; CHECK-NEXT: [[V2:%.*]] = insertelement <3 x i8> [[V1]], i8 [[Y:%.*]], i64 2 ; CHECK-NEXT: ret <3 x i8> [[V2]] ; %v0 = shufflevector <4 x i8> %x, <4 x i8> undef, <3 x i32> @@ -604,7 +604,7 @@ ; CHECK-NEXT: [[V0:%.*]] = shufflevector <6 x float> [[X:%.*]], <6 x float> undef, <4 x i32> ; CHECK-NEXT: call void @use(<4 x float> [[V0]]) ; CHECK-NEXT: [[V1:%.*]] = shufflevector <6 x float> [[X]], <6 x float> undef, <4 x i32> -; CHECK-NEXT: [[V2:%.*]] = insertelement <4 x float> [[V1]], float [[Y:%.*]], i32 1 +; CHECK-NEXT: [[V2:%.*]] = insertelement <4 x float> [[V1]], float [[Y:%.*]], i64 1 ; CHECK-NEXT: ret <4 x float> [[V2]] ; %v0 = shufflevector <6 x float> %x, <6 x float> undef, <4 x i32> @@ -622,7 +622,7 @@ ; CHECK-NEXT: [[V0:%.*]] = shufflevector <2 x i8> [[X:%.*]], <2 x i8> undef, <4 x i32> ; CHECK-NEXT: [[X1:%.*]] = extractelement <2 x i8> [[X]], i32 [[INDEX:%.*]] ; CHECK-NEXT: [[V1:%.*]] = insertelement <4 x i8> [[V0]], i8 [[X1]], i32 [[INDEX]] -; CHECK-NEXT: [[V2:%.*]] = insertelement <4 x i8> [[V1]], i8 [[Y:%.*]], i32 2 +; CHECK-NEXT: [[V2:%.*]] = insertelement <4 x i8> [[V1]], i8 [[Y:%.*]], i64 2 ; CHECK-NEXT: ret <4 x i8> [[V2]] ; %v0 = shufflevector <2 x i8> %x, <2 x i8> undef, <4 x i32> @@ -637,9 +637,9 @@ define <4 x i8> @shuf_identity_padding_wrong_source_vec(<2 x i8> %x, i8 %y, <2 x i8> %other) { ; CHECK-LABEL: @shuf_identity_padding_wrong_source_vec( ; CHECK-NEXT: [[V0:%.*]] = shufflevector <2 x i8> [[X:%.*]], <2 x i8> undef, <4 x i32> -; CHECK-NEXT: [[X1:%.*]] = extractelement <2 x i8> [[OTHER:%.*]], i32 1 -; CHECK-NEXT: [[V1:%.*]] = insertelement <4 x i8> [[V0]], i8 [[X1]], i32 1 -; CHECK-NEXT: [[V2:%.*]] = insertelement <4 x i8> [[V1]], i8 [[Y:%.*]], i32 2 +; CHECK-NEXT: [[X1:%.*]] = extractelement <2 x i8> [[OTHER:%.*]], i64 1 +; CHECK-NEXT: [[V1:%.*]] = insertelement <4 x i8> [[V0]], i8 [[X1]], i64 1 +; CHECK-NEXT: [[V2:%.*]] = insertelement <4 x i8> [[V1]], i8 [[Y:%.*]], i64 2 ; CHECK-NEXT: ret <4 x i8> [[V2]] ; %v0 = shufflevector <2 x i8> %x, <2 x i8> undef, <4 x i32> @@ -654,9 +654,9 @@ define <4 x i8> @shuf_identity_padding_wrong_index(<2 x i8> %x, i8 %y) { ; CHECK-LABEL: @shuf_identity_padding_wrong_index( ; CHECK-NEXT: [[V0:%.*]] = shufflevector <2 x i8> [[X:%.*]], <2 x i8> undef, <4 x i32> -; CHECK-NEXT: [[X1:%.*]] = extractelement <2 x i8> [[X]], i32 1 -; CHECK-NEXT: [[V1:%.*]] = insertelement <4 x i8> [[V0]], i8 [[X1]], i32 2 -; CHECK-NEXT: [[V2:%.*]] = insertelement <4 x i8> [[V1]], i8 [[Y:%.*]], i32 3 +; CHECK-NEXT: [[X1:%.*]] = extractelement <2 x i8> [[X]], i64 1 +; CHECK-NEXT: [[V1:%.*]] = insertelement <4 x i8> [[V0]], i8 [[X1]], i64 2 +; CHECK-NEXT: [[V2:%.*]] = insertelement <4 x i8> [[V1]], i8 [[Y:%.*]], i64 3 ; CHECK-NEXT: ret <4 x i8> [[V2]] ; %v0 = shufflevector <2 x i8> %x, <2 x i8> undef, <4 x i32> @@ -668,7 +668,7 @@ define <4 x float> @insert_undemanded_element_op0(<4 x float> %x, <4 x float> %y) { ; CHECK-LABEL: @insert_undemanded_element_op0( -; CHECK-NEXT: [[INS:%.*]] = insertelement <4 x float> [[X:%.*]], float 4.200000e+01, i32 3 +; CHECK-NEXT: [[INS:%.*]] = insertelement <4 x float> [[X:%.*]], float 4.200000e+01, i64 3 ; CHECK-NEXT: call void @use(<4 x float> [[INS]]) ; CHECK-NEXT: [[S:%.*]] = shufflevector <4 x float> [[X]], <4 x float> [[Y:%.*]], <4 x i32> ; CHECK-NEXT: ret <4 x float> [[S]] @@ -681,7 +681,7 @@ define <4 x float> @insert_undemanded_element_op1(<4 x float> %x, <4 x float> %y) { ; CHECK-LABEL: @insert_undemanded_element_op1( -; CHECK-NEXT: [[INS:%.*]] = insertelement <4 x float> [[X:%.*]], float 4.200000e+01, i32 3 +; CHECK-NEXT: [[INS:%.*]] = insertelement <4 x float> [[X:%.*]], float 4.200000e+01, i64 3 ; CHECK-NEXT: call void @use(<4 x float> [[INS]]) ; CHECK-NEXT: [[S:%.*]] = shufflevector <4 x float> [[Y:%.*]], <4 x float> [[X]], <4 x i32> ; CHECK-NEXT: ret <4 x float> [[S]] @@ -694,7 +694,7 @@ define <5 x float> @insert_undemanded_element_unequal_length_op0(<4 x float> %x, <4 x float> %y) { ; CHECK-LABEL: @insert_undemanded_element_unequal_length_op0( -; CHECK-NEXT: [[INS:%.*]] = insertelement <4 x float> [[X:%.*]], float 4.200000e+01, i32 3 +; CHECK-NEXT: [[INS:%.*]] = insertelement <4 x float> [[X:%.*]], float 4.200000e+01, i64 3 ; CHECK-NEXT: call void @use(<4 x float> [[INS]]) ; CHECK-NEXT: [[S:%.*]] = shufflevector <4 x float> [[X]], <4 x float> [[Y:%.*]], <5 x i32> ; CHECK-NEXT: ret <5 x float> [[S]] @@ -707,7 +707,7 @@ define <5 x float> @insert_undemanded_element_unequal_length_op1(<4 x float> %x, <4 x float> %y) { ; CHECK-LABEL: @insert_undemanded_element_unequal_length_op1( -; CHECK-NEXT: [[INS:%.*]] = insertelement <4 x float> [[X:%.*]], float 4.200000e+01, i32 3 +; CHECK-NEXT: [[INS:%.*]] = insertelement <4 x float> [[X:%.*]], float 4.200000e+01, i64 3 ; CHECK-NEXT: call void @use(<4 x float> [[INS]]) ; CHECK-NEXT: [[S:%.*]] = shufflevector <4 x float> [[Y:%.*]], <4 x float> [[X]], <5 x i32> ; CHECK-NEXT: ret <5 x float> [[S]] @@ -722,7 +722,7 @@ define <4 x float> @insert_demanded_element_op0(<4 x float> %x, <4 x float> %y) { ; CHECK-LABEL: @insert_demanded_element_op0( -; CHECK-NEXT: [[INS:%.*]] = insertelement <4 x float> [[X:%.*]], float 4.200000e+01, i32 3 +; CHECK-NEXT: [[INS:%.*]] = insertelement <4 x float> [[X:%.*]], float 4.200000e+01, i64 3 ; CHECK-NEXT: call void @use(<4 x float> [[INS]]) ; CHECK-NEXT: [[S:%.*]] = shufflevector <4 x float> [[INS]], <4 x float> [[Y:%.*]], <4 x i32> ; CHECK-NEXT: ret <4 x float> [[S]] @@ -737,7 +737,7 @@ define <4 x float> @insert_demanded_element_op1(<4 x float> %x, <4 x float> %y) { ; CHECK-LABEL: @insert_demanded_element_op1( -; CHECK-NEXT: [[INS:%.*]] = insertelement <4 x float> [[X:%.*]], float 4.300000e+01, i32 3 +; CHECK-NEXT: [[INS:%.*]] = insertelement <4 x float> [[X:%.*]], float 4.300000e+01, i64 3 ; CHECK-NEXT: call void @use(<4 x float> [[INS]]) ; CHECK-NEXT: [[S:%.*]] = shufflevector <4 x float> [[Y:%.*]], <4 x float> [[INS]], <4 x i32> ; CHECK-NEXT: ret <4 x float> [[S]] @@ -752,7 +752,7 @@ define <5 x float> @insert_demanded_element_unequal_length_op0(<4 x float> %x, <4 x float> %y) { ; CHECK-LABEL: @insert_demanded_element_unequal_length_op0( -; CHECK-NEXT: [[INS:%.*]] = insertelement <4 x float> [[X:%.*]], float 4.200000e+01, i32 3 +; CHECK-NEXT: [[INS:%.*]] = insertelement <4 x float> [[X:%.*]], float 4.200000e+01, i64 3 ; CHECK-NEXT: call void @use(<4 x float> [[INS]]) ; CHECK-NEXT: [[S:%.*]] = shufflevector <4 x float> [[INS]], <4 x float> [[Y:%.*]], <5 x i32> ; CHECK-NEXT: ret <5 x float> [[S]] @@ -767,7 +767,7 @@ define <5 x float> @insert_demanded_element_unequal_length_op1(<4 x float> %x, <4 x float> %y) { ; CHECK-LABEL: @insert_demanded_element_unequal_length_op1( -; CHECK-NEXT: [[INS:%.*]] = insertelement <4 x float> [[X:%.*]], float 4.300000e+01, i32 3 +; CHECK-NEXT: [[INS:%.*]] = insertelement <4 x float> [[X:%.*]], float 4.300000e+01, i64 3 ; CHECK-NEXT: call void @use(<4 x float> [[INS]]) ; CHECK-NEXT: [[S:%.*]] = shufflevector <4 x float> [[Y:%.*]], <4 x float> [[INS]], <5 x i32> ; CHECK-NEXT: ret <5 x float> [[S]] @@ -780,7 +780,7 @@ define <4 x float> @splat_constant(<4 x float> %x) { ; CHECK-LABEL: @splat_constant( -; CHECK-NEXT: [[INS3:%.*]] = insertelement <4 x float> [[X:%.*]], float 3.000000e+00, i32 3 +; CHECK-NEXT: [[INS3:%.*]] = insertelement <4 x float> [[X:%.*]], float 3.000000e+00, i64 3 ; CHECK-NEXT: [[R:%.*]] = fadd <4 x float> [[INS3]], ; CHECK-NEXT: ret <4 x float> [[R]] ; diff --git a/llvm/test/Transforms/InstCombine/insertelement-bitcast.ll b/llvm/test/Transforms/InstCombine/insertelement-bitcast.ll --- a/llvm/test/Transforms/InstCombine/insertelement-bitcast.ll +++ b/llvm/test/Transforms/InstCombine/insertelement-bitcast.ll @@ -6,7 +6,7 @@ define <4 x float> @bitcast_inselt(i32 %x, <4 x i32> %v) { ; CHECK-LABEL: @bitcast_inselt( -; CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x i32> [[V:%.*]], i32 [[X:%.*]], i32 0 +; CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x i32> [[V:%.*]], i32 [[X:%.*]], i64 0 ; CHECK-NEXT: [[R:%.*]] = bitcast <4 x i32> [[TMP1]] to <4 x float> ; CHECK-NEXT: ret <4 x float> [[R]] ; @@ -20,7 +20,7 @@ ; CHECK-LABEL: @bitcast_inselt_use1( ; CHECK-NEXT: [[XF:%.*]] = bitcast i32 [[X:%.*]] to float ; CHECK-NEXT: call void @use_f32(float [[XF]]) -; CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x i32> [[V:%.*]], i32 [[X]], i32 1 +; CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x i32> [[V:%.*]], i32 [[X]], i64 1 ; CHECK-NEXT: [[R:%.*]] = bitcast <4 x i32> [[TMP1]] to <4 x float> ; CHECK-NEXT: ret <4 x float> [[R]] ; @@ -54,7 +54,7 @@ ; CHECK-NEXT: call void @use_f32(float [[XF]]) ; CHECK-NEXT: [[VF:%.*]] = bitcast <4 x i32> [[V:%.*]] to <4 x float> ; CHECK-NEXT: call void @use_v4f32(<4 x float> [[VF]]) -; CHECK-NEXT: [[R:%.*]] = insertelement <4 x float> [[VF]], float [[XF]], i32 0 +; CHECK-NEXT: [[R:%.*]] = insertelement <4 x float> [[VF]], float [[XF]], i64 0 ; CHECK-NEXT: ret <4 x float> [[R]] ; %xf = bitcast i32 %x to float @@ -71,7 +71,7 @@ ; CHECK-LABEL: @bitcast_inselt_wrong_bitcast1( ; CHECK-NEXT: [[XF:%.*]] = bitcast i32 [[X:%.*]] to float ; CHECK-NEXT: [[VF:%.*]] = bitcast i64 [[NOTV:%.*]] to <2 x float> -; CHECK-NEXT: [[R:%.*]] = insertelement <2 x float> [[VF]], float [[XF]], i32 0 +; CHECK-NEXT: [[R:%.*]] = insertelement <2 x float> [[VF]], float [[XF]], i64 0 ; CHECK-NEXT: ret <2 x float> [[R]] ; %xf = bitcast i32 %x to float @@ -86,7 +86,7 @@ ; CHECK-LABEL: @bitcast_inselt_wrong_bitcast2( ; CHECK-NEXT: [[XF:%.*]] = bitcast <2 x i16> [[NOTSCALAR:%.*]] to float ; CHECK-NEXT: [[VF:%.*]] = bitcast <2 x i32> [[V:%.*]] to <2 x float> -; CHECK-NEXT: [[R:%.*]] = insertelement <2 x float> [[VF]], float [[XF]], i32 0 +; CHECK-NEXT: [[R:%.*]] = insertelement <2 x float> [[VF]], float [[XF]], i64 0 ; CHECK-NEXT: ret <2 x float> [[R]] ; %xf = bitcast <2 x i16> %notscalar to float diff --git a/llvm/test/Transforms/InstCombine/masked_intrinsics-inseltpoison.ll b/llvm/test/Transforms/InstCombine/masked_intrinsics-inseltpoison.ll --- a/llvm/test/Transforms/InstCombine/masked_intrinsics-inseltpoison.ll +++ b/llvm/test/Transforms/InstCombine/masked_intrinsics-inseltpoison.ll @@ -160,7 +160,7 @@ define void @store_demandedelts(<2 x double>* %ptr, double %val) { ; CHECK-LABEL: @store_demandedelts( -; CHECK-NEXT: [[VALVEC1:%.*]] = insertelement <2 x double> poison, double [[VAL:%.*]], i32 0 +; CHECK-NEXT: [[VALVEC1:%.*]] = insertelement <2 x double> poison, double [[VAL:%.*]], i64 0 ; CHECK-NEXT: call void @llvm.masked.store.v2f64.p0v2f64(<2 x double> [[VALVEC1]], <2 x double>* [[PTR:%.*]], i32 4, <2 x i1> ) ; CHECK-NEXT: ret void ; @@ -259,7 +259,7 @@ define void @scatter_demandedelts(double* %ptr, double %val) { ; CHECK-LABEL: @scatter_demandedelts( ; CHECK-NEXT: [[PTRS:%.*]] = getelementptr double, double* [[PTR:%.*]], <2 x i64> -; CHECK-NEXT: [[VALVEC1:%.*]] = insertelement <2 x double> poison, double [[VAL:%.*]], i32 0 +; CHECK-NEXT: [[VALVEC1:%.*]] = insertelement <2 x double> poison, double [[VAL:%.*]], i64 0 ; CHECK-NEXT: call void @llvm.masked.scatter.v2f64.v2p0f64(<2 x double> [[VALVEC1]], <2 x double*> [[PTRS]], i32 8, <2 x i1> ) ; CHECK-NEXT: ret void ; diff --git a/llvm/test/Transforms/InstCombine/masked_intrinsics.ll b/llvm/test/Transforms/InstCombine/masked_intrinsics.ll --- a/llvm/test/Transforms/InstCombine/masked_intrinsics.ll +++ b/llvm/test/Transforms/InstCombine/masked_intrinsics.ll @@ -160,7 +160,7 @@ define void @store_demandedelts(<2 x double>* %ptr, double %val) { ; CHECK-LABEL: @store_demandedelts( -; CHECK-NEXT: [[VALVEC1:%.*]] = insertelement <2 x double> undef, double [[VAL:%.*]], i32 0 +; CHECK-NEXT: [[VALVEC1:%.*]] = insertelement <2 x double> undef, double [[VAL:%.*]], i64 0 ; CHECK-NEXT: call void @llvm.masked.store.v2f64.p0v2f64(<2 x double> [[VALVEC1]], <2 x double>* [[PTR:%.*]], i32 4, <2 x i1> ) ; CHECK-NEXT: ret void ; @@ -259,7 +259,7 @@ define void @scatter_demandedelts(double* %ptr, double %val) { ; CHECK-LABEL: @scatter_demandedelts( ; CHECK-NEXT: [[PTRS:%.*]] = getelementptr double, double* [[PTR:%.*]], <2 x i64> -; CHECK-NEXT: [[VALVEC1:%.*]] = insertelement <2 x double> undef, double [[VAL:%.*]], i32 0 +; CHECK-NEXT: [[VALVEC1:%.*]] = insertelement <2 x double> undef, double [[VAL:%.*]], i64 0 ; CHECK-NEXT: call void @llvm.masked.scatter.v2f64.v2p0f64(<2 x double> [[VALVEC1]], <2 x double*> [[PTRS]], i32 8, <2 x i1> ) ; CHECK-NEXT: ret void ; diff --git a/llvm/test/Transforms/InstCombine/masked_intrinsics_keep_metadata.ll b/llvm/test/Transforms/InstCombine/masked_intrinsics_keep_metadata.ll --- a/llvm/test/Transforms/InstCombine/masked_intrinsics_keep_metadata.ll +++ b/llvm/test/Transforms/InstCombine/masked_intrinsics_keep_metadata.ll @@ -18,7 +18,7 @@ ; CHECK-LABEL: @mload2( ; CHECK-NEXT: b0: ; CHECK-NEXT: [[UNMASKEDLOAD:%.*]] = load <4 x i32>, <4 x i32>* @g0, align 16, !tbaa [[TBAA0]] -; CHECK-NEXT: [[TMP0:%.*]] = insertelement <4 x i32> [[UNMASKEDLOAD]], i32 0, i32 0 +; CHECK-NEXT: [[TMP0:%.*]] = insertelement <4 x i32> [[UNMASKEDLOAD]], i32 0, i64 0 ; CHECK-NEXT: ret <4 x i32> [[TMP0]] ; b0: diff --git a/llvm/test/Transforms/InstCombine/minmax-fold.ll b/llvm/test/Transforms/InstCombine/minmax-fold.ll --- a/llvm/test/Transforms/InstCombine/minmax-fold.ll +++ b/llvm/test/Transforms/InstCombine/minmax-fold.ll @@ -1080,8 +1080,8 @@ define i37 @add_umax_simplify(i37 %x) { ; CHECK-LABEL: @add_umax_simplify( -; CHECK-NEXT: [[A:%.*]] = add nuw i37 [[X:%.*]], 42 -; CHECK-NEXT: ret i37 [[A]] +; CHECK-NEXT: [[R:%.*]] = add nuw i37 [[X:%.*]], 42 +; CHECK-NEXT: ret i37 [[R]] ; %a = add nuw i37 %x, 42 %c = icmp ugt i37 %a, 42 @@ -1457,7 +1457,7 @@ ; CHECK-LABEL: @PR46271( ; CHECK-NEXT: [[A:%.*]] = icmp sgt <2 x i8> [[X:%.*]], ; CHECK-NEXT: [[B:%.*]] = select <2 x i1> [[A]], <2 x i8> [[X]], <2 x i8> -; CHECK-NEXT: [[TMP1:%.*]] = extractelement <2 x i8> [[B]], i32 1 +; CHECK-NEXT: [[TMP1:%.*]] = extractelement <2 x i8> [[B]], i64 1 ; CHECK-NEXT: [[R:%.*]] = xor i8 [[TMP1]], -1 ; CHECK-NEXT: ret i8 [[R]] ; diff --git a/llvm/test/Transforms/InstCombine/multi-size-address-space-pointer.ll b/llvm/test/Transforms/InstCombine/multi-size-address-space-pointer.ll --- a/llvm/test/Transforms/InstCombine/multi-size-address-space-pointer.ll +++ b/llvm/test/Transforms/InstCombine/multi-size-address-space-pointer.ll @@ -69,7 +69,7 @@ define i32 @test_combine_vector_ptrtoint(<2 x i32 addrspace(2)*> %a) { ; CHECK-LABEL: @test_combine_vector_ptrtoint( -; CHECK-NEXT: [[P:%.*]] = extractelement <2 x i32 addrspace(2)*> [[A:%.*]], i32 0 +; CHECK-NEXT: [[P:%.*]] = extractelement <2 x i32 addrspace(2)*> [[A:%.*]], i64 0 ; CHECK-NEXT: [[Y:%.*]] = load i32, i32 addrspace(2)* [[P]], align 4 ; CHECK-NEXT: ret i32 [[Y]] ; diff --git a/llvm/test/Transforms/InstCombine/pr38984-inseltpoison.ll b/llvm/test/Transforms/InstCombine/pr38984-inseltpoison.ll --- a/llvm/test/Transforms/InstCombine/pr38984-inseltpoison.ll +++ b/llvm/test/Transforms/InstCombine/pr38984-inseltpoison.ll @@ -25,7 +25,7 @@ ; CHECK-LABEL: @PR38984_2( ; CHECK-NEXT: entry: ; CHECK-NEXT: [[TMP0:%.*]] = load i16, i16* getelementptr ([4 x i16], [4 x i16]* @offsets, i16 0, i16 undef), align 2 -; CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x i16> poison, i16 [[TMP0]], i32 3 +; CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x i16> poison, i16 [[TMP0]], i64 3 ; CHECK-NEXT: [[TMP2:%.*]] = getelementptr i16, i16* getelementptr inbounds ([21 x i16], [21 x i16]* @a, i16 1, i16 0), <4 x i16> [[TMP1]] ; CHECK-NEXT: [[TMP3:%.*]] = getelementptr i16, i16* null, <4 x i16> [[TMP1]] ; CHECK-NEXT: [[TMP4:%.*]] = icmp eq <4 x i16*> [[TMP2]], [[TMP3]] diff --git a/llvm/test/Transforms/InstCombine/pr38984.ll b/llvm/test/Transforms/InstCombine/pr38984.ll --- a/llvm/test/Transforms/InstCombine/pr38984.ll +++ b/llvm/test/Transforms/InstCombine/pr38984.ll @@ -25,7 +25,7 @@ ; CHECK-LABEL: @PR38984_2( ; CHECK-NEXT: entry: ; CHECK-NEXT: [[TMP0:%.*]] = load i16, i16* getelementptr ([4 x i16], [4 x i16]* @offsets, i16 0, i16 undef), align 2 -; CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x i16> undef, i16 [[TMP0]], i32 3 +; CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x i16> undef, i16 [[TMP0]], i64 3 ; CHECK-NEXT: [[TMP2:%.*]] = getelementptr i16, i16* getelementptr inbounds ([21 x i16], [21 x i16]* @a, i16 1, i16 0), <4 x i16> [[TMP1]] ; CHECK-NEXT: [[TMP3:%.*]] = getelementptr i16, i16* null, <4 x i16> [[TMP1]] ; CHECK-NEXT: [[TMP4:%.*]] = icmp eq <4 x i16*> [[TMP2]], [[TMP3]] diff --git a/llvm/test/Transforms/InstCombine/reduction-add-sext-zext-i1.ll b/llvm/test/Transforms/InstCombine/reduction-add-sext-zext-i1.ll --- a/llvm/test/Transforms/InstCombine/reduction-add-sext-zext-i1.ll +++ b/llvm/test/Transforms/InstCombine/reduction-add-sext-zext-i1.ll @@ -70,7 +70,7 @@ ; CHECK-NEXT: [[TMP2:%.*]] = call i128 @llvm.ctpop.i128(i128 [[TMP1]]), !range [[RNG3]] ; CHECK-NEXT: [[TMP3:%.*]] = trunc i128 [[TMP2]] to i8 ; CHECK-NEXT: [[TMP4:%.*]] = sub i8 0, [[TMP3]] -; CHECK-NEXT: [[TMP5:%.*]] = extractelement <128 x i1> [[X]], i32 0 +; CHECK-NEXT: [[TMP5:%.*]] = extractelement <128 x i1> [[X]], i64 0 ; CHECK-NEXT: [[EXT:%.*]] = sext i1 [[TMP5]] to i8 ; CHECK-NEXT: store i8 [[EXT]], i8* @glob, align 1 ; CHECK-NEXT: ret i8 [[TMP4]] @@ -88,7 +88,7 @@ ; CHECK-NEXT: [[TMP1:%.*]] = bitcast <8 x i1> [[X:%.*]] to i8 ; CHECK-NEXT: [[TMP2:%.*]] = call i8 @llvm.ctpop.i8(i8 [[TMP1]]), !range [[RNG0]] ; CHECK-NEXT: [[TMP3:%.*]] = zext i8 [[TMP2]] to i64 -; CHECK-NEXT: [[TMP4:%.*]] = extractelement <8 x i1> [[X]], i32 0 +; CHECK-NEXT: [[TMP4:%.*]] = extractelement <8 x i1> [[X]], i64 0 ; CHECK-NEXT: [[EXT:%.*]] = zext i1 [[TMP4]] to i64 ; CHECK-NEXT: store i64 [[EXT]], i64* @glob1, align 8 ; CHECK-NEXT: ret i64 [[TMP3]] diff --git a/llvm/test/Transforms/InstCombine/reduction-and-sext-zext-i1.ll b/llvm/test/Transforms/InstCombine/reduction-and-sext-zext-i1.ll --- a/llvm/test/Transforms/InstCombine/reduction-and-sext-zext-i1.ll +++ b/llvm/test/Transforms/InstCombine/reduction-and-sext-zext-i1.ll @@ -65,7 +65,7 @@ ; CHECK-NEXT: [[TMP1:%.*]] = bitcast <128 x i1> [[X:%.*]] to i128 ; CHECK-NEXT: [[TMP2:%.*]] = icmp eq i128 [[TMP1]], -1 ; CHECK-NEXT: [[TMP3:%.*]] = sext i1 [[TMP2]] to i8 -; CHECK-NEXT: [[TMP4:%.*]] = extractelement <128 x i1> [[X]], i32 0 +; CHECK-NEXT: [[TMP4:%.*]] = extractelement <128 x i1> [[X]], i64 0 ; CHECK-NEXT: [[EXT:%.*]] = sext i1 [[TMP4]] to i8 ; CHECK-NEXT: store i8 [[EXT]], i8* @glob, align 1 ; CHECK-NEXT: ret i8 [[TMP3]] @@ -83,7 +83,7 @@ ; CHECK-NEXT: [[TMP1:%.*]] = bitcast <8 x i1> [[X:%.*]] to i8 ; CHECK-NEXT: [[TMP2:%.*]] = icmp eq i8 [[TMP1]], -1 ; CHECK-NEXT: [[TMP3:%.*]] = zext i1 [[TMP2]] to i64 -; CHECK-NEXT: [[TMP4:%.*]] = extractelement <8 x i1> [[X]], i32 0 +; CHECK-NEXT: [[TMP4:%.*]] = extractelement <8 x i1> [[X]], i64 0 ; CHECK-NEXT: [[EXT:%.*]] = zext i1 [[TMP4]] to i64 ; CHECK-NEXT: store i64 [[EXT]], i64* @glob1, align 8 ; CHECK-NEXT: ret i64 [[TMP3]] diff --git a/llvm/test/Transforms/InstCombine/reduction-mul-sext-zext-i1.ll b/llvm/test/Transforms/InstCombine/reduction-mul-sext-zext-i1.ll --- a/llvm/test/Transforms/InstCombine/reduction-mul-sext-zext-i1.ll +++ b/llvm/test/Transforms/InstCombine/reduction-mul-sext-zext-i1.ll @@ -65,7 +65,7 @@ ; CHECK-NEXT: [[TMP1:%.*]] = bitcast <128 x i1> [[X:%.*]] to i128 ; CHECK-NEXT: [[TMP2:%.*]] = icmp eq i128 [[TMP1]], -1 ; CHECK-NEXT: [[TMP3:%.*]] = zext i1 [[TMP2]] to i8 -; CHECK-NEXT: [[TMP4:%.*]] = extractelement <128 x i1> [[X]], i32 0 +; CHECK-NEXT: [[TMP4:%.*]] = extractelement <128 x i1> [[X]], i64 0 ; CHECK-NEXT: [[EXT:%.*]] = sext i1 [[TMP4]] to i8 ; CHECK-NEXT: store i8 [[EXT]], i8* @glob, align 1 ; CHECK-NEXT: ret i8 [[TMP3]] @@ -83,7 +83,7 @@ ; CHECK-NEXT: [[TMP1:%.*]] = bitcast <8 x i1> [[X:%.*]] to i8 ; CHECK-NEXT: [[TMP2:%.*]] = icmp eq i8 [[TMP1]], -1 ; CHECK-NEXT: [[TMP3:%.*]] = zext i1 [[TMP2]] to i64 -; CHECK-NEXT: [[TMP4:%.*]] = extractelement <8 x i1> [[X]], i32 0 +; CHECK-NEXT: [[TMP4:%.*]] = extractelement <8 x i1> [[X]], i64 0 ; CHECK-NEXT: [[EXT:%.*]] = zext i1 [[TMP4]] to i64 ; CHECK-NEXT: store i64 [[EXT]], i64* @glob1, align 8 ; CHECK-NEXT: ret i64 [[TMP3]] diff --git a/llvm/test/Transforms/InstCombine/reduction-or-sext-zext-i1.ll b/llvm/test/Transforms/InstCombine/reduction-or-sext-zext-i1.ll --- a/llvm/test/Transforms/InstCombine/reduction-or-sext-zext-i1.ll +++ b/llvm/test/Transforms/InstCombine/reduction-or-sext-zext-i1.ll @@ -65,7 +65,7 @@ ; CHECK-NEXT: [[TMP1:%.*]] = bitcast <128 x i1> [[X:%.*]] to i128 ; CHECK-NEXT: [[TMP2:%.*]] = icmp ne i128 [[TMP1]], 0 ; CHECK-NEXT: [[TMP3:%.*]] = sext i1 [[TMP2]] to i8 -; CHECK-NEXT: [[TMP4:%.*]] = extractelement <128 x i1> [[X]], i32 0 +; CHECK-NEXT: [[TMP4:%.*]] = extractelement <128 x i1> [[X]], i64 0 ; CHECK-NEXT: [[EXT:%.*]] = sext i1 [[TMP4]] to i8 ; CHECK-NEXT: store i8 [[EXT]], i8* @glob, align 1 ; CHECK-NEXT: ret i8 [[TMP3]] @@ -83,7 +83,7 @@ ; CHECK-NEXT: [[TMP1:%.*]] = bitcast <8 x i1> [[X:%.*]] to i8 ; CHECK-NEXT: [[TMP2:%.*]] = icmp ne i8 [[TMP1]], 0 ; CHECK-NEXT: [[TMP3:%.*]] = zext i1 [[TMP2]] to i64 -; CHECK-NEXT: [[TMP4:%.*]] = extractelement <8 x i1> [[X]], i32 0 +; CHECK-NEXT: [[TMP4:%.*]] = extractelement <8 x i1> [[X]], i64 0 ; CHECK-NEXT: [[EXT:%.*]] = zext i1 [[TMP4]] to i64 ; CHECK-NEXT: store i64 [[EXT]], i64* @glob1, align 8 ; CHECK-NEXT: ret i64 [[TMP3]] diff --git a/llvm/test/Transforms/InstCombine/reduction-smax-sext-zext-i1.ll b/llvm/test/Transforms/InstCombine/reduction-smax-sext-zext-i1.ll --- a/llvm/test/Transforms/InstCombine/reduction-smax-sext-zext-i1.ll +++ b/llvm/test/Transforms/InstCombine/reduction-smax-sext-zext-i1.ll @@ -65,7 +65,7 @@ ; CHECK-NEXT: [[TMP1:%.*]] = bitcast <128 x i1> [[X:%.*]] to i128 ; CHECK-NEXT: [[TMP2:%.*]] = icmp eq i128 [[TMP1]], -1 ; CHECK-NEXT: [[TMP3:%.*]] = sext i1 [[TMP2]] to i8 -; CHECK-NEXT: [[TMP4:%.*]] = extractelement <128 x i1> [[X]], i32 0 +; CHECK-NEXT: [[TMP4:%.*]] = extractelement <128 x i1> [[X]], i64 0 ; CHECK-NEXT: [[EXT:%.*]] = sext i1 [[TMP4]] to i8 ; CHECK-NEXT: store i8 [[EXT]], i8* @glob, align 1 ; CHECK-NEXT: ret i8 [[TMP3]] @@ -83,7 +83,7 @@ ; CHECK-NEXT: [[TMP1:%.*]] = bitcast <8 x i1> [[X:%.*]] to i8 ; CHECK-NEXT: [[TMP2:%.*]] = icmp ne i8 [[TMP1]], 0 ; CHECK-NEXT: [[TMP3:%.*]] = zext i1 [[TMP2]] to i64 -; CHECK-NEXT: [[TMP4:%.*]] = extractelement <8 x i1> [[X]], i32 0 +; CHECK-NEXT: [[TMP4:%.*]] = extractelement <8 x i1> [[X]], i64 0 ; CHECK-NEXT: [[EXT:%.*]] = zext i1 [[TMP4]] to i64 ; CHECK-NEXT: store i64 [[EXT]], i64* @glob1, align 8 ; CHECK-NEXT: ret i64 [[TMP3]] diff --git a/llvm/test/Transforms/InstCombine/reduction-smin-sext-zext-i1.ll b/llvm/test/Transforms/InstCombine/reduction-smin-sext-zext-i1.ll --- a/llvm/test/Transforms/InstCombine/reduction-smin-sext-zext-i1.ll +++ b/llvm/test/Transforms/InstCombine/reduction-smin-sext-zext-i1.ll @@ -65,7 +65,7 @@ ; CHECK-NEXT: [[TMP1:%.*]] = bitcast <128 x i1> [[X:%.*]] to i128 ; CHECK-NEXT: [[TMP2:%.*]] = icmp ne i128 [[TMP1]], 0 ; CHECK-NEXT: [[TMP3:%.*]] = sext i1 [[TMP2]] to i8 -; CHECK-NEXT: [[TMP4:%.*]] = extractelement <128 x i1> [[X]], i32 0 +; CHECK-NEXT: [[TMP4:%.*]] = extractelement <128 x i1> [[X]], i64 0 ; CHECK-NEXT: [[EXT:%.*]] = sext i1 [[TMP4]] to i8 ; CHECK-NEXT: store i8 [[EXT]], i8* @glob, align 1 ; CHECK-NEXT: ret i8 [[TMP3]] @@ -83,7 +83,7 @@ ; CHECK-NEXT: [[TMP1:%.*]] = bitcast <8 x i1> [[X:%.*]] to i8 ; CHECK-NEXT: [[TMP2:%.*]] = icmp eq i8 [[TMP1]], -1 ; CHECK-NEXT: [[TMP3:%.*]] = zext i1 [[TMP2]] to i64 -; CHECK-NEXT: [[TMP4:%.*]] = extractelement <8 x i1> [[X]], i32 0 +; CHECK-NEXT: [[TMP4:%.*]] = extractelement <8 x i1> [[X]], i64 0 ; CHECK-NEXT: [[EXT:%.*]] = zext i1 [[TMP4]] to i64 ; CHECK-NEXT: store i64 [[EXT]], i64* @glob1, align 8 ; CHECK-NEXT: ret i64 [[TMP3]] diff --git a/llvm/test/Transforms/InstCombine/reduction-umax-sext-zext-i1.ll b/llvm/test/Transforms/InstCombine/reduction-umax-sext-zext-i1.ll --- a/llvm/test/Transforms/InstCombine/reduction-umax-sext-zext-i1.ll +++ b/llvm/test/Transforms/InstCombine/reduction-umax-sext-zext-i1.ll @@ -65,7 +65,7 @@ ; CHECK-NEXT: [[TMP1:%.*]] = bitcast <128 x i1> [[X:%.*]] to i128 ; CHECK-NEXT: [[TMP2:%.*]] = icmp ne i128 [[TMP1]], 0 ; CHECK-NEXT: [[TMP3:%.*]] = sext i1 [[TMP2]] to i8 -; CHECK-NEXT: [[TMP4:%.*]] = extractelement <128 x i1> [[X]], i32 0 +; CHECK-NEXT: [[TMP4:%.*]] = extractelement <128 x i1> [[X]], i64 0 ; CHECK-NEXT: [[EXT:%.*]] = sext i1 [[TMP4]] to i8 ; CHECK-NEXT: store i8 [[EXT]], i8* @glob, align 1 ; CHECK-NEXT: ret i8 [[TMP3]] @@ -83,7 +83,7 @@ ; CHECK-NEXT: [[TMP1:%.*]] = bitcast <8 x i1> [[X:%.*]] to i8 ; CHECK-NEXT: [[TMP2:%.*]] = icmp ne i8 [[TMP1]], 0 ; CHECK-NEXT: [[TMP3:%.*]] = zext i1 [[TMP2]] to i64 -; CHECK-NEXT: [[TMP4:%.*]] = extractelement <8 x i1> [[X]], i32 0 +; CHECK-NEXT: [[TMP4:%.*]] = extractelement <8 x i1> [[X]], i64 0 ; CHECK-NEXT: [[EXT:%.*]] = zext i1 [[TMP4]] to i64 ; CHECK-NEXT: store i64 [[EXT]], i64* @glob1, align 8 ; CHECK-NEXT: ret i64 [[TMP3]] diff --git a/llvm/test/Transforms/InstCombine/reduction-umin-sext-zext-i1.ll b/llvm/test/Transforms/InstCombine/reduction-umin-sext-zext-i1.ll --- a/llvm/test/Transforms/InstCombine/reduction-umin-sext-zext-i1.ll +++ b/llvm/test/Transforms/InstCombine/reduction-umin-sext-zext-i1.ll @@ -65,7 +65,7 @@ ; CHECK-NEXT: [[TMP1:%.*]] = bitcast <128 x i1> [[X:%.*]] to i128 ; CHECK-NEXT: [[TMP2:%.*]] = icmp eq i128 [[TMP1]], -1 ; CHECK-NEXT: [[TMP3:%.*]] = sext i1 [[TMP2]] to i8 -; CHECK-NEXT: [[TMP4:%.*]] = extractelement <128 x i1> [[X]], i32 0 +; CHECK-NEXT: [[TMP4:%.*]] = extractelement <128 x i1> [[X]], i64 0 ; CHECK-NEXT: [[EXT:%.*]] = sext i1 [[TMP4]] to i8 ; CHECK-NEXT: store i8 [[EXT]], i8* @glob, align 1 ; CHECK-NEXT: ret i8 [[TMP3]] @@ -83,7 +83,7 @@ ; CHECK-NEXT: [[TMP1:%.*]] = bitcast <8 x i1> [[X:%.*]] to i8 ; CHECK-NEXT: [[TMP2:%.*]] = icmp eq i8 [[TMP1]], -1 ; CHECK-NEXT: [[TMP3:%.*]] = zext i1 [[TMP2]] to i64 -; CHECK-NEXT: [[TMP4:%.*]] = extractelement <8 x i1> [[X]], i32 0 +; CHECK-NEXT: [[TMP4:%.*]] = extractelement <8 x i1> [[X]], i64 0 ; CHECK-NEXT: [[EXT:%.*]] = zext i1 [[TMP4]] to i64 ; CHECK-NEXT: store i64 [[EXT]], i64* @glob1, align 8 ; CHECK-NEXT: ret i64 [[TMP3]] diff --git a/llvm/test/Transforms/InstCombine/reduction-xor-sext-zext-i1.ll b/llvm/test/Transforms/InstCombine/reduction-xor-sext-zext-i1.ll --- a/llvm/test/Transforms/InstCombine/reduction-xor-sext-zext-i1.ll +++ b/llvm/test/Transforms/InstCombine/reduction-xor-sext-zext-i1.ll @@ -75,7 +75,7 @@ ; CHECK-NEXT: [[TMP3:%.*]] = trunc i128 [[TMP2]] to i8 ; CHECK-NEXT: [[TMP4:%.*]] = and i8 [[TMP3]], 1 ; CHECK-NEXT: [[TMP5:%.*]] = sub nsw i8 0, [[TMP4]] -; CHECK-NEXT: [[TMP6:%.*]] = extractelement <128 x i1> [[X]], i32 0 +; CHECK-NEXT: [[TMP6:%.*]] = extractelement <128 x i1> [[X]], i64 0 ; CHECK-NEXT: [[EXT:%.*]] = sext i1 [[TMP6]] to i8 ; CHECK-NEXT: store i8 [[EXT]], i8* @glob, align 1 ; CHECK-NEXT: ret i8 [[TMP5]] @@ -94,7 +94,7 @@ ; CHECK-NEXT: [[TMP2:%.*]] = call i8 @llvm.ctpop.i8(i8 [[TMP1]]), !range [[RNG0]] ; CHECK-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], 1 ; CHECK-NEXT: [[TMP4:%.*]] = zext i8 [[TMP3]] to i64 -; CHECK-NEXT: [[TMP5:%.*]] = extractelement <8 x i1> [[X]], i32 0 +; CHECK-NEXT: [[TMP5:%.*]] = extractelement <8 x i1> [[X]], i64 0 ; CHECK-NEXT: [[EXT:%.*]] = zext i1 [[TMP5]] to i64 ; CHECK-NEXT: store i64 [[EXT]], i64* @glob1, align 8 ; CHECK-NEXT: ret i64 [[TMP4]] diff --git a/llvm/test/Transforms/InstCombine/scalarization-inseltpoison.ll b/llvm/test/Transforms/InstCombine/scalarization-inseltpoison.ll --- a/llvm/test/Transforms/InstCombine/scalarization-inseltpoison.ll +++ b/llvm/test/Transforms/InstCombine/scalarization-inseltpoison.ll @@ -5,7 +5,7 @@ ; ; CHECK-LABEL: @extract_load( ; CHECK-NEXT: [[X:%.*]] = load <4 x i32>, <4 x i32>* [[P:%.*]], align 4 -; CHECK-NEXT: [[EXT:%.*]] = extractelement <4 x i32> [[X]], i32 1 +; CHECK-NEXT: [[EXT:%.*]] = extractelement <4 x i32> [[X]], i64 1 ; CHECK-NEXT: ret i32 [[EXT]] ; %x = load <4 x i32>, <4 x i32>* %p, align 4 @@ -17,7 +17,7 @@ ; ; CHECK-LABEL: @extract_load_fp( ; CHECK-NEXT: [[X:%.*]] = load <4 x double>, <4 x double>* [[P:%.*]], align 32 -; CHECK-NEXT: [[EXT:%.*]] = extractelement <4 x double> [[X]], i32 3 +; CHECK-NEXT: [[EXT:%.*]] = extractelement <4 x double> [[X]], i64 3 ; CHECK-NEXT: ret double [[EXT]] ; %x = load <4 x double>, <4 x double>* %p, align 32 @@ -29,7 +29,7 @@ ; ; CHECK-LABEL: @extract_load_volatile( ; CHECK-NEXT: [[X:%.*]] = load volatile <4 x double>, <4 x double>* [[P:%.*]], align 32 -; CHECK-NEXT: [[EXT:%.*]] = extractelement <4 x double> [[X]], i32 2 +; CHECK-NEXT: [[EXT:%.*]] = extractelement <4 x double> [[X]], i64 2 ; CHECK-NEXT: ret double [[EXT]] ; %x = load volatile <4 x double>, <4 x double>* %p @@ -41,7 +41,7 @@ ; ; CHECK-LABEL: @extract_load_extra_use( ; CHECK-NEXT: [[X:%.*]] = load <4 x double>, <4 x double>* [[P:%.*]], align 8 -; CHECK-NEXT: [[EXT:%.*]] = extractelement <4 x double> [[X]], i32 0 +; CHECK-NEXT: [[EXT:%.*]] = extractelement <4 x double> [[X]], i64 0 ; CHECK-NEXT: store <4 x double> [[X]], <4 x double>* [[P2:%.*]], align 32 ; CHECK-NEXT: ret double [[EXT]] ; @@ -111,7 +111,7 @@ define float @extract_element_binop_splat_constant_index(<4 x float> %x) { ; ; CHECK-LABEL: @extract_element_binop_splat_constant_index( -; CHECK-NEXT: [[TMP1:%.*]] = extractelement <4 x float> [[X:%.*]], i32 2 +; CHECK-NEXT: [[TMP1:%.*]] = extractelement <4 x float> [[X:%.*]], i64 2 ; CHECK-NEXT: [[R:%.*]] = fadd float [[TMP1]], 0x4002A3D700000000 ; CHECK-NEXT: ret float [[R]] ; @@ -123,7 +123,7 @@ define double @extract_element_binop_splat_with_undef_constant_index(<2 x double> %x) { ; ; CHECK-LABEL: @extract_element_binop_splat_with_undef_constant_index( -; CHECK-NEXT: [[TMP1:%.*]] = extractelement <2 x double> [[X:%.*]], i32 0 +; CHECK-NEXT: [[TMP1:%.*]] = extractelement <2 x double> [[X:%.*]], i64 0 ; CHECK-NEXT: [[R:%.*]] = fdiv double 4.200000e+01, [[TMP1]] ; CHECK-NEXT: ret double [[R]] ; @@ -135,7 +135,7 @@ define float @extract_element_binop_nonsplat_constant_index(<2 x float> %x) { ; ; CHECK-LABEL: @extract_element_binop_nonsplat_constant_index( -; CHECK-NEXT: [[TMP1:%.*]] = extractelement <2 x float> [[X:%.*]], i32 1 +; CHECK-NEXT: [[TMP1:%.*]] = extractelement <2 x float> [[X:%.*]], i64 1 ; CHECK-NEXT: [[R:%.*]] = fmul float [[TMP1]], 4.300000e+01 ; CHECK-NEXT: ret float [[R]] ; @@ -184,8 +184,8 @@ ; ; CHECK-LABEL: @extract_element_load( ; CHECK-NEXT: [[LOAD:%.*]] = load <4 x float>, <4 x float>* [[PTR:%.*]], align 16 -; CHECK-NEXT: [[TMP1:%.*]] = extractelement <4 x float> [[LOAD]], i32 2 -; CHECK-NEXT: [[TMP2:%.*]] = extractelement <4 x float> [[X:%.*]], i32 2 +; CHECK-NEXT: [[TMP1:%.*]] = extractelement <4 x float> [[LOAD]], i64 2 +; CHECK-NEXT: [[TMP2:%.*]] = extractelement <4 x float> [[X:%.*]], i64 2 ; CHECK-NEXT: [[R:%.*]] = fadd float [[TMP1]], [[TMP2]] ; CHECK-NEXT: ret float [[R]] ; @@ -201,7 +201,7 @@ ; CHECK-NEXT: [[LOAD:%.*]] = load <4 x float>, <4 x float>* [[PTR0:%.*]], align 16 ; CHECK-NEXT: store <4 x float> [[LOAD]], <4 x float>* [[PTR1:%.*]], align 16 ; CHECK-NEXT: [[ADD:%.*]] = fadd <4 x float> [[LOAD]], [[X:%.*]] -; CHECK-NEXT: [[R:%.*]] = extractelement <4 x float> [[ADD]], i32 2 +; CHECK-NEXT: [[R:%.*]] = extractelement <4 x float> [[ADD]], i64 2 ; CHECK-NEXT: ret float [[R]] ; %load = load <4 x float>, <4 x float>* %ptr0 @@ -226,7 +226,7 @@ define float @extelt_binop_insertelt(<4 x float> %A, <4 x float> %B, float %f) { ; ; CHECK-LABEL: @extelt_binop_insertelt( -; CHECK-NEXT: [[TMP1:%.*]] = extractelement <4 x float> [[B:%.*]], i32 0 +; CHECK-NEXT: [[TMP1:%.*]] = extractelement <4 x float> [[B:%.*]], i64 0 ; CHECK-NEXT: [[E:%.*]] = fmul nnan float [[TMP1]], [[F:%.*]] ; CHECK-NEXT: ret float [[E]] ; @@ -242,9 +242,9 @@ define i32 @extelt_binop_binop_insertelt(<4 x i32> %A, <4 x i32> %B, i32 %f) { ; ; CHECK-LABEL: @extelt_binop_binop_insertelt( -; CHECK-NEXT: [[TMP1:%.*]] = extractelement <4 x i32> [[B:%.*]], i32 0 +; CHECK-NEXT: [[TMP1:%.*]] = extractelement <4 x i32> [[B:%.*]], i64 0 ; CHECK-NEXT: [[TMP2:%.*]] = add i32 [[TMP1]], [[F:%.*]] -; CHECK-NEXT: [[TMP3:%.*]] = extractelement <4 x i32> [[B]], i32 0 +; CHECK-NEXT: [[TMP3:%.*]] = extractelement <4 x i32> [[B]], i64 0 ; CHECK-NEXT: [[E:%.*]] = mul nsw i32 [[TMP2]], [[TMP3]] ; CHECK-NEXT: ret i32 [[E]] ; @@ -268,9 +268,9 @@ define i1 @cheap_to_extract_icmp(<4 x i32> %x, <4 x i1> %y) { ; ; CHECK-LABEL: @cheap_to_extract_icmp( -; CHECK-NEXT: [[TMP1:%.*]] = extractelement <4 x i32> [[X:%.*]], i32 2 +; CHECK-NEXT: [[TMP1:%.*]] = extractelement <4 x i32> [[X:%.*]], i64 2 ; CHECK-NEXT: [[TMP2:%.*]] = icmp eq i32 [[TMP1]], 0 -; CHECK-NEXT: [[TMP3:%.*]] = extractelement <4 x i1> [[Y:%.*]], i32 2 +; CHECK-NEXT: [[TMP3:%.*]] = extractelement <4 x i1> [[Y:%.*]], i64 2 ; CHECK-NEXT: [[R:%.*]] = and i1 [[TMP2]], [[TMP3]] ; CHECK-NEXT: ret i1 [[R]] ; @@ -283,9 +283,9 @@ define i1 @cheap_to_extract_fcmp(<4 x float> %x, <4 x i1> %y) { ; ; CHECK-LABEL: @cheap_to_extract_fcmp( -; CHECK-NEXT: [[TMP1:%.*]] = extractelement <4 x float> [[X:%.*]], i32 2 +; CHECK-NEXT: [[TMP1:%.*]] = extractelement <4 x float> [[X:%.*]], i64 2 ; CHECK-NEXT: [[TMP2:%.*]] = fcmp oeq float [[TMP1]], 0.000000e+00 -; CHECK-NEXT: [[TMP3:%.*]] = extractelement <4 x i1> [[Y:%.*]], i32 2 +; CHECK-NEXT: [[TMP3:%.*]] = extractelement <4 x i1> [[Y:%.*]], i64 2 ; CHECK-NEXT: [[R:%.*]] = and i1 [[TMP2]], [[TMP3]] ; CHECK-NEXT: ret i1 [[R]] ; @@ -298,7 +298,7 @@ define i1 @extractelt_vector_icmp_constrhs(<2 x i32> %arg) { ; ; CHECK-LABEL: @extractelt_vector_icmp_constrhs( -; CHECK-NEXT: [[TMP1:%.*]] = extractelement <2 x i32> [[ARG:%.*]], i32 0 +; CHECK-NEXT: [[TMP1:%.*]] = extractelement <2 x i32> [[ARG:%.*]], i64 0 ; CHECK-NEXT: [[EXT:%.*]] = icmp eq i32 [[TMP1]], 0 ; CHECK-NEXT: ret i1 [[EXT]] ; @@ -310,7 +310,7 @@ define i1 @extractelt_vector_fcmp_constrhs(<2 x float> %arg) { ; ; CHECK-LABEL: @extractelt_vector_fcmp_constrhs( -; CHECK-NEXT: [[TMP1:%.*]] = extractelement <2 x float> [[ARG:%.*]], i32 0 +; CHECK-NEXT: [[TMP1:%.*]] = extractelement <2 x float> [[ARG:%.*]], i64 0 ; CHECK-NEXT: [[EXT:%.*]] = fcmp oeq float [[TMP1]], 0.000000e+00 ; CHECK-NEXT: ret i1 [[EXT]] ; @@ -349,7 +349,7 @@ ; CHECK-NEXT: [[ADD:%.*]] = fadd <2 x float> [[ARG1:%.*]], [[ARG2:%.*]] ; CHECK-NEXT: store volatile <2 x float> [[ADD]], <2 x float>* undef, align 8 ; CHECK-NEXT: [[CMP:%.*]] = fcmp oeq <2 x float> [[ADD]], [[ARG0:%.*]] -; CHECK-NEXT: [[EXT:%.*]] = extractelement <2 x i1> [[CMP]], i32 0 +; CHECK-NEXT: [[EXT:%.*]] = extractelement <2 x i1> [[CMP]], i64 0 ; CHECK-NEXT: ret i1 [[EXT]] ; %add = fadd <2 x float> %arg1, %arg2 diff --git a/llvm/test/Transforms/InstCombine/scalarization.ll b/llvm/test/Transforms/InstCombine/scalarization.ll --- a/llvm/test/Transforms/InstCombine/scalarization.ll +++ b/llvm/test/Transforms/InstCombine/scalarization.ll @@ -5,7 +5,7 @@ ; ; CHECK-LABEL: @extract_load( ; CHECK-NEXT: [[X:%.*]] = load <4 x i32>, <4 x i32>* [[P:%.*]], align 4 -; CHECK-NEXT: [[EXT:%.*]] = extractelement <4 x i32> [[X]], i32 1 +; CHECK-NEXT: [[EXT:%.*]] = extractelement <4 x i32> [[X]], i64 1 ; CHECK-NEXT: ret i32 [[EXT]] ; %x = load <4 x i32>, <4 x i32>* %p, align 4 @@ -17,7 +17,7 @@ ; ; CHECK-LABEL: @extract_load_fp( ; CHECK-NEXT: [[X:%.*]] = load <4 x double>, <4 x double>* [[P:%.*]], align 32 -; CHECK-NEXT: [[EXT:%.*]] = extractelement <4 x double> [[X]], i32 3 +; CHECK-NEXT: [[EXT:%.*]] = extractelement <4 x double> [[X]], i64 3 ; CHECK-NEXT: ret double [[EXT]] ; %x = load <4 x double>, <4 x double>* %p, align 32 @@ -29,7 +29,7 @@ ; ; CHECK-LABEL: @extract_load_volatile( ; CHECK-NEXT: [[X:%.*]] = load volatile <4 x double>, <4 x double>* [[P:%.*]], align 32 -; CHECK-NEXT: [[EXT:%.*]] = extractelement <4 x double> [[X]], i32 2 +; CHECK-NEXT: [[EXT:%.*]] = extractelement <4 x double> [[X]], i64 2 ; CHECK-NEXT: ret double [[EXT]] ; %x = load volatile <4 x double>, <4 x double>* %p @@ -41,7 +41,7 @@ ; ; CHECK-LABEL: @extract_load_extra_use( ; CHECK-NEXT: [[X:%.*]] = load <4 x double>, <4 x double>* [[P:%.*]], align 8 -; CHECK-NEXT: [[EXT:%.*]] = extractelement <4 x double> [[X]], i32 0 +; CHECK-NEXT: [[EXT:%.*]] = extractelement <4 x double> [[X]], i64 0 ; CHECK-NEXT: store <4 x double> [[X]], <4 x double>* [[P2:%.*]], align 32 ; CHECK-NEXT: ret double [[EXT]] ; @@ -111,7 +111,7 @@ define float @extract_element_binop_splat_constant_index(<4 x float> %x) { ; ; CHECK-LABEL: @extract_element_binop_splat_constant_index( -; CHECK-NEXT: [[TMP1:%.*]] = extractelement <4 x float> [[X:%.*]], i32 2 +; CHECK-NEXT: [[TMP1:%.*]] = extractelement <4 x float> [[X:%.*]], i64 2 ; CHECK-NEXT: [[R:%.*]] = fadd float [[TMP1]], 0x4002A3D700000000 ; CHECK-NEXT: ret float [[R]] ; @@ -123,7 +123,7 @@ define double @extract_element_binop_splat_with_undef_constant_index(<2 x double> %x) { ; ; CHECK-LABEL: @extract_element_binop_splat_with_undef_constant_index( -; CHECK-NEXT: [[TMP1:%.*]] = extractelement <2 x double> [[X:%.*]], i32 0 +; CHECK-NEXT: [[TMP1:%.*]] = extractelement <2 x double> [[X:%.*]], i64 0 ; CHECK-NEXT: [[R:%.*]] = fdiv double 4.200000e+01, [[TMP1]] ; CHECK-NEXT: ret double [[R]] ; @@ -135,7 +135,7 @@ define float @extract_element_binop_nonsplat_constant_index(<2 x float> %x) { ; ; CHECK-LABEL: @extract_element_binop_nonsplat_constant_index( -; CHECK-NEXT: [[TMP1:%.*]] = extractelement <2 x float> [[X:%.*]], i32 1 +; CHECK-NEXT: [[TMP1:%.*]] = extractelement <2 x float> [[X:%.*]], i64 1 ; CHECK-NEXT: [[R:%.*]] = fmul float [[TMP1]], 4.300000e+01 ; CHECK-NEXT: ret float [[R]] ; @@ -184,8 +184,8 @@ ; ; CHECK-LABEL: @extract_element_load( ; CHECK-NEXT: [[LOAD:%.*]] = load <4 x float>, <4 x float>* [[PTR:%.*]], align 16 -; CHECK-NEXT: [[TMP1:%.*]] = extractelement <4 x float> [[LOAD]], i32 2 -; CHECK-NEXT: [[TMP2:%.*]] = extractelement <4 x float> [[X:%.*]], i32 2 +; CHECK-NEXT: [[TMP1:%.*]] = extractelement <4 x float> [[LOAD]], i64 2 +; CHECK-NEXT: [[TMP2:%.*]] = extractelement <4 x float> [[X:%.*]], i64 2 ; CHECK-NEXT: [[R:%.*]] = fadd float [[TMP1]], [[TMP2]] ; CHECK-NEXT: ret float [[R]] ; @@ -201,7 +201,7 @@ ; CHECK-NEXT: [[LOAD:%.*]] = load <4 x float>, <4 x float>* [[PTR0:%.*]], align 16 ; CHECK-NEXT: store <4 x float> [[LOAD]], <4 x float>* [[PTR1:%.*]], align 16 ; CHECK-NEXT: [[ADD:%.*]] = fadd <4 x float> [[LOAD]], [[X:%.*]] -; CHECK-NEXT: [[R:%.*]] = extractelement <4 x float> [[ADD]], i32 2 +; CHECK-NEXT: [[R:%.*]] = extractelement <4 x float> [[ADD]], i64 2 ; CHECK-NEXT: ret float [[R]] ; %load = load <4 x float>, <4 x float>* %ptr0 @@ -226,7 +226,7 @@ define float @extelt_binop_insertelt(<4 x float> %A, <4 x float> %B, float %f) { ; ; CHECK-LABEL: @extelt_binop_insertelt( -; CHECK-NEXT: [[TMP1:%.*]] = extractelement <4 x float> [[B:%.*]], i32 0 +; CHECK-NEXT: [[TMP1:%.*]] = extractelement <4 x float> [[B:%.*]], i64 0 ; CHECK-NEXT: [[E:%.*]] = fmul nnan float [[TMP1]], [[F:%.*]] ; CHECK-NEXT: ret float [[E]] ; @@ -240,9 +240,9 @@ define i32 @extelt_binop_binop_insertelt(<4 x i32> %A, <4 x i32> %B, i32 %f) { ; ; CHECK-LABEL: @extelt_binop_binop_insertelt( -; CHECK-NEXT: [[TMP1:%.*]] = extractelement <4 x i32> [[B:%.*]], i32 0 +; CHECK-NEXT: [[TMP1:%.*]] = extractelement <4 x i32> [[B:%.*]], i64 0 ; CHECK-NEXT: [[TMP2:%.*]] = add i32 [[TMP1]], [[F:%.*]] -; CHECK-NEXT: [[TMP3:%.*]] = extractelement <4 x i32> [[B]], i32 0 +; CHECK-NEXT: [[TMP3:%.*]] = extractelement <4 x i32> [[B]], i64 0 ; CHECK-NEXT: [[E:%.*]] = mul nsw i32 [[TMP2]], [[TMP3]] ; CHECK-NEXT: ret i32 [[E]] ; @@ -266,9 +266,9 @@ define i1 @cheap_to_extract_icmp(<4 x i32> %x, <4 x i1> %y) { ; ; CHECK-LABEL: @cheap_to_extract_icmp( -; CHECK-NEXT: [[TMP1:%.*]] = extractelement <4 x i32> [[X:%.*]], i32 2 +; CHECK-NEXT: [[TMP1:%.*]] = extractelement <4 x i32> [[X:%.*]], i64 2 ; CHECK-NEXT: [[TMP2:%.*]] = icmp eq i32 [[TMP1]], 0 -; CHECK-NEXT: [[TMP3:%.*]] = extractelement <4 x i1> [[Y:%.*]], i32 2 +; CHECK-NEXT: [[TMP3:%.*]] = extractelement <4 x i1> [[Y:%.*]], i64 2 ; CHECK-NEXT: [[R:%.*]] = and i1 [[TMP2]], [[TMP3]] ; CHECK-NEXT: ret i1 [[R]] ; @@ -281,9 +281,9 @@ define i1 @cheap_to_extract_fcmp(<4 x float> %x, <4 x i1> %y) { ; ; CHECK-LABEL: @cheap_to_extract_fcmp( -; CHECK-NEXT: [[TMP1:%.*]] = extractelement <4 x float> [[X:%.*]], i32 2 +; CHECK-NEXT: [[TMP1:%.*]] = extractelement <4 x float> [[X:%.*]], i64 2 ; CHECK-NEXT: [[TMP2:%.*]] = fcmp oeq float [[TMP1]], 0.000000e+00 -; CHECK-NEXT: [[TMP3:%.*]] = extractelement <4 x i1> [[Y:%.*]], i32 2 +; CHECK-NEXT: [[TMP3:%.*]] = extractelement <4 x i1> [[Y:%.*]], i64 2 ; CHECK-NEXT: [[R:%.*]] = and i1 [[TMP2]], [[TMP3]] ; CHECK-NEXT: ret i1 [[R]] ; @@ -296,7 +296,7 @@ define i1 @extractelt_vector_icmp_constrhs(<2 x i32> %arg) { ; ; CHECK-LABEL: @extractelt_vector_icmp_constrhs( -; CHECK-NEXT: [[TMP1:%.*]] = extractelement <2 x i32> [[ARG:%.*]], i32 0 +; CHECK-NEXT: [[TMP1:%.*]] = extractelement <2 x i32> [[ARG:%.*]], i64 0 ; CHECK-NEXT: [[EXT:%.*]] = icmp eq i32 [[TMP1]], 0 ; CHECK-NEXT: ret i1 [[EXT]] ; @@ -308,7 +308,7 @@ define i1 @extractelt_vector_fcmp_constrhs(<2 x float> %arg) { ; ; CHECK-LABEL: @extractelt_vector_fcmp_constrhs( -; CHECK-NEXT: [[TMP1:%.*]] = extractelement <2 x float> [[ARG:%.*]], i32 0 +; CHECK-NEXT: [[TMP1:%.*]] = extractelement <2 x float> [[ARG:%.*]], i64 0 ; CHECK-NEXT: [[EXT:%.*]] = fcmp oeq float [[TMP1]], 0.000000e+00 ; CHECK-NEXT: ret i1 [[EXT]] ; @@ -347,7 +347,7 @@ ; CHECK-NEXT: [[ADD:%.*]] = fadd <2 x float> [[ARG1:%.*]], [[ARG2:%.*]] ; CHECK-NEXT: store volatile <2 x float> [[ADD]], <2 x float>* undef, align 8 ; CHECK-NEXT: [[CMP:%.*]] = fcmp oeq <2 x float> [[ADD]], [[ARG0:%.*]] -; CHECK-NEXT: [[EXT:%.*]] = extractelement <2 x i1> [[CMP]], i32 0 +; CHECK-NEXT: [[EXT:%.*]] = extractelement <2 x i1> [[CMP]], i64 0 ; CHECK-NEXT: ret i1 [[EXT]] ; %add = fadd <2 x float> %arg1, %arg2 diff --git a/llvm/test/Transforms/InstCombine/select-extractelement-inseltpoison.ll b/llvm/test/Transforms/InstCombine/select-extractelement-inseltpoison.ll --- a/llvm/test/Transforms/InstCombine/select-extractelement-inseltpoison.ll +++ b/llvm/test/Transforms/InstCombine/select-extractelement-inseltpoison.ll @@ -7,7 +7,7 @@ ; CHECK-LABEL: @extract_one_select( ; CHECK-NEXT: [[CMP_NOT:%.*]] = icmp eq i32 [[C:%.*]], 0 ; CHECK-NEXT: [[SEL:%.*]] = select i1 [[CMP_NOT]], <4 x float> [[B:%.*]], <4 x float> [[A:%.*]] -; CHECK-NEXT: [[EXTRACT:%.*]] = extractelement <4 x float> [[SEL]], i32 2 +; CHECK-NEXT: [[EXTRACT:%.*]] = extractelement <4 x float> [[SEL]], i64 2 ; CHECK-NEXT: ret float [[EXTRACT]] ; %cmp = icmp ne i32 %c, 0 @@ -38,7 +38,7 @@ ; CHECK-LABEL: @extract_one_select_user( ; CHECK-NEXT: [[CMP_NOT:%.*]] = icmp eq i32 [[C:%.*]], 0 ; CHECK-NEXT: [[SEL:%.*]] = select i1 [[CMP_NOT]], <4 x float> [[B:%.*]], <4 x float> [[A:%.*]] -; CHECK-NEXT: [[EXTRACT:%.*]] = extractelement <4 x float> [[SEL]], i32 2 +; CHECK-NEXT: [[EXTRACT:%.*]] = extractelement <4 x float> [[SEL]], i64 2 ; CHECK-NEXT: call void @v4float_user(<4 x float> [[SEL]]) ; CHECK-NEXT: ret float [[EXTRACT]] ; @@ -53,7 +53,7 @@ ; CHECK-LABEL: @extract_one_vselect_user( ; CHECK-NEXT: [[CMP_NOT:%.*]] = icmp eq <4 x i32> [[C:%.*]], zeroinitializer ; CHECK-NEXT: [[SEL:%.*]] = select <4 x i1> [[CMP_NOT]], <4 x float> [[B:%.*]], <4 x float> [[A:%.*]] -; CHECK-NEXT: [[EXTRACT:%.*]] = extractelement <4 x float> [[SEL]], i32 2 +; CHECK-NEXT: [[EXTRACT:%.*]] = extractelement <4 x float> [[SEL]], i64 2 ; CHECK-NEXT: call void @v4float_user(<4 x float> [[SEL]]) ; CHECK-NEXT: ret float [[EXTRACT]] ; @@ -71,7 +71,7 @@ ; CHECK-LABEL: @extract_one_vselect( ; CHECK-NEXT: [[CMP_NOT:%.*]] = icmp eq <4 x i32> [[C:%.*]], zeroinitializer ; CHECK-NEXT: [[SELECT:%.*]] = select <4 x i1> [[CMP_NOT]], <4 x float> [[B:%.*]], <4 x float> [[A:%.*]] -; CHECK-NEXT: [[EXTRACT:%.*]] = extractelement <4 x float> [[SELECT]], i32 0 +; CHECK-NEXT: [[EXTRACT:%.*]] = extractelement <4 x float> [[SELECT]], i64 0 ; CHECK-NEXT: ret float [[EXTRACT]] ; %cmp = icmp ne <4 x i32> %c, zeroinitializer @@ -103,18 +103,18 @@ define <4 x float> @simple_vector_select(<4 x float> %a, <4 x float> %b, <4 x i32> %c) #0 { ; CHECK-LABEL: @simple_vector_select( ; CHECK-NEXT: entry: -; CHECK-NEXT: [[TMP0:%.*]] = extractelement <4 x i32> [[C:%.*]], i32 0 +; CHECK-NEXT: [[TMP0:%.*]] = extractelement <4 x i32> [[C:%.*]], i64 0 ; CHECK-NEXT: [[TOBOOL_NOT:%.*]] = icmp eq i32 [[TMP0]], 0 ; CHECK-NEXT: [[A_SINK:%.*]] = select i1 [[TOBOOL_NOT]], <4 x float> [[B:%.*]], <4 x float> [[A:%.*]] -; CHECK-NEXT: [[TMP1:%.*]] = extractelement <4 x i32> [[C]], i32 1 +; CHECK-NEXT: [[TMP1:%.*]] = extractelement <4 x i32> [[C]], i64 1 ; CHECK-NEXT: [[TOBOOL1_NOT:%.*]] = icmp eq i32 [[TMP1]], 0 ; CHECK-NEXT: [[A_SINK1:%.*]] = select i1 [[TOBOOL1_NOT]], <4 x float> [[B]], <4 x float> [[A]] ; CHECK-NEXT: [[TMP2:%.*]] = shufflevector <4 x float> [[A_SINK]], <4 x float> [[A_SINK1]], <4 x i32> -; CHECK-NEXT: [[TMP3:%.*]] = extractelement <4 x i32> [[C]], i32 2 +; CHECK-NEXT: [[TMP3:%.*]] = extractelement <4 x i32> [[C]], i64 2 ; CHECK-NEXT: [[TOBOOL6_NOT:%.*]] = icmp eq i32 [[TMP3]], 0 ; CHECK-NEXT: [[A_SINK2:%.*]] = select i1 [[TOBOOL6_NOT]], <4 x float> [[B]], <4 x float> [[A]] ; CHECK-NEXT: [[TMP4:%.*]] = shufflevector <4 x float> [[TMP2]], <4 x float> [[A_SINK2]], <4 x i32> -; CHECK-NEXT: [[TMP5:%.*]] = extractelement <4 x i32> [[C]], i32 3 +; CHECK-NEXT: [[TMP5:%.*]] = extractelement <4 x i32> [[C]], i64 3 ; CHECK-NEXT: [[TOBOOL11_NOT:%.*]] = icmp eq i32 [[TMP5]], 0 ; CHECK-NEXT: [[A_SINK3:%.*]] = select i1 [[TOBOOL11_NOT]], <4 x float> [[B]], <4 x float> [[A]] ; CHECK-NEXT: [[TMP6:%.*]] = shufflevector <4 x float> [[TMP4]], <4 x float> [[A_SINK3]], <4 x i32> @@ -172,7 +172,7 @@ define <4 x i32> @extract_cond_extra_use(<4 x i32> %x, <4 x i32> %y, <4 x i1> %condv) { ; CHECK-LABEL: @extract_cond_extra_use( -; CHECK-NEXT: [[COND:%.*]] = extractelement <4 x i1> [[CONDV:%.*]], i32 3 +; CHECK-NEXT: [[COND:%.*]] = extractelement <4 x i1> [[CONDV:%.*]], i64 3 ; CHECK-NEXT: call void @extra_use(i1 [[COND]]) ; CHECK-NEXT: [[R:%.*]] = select i1 [[COND]], <4 x i32> [[X:%.*]], <4 x i32> [[Y:%.*]] ; CHECK-NEXT: ret <4 x i32> [[R]] diff --git a/llvm/test/Transforms/InstCombine/select-extractelement.ll b/llvm/test/Transforms/InstCombine/select-extractelement.ll --- a/llvm/test/Transforms/InstCombine/select-extractelement.ll +++ b/llvm/test/Transforms/InstCombine/select-extractelement.ll @@ -5,9 +5,9 @@ define float @extract_one_select(<4 x float> %a, <4 x float> %b, i32 %c) #0 { ; CHECK-LABEL: @extract_one_select( -; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[C:%.*]], 0 -; CHECK-NEXT: [[SEL:%.*]] = select i1 [[CMP]], <4 x float> [[B:%.*]], <4 x float> [[A:%.*]] -; CHECK-NEXT: [[EXTRACT:%.*]] = extractelement <4 x float> [[SEL]], i32 2 +; CHECK-NEXT: [[CMP_NOT:%.*]] = icmp eq i32 [[C:%.*]], 0 +; CHECK-NEXT: [[SEL:%.*]] = select i1 [[CMP_NOT]], <4 x float> [[B:%.*]], <4 x float> [[A:%.*]] +; CHECK-NEXT: [[EXTRACT:%.*]] = extractelement <4 x float> [[SEL]], i64 2 ; CHECK-NEXT: ret float [[EXTRACT]] ; %cmp = icmp ne i32 %c, 0 @@ -19,8 +19,8 @@ ; Multiple extractelements define <2 x float> @extract_two_select(<4 x float> %a, <4 x float> %b, i32 %c) #0 { ; CHECK-LABEL: @extract_two_select( -; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[C:%.*]], 0 -; CHECK-NEXT: [[SEL:%.*]] = select i1 [[CMP]], <4 x float> [[B:%.*]], <4 x float> [[A:%.*]] +; CHECK-NEXT: [[CMP_NOT:%.*]] = icmp eq i32 [[C:%.*]], 0 +; CHECK-NEXT: [[SEL:%.*]] = select i1 [[CMP_NOT]], <4 x float> [[B:%.*]], <4 x float> [[A:%.*]] ; CHECK-NEXT: [[BUILD2:%.*]] = shufflevector <4 x float> [[SEL]], <4 x float> undef, <2 x i32> ; CHECK-NEXT: ret <2 x float> [[BUILD2]] ; @@ -36,9 +36,9 @@ ; Select has an extra non-extractelement user, don't change it define float @extract_one_select_user(<4 x float> %a, <4 x float> %b, i32 %c) #0 { ; CHECK-LABEL: @extract_one_select_user( -; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[C:%.*]], 0 -; CHECK-NEXT: [[SEL:%.*]] = select i1 [[CMP]], <4 x float> [[B:%.*]], <4 x float> [[A:%.*]] -; CHECK-NEXT: [[EXTRACT:%.*]] = extractelement <4 x float> [[SEL]], i32 2 +; CHECK-NEXT: [[CMP_NOT:%.*]] = icmp eq i32 [[C:%.*]], 0 +; CHECK-NEXT: [[SEL:%.*]] = select i1 [[CMP_NOT]], <4 x float> [[B:%.*]], <4 x float> [[A:%.*]] +; CHECK-NEXT: [[EXTRACT:%.*]] = extractelement <4 x float> [[SEL]], i64 2 ; CHECK-NEXT: call void @v4float_user(<4 x float> [[SEL]]) ; CHECK-NEXT: ret float [[EXTRACT]] ; @@ -51,9 +51,9 @@ define float @extract_one_vselect_user(<4 x float> %a, <4 x float> %b, <4 x i32> %c) #0 { ; CHECK-LABEL: @extract_one_vselect_user( -; CHECK-NEXT: [[CMP:%.*]] = icmp eq <4 x i32> [[C:%.*]], zeroinitializer -; CHECK-NEXT: [[SEL:%.*]] = select <4 x i1> [[CMP]], <4 x float> [[B:%.*]], <4 x float> [[A:%.*]] -; CHECK-NEXT: [[EXTRACT:%.*]] = extractelement <4 x float> [[SEL]], i32 2 +; CHECK-NEXT: [[CMP_NOT:%.*]] = icmp eq <4 x i32> [[C:%.*]], zeroinitializer +; CHECK-NEXT: [[SEL:%.*]] = select <4 x i1> [[CMP_NOT]], <4 x float> [[B:%.*]], <4 x float> [[A:%.*]] +; CHECK-NEXT: [[EXTRACT:%.*]] = extractelement <4 x float> [[SEL]], i64 2 ; CHECK-NEXT: call void @v4float_user(<4 x float> [[SEL]]) ; CHECK-NEXT: ret float [[EXTRACT]] ; @@ -69,9 +69,9 @@ define float @extract_one_vselect(<4 x float> %a, <4 x float> %b, <4 x i32> %c) #0 { ; CHECK-LABEL: @extract_one_vselect( -; CHECK-NEXT: [[CMP:%.*]] = icmp eq <4 x i32> [[C:%.*]], zeroinitializer -; CHECK-NEXT: [[SELECT:%.*]] = select <4 x i1> [[CMP]], <4 x float> [[B:%.*]], <4 x float> [[A:%.*]] -; CHECK-NEXT: [[EXTRACT:%.*]] = extractelement <4 x float> [[SELECT]], i32 0 +; CHECK-NEXT: [[CMP_NOT:%.*]] = icmp eq <4 x i32> [[C:%.*]], zeroinitializer +; CHECK-NEXT: [[SELECT:%.*]] = select <4 x i1> [[CMP_NOT]], <4 x float> [[B:%.*]], <4 x float> [[A:%.*]] +; CHECK-NEXT: [[EXTRACT:%.*]] = extractelement <4 x float> [[SELECT]], i64 0 ; CHECK-NEXT: ret float [[EXTRACT]] ; %cmp = icmp ne <4 x i32> %c, zeroinitializer @@ -83,8 +83,8 @@ ; Multiple extractelements from a vector select define <2 x float> @extract_two_vselect(<4 x float> %a, <4 x float> %b, <4 x i32> %c) #0 { ; CHECK-LABEL: @extract_two_vselect( -; CHECK-NEXT: [[CMP:%.*]] = icmp eq <4 x i32> [[C:%.*]], zeroinitializer -; CHECK-NEXT: [[SEL:%.*]] = select <4 x i1> [[CMP]], <4 x float> [[B:%.*]], <4 x float> [[A:%.*]] +; CHECK-NEXT: [[CMP_NOT:%.*]] = icmp eq <4 x i32> [[C:%.*]], zeroinitializer +; CHECK-NEXT: [[SEL:%.*]] = select <4 x i1> [[CMP_NOT]], <4 x float> [[B:%.*]], <4 x float> [[A:%.*]] ; CHECK-NEXT: [[BUILD2:%.*]] = shufflevector <4 x float> [[SEL]], <4 x float> undef, <2 x i32> ; CHECK-NEXT: ret <2 x float> [[BUILD2]] ; @@ -103,20 +103,20 @@ define <4 x float> @simple_vector_select(<4 x float> %a, <4 x float> %b, <4 x i32> %c) #0 { ; CHECK-LABEL: @simple_vector_select( ; CHECK-NEXT: entry: -; CHECK-NEXT: [[TMP0:%.*]] = extractelement <4 x i32> [[C:%.*]], i32 0 -; CHECK-NEXT: [[TOBOOL:%.*]] = icmp eq i32 [[TMP0]], 0 -; CHECK-NEXT: [[A_SINK:%.*]] = select i1 [[TOBOOL]], <4 x float> [[B:%.*]], <4 x float> [[A:%.*]] -; CHECK-NEXT: [[TMP1:%.*]] = extractelement <4 x i32> [[C]], i32 1 -; CHECK-NEXT: [[TOBOOL1:%.*]] = icmp eq i32 [[TMP1]], 0 -; CHECK-NEXT: [[A_SINK1:%.*]] = select i1 [[TOBOOL1]], <4 x float> [[B]], <4 x float> [[A]] +; CHECK-NEXT: [[TMP0:%.*]] = extractelement <4 x i32> [[C:%.*]], i64 0 +; CHECK-NEXT: [[TOBOOL_NOT:%.*]] = icmp eq i32 [[TMP0]], 0 +; CHECK-NEXT: [[A_SINK:%.*]] = select i1 [[TOBOOL_NOT]], <4 x float> [[B:%.*]], <4 x float> [[A:%.*]] +; CHECK-NEXT: [[TMP1:%.*]] = extractelement <4 x i32> [[C]], i64 1 +; CHECK-NEXT: [[TOBOOL1_NOT:%.*]] = icmp eq i32 [[TMP1]], 0 +; CHECK-NEXT: [[A_SINK1:%.*]] = select i1 [[TOBOOL1_NOT]], <4 x float> [[B]], <4 x float> [[A]] ; CHECK-NEXT: [[TMP2:%.*]] = shufflevector <4 x float> [[A_SINK]], <4 x float> [[A_SINK1]], <4 x i32> -; CHECK-NEXT: [[TMP3:%.*]] = extractelement <4 x i32> [[C]], i32 2 -; CHECK-NEXT: [[TOBOOL6:%.*]] = icmp eq i32 [[TMP3]], 0 -; CHECK-NEXT: [[A_SINK2:%.*]] = select i1 [[TOBOOL6]], <4 x float> [[B]], <4 x float> [[A]] +; CHECK-NEXT: [[TMP3:%.*]] = extractelement <4 x i32> [[C]], i64 2 +; CHECK-NEXT: [[TOBOOL6_NOT:%.*]] = icmp eq i32 [[TMP3]], 0 +; CHECK-NEXT: [[A_SINK2:%.*]] = select i1 [[TOBOOL6_NOT]], <4 x float> [[B]], <4 x float> [[A]] ; CHECK-NEXT: [[TMP4:%.*]] = shufflevector <4 x float> [[TMP2]], <4 x float> [[A_SINK2]], <4 x i32> -; CHECK-NEXT: [[TMP5:%.*]] = extractelement <4 x i32> [[C]], i32 3 -; CHECK-NEXT: [[TOBOOL11:%.*]] = icmp eq i32 [[TMP5]], 0 -; CHECK-NEXT: [[A_SINK3:%.*]] = select i1 [[TOBOOL11]], <4 x float> [[B]], <4 x float> [[A]] +; CHECK-NEXT: [[TMP5:%.*]] = extractelement <4 x i32> [[C]], i64 3 +; CHECK-NEXT: [[TOBOOL11_NOT:%.*]] = icmp eq i32 [[TMP5]], 0 +; CHECK-NEXT: [[A_SINK3:%.*]] = select i1 [[TOBOOL11_NOT]], <4 x float> [[B]], <4 x float> [[A]] ; CHECK-NEXT: [[TMP6:%.*]] = shufflevector <4 x float> [[TMP4]], <4 x float> [[A_SINK3]], <4 x i32> ; CHECK-NEXT: ret <4 x float> [[TMP6]] ; @@ -172,7 +172,7 @@ define <4 x i32> @extract_cond_extra_use(<4 x i32> %x, <4 x i32> %y, <4 x i1> %condv) { ; CHECK-LABEL: @extract_cond_extra_use( -; CHECK-NEXT: [[COND:%.*]] = extractelement <4 x i1> [[CONDV:%.*]], i32 3 +; CHECK-NEXT: [[COND:%.*]] = extractelement <4 x i1> [[CONDV:%.*]], i64 3 ; CHECK-NEXT: call void @extra_use(i1 [[COND]]) ; CHECK-NEXT: [[R:%.*]] = select i1 [[COND]], <4 x i32> [[X:%.*]], <4 x i32> [[Y:%.*]] ; CHECK-NEXT: ret <4 x i32> [[R]] @@ -220,7 +220,7 @@ ; CHECK-NEXT: [[AB:%.*]] = and <2 x i1> [[A:%.*]], [[B:%.*]] ; CHECK-NEXT: [[T7:%.*]] = select <2 x i1> [[AB]], <2 x i1> [[T6]], <2 x i1> ; CHECK-NEXT: [[P:%.*]] = select <2 x i1> [[T7]], <2 x i32> , <2 x i32> [[Y]] -; CHECK-NEXT: [[T11:%.*]] = extractelement <2 x i32> [[P]], i32 0 +; CHECK-NEXT: [[T11:%.*]] = extractelement <2 x i32> [[P]], i64 0 ; CHECK-NEXT: ret i32 [[T11]] ; %t5 = add nsw <2 x i32> %y, diff --git a/llvm/test/Transforms/InstCombine/select-safe-impliedcond-transforms.ll b/llvm/test/Transforms/InstCombine/select-safe-impliedcond-transforms.ll --- a/llvm/test/Transforms/InstCombine/select-safe-impliedcond-transforms.ll +++ b/llvm/test/Transforms/InstCombine/select-safe-impliedcond-transforms.ll @@ -16,7 +16,7 @@ define <2 x i1> @a_true_implies_b_true_vec(i8 %z0, <2 x i1> %X, <2 x i1> %Y) { ; CHECK-LABEL: @a_true_implies_b_true_vec( -; CHECK-NEXT: [[A0:%.*]] = insertelement <2 x i8> poison, i8 [[Z0:%.*]], i8 0 +; CHECK-NEXT: [[A0:%.*]] = insertelement <2 x i8> poison, i8 [[Z0:%.*]], i64 0 ; CHECK-NEXT: [[Z:%.*]] = shufflevector <2 x i8> [[A0]], <2 x i8> poison, <2 x i32> zeroinitializer ; CHECK-NEXT: [[A:%.*]] = icmp ugt <2 x i8> [[Z]], ; CHECK-NEXT: [[B:%.*]] = icmp ugt i8 [[Z0]], 10 diff --git a/llvm/test/Transforms/InstCombine/shift-add-inseltpoison.ll b/llvm/test/Transforms/InstCombine/shift-add-inseltpoison.ll --- a/llvm/test/Transforms/InstCombine/shift-add-inseltpoison.ll +++ b/llvm/test/Transforms/InstCombine/shift-add-inseltpoison.ll @@ -76,7 +76,7 @@ define <4 x i32> @shl_C1_add_A_C2_v4i32_splat(i16 %I) { ; CHECK-LABEL: @shl_C1_add_A_C2_v4i32_splat( ; CHECK-NEXT: [[A:%.*]] = zext i16 [[I:%.*]] to i32 -; CHECK-NEXT: [[B:%.*]] = insertelement <4 x i32> poison, i32 [[A]], i32 0 +; CHECK-NEXT: [[B:%.*]] = insertelement <4 x i32> poison, i32 [[A]], i64 0 ; CHECK-NEXT: [[C:%.*]] = shufflevector <4 x i32> [[B]], <4 x i32> poison, <4 x i32> zeroinitializer ; CHECK-NEXT: [[E:%.*]] = shl <4 x i32> , [[C]] ; CHECK-NEXT: ret <4 x i32> [[E]] @@ -92,7 +92,7 @@ define <4 x i32> @ashr_C1_add_A_C2_v4i32_splat(i16 %I) { ; CHECK-LABEL: @ashr_C1_add_A_C2_v4i32_splat( ; CHECK-NEXT: [[A:%.*]] = zext i16 [[I:%.*]] to i32 -; CHECK-NEXT: [[B:%.*]] = insertelement <4 x i32> poison, i32 [[A]], i32 0 +; CHECK-NEXT: [[B:%.*]] = insertelement <4 x i32> poison, i32 [[A]], i64 0 ; CHECK-NEXT: [[C:%.*]] = shufflevector <4 x i32> [[B]], <4 x i32> poison, <4 x i32> zeroinitializer ; CHECK-NEXT: [[E:%.*]] = ashr <4 x i32> , [[C]] ; CHECK-NEXT: ret <4 x i32> [[E]] @@ -108,7 +108,7 @@ define <4 x i32> @lshr_C1_add_A_C2_v4i32_splat(i16 %I) { ; CHECK-LABEL: @lshr_C1_add_A_C2_v4i32_splat( ; CHECK-NEXT: [[A:%.*]] = zext i16 [[I:%.*]] to i32 -; CHECK-NEXT: [[B:%.*]] = insertelement <4 x i32> poison, i32 [[A]], i32 0 +; CHECK-NEXT: [[B:%.*]] = insertelement <4 x i32> poison, i32 [[A]], i64 0 ; CHECK-NEXT: [[C:%.*]] = shufflevector <4 x i32> [[B]], <4 x i32> poison, <4 x i32> zeroinitializer ; CHECK-NEXT: [[E:%.*]] = lshr <4 x i32> , [[C]] ; CHECK-NEXT: ret <4 x i32> [[E]] diff --git a/llvm/test/Transforms/InstCombine/shift-add.ll b/llvm/test/Transforms/InstCombine/shift-add.ll --- a/llvm/test/Transforms/InstCombine/shift-add.ll +++ b/llvm/test/Transforms/InstCombine/shift-add.ll @@ -76,7 +76,7 @@ define <4 x i32> @shl_C1_add_A_C2_v4i32_splat(i16 %I) { ; CHECK-LABEL: @shl_C1_add_A_C2_v4i32_splat( ; CHECK-NEXT: [[A:%.*]] = zext i16 [[I:%.*]] to i32 -; CHECK-NEXT: [[B:%.*]] = insertelement <4 x i32> undef, i32 [[A]], i32 0 +; CHECK-NEXT: [[B:%.*]] = insertelement <4 x i32> undef, i32 [[A]], i64 0 ; CHECK-NEXT: [[C:%.*]] = shufflevector <4 x i32> [[B]], <4 x i32> undef, <4 x i32> zeroinitializer ; CHECK-NEXT: [[E:%.*]] = shl <4 x i32> , [[C]] ; CHECK-NEXT: ret <4 x i32> [[E]] @@ -92,7 +92,7 @@ define <4 x i32> @ashr_C1_add_A_C2_v4i32_splat(i16 %I) { ; CHECK-LABEL: @ashr_C1_add_A_C2_v4i32_splat( ; CHECK-NEXT: [[A:%.*]] = zext i16 [[I:%.*]] to i32 -; CHECK-NEXT: [[B:%.*]] = insertelement <4 x i32> undef, i32 [[A]], i32 0 +; CHECK-NEXT: [[B:%.*]] = insertelement <4 x i32> undef, i32 [[A]], i64 0 ; CHECK-NEXT: [[C:%.*]] = shufflevector <4 x i32> [[B]], <4 x i32> undef, <4 x i32> zeroinitializer ; CHECK-NEXT: [[E:%.*]] = ashr <4 x i32> , [[C]] ; CHECK-NEXT: ret <4 x i32> [[E]] @@ -108,7 +108,7 @@ define <4 x i32> @lshr_C1_add_A_C2_v4i32_splat(i16 %I) { ; CHECK-LABEL: @lshr_C1_add_A_C2_v4i32_splat( ; CHECK-NEXT: [[A:%.*]] = zext i16 [[I:%.*]] to i32 -; CHECK-NEXT: [[B:%.*]] = insertelement <4 x i32> undef, i32 [[A]], i32 0 +; CHECK-NEXT: [[B:%.*]] = insertelement <4 x i32> undef, i32 [[A]], i64 0 ; CHECK-NEXT: [[C:%.*]] = shufflevector <4 x i32> [[B]], <4 x i32> undef, <4 x i32> zeroinitializer ; CHECK-NEXT: [[E:%.*]] = lshr <4 x i32> , [[C]] ; CHECK-NEXT: ret <4 x i32> [[E]] diff --git a/llvm/test/Transforms/InstCombine/shufflevec-bitcast-inseltpoison.ll b/llvm/test/Transforms/InstCombine/shufflevec-bitcast-inseltpoison.ll --- a/llvm/test/Transforms/InstCombine/shufflevec-bitcast-inseltpoison.ll +++ b/llvm/test/Transforms/InstCombine/shufflevec-bitcast-inseltpoison.ll @@ -6,9 +6,9 @@ define void @test(<16 x i8> %w, i32* %o1, float* %o2) { ; CHECK-LABEL: @test( ; CHECK-NEXT: [[V_BC:%.*]] = bitcast <16 x i8> [[W:%.*]] to <4 x i32> -; CHECK-NEXT: [[V_EXTRACT:%.*]] = extractelement <4 x i32> [[V_BC]], i32 3 +; CHECK-NEXT: [[V_EXTRACT:%.*]] = extractelement <4 x i32> [[V_BC]], i64 3 ; CHECK-NEXT: [[V_BC1:%.*]] = bitcast <16 x i8> [[W]] to <4 x float> -; CHECK-NEXT: [[V_EXTRACT2:%.*]] = extractelement <4 x float> [[V_BC1]], i32 3 +; CHECK-NEXT: [[V_EXTRACT2:%.*]] = extractelement <4 x float> [[V_BC1]], i64 3 ; CHECK-NEXT: store i32 [[V_EXTRACT]], i32* [[O1:%.*]], align 4 ; CHECK-NEXT: store float [[V_EXTRACT2]], float* [[O2:%.*]], align 4 ; CHECK-NEXT: ret void diff --git a/llvm/test/Transforms/InstCombine/shufflevec-bitcast.ll b/llvm/test/Transforms/InstCombine/shufflevec-bitcast.ll --- a/llvm/test/Transforms/InstCombine/shufflevec-bitcast.ll +++ b/llvm/test/Transforms/InstCombine/shufflevec-bitcast.ll @@ -6,9 +6,9 @@ define void @test(<16 x i8> %w, i32* %o1, float* %o2) { ; CHECK-LABEL: @test( ; CHECK-NEXT: [[V_BC:%.*]] = bitcast <16 x i8> [[W:%.*]] to <4 x i32> -; CHECK-NEXT: [[V_EXTRACT:%.*]] = extractelement <4 x i32> [[V_BC]], i32 3 +; CHECK-NEXT: [[V_EXTRACT:%.*]] = extractelement <4 x i32> [[V_BC]], i64 3 ; CHECK-NEXT: [[V_BC1:%.*]] = bitcast <16 x i8> [[W]] to <4 x float> -; CHECK-NEXT: [[V_EXTRACT2:%.*]] = extractelement <4 x float> [[V_BC1]], i32 3 +; CHECK-NEXT: [[V_EXTRACT2:%.*]] = extractelement <4 x float> [[V_BC1]], i64 3 ; CHECK-NEXT: store i32 [[V_EXTRACT]], i32* [[O1:%.*]], align 4 ; CHECK-NEXT: store float [[V_EXTRACT2]], float* [[O2:%.*]], align 4 ; CHECK-NEXT: ret void @@ -181,7 +181,7 @@ define <2 x i4> @shuf_bitcast_inserti_use1(<2 x i8> %v, i8 %x, <2 x i8>* %p) { ; CHECK-LABEL: @shuf_bitcast_inserti_use1( -; CHECK-NEXT: [[I:%.*]] = insertelement <2 x i8> [[V:%.*]], i8 [[X:%.*]], i32 0 +; CHECK-NEXT: [[I:%.*]] = insertelement <2 x i8> [[V:%.*]], i8 [[X:%.*]], i64 0 ; CHECK-NEXT: store <2 x i8> [[I]], <2 x i8>* [[P:%.*]], align 2 ; CHECK-NEXT: [[R:%.*]] = bitcast i8 [[X]] to <2 x i4> ; CHECK-NEXT: ret <2 x i4> [[R]] @@ -195,7 +195,7 @@ define <2 x i4> @shuf_bitcast_insert_use2(<2 x i8> %v, i8 %x, <4 x i4>* %p) { ; CHECK-LABEL: @shuf_bitcast_insert_use2( -; CHECK-NEXT: [[I:%.*]] = insertelement <2 x i8> [[V:%.*]], i8 [[X:%.*]], i32 0 +; CHECK-NEXT: [[I:%.*]] = insertelement <2 x i8> [[V:%.*]], i8 [[X:%.*]], i64 0 ; CHECK-NEXT: [[TMP1:%.*]] = bitcast <4 x i4>* [[P:%.*]] to <2 x i8>* ; CHECK-NEXT: store <2 x i8> [[I]], <2 x i8>* [[TMP1]], align 2 ; CHECK-NEXT: [[R:%.*]] = bitcast i8 [[X]] to <2 x i4> @@ -226,7 +226,7 @@ define <3 x i4> @shuf_bitcast_wrong_size(<2 x i8> %v, i8 %x) { ; CHECK-LABEL: @shuf_bitcast_wrong_size( -; CHECK-NEXT: [[I:%.*]] = insertelement <2 x i8> [[V:%.*]], i8 [[X:%.*]], i32 0 +; CHECK-NEXT: [[I:%.*]] = insertelement <2 x i8> [[V:%.*]], i8 [[X:%.*]], i64 0 ; CHECK-NEXT: [[B:%.*]] = bitcast <2 x i8> [[I]] to <4 x i4> ; CHECK-NEXT: [[R:%.*]] = shufflevector <4 x i4> [[B]], <4 x i4> undef, <3 x i32> ; CHECK-NEXT: ret <3 x i4> [[R]] diff --git a/llvm/test/Transforms/InstCombine/shufflevector-div-rem-inseltpoison.ll b/llvm/test/Transforms/InstCombine/shufflevector-div-rem-inseltpoison.ll --- a/llvm/test/Transforms/InstCombine/shufflevector-div-rem-inseltpoison.ll +++ b/llvm/test/Transforms/InstCombine/shufflevector-div-rem-inseltpoison.ll @@ -8,11 +8,11 @@ ; extracting the second element in the vector). define i16 @test_srem_orig(i16 %a, i1 %cmp) { ; CHECK-LABEL: @test_srem_orig( -; CHECK-NEXT: [[SPLATINSERT:%.*]] = insertelement <2 x i16> poison, i16 [[A:%.*]], i32 0 +; CHECK-NEXT: [[SPLATINSERT:%.*]] = insertelement <2 x i16> poison, i16 [[A:%.*]], i64 0 ; CHECK-NEXT: [[TMP1:%.*]] = srem <2 x i16> [[SPLATINSERT]], ; CHECK-NEXT: [[SPLAT_OP:%.*]] = shufflevector <2 x i16> [[TMP1]], <2 x i16> poison, <2 x i32> ; CHECK-NEXT: [[T2:%.*]] = select i1 [[CMP:%.*]], <2 x i16> , <2 x i16> [[SPLAT_OP]] -; CHECK-NEXT: [[T3:%.*]] = extractelement <2 x i16> [[T2]], i32 1 +; CHECK-NEXT: [[T3:%.*]] = extractelement <2 x i16> [[T2]], i64 1 ; CHECK-NEXT: ret i16 [[T3]] ; %splatinsert = insertelement <2 x i16> poison, i16 %a, i32 0 @@ -29,7 +29,7 @@ ; "evaluateInDifferentElementOrder". define <2 x i16> @test_srem(i16 %a, i1 %cmp) { ; CHECK-LABEL: @test_srem( -; CHECK-NEXT: [[SPLATINSERT:%.*]] = insertelement <2 x i16> poison, i16 [[A:%.*]], i32 0 +; CHECK-NEXT: [[SPLATINSERT:%.*]] = insertelement <2 x i16> poison, i16 [[A:%.*]], i64 0 ; CHECK-NEXT: [[T1:%.*]] = srem <2 x i16> [[SPLATINSERT]], ; CHECK-NEXT: [[SPLAT_OP:%.*]] = shufflevector <2 x i16> [[T1]], <2 x i16> poison, <2 x i32> ; CHECK-NEXT: [[T2:%.*]] = select i1 [[CMP:%.*]], <2 x i16> , <2 x i16> [[SPLAT_OP]] @@ -44,7 +44,7 @@ define <2 x i16> @test_urem(i16 %a, i1 %cmp) { ; CHECK-LABEL: @test_urem( -; CHECK-NEXT: [[SPLATINSERT:%.*]] = insertelement <2 x i16> poison, i16 [[A:%.*]], i32 0 +; CHECK-NEXT: [[SPLATINSERT:%.*]] = insertelement <2 x i16> poison, i16 [[A:%.*]], i64 0 ; CHECK-NEXT: [[T1:%.*]] = urem <2 x i16> [[SPLATINSERT]], ; CHECK-NEXT: [[SPLAT_OP:%.*]] = shufflevector <2 x i16> [[T1]], <2 x i16> poison, <2 x i32> ; CHECK-NEXT: [[T2:%.*]] = select i1 [[CMP:%.*]], <2 x i16> , <2 x i16> [[SPLAT_OP]] @@ -59,7 +59,7 @@ define <2 x i16> @test_sdiv(i16 %a, i1 %cmp) { ; CHECK-LABEL: @test_sdiv( -; CHECK-NEXT: [[SPLATINSERT:%.*]] = insertelement <2 x i16> poison, i16 [[A:%.*]], i32 0 +; CHECK-NEXT: [[SPLATINSERT:%.*]] = insertelement <2 x i16> poison, i16 [[A:%.*]], i64 0 ; CHECK-NEXT: [[T1:%.*]] = sdiv <2 x i16> [[SPLATINSERT]], ; CHECK-NEXT: [[SPLAT_OP:%.*]] = shufflevector <2 x i16> [[T1]], <2 x i16> poison, <2 x i32> ; CHECK-NEXT: [[T2:%.*]] = select i1 [[CMP:%.*]], <2 x i16> , <2 x i16> [[SPLAT_OP]] @@ -74,7 +74,7 @@ define <2 x i16> @test_udiv(i16 %a, i1 %cmp) { ; CHECK-LABEL: @test_udiv( -; CHECK-NEXT: [[SPLATINSERT:%.*]] = insertelement <2 x i16> poison, i16 [[A:%.*]], i32 0 +; CHECK-NEXT: [[SPLATINSERT:%.*]] = insertelement <2 x i16> poison, i16 [[A:%.*]], i64 0 ; CHECK-NEXT: [[T1:%.*]] = udiv <2 x i16> [[SPLATINSERT]], ; CHECK-NEXT: [[SPLAT_OP:%.*]] = shufflevector <2 x i16> [[T1]], <2 x i16> poison, <2 x i32> ; CHECK-NEXT: [[T2:%.*]] = select i1 [[CMP:%.*]], <2 x i16> , <2 x i16> [[SPLAT_OP]] @@ -91,7 +91,7 @@ ; shufflevector is eliminated here. define <2 x float> @test_fdiv(float %a, float %b, i1 %cmp) { ; CHECK-LABEL: @test_fdiv( -; CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x float> undef, float [[A:%.*]], i32 1 +; CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x float> undef, float [[A:%.*]], i64 1 ; CHECK-NEXT: [[TMP2:%.*]] = fdiv <2 x float> [[TMP1]], ; CHECK-NEXT: [[T2:%.*]] = select i1 [[CMP:%.*]], <2 x float> , <2 x float> [[TMP2]] ; CHECK-NEXT: ret <2 x float> [[T2]] @@ -108,7 +108,7 @@ ; shufflevector is eliminated here. define <2 x float> @test_frem(float %a, float %b, i1 %cmp) { ; CHECK-LABEL: @test_frem( -; CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x float> undef, float [[A:%.*]], i32 1 +; CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x float> undef, float [[A:%.*]], i64 1 ; CHECK-NEXT: [[TMP2:%.*]] = frem <2 x float> [[TMP1]], ; CHECK-NEXT: [[T2:%.*]] = select i1 [[CMP:%.*]], <2 x float> , <2 x float> [[TMP2]] ; CHECK-NEXT: ret <2 x float> [[T2]] diff --git a/llvm/test/Transforms/InstCombine/shufflevector-div-rem.ll b/llvm/test/Transforms/InstCombine/shufflevector-div-rem.ll --- a/llvm/test/Transforms/InstCombine/shufflevector-div-rem.ll +++ b/llvm/test/Transforms/InstCombine/shufflevector-div-rem.ll @@ -8,11 +8,11 @@ ; extracting the second element in the vector). define i16 @test_srem_orig(i16 %a, i1 %cmp) { ; CHECK-LABEL: @test_srem_orig( -; CHECK-NEXT: [[SPLATINSERT:%.*]] = insertelement <2 x i16> undef, i16 [[A:%.*]], i32 0 +; CHECK-NEXT: [[SPLATINSERT:%.*]] = insertelement <2 x i16> undef, i16 [[A:%.*]], i64 0 ; CHECK-NEXT: [[TMP1:%.*]] = srem <2 x i16> [[SPLATINSERT]], ; CHECK-NEXT: [[SPLAT_OP:%.*]] = shufflevector <2 x i16> [[TMP1]], <2 x i16> poison, <2 x i32> ; CHECK-NEXT: [[T2:%.*]] = select i1 [[CMP:%.*]], <2 x i16> , <2 x i16> [[SPLAT_OP]] -; CHECK-NEXT: [[T3:%.*]] = extractelement <2 x i16> [[T2]], i32 1 +; CHECK-NEXT: [[T3:%.*]] = extractelement <2 x i16> [[T2]], i64 1 ; CHECK-NEXT: ret i16 [[T3]] ; %splatinsert = insertelement <2 x i16> undef, i16 %a, i32 0 @@ -29,7 +29,7 @@ ; "evaluateInDifferentElementOrder". define <2 x i16> @test_srem(i16 %a, i1 %cmp) { ; CHECK-LABEL: @test_srem( -; CHECK-NEXT: [[SPLATINSERT:%.*]] = insertelement <2 x i16> undef, i16 [[A:%.*]], i32 0 +; CHECK-NEXT: [[SPLATINSERT:%.*]] = insertelement <2 x i16> undef, i16 [[A:%.*]], i64 0 ; CHECK-NEXT: [[T1:%.*]] = srem <2 x i16> [[SPLATINSERT]], ; CHECK-NEXT: [[SPLAT_OP:%.*]] = shufflevector <2 x i16> [[T1]], <2 x i16> undef, <2 x i32> ; CHECK-NEXT: [[T2:%.*]] = select i1 [[CMP:%.*]], <2 x i16> , <2 x i16> [[SPLAT_OP]] @@ -44,7 +44,7 @@ define <2 x i16> @test_urem(i16 %a, i1 %cmp) { ; CHECK-LABEL: @test_urem( -; CHECK-NEXT: [[SPLATINSERT:%.*]] = insertelement <2 x i16> undef, i16 [[A:%.*]], i32 0 +; CHECK-NEXT: [[SPLATINSERT:%.*]] = insertelement <2 x i16> undef, i16 [[A:%.*]], i64 0 ; CHECK-NEXT: [[T1:%.*]] = urem <2 x i16> [[SPLATINSERT]], ; CHECK-NEXT: [[SPLAT_OP:%.*]] = shufflevector <2 x i16> [[T1]], <2 x i16> undef, <2 x i32> ; CHECK-NEXT: [[T2:%.*]] = select i1 [[CMP:%.*]], <2 x i16> , <2 x i16> [[SPLAT_OP]] @@ -59,7 +59,7 @@ define <2 x i16> @test_sdiv(i16 %a, i1 %cmp) { ; CHECK-LABEL: @test_sdiv( -; CHECK-NEXT: [[SPLATINSERT:%.*]] = insertelement <2 x i16> undef, i16 [[A:%.*]], i32 0 +; CHECK-NEXT: [[SPLATINSERT:%.*]] = insertelement <2 x i16> undef, i16 [[A:%.*]], i64 0 ; CHECK-NEXT: [[T1:%.*]] = sdiv <2 x i16> [[SPLATINSERT]], ; CHECK-NEXT: [[SPLAT_OP:%.*]] = shufflevector <2 x i16> [[T1]], <2 x i16> undef, <2 x i32> ; CHECK-NEXT: [[T2:%.*]] = select i1 [[CMP:%.*]], <2 x i16> , <2 x i16> [[SPLAT_OP]] @@ -74,7 +74,7 @@ define <2 x i16> @test_udiv(i16 %a, i1 %cmp) { ; CHECK-LABEL: @test_udiv( -; CHECK-NEXT: [[SPLATINSERT:%.*]] = insertelement <2 x i16> undef, i16 [[A:%.*]], i32 0 +; CHECK-NEXT: [[SPLATINSERT:%.*]] = insertelement <2 x i16> undef, i16 [[A:%.*]], i64 0 ; CHECK-NEXT: [[T1:%.*]] = udiv <2 x i16> [[SPLATINSERT]], ; CHECK-NEXT: [[SPLAT_OP:%.*]] = shufflevector <2 x i16> [[T1]], <2 x i16> undef, <2 x i32> ; CHECK-NEXT: [[T2:%.*]] = select i1 [[CMP:%.*]], <2 x i16> , <2 x i16> [[SPLAT_OP]] @@ -91,7 +91,7 @@ ; shufflevector is eliminated here. define <2 x float> @test_fdiv(float %a, float %b, i1 %cmp) { ; CHECK-LABEL: @test_fdiv( -; CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x float> undef, float [[A:%.*]], i32 1 +; CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x float> undef, float [[A:%.*]], i64 1 ; CHECK-NEXT: [[TMP2:%.*]] = fdiv <2 x float> [[TMP1]], ; CHECK-NEXT: [[T2:%.*]] = select i1 [[CMP:%.*]], <2 x float> , <2 x float> [[TMP2]] ; CHECK-NEXT: ret <2 x float> [[T2]] @@ -108,7 +108,7 @@ ; shufflevector is eliminated here. define <2 x float> @test_frem(float %a, float %b, i1 %cmp) { ; CHECK-LABEL: @test_frem( -; CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x float> undef, float [[A:%.*]], i32 1 +; CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x float> undef, float [[A:%.*]], i64 1 ; CHECK-NEXT: [[TMP2:%.*]] = frem <2 x float> [[TMP1]], ; CHECK-NEXT: [[T2:%.*]] = select i1 [[CMP:%.*]], <2 x float> , <2 x float> [[TMP2]] ; CHECK-NEXT: ret <2 x float> [[T2]] diff --git a/llvm/test/Transforms/InstCombine/sincospi.ll b/llvm/test/Transforms/InstCombine/sincospi.ll --- a/llvm/test/Transforms/InstCombine/sincospi.ll +++ b/llvm/test/Transforms/InstCombine/sincospi.ll @@ -22,8 +22,8 @@ ; CHECK-FLOAT-IN-VEC-LABEL: @test_instbased_f32( ; CHECK-FLOAT-IN-VEC-NEXT: [[VAL:%.*]] = load float, float* @var32, align 4 ; CHECK-FLOAT-IN-VEC-NEXT: [[SINCOSPI:%.*]] = call <2 x float> @__sincospif_stret(float [[VAL]]) -; CHECK-FLOAT-IN-VEC-NEXT: [[SINPI:%.*]] = extractelement <2 x float> [[SINCOSPI]], i32 0 -; CHECK-FLOAT-IN-VEC-NEXT: [[COSPI:%.*]] = extractelement <2 x float> [[SINCOSPI]], i32 1 +; CHECK-FLOAT-IN-VEC-NEXT: [[SINPI:%.*]] = extractelement <2 x float> [[SINCOSPI]], i64 0 +; CHECK-FLOAT-IN-VEC-NEXT: [[COSPI:%.*]] = extractelement <2 x float> [[SINCOSPI]], i64 1 ; CHECK-FLOAT-IN-VEC-NEXT: [[SIN:%.*]] = call float @__sinpif(float [[VAL]]) #[[ATTR0:[0-9]+]] ; CHECK-FLOAT-IN-VEC-NEXT: [[COS:%.*]] = call float @__cospif(float [[VAL]]) #[[ATTR0]] ; CHECK-FLOAT-IN-VEC-NEXT: [[RES:%.*]] = fadd float [[SINPI]], [[COSPI]] @@ -58,8 +58,8 @@ define float @test_constant_f32() { ; CHECK-FLOAT-IN-VEC-LABEL: @test_constant_f32( ; CHECK-FLOAT-IN-VEC-NEXT: [[SINCOSPI:%.*]] = call <2 x float> @__sincospif_stret(float 1.000000e+00) -; CHECK-FLOAT-IN-VEC-NEXT: [[SINPI:%.*]] = extractelement <2 x float> [[SINCOSPI]], i32 0 -; CHECK-FLOAT-IN-VEC-NEXT: [[COSPI:%.*]] = extractelement <2 x float> [[SINCOSPI]], i32 1 +; CHECK-FLOAT-IN-VEC-NEXT: [[SINPI:%.*]] = extractelement <2 x float> [[SINCOSPI]], i64 0 +; CHECK-FLOAT-IN-VEC-NEXT: [[COSPI:%.*]] = extractelement <2 x float> [[SINCOSPI]], i64 1 ; CHECK-FLOAT-IN-VEC-NEXT: [[SIN:%.*]] = call float @__sinpif(float 1.000000e+00) #[[ATTR0]] ; CHECK-FLOAT-IN-VEC-NEXT: [[COS:%.*]] = call float @__cospif(float 1.000000e+00) #[[ATTR0]] ; CHECK-FLOAT-IN-VEC-NEXT: [[RES:%.*]] = fadd float [[SINPI]], [[COSPI]] diff --git a/llvm/test/Transforms/InstCombine/sink-into-catchswitch.ll b/llvm/test/Transforms/InstCombine/sink-into-catchswitch.ll --- a/llvm/test/Transforms/InstCombine/sink-into-catchswitch.ll +++ b/llvm/test/Transforms/InstCombine/sink-into-catchswitch.ll @@ -11,7 +11,7 @@ ; CHECK-NEXT: invoke.cont: ; CHECK-NEXT: [[TMP0:%.*]] = bitcast %struct.B* [[P:%.*]] to <2 x i64>* ; CHECK-NEXT: [[TMP1:%.*]] = load <2 x i64>, <2 x i64>* [[TMP0]], align 8 -; CHECK-NEXT: [[TMP2:%.*]] = extractelement <2 x i64> [[TMP1]], i32 0 +; CHECK-NEXT: [[TMP2:%.*]] = extractelement <2 x i64> [[TMP1]], i64 0 ; CHECK-NEXT: invoke void @throw() ; CHECK-NEXT: to label [[UNREACHABLE:%.*]] unwind label [[CATCH_DISPATCH:%.*]] ; CHECK: catch.dispatch: diff --git a/llvm/test/Transforms/InstCombine/trunc-extractelement-inseltpoison.ll b/llvm/test/Transforms/InstCombine/trunc-extractelement-inseltpoison.ll --- a/llvm/test/Transforms/InstCombine/trunc-extractelement-inseltpoison.ll +++ b/llvm/test/Transforms/InstCombine/trunc-extractelement-inseltpoison.ll @@ -5,12 +5,12 @@ define i32 @shrinkExtractElt_i64_to_i32_0(<3 x i64> %x) { ; LE-LABEL: @shrinkExtractElt_i64_to_i32_0( ; LE-NEXT: [[TMP1:%.*]] = bitcast <3 x i64> [[X:%.*]] to <6 x i32> -; LE-NEXT: [[T:%.*]] = extractelement <6 x i32> [[TMP1]], i32 0 +; LE-NEXT: [[T:%.*]] = extractelement <6 x i32> [[TMP1]], i64 0 ; LE-NEXT: ret i32 [[T]] ; ; BE-LABEL: @shrinkExtractElt_i64_to_i32_0( ; BE-NEXT: [[TMP1:%.*]] = bitcast <3 x i64> [[X:%.*]] to <6 x i32> -; BE-NEXT: [[T:%.*]] = extractelement <6 x i32> [[TMP1]], i32 1 +; BE-NEXT: [[T:%.*]] = extractelement <6 x i32> [[TMP1]], i64 1 ; BE-NEXT: ret i32 [[T]] ; %e = extractelement <3 x i64> %x, i32 0 @@ -21,12 +21,12 @@ define i32 @vscale_shrinkExtractElt_i64_to_i32_0( %x) { ; LE-LABEL: @vscale_shrinkExtractElt_i64_to_i32_0( ; LE-NEXT: [[TMP1:%.*]] = bitcast [[X:%.*]] to -; LE-NEXT: [[T:%.*]] = extractelement [[TMP1]], i32 0 +; LE-NEXT: [[T:%.*]] = extractelement [[TMP1]], i64 0 ; LE-NEXT: ret i32 [[T]] ; ; BE-LABEL: @vscale_shrinkExtractElt_i64_to_i32_0( ; BE-NEXT: [[TMP1:%.*]] = bitcast [[X:%.*]] to -; BE-NEXT: [[T:%.*]] = extractelement [[TMP1]], i32 1 +; BE-NEXT: [[T:%.*]] = extractelement [[TMP1]], i64 1 ; BE-NEXT: ret i32 [[T]] ; %e = extractelement %x, i32 0 @@ -38,12 +38,12 @@ define i32 @shrinkExtractElt_i64_to_i32_1(<3 x i64> %x) { ; LE-LABEL: @shrinkExtractElt_i64_to_i32_1( ; LE-NEXT: [[TMP1:%.*]] = bitcast <3 x i64> [[X:%.*]] to <6 x i32> -; LE-NEXT: [[T:%.*]] = extractelement <6 x i32> [[TMP1]], i32 2 +; LE-NEXT: [[T:%.*]] = extractelement <6 x i32> [[TMP1]], i64 2 ; LE-NEXT: ret i32 [[T]] ; ; BE-LABEL: @shrinkExtractElt_i64_to_i32_1( ; BE-NEXT: [[TMP1:%.*]] = bitcast <3 x i64> [[X:%.*]] to <6 x i32> -; BE-NEXT: [[T:%.*]] = extractelement <6 x i32> [[TMP1]], i32 3 +; BE-NEXT: [[T:%.*]] = extractelement <6 x i32> [[TMP1]], i64 3 ; BE-NEXT: ret i32 [[T]] ; %e = extractelement <3 x i64> %x, i32 1 @@ -54,12 +54,12 @@ define i32 @shrinkExtractElt_i64_to_i32_2(<3 x i64> %x) { ; LE-LABEL: @shrinkExtractElt_i64_to_i32_2( ; LE-NEXT: [[TMP1:%.*]] = bitcast <3 x i64> [[X:%.*]] to <6 x i32> -; LE-NEXT: [[T:%.*]] = extractelement <6 x i32> [[TMP1]], i32 4 +; LE-NEXT: [[T:%.*]] = extractelement <6 x i32> [[TMP1]], i64 4 ; LE-NEXT: ret i32 [[T]] ; ; BE-LABEL: @shrinkExtractElt_i64_to_i32_2( ; BE-NEXT: [[TMP1:%.*]] = bitcast <3 x i64> [[X:%.*]] to <6 x i32> -; BE-NEXT: [[T:%.*]] = extractelement <6 x i32> [[TMP1]], i32 5 +; BE-NEXT: [[T:%.*]] = extractelement <6 x i32> [[TMP1]], i64 5 ; BE-NEXT: ret i32 [[T]] ; %e = extractelement <3 x i64> %x, i32 2 @@ -70,12 +70,12 @@ define i16 @shrinkExtractElt_i64_to_i16_0(<3 x i64> %x) { ; LE-LABEL: @shrinkExtractElt_i64_to_i16_0( ; LE-NEXT: [[TMP1:%.*]] = bitcast <3 x i64> [[X:%.*]] to <12 x i16> -; LE-NEXT: [[T:%.*]] = extractelement <12 x i16> [[TMP1]], i32 0 +; LE-NEXT: [[T:%.*]] = extractelement <12 x i16> [[TMP1]], i64 0 ; LE-NEXT: ret i16 [[T]] ; ; BE-LABEL: @shrinkExtractElt_i64_to_i16_0( ; BE-NEXT: [[TMP1:%.*]] = bitcast <3 x i64> [[X:%.*]] to <12 x i16> -; BE-NEXT: [[T:%.*]] = extractelement <12 x i16> [[TMP1]], i32 3 +; BE-NEXT: [[T:%.*]] = extractelement <12 x i16> [[TMP1]], i64 3 ; BE-NEXT: ret i16 [[T]] ; %e = extractelement <3 x i64> %x, i16 0 @@ -86,12 +86,12 @@ define i16 @shrinkExtractElt_i64_to_i16_1(<3 x i64> %x) { ; LE-LABEL: @shrinkExtractElt_i64_to_i16_1( ; LE-NEXT: [[TMP1:%.*]] = bitcast <3 x i64> [[X:%.*]] to <12 x i16> -; LE-NEXT: [[T:%.*]] = extractelement <12 x i16> [[TMP1]], i32 4 +; LE-NEXT: [[T:%.*]] = extractelement <12 x i16> [[TMP1]], i64 4 ; LE-NEXT: ret i16 [[T]] ; ; BE-LABEL: @shrinkExtractElt_i64_to_i16_1( ; BE-NEXT: [[TMP1:%.*]] = bitcast <3 x i64> [[X:%.*]] to <12 x i16> -; BE-NEXT: [[T:%.*]] = extractelement <12 x i16> [[TMP1]], i32 7 +; BE-NEXT: [[T:%.*]] = extractelement <12 x i16> [[TMP1]], i64 7 ; BE-NEXT: ret i16 [[T]] ; %e = extractelement <3 x i64> %x, i16 1 @@ -102,12 +102,12 @@ define i16 @shrinkExtractElt_i64_to_i16_2(<3 x i64> %x) { ; LE-LABEL: @shrinkExtractElt_i64_to_i16_2( ; LE-NEXT: [[TMP1:%.*]] = bitcast <3 x i64> [[X:%.*]] to <12 x i16> -; LE-NEXT: [[T:%.*]] = extractelement <12 x i16> [[TMP1]], i32 8 +; LE-NEXT: [[T:%.*]] = extractelement <12 x i16> [[TMP1]], i64 8 ; LE-NEXT: ret i16 [[T]] ; ; BE-LABEL: @shrinkExtractElt_i64_to_i16_2( ; BE-NEXT: [[TMP1:%.*]] = bitcast <3 x i64> [[X:%.*]] to <12 x i16> -; BE-NEXT: [[T:%.*]] = extractelement <12 x i16> [[TMP1]], i32 11 +; BE-NEXT: [[T:%.*]] = extractelement <12 x i16> [[TMP1]], i64 11 ; BE-NEXT: ret i16 [[T]] ; %e = extractelement <3 x i64> %x, i16 2 @@ -119,12 +119,12 @@ define i11 @shrinkExtractElt_i33_to_11_2(<3 x i33> %x) { ; LE-LABEL: @shrinkExtractElt_i33_to_11_2( ; LE-NEXT: [[TMP1:%.*]] = bitcast <3 x i33> [[X:%.*]] to <9 x i11> -; LE-NEXT: [[T:%.*]] = extractelement <9 x i11> [[TMP1]], i32 6 +; LE-NEXT: [[T:%.*]] = extractelement <9 x i11> [[TMP1]], i64 6 ; LE-NEXT: ret i11 [[T]] ; ; BE-LABEL: @shrinkExtractElt_i33_to_11_2( ; BE-NEXT: [[TMP1:%.*]] = bitcast <3 x i33> [[X:%.*]] to <9 x i11> -; BE-NEXT: [[T:%.*]] = extractelement <9 x i11> [[TMP1]], i32 8 +; BE-NEXT: [[T:%.*]] = extractelement <9 x i11> [[TMP1]], i64 8 ; BE-NEXT: ret i11 [[T]] ; %e = extractelement <3 x i33> %x, i16 2 @@ -135,7 +135,7 @@ ; Do not optimize if it would result in an invalid bitcast instruction. define i13 @shrinkExtractElt_i67_to_i13_2(<3 x i67> %x) { ; ANY-LABEL: @shrinkExtractElt_i67_to_i13_2( -; ANY-NEXT: [[E:%.*]] = extractelement <3 x i67> [[X:%.*]], i459 2 +; ANY-NEXT: [[E:%.*]] = extractelement <3 x i67> [[X:%.*]], i64 2 ; ANY-NEXT: [[T:%.*]] = trunc i67 [[E]] to i13 ; ANY-NEXT: ret i13 [[T]] ; @@ -148,7 +148,7 @@ ; transform would be wrong. define i30 @shrinkExtractElt_i40_to_i30_1(<3 x i40> %x) { ; ANY-LABEL: @shrinkExtractElt_i40_to_i30_1( -; ANY-NEXT: [[E:%.*]] = extractelement <3 x i40> [[X:%.*]], i32 1 +; ANY-NEXT: [[E:%.*]] = extractelement <3 x i40> [[X:%.*]], i64 1 ; ANY-NEXT: [[T:%.*]] = trunc i40 [[E]] to i30 ; ANY-NEXT: ret i30 [[T]] ; diff --git a/llvm/test/Transforms/InstCombine/trunc-extractelement.ll b/llvm/test/Transforms/InstCombine/trunc-extractelement.ll --- a/llvm/test/Transforms/InstCombine/trunc-extractelement.ll +++ b/llvm/test/Transforms/InstCombine/trunc-extractelement.ll @@ -5,12 +5,12 @@ define i32 @shrinkExtractElt_i64_to_i32_0(<3 x i64> %x) { ; LE-LABEL: @shrinkExtractElt_i64_to_i32_0( ; LE-NEXT: [[TMP1:%.*]] = bitcast <3 x i64> [[X:%.*]] to <6 x i32> -; LE-NEXT: [[T:%.*]] = extractelement <6 x i32> [[TMP1]], i32 0 +; LE-NEXT: [[T:%.*]] = extractelement <6 x i32> [[TMP1]], i64 0 ; LE-NEXT: ret i32 [[T]] ; ; BE-LABEL: @shrinkExtractElt_i64_to_i32_0( ; BE-NEXT: [[TMP1:%.*]] = bitcast <3 x i64> [[X:%.*]] to <6 x i32> -; BE-NEXT: [[T:%.*]] = extractelement <6 x i32> [[TMP1]], i32 1 +; BE-NEXT: [[T:%.*]] = extractelement <6 x i32> [[TMP1]], i64 1 ; BE-NEXT: ret i32 [[T]] ; %e = extractelement <3 x i64> %x, i32 0 @@ -21,12 +21,12 @@ define i32 @vscale_shrinkExtractElt_i64_to_i32_0( %x) { ; LE-LABEL: @vscale_shrinkExtractElt_i64_to_i32_0( ; LE-NEXT: [[TMP1:%.*]] = bitcast [[X:%.*]] to -; LE-NEXT: [[T:%.*]] = extractelement [[TMP1]], i32 0 +; LE-NEXT: [[T:%.*]] = extractelement [[TMP1]], i64 0 ; LE-NEXT: ret i32 [[T]] ; ; BE-LABEL: @vscale_shrinkExtractElt_i64_to_i32_0( ; BE-NEXT: [[TMP1:%.*]] = bitcast [[X:%.*]] to -; BE-NEXT: [[T:%.*]] = extractelement [[TMP1]], i32 1 +; BE-NEXT: [[T:%.*]] = extractelement [[TMP1]], i64 1 ; BE-NEXT: ret i32 [[T]] ; %e = extractelement %x, i32 0 @@ -38,12 +38,12 @@ define i32 @shrinkExtractElt_i64_to_i32_1(<3 x i64> %x) { ; LE-LABEL: @shrinkExtractElt_i64_to_i32_1( ; LE-NEXT: [[TMP1:%.*]] = bitcast <3 x i64> [[X:%.*]] to <6 x i32> -; LE-NEXT: [[T:%.*]] = extractelement <6 x i32> [[TMP1]], i32 2 +; LE-NEXT: [[T:%.*]] = extractelement <6 x i32> [[TMP1]], i64 2 ; LE-NEXT: ret i32 [[T]] ; ; BE-LABEL: @shrinkExtractElt_i64_to_i32_1( ; BE-NEXT: [[TMP1:%.*]] = bitcast <3 x i64> [[X:%.*]] to <6 x i32> -; BE-NEXT: [[T:%.*]] = extractelement <6 x i32> [[TMP1]], i32 3 +; BE-NEXT: [[T:%.*]] = extractelement <6 x i32> [[TMP1]], i64 3 ; BE-NEXT: ret i32 [[T]] ; %e = extractelement <3 x i64> %x, i32 1 @@ -54,12 +54,12 @@ define i32 @shrinkExtractElt_i64_to_i32_2(<3 x i64> %x) { ; LE-LABEL: @shrinkExtractElt_i64_to_i32_2( ; LE-NEXT: [[TMP1:%.*]] = bitcast <3 x i64> [[X:%.*]] to <6 x i32> -; LE-NEXT: [[T:%.*]] = extractelement <6 x i32> [[TMP1]], i32 4 +; LE-NEXT: [[T:%.*]] = extractelement <6 x i32> [[TMP1]], i64 4 ; LE-NEXT: ret i32 [[T]] ; ; BE-LABEL: @shrinkExtractElt_i64_to_i32_2( ; BE-NEXT: [[TMP1:%.*]] = bitcast <3 x i64> [[X:%.*]] to <6 x i32> -; BE-NEXT: [[T:%.*]] = extractelement <6 x i32> [[TMP1]], i32 5 +; BE-NEXT: [[T:%.*]] = extractelement <6 x i32> [[TMP1]], i64 5 ; BE-NEXT: ret i32 [[T]] ; %e = extractelement <3 x i64> %x, i32 2 @@ -70,12 +70,12 @@ define i16 @shrinkExtractElt_i64_to_i16_0(<3 x i64> %x) { ; LE-LABEL: @shrinkExtractElt_i64_to_i16_0( ; LE-NEXT: [[TMP1:%.*]] = bitcast <3 x i64> [[X:%.*]] to <12 x i16> -; LE-NEXT: [[T:%.*]] = extractelement <12 x i16> [[TMP1]], i32 0 +; LE-NEXT: [[T:%.*]] = extractelement <12 x i16> [[TMP1]], i64 0 ; LE-NEXT: ret i16 [[T]] ; ; BE-LABEL: @shrinkExtractElt_i64_to_i16_0( ; BE-NEXT: [[TMP1:%.*]] = bitcast <3 x i64> [[X:%.*]] to <12 x i16> -; BE-NEXT: [[T:%.*]] = extractelement <12 x i16> [[TMP1]], i32 3 +; BE-NEXT: [[T:%.*]] = extractelement <12 x i16> [[TMP1]], i64 3 ; BE-NEXT: ret i16 [[T]] ; %e = extractelement <3 x i64> %x, i16 0 @@ -86,12 +86,12 @@ define i16 @shrinkExtractElt_i64_to_i16_1(<3 x i64> %x) { ; LE-LABEL: @shrinkExtractElt_i64_to_i16_1( ; LE-NEXT: [[TMP1:%.*]] = bitcast <3 x i64> [[X:%.*]] to <12 x i16> -; LE-NEXT: [[T:%.*]] = extractelement <12 x i16> [[TMP1]], i32 4 +; LE-NEXT: [[T:%.*]] = extractelement <12 x i16> [[TMP1]], i64 4 ; LE-NEXT: ret i16 [[T]] ; ; BE-LABEL: @shrinkExtractElt_i64_to_i16_1( ; BE-NEXT: [[TMP1:%.*]] = bitcast <3 x i64> [[X:%.*]] to <12 x i16> -; BE-NEXT: [[T:%.*]] = extractelement <12 x i16> [[TMP1]], i32 7 +; BE-NEXT: [[T:%.*]] = extractelement <12 x i16> [[TMP1]], i64 7 ; BE-NEXT: ret i16 [[T]] ; %e = extractelement <3 x i64> %x, i16 1 @@ -102,12 +102,12 @@ define i16 @shrinkExtractElt_i64_to_i16_2(<3 x i64> %x) { ; LE-LABEL: @shrinkExtractElt_i64_to_i16_2( ; LE-NEXT: [[TMP1:%.*]] = bitcast <3 x i64> [[X:%.*]] to <12 x i16> -; LE-NEXT: [[T:%.*]] = extractelement <12 x i16> [[TMP1]], i32 8 +; LE-NEXT: [[T:%.*]] = extractelement <12 x i16> [[TMP1]], i64 8 ; LE-NEXT: ret i16 [[T]] ; ; BE-LABEL: @shrinkExtractElt_i64_to_i16_2( ; BE-NEXT: [[TMP1:%.*]] = bitcast <3 x i64> [[X:%.*]] to <12 x i16> -; BE-NEXT: [[T:%.*]] = extractelement <12 x i16> [[TMP1]], i32 11 +; BE-NEXT: [[T:%.*]] = extractelement <12 x i16> [[TMP1]], i64 11 ; BE-NEXT: ret i16 [[T]] ; %e = extractelement <3 x i64> %x, i16 2 @@ -119,12 +119,12 @@ define i11 @shrinkExtractElt_i33_to_11_2(<3 x i33> %x) { ; LE-LABEL: @shrinkExtractElt_i33_to_11_2( ; LE-NEXT: [[TMP1:%.*]] = bitcast <3 x i33> [[X:%.*]] to <9 x i11> -; LE-NEXT: [[T:%.*]] = extractelement <9 x i11> [[TMP1]], i32 6 +; LE-NEXT: [[T:%.*]] = extractelement <9 x i11> [[TMP1]], i64 6 ; LE-NEXT: ret i11 [[T]] ; ; BE-LABEL: @shrinkExtractElt_i33_to_11_2( ; BE-NEXT: [[TMP1:%.*]] = bitcast <3 x i33> [[X:%.*]] to <9 x i11> -; BE-NEXT: [[T:%.*]] = extractelement <9 x i11> [[TMP1]], i32 8 +; BE-NEXT: [[T:%.*]] = extractelement <9 x i11> [[TMP1]], i64 8 ; BE-NEXT: ret i11 [[T]] ; %e = extractelement <3 x i33> %x, i16 2 @@ -135,7 +135,7 @@ ; Do not optimize if it would result in an invalid bitcast instruction. define i13 @shrinkExtractElt_i67_to_i13_2(<3 x i67> %x) { ; ANY-LABEL: @shrinkExtractElt_i67_to_i13_2( -; ANY-NEXT: [[E:%.*]] = extractelement <3 x i67> [[X:%.*]], i459 2 +; ANY-NEXT: [[E:%.*]] = extractelement <3 x i67> [[X:%.*]], i64 2 ; ANY-NEXT: [[T:%.*]] = trunc i67 [[E]] to i13 ; ANY-NEXT: ret i13 [[T]] ; @@ -148,7 +148,7 @@ ; transform would be wrong. define i30 @shrinkExtractElt_i40_to_i30_1(<3 x i40> %x) { ; ANY-LABEL: @shrinkExtractElt_i40_to_i30_1( -; ANY-NEXT: [[E:%.*]] = extractelement <3 x i40> [[X:%.*]], i32 1 +; ANY-NEXT: [[E:%.*]] = extractelement <3 x i40> [[X:%.*]], i64 1 ; ANY-NEXT: [[T:%.*]] = trunc i40 [[E]] to i30 ; ANY-NEXT: ret i30 [[T]] ; diff --git a/llvm/test/Transforms/InstCombine/trunc-inseltpoison.ll b/llvm/test/Transforms/InstCombine/trunc-inseltpoison.ll --- a/llvm/test/Transforms/InstCombine/trunc-inseltpoison.ll +++ b/llvm/test/Transforms/InstCombine/trunc-inseltpoison.ll @@ -541,7 +541,7 @@ define i32 @trunc_bitcast1(<4 x i32> %v) { ; CHECK-LABEL: @trunc_bitcast1( -; CHECK-NEXT: [[EXT:%.*]] = extractelement <4 x i32> [[V:%.*]], i32 1 +; CHECK-NEXT: [[EXT:%.*]] = extractelement <4 x i32> [[V:%.*]], i64 1 ; CHECK-NEXT: ret i32 [[EXT]] ; %bc = bitcast <4 x i32> %v to i128 @@ -555,7 +555,7 @@ define i32 @trunc_bitcast2(<2 x i64> %v) { ; CHECK-LABEL: @trunc_bitcast2( ; CHECK-NEXT: [[BC1:%.*]] = bitcast <2 x i64> [[V:%.*]] to <4 x i32> -; CHECK-NEXT: [[EXT:%.*]] = extractelement <4 x i32> [[BC1]], i32 2 +; CHECK-NEXT: [[EXT:%.*]] = extractelement <4 x i32> [[BC1]], i64 2 ; CHECK-NEXT: ret i32 [[EXT]] ; %bc = bitcast <2 x i64> %v to i128 @@ -568,7 +568,7 @@ define i32 @trunc_bitcast3(<4 x i32> %v) { ; CHECK-LABEL: @trunc_bitcast3( -; CHECK-NEXT: [[EXT:%.*]] = extractelement <4 x i32> [[V:%.*]], i32 0 +; CHECK-NEXT: [[EXT:%.*]] = extractelement <4 x i32> [[V:%.*]], i64 0 ; CHECK-NEXT: ret i32 [[EXT]] ; %bc = bitcast <4 x i32> %v to i128 diff --git a/llvm/test/Transforms/InstCombine/trunc.ll b/llvm/test/Transforms/InstCombine/trunc.ll --- a/llvm/test/Transforms/InstCombine/trunc.ll +++ b/llvm/test/Transforms/InstCombine/trunc.ll @@ -541,7 +541,7 @@ define i32 @trunc_bitcast1(<4 x i32> %v) { ; CHECK-LABEL: @trunc_bitcast1( -; CHECK-NEXT: [[EXT:%.*]] = extractelement <4 x i32> [[V:%.*]], i32 1 +; CHECK-NEXT: [[EXT:%.*]] = extractelement <4 x i32> [[V:%.*]], i64 1 ; CHECK-NEXT: ret i32 [[EXT]] ; %bc = bitcast <4 x i32> %v to i128 @@ -555,7 +555,7 @@ define i32 @trunc_bitcast2(<2 x i64> %v) { ; CHECK-LABEL: @trunc_bitcast2( ; CHECK-NEXT: [[BC1:%.*]] = bitcast <2 x i64> [[V:%.*]] to <4 x i32> -; CHECK-NEXT: [[EXT:%.*]] = extractelement <4 x i32> [[BC1]], i32 2 +; CHECK-NEXT: [[EXT:%.*]] = extractelement <4 x i32> [[BC1]], i64 2 ; CHECK-NEXT: ret i32 [[EXT]] ; %bc = bitcast <2 x i64> %v to i128 @@ -568,7 +568,7 @@ define i32 @trunc_bitcast3(<4 x i32> %v) { ; CHECK-LABEL: @trunc_bitcast3( -; CHECK-NEXT: [[EXT:%.*]] = extractelement <4 x i32> [[V:%.*]], i32 0 +; CHECK-NEXT: [[EXT:%.*]] = extractelement <4 x i32> [[V:%.*]], i64 0 ; CHECK-NEXT: ret i32 [[EXT]] ; %bc = bitcast <4 x i32> %v to i128 diff --git a/llvm/test/Transforms/InstCombine/type_pun-inseltpoison.ll b/llvm/test/Transforms/InstCombine/type_pun-inseltpoison.ll --- a/llvm/test/Transforms/InstCombine/type_pun-inseltpoison.ll +++ b/llvm/test/Transforms/InstCombine/type_pun-inseltpoison.ll @@ -19,7 +19,7 @@ define i32 @type_pun_zeroth(<16 x i8> %in) { ; CHECK-LABEL: @type_pun_zeroth( ; CHECK-NEXT: [[SROA_BC:%.*]] = bitcast <16 x i8> [[IN:%.*]] to <4 x i32> -; CHECK-NEXT: [[SROA_EXTRACT:%.*]] = extractelement <4 x i32> [[SROA_BC]], i32 0 +; CHECK-NEXT: [[SROA_EXTRACT:%.*]] = extractelement <4 x i32> [[SROA_BC]], i64 0 ; CHECK-NEXT: ret i32 [[SROA_EXTRACT]] ; %sroa = shufflevector <16 x i8> %in, <16 x i8> poison, <4 x i32> @@ -31,7 +31,7 @@ define i32 @type_pun_first(<16 x i8> %in) { ; CHECK-LABEL: @type_pun_first( ; CHECK-NEXT: [[SROA_BC:%.*]] = bitcast <16 x i8> [[IN:%.*]] to <4 x i32> -; CHECK-NEXT: [[SROA_EXTRACT:%.*]] = extractelement <4 x i32> [[SROA_BC]], i32 1 +; CHECK-NEXT: [[SROA_EXTRACT:%.*]] = extractelement <4 x i32> [[SROA_BC]], i64 1 ; CHECK-NEXT: ret i32 [[SROA_EXTRACT]] ; %sroa = shufflevector <16 x i8> %in, <16 x i8> poison, <4 x i32> @@ -44,7 +44,7 @@ ; CHECK-LABEL: @type_pun_misaligned( ; CHECK-NEXT: [[SROA_EXTRACT:%.*]] = shufflevector <16 x i8> [[IN:%.*]], <16 x i8> poison, <16 x i32> ; CHECK-NEXT: [[SROA_BC:%.*]] = bitcast <16 x i8> [[SROA_EXTRACT]] to <4 x i32> -; CHECK-NEXT: [[SROA_EXTRACT1:%.*]] = extractelement <4 x i32> [[SROA_BC]], i32 0 +; CHECK-NEXT: [[SROA_EXTRACT1:%.*]] = extractelement <4 x i32> [[SROA_BC]], i64 0 ; CHECK-NEXT: ret i32 [[SROA_EXTRACT1]] ; %sroa = shufflevector <16 x i8> %in, <16 x i8> poison, <4 x i32> @@ -56,7 +56,7 @@ define i32* @type_pun_pointer(<16 x i8> %in) { ; CHECK-LABEL: @type_pun_pointer( ; CHECK-NEXT: [[SROA_BC:%.*]] = bitcast <16 x i8> [[IN:%.*]] to <4 x i32> -; CHECK-NEXT: [[SROA_EXTRACT:%.*]] = extractelement <4 x i32> [[SROA_BC]], i32 0 +; CHECK-NEXT: [[SROA_EXTRACT:%.*]] = extractelement <4 x i32> [[SROA_BC]], i64 0 ; CHECK-NEXT: [[TMP1:%.*]] = inttoptr i32 [[SROA_EXTRACT]] to i32* ; CHECK-NEXT: ret i32* [[TMP1]] ; @@ -70,7 +70,7 @@ define float @type_pun_float(<16 x i8> %in) { ; CHECK-LABEL: @type_pun_float( ; CHECK-NEXT: [[SROA_BC:%.*]] = bitcast <16 x i8> [[IN:%.*]] to <4 x float> -; CHECK-NEXT: [[SROA_EXTRACT:%.*]] = extractelement <4 x float> [[SROA_BC]], i32 0 +; CHECK-NEXT: [[SROA_EXTRACT:%.*]] = extractelement <4 x float> [[SROA_BC]], i64 0 ; CHECK-NEXT: ret float [[SROA_EXTRACT]] ; %sroa = shufflevector <16 x i8> %in, <16 x i8> poison, <4 x i32> @@ -82,7 +82,7 @@ define double @type_pun_double(<16 x i8> %in) { ; CHECK-LABEL: @type_pun_double( ; CHECK-NEXT: [[SROA_BC:%.*]] = bitcast <16 x i8> [[IN:%.*]] to <2 x double> -; CHECK-NEXT: [[SROA_EXTRACT:%.*]] = extractelement <2 x double> [[SROA_BC]], i32 0 +; CHECK-NEXT: [[SROA_EXTRACT:%.*]] = extractelement <2 x double> [[SROA_BC]], i64 0 ; CHECK-NEXT: ret double [[SROA_EXTRACT]] ; %sroa = shufflevector <16 x i8> %in, <16 x i8> poison, <8 x i32> @@ -95,9 +95,9 @@ define { float, i32 } @type_pun_float_i32(<16 x i8> %in) { ; CHECK-LABEL: @type_pun_float_i32( ; CHECK-NEXT: [[SROA_BC:%.*]] = bitcast <16 x i8> [[IN:%.*]] to <4 x i32> -; CHECK-NEXT: [[SROA_EXTRACT:%.*]] = extractelement <4 x i32> [[SROA_BC]], i32 0 +; CHECK-NEXT: [[SROA_EXTRACT:%.*]] = extractelement <4 x i32> [[SROA_BC]], i64 0 ; CHECK-NEXT: [[SROA_BC1:%.*]] = bitcast <16 x i8> [[IN]] to <4 x float> -; CHECK-NEXT: [[SROA_EXTRACT2:%.*]] = extractelement <4 x float> [[SROA_BC1]], i32 0 +; CHECK-NEXT: [[SROA_EXTRACT2:%.*]] = extractelement <4 x float> [[SROA_BC1]], i64 0 ; CHECK-NEXT: [[TMP1:%.*]] = insertvalue { float, i32 } undef, float [[SROA_EXTRACT2]], 0 ; CHECK-NEXT: [[TMP2:%.*]] = insertvalue { float, i32 } [[TMP1]], i32 [[SROA_EXTRACT]], 1 ; CHECK-NEXT: ret { float, i32 } [[TMP2]] @@ -118,10 +118,10 @@ ; CHECK-NEXT: [[SROA_BC:%.*]] = bitcast <16 x i8> [[IN:%.*]] to <4 x i32> ; CHECK-NEXT: br i1 undef, label [[LEFT:%.*]], label [[RIGHT:%.*]] ; CHECK: left: -; CHECK-NEXT: [[SROA_EXTRACT1:%.*]] = extractelement <4 x i32> [[SROA_BC]], i32 0 +; CHECK-NEXT: [[SROA_EXTRACT1:%.*]] = extractelement <4 x i32> [[SROA_BC]], i64 0 ; CHECK-NEXT: br label [[TAIL:%.*]] ; CHECK: right: -; CHECK-NEXT: [[SROA_EXTRACT:%.*]] = extractelement <4 x i32> [[SROA_BC]], i32 0 +; CHECK-NEXT: [[SROA_EXTRACT:%.*]] = extractelement <4 x i32> [[SROA_BC]], i64 0 ; CHECK-NEXT: br label [[TAIL]] ; CHECK: tail: ; CHECK-NEXT: [[I:%.*]] = phi i32 [ [[SROA_EXTRACT1]], [[LEFT]] ], [ [[SROA_EXTRACT]], [[RIGHT]] ] diff --git a/llvm/test/Transforms/InstCombine/type_pun.ll b/llvm/test/Transforms/InstCombine/type_pun.ll --- a/llvm/test/Transforms/InstCombine/type_pun.ll +++ b/llvm/test/Transforms/InstCombine/type_pun.ll @@ -19,7 +19,7 @@ define i32 @type_pun_zeroth(<16 x i8> %in) { ; CHECK-LABEL: @type_pun_zeroth( ; CHECK-NEXT: [[SROA_BC:%.*]] = bitcast <16 x i8> [[IN:%.*]] to <4 x i32> -; CHECK-NEXT: [[SROA_EXTRACT:%.*]] = extractelement <4 x i32> [[SROA_BC]], i32 0 +; CHECK-NEXT: [[SROA_EXTRACT:%.*]] = extractelement <4 x i32> [[SROA_BC]], i64 0 ; CHECK-NEXT: ret i32 [[SROA_EXTRACT]] ; %sroa = shufflevector <16 x i8> %in, <16 x i8> undef, <4 x i32> @@ -31,7 +31,7 @@ define i32 @type_pun_first(<16 x i8> %in) { ; CHECK-LABEL: @type_pun_first( ; CHECK-NEXT: [[SROA_BC:%.*]] = bitcast <16 x i8> [[IN:%.*]] to <4 x i32> -; CHECK-NEXT: [[SROA_EXTRACT:%.*]] = extractelement <4 x i32> [[SROA_BC]], i32 1 +; CHECK-NEXT: [[SROA_EXTRACT:%.*]] = extractelement <4 x i32> [[SROA_BC]], i64 1 ; CHECK-NEXT: ret i32 [[SROA_EXTRACT]] ; %sroa = shufflevector <16 x i8> %in, <16 x i8> undef, <4 x i32> @@ -44,7 +44,7 @@ ; CHECK-LABEL: @type_pun_misaligned( ; CHECK-NEXT: [[SROA_EXTRACT:%.*]] = shufflevector <16 x i8> [[IN:%.*]], <16 x i8> poison, <16 x i32> ; CHECK-NEXT: [[SROA_BC:%.*]] = bitcast <16 x i8> [[SROA_EXTRACT]] to <4 x i32> -; CHECK-NEXT: [[SROA_EXTRACT1:%.*]] = extractelement <4 x i32> [[SROA_BC]], i32 0 +; CHECK-NEXT: [[SROA_EXTRACT1:%.*]] = extractelement <4 x i32> [[SROA_BC]], i64 0 ; CHECK-NEXT: ret i32 [[SROA_EXTRACT1]] ; %sroa = shufflevector <16 x i8> %in, <16 x i8> undef, <4 x i32> @@ -56,7 +56,7 @@ define i32* @type_pun_pointer(<16 x i8> %in) { ; CHECK-LABEL: @type_pun_pointer( ; CHECK-NEXT: [[SROA_BC:%.*]] = bitcast <16 x i8> [[IN:%.*]] to <4 x i32> -; CHECK-NEXT: [[SROA_EXTRACT:%.*]] = extractelement <4 x i32> [[SROA_BC]], i32 0 +; CHECK-NEXT: [[SROA_EXTRACT:%.*]] = extractelement <4 x i32> [[SROA_BC]], i64 0 ; CHECK-NEXT: [[TMP1:%.*]] = inttoptr i32 [[SROA_EXTRACT]] to i32* ; CHECK-NEXT: ret i32* [[TMP1]] ; @@ -70,7 +70,7 @@ define float @type_pun_float(<16 x i8> %in) { ; CHECK-LABEL: @type_pun_float( ; CHECK-NEXT: [[SROA_BC:%.*]] = bitcast <16 x i8> [[IN:%.*]] to <4 x float> -; CHECK-NEXT: [[SROA_EXTRACT:%.*]] = extractelement <4 x float> [[SROA_BC]], i32 0 +; CHECK-NEXT: [[SROA_EXTRACT:%.*]] = extractelement <4 x float> [[SROA_BC]], i64 0 ; CHECK-NEXT: ret float [[SROA_EXTRACT]] ; %sroa = shufflevector <16 x i8> %in, <16 x i8> undef, <4 x i32> @@ -82,7 +82,7 @@ define double @type_pun_double(<16 x i8> %in) { ; CHECK-LABEL: @type_pun_double( ; CHECK-NEXT: [[SROA_BC:%.*]] = bitcast <16 x i8> [[IN:%.*]] to <2 x double> -; CHECK-NEXT: [[SROA_EXTRACT:%.*]] = extractelement <2 x double> [[SROA_BC]], i32 0 +; CHECK-NEXT: [[SROA_EXTRACT:%.*]] = extractelement <2 x double> [[SROA_BC]], i64 0 ; CHECK-NEXT: ret double [[SROA_EXTRACT]] ; %sroa = shufflevector <16 x i8> %in, <16 x i8> undef, <8 x i32> @@ -95,9 +95,9 @@ define { float, i32 } @type_pun_float_i32(<16 x i8> %in) { ; CHECK-LABEL: @type_pun_float_i32( ; CHECK-NEXT: [[SROA_BC:%.*]] = bitcast <16 x i8> [[IN:%.*]] to <4 x i32> -; CHECK-NEXT: [[SROA_EXTRACT:%.*]] = extractelement <4 x i32> [[SROA_BC]], i32 0 +; CHECK-NEXT: [[SROA_EXTRACT:%.*]] = extractelement <4 x i32> [[SROA_BC]], i64 0 ; CHECK-NEXT: [[SROA_BC1:%.*]] = bitcast <16 x i8> [[IN]] to <4 x float> -; CHECK-NEXT: [[SROA_EXTRACT2:%.*]] = extractelement <4 x float> [[SROA_BC1]], i32 0 +; CHECK-NEXT: [[SROA_EXTRACT2:%.*]] = extractelement <4 x float> [[SROA_BC1]], i64 0 ; CHECK-NEXT: [[TMP1:%.*]] = insertvalue { float, i32 } undef, float [[SROA_EXTRACT2]], 0 ; CHECK-NEXT: [[TMP2:%.*]] = insertvalue { float, i32 } [[TMP1]], i32 [[SROA_EXTRACT]], 1 ; CHECK-NEXT: ret { float, i32 } [[TMP2]] @@ -118,10 +118,10 @@ ; CHECK-NEXT: [[SROA_BC:%.*]] = bitcast <16 x i8> [[IN:%.*]] to <4 x i32> ; CHECK-NEXT: br i1 undef, label [[LEFT:%.*]], label [[RIGHT:%.*]] ; CHECK: left: -; CHECK-NEXT: [[SROA_EXTRACT1:%.*]] = extractelement <4 x i32> [[SROA_BC]], i32 0 +; CHECK-NEXT: [[SROA_EXTRACT1:%.*]] = extractelement <4 x i32> [[SROA_BC]], i64 0 ; CHECK-NEXT: br label [[TAIL:%.*]] ; CHECK: right: -; CHECK-NEXT: [[SROA_EXTRACT:%.*]] = extractelement <4 x i32> [[SROA_BC]], i32 0 +; CHECK-NEXT: [[SROA_EXTRACT:%.*]] = extractelement <4 x i32> [[SROA_BC]], i64 0 ; CHECK-NEXT: br label [[TAIL]] ; CHECK: tail: ; CHECK-NEXT: [[I:%.*]] = phi i32 [ [[SROA_EXTRACT1]], [[LEFT]] ], [ [[SROA_EXTRACT]], [[RIGHT]] ] diff --git a/llvm/test/Transforms/InstCombine/vec_demanded_elts-inseltpoison.ll b/llvm/test/Transforms/InstCombine/vec_demanded_elts-inseltpoison.ll --- a/llvm/test/Transforms/InstCombine/vec_demanded_elts-inseltpoison.ll +++ b/llvm/test/Transforms/InstCombine/vec_demanded_elts-inseltpoison.ll @@ -75,7 +75,7 @@ define <2 x float> @test_fptrunc(double %f) { ; CHECK-LABEL: @test_fptrunc( -; CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x double> , double [[F:%.*]], i32 0 +; CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x double> , double [[F:%.*]], i64 0 ; CHECK-NEXT: [[TMP2:%.*]] = fptrunc <2 x double> [[TMP1]] to <2 x float> ; CHECK-NEXT: ret <2 x float> [[TMP2]] ; @@ -90,7 +90,7 @@ define <2 x double> @test_fpext(float %f) { ; CHECK-LABEL: @test_fpext( -; CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x float> , float [[F:%.*]], i32 0 +; CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x float> , float [[F:%.*]], i64 0 ; CHECK-NEXT: [[TMP2:%.*]] = fpext <2 x float> [[TMP1]] to <2 x double> ; CHECK-NEXT: ret <2 x double> [[TMP2]] ; @@ -105,7 +105,7 @@ define <4 x double> @test_shuffle(<4 x double> %f) { ; CHECK-LABEL: @test_shuffle( -; CHECK-NEXT: [[RET1:%.*]] = insertelement <4 x double> [[F:%.*]], double 1.000000e+00, i32 3 +; CHECK-NEXT: [[RET1:%.*]] = insertelement <4 x double> [[F:%.*]], double 1.000000e+00, i64 3 ; CHECK-NEXT: ret <4 x double> [[RET1]] ; %ret = shufflevector <4 x double> %f, <4 x double> , <4 x i32> @@ -114,7 +114,7 @@ define <4 x float> @test_select(float %f, float %g) { ; CHECK-LABEL: @test_select( -; CHECK-NEXT: [[A3:%.*]] = insertelement <4 x float> , float [[F:%.*]], i32 0 +; CHECK-NEXT: [[A3:%.*]] = insertelement <4 x float> , float [[F:%.*]], i64 0 ; CHECK-NEXT: [[RET:%.*]] = shufflevector <4 x float> [[A3]], <4 x float> , <4 x i32> ; CHECK-NEXT: ret <4 x float> [[RET]] ; @@ -134,7 +134,7 @@ define <2 x i64> @PR24922(<2 x i64> %v) { ; CHECK-LABEL: @PR24922( -; CHECK-NEXT: [[RESULT1:%.*]] = insertelement <2 x i64> [[V:%.*]], i64 0, i32 0 +; CHECK-NEXT: [[RESULT1:%.*]] = insertelement <2 x i64> [[V:%.*]], i64 0, i64 0 ; CHECK-NEXT: ret <2 x i64> [[RESULT1]] ; %result = select <2 x i1> bitcast (<4 x i32> to <2 x i64>), i64 0), i64 0), i1 true>, <2 x i64> %v, <2 x i64> zeroinitializer @@ -172,8 +172,8 @@ define <4 x i32> @inselt_shuf_no_demand_multiuse(i32 %a0, i32 %a1, <4 x i32> %b) { ; CHECK-LABEL: @inselt_shuf_no_demand_multiuse( -; CHECK-NEXT: [[OUT0:%.*]] = insertelement <4 x i32> poison, i32 [[A0:%.*]], i32 0 -; CHECK-NEXT: [[OUT01:%.*]] = insertelement <4 x i32> [[OUT0]], i32 [[A1:%.*]], i32 1 +; CHECK-NEXT: [[OUT0:%.*]] = insertelement <4 x i32> poison, i32 [[A0:%.*]], i64 0 +; CHECK-NEXT: [[OUT01:%.*]] = insertelement <4 x i32> [[OUT0]], i32 [[A1:%.*]], i64 1 ; CHECK-NEXT: [[FOO:%.*]] = add <4 x i32> [[OUT01]], [[B:%.*]] ; CHECK-NEXT: [[SHUFFLE:%.*]] = shufflevector <4 x i32> [[FOO]], <4 x i32> poison, <4 x i32> ; CHECK-NEXT: ret <4 x i32> [[SHUFFLE]] @@ -501,7 +501,7 @@ define i32* @gep_vbase_w_s_idx(<2 x i32*> %base, i64 %index) { ; CHECK-LABEL: @gep_vbase_w_s_idx( -; CHECK-NEXT: [[TMP1:%.*]] = extractelement <2 x i32*> [[BASE:%.*]], i32 1 +; CHECK-NEXT: [[TMP1:%.*]] = extractelement <2 x i32*> [[BASE:%.*]], i64 1 ; CHECK-NEXT: [[EE:%.*]] = getelementptr i32, i32* [[TMP1]], i64 [[INDEX:%.*]] ; CHECK-NEXT: ret i32* [[EE]] ; @@ -525,9 +525,9 @@ define i32* @gep_splat_base_w_cv_idx(i32* %base) { ; CHECK-LABEL: @gep_splat_base_w_cv_idx( -; CHECK-NEXT: [[BASEVEC2:%.*]] = insertelement <2 x i32*> poison, i32* [[BASE:%.*]], i32 1 +; CHECK-NEXT: [[BASEVEC2:%.*]] = insertelement <2 x i32*> poison, i32* [[BASE:%.*]], i64 1 ; CHECK-NEXT: [[GEP:%.*]] = getelementptr i32, <2 x i32*> [[BASEVEC2]], <2 x i64> -; CHECK-NEXT: [[EE:%.*]] = extractelement <2 x i32*> [[GEP]], i32 1 +; CHECK-NEXT: [[EE:%.*]] = extractelement <2 x i32*> [[GEP]], i64 1 ; CHECK-NEXT: ret i32* [[EE]] ; %basevec1 = insertelement <2 x i32*> poison, i32* %base, i32 0 @@ -539,9 +539,9 @@ define i32* @gep_splat_base_w_vidx(i32* %base, <2 x i64> %idxvec) { ; CHECK-LABEL: @gep_splat_base_w_vidx( -; CHECK-NEXT: [[BASEVEC2:%.*]] = insertelement <2 x i32*> poison, i32* [[BASE:%.*]], i32 1 +; CHECK-NEXT: [[BASEVEC2:%.*]] = insertelement <2 x i32*> poison, i32* [[BASE:%.*]], i64 1 ; CHECK-NEXT: [[GEP:%.*]] = getelementptr i32, <2 x i32*> [[BASEVEC2]], <2 x i64> [[IDXVEC:%.*]] -; CHECK-NEXT: [[EE:%.*]] = extractelement <2 x i32*> [[GEP]], i32 1 +; CHECK-NEXT: [[EE:%.*]] = extractelement <2 x i32*> [[GEP]], i64 1 ; CHECK-NEXT: ret i32* [[EE]] ; %basevec1 = insertelement <2 x i32*> poison, i32* %base, i32 0 @@ -597,10 +597,10 @@ } define i32* @gep_splat_both(i32* %base, i64 %idx) { ; CHECK-LABEL: @gep_splat_both( -; CHECK-NEXT: [[BASEVEC2:%.*]] = insertelement <2 x i32*> poison, i32* [[BASE:%.*]], i32 1 -; CHECK-NEXT: [[IDXVEC2:%.*]] = insertelement <2 x i64> poison, i64 [[IDX:%.*]], i32 1 +; CHECK-NEXT: [[BASEVEC2:%.*]] = insertelement <2 x i32*> poison, i32* [[BASE:%.*]], i64 1 +; CHECK-NEXT: [[IDXVEC2:%.*]] = insertelement <2 x i64> poison, i64 [[IDX:%.*]], i64 1 ; CHECK-NEXT: [[GEP:%.*]] = getelementptr i32, <2 x i32*> [[BASEVEC2]], <2 x i64> [[IDXVEC2]] -; CHECK-NEXT: [[EE:%.*]] = extractelement <2 x i32*> [[GEP]], i32 1 +; CHECK-NEXT: [[EE:%.*]] = extractelement <2 x i32*> [[GEP]], i64 1 ; CHECK-NEXT: ret i32* [[EE]] ; %basevec1 = insertelement <2 x i32*> poison, i32* %base, i32 0 @@ -639,7 +639,7 @@ define i32* @PR41624(<2 x { i32, i32 }*> %a) { ; CHECK-LABEL: @PR41624( ; CHECK-NEXT: [[W:%.*]] = getelementptr { i32, i32 }, <2 x { i32, i32 }*> [[A:%.*]], <2 x i64> , <2 x i32> zeroinitializer -; CHECK-NEXT: [[R:%.*]] = extractelement <2 x i32*> [[W]], i32 0 +; CHECK-NEXT: [[R:%.*]] = extractelement <2 x i32*> [[W]], i64 0 ; CHECK-NEXT: ret i32* [[R]] ; %w = getelementptr { i32, i32 }, <2 x { i32, i32 }*> %a, <2 x i64> , <2 x i32> zeroinitializer @@ -740,9 +740,9 @@ define <4 x float> @ins_of_ext(<4 x float> %x, float %y) { ; CHECK-LABEL: @ins_of_ext( -; CHECK-NEXT: [[I1:%.*]] = insertelement <4 x float> [[X:%.*]], float [[Y:%.*]], i32 1 -; CHECK-NEXT: [[I2:%.*]] = insertelement <4 x float> [[I1]], float [[Y]], i32 2 -; CHECK-NEXT: [[I3:%.*]] = insertelement <4 x float> [[I2]], float [[Y]], i32 3 +; CHECK-NEXT: [[I1:%.*]] = insertelement <4 x float> [[X:%.*]], float [[Y:%.*]], i64 1 +; CHECK-NEXT: [[I2:%.*]] = insertelement <4 x float> [[I1]], float [[Y]], i64 2 +; CHECK-NEXT: [[I3:%.*]] = insertelement <4 x float> [[I2]], float [[Y]], i64 3 ; CHECK-NEXT: ret <4 x float> [[I3]] ; %e0 = extractelement <4 x float> %x, i32 0 @@ -755,8 +755,8 @@ define <4 x float> @ins_of_ext_twice(<4 x float> %x, float %y) { ; CHECK-LABEL: @ins_of_ext_twice( -; CHECK-NEXT: [[I2:%.*]] = insertelement <4 x float> [[X:%.*]], float [[Y:%.*]], i32 2 -; CHECK-NEXT: [[I3:%.*]] = insertelement <4 x float> [[I2]], float [[Y]], i32 3 +; CHECK-NEXT: [[I2:%.*]] = insertelement <4 x float> [[X:%.*]], float [[Y:%.*]], i64 2 +; CHECK-NEXT: [[I3:%.*]] = insertelement <4 x float> [[I2]], float [[Y]], i64 3 ; CHECK-NEXT: ret <4 x float> [[I3]] ; %e0 = extractelement <4 x float> %x, i32 0 @@ -773,10 +773,10 @@ define <4 x float> @ins_of_ext_wrong_demand(<4 x float> %x, float %y) { ; CHECK-LABEL: @ins_of_ext_wrong_demand( -; CHECK-NEXT: [[E0:%.*]] = extractelement <4 x float> [[X:%.*]], i32 0 -; CHECK-NEXT: [[I0:%.*]] = insertelement <4 x float> poison, float [[E0]], i32 0 -; CHECK-NEXT: [[I1:%.*]] = insertelement <4 x float> [[I0]], float [[Y:%.*]], i32 1 -; CHECK-NEXT: [[I2:%.*]] = insertelement <4 x float> [[I1]], float [[Y]], i32 2 +; CHECK-NEXT: [[E0:%.*]] = extractelement <4 x float> [[X:%.*]], i64 0 +; CHECK-NEXT: [[I0:%.*]] = insertelement <4 x float> poison, float [[E0]], i64 0 +; CHECK-NEXT: [[I1:%.*]] = insertelement <4 x float> [[I0]], float [[Y:%.*]], i64 1 +; CHECK-NEXT: [[I2:%.*]] = insertelement <4 x float> [[I1]], float [[Y]], i64 2 ; CHECK-NEXT: ret <4 x float> [[I2]] ; %e0 = extractelement <4 x float> %x, i32 0 @@ -791,11 +791,11 @@ define <4 x float> @ins_of_ext_wrong_type(<5 x float> %x, float %y) { ; CHECK-LABEL: @ins_of_ext_wrong_type( -; CHECK-NEXT: [[E0:%.*]] = extractelement <5 x float> [[X:%.*]], i32 0 -; CHECK-NEXT: [[I0:%.*]] = insertelement <4 x float> poison, float [[E0]], i32 0 -; CHECK-NEXT: [[I1:%.*]] = insertelement <4 x float> [[I0]], float [[Y:%.*]], i32 1 -; CHECK-NEXT: [[I2:%.*]] = insertelement <4 x float> [[I1]], float [[Y]], i32 2 -; CHECK-NEXT: [[I3:%.*]] = insertelement <4 x float> [[I2]], float [[Y]], i32 3 +; CHECK-NEXT: [[E0:%.*]] = extractelement <5 x float> [[X:%.*]], i64 0 +; CHECK-NEXT: [[I0:%.*]] = insertelement <4 x float> poison, float [[E0]], i64 0 +; CHECK-NEXT: [[I1:%.*]] = insertelement <4 x float> [[I0]], float [[Y:%.*]], i64 1 +; CHECK-NEXT: [[I2:%.*]] = insertelement <4 x float> [[I1]], float [[Y]], i64 2 +; CHECK-NEXT: [[I3:%.*]] = insertelement <4 x float> [[I2]], float [[Y]], i64 3 ; CHECK-NEXT: ret <4 x float> [[I3]] ; %e0 = extractelement <5 x float> %x, i32 0 @@ -810,7 +810,7 @@ define <4 x i4> @ins_of_ext_undef_elts_propagation(<4 x i4> %v, <4 x i4> %v2, i4 %x) { ; CHECK-LABEL: @ins_of_ext_undef_elts_propagation( -; CHECK-NEXT: [[T2:%.*]] = insertelement <4 x i4> [[V:%.*]], i4 [[X:%.*]], i32 2 +; CHECK-NEXT: [[T2:%.*]] = insertelement <4 x i4> [[V:%.*]], i4 [[X:%.*]], i64 2 ; CHECK-NEXT: [[R:%.*]] = shufflevector <4 x i4> [[T2]], <4 x i4> [[V2:%.*]], <4 x i32> ; CHECK-NEXT: ret <4 x i4> [[R]] ; @@ -825,7 +825,7 @@ define <8 x i4> @ins_of_ext_undef_elts_propagation2(<8 x i4> %v, <8 x i4> %v2, i4 %x) { ; CHECK-LABEL: @ins_of_ext_undef_elts_propagation2( -; CHECK-NEXT: [[I19:%.*]] = insertelement <8 x i4> [[V:%.*]], i4 [[X:%.*]], i32 2 +; CHECK-NEXT: [[I19:%.*]] = insertelement <8 x i4> [[V:%.*]], i4 [[X:%.*]], i64 2 ; CHECK-NEXT: [[I20:%.*]] = shufflevector <8 x i4> [[I19]], <8 x i4> [[V2:%.*]], <8 x i32> ; CHECK-NEXT: [[I21:%.*]] = shufflevector <8 x i4> [[I20]], <8 x i4> [[V]], <8 x i32> ; CHECK-NEXT: ret <8 x i4> [[I21]] diff --git a/llvm/test/Transforms/InstCombine/vec_demanded_elts.ll b/llvm/test/Transforms/InstCombine/vec_demanded_elts.ll --- a/llvm/test/Transforms/InstCombine/vec_demanded_elts.ll +++ b/llvm/test/Transforms/InstCombine/vec_demanded_elts.ll @@ -75,7 +75,7 @@ define <2 x float> @test_fptrunc(double %f) { ; CHECK-LABEL: @test_fptrunc( -; CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x double> , double [[F:%.*]], i32 0 +; CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x double> , double [[F:%.*]], i64 0 ; CHECK-NEXT: [[TMP2:%.*]] = fptrunc <2 x double> [[TMP1]] to <2 x float> ; CHECK-NEXT: ret <2 x float> [[TMP2]] ; @@ -90,7 +90,7 @@ define <2 x double> @test_fpext(float %f) { ; CHECK-LABEL: @test_fpext( -; CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x float> , float [[F:%.*]], i32 0 +; CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x float> , float [[F:%.*]], i64 0 ; CHECK-NEXT: [[TMP2:%.*]] = fpext <2 x float> [[TMP1]] to <2 x double> ; CHECK-NEXT: ret <2 x double> [[TMP2]] ; @@ -105,7 +105,7 @@ define <4 x double> @test_shuffle(<4 x double> %f) { ; CHECK-LABEL: @test_shuffle( -; CHECK-NEXT: [[RET1:%.*]] = insertelement <4 x double> [[F:%.*]], double 1.000000e+00, i32 3 +; CHECK-NEXT: [[RET1:%.*]] = insertelement <4 x double> [[F:%.*]], double 1.000000e+00, i64 3 ; CHECK-NEXT: ret <4 x double> [[RET1]] ; %ret = shufflevector <4 x double> %f, <4 x double> , <4 x i32> @@ -114,7 +114,7 @@ define <4 x float> @test_select(float %f, float %g) { ; CHECK-LABEL: @test_select( -; CHECK-NEXT: [[A3:%.*]] = insertelement <4 x float> , float [[F:%.*]], i32 0 +; CHECK-NEXT: [[A3:%.*]] = insertelement <4 x float> , float [[F:%.*]], i64 0 ; CHECK-NEXT: [[RET:%.*]] = shufflevector <4 x float> [[A3]], <4 x float> , <4 x i32> ; CHECK-NEXT: ret <4 x float> [[RET]] ; @@ -134,7 +134,7 @@ define <2 x i64> @PR24922(<2 x i64> %v) { ; CHECK-LABEL: @PR24922( -; CHECK-NEXT: [[RESULT1:%.*]] = insertelement <2 x i64> [[V:%.*]], i64 0, i32 0 +; CHECK-NEXT: [[RESULT1:%.*]] = insertelement <2 x i64> [[V:%.*]], i64 0, i64 0 ; CHECK-NEXT: ret <2 x i64> [[RESULT1]] ; %result = select <2 x i1> bitcast (<4 x i32> to <2 x i64>), i64 0), i64 0), i1 true>, <2 x i64> %v, <2 x i64> zeroinitializer @@ -172,8 +172,8 @@ define <4 x i32> @inselt_shuf_no_demand_multiuse(i32 %a0, i32 %a1, <4 x i32> %b) { ; CHECK-LABEL: @inselt_shuf_no_demand_multiuse( -; CHECK-NEXT: [[OUT0:%.*]] = insertelement <4 x i32> undef, i32 [[A0:%.*]], i32 0 -; CHECK-NEXT: [[OUT01:%.*]] = insertelement <4 x i32> [[OUT0]], i32 [[A1:%.*]], i32 1 +; CHECK-NEXT: [[OUT0:%.*]] = insertelement <4 x i32> undef, i32 [[A0:%.*]], i64 0 +; CHECK-NEXT: [[OUT01:%.*]] = insertelement <4 x i32> [[OUT0]], i32 [[A1:%.*]], i64 1 ; CHECK-NEXT: [[FOO:%.*]] = add <4 x i32> [[OUT01]], [[B:%.*]] ; CHECK-NEXT: [[SHUFFLE:%.*]] = shufflevector <4 x i32> [[FOO]], <4 x i32> undef, <4 x i32> ; CHECK-NEXT: ret <4 x i32> [[SHUFFLE]] @@ -501,7 +501,7 @@ define i32* @gep_vbase_w_s_idx(<2 x i32*> %base, i64 %index) { ; CHECK-LABEL: @gep_vbase_w_s_idx( -; CHECK-NEXT: [[TMP1:%.*]] = extractelement <2 x i32*> [[BASE:%.*]], i32 1 +; CHECK-NEXT: [[TMP1:%.*]] = extractelement <2 x i32*> [[BASE:%.*]], i64 1 ; CHECK-NEXT: [[EE:%.*]] = getelementptr i32, i32* [[TMP1]], i64 [[INDEX:%.*]] ; CHECK-NEXT: ret i32* [[EE]] ; @@ -525,9 +525,9 @@ define i32* @gep_splat_base_w_cv_idx(i32* %base) { ; CHECK-LABEL: @gep_splat_base_w_cv_idx( -; CHECK-NEXT: [[BASEVEC2:%.*]] = insertelement <2 x i32*> undef, i32* [[BASE:%.*]], i32 1 +; CHECK-NEXT: [[BASEVEC2:%.*]] = insertelement <2 x i32*> undef, i32* [[BASE:%.*]], i64 1 ; CHECK-NEXT: [[GEP:%.*]] = getelementptr i32, <2 x i32*> [[BASEVEC2]], <2 x i64> -; CHECK-NEXT: [[EE:%.*]] = extractelement <2 x i32*> [[GEP]], i32 1 +; CHECK-NEXT: [[EE:%.*]] = extractelement <2 x i32*> [[GEP]], i64 1 ; CHECK-NEXT: ret i32* [[EE]] ; %basevec1 = insertelement <2 x i32*> undef, i32* %base, i32 0 @@ -539,9 +539,9 @@ define i32* @gep_splat_base_w_vidx(i32* %base, <2 x i64> %idxvec) { ; CHECK-LABEL: @gep_splat_base_w_vidx( -; CHECK-NEXT: [[BASEVEC2:%.*]] = insertelement <2 x i32*> undef, i32* [[BASE:%.*]], i32 1 +; CHECK-NEXT: [[BASEVEC2:%.*]] = insertelement <2 x i32*> undef, i32* [[BASE:%.*]], i64 1 ; CHECK-NEXT: [[GEP:%.*]] = getelementptr i32, <2 x i32*> [[BASEVEC2]], <2 x i64> [[IDXVEC:%.*]] -; CHECK-NEXT: [[EE:%.*]] = extractelement <2 x i32*> [[GEP]], i32 1 +; CHECK-NEXT: [[EE:%.*]] = extractelement <2 x i32*> [[GEP]], i64 1 ; CHECK-NEXT: ret i32* [[EE]] ; %basevec1 = insertelement <2 x i32*> undef, i32* %base, i32 0 @@ -597,10 +597,10 @@ } define i32* @gep_splat_both(i32* %base, i64 %idx) { ; CHECK-LABEL: @gep_splat_both( -; CHECK-NEXT: [[BASEVEC2:%.*]] = insertelement <2 x i32*> undef, i32* [[BASE:%.*]], i32 1 -; CHECK-NEXT: [[IDXVEC2:%.*]] = insertelement <2 x i64> undef, i64 [[IDX:%.*]], i32 1 +; CHECK-NEXT: [[BASEVEC2:%.*]] = insertelement <2 x i32*> undef, i32* [[BASE:%.*]], i64 1 +; CHECK-NEXT: [[IDXVEC2:%.*]] = insertelement <2 x i64> undef, i64 [[IDX:%.*]], i64 1 ; CHECK-NEXT: [[GEP:%.*]] = getelementptr i32, <2 x i32*> [[BASEVEC2]], <2 x i64> [[IDXVEC2]] -; CHECK-NEXT: [[EE:%.*]] = extractelement <2 x i32*> [[GEP]], i32 1 +; CHECK-NEXT: [[EE:%.*]] = extractelement <2 x i32*> [[GEP]], i64 1 ; CHECK-NEXT: ret i32* [[EE]] ; %basevec1 = insertelement <2 x i32*> undef, i32* %base, i32 0 @@ -639,7 +639,7 @@ define i32* @PR41624(<2 x { i32, i32 }*> %a) { ; CHECK-LABEL: @PR41624( ; CHECK-NEXT: [[W:%.*]] = getelementptr { i32, i32 }, <2 x { i32, i32 }*> [[A:%.*]], <2 x i64> , <2 x i32> zeroinitializer -; CHECK-NEXT: [[R:%.*]] = extractelement <2 x i32*> [[W]], i32 0 +; CHECK-NEXT: [[R:%.*]] = extractelement <2 x i32*> [[W]], i64 0 ; CHECK-NEXT: ret i32* [[R]] ; %w = getelementptr { i32, i32 }, <2 x { i32, i32 }*> %a, <2 x i64> , <2 x i32> zeroinitializer @@ -740,9 +740,9 @@ define <4 x float> @ins_of_ext(<4 x float> %x, float %y) { ; CHECK-LABEL: @ins_of_ext( -; CHECK-NEXT: [[I1:%.*]] = insertelement <4 x float> [[X:%.*]], float [[Y:%.*]], i32 1 -; CHECK-NEXT: [[I2:%.*]] = insertelement <4 x float> [[I1]], float [[Y]], i32 2 -; CHECK-NEXT: [[I3:%.*]] = insertelement <4 x float> [[I2]], float [[Y]], i32 3 +; CHECK-NEXT: [[I1:%.*]] = insertelement <4 x float> [[X:%.*]], float [[Y:%.*]], i64 1 +; CHECK-NEXT: [[I2:%.*]] = insertelement <4 x float> [[I1]], float [[Y]], i64 2 +; CHECK-NEXT: [[I3:%.*]] = insertelement <4 x float> [[I2]], float [[Y]], i64 3 ; CHECK-NEXT: ret <4 x float> [[I3]] ; %e0 = extractelement <4 x float> %x, i32 0 @@ -755,8 +755,8 @@ define <4 x float> @ins_of_ext_twice(<4 x float> %x, float %y) { ; CHECK-LABEL: @ins_of_ext_twice( -; CHECK-NEXT: [[I2:%.*]] = insertelement <4 x float> [[X:%.*]], float [[Y:%.*]], i32 2 -; CHECK-NEXT: [[I3:%.*]] = insertelement <4 x float> [[I2]], float [[Y]], i32 3 +; CHECK-NEXT: [[I2:%.*]] = insertelement <4 x float> [[X:%.*]], float [[Y:%.*]], i64 2 +; CHECK-NEXT: [[I3:%.*]] = insertelement <4 x float> [[I2]], float [[Y]], i64 3 ; CHECK-NEXT: ret <4 x float> [[I3]] ; %e0 = extractelement <4 x float> %x, i32 0 @@ -773,10 +773,10 @@ define <4 x float> @ins_of_ext_wrong_demand(<4 x float> %x, float %y) { ; CHECK-LABEL: @ins_of_ext_wrong_demand( -; CHECK-NEXT: [[E0:%.*]] = extractelement <4 x float> [[X:%.*]], i32 0 -; CHECK-NEXT: [[I0:%.*]] = insertelement <4 x float> undef, float [[E0]], i32 0 -; CHECK-NEXT: [[I1:%.*]] = insertelement <4 x float> [[I0]], float [[Y:%.*]], i32 1 -; CHECK-NEXT: [[I2:%.*]] = insertelement <4 x float> [[I1]], float [[Y]], i32 2 +; CHECK-NEXT: [[E0:%.*]] = extractelement <4 x float> [[X:%.*]], i64 0 +; CHECK-NEXT: [[I0:%.*]] = insertelement <4 x float> undef, float [[E0]], i64 0 +; CHECK-NEXT: [[I1:%.*]] = insertelement <4 x float> [[I0]], float [[Y:%.*]], i64 1 +; CHECK-NEXT: [[I2:%.*]] = insertelement <4 x float> [[I1]], float [[Y]], i64 2 ; CHECK-NEXT: ret <4 x float> [[I2]] ; %e0 = extractelement <4 x float> %x, i32 0 @@ -791,11 +791,11 @@ define <4 x float> @ins_of_ext_wrong_type(<5 x float> %x, float %y) { ; CHECK-LABEL: @ins_of_ext_wrong_type( -; CHECK-NEXT: [[E0:%.*]] = extractelement <5 x float> [[X:%.*]], i32 0 -; CHECK-NEXT: [[I0:%.*]] = insertelement <4 x float> undef, float [[E0]], i32 0 -; CHECK-NEXT: [[I1:%.*]] = insertelement <4 x float> [[I0]], float [[Y:%.*]], i32 1 -; CHECK-NEXT: [[I2:%.*]] = insertelement <4 x float> [[I1]], float [[Y]], i32 2 -; CHECK-NEXT: [[I3:%.*]] = insertelement <4 x float> [[I2]], float [[Y]], i32 3 +; CHECK-NEXT: [[E0:%.*]] = extractelement <5 x float> [[X:%.*]], i64 0 +; CHECK-NEXT: [[I0:%.*]] = insertelement <4 x float> undef, float [[E0]], i64 0 +; CHECK-NEXT: [[I1:%.*]] = insertelement <4 x float> [[I0]], float [[Y:%.*]], i64 1 +; CHECK-NEXT: [[I2:%.*]] = insertelement <4 x float> [[I1]], float [[Y]], i64 2 +; CHECK-NEXT: [[I3:%.*]] = insertelement <4 x float> [[I2]], float [[Y]], i64 3 ; CHECK-NEXT: ret <4 x float> [[I3]] ; %e0 = extractelement <5 x float> %x, i32 0 @@ -810,7 +810,7 @@ define <4 x i4> @ins_of_ext_undef_elts_propagation(<4 x i4> %v, <4 x i4> %v2, i4 %x) { ; CHECK-LABEL: @ins_of_ext_undef_elts_propagation( -; CHECK-NEXT: [[T2:%.*]] = insertelement <4 x i4> [[V:%.*]], i4 [[X:%.*]], i32 2 +; CHECK-NEXT: [[T2:%.*]] = insertelement <4 x i4> [[V:%.*]], i4 [[X:%.*]], i64 2 ; CHECK-NEXT: [[R:%.*]] = shufflevector <4 x i4> [[T2]], <4 x i4> [[V2:%.*]], <4 x i32> ; CHECK-NEXT: ret <4 x i4> [[R]] ; @@ -825,7 +825,7 @@ define <8 x i4> @ins_of_ext_undef_elts_propagation2(<8 x i4> %v, <8 x i4> %v2, i4 %x) { ; CHECK-LABEL: @ins_of_ext_undef_elts_propagation2( -; CHECK-NEXT: [[I19:%.*]] = insertelement <8 x i4> [[V:%.*]], i4 [[X:%.*]], i32 2 +; CHECK-NEXT: [[I19:%.*]] = insertelement <8 x i4> [[V:%.*]], i4 [[X:%.*]], i64 2 ; CHECK-NEXT: [[I20:%.*]] = shufflevector <8 x i4> [[I19]], <8 x i4> [[V2:%.*]], <8 x i32> ; CHECK-NEXT: [[I21:%.*]] = shufflevector <8 x i4> [[I20]], <8 x i4> [[V]], <8 x i32> ; CHECK-NEXT: ret <8 x i4> [[I21]] diff --git a/llvm/test/Transforms/InstCombine/vec_extract_2elts.ll b/llvm/test/Transforms/InstCombine/vec_extract_2elts.ll --- a/llvm/test/Transforms/InstCombine/vec_extract_2elts.ll +++ b/llvm/test/Transforms/InstCombine/vec_extract_2elts.ll @@ -3,7 +3,7 @@ define void @test(<4 x i32> %v, i64 *%r1, i64 *%r2) { ; CHECK-LABEL: @test( -; CHECK-NEXT: [[TMP1:%.*]] = extractelement <4 x i32> [[V:%.*]], i32 0 +; CHECK-NEXT: [[TMP1:%.*]] = extractelement <4 x i32> [[V:%.*]], i64 0 ; CHECK-NEXT: [[TMP2:%.*]] = zext i32 [[TMP1]] to i64 ; CHECK-NEXT: store i64 [[TMP2]], i64* [[R1:%.*]], align 4 ; CHECK-NEXT: store i64 [[TMP2]], i64* [[R2:%.*]], align 4 diff --git a/llvm/test/Transforms/InstCombine/vec_gep_scalar_arg-inseltpoison.ll b/llvm/test/Transforms/InstCombine/vec_gep_scalar_arg-inseltpoison.ll --- a/llvm/test/Transforms/InstCombine/vec_gep_scalar_arg-inseltpoison.ll +++ b/llvm/test/Transforms/InstCombine/vec_gep_scalar_arg-inseltpoison.ll @@ -4,7 +4,7 @@ define <4 x i16*> @PR41270([4 x i16]* %x) { ; CHECK-LABEL: @PR41270( ; CHECK-NEXT: [[T3:%.*]] = getelementptr inbounds [4 x i16], [4 x i16]* [[X:%.*]], i64 0, i64 3 -; CHECK-NEXT: [[INS2:%.*]] = insertelement <4 x i16*> poison, i16* [[T3]], i32 0 +; CHECK-NEXT: [[INS2:%.*]] = insertelement <4 x i16*> poison, i16* [[T3]], i64 0 ; CHECK-NEXT: ret <4 x i16*> [[INS2]] ; %ins = insertelement <4 x [4 x i16]*> poison, [4 x i16]* %x, i32 0 diff --git a/llvm/test/Transforms/InstCombine/vec_gep_scalar_arg.ll b/llvm/test/Transforms/InstCombine/vec_gep_scalar_arg.ll --- a/llvm/test/Transforms/InstCombine/vec_gep_scalar_arg.ll +++ b/llvm/test/Transforms/InstCombine/vec_gep_scalar_arg.ll @@ -4,7 +4,7 @@ define <4 x i16*> @PR41270([4 x i16]* %x) { ; CHECK-LABEL: @PR41270( ; CHECK-NEXT: [[T3:%.*]] = getelementptr inbounds [4 x i16], [4 x i16]* [[X:%.*]], i64 0, i64 3 -; CHECK-NEXT: [[INS2:%.*]] = insertelement <4 x i16*> undef, i16* [[T3]], i32 0 +; CHECK-NEXT: [[INS2:%.*]] = insertelement <4 x i16*> undef, i16* [[T3]], i64 0 ; CHECK-NEXT: ret <4 x i16*> [[INS2]] ; %ins = insertelement <4 x [4 x i16]*> undef, [4 x i16]* %x, i32 0 diff --git a/llvm/test/Transforms/InstCombine/vec_phi_extract-inseltpoison.ll b/llvm/test/Transforms/InstCombine/vec_phi_extract-inseltpoison.ll --- a/llvm/test/Transforms/InstCombine/vec_phi_extract-inseltpoison.ll +++ b/llvm/test/Transforms/InstCombine/vec_phi_extract-inseltpoison.ll @@ -84,14 +84,14 @@ ; CHECK-LABEL: @nocopy( ; CHECK-NEXT: entry: ; CHECK-NEXT: [[TMP0:%.*]] = trunc i64 [[VAL:%.*]] to i32 -; CHECK-NEXT: [[TMP1:%.*]] = insertelement <16 x i32> undef, i32 [[TMP0]], i32 0 +; CHECK-NEXT: [[TMP1:%.*]] = insertelement <16 x i32> undef, i32 [[TMP0]], i64 0 ; CHECK-NEXT: [[TMP2:%.*]] = shufflevector <16 x i32> [[TMP1]], <16 x i32> poison, <16 x i32> zeroinitializer ; CHECK-NEXT: [[TMP3:%.*]] = add <16 x i32> [[TMP2]], ; CHECK-NEXT: br label [[LOOP:%.*]] ; CHECK: loop: ; CHECK-NEXT: [[TMP4:%.*]] = phi <16 x i32> [ [[TMP3]], [[ENTRY:%.*]] ], [ [[INC:%.*]], [[LOOP]] ] -; CHECK-NEXT: [[ELT:%.*]] = extractelement <16 x i32> [[TMP4]], i32 0 -; CHECK-NEXT: [[ELTCOPY:%.*]] = extractelement <16 x i32> [[TMP4]], i32 1 +; CHECK-NEXT: [[ELT:%.*]] = extractelement <16 x i32> [[TMP4]], i64 0 +; CHECK-NEXT: [[ELTCOPY:%.*]] = extractelement <16 x i32> [[TMP4]], i64 1 ; CHECK-NEXT: [[END:%.*]] = icmp ult i32 [[ELT]], [[LIMIT:%.*]] ; CHECK-NEXT: [[TMP5:%.*]] = add i32 [[ELTCOPY]], 10 ; CHECK-NEXT: [[TMP6:%.*]] = sext i32 [[ELT]] to i64 @@ -128,7 +128,7 @@ define i1 @g(<3 x i32> %input_2) { ; CHECK-LABEL: @g( ; CHECK-NEXT: entry: -; CHECK-NEXT: [[TMP0:%.*]] = extractelement <3 x i32> [[INPUT_2:%.*]], i32 0 +; CHECK-NEXT: [[TMP0:%.*]] = extractelement <3 x i32> [[INPUT_2:%.*]], i64 0 ; CHECK-NEXT: br label [[FOR_COND:%.*]] ; CHECK: for.cond: ; CHECK-NEXT: [[TMP1:%.*]] = phi i32 [ [[TMP0]], [[ENTRY:%.*]] ], [ [[TMP4:%.*]], [[FOR_BODY:%.*]] ] diff --git a/llvm/test/Transforms/InstCombine/vec_phi_extract.ll b/llvm/test/Transforms/InstCombine/vec_phi_extract.ll --- a/llvm/test/Transforms/InstCombine/vec_phi_extract.ll +++ b/llvm/test/Transforms/InstCombine/vec_phi_extract.ll @@ -84,14 +84,14 @@ ; CHECK-LABEL: @nocopy( ; CHECK-NEXT: entry: ; CHECK-NEXT: [[TMP0:%.*]] = trunc i64 [[VAL:%.*]] to i32 -; CHECK-NEXT: [[TMP1:%.*]] = insertelement <16 x i32> undef, i32 [[TMP0]], i32 0 +; CHECK-NEXT: [[TMP1:%.*]] = insertelement <16 x i32> undef, i32 [[TMP0]], i64 0 ; CHECK-NEXT: [[TMP2:%.*]] = shufflevector <16 x i32> [[TMP1]], <16 x i32> poison, <16 x i32> zeroinitializer ; CHECK-NEXT: [[TMP3:%.*]] = add <16 x i32> [[TMP2]], ; CHECK-NEXT: br label [[LOOP:%.*]] ; CHECK: loop: ; CHECK-NEXT: [[TMP4:%.*]] = phi <16 x i32> [ [[TMP3]], [[ENTRY:%.*]] ], [ [[INC:%.*]], [[LOOP]] ] -; CHECK-NEXT: [[ELT:%.*]] = extractelement <16 x i32> [[TMP4]], i32 0 -; CHECK-NEXT: [[ELTCOPY:%.*]] = extractelement <16 x i32> [[TMP4]], i32 1 +; CHECK-NEXT: [[ELT:%.*]] = extractelement <16 x i32> [[TMP4]], i64 0 +; CHECK-NEXT: [[ELTCOPY:%.*]] = extractelement <16 x i32> [[TMP4]], i64 1 ; CHECK-NEXT: [[END:%.*]] = icmp ult i32 [[ELT]], [[LIMIT:%.*]] ; CHECK-NEXT: [[TMP5:%.*]] = add i32 [[ELTCOPY]], 10 ; CHECK-NEXT: [[TMP6:%.*]] = sext i32 [[ELT]] to i64 @@ -128,7 +128,7 @@ define i1 @g(<3 x i32> %input_2) { ; CHECK-LABEL: @g( ; CHECK-NEXT: entry: -; CHECK-NEXT: [[TMP0:%.*]] = extractelement <3 x i32> [[INPUT_2:%.*]], i32 0 +; CHECK-NEXT: [[TMP0:%.*]] = extractelement <3 x i32> [[INPUT_2:%.*]], i64 0 ; CHECK-NEXT: br label [[FOR_COND:%.*]] ; CHECK: for.cond: ; CHECK-NEXT: [[TMP1:%.*]] = phi i32 [ [[TMP0]], [[ENTRY:%.*]] ], [ [[TMP4:%.*]], [[FOR_BODY:%.*]] ] diff --git a/llvm/test/Transforms/InstCombine/vec_shuffle-inseltpoison.ll b/llvm/test/Transforms/InstCombine/vec_shuffle-inseltpoison.ll --- a/llvm/test/Transforms/InstCombine/vec_shuffle-inseltpoison.ll +++ b/llvm/test/Transforms/InstCombine/vec_shuffle-inseltpoison.ll @@ -29,7 +29,7 @@ define i32 @test4(<4 x i32> %X) { ; CHECK-LABEL: @test4( -; CHECK-NEXT: [[R:%.*]] = extractelement <4 x i32> [[X:%.*]], i32 0 +; CHECK-NEXT: [[R:%.*]] = extractelement <4 x i32> [[X:%.*]], i64 0 ; CHECK-NEXT: ret i32 [[R]] ; %t = shufflevector <4 x i32> %X, <4 x i32> poison, <4 x i32> zeroinitializer @@ -39,7 +39,7 @@ define i32 @test5(<4 x i32> %X) { ; CHECK-LABEL: @test5( -; CHECK-NEXT: [[R:%.*]] = extractelement <4 x i32> [[X:%.*]], i32 3 +; CHECK-NEXT: [[R:%.*]] = extractelement <4 x i32> [[X:%.*]], i64 3 ; CHECK-NEXT: ret i32 [[R]] ; %t = shufflevector <4 x i32> %X, <4 x i32> poison, <4 x i32> @@ -49,7 +49,7 @@ define float @test6(<4 x float> %X) { ; CHECK-LABEL: @test6( -; CHECK-NEXT: [[R:%.*]] = extractelement <4 x float> [[X:%.*]], i32 0 +; CHECK-NEXT: [[R:%.*]] = extractelement <4 x float> [[X:%.*]], i64 0 ; CHECK-NEXT: ret float [[R]] ; %X1 = bitcast <4 x float> %X to <4 x i32> @@ -62,7 +62,7 @@ define float @testvscale6( %X) { ; CHECK-LABEL: @testvscale6( ; CHECK-NEXT: [[T2:%.*]] = shufflevector [[X:%.*]], poison, zeroinitializer -; CHECK-NEXT: [[R:%.*]] = extractelement [[T2]], i32 0 +; CHECK-NEXT: [[R:%.*]] = extractelement [[T2]], i64 0 ; CHECK-NEXT: ret float [[R]] ; %X1 = bitcast %X to @@ -229,8 +229,8 @@ define <2 x i8> @test13a(i8 %x1, i8 %x2) { ; CHECK-LABEL: @test13a( -; CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x i8> undef, i8 [[X1:%.*]], i32 1 -; CHECK-NEXT: [[TMP2:%.*]] = insertelement <2 x i8> [[TMP1]], i8 [[X2:%.*]], i32 0 +; CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x i8> undef, i8 [[X1:%.*]], i64 1 +; CHECK-NEXT: [[TMP2:%.*]] = insertelement <2 x i8> [[TMP1]], i8 [[X2:%.*]], i64 0 ; CHECK-NEXT: [[TMP3:%.*]] = add <2 x i8> [[TMP2]], ; CHECK-NEXT: ret <2 x i8> [[TMP3]] ; @@ -245,8 +245,8 @@ define <3 x i32> @add_wider(i32 %y, i32 %z) { ; CHECK-LABEL: @add_wider( -; CHECK-NEXT: [[I0:%.*]] = insertelement <2 x i32> poison, i32 [[Y:%.*]], i32 0 -; CHECK-NEXT: [[I1:%.*]] = insertelement <2 x i32> [[I0]], i32 [[Z:%.*]], i32 1 +; CHECK-NEXT: [[I0:%.*]] = insertelement <2 x i32> poison, i32 [[Y:%.*]], i64 0 +; CHECK-NEXT: [[I1:%.*]] = insertelement <2 x i32> [[I0]], i32 [[Z:%.*]], i64 1 ; CHECK-NEXT: [[A:%.*]] = add <2 x i32> [[I1]], ; CHECK-NEXT: [[EXT:%.*]] = shufflevector <2 x i32> [[A]], <2 x i32> poison, <3 x i32> ; CHECK-NEXT: ret <3 x i32> [[EXT]] @@ -262,8 +262,8 @@ define <3 x i32> @div_wider(i32 %y, i32 %z) { ; CHECK-LABEL: @div_wider( -; CHECK-NEXT: [[I0:%.*]] = insertelement <2 x i32> poison, i32 [[Y:%.*]], i32 0 -; CHECK-NEXT: [[I1:%.*]] = insertelement <2 x i32> [[I0]], i32 [[Z:%.*]], i32 1 +; CHECK-NEXT: [[I0:%.*]] = insertelement <2 x i32> poison, i32 [[Y:%.*]], i64 0 +; CHECK-NEXT: [[I1:%.*]] = insertelement <2 x i32> [[I0]], i32 [[Z:%.*]], i64 1 ; CHECK-NEXT: [[A:%.*]] = sdiv <2 x i32> [[I1]], ; CHECK-NEXT: [[EXT:%.*]] = shufflevector <2 x i32> [[A]], <2 x i32> poison, <3 x i32> ; CHECK-NEXT: ret <3 x i32> [[EXT]] @@ -279,8 +279,8 @@ define <3 x i8> @fold_inselts_with_widening_shuffle(i8 %x, i8 %y) { ; CHECK-LABEL: @fold_inselts_with_widening_shuffle( -; CHECK-NEXT: [[TMP1:%.*]] = insertelement <3 x i8> undef, i8 [[X:%.*]], i32 0 -; CHECK-NEXT: [[TMP2:%.*]] = insertelement <3 x i8> [[TMP1]], i8 [[Y:%.*]], i32 1 +; CHECK-NEXT: [[TMP1:%.*]] = insertelement <3 x i8> undef, i8 [[X:%.*]], i64 0 +; CHECK-NEXT: [[TMP2:%.*]] = insertelement <3 x i8> [[TMP1]], i8 [[Y:%.*]], i64 1 ; CHECK-NEXT: ret <3 x i8> [[TMP2]] ; %ins0 = insertelement <2 x i8> poison, i8 %x, i32 0 @@ -291,7 +291,7 @@ define <2 x i8> @test13b(i8 %x) { ; CHECK-LABEL: @test13b( -; CHECK-NEXT: [[B:%.*]] = insertelement <2 x i8> poison, i8 [[X:%.*]], i32 1 +; CHECK-NEXT: [[B:%.*]] = insertelement <2 x i8> poison, i8 [[X:%.*]], i64 1 ; CHECK-NEXT: ret <2 x i8> [[B]] ; %A = insertelement <2 x i8> poison, i8 %x, i32 0 @@ -301,8 +301,8 @@ define <2 x i8> @test13c(i8 %x1, i8 %x2) { ; CHECK-LABEL: @test13c( -; CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x i8> undef, i8 [[X1:%.*]], i32 0 -; CHECK-NEXT: [[TMP2:%.*]] = insertelement <2 x i8> [[TMP1]], i8 [[X2:%.*]], i32 1 +; CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x i8> undef, i8 [[X1:%.*]], i64 0 +; CHECK-NEXT: [[TMP2:%.*]] = insertelement <2 x i8> [[TMP1]], i8 [[X2:%.*]], i64 1 ; CHECK-NEXT: ret <2 x i8> [[TMP2]] ; %A = insertelement <4 x i8> poison, i8 %x1, i32 0 @@ -749,7 +749,7 @@ define i32 @pr19737(<4 x i32> %in0) { ; CHECK-LABEL: @pr19737( -; CHECK-NEXT: [[RV:%.*]] = extractelement <4 x i32> [[IN0:%.*]], i32 0 +; CHECK-NEXT: [[RV:%.*]] = extractelement <4 x i32> [[IN0:%.*]], i64 0 ; CHECK-NEXT: ret i32 [[RV]] ; %shuffle.i = shufflevector <4 x i32> zeroinitializer, <4 x i32> %in0, <4 x i32> diff --git a/llvm/test/Transforms/InstCombine/vec_shuffle.ll b/llvm/test/Transforms/InstCombine/vec_shuffle.ll --- a/llvm/test/Transforms/InstCombine/vec_shuffle.ll +++ b/llvm/test/Transforms/InstCombine/vec_shuffle.ll @@ -29,7 +29,7 @@ define i32 @test4(<4 x i32> %X) { ; CHECK-LABEL: @test4( -; CHECK-NEXT: [[R:%.*]] = extractelement <4 x i32> [[X:%.*]], i32 0 +; CHECK-NEXT: [[R:%.*]] = extractelement <4 x i32> [[X:%.*]], i64 0 ; CHECK-NEXT: ret i32 [[R]] ; %t = shufflevector <4 x i32> %X, <4 x i32> undef, <4 x i32> zeroinitializer @@ -39,7 +39,7 @@ define i32 @test5(<4 x i32> %X) { ; CHECK-LABEL: @test5( -; CHECK-NEXT: [[R:%.*]] = extractelement <4 x i32> [[X:%.*]], i32 3 +; CHECK-NEXT: [[R:%.*]] = extractelement <4 x i32> [[X:%.*]], i64 3 ; CHECK-NEXT: ret i32 [[R]] ; %t = shufflevector <4 x i32> %X, <4 x i32> undef, <4 x i32> @@ -49,7 +49,7 @@ define float @test6(<4 x float> %X) { ; CHECK-LABEL: @test6( -; CHECK-NEXT: [[R:%.*]] = extractelement <4 x float> [[X:%.*]], i32 0 +; CHECK-NEXT: [[R:%.*]] = extractelement <4 x float> [[X:%.*]], i64 0 ; CHECK-NEXT: ret float [[R]] ; %X1 = bitcast <4 x float> %X to <4 x i32> @@ -62,7 +62,7 @@ define float @testvscale6( %X) { ; CHECK-LABEL: @testvscale6( ; CHECK-NEXT: [[T2:%.*]] = shufflevector [[X:%.*]], undef, zeroinitializer -; CHECK-NEXT: [[R:%.*]] = extractelement [[T2]], i32 0 +; CHECK-NEXT: [[R:%.*]] = extractelement [[T2]], i64 0 ; CHECK-NEXT: ret float [[R]] ; %X1 = bitcast %X to @@ -229,8 +229,8 @@ define <2 x i8> @test13a(i8 %x1, i8 %x2) { ; CHECK-LABEL: @test13a( -; CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x i8> undef, i8 [[X1:%.*]], i32 1 -; CHECK-NEXT: [[TMP2:%.*]] = insertelement <2 x i8> [[TMP1]], i8 [[X2:%.*]], i32 0 +; CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x i8> undef, i8 [[X1:%.*]], i64 1 +; CHECK-NEXT: [[TMP2:%.*]] = insertelement <2 x i8> [[TMP1]], i8 [[X2:%.*]], i64 0 ; CHECK-NEXT: [[TMP3:%.*]] = add <2 x i8> [[TMP2]], ; CHECK-NEXT: ret <2 x i8> [[TMP3]] ; @@ -245,8 +245,8 @@ define <3 x i32> @add_wider(i32 %y, i32 %z) { ; CHECK-LABEL: @add_wider( -; CHECK-NEXT: [[I0:%.*]] = insertelement <2 x i32> undef, i32 [[Y:%.*]], i32 0 -; CHECK-NEXT: [[I1:%.*]] = insertelement <2 x i32> [[I0]], i32 [[Z:%.*]], i32 1 +; CHECK-NEXT: [[I0:%.*]] = insertelement <2 x i32> undef, i32 [[Y:%.*]], i64 0 +; CHECK-NEXT: [[I1:%.*]] = insertelement <2 x i32> [[I0]], i32 [[Z:%.*]], i64 1 ; CHECK-NEXT: [[A:%.*]] = add <2 x i32> [[I1]], ; CHECK-NEXT: [[EXT:%.*]] = shufflevector <2 x i32> [[A]], <2 x i32> undef, <3 x i32> ; CHECK-NEXT: ret <3 x i32> [[EXT]] @@ -262,8 +262,8 @@ define <3 x i32> @div_wider(i32 %y, i32 %z) { ; CHECK-LABEL: @div_wider( -; CHECK-NEXT: [[I0:%.*]] = insertelement <2 x i32> undef, i32 [[Y:%.*]], i32 0 -; CHECK-NEXT: [[I1:%.*]] = insertelement <2 x i32> [[I0]], i32 [[Z:%.*]], i32 1 +; CHECK-NEXT: [[I0:%.*]] = insertelement <2 x i32> undef, i32 [[Y:%.*]], i64 0 +; CHECK-NEXT: [[I1:%.*]] = insertelement <2 x i32> [[I0]], i32 [[Z:%.*]], i64 1 ; CHECK-NEXT: [[A:%.*]] = sdiv <2 x i32> [[I1]], ; CHECK-NEXT: [[EXT:%.*]] = shufflevector <2 x i32> [[A]], <2 x i32> undef, <3 x i32> ; CHECK-NEXT: ret <3 x i32> [[EXT]] @@ -279,8 +279,8 @@ define <3 x i8> @fold_inselts_with_widening_shuffle(i8 %x, i8 %y) { ; CHECK-LABEL: @fold_inselts_with_widening_shuffle( -; CHECK-NEXT: [[TMP1:%.*]] = insertelement <3 x i8> undef, i8 [[X:%.*]], i32 0 -; CHECK-NEXT: [[TMP2:%.*]] = insertelement <3 x i8> [[TMP1]], i8 [[Y:%.*]], i32 1 +; CHECK-NEXT: [[TMP1:%.*]] = insertelement <3 x i8> undef, i8 [[X:%.*]], i64 0 +; CHECK-NEXT: [[TMP2:%.*]] = insertelement <3 x i8> [[TMP1]], i8 [[Y:%.*]], i64 1 ; CHECK-NEXT: ret <3 x i8> [[TMP2]] ; %ins0 = insertelement <2 x i8> undef, i8 %x, i32 0 @@ -291,7 +291,7 @@ define <2 x i8> @test13b(i8 %x) { ; CHECK-LABEL: @test13b( -; CHECK-NEXT: [[B:%.*]] = insertelement <2 x i8> undef, i8 [[X:%.*]], i32 1 +; CHECK-NEXT: [[B:%.*]] = insertelement <2 x i8> undef, i8 [[X:%.*]], i64 1 ; CHECK-NEXT: ret <2 x i8> [[B]] ; %A = insertelement <2 x i8> undef, i8 %x, i32 0 @@ -301,8 +301,8 @@ define <2 x i8> @test13c(i8 %x1, i8 %x2) { ; CHECK-LABEL: @test13c( -; CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x i8> undef, i8 [[X1:%.*]], i32 0 -; CHECK-NEXT: [[TMP2:%.*]] = insertelement <2 x i8> [[TMP1]], i8 [[X2:%.*]], i32 1 +; CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x i8> undef, i8 [[X1:%.*]], i64 0 +; CHECK-NEXT: [[TMP2:%.*]] = insertelement <2 x i8> [[TMP1]], i8 [[X2:%.*]], i64 1 ; CHECK-NEXT: ret <2 x i8> [[TMP2]] ; %A = insertelement <4 x i8> undef, i8 %x1, i32 0 @@ -749,7 +749,7 @@ define i32 @pr19737(<4 x i32> %in0) { ; CHECK-LABEL: @pr19737( -; CHECK-NEXT: [[RV:%.*]] = extractelement <4 x i32> [[IN0:%.*]], i32 0 +; CHECK-NEXT: [[RV:%.*]] = extractelement <4 x i32> [[IN0:%.*]], i64 0 ; CHECK-NEXT: ret i32 [[RV]] ; %shuffle.i = shufflevector <4 x i32> zeroinitializer, <4 x i32> %in0, <4 x i32> diff --git a/llvm/test/Transforms/InstCombine/vector-casts-inseltpoison.ll b/llvm/test/Transforms/InstCombine/vector-casts-inseltpoison.ll --- a/llvm/test/Transforms/InstCombine/vector-casts-inseltpoison.ll +++ b/llvm/test/Transforms/InstCombine/vector-casts-inseltpoison.ll @@ -294,7 +294,7 @@ define <3 x i16> @trunc_inselt_undef(i32 %x) { ; CHECK-LABEL: @trunc_inselt_undef( ; CHECK-NEXT: [[TMP1:%.*]] = trunc i32 [[X:%.*]] to i16 -; CHECK-NEXT: [[TRUNC:%.*]] = insertelement <3 x i16> undef, i16 [[TMP1]], i32 1 +; CHECK-NEXT: [[TRUNC:%.*]] = insertelement <3 x i16> undef, i16 [[TMP1]], i64 1 ; CHECK-NEXT: ret <3 x i16> [[TRUNC]] ; %vec = insertelement <3 x i32> poison, i32 %x, i32 1 @@ -322,7 +322,7 @@ define <3 x i16> @trunc_inselt1(i32 %x) { ; CHECK-LABEL: @trunc_inselt1( -; CHECK-NEXT: [[VEC:%.*]] = insertelement <3 x i32> , i32 [[X:%.*]], i32 1 +; CHECK-NEXT: [[VEC:%.*]] = insertelement <3 x i32> , i32 [[X:%.*]], i64 1 ; CHECK-NEXT: [[TRUNC:%.*]] = trunc <3 x i32> [[VEC]] to <3 x i16> ; CHECK-NEXT: ret <3 x i16> [[TRUNC]] ; @@ -367,7 +367,7 @@ define <3 x float> @fptrunc_inselt2(<3 x double> %x) { ; CHECK-LABEL: @fptrunc_inselt2( -; CHECK-NEXT: [[VEC:%.*]] = insertelement <3 x double> [[X:%.*]], double 4.000000e+00, i32 2 +; CHECK-NEXT: [[VEC:%.*]] = insertelement <3 x double> [[X:%.*]], double 4.000000e+00, i64 2 ; CHECK-NEXT: [[TRUNC:%.*]] = fptrunc <3 x double> [[VEC]] to <3 x float> ; CHECK-NEXT: ret <3 x float> [[TRUNC]] ; diff --git a/llvm/test/Transforms/InstCombine/vector-casts.ll b/llvm/test/Transforms/InstCombine/vector-casts.ll --- a/llvm/test/Transforms/InstCombine/vector-casts.ll +++ b/llvm/test/Transforms/InstCombine/vector-casts.ll @@ -294,7 +294,7 @@ define <3 x i16> @trunc_inselt_undef(i32 %x) { ; CHECK-LABEL: @trunc_inselt_undef( ; CHECK-NEXT: [[TMP1:%.*]] = trunc i32 [[X:%.*]] to i16 -; CHECK-NEXT: [[TRUNC:%.*]] = insertelement <3 x i16> undef, i16 [[TMP1]], i32 1 +; CHECK-NEXT: [[TRUNC:%.*]] = insertelement <3 x i16> undef, i16 [[TMP1]], i64 1 ; CHECK-NEXT: ret <3 x i16> [[TRUNC]] ; %vec = insertelement <3 x i32> undef, i32 %x, i32 1 @@ -322,7 +322,7 @@ define <3 x i16> @trunc_inselt1(i32 %x) { ; CHECK-LABEL: @trunc_inselt1( -; CHECK-NEXT: [[VEC:%.*]] = insertelement <3 x i32> , i32 [[X:%.*]], i32 1 +; CHECK-NEXT: [[VEC:%.*]] = insertelement <3 x i32> , i32 [[X:%.*]], i64 1 ; CHECK-NEXT: [[TRUNC:%.*]] = trunc <3 x i32> [[VEC]] to <3 x i16> ; CHECK-NEXT: ret <3 x i16> [[TRUNC]] ; @@ -367,7 +367,7 @@ define <3 x float> @fptrunc_inselt2(<3 x double> %x) { ; CHECK-LABEL: @fptrunc_inselt2( -; CHECK-NEXT: [[VEC:%.*]] = insertelement <3 x double> [[X:%.*]], double 4.000000e+00, i32 2 +; CHECK-NEXT: [[VEC:%.*]] = insertelement <3 x double> [[X:%.*]], double 4.000000e+00, i64 2 ; CHECK-NEXT: [[TRUNC:%.*]] = fptrunc <3 x double> [[VEC]] to <3 x float> ; CHECK-NEXT: ret <3 x float> [[TRUNC]] ; diff --git a/llvm/test/Transforms/InstCombine/vector-reverse.ll b/llvm/test/Transforms/InstCombine/vector-reverse.ll --- a/llvm/test/Transforms/InstCombine/vector-reverse.ll +++ b/llvm/test/Transforms/InstCombine/vector-reverse.ll @@ -17,7 +17,7 @@ define @binop_reverse_splat_RHS( %a, i32 %b) { ; CHECK-LABEL: @binop_reverse_splat_RHS( -; CHECK-NEXT: [[SPLAT_INSERT:%.*]] = insertelement poison, i32 [[B:%.*]], i32 0 +; CHECK-NEXT: [[SPLAT_INSERT:%.*]] = insertelement poison, i32 [[B:%.*]], i64 0 ; CHECK-NEXT: [[SPLAT:%.*]] = shufflevector [[SPLAT_INSERT]], poison, zeroinitializer ; CHECK-NEXT: [[UDIV1:%.*]] = udiv [[A:%.*]], [[SPLAT]] ; CHECK-NEXT: ret [[UDIV1]] @@ -32,7 +32,7 @@ define @binop_reverse_splat_LHS( %a, i32 %b) { ; CHECK-LABEL: @binop_reverse_splat_LHS( -; CHECK-NEXT: [[SPLAT_INSERT:%.*]] = insertelement poison, i32 [[B:%.*]], i32 0 +; CHECK-NEXT: [[SPLAT_INSERT:%.*]] = insertelement poison, i32 [[B:%.*]], i64 0 ; CHECK-NEXT: [[SPLAT:%.*]] = shufflevector [[SPLAT_INSERT]], poison, zeroinitializer ; CHECK-NEXT: [[UDIV1:%.*]] = udiv [[SPLAT]], [[A:%.*]] ; CHECK-NEXT: ret [[UDIV1]] diff --git a/llvm/test/Transforms/InstCombine/vector_insertelt_shuffle-inseltpoison.ll b/llvm/test/Transforms/InstCombine/vector_insertelt_shuffle-inseltpoison.ll --- a/llvm/test/Transforms/InstCombine/vector_insertelt_shuffle-inseltpoison.ll +++ b/llvm/test/Transforms/InstCombine/vector_insertelt_shuffle-inseltpoison.ll @@ -16,8 +16,8 @@ define <4 x float> @bar(<4 x float> %x, float %a) { ; CHECK-LABEL: @bar( -; CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x float> [[X:%.*]], float 2.000000e+00, i32 2 -; CHECK-NEXT: [[INS2:%.*]] = insertelement <4 x float> [[TMP1]], float [[A:%.*]], i32 1 +; CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x float> [[X:%.*]], float 2.000000e+00, i64 2 +; CHECK-NEXT: [[INS2:%.*]] = insertelement <4 x float> [[TMP1]], float [[A:%.*]], i64 1 ; CHECK-NEXT: ret <4 x float> [[INS2]] ; %ins1 = insertelement<4 x float> %x, float %a, i32 1 @@ -27,7 +27,7 @@ define <4 x float> @baz(<4 x float> %x, i32 %a) { ; CHECK-LABEL: @baz( -; CHECK-NEXT: [[INS1:%.*]] = insertelement <4 x float> [[X:%.*]], float 1.000000e+00, i32 1 +; CHECK-NEXT: [[INS1:%.*]] = insertelement <4 x float> [[X:%.*]], float 1.000000e+00, i64 1 ; CHECK-NEXT: [[INS2:%.*]] = insertelement <4 x float> [[INS1]], float 2.000000e+00, i32 [[A:%.*]] ; CHECK-NEXT: ret <4 x float> [[INS2]] ; @@ -39,7 +39,7 @@ ; insertelements should fold to shuffle define <4 x float> @bazz(<4 x float> %x, i32 %a) { ; CHECK-LABEL: @bazz( -; CHECK-NEXT: [[INS1:%.*]] = insertelement <4 x float> [[X:%.*]], float 1.000000e+00, i32 3 +; CHECK-NEXT: [[INS1:%.*]] = insertelement <4 x float> [[X:%.*]], float 1.000000e+00, i64 3 ; CHECK-NEXT: [[INS2:%.*]] = insertelement <4 x float> [[INS1]], float 5.000000e+00, i32 [[A:%.*]] ; CHECK-NEXT: [[INS5:%.*]] = shufflevector <4 x float> [[INS2]], <4 x float> , <4 x i32> ; CHECK-NEXT: [[INS6:%.*]] = insertelement <4 x float> [[INS5]], float 7.000000e+00, i32 [[A]] diff --git a/llvm/test/Transforms/InstCombine/vector_insertelt_shuffle.ll b/llvm/test/Transforms/InstCombine/vector_insertelt_shuffle.ll --- a/llvm/test/Transforms/InstCombine/vector_insertelt_shuffle.ll +++ b/llvm/test/Transforms/InstCombine/vector_insertelt_shuffle.ll @@ -16,8 +16,8 @@ define <4 x float> @bar(<4 x float> %x, float %a) { ; CHECK-LABEL: @bar( -; CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x float> [[X:%.*]], float 2.000000e+00, i32 2 -; CHECK-NEXT: [[INS2:%.*]] = insertelement <4 x float> [[TMP1]], float [[A:%.*]], i32 1 +; CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x float> [[X:%.*]], float 2.000000e+00, i64 2 +; CHECK-NEXT: [[INS2:%.*]] = insertelement <4 x float> [[TMP1]], float [[A:%.*]], i64 1 ; CHECK-NEXT: ret <4 x float> [[INS2]] ; %ins1 = insertelement<4 x float> %x, float %a, i32 1 @@ -27,7 +27,7 @@ define <4 x float> @baz(<4 x float> %x, i32 %a) { ; CHECK-LABEL: @baz( -; CHECK-NEXT: [[INS1:%.*]] = insertelement <4 x float> [[X:%.*]], float 1.000000e+00, i32 1 +; CHECK-NEXT: [[INS1:%.*]] = insertelement <4 x float> [[X:%.*]], float 1.000000e+00, i64 1 ; CHECK-NEXT: [[INS2:%.*]] = insertelement <4 x float> [[INS1]], float 2.000000e+00, i32 [[A:%.*]] ; CHECK-NEXT: ret <4 x float> [[INS2]] ; @@ -39,7 +39,7 @@ ; insertelements should fold to shuffle define <4 x float> @bazz(<4 x float> %x, i32 %a) { ; CHECK-LABEL: @bazz( -; CHECK-NEXT: [[INS1:%.*]] = insertelement <4 x float> [[X:%.*]], float 1.000000e+00, i32 3 +; CHECK-NEXT: [[INS1:%.*]] = insertelement <4 x float> [[X:%.*]], float 1.000000e+00, i64 3 ; CHECK-NEXT: [[INS2:%.*]] = insertelement <4 x float> [[INS1]], float 5.000000e+00, i32 [[A:%.*]] ; CHECK-NEXT: [[INS5:%.*]] = shufflevector <4 x float> [[INS2]], <4 x float> , <4 x i32> ; CHECK-NEXT: [[INS6:%.*]] = insertelement <4 x float> [[INS5]], float 7.000000e+00, i32 [[A]] diff --git a/llvm/test/Transforms/InstCombine/vscale_cmp.ll b/llvm/test/Transforms/InstCombine/vscale_cmp.ll --- a/llvm/test/Transforms/InstCombine/vscale_cmp.ll +++ b/llvm/test/Transforms/InstCombine/vscale_cmp.ll @@ -12,7 +12,7 @@ define @gep_scalevector1(i32* %X) nounwind { ; CHECK-LABEL: @gep_scalevector1( -; CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32* [[X:%.*]], i32 0 +; CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32* [[X:%.*]], i64 0 ; CHECK-NEXT: [[TMP1:%.*]] = icmp eq [[DOTSPLATINSERT]], zeroinitializer ; CHECK-NEXT: [[C:%.*]] = shufflevector [[TMP1]], poison, zeroinitializer ; CHECK-NEXT: ret [[C]] diff --git a/llvm/test/Transforms/InstCombine/vscale_extractelement-inseltpoison.ll b/llvm/test/Transforms/InstCombine/vscale_extractelement-inseltpoison.ll --- a/llvm/test/Transforms/InstCombine/vscale_extractelement-inseltpoison.ll +++ b/llvm/test/Transforms/InstCombine/vscale_extractelement-inseltpoison.ll @@ -44,9 +44,9 @@ ; TODO: Instcombine could remove the insert. define i8 @extractelement_bitcast_wrong_insert( %a, i32 %x) { ; CHECK-LABEL: @extractelement_bitcast_wrong_insert( -; CHECK-NEXT: [[VEC:%.*]] = insertelement [[A:%.*]], i32 [[X:%.*]], i32 1 +; CHECK-NEXT: [[VEC:%.*]] = insertelement [[A:%.*]], i32 [[X:%.*]], i64 1 ; CHECK-NEXT: [[VEC_CAST:%.*]] = bitcast [[VEC]] to -; CHECK-NEXT: [[R:%.*]] = extractelement [[VEC_CAST]], i32 2 +; CHECK-NEXT: [[R:%.*]] = extractelement [[VEC_CAST]], i64 2 ; CHECK-NEXT: ret i8 [[R]] ; %vec = insertelement %a, i32 %x, i32 1 ; <- This insert could be removed. @@ -57,9 +57,9 @@ define i32 @extractelement_shuffle_maybe_out_of_range(i32 %v) { ; CHECK-LABEL: @extractelement_shuffle_maybe_out_of_range( -; CHECK-NEXT: [[IN:%.*]] = insertelement poison, i32 [[V:%.*]], i32 0 +; CHECK-NEXT: [[IN:%.*]] = insertelement poison, i32 [[V:%.*]], i64 0 ; CHECK-NEXT: [[SPLAT:%.*]] = shufflevector [[IN]], poison, zeroinitializer -; CHECK-NEXT: [[R:%.*]] = extractelement [[SPLAT]], i32 4 +; CHECK-NEXT: [[R:%.*]] = extractelement [[SPLAT]], i64 4 ; CHECK-NEXT: ret i32 [[R]] ; %in = insertelement poison, i32 %v, i32 0 @@ -70,9 +70,9 @@ define i32 @extractelement_shuffle_invalid_index(i32 %v) { ; CHECK-LABEL: @extractelement_shuffle_invalid_index( -; CHECK-NEXT: [[IN:%.*]] = insertelement poison, i32 [[V:%.*]], i32 0 +; CHECK-NEXT: [[IN:%.*]] = insertelement poison, i32 [[V:%.*]], i64 0 ; CHECK-NEXT: [[SPLAT:%.*]] = shufflevector [[IN]], poison, zeroinitializer -; CHECK-NEXT: [[R:%.*]] = extractelement [[SPLAT]], i32 -1 +; CHECK-NEXT: [[R:%.*]] = extractelement [[SPLAT]], i64 4294967295 ; CHECK-NEXT: ret i32 [[R]] ; %in = insertelement poison, i32 %v, i32 0 @@ -98,14 +98,14 @@ define @extractelement_insertelement_diff_positions( %vec) { ; CHECK-LABEL: @extractelement_insertelement_diff_positions( -; CHECK-NEXT: [[VEC_E0:%.*]] = extractelement [[VEC:%.*]], i32 4 -; CHECK-NEXT: [[VEC_E1:%.*]] = extractelement [[VEC]], i32 5 -; CHECK-NEXT: [[VEC_E2:%.*]] = extractelement [[VEC]], i32 6 -; CHECK-NEXT: [[VEC_E3:%.*]] = extractelement [[VEC]], i32 7 -; CHECK-NEXT: [[TMP1:%.*]] = insertelement [[VEC]], i32 [[VEC_E0]], i32 0 -; CHECK-NEXT: [[TMP2:%.*]] = insertelement [[TMP1]], i32 [[VEC_E1]], i32 1 -; CHECK-NEXT: [[TMP3:%.*]] = insertelement [[TMP2]], i32 [[VEC_E2]], i32 2 -; CHECK-NEXT: [[TMP4:%.*]] = insertelement [[TMP3]], i32 [[VEC_E3]], i32 3 +; CHECK-NEXT: [[VEC_E0:%.*]] = extractelement [[VEC:%.*]], i64 4 +; CHECK-NEXT: [[VEC_E1:%.*]] = extractelement [[VEC]], i64 5 +; CHECK-NEXT: [[VEC_E2:%.*]] = extractelement [[VEC]], i64 6 +; CHECK-NEXT: [[VEC_E3:%.*]] = extractelement [[VEC]], i64 7 +; CHECK-NEXT: [[TMP1:%.*]] = insertelement [[VEC]], i32 [[VEC_E0]], i64 0 +; CHECK-NEXT: [[TMP2:%.*]] = insertelement [[TMP1]], i32 [[VEC_E1]], i64 1 +; CHECK-NEXT: [[TMP3:%.*]] = insertelement [[TMP2]], i32 [[VEC_E2]], i64 2 +; CHECK-NEXT: [[TMP4:%.*]] = insertelement [[TMP3]], i32 [[VEC_E3]], i64 3 ; CHECK-NEXT: ret [[TMP4]] ; %vec.e0 = extractelement %vec, i32 4 @@ -122,7 +122,7 @@ define i32 @bitcast_of_extractelement( %d) { ; CHECK-LABEL: @bitcast_of_extractelement( ; CHECK-NEXT: [[BC:%.*]] = bitcast [[D:%.*]] to -; CHECK-NEXT: [[CAST:%.*]] = extractelement [[BC]], i32 0 +; CHECK-NEXT: [[CAST:%.*]] = extractelement [[BC]], i64 0 ; CHECK-NEXT: ret i32 [[CAST]] ; %ext = extractelement %d, i32 0 @@ -132,7 +132,7 @@ define i1 @extractelement_is_zero( %d, i1 %b, i32 %z) { ; CHECK-LABEL: @extractelement_is_zero( -; CHECK-NEXT: [[EXT:%.*]] = extractelement [[D:%.*]], i32 0 +; CHECK-NEXT: [[EXT:%.*]] = extractelement [[D:%.*]], i64 0 ; CHECK-NEXT: [[BB:%.*]] = icmp eq i32 [[EXT]], 0 ; CHECK-NEXT: ret i1 [[BB]] ; @@ -145,9 +145,9 @@ ; https://bugs.chromium.org/p/oss-fuzz/issues/detail?id=25272 define i32 @ossfuzz_25272(float %f) { ; CHECK-LABEL: @ossfuzz_25272( -; CHECK-NEXT: [[VEC_FLOAT:%.*]] = insertelement poison, float [[F:%.*]], i32 0 +; CHECK-NEXT: [[VEC_FLOAT:%.*]] = insertelement poison, float [[F:%.*]], i64 0 ; CHECK-NEXT: [[VEC_INT:%.*]] = bitcast [[VEC_FLOAT]] to -; CHECK-NEXT: [[E:%.*]] = extractelement [[VEC_INT]], i32 2147483647 +; CHECK-NEXT: [[E:%.*]] = extractelement [[VEC_INT]], i64 2147483647 ; CHECK-NEXT: ret i32 [[E]] ; %vec_float = insertelement poison, float %f, i32 0 diff --git a/llvm/test/Transforms/InstCombine/vscale_extractelement.ll b/llvm/test/Transforms/InstCombine/vscale_extractelement.ll --- a/llvm/test/Transforms/InstCombine/vscale_extractelement.ll +++ b/llvm/test/Transforms/InstCombine/vscale_extractelement.ll @@ -44,9 +44,9 @@ ; TODO: Instcombine could remove the insert. define i8 @extractelement_bitcast_wrong_insert( %a, i32 %x) { ; CHECK-LABEL: @extractelement_bitcast_wrong_insert( -; CHECK-NEXT: [[VEC:%.*]] = insertelement [[A:%.*]], i32 [[X:%.*]], i32 1 +; CHECK-NEXT: [[VEC:%.*]] = insertelement [[A:%.*]], i32 [[X:%.*]], i64 1 ; CHECK-NEXT: [[VEC_CAST:%.*]] = bitcast [[VEC]] to -; CHECK-NEXT: [[R:%.*]] = extractelement [[VEC_CAST]], i32 2 +; CHECK-NEXT: [[R:%.*]] = extractelement [[VEC_CAST]], i64 2 ; CHECK-NEXT: ret i8 [[R]] ; %vec = insertelement %a, i32 %x, i32 1 ; <- This insert could be removed. @@ -57,9 +57,9 @@ define i32 @extractelement_shuffle_maybe_out_of_range(i32 %v) { ; CHECK-LABEL: @extractelement_shuffle_maybe_out_of_range( -; CHECK-NEXT: [[IN:%.*]] = insertelement undef, i32 [[V:%.*]], i32 0 +; CHECK-NEXT: [[IN:%.*]] = insertelement undef, i32 [[V:%.*]], i64 0 ; CHECK-NEXT: [[SPLAT:%.*]] = shufflevector [[IN]], undef, zeroinitializer -; CHECK-NEXT: [[R:%.*]] = extractelement [[SPLAT]], i32 4 +; CHECK-NEXT: [[R:%.*]] = extractelement [[SPLAT]], i64 4 ; CHECK-NEXT: ret i32 [[R]] ; %in = insertelement undef, i32 %v, i32 0 @@ -70,9 +70,9 @@ define i32 @extractelement_shuffle_invalid_index(i32 %v) { ; CHECK-LABEL: @extractelement_shuffle_invalid_index( -; CHECK-NEXT: [[IN:%.*]] = insertelement undef, i32 [[V:%.*]], i32 0 +; CHECK-NEXT: [[IN:%.*]] = insertelement undef, i32 [[V:%.*]], i64 0 ; CHECK-NEXT: [[SPLAT:%.*]] = shufflevector [[IN]], undef, zeroinitializer -; CHECK-NEXT: [[R:%.*]] = extractelement [[SPLAT]], i32 -1 +; CHECK-NEXT: [[R:%.*]] = extractelement [[SPLAT]], i64 4294967295 ; CHECK-NEXT: ret i32 [[R]] ; %in = insertelement undef, i32 %v, i32 0 @@ -98,14 +98,14 @@ define @extractelement_insertelement_diff_positions( %vec) { ; CHECK-LABEL: @extractelement_insertelement_diff_positions( -; CHECK-NEXT: [[VEC_E0:%.*]] = extractelement [[VEC:%.*]], i32 4 -; CHECK-NEXT: [[VEC_E1:%.*]] = extractelement [[VEC]], i32 5 -; CHECK-NEXT: [[VEC_E2:%.*]] = extractelement [[VEC]], i32 6 -; CHECK-NEXT: [[VEC_E3:%.*]] = extractelement [[VEC]], i32 7 -; CHECK-NEXT: [[TMP1:%.*]] = insertelement [[VEC]], i32 [[VEC_E0]], i32 0 -; CHECK-NEXT: [[TMP2:%.*]] = insertelement [[TMP1]], i32 [[VEC_E1]], i32 1 -; CHECK-NEXT: [[TMP3:%.*]] = insertelement [[TMP2]], i32 [[VEC_E2]], i32 2 -; CHECK-NEXT: [[TMP4:%.*]] = insertelement [[TMP3]], i32 [[VEC_E3]], i32 3 +; CHECK-NEXT: [[VEC_E0:%.*]] = extractelement [[VEC:%.*]], i64 4 +; CHECK-NEXT: [[VEC_E1:%.*]] = extractelement [[VEC]], i64 5 +; CHECK-NEXT: [[VEC_E2:%.*]] = extractelement [[VEC]], i64 6 +; CHECK-NEXT: [[VEC_E3:%.*]] = extractelement [[VEC]], i64 7 +; CHECK-NEXT: [[TMP1:%.*]] = insertelement [[VEC]], i32 [[VEC_E0]], i64 0 +; CHECK-NEXT: [[TMP2:%.*]] = insertelement [[TMP1]], i32 [[VEC_E1]], i64 1 +; CHECK-NEXT: [[TMP3:%.*]] = insertelement [[TMP2]], i32 [[VEC_E2]], i64 2 +; CHECK-NEXT: [[TMP4:%.*]] = insertelement [[TMP3]], i32 [[VEC_E3]], i64 3 ; CHECK-NEXT: ret [[TMP4]] ; %vec.e0 = extractelement %vec, i32 4 @@ -122,7 +122,7 @@ define i32 @bitcast_of_extractelement( %d) { ; CHECK-LABEL: @bitcast_of_extractelement( ; CHECK-NEXT: [[BC:%.*]] = bitcast [[D:%.*]] to -; CHECK-NEXT: [[CAST:%.*]] = extractelement [[BC]], i32 0 +; CHECK-NEXT: [[CAST:%.*]] = extractelement [[BC]], i64 0 ; CHECK-NEXT: ret i32 [[CAST]] ; %ext = extractelement %d, i32 0 @@ -132,7 +132,7 @@ define i1 @extractelement_is_zero( %d, i1 %b, i32 %z) { ; CHECK-LABEL: @extractelement_is_zero( -; CHECK-NEXT: [[EXT:%.*]] = extractelement [[D:%.*]], i32 0 +; CHECK-NEXT: [[EXT:%.*]] = extractelement [[D:%.*]], i64 0 ; CHECK-NEXT: [[BB:%.*]] = icmp eq i32 [[EXT]], 0 ; CHECK-NEXT: ret i1 [[BB]] ; @@ -145,9 +145,9 @@ ; https://bugs.chromium.org/p/oss-fuzz/issues/detail?id=25272 define i32 @ossfuzz_25272(float %f) { ; CHECK-LABEL: @ossfuzz_25272( -; CHECK-NEXT: [[VEC_FLOAT:%.*]] = insertelement undef, float [[F:%.*]], i32 0 +; CHECK-NEXT: [[VEC_FLOAT:%.*]] = insertelement undef, float [[F:%.*]], i64 0 ; CHECK-NEXT: [[VEC_INT:%.*]] = bitcast [[VEC_FLOAT]] to -; CHECK-NEXT: [[E:%.*]] = extractelement [[VEC_INT]], i32 2147483647 +; CHECK-NEXT: [[E:%.*]] = extractelement [[VEC_INT]], i64 2147483647 ; CHECK-NEXT: ret i32 [[E]] ; %vec_float = insertelement undef, float %f, i32 0 @@ -184,7 +184,7 @@ ; CHECK-LABEL: @ext_lane_out_of_range_from_stepvec( ; CHECK-NEXT: entry: ; CHECK-NEXT: [[TMP0:%.*]] = call @llvm.experimental.stepvector.nxv4i64() -; CHECK-NEXT: [[TMP1:%.*]] = extractelement [[TMP0]], i32 4 +; CHECK-NEXT: [[TMP1:%.*]] = extractelement [[TMP0]], i64 4 ; CHECK-NEXT: ret i64 [[TMP1]] ; entry: @@ -197,7 +197,7 @@ ; CHECK-LABEL: @ext_lane_invalid_from_stepvec( ; CHECK-NEXT: entry: ; CHECK-NEXT: [[TMP0:%.*]] = call @llvm.experimental.stepvector.nxv4i64() -; CHECK-NEXT: [[TMP1:%.*]] = extractelement [[TMP0]], i32 -1 +; CHECK-NEXT: [[TMP1:%.*]] = extractelement [[TMP0]], i64 4294967295 ; CHECK-NEXT: ret i64 [[TMP1]] ; entry: diff --git a/llvm/test/Transforms/InstCombine/vscale_insertelement-inseltpoison.ll b/llvm/test/Transforms/InstCombine/vscale_insertelement-inseltpoison.ll --- a/llvm/test/Transforms/InstCombine/vscale_insertelement-inseltpoison.ll +++ b/llvm/test/Transforms/InstCombine/vscale_insertelement-inseltpoison.ll @@ -7,7 +7,7 @@ ; --> bitcast (inselt VecSrc, ScalarSrc, IdxOp) define @insertelement_bitcast( %vec, i32 %x) { ; CHECK-LABEL: @insertelement_bitcast( -; CHECK-NEXT: [[TMP1:%.*]] = insertelement [[VEC:%.*]], i32 [[X:%.*]], i32 0 +; CHECK-NEXT: [[TMP1:%.*]] = insertelement [[VEC:%.*]], i32 [[X:%.*]], i64 0 ; CHECK-NEXT: [[R:%.*]] = bitcast [[TMP1]] to ; CHECK-NEXT: ret [[R]] ; @@ -25,8 +25,8 @@ ; "Assertion `isValidOperands(V1, V2, Mask) && "Invalid shuffle vector instruction operands!"' failed." define @insertelement_extractelement( %a, %b) { ; CHECK-LABEL: @insertelement_extractelement( -; CHECK-NEXT: [[T0:%.*]] = extractelement [[A:%.*]], i32 1 -; CHECK-NEXT: [[T1:%.*]] = insertelement [[B:%.*]], i32 [[T0]], i32 0 +; CHECK-NEXT: [[T0:%.*]] = extractelement [[A:%.*]], i64 1 +; CHECK-NEXT: [[T1:%.*]] = insertelement [[B:%.*]], i32 [[T0]], i64 0 ; CHECK-NEXT: ret [[T1]] ; %t0 = extractelement %a, i32 1 @@ -38,8 +38,8 @@ ; when extract is from a scalable type, and the insert vector is fixed-length. define <4 x i32> @insertelement_extractelement_fixed_vec_extract_from_scalable( %a, <4 x i32> %b) { ; CHECK-LABEL: @insertelement_extractelement_fixed_vec_extract_from_scalable( -; CHECK-NEXT: [[T0:%.*]] = extractelement [[A:%.*]], i32 1 -; CHECK-NEXT: [[T1:%.*]] = insertelement <4 x i32> [[B:%.*]], i32 [[T0]], i32 0 +; CHECK-NEXT: [[T0:%.*]] = extractelement [[A:%.*]], i64 1 +; CHECK-NEXT: [[T1:%.*]] = insertelement <4 x i32> [[B:%.*]], i32 [[T0]], i64 0 ; CHECK-NEXT: ret <4 x i32> [[T1]] ; %t0 = extractelement %a, i32 1 @@ -57,8 +57,8 @@ ; "Assertion `isValidOperands(V1, V2, Mask) && "Invalid shuffle vector instruction operands!"' failed." define @insertelement_insertelement( %vec) { ; CHECK-LABEL: @insertelement_insertelement( -; CHECK-NEXT: [[T0:%.*]] = insertelement [[VEC:%.*]], i32 1, i32 1 -; CHECK-NEXT: [[T1:%.*]] = insertelement [[T0]], i32 2, i32 2 +; CHECK-NEXT: [[T0:%.*]] = insertelement [[VEC:%.*]], i32 1, i64 1 +; CHECK-NEXT: [[T1:%.*]] = insertelement [[T0]], i32 2, i64 2 ; CHECK-NEXT: ret [[T1]] ; %t0 = insertelement %vec, i32 1, i32 1 @@ -71,10 +71,10 @@ ; may not form a valid splat. define @insertelement_sequene_may_not_be_splat(float %x) { ; CHECK-LABEL: @insertelement_sequene_may_not_be_splat( -; CHECK-NEXT: [[T0:%.*]] = insertelement poison, float [[X:%.*]], i32 0 -; CHECK-NEXT: [[T1:%.*]] = insertelement [[T0]], float [[X]], i32 1 -; CHECK-NEXT: [[T2:%.*]] = insertelement [[T1]], float [[X]], i32 2 -; CHECK-NEXT: [[T3:%.*]] = insertelement [[T2]], float [[X]], i32 3 +; CHECK-NEXT: [[T0:%.*]] = insertelement poison, float [[X:%.*]], i64 0 +; CHECK-NEXT: [[T1:%.*]] = insertelement [[T0]], float [[X]], i64 1 +; CHECK-NEXT: [[T2:%.*]] = insertelement [[T1]], float [[X]], i64 2 +; CHECK-NEXT: [[T3:%.*]] = insertelement [[T2]], float [[X]], i64 3 ; CHECK-NEXT: ret [[T3]] ; %t0 = insertelement poison, float %x, i32 0 @@ -88,9 +88,9 @@ ; https://bugs.chromium.org/p/oss-fuzz/issues/detail?id=27416 define void @ossfuzz_27416(i32 %v) { ; CHECK-LABEL: @ossfuzz_27416( -; CHECK-NEXT: [[IN:%.*]] = insertelement poison, i32 [[V:%.*]], i32 0 +; CHECK-NEXT: [[IN:%.*]] = insertelement poison, i32 [[V:%.*]], i64 0 ; CHECK-NEXT: [[SPLAT:%.*]] = shufflevector [[IN]], poison, zeroinitializer -; CHECK-NEXT: [[I1:%.*]] = insertelement [[SPLAT]], i32 undef, i8 -128 +; CHECK-NEXT: [[I1:%.*]] = insertelement [[SPLAT]], i32 undef, i64 128 ; CHECK-NEXT: store [[I1]], * undef, align 16 ; CHECK-NEXT: ret void ; diff --git a/llvm/test/Transforms/InstCombine/vscale_insertelement.ll b/llvm/test/Transforms/InstCombine/vscale_insertelement.ll --- a/llvm/test/Transforms/InstCombine/vscale_insertelement.ll +++ b/llvm/test/Transforms/InstCombine/vscale_insertelement.ll @@ -7,7 +7,7 @@ ; --> bitcast (inselt VecSrc, ScalarSrc, IdxOp) define @insertelement_bitcast( %vec, i32 %x) { ; CHECK-LABEL: @insertelement_bitcast( -; CHECK-NEXT: [[TMP1:%.*]] = insertelement [[VEC:%.*]], i32 [[X:%.*]], i32 0 +; CHECK-NEXT: [[TMP1:%.*]] = insertelement [[VEC:%.*]], i32 [[X:%.*]], i64 0 ; CHECK-NEXT: [[R:%.*]] = bitcast [[TMP1]] to ; CHECK-NEXT: ret [[R]] ; @@ -25,8 +25,8 @@ ; "Assertion `isValidOperands(V1, V2, Mask) && "Invalid shuffle vector instruction operands!"' failed." define @insertelement_extractelement( %a, %b) { ; CHECK-LABEL: @insertelement_extractelement( -; CHECK-NEXT: [[T0:%.*]] = extractelement [[A:%.*]], i32 1 -; CHECK-NEXT: [[T1:%.*]] = insertelement [[B:%.*]], i32 [[T0]], i32 0 +; CHECK-NEXT: [[T0:%.*]] = extractelement [[A:%.*]], i64 1 +; CHECK-NEXT: [[T1:%.*]] = insertelement [[B:%.*]], i32 [[T0]], i64 0 ; CHECK-NEXT: ret [[T1]] ; %t0 = extractelement %a, i32 1 @@ -38,8 +38,8 @@ ; when extract is from a scalable type, and the insert vector is fixed-length. define <4 x i32> @insertelement_extractelement_fixed_vec_extract_from_scalable( %a, <4 x i32> %b) { ; CHECK-LABEL: @insertelement_extractelement_fixed_vec_extract_from_scalable( -; CHECK-NEXT: [[T0:%.*]] = extractelement [[A:%.*]], i32 1 -; CHECK-NEXT: [[T1:%.*]] = insertelement <4 x i32> [[B:%.*]], i32 [[T0]], i32 0 +; CHECK-NEXT: [[T0:%.*]] = extractelement [[A:%.*]], i64 1 +; CHECK-NEXT: [[T1:%.*]] = insertelement <4 x i32> [[B:%.*]], i32 [[T0]], i64 0 ; CHECK-NEXT: ret <4 x i32> [[T1]] ; %t0 = extractelement %a, i32 1 @@ -57,8 +57,8 @@ ; "Assertion `isValidOperands(V1, V2, Mask) && "Invalid shuffle vector instruction operands!"' failed." define @insertelement_insertelement( %vec) { ; CHECK-LABEL: @insertelement_insertelement( -; CHECK-NEXT: [[T0:%.*]] = insertelement [[VEC:%.*]], i32 1, i32 1 -; CHECK-NEXT: [[T1:%.*]] = insertelement [[T0]], i32 2, i32 2 +; CHECK-NEXT: [[T0:%.*]] = insertelement [[VEC:%.*]], i32 1, i64 1 +; CHECK-NEXT: [[T1:%.*]] = insertelement [[T0]], i32 2, i64 2 ; CHECK-NEXT: ret [[T1]] ; %t0 = insertelement %vec, i32 1, i32 1 @@ -71,10 +71,10 @@ ; may not form a valid splat. define @insertelement_sequene_may_not_be_splat(float %x) { ; CHECK-LABEL: @insertelement_sequene_may_not_be_splat( -; CHECK-NEXT: [[T0:%.*]] = insertelement undef, float [[X:%.*]], i32 0 -; CHECK-NEXT: [[T1:%.*]] = insertelement [[T0]], float [[X]], i32 1 -; CHECK-NEXT: [[T2:%.*]] = insertelement [[T1]], float [[X]], i32 2 -; CHECK-NEXT: [[T3:%.*]] = insertelement [[T2]], float [[X]], i32 3 +; CHECK-NEXT: [[T0:%.*]] = insertelement undef, float [[X:%.*]], i64 0 +; CHECK-NEXT: [[T1:%.*]] = insertelement [[T0]], float [[X]], i64 1 +; CHECK-NEXT: [[T2:%.*]] = insertelement [[T1]], float [[X]], i64 2 +; CHECK-NEXT: [[T3:%.*]] = insertelement [[T2]], float [[X]], i64 3 ; CHECK-NEXT: ret [[T3]] ; %t0 = insertelement undef, float %x, i32 0 @@ -88,9 +88,9 @@ ; https://bugs.chromium.org/p/oss-fuzz/issues/detail?id=27416 define void @ossfuzz_27416(i32 %v) { ; CHECK-LABEL: @ossfuzz_27416( -; CHECK-NEXT: [[IN:%.*]] = insertelement undef, i32 [[V:%.*]], i32 0 +; CHECK-NEXT: [[IN:%.*]] = insertelement undef, i32 [[V:%.*]], i64 0 ; CHECK-NEXT: [[SPLAT:%.*]] = shufflevector [[IN]], undef, zeroinitializer -; CHECK-NEXT: [[I1:%.*]] = insertelement [[SPLAT]], i32 undef, i8 -128 +; CHECK-NEXT: [[I1:%.*]] = insertelement [[SPLAT]], i32 undef, i64 128 ; CHECK-NEXT: store [[I1]], * undef, align 16 ; CHECK-NEXT: ret void ; diff --git a/llvm/test/Transforms/LoopVectorize/AArch64/aarch64-predication.ll b/llvm/test/Transforms/LoopVectorize/AArch64/aarch64-predication.ll --- a/llvm/test/Transforms/LoopVectorize/AArch64/aarch64-predication.ll +++ b/llvm/test/Transforms/LoopVectorize/AArch64/aarch64-predication.ll @@ -27,25 +27,25 @@ ; CHECK-NEXT: [[TMP1:%.*]] = bitcast i64* [[TMP0]] to <2 x i64>* ; CHECK-NEXT: [[WIDE_LOAD:%.*]] = load <2 x i64>, <2 x i64>* [[TMP1]], align 4 ; CHECK-NEXT: [[TMP2:%.*]] = icmp sgt <2 x i64> [[WIDE_LOAD]], zeroinitializer -; CHECK-NEXT: [[TMP3:%.*]] = extractelement <2 x i1> [[TMP2]], i32 0 +; CHECK-NEXT: [[TMP3:%.*]] = extractelement <2 x i1> [[TMP2]], i64 0 ; CHECK-NEXT: br i1 [[TMP3]], label [[PRED_UDIV_IF:%.*]], label [[PRED_UDIV_CONTINUE:%.*]] ; CHECK: pred.udiv.if: -; CHECK-NEXT: [[TMP4:%.*]] = extractelement <2 x i64> [[WIDE_LOAD]], i32 0 +; CHECK-NEXT: [[TMP4:%.*]] = extractelement <2 x i64> [[WIDE_LOAD]], i64 0 ; CHECK-NEXT: [[TMP5:%.*]] = add nsw i64 [[TMP4]], [[X:%.*]] -; CHECK-NEXT: [[TMP6:%.*]] = extractelement <2 x i64> [[WIDE_LOAD]], i32 0 +; CHECK-NEXT: [[TMP6:%.*]] = extractelement <2 x i64> [[WIDE_LOAD]], i64 0 ; CHECK-NEXT: [[TMP7:%.*]] = udiv i64 [[TMP6]], [[TMP5]] -; CHECK-NEXT: [[TMP8:%.*]] = insertelement <2 x i64> poison, i64 [[TMP7]], i32 0 +; CHECK-NEXT: [[TMP8:%.*]] = insertelement <2 x i64> poison, i64 [[TMP7]], i64 0 ; CHECK-NEXT: br label [[PRED_UDIV_CONTINUE]] ; CHECK: pred.udiv.continue: ; CHECK-NEXT: [[TMP9:%.*]] = phi <2 x i64> [ poison, [[VECTOR_BODY]] ], [ [[TMP8]], [[PRED_UDIV_IF]] ] -; CHECK-NEXT: [[TMP10:%.*]] = extractelement <2 x i1> [[TMP2]], i32 1 +; CHECK-NEXT: [[TMP10:%.*]] = extractelement <2 x i1> [[TMP2]], i64 1 ; CHECK-NEXT: br i1 [[TMP10]], label [[PRED_UDIV_IF1:%.*]], label [[PRED_UDIV_CONTINUE2]] ; CHECK: pred.udiv.if1: -; CHECK-NEXT: [[TMP11:%.*]] = extractelement <2 x i64> [[WIDE_LOAD]], i32 1 +; CHECK-NEXT: [[TMP11:%.*]] = extractelement <2 x i64> [[WIDE_LOAD]], i64 1 ; CHECK-NEXT: [[TMP12:%.*]] = add nsw i64 [[TMP11]], [[X]] -; CHECK-NEXT: [[TMP13:%.*]] = extractelement <2 x i64> [[WIDE_LOAD]], i32 1 +; CHECK-NEXT: [[TMP13:%.*]] = extractelement <2 x i64> [[WIDE_LOAD]], i64 1 ; CHECK-NEXT: [[TMP14:%.*]] = udiv i64 [[TMP13]], [[TMP12]] -; CHECK-NEXT: [[TMP15:%.*]] = insertelement <2 x i64> [[TMP9]], i64 [[TMP14]], i32 1 +; CHECK-NEXT: [[TMP15:%.*]] = insertelement <2 x i64> [[TMP9]], i64 [[TMP14]], i64 1 ; CHECK-NEXT: br label [[PRED_UDIV_CONTINUE2]] ; CHECK: pred.udiv.continue2: ; CHECK-NEXT: [[TMP16:%.*]] = phi <2 x i64> [ [[TMP9]], [[PRED_UDIV_CONTINUE]] ], [ [[TMP15]], [[PRED_UDIV_IF1]] ] diff --git a/llvm/test/Transforms/LoopVectorize/AArch64/intrinsiccost.ll b/llvm/test/Transforms/LoopVectorize/AArch64/intrinsiccost.ll --- a/llvm/test/Transforms/LoopVectorize/AArch64/intrinsiccost.ll +++ b/llvm/test/Transforms/LoopVectorize/AArch64/intrinsiccost.ll @@ -29,9 +29,9 @@ ; CHECK-NEXT: [[IND_END:%.*]] = sub i32 [[BLOCKSIZE]], [[CAST_CRD]] ; CHECK-NEXT: [[IND_END2:%.*]] = getelementptr i16, i16* [[PSRC:%.*]], i64 [[N_VEC]] ; CHECK-NEXT: [[IND_END4:%.*]] = getelementptr i16, i16* [[PDST:%.*]], i64 [[N_VEC]] -; CHECK-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <8 x i16> poison, i16 [[OFFSET:%.*]], i32 0 +; CHECK-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <8 x i16> poison, i16 [[OFFSET:%.*]], i64 0 ; CHECK-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector <8 x i16> [[BROADCAST_SPLATINSERT]], <8 x i16> poison, <8 x i32> zeroinitializer -; CHECK-NEXT: [[BROADCAST_SPLATINSERT9:%.*]] = insertelement <8 x i16> poison, i16 [[OFFSET]], i32 0 +; CHECK-NEXT: [[BROADCAST_SPLATINSERT9:%.*]] = insertelement <8 x i16> poison, i16 [[OFFSET]], i64 0 ; CHECK-NEXT: [[BROADCAST_SPLAT10:%.*]] = shufflevector <8 x i16> [[BROADCAST_SPLATINSERT9]], <8 x i16> poison, <8 x i32> zeroinitializer ; CHECK-NEXT: br label [[VECTOR_BODY:%.*]] ; CHECK: vector.body: @@ -52,7 +52,7 @@ ; CHECK-NEXT: store <8 x i16> [[TMP7]], <8 x i16>* [[TMP10]], align 2 ; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 16 ; CHECK-NEXT: [[TMP11:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]] -; CHECK-NEXT: br i1 [[TMP11]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], [[LOOP0:!llvm.loop !.*]] +; CHECK-NEXT: br i1 [[TMP11]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP0:![0-9]+]] ; CHECK: middle.block: ; CHECK-NEXT: [[CMP_N:%.*]] = icmp eq i64 [[TMP2]], [[N_VEC]] ; CHECK-NEXT: br i1 [[CMP_N]], label [[WHILE_END]], label [[SCALAR_PH]] @@ -72,7 +72,7 @@ ; CHECK-NEXT: store i16 [[TMP13]], i16* [[PDST_ADDR_07]], align 2 ; CHECK-NEXT: [[DEC]] = add i32 [[BLKCNT_09]], -1 ; CHECK-NEXT: [[CMP_NOT:%.*]] = icmp eq i32 [[DEC]], 0 -; CHECK-NEXT: br i1 [[CMP_NOT]], label [[WHILE_END]], label [[WHILE_BODY]], [[LOOP2:!llvm.loop !.*]] +; CHECK-NEXT: br i1 [[CMP_NOT]], label [[WHILE_END]], label [[WHILE_BODY]], !llvm.loop [[LOOP2:![0-9]+]] ; CHECK: while.end: ; CHECK-NEXT: ret void ; @@ -120,9 +120,9 @@ ; CHECK-NEXT: br i1 [[MIN_ITERS_CHECK1]], label [[VEC_EPILOG_PH:%.*]], label [[VECTOR_PH:%.*]] ; CHECK: vector.ph: ; CHECK-NEXT: [[N_VEC:%.*]] = and i64 [[TMP2]], 8589934560 -; CHECK-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <16 x i8> poison, i8 [[OFFSET:%.*]], i32 0 +; CHECK-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <16 x i8> poison, i8 [[OFFSET:%.*]], i64 0 ; CHECK-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector <16 x i8> [[BROADCAST_SPLATINSERT]], <16 x i8> poison, <16 x i32> zeroinitializer -; CHECK-NEXT: [[BROADCAST_SPLATINSERT6:%.*]] = insertelement <16 x i8> poison, i8 [[OFFSET]], i32 0 +; CHECK-NEXT: [[BROADCAST_SPLATINSERT6:%.*]] = insertelement <16 x i8> poison, i8 [[OFFSET]], i64 0 ; CHECK-NEXT: [[BROADCAST_SPLAT7:%.*]] = shufflevector <16 x i8> [[BROADCAST_SPLATINSERT6]], <16 x i8> poison, <16 x i32> zeroinitializer ; CHECK-NEXT: br label [[VECTOR_BODY:%.*]] ; CHECK: vector.body: @@ -143,7 +143,7 @@ ; CHECK-NEXT: store <16 x i8> [[TMP7]], <16 x i8>* [[TMP10]], align 2 ; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 32 ; CHECK-NEXT: [[TMP11:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]] -; CHECK-NEXT: br i1 [[TMP11]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], [[LOOP4:!llvm.loop !.*]] +; CHECK-NEXT: br i1 [[TMP11]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP4:![0-9]+]] ; CHECK: middle.block: ; CHECK-NEXT: [[CMP_N:%.*]] = icmp eq i64 [[TMP2]], [[N_VEC]] ; CHECK-NEXT: br i1 [[CMP_N]], label [[WHILE_END]], label [[VEC_EPILOG_ITER_CHECK:%.*]] @@ -165,7 +165,7 @@ ; CHECK-NEXT: [[IND_END:%.*]] = sub i32 [[BLOCKSIZE]], [[CAST_CRD]] ; CHECK-NEXT: [[IND_END15:%.*]] = getelementptr i8, i8* [[PSRC]], i64 [[N_VEC9]] ; CHECK-NEXT: [[IND_END18:%.*]] = getelementptr i8, i8* [[PDST]], i64 [[N_VEC9]] -; CHECK-NEXT: [[BROADCAST_SPLATINSERT25:%.*]] = insertelement <8 x i8> poison, i8 [[OFFSET]], i32 0 +; CHECK-NEXT: [[BROADCAST_SPLATINSERT25:%.*]] = insertelement <8 x i8> poison, i8 [[OFFSET]], i64 0 ; CHECK-NEXT: [[BROADCAST_SPLAT26:%.*]] = shufflevector <8 x i8> [[BROADCAST_SPLATINSERT25]], <8 x i8> poison, <8 x i32> zeroinitializer ; CHECK-NEXT: br label [[VEC_EPILOG_VECTOR_BODY:%.*]] ; CHECK: vec.epilog.vector.body: @@ -179,7 +179,7 @@ ; CHECK-NEXT: store <8 x i8> [[TMP16]], <8 x i8>* [[TMP17]], align 2 ; CHECK-NEXT: [[INDEX_NEXT11]] = add nuw i64 [[INDEX10]], 8 ; CHECK-NEXT: [[TMP18:%.*]] = icmp eq i64 [[INDEX_NEXT11]], [[N_VEC9]] -; CHECK-NEXT: br i1 [[TMP18]], label [[VEC_EPILOG_MIDDLE_BLOCK:%.*]], label [[VEC_EPILOG_VECTOR_BODY]], [[LOOP5:!llvm.loop !.*]] +; CHECK-NEXT: br i1 [[TMP18]], label [[VEC_EPILOG_MIDDLE_BLOCK:%.*]], label [[VEC_EPILOG_VECTOR_BODY]], !llvm.loop [[LOOP5:![0-9]+]] ; CHECK: vec.epilog.middle.block: ; CHECK-NEXT: [[CMP_N20:%.*]] = icmp eq i64 [[TMP14]], [[N_VEC9]] ; CHECK-NEXT: br i1 [[CMP_N20]], label [[WHILE_END]], label [[VEC_EPILOG_SCALAR_PH]] @@ -199,7 +199,7 @@ ; CHECK-NEXT: store i8 [[TMP20]], i8* [[PDST_ADDR_07]], align 2 ; CHECK-NEXT: [[DEC]] = add i32 [[BLKCNT_09]], -1 ; CHECK-NEXT: [[CMP_NOT:%.*]] = icmp eq i32 [[DEC]], 0 -; CHECK-NEXT: br i1 [[CMP_NOT]], label [[WHILE_END]], label [[WHILE_BODY]], [[LOOP6:!llvm.loop !.*]] +; CHECK-NEXT: br i1 [[CMP_NOT]], label [[WHILE_END]], label [[WHILE_BODY]], !llvm.loop [[LOOP6:![0-9]+]] ; CHECK: while.end: ; CHECK-NEXT: ret void ; diff --git a/llvm/test/Transforms/LoopVectorize/AArch64/sve-cond-inv-loads.ll b/llvm/test/Transforms/LoopVectorize/AArch64/sve-cond-inv-loads.ll --- a/llvm/test/Transforms/LoopVectorize/AArch64/sve-cond-inv-loads.ll +++ b/llvm/test/Transforms/LoopVectorize/AArch64/sve-cond-inv-loads.ll @@ -13,7 +13,7 @@ ; CHECK-NEXT: [[TMP3:%.*]] = shl nuw nsw i64 [[TMP2]], 2 ; CHECK-NEXT: [[N_MOD_VF:%.*]] = urem i64 [[N]], [[TMP3]] ; CHECK-NEXT: [[N_VEC:%.*]] = sub i64 [[N]], [[N_MOD_VF]] -; CHECK-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement poison, i16* [[INV:%.*]], i32 0 +; CHECK-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement poison, i16* [[INV:%.*]], i64 0 ; CHECK-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector [[BROADCAST_SPLATINSERT]], poison, zeroinitializer ; CHECK-NEXT: br label [[VECTOR_BODY:%.*]] ; CHECK: vector.body: @@ -95,7 +95,7 @@ ; CHECK-NEXT: [[TMP3:%.*]] = shl nuw nsw i64 [[TMP2]], 2 ; CHECK-NEXT: [[N_MOD_VF:%.*]] = urem i64 [[N]], [[TMP3]] ; CHECK-NEXT: [[N_VEC:%.*]] = sub i64 [[N]], [[N_MOD_VF]] -; CHECK-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement poison, double* [[INV:%.*]], i32 0 +; CHECK-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement poison, double* [[INV:%.*]], i64 0 ; CHECK-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector [[BROADCAST_SPLATINSERT]], poison, zeroinitializer ; CHECK-NEXT: br label [[VECTOR_BODY:%.*]] ; CHECK: vector.body: @@ -178,7 +178,7 @@ ; CHECK: vector.body: ; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ] ; CHECK-NEXT: [[TMP4:%.*]] = getelementptr inbounds i32, i32* [[B:%.*]], i64 42 -; CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32* [[TMP4]], i32 0 +; CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32* [[TMP4]], i64 0 ; CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer ; CHECK-NEXT: [[TMP5:%.*]] = getelementptr inbounds i32, i32* [[COND:%.*]], i64 [[INDEX]] ; CHECK-NEXT: [[TMP6:%.*]] = bitcast i32* [[TMP5]] to * diff --git a/llvm/test/Transforms/LoopVectorize/AArch64/sve-gather-scatter.ll b/llvm/test/Transforms/LoopVectorize/AArch64/sve-gather-scatter.ll --- a/llvm/test/Transforms/LoopVectorize/AArch64/sve-gather-scatter.ll +++ b/llvm/test/Transforms/LoopVectorize/AArch64/sve-gather-scatter.ll @@ -153,7 +153,7 @@ ; CHECK-NEXT: [[TMP3:%.*]] = shl nuw nsw i64 [[TMP2]], 2 ; CHECK-NEXT: [[N_MOD_VF:%.*]] = urem i64 [[N]], [[TMP3]] ; CHECK-NEXT: [[N_VEC:%.*]] = sub i64 [[N]], [[N_MOD_VF]] -; CHECK-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement poison, i32* [[INV:%.*]], i32 0 +; CHECK-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement poison, i32* [[INV:%.*]], i64 0 ; CHECK-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector [[BROADCAST_SPLATINSERT]], poison, zeroinitializer ; CHECK-NEXT: br label [[VECTOR_BODY:%.*]] ; CHECK: vector.body: @@ -225,7 +225,7 @@ ; CHECK-NEXT: [[TMP3:%.*]] = shl nuw nsw i64 [[TMP2]], 2 ; CHECK-NEXT: [[N_MOD_VF:%.*]] = urem i64 [[N]], [[TMP3]] ; CHECK-NEXT: [[N_VEC:%.*]] = sub i64 [[N]], [[N_MOD_VF]] -; CHECK-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement poison, i32* [[INV:%.*]], i32 0 +; CHECK-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement poison, i32* [[INV:%.*]], i64 0 ; CHECK-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector [[BROADCAST_SPLATINSERT]], poison, zeroinitializer ; CHECK-NEXT: br label [[VECTOR_BODY:%.*]] ; CHECK: vector.body: @@ -307,12 +307,12 @@ ; CHECK: vector.body: ; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ] ; CHECK-NEXT: [[TMP4:%.*]] = call @llvm.experimental.stepvector.nxv4i64() -; CHECK-NEXT: [[DOTSPLATINSERT2:%.*]] = insertelement poison, i64 [[INDEX]], i32 0 +; CHECK-NEXT: [[DOTSPLATINSERT2:%.*]] = insertelement poison, i64 [[INDEX]], i64 0 ; CHECK-NEXT: [[DOTSPLAT3:%.*]] = shufflevector [[DOTSPLATINSERT2]], poison, zeroinitializer ; CHECK-NEXT: [[TMP5:%.*]] = add [[DOTSPLAT3]], [[TMP4]] ; CHECK-NEXT: [[TMP6:%.*]] = call i64 @llvm.vscale.i64() ; CHECK-NEXT: [[TMP7:%.*]] = shl nuw nsw i64 [[TMP6]], 2 -; CHECK-NEXT: [[DOTSPLATINSERT4:%.*]] = insertelement poison, i64 [[TMP7]], i32 0 +; CHECK-NEXT: [[DOTSPLATINSERT4:%.*]] = insertelement poison, i64 [[TMP7]], i64 0 ; CHECK-NEXT: [[DOTSPLAT5:%.*]] = shufflevector [[DOTSPLATINSERT4]], poison, zeroinitializer ; CHECK-NEXT: [[TMP8:%.*]] = add [[DOTSPLAT5]], [[TMP4]] ; CHECK-NEXT: [[TMP9:%.*]] = add [[DOTSPLAT3]], [[TMP8]] diff --git a/llvm/test/Transforms/LoopVectorize/AArch64/sve-inductions.ll b/llvm/test/Transforms/LoopVectorize/AArch64/sve-inductions.ll --- a/llvm/test/Transforms/LoopVectorize/AArch64/sve-inductions.ll +++ b/llvm/test/Transforms/LoopVectorize/AArch64/sve-inductions.ll @@ -26,7 +26,7 @@ ; CHECK: vector.body: ; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ] ; CHECK-NEXT: [[TMP4:%.*]] = call @llvm.experimental.stepvector.nxv4i64() -; CHECK-NEXT: [[DOTSPLATINSERT1:%.*]] = insertelement poison, i64 [[INDEX]], i32 0 +; CHECK-NEXT: [[DOTSPLATINSERT1:%.*]] = insertelement poison, i64 [[INDEX]], i64 0 ; CHECK-NEXT: [[DOTSPLAT2:%.*]] = shufflevector [[DOTSPLATINSERT1]], poison, zeroinitializer ; CHECK-NEXT: [[TMP5:%.*]] = add [[DOTSPLAT2]], [[TMP4]] ; CHECK-NEXT: [[TMP6:%.*]] = trunc [[TMP5]] to diff --git a/llvm/test/Transforms/LoopVectorize/AArch64/sve-widen-phi.ll b/llvm/test/Transforms/LoopVectorize/AArch64/sve-widen-phi.ll --- a/llvm/test/Transforms/LoopVectorize/AArch64/sve-widen-phi.ll +++ b/llvm/test/Transforms/LoopVectorize/AArch64/sve-widen-phi.ll @@ -37,7 +37,7 @@ ; CHECK-NEXT: [[TMP8:%.*]] = call @llvm.experimental.stepvector.nxv4i64() ; CHECK-NEXT: [[VECTOR_GEP:%.*]] = shl [[TMP8]], shufflevector ( insertelement ( poison, i64 1, i32 0), poison, zeroinitializer) ; CHECK-NEXT: [[TMP9:%.*]] = getelementptr i32, i32* [[POINTER_PHI]], [[VECTOR_GEP]] -; CHECK-NEXT: [[DOTSPLATINSERT2:%.*]] = insertelement poison, i64 [[TMP6]], i32 0 +; CHECK-NEXT: [[DOTSPLATINSERT2:%.*]] = insertelement poison, i64 [[TMP6]], i64 0 ; CHECK-NEXT: [[DOTSPLAT3:%.*]] = shufflevector [[DOTSPLATINSERT2]], poison, zeroinitializer ; CHECK-NEXT: [[TMP10:%.*]] = call @llvm.experimental.stepvector.nxv4i64() ; CHECK-NEXT: [[TMP11:%.*]] = add [[DOTSPLAT3]], [[TMP10]] @@ -258,7 +258,7 @@ ; CHECK-NEXT: [[TMP7:%.*]] = getelementptr i32, i32* [[POINTER_PHI]], [[TMP6]] ; CHECK-NEXT: [[NEXT_GEP:%.*]] = getelementptr i32*, i32** [[B]], i64 [[INDEX]] ; CHECK-NEXT: [[BC:%.*]] = bitcast [[TMP7]] to *> -; CHECK-NEXT: [[TMP8:%.*]] = extractelement *> [[BC]], i32 0 +; CHECK-NEXT: [[TMP8:%.*]] = extractelement *> [[BC]], i64 0 ; CHECK-NEXT: [[WIDE_LOAD:%.*]] = load , * [[TMP8]], align 8 ; CHECK-NEXT: [[TMP9]] = add [[WIDE_LOAD]], [[VEC_PHI]] ; CHECK-NEXT: [[TMP10:%.*]] = bitcast i32** [[NEXT_GEP]] to * @@ -338,7 +338,7 @@ ; CHECK-NEXT: [[TMP5:%.*]] = getelementptr i16, i16* [[POINTER_PHI]], [[TMP4]] ; CHECK-NEXT: [[TMP6:%.*]] = icmp ne [[TMP5]], zeroinitializer ; CHECK-NEXT: [[BC:%.*]] = bitcast [[TMP5]] to *> -; CHECK-NEXT: [[TMP7:%.*]] = extractelement *> [[BC]], i32 0 +; CHECK-NEXT: [[TMP7:%.*]] = extractelement *> [[BC]], i64 0 ; CHECK-NEXT: call void @llvm.masked.store.nxv2i16.p0nxv2i16( zeroinitializer, * [[TMP7]], i32 2, [[TMP6]]) ; CHECK-NEXT: [[TMP8:%.*]] = call i64 @llvm.vscale.i64() ; CHECK-NEXT: [[TMP9:%.*]] = shl nuw nsw i64 [[TMP8]], 1 diff --git a/llvm/test/Transforms/LoopVectorize/ARM/mve-saddsatcost.ll b/llvm/test/Transforms/LoopVectorize/ARM/mve-saddsatcost.ll --- a/llvm/test/Transforms/LoopVectorize/ARM/mve-saddsatcost.ll +++ b/llvm/test/Transforms/LoopVectorize/ARM/mve-saddsatcost.ll @@ -20,7 +20,7 @@ ; CHECK: vector.ph: ; CHECK-NEXT: [[N_RND_UP:%.*]] = add i32 [[BLOCKSIZE]], 7 ; CHECK-NEXT: [[N_VEC:%.*]] = and i32 [[N_RND_UP]], -8 -; CHECK-NEXT: [[BROADCAST_SPLATINSERT8:%.*]] = insertelement <8 x i16> poison, i16 [[OFFSET:%.*]], i32 0 +; CHECK-NEXT: [[BROADCAST_SPLATINSERT8:%.*]] = insertelement <8 x i16> poison, i16 [[OFFSET:%.*]], i64 0 ; CHECK-NEXT: [[BROADCAST_SPLAT9:%.*]] = shufflevector <8 x i16> [[BROADCAST_SPLATINSERT8]], <8 x i16> poison, <8 x i32> zeroinitializer ; CHECK-NEXT: br label [[VECTOR_BODY:%.*]] ; CHECK: vector.body: @@ -35,7 +35,7 @@ ; CHECK-NEXT: call void @llvm.masked.store.v8i16.p0v8i16(<8 x i16> [[TMP1]], <8 x i16>* [[TMP2]], i32 2, <8 x i1> [[ACTIVE_LANE_MASK]]) ; CHECK-NEXT: [[INDEX_NEXT]] = add i32 [[INDEX]], 8 ; CHECK-NEXT: [[TMP3:%.*]] = icmp eq i32 [[INDEX_NEXT]], [[N_VEC]] -; CHECK-NEXT: br i1 [[TMP3]], label [[WHILE_END]], label [[VECTOR_BODY]], [[LOOP0:!llvm.loop !.*]] +; CHECK-NEXT: br i1 [[TMP3]], label [[WHILE_END]], label [[VECTOR_BODY]], !llvm.loop [[LOOP0:![0-9]+]] ; CHECK: while.end: ; CHECK-NEXT: ret void ; diff --git a/llvm/test/Transforms/LoopVectorize/ARM/pointer_iv.ll b/llvm/test/Transforms/LoopVectorize/ARM/pointer_iv.ll --- a/llvm/test/Transforms/LoopVectorize/ARM/pointer_iv.ll +++ b/llvm/test/Transforms/LoopVectorize/ARM/pointer_iv.ll @@ -7,7 +7,7 @@ define hidden void @pointer_phi_v4i32_add1(i32* noalias nocapture readonly %A, i32* noalias nocapture %B, i32 %s, i32%y) { ; CHECK-LABEL: @pointer_phi_v4i32_add1( ; CHECK-NEXT: entry: -; CHECK-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <4 x i32> poison, i32 [[Y:%.*]], i32 0 +; CHECK-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <4 x i32> poison, i32 [[Y:%.*]], i64 0 ; CHECK-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector <4 x i32> [[BROADCAST_SPLATINSERT]], <4 x i32> poison, <4 x i32> zeroinitializer ; CHECK-NEXT: br label [[VECTOR_BODY:%.*]] ; CHECK: vector.body: @@ -48,7 +48,7 @@ ; CHECK-NEXT: entry: ; CHECK-NEXT: [[IND_END:%.*]] = getelementptr i32, i32* [[A:%.*]], i32 1992 ; CHECK-NEXT: [[IND_END3:%.*]] = getelementptr i32, i32* [[B:%.*]], i32 996 -; CHECK-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <4 x i32> poison, i32 [[Y:%.*]], i32 0 +; CHECK-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <4 x i32> poison, i32 [[Y:%.*]], i64 0 ; CHECK-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector <4 x i32> [[BROADCAST_SPLATINSERT]], <4 x i32> poison, <4 x i32> zeroinitializer ; CHECK-NEXT: br label [[VECTOR_BODY:%.*]] ; CHECK: vector.body: @@ -103,7 +103,7 @@ ; CHECK-NEXT: entry: ; CHECK-NEXT: [[IND_END:%.*]] = getelementptr i32, i32* [[A:%.*]], i32 2988 ; CHECK-NEXT: [[IND_END3:%.*]] = getelementptr i32, i32* [[B:%.*]], i32 996 -; CHECK-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <4 x i32> poison, i32 [[Y:%.*]], i32 0 +; CHECK-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <4 x i32> poison, i32 [[Y:%.*]], i64 0 ; CHECK-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector <4 x i32> [[BROADCAST_SPLATINSERT]], <4 x i32> poison, <4 x i32> zeroinitializer ; CHECK-NEXT: br label [[VECTOR_BODY:%.*]] ; CHECK: vector.body: @@ -156,7 +156,7 @@ ; CHECK-LABEL: @pointer_phi_v8i16_add1( ; CHECK-NEXT: entry: ; CHECK-NEXT: [[TMP0:%.*]] = trunc i32 [[Y:%.*]] to i16 -; CHECK-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <8 x i16> poison, i16 [[TMP0]], i32 0 +; CHECK-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <8 x i16> poison, i16 [[TMP0]], i64 0 ; CHECK-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector <8 x i16> [[BROADCAST_SPLATINSERT]], <8 x i16> poison, <8 x i32> zeroinitializer ; CHECK-NEXT: br label [[VECTOR_BODY:%.*]] ; CHECK: vector.body: @@ -199,7 +199,7 @@ ; CHECK-NEXT: [[TMP0:%.*]] = trunc i32 [[Y:%.*]] to i16 ; CHECK-NEXT: [[IND_END:%.*]] = getelementptr i16, i16* [[A:%.*]], i32 1984 ; CHECK-NEXT: [[IND_END3:%.*]] = getelementptr i16, i16* [[B:%.*]], i32 992 -; CHECK-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <8 x i16> poison, i16 [[TMP0]], i32 0 +; CHECK-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <8 x i16> poison, i16 [[TMP0]], i64 0 ; CHECK-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector <8 x i16> [[BROADCAST_SPLATINSERT]], <8 x i16> poison, <8 x i32> zeroinitializer ; CHECK-NEXT: br label [[VECTOR_BODY:%.*]] ; CHECK: vector.body: @@ -295,7 +295,7 @@ ; CHECK-NEXT: [[TMP0:%.*]] = trunc i32 [[Y:%.*]] to i8 ; CHECK-NEXT: [[IND_END:%.*]] = getelementptr i8, i8* [[A:%.*]], i32 992 ; CHECK-NEXT: [[IND_END3:%.*]] = getelementptr i8, i8* [[B:%.*]], i32 992 -; CHECK-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <16 x i8> poison, i8 [[TMP0]], i32 0 +; CHECK-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <16 x i8> poison, i8 [[TMP0]], i64 0 ; CHECK-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector <16 x i8> [[BROADCAST_SPLATINSERT]], <16 x i8> poison, <16 x i32> zeroinitializer ; CHECK-NEXT: br label [[VECTOR_BODY:%.*]] ; CHECK: vector.body: @@ -351,7 +351,7 @@ ; CHECK-NEXT: [[TMP0:%.*]] = trunc i32 [[Y:%.*]] to i8 ; CHECK-NEXT: [[IND_END:%.*]] = getelementptr i8, i8* [[A:%.*]], i32 1984 ; CHECK-NEXT: [[IND_END3:%.*]] = getelementptr i8, i8* [[B:%.*]], i32 992 -; CHECK-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <16 x i8> poison, i8 [[TMP0]], i32 0 +; CHECK-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <16 x i8> poison, i8 [[TMP0]], i64 0 ; CHECK-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector <16 x i8> [[BROADCAST_SPLATINSERT]], <16 x i8> poison, <16 x i32> zeroinitializer ; CHECK-NEXT: br label [[VECTOR_BODY:%.*]] ; CHECK: vector.body: @@ -446,7 +446,7 @@ define hidden void @pointer_phi_v4f32_add1(float* noalias nocapture readonly %A, float* noalias nocapture %B, float %y) { ; CHECK-LABEL: @pointer_phi_v4f32_add1( ; CHECK-NEXT: entry: -; CHECK-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <4 x float> poison, float [[Y:%.*]], i32 0 +; CHECK-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <4 x float> poison, float [[Y:%.*]], i64 0 ; CHECK-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector <4 x float> [[BROADCAST_SPLATINSERT]], <4 x float> poison, <4 x i32> zeroinitializer ; CHECK-NEXT: br label [[VECTOR_BODY:%.*]] ; CHECK: vector.body: @@ -487,7 +487,7 @@ ; CHECK-NEXT: entry: ; CHECK-NEXT: [[IND_END:%.*]] = getelementptr float, float* [[A:%.*]], i32 1992 ; CHECK-NEXT: [[IND_END3:%.*]] = getelementptr float, float* [[B:%.*]], i32 996 -; CHECK-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <4 x float> poison, float [[Y:%.*]], i32 0 +; CHECK-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <4 x float> poison, float [[Y:%.*]], i64 0 ; CHECK-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector <4 x float> [[BROADCAST_SPLATINSERT]], <4 x float> poison, <4 x i32> zeroinitializer ; CHECK-NEXT: br label [[VECTOR_BODY:%.*]] ; CHECK: vector.body: @@ -542,7 +542,7 @@ ; CHECK-NEXT: entry: ; CHECK-NEXT: [[IND_END:%.*]] = getelementptr float, float* [[A:%.*]], i32 2988 ; CHECK-NEXT: [[IND_END3:%.*]] = getelementptr float, float* [[B:%.*]], i32 996 -; CHECK-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <4 x float> poison, float [[Y:%.*]], i32 0 +; CHECK-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <4 x float> poison, float [[Y:%.*]], i64 0 ; CHECK-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector <4 x float> [[BROADCAST_SPLATINSERT]], <4 x float> poison, <4 x i32> zeroinitializer ; CHECK-NEXT: br label [[VECTOR_BODY:%.*]] ; CHECK: vector.body: @@ -594,7 +594,7 @@ define hidden void @pointer_phi_v4half_add1(half* noalias nocapture readonly %A, half* noalias nocapture %B, half %y) { ; CHECK-LABEL: @pointer_phi_v4half_add1( ; CHECK-NEXT: entry: -; CHECK-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <8 x half> poison, half [[Y:%.*]], i32 0 +; CHECK-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <8 x half> poison, half [[Y:%.*]], i64 0 ; CHECK-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector <8 x half> [[BROADCAST_SPLATINSERT]], <8 x half> poison, <8 x i32> zeroinitializer ; CHECK-NEXT: br label [[VECTOR_BODY:%.*]] ; CHECK: vector.body: @@ -635,7 +635,7 @@ ; CHECK-NEXT: entry: ; CHECK-NEXT: [[IND_END:%.*]] = getelementptr half, half* [[A:%.*]], i32 1984 ; CHECK-NEXT: [[IND_END3:%.*]] = getelementptr half, half* [[B:%.*]], i32 992 -; CHECK-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <8 x half> poison, half [[Y:%.*]], i32 0 +; CHECK-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <8 x half> poison, half [[Y:%.*]], i64 0 ; CHECK-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector <8 x half> [[BROADCAST_SPLATINSERT]], <8 x half> poison, <8 x i32> zeroinitializer ; CHECK-NEXT: br label [[VECTOR_BODY:%.*]] ; CHECK: vector.body: @@ -690,7 +690,7 @@ ; CHECK-NEXT: entry: ; CHECK-NEXT: [[IND_END:%.*]] = getelementptr half, half* [[A:%.*]], i32 2976 ; CHECK-NEXT: [[IND_END3:%.*]] = getelementptr half, half* [[B:%.*]], i32 992 -; CHECK-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <8 x half> poison, half [[Y:%.*]], i32 0 +; CHECK-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <8 x half> poison, half [[Y:%.*]], i64 0 ; CHECK-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector <8 x half> [[BROADCAST_SPLATINSERT]], <8 x half> poison, <8 x i32> zeroinitializer ; CHECK-NEXT: br label [[VECTOR_BODY:%.*]] ; CHECK: vector.body: @@ -748,9 +748,9 @@ ; CHECK-NEXT: entry: ; CHECK-NEXT: [[IND_END:%.*]] = getelementptr i32, i32* [[A:%.*]], i32 59952 ; CHECK-NEXT: [[IND_END3:%.*]] = getelementptr i32, i32* [[B:%.*]], i32 9992 -; CHECK-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <4 x i32> poison, i32 [[Y:%.*]], i32 0 +; CHECK-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <4 x i32> poison, i32 [[Y:%.*]], i64 0 ; CHECK-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector <4 x i32> [[BROADCAST_SPLATINSERT]], <4 x i32> poison, <4 x i32> zeroinitializer -; CHECK-NEXT: [[BROADCAST_SPLATINSERT6:%.*]] = insertelement <4 x i32> poison, i32 [[Y]], i32 0 +; CHECK-NEXT: [[BROADCAST_SPLATINSERT6:%.*]] = insertelement <4 x i32> poison, i32 [[Y]], i64 0 ; CHECK-NEXT: [[BROADCAST_SPLAT7:%.*]] = shufflevector <4 x i32> [[BROADCAST_SPLATINSERT6]], <4 x i32> poison, <4 x i32> zeroinitializer ; CHECK-NEXT: br label [[VECTOR_BODY:%.*]] ; CHECK: vector.body: @@ -816,13 +816,13 @@ ; CHECK-NEXT: entry: ; CHECK-NEXT: [[IND_END:%.*]] = getelementptr i32, i32* [[A:%.*]], i32 59904 ; CHECK-NEXT: [[IND_END3:%.*]] = getelementptr i32, i32* [[B:%.*]], i32 9984 -; CHECK-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <4 x i32> poison, i32 [[Y:%.*]], i32 0 +; CHECK-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <4 x i32> poison, i32 [[Y:%.*]], i64 0 ; CHECK-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector <4 x i32> [[BROADCAST_SPLATINSERT]], <4 x i32> poison, <4 x i32> zeroinitializer -; CHECK-NEXT: [[BROADCAST_SPLATINSERT10:%.*]] = insertelement <4 x i32> poison, i32 [[Y]], i32 0 +; CHECK-NEXT: [[BROADCAST_SPLATINSERT10:%.*]] = insertelement <4 x i32> poison, i32 [[Y]], i64 0 ; CHECK-NEXT: [[BROADCAST_SPLAT11:%.*]] = shufflevector <4 x i32> [[BROADCAST_SPLATINSERT10]], <4 x i32> poison, <4 x i32> zeroinitializer -; CHECK-NEXT: [[BROADCAST_SPLATINSERT12:%.*]] = insertelement <4 x i32> poison, i32 [[Y]], i32 0 +; CHECK-NEXT: [[BROADCAST_SPLATINSERT12:%.*]] = insertelement <4 x i32> poison, i32 [[Y]], i64 0 ; CHECK-NEXT: [[BROADCAST_SPLAT13:%.*]] = shufflevector <4 x i32> [[BROADCAST_SPLATINSERT12]], <4 x i32> poison, <4 x i32> zeroinitializer -; CHECK-NEXT: [[BROADCAST_SPLATINSERT14:%.*]] = insertelement <4 x i32> poison, i32 [[Y]], i32 0 +; CHECK-NEXT: [[BROADCAST_SPLATINSERT14:%.*]] = insertelement <4 x i32> poison, i32 [[Y]], i64 0 ; CHECK-NEXT: [[BROADCAST_SPLAT15:%.*]] = shufflevector <4 x i32> [[BROADCAST_SPLATINSERT14]], <4 x i32> poison, <4 x i32> zeroinitializer ; CHECK-NEXT: br label [[VECTOR_BODY:%.*]] ; CHECK: vector.body: diff --git a/llvm/test/Transforms/LoopVectorize/SystemZ/addressing.ll b/llvm/test/Transforms/LoopVectorize/SystemZ/addressing.ll --- a/llvm/test/Transforms/LoopVectorize/SystemZ/addressing.ll +++ b/llvm/test/Transforms/LoopVectorize/SystemZ/addressing.ll @@ -69,8 +69,8 @@ ; CHECK-NEXT: [[TMP4:%.*]] = load i32*, i32** [[TMP2]], align 8 ; CHECK-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP3]], align 4 ; CHECK-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP4]], align 4 -; CHECK-NEXT: [[TMP7:%.*]] = insertelement <2 x i32> poison, i32 [[TMP5]], i32 0 -; CHECK-NEXT: [[TMP8:%.*]] = insertelement <2 x i32> [[TMP7]], i32 [[TMP6]], i32 1 +; CHECK-NEXT: [[TMP7:%.*]] = insertelement <2 x i32> poison, i32 [[TMP5]], i64 0 +; CHECK-NEXT: [[TMP8:%.*]] = insertelement <2 x i32> [[TMP7]], i32 [[TMP6]], i64 1 ; CHECK-NEXT: [[TMP9:%.*]] = getelementptr inbounds i32, i32* [[A:%.*]], i64 [[INDEX]] ; CHECK-NEXT: [[TMP10:%.*]] = bitcast i32* [[TMP9]] to <2 x i32>* ; CHECK-NEXT: store <2 x i32> [[TMP8]], <2 x i32>* [[TMP10]], align 4 diff --git a/llvm/test/Transforms/LoopVectorize/X86/consecutive-ptr-uniforms.ll b/llvm/test/Transforms/LoopVectorize/X86/consecutive-ptr-uniforms.ll --- a/llvm/test/Transforms/LoopVectorize/X86/consecutive-ptr-uniforms.ll +++ b/llvm/test/Transforms/LoopVectorize/X86/consecutive-ptr-uniforms.ll @@ -20,7 +20,7 @@ ; CHECK-NOT: LV: Found uniform instruction: %i = phi i64 [ %i.next, %for.body ], [ 0, %entry ] ; CHECK-NOT: LV: Found uniform instruction: %i.next = add nuw nsw i64 %i, 5 ; CHECK: vector.ph: -; CHECK-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <16 x float> poison, float %x, i32 0 +; CHECK-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <16 x float> poison, float %x, i64 0 ; CHECK-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector <16 x float> [[BROADCAST_SPLATINSERT]], <16 x float> poison, <16 x i32> zeroinitializer ; CHECK-NEXT: br label %vector.body ; CHECK: vector.body: @@ -34,7 +34,7 @@ ; CHECK-NEXT: [[TMP2:%.*]] = fmul <16 x float> [[BROADCAST_SPLAT]], [[STRIDED_VEC]] ; CHECK-NEXT: [[TMP3:%.*]] = getelementptr inbounds %data, %data* %d, i64 0, i32 0, <16 x i64> [[VEC_IND]] ; CHECK-NEXT: [[BC:%.*]] = bitcast <16 x float*> [[TMP3]] to <16 x <80 x float>*> -; CHECK-NEXT: [[TMP4:%.*]] = extractelement <16 x <80 x float>*> [[BC]], i32 0 +; CHECK-NEXT: [[TMP4:%.*]] = extractelement <16 x <80 x float>*> [[BC]], i64 0 ; CHECK-NEXT: [[WIDE_VEC1:%.*]] = load <80 x float>, <80 x float>* [[TMP4]], align 4 ; CHECK-NEXT: [[STRIDED_VEC2:%.*]] = shufflevector <80 x float> [[WIDE_VEC1]], <80 x float> poison, <16 x i32> ; CHECK-NEXT: [[TMP5:%.*]] = fadd <16 x float> [[STRIDED_VEC2]], [[TMP2]] diff --git a/llvm/test/Transforms/LoopVectorize/X86/gather_scatter.ll b/llvm/test/Transforms/LoopVectorize/X86/gather_scatter.ll --- a/llvm/test/Transforms/LoopVectorize/X86/gather_scatter.ll +++ b/llvm/test/Transforms/LoopVectorize/X86/gather_scatter.ll @@ -373,25 +373,25 @@ ; FVW2-NEXT: [[TMP2:%.*]] = getelementptr inbounds i32, i32* [[TRIGGER]], i64 [[TMP0]] ; FVW2-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP1]], align 4 ; FVW2-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP2]], align 4 -; FVW2-NEXT: [[TMP5:%.*]] = insertelement <2 x i32> poison, i32 [[TMP3]], i32 0 -; FVW2-NEXT: [[TMP6:%.*]] = insertelement <2 x i32> [[TMP5]], i32 [[TMP4]], i32 1 +; FVW2-NEXT: [[TMP5:%.*]] = insertelement <2 x i32> poison, i32 [[TMP3]], i64 0 +; FVW2-NEXT: [[TMP6:%.*]] = insertelement <2 x i32> [[TMP5]], i32 [[TMP4]], i64 1 ; FVW2-NEXT: [[TMP7:%.*]] = icmp sgt <2 x i32> [[TMP6]], zeroinitializer ; FVW2-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[STRUCT_IN:%.*]], %struct.In* [[IN:%.*]], <2 x i64> [[VEC_IND]], i32 1 ; FVW2-NEXT: [[WIDE_MASKED_GATHER:%.*]] = call <2 x float> @llvm.masked.gather.v2f32.v2p0f32(<2 x float*> [[TMP8]], i32 4, <2 x i1> [[TMP7]], <2 x float> undef) ; FVW2-NEXT: [[TMP9:%.*]] = fadd <2 x float> [[WIDE_MASKED_GATHER]], -; FVW2-NEXT: [[TMP10:%.*]] = extractelement <2 x i1> [[TMP7]], i32 0 +; FVW2-NEXT: [[TMP10:%.*]] = extractelement <2 x i1> [[TMP7]], i64 0 ; FVW2-NEXT: br i1 [[TMP10]], label [[PRED_STORE_IF:%.*]], label [[PRED_STORE_CONTINUE:%.*]] ; FVW2: pred.store.if: ; FVW2-NEXT: [[TMP11:%.*]] = getelementptr inbounds float, float* [[OUT:%.*]], i64 [[OFFSET_IDX]] -; FVW2-NEXT: [[TMP12:%.*]] = extractelement <2 x float> [[TMP9]], i32 0 +; FVW2-NEXT: [[TMP12:%.*]] = extractelement <2 x float> [[TMP9]], i64 0 ; FVW2-NEXT: store float [[TMP12]], float* [[TMP11]], align 4 ; FVW2-NEXT: br label [[PRED_STORE_CONTINUE]] ; FVW2: pred.store.continue: -; FVW2-NEXT: [[TMP13:%.*]] = extractelement <2 x i1> [[TMP7]], i32 1 +; FVW2-NEXT: [[TMP13:%.*]] = extractelement <2 x i1> [[TMP7]], i64 1 ; FVW2-NEXT: br i1 [[TMP13]], label [[PRED_STORE_IF8:%.*]], label [[PRED_STORE_CONTINUE9]] ; FVW2: pred.store.if8: ; FVW2-NEXT: [[TMP14:%.*]] = getelementptr inbounds float, float* [[OUT]], i64 [[TMP0]] -; FVW2-NEXT: [[TMP15:%.*]] = extractelement <2 x float> [[TMP9]], i32 1 +; FVW2-NEXT: [[TMP15:%.*]] = extractelement <2 x float> [[TMP9]], i64 1 ; FVW2-NEXT: store float [[TMP15]], float* [[TMP14]], align 4 ; FVW2-NEXT: br label [[PRED_STORE_CONTINUE9]] ; FVW2: pred.store.continue9: @@ -618,25 +618,25 @@ ; FVW2-NEXT: [[TMP2:%.*]] = getelementptr inbounds i32, i32* [[TRIGGER]], i64 [[TMP0]] ; FVW2-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP1]], align 4 ; FVW2-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP2]], align 4 -; FVW2-NEXT: [[TMP5:%.*]] = insertelement <2 x i32> poison, i32 [[TMP3]], i32 0 -; FVW2-NEXT: [[TMP6:%.*]] = insertelement <2 x i32> [[TMP5]], i32 [[TMP4]], i32 1 +; FVW2-NEXT: [[TMP5:%.*]] = insertelement <2 x i32> poison, i32 [[TMP3]], i64 0 +; FVW2-NEXT: [[TMP6:%.*]] = insertelement <2 x i32> [[TMP5]], i32 [[TMP4]], i64 1 ; FVW2-NEXT: [[TMP7:%.*]] = icmp sgt <2 x i32> [[TMP6]], zeroinitializer ; FVW2-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[STRUCT_IN:%.*]], %struct.In* [[IN:%.*]], <2 x i64> [[VEC_IND]], i32 1 ; FVW2-NEXT: [[WIDE_MASKED_GATHER:%.*]] = call <2 x float> @llvm.masked.gather.v2f32.v2p0f32(<2 x float*> [[TMP8]], i32 4, <2 x i1> [[TMP7]], <2 x float> undef) ; FVW2-NEXT: [[TMP9:%.*]] = fadd <2 x float> [[WIDE_MASKED_GATHER]], -; FVW2-NEXT: [[TMP10:%.*]] = extractelement <2 x i1> [[TMP7]], i32 0 +; FVW2-NEXT: [[TMP10:%.*]] = extractelement <2 x i1> [[TMP7]], i64 0 ; FVW2-NEXT: br i1 [[TMP10]], label [[PRED_STORE_IF:%.*]], label [[PRED_STORE_CONTINUE:%.*]] ; FVW2: pred.store.if: ; FVW2-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT_OUT:%.*]], %struct.Out* [[OUT:%.*]], i64 [[OFFSET_IDX]], i32 1 -; FVW2-NEXT: [[TMP12:%.*]] = extractelement <2 x float> [[TMP9]], i32 0 +; FVW2-NEXT: [[TMP12:%.*]] = extractelement <2 x float> [[TMP9]], i64 0 ; FVW2-NEXT: store float [[TMP12]], float* [[TMP11]], align 4 ; FVW2-NEXT: br label [[PRED_STORE_CONTINUE]] ; FVW2: pred.store.continue: -; FVW2-NEXT: [[TMP13:%.*]] = extractelement <2 x i1> [[TMP7]], i32 1 +; FVW2-NEXT: [[TMP13:%.*]] = extractelement <2 x i1> [[TMP7]], i64 1 ; FVW2-NEXT: br i1 [[TMP13]], label [[PRED_STORE_IF7:%.*]], label [[PRED_STORE_CONTINUE8]] ; FVW2: pred.store.if7: ; FVW2-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[STRUCT_OUT]], %struct.Out* [[OUT]], i64 [[TMP0]], i32 1 -; FVW2-NEXT: [[TMP15:%.*]] = extractelement <2 x float> [[TMP9]], i32 1 +; FVW2-NEXT: [[TMP15:%.*]] = extractelement <2 x float> [[TMP9]], i64 1 ; FVW2-NEXT: store float [[TMP15]], float* [[TMP14]], align 4 ; FVW2-NEXT: br label [[PRED_STORE_CONTINUE8]] ; FVW2: pred.store.continue8: @@ -849,25 +849,25 @@ ; FVW2-NEXT: [[TMP2:%.*]] = getelementptr inbounds i32, i32* [[TRIGGER]], i64 [[TMP0]] ; FVW2-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP1]], align 4 ; FVW2-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP2]], align 4 -; FVW2-NEXT: [[TMP5:%.*]] = insertelement <2 x i32> poison, i32 [[TMP3]], i32 0 -; FVW2-NEXT: [[TMP6:%.*]] = insertelement <2 x i32> [[TMP5]], i32 [[TMP4]], i32 1 +; FVW2-NEXT: [[TMP5:%.*]] = insertelement <2 x i32> poison, i32 [[TMP3]], i64 0 +; FVW2-NEXT: [[TMP6:%.*]] = insertelement <2 x i32> [[TMP5]], i32 [[TMP4]], i64 1 ; FVW2-NEXT: [[TMP7:%.*]] = icmp sgt <2 x i32> [[TMP6]], zeroinitializer ; FVW2-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[STRUCT_IN:%.*]], [[STRUCT_IN]] addrspace(1)* [[IN:%.*]], <2 x i64> [[VEC_IND]], i32 1 ; FVW2-NEXT: [[WIDE_MASKED_GATHER:%.*]] = call <2 x float> @llvm.masked.gather.v2f32.v2p1f32(<2 x float addrspace(1)*> [[TMP8]], i32 4, <2 x i1> [[TMP7]], <2 x float> undef) ; FVW2-NEXT: [[TMP9:%.*]] = fadd <2 x float> [[WIDE_MASKED_GATHER]], -; FVW2-NEXT: [[TMP10:%.*]] = extractelement <2 x i1> [[TMP7]], i32 0 +; FVW2-NEXT: [[TMP10:%.*]] = extractelement <2 x i1> [[TMP7]], i64 0 ; FVW2-NEXT: br i1 [[TMP10]], label [[PRED_STORE_IF:%.*]], label [[PRED_STORE_CONTINUE:%.*]] ; FVW2: pred.store.if: ; FVW2-NEXT: [[TMP11:%.*]] = getelementptr inbounds float, float addrspace(1)* [[OUT:%.*]], i64 [[OFFSET_IDX]] -; FVW2-NEXT: [[TMP12:%.*]] = extractelement <2 x float> [[TMP9]], i32 0 +; FVW2-NEXT: [[TMP12:%.*]] = extractelement <2 x float> [[TMP9]], i64 0 ; FVW2-NEXT: store float [[TMP12]], float addrspace(1)* [[TMP11]], align 4 ; FVW2-NEXT: br label [[PRED_STORE_CONTINUE]] ; FVW2: pred.store.continue: -; FVW2-NEXT: [[TMP13:%.*]] = extractelement <2 x i1> [[TMP7]], i32 1 +; FVW2-NEXT: [[TMP13:%.*]] = extractelement <2 x i1> [[TMP7]], i64 1 ; FVW2-NEXT: br i1 [[TMP13]], label [[PRED_STORE_IF8:%.*]], label [[PRED_STORE_CONTINUE9]] ; FVW2: pred.store.if8: ; FVW2-NEXT: [[TMP14:%.*]] = getelementptr inbounds float, float addrspace(1)* [[OUT]], i64 [[TMP0]] -; FVW2-NEXT: [[TMP15:%.*]] = extractelement <2 x float> [[TMP9]], i32 1 +; FVW2-NEXT: [[TMP15:%.*]] = extractelement <2 x float> [[TMP9]], i64 1 ; FVW2-NEXT: store float [[TMP15]], float addrspace(1)* [[TMP14]], align 4 ; FVW2-NEXT: br label [[PRED_STORE_CONTINUE9]] ; FVW2: pred.store.continue9: @@ -1080,25 +1080,25 @@ ; FVW2-NEXT: [[TMP2:%.*]] = getelementptr inbounds i32, i32* [[TRIGGER]], i64 [[TMP0]] ; FVW2-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP1]], align 4 ; FVW2-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP2]], align 4 -; FVW2-NEXT: [[TMP5:%.*]] = insertelement <2 x i32> poison, i32 [[TMP3]], i32 0 -; FVW2-NEXT: [[TMP6:%.*]] = insertelement <2 x i32> [[TMP5]], i32 [[TMP4]], i32 1 +; FVW2-NEXT: [[TMP5:%.*]] = insertelement <2 x i32> poison, i32 [[TMP3]], i64 0 +; FVW2-NEXT: [[TMP6:%.*]] = insertelement <2 x i32> [[TMP5]], i32 [[TMP4]], i64 1 ; FVW2-NEXT: [[TMP7:%.*]] = icmp sgt <2 x i32> [[TMP6]], zeroinitializer ; FVW2-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[STRUCT_IN:%.*]], [[STRUCT_IN]] addrspace(1)* [[IN:%.*]], <2 x i64> [[VEC_IND]], i32 1 ; FVW2-NEXT: [[WIDE_MASKED_GATHER:%.*]] = call <2 x float> @llvm.masked.gather.v2f32.v2p1f32(<2 x float addrspace(1)*> [[TMP8]], i32 4, <2 x i1> [[TMP7]], <2 x float> undef) ; FVW2-NEXT: [[TMP9:%.*]] = fadd <2 x float> [[WIDE_MASKED_GATHER]], -; FVW2-NEXT: [[TMP10:%.*]] = extractelement <2 x i1> [[TMP7]], i32 0 +; FVW2-NEXT: [[TMP10:%.*]] = extractelement <2 x i1> [[TMP7]], i64 0 ; FVW2-NEXT: br i1 [[TMP10]], label [[PRED_STORE_IF:%.*]], label [[PRED_STORE_CONTINUE:%.*]] ; FVW2: pred.store.if: ; FVW2-NEXT: [[TMP11:%.*]] = getelementptr inbounds float, float* [[OUT:%.*]], i64 [[OFFSET_IDX]] -; FVW2-NEXT: [[TMP12:%.*]] = extractelement <2 x float> [[TMP9]], i32 0 +; FVW2-NEXT: [[TMP12:%.*]] = extractelement <2 x float> [[TMP9]], i64 0 ; FVW2-NEXT: store float [[TMP12]], float* [[TMP11]], align 4 ; FVW2-NEXT: br label [[PRED_STORE_CONTINUE]] ; FVW2: pred.store.continue: -; FVW2-NEXT: [[TMP13:%.*]] = extractelement <2 x i1> [[TMP7]], i32 1 +; FVW2-NEXT: [[TMP13:%.*]] = extractelement <2 x i1> [[TMP7]], i64 1 ; FVW2-NEXT: br i1 [[TMP13]], label [[PRED_STORE_IF8:%.*]], label [[PRED_STORE_CONTINUE9]] ; FVW2: pred.store.if8: ; FVW2-NEXT: [[TMP14:%.*]] = getelementptr inbounds float, float* [[OUT]], i64 [[TMP0]] -; FVW2-NEXT: [[TMP15:%.*]] = extractelement <2 x float> [[TMP9]], i32 1 +; FVW2-NEXT: [[TMP15:%.*]] = extractelement <2 x float> [[TMP9]], i64 1 ; FVW2-NEXT: store float [[TMP15]], float* [[TMP14]], align 4 ; FVW2-NEXT: br label [[PRED_STORE_CONTINUE9]] ; FVW2: pred.store.continue9: @@ -1311,25 +1311,25 @@ ; FVW2-NEXT: [[TMP2:%.*]] = getelementptr inbounds i32, i32* [[TRIGGER]], i64 [[TMP0]] ; FVW2-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP1]], align 4 ; FVW2-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP2]], align 4 -; FVW2-NEXT: [[TMP5:%.*]] = insertelement <2 x i32> poison, i32 [[TMP3]], i32 0 -; FVW2-NEXT: [[TMP6:%.*]] = insertelement <2 x i32> [[TMP5]], i32 [[TMP4]], i32 1 +; FVW2-NEXT: [[TMP5:%.*]] = insertelement <2 x i32> poison, i32 [[TMP3]], i64 0 +; FVW2-NEXT: [[TMP6:%.*]] = insertelement <2 x i32> [[TMP5]], i32 [[TMP4]], i64 1 ; FVW2-NEXT: [[TMP7:%.*]] = icmp sgt <2 x i32> [[TMP6]], zeroinitializer ; FVW2-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[STRUCT_IN:%.*]], %struct.In* [[IN:%.*]], <2 x i64> [[VEC_IND]], i32 1 ; FVW2-NEXT: [[WIDE_MASKED_GATHER:%.*]] = call <2 x float> @llvm.masked.gather.v2f32.v2p0f32(<2 x float*> [[TMP8]], i32 4, <2 x i1> [[TMP7]], <2 x float> undef) ; FVW2-NEXT: [[TMP9:%.*]] = fadd <2 x float> [[WIDE_MASKED_GATHER]], -; FVW2-NEXT: [[TMP10:%.*]] = extractelement <2 x i1> [[TMP7]], i32 0 +; FVW2-NEXT: [[TMP10:%.*]] = extractelement <2 x i1> [[TMP7]], i64 0 ; FVW2-NEXT: br i1 [[TMP10]], label [[PRED_STORE_IF:%.*]], label [[PRED_STORE_CONTINUE:%.*]] ; FVW2: pred.store.if: ; FVW2-NEXT: [[TMP11:%.*]] = getelementptr inbounds float, float addrspace(1)* [[OUT:%.*]], i64 [[OFFSET_IDX]] -; FVW2-NEXT: [[TMP12:%.*]] = extractelement <2 x float> [[TMP9]], i32 0 +; FVW2-NEXT: [[TMP12:%.*]] = extractelement <2 x float> [[TMP9]], i64 0 ; FVW2-NEXT: store float [[TMP12]], float addrspace(1)* [[TMP11]], align 4 ; FVW2-NEXT: br label [[PRED_STORE_CONTINUE]] ; FVW2: pred.store.continue: -; FVW2-NEXT: [[TMP13:%.*]] = extractelement <2 x i1> [[TMP7]], i32 1 +; FVW2-NEXT: [[TMP13:%.*]] = extractelement <2 x i1> [[TMP7]], i64 1 ; FVW2-NEXT: br i1 [[TMP13]], label [[PRED_STORE_IF8:%.*]], label [[PRED_STORE_CONTINUE9]] ; FVW2: pred.store.if8: ; FVW2-NEXT: [[TMP14:%.*]] = getelementptr inbounds float, float addrspace(1)* [[OUT]], i64 [[TMP0]] -; FVW2-NEXT: [[TMP15:%.*]] = extractelement <2 x float> [[TMP9]], i32 1 +; FVW2-NEXT: [[TMP15:%.*]] = extractelement <2 x float> [[TMP9]], i64 1 ; FVW2-NEXT: store float [[TMP15]], float addrspace(1)* [[TMP14]], align 4 ; FVW2-NEXT: br label [[PRED_STORE_CONTINUE9]] ; FVW2: pred.store.continue9: @@ -1659,13 +1659,13 @@ ; FVW2-NEXT: [[TMP22:%.*]] = getelementptr inbounds float, float* [[TMP20]], i64 2 ; FVW2-NEXT: [[TMP23:%.*]] = bitcast float* [[TMP22]] to <2 x float>* ; FVW2-NEXT: [[WIDE_LOAD20:%.*]] = load <2 x float>, <2 x float>* [[TMP23]], align 4, !alias.scope !7 -; FVW2-NEXT: [[TMP24:%.*]] = extractelement <2 x float> [[WIDE_LOAD]], i32 0 +; FVW2-NEXT: [[TMP24:%.*]] = extractelement <2 x float> [[WIDE_LOAD]], i64 0 ; FVW2-NEXT: store float [[TMP24]], float* [[NEXT_GEP16]], align 4, !alias.scope !10, !noalias !12 -; FVW2-NEXT: [[TMP25:%.*]] = extractelement <2 x float> [[WIDE_LOAD]], i32 1 +; FVW2-NEXT: [[TMP25:%.*]] = extractelement <2 x float> [[WIDE_LOAD]], i64 1 ; FVW2-NEXT: store float [[TMP25]], float* [[NEXT_GEP17]], align 4, !alias.scope !10, !noalias !12 -; FVW2-NEXT: [[TMP26:%.*]] = extractelement <2 x float> [[WIDE_LOAD20]], i32 0 +; FVW2-NEXT: [[TMP26:%.*]] = extractelement <2 x float> [[WIDE_LOAD20]], i64 0 ; FVW2-NEXT: store float [[TMP26]], float* [[NEXT_GEP18]], align 4, !alias.scope !10, !noalias !12 -; FVW2-NEXT: [[TMP27:%.*]] = extractelement <2 x float> [[WIDE_LOAD20]], i32 1 +; FVW2-NEXT: [[TMP27:%.*]] = extractelement <2 x float> [[WIDE_LOAD20]], i64 1 ; FVW2-NEXT: store float [[TMP27]], float* [[NEXT_GEP19]], align 4, !alias.scope !10, !noalias !12 ; FVW2-NEXT: [[TMP28:%.*]] = bitcast float* [[NEXT_GEP]] to <2 x float>* ; FVW2-NEXT: [[WIDE_LOAD21:%.*]] = load <2 x float>, <2 x float>* [[TMP28]], align 4, !alias.scope !14 @@ -1676,13 +1676,13 @@ ; FVW2-NEXT: [[TMP32:%.*]] = getelementptr inbounds float, float* [[NEXT_GEP17]], i64 1 ; FVW2-NEXT: [[TMP33:%.*]] = getelementptr inbounds float, float* [[NEXT_GEP18]], i64 1 ; FVW2-NEXT: [[TMP34:%.*]] = getelementptr inbounds float, float* [[NEXT_GEP19]], i64 1 -; FVW2-NEXT: [[TMP35:%.*]] = extractelement <2 x float> [[WIDE_LOAD21]], i32 0 +; FVW2-NEXT: [[TMP35:%.*]] = extractelement <2 x float> [[WIDE_LOAD21]], i64 0 ; FVW2-NEXT: store float [[TMP35]], float* [[TMP31]], align 4, !alias.scope !10, !noalias !12 -; FVW2-NEXT: [[TMP36:%.*]] = extractelement <2 x float> [[WIDE_LOAD21]], i32 1 +; FVW2-NEXT: [[TMP36:%.*]] = extractelement <2 x float> [[WIDE_LOAD21]], i64 1 ; FVW2-NEXT: store float [[TMP36]], float* [[TMP32]], align 4, !alias.scope !10, !noalias !12 -; FVW2-NEXT: [[TMP37:%.*]] = extractelement <2 x float> [[WIDE_LOAD22]], i32 0 +; FVW2-NEXT: [[TMP37:%.*]] = extractelement <2 x float> [[WIDE_LOAD22]], i64 0 ; FVW2-NEXT: store float [[TMP37]], float* [[TMP33]], align 4, !alias.scope !10, !noalias !12 -; FVW2-NEXT: [[TMP38:%.*]] = extractelement <2 x float> [[WIDE_LOAD22]], i32 1 +; FVW2-NEXT: [[TMP38:%.*]] = extractelement <2 x float> [[WIDE_LOAD22]], i64 1 ; FVW2-NEXT: store float [[TMP38]], float* [[TMP34]], align 4, !alias.scope !10, !noalias !12 ; FVW2-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4 ; FVW2-NEXT: [[TMP39:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]] diff --git a/llvm/test/Transforms/LoopVectorize/X86/intrinsiccost.ll b/llvm/test/Transforms/LoopVectorize/X86/intrinsiccost.ll --- a/llvm/test/Transforms/LoopVectorize/X86/intrinsiccost.ll +++ b/llvm/test/Transforms/LoopVectorize/X86/intrinsiccost.ll @@ -29,13 +29,13 @@ ; CHECK-NEXT: br i1 [[MIN_ITERS_CHECK1]], label [[VEC_EPILOG_PH:%.*]], label [[VECTOR_PH:%.*]] ; CHECK: vector.ph: ; CHECK-NEXT: [[N_VEC:%.*]] = and i64 [[TMP2]], 8589934528 -; CHECK-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <16 x i16> poison, i16 [[OFFSET:%.*]], i32 0 +; CHECK-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <16 x i16> poison, i16 [[OFFSET:%.*]], i64 0 ; CHECK-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector <16 x i16> [[BROADCAST_SPLATINSERT]], <16 x i16> poison, <16 x i32> zeroinitializer -; CHECK-NEXT: [[BROADCAST_SPLATINSERT12:%.*]] = insertelement <16 x i16> poison, i16 [[OFFSET]], i32 0 +; CHECK-NEXT: [[BROADCAST_SPLATINSERT12:%.*]] = insertelement <16 x i16> poison, i16 [[OFFSET]], i64 0 ; CHECK-NEXT: [[BROADCAST_SPLAT13:%.*]] = shufflevector <16 x i16> [[BROADCAST_SPLATINSERT12]], <16 x i16> poison, <16 x i32> zeroinitializer -; CHECK-NEXT: [[BROADCAST_SPLATINSERT14:%.*]] = insertelement <16 x i16> poison, i16 [[OFFSET]], i32 0 +; CHECK-NEXT: [[BROADCAST_SPLATINSERT14:%.*]] = insertelement <16 x i16> poison, i16 [[OFFSET]], i64 0 ; CHECK-NEXT: [[BROADCAST_SPLAT15:%.*]] = shufflevector <16 x i16> [[BROADCAST_SPLATINSERT14]], <16 x i16> poison, <16 x i32> zeroinitializer -; CHECK-NEXT: [[BROADCAST_SPLATINSERT16:%.*]] = insertelement <16 x i16> poison, i16 [[OFFSET]], i32 0 +; CHECK-NEXT: [[BROADCAST_SPLATINSERT16:%.*]] = insertelement <16 x i16> poison, i16 [[OFFSET]], i64 0 ; CHECK-NEXT: [[BROADCAST_SPLAT17:%.*]] = shufflevector <16 x i16> [[BROADCAST_SPLATINSERT16]], <16 x i16> poison, <16 x i32> zeroinitializer ; CHECK-NEXT: br label [[VECTOR_BODY:%.*]] ; CHECK: vector.body: @@ -70,7 +70,7 @@ ; CHECK-NEXT: store <16 x i16> [[TMP13]], <16 x i16>* [[TMP20]], align 2 ; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 64 ; CHECK-NEXT: [[TMP21:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]] -; CHECK-NEXT: br i1 [[TMP21]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], [[LOOP0:!llvm.loop !.*]] +; CHECK-NEXT: br i1 [[TMP21]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP0:![0-9]+]] ; CHECK: middle.block: ; CHECK-NEXT: [[CMP_N:%.*]] = icmp eq i64 [[TMP2]], [[N_VEC]] ; CHECK-NEXT: br i1 [[CMP_N]], label [[WHILE_END]], label [[VEC_EPILOG_ITER_CHECK:%.*]] @@ -92,7 +92,7 @@ ; CHECK-NEXT: [[IND_END:%.*]] = sub i32 [[BLOCKSIZE]], [[CAST_CRD]] ; CHECK-NEXT: [[IND_END25:%.*]] = getelementptr i16, i16* [[PSRC]], i64 [[N_VEC19]] ; CHECK-NEXT: [[IND_END28:%.*]] = getelementptr i16, i16* [[PDST]], i64 [[N_VEC19]] -; CHECK-NEXT: [[BROADCAST_SPLATINSERT35:%.*]] = insertelement <8 x i16> poison, i16 [[OFFSET]], i32 0 +; CHECK-NEXT: [[BROADCAST_SPLATINSERT35:%.*]] = insertelement <8 x i16> poison, i16 [[OFFSET]], i64 0 ; CHECK-NEXT: [[BROADCAST_SPLAT36:%.*]] = shufflevector <8 x i16> [[BROADCAST_SPLATINSERT35]], <8 x i16> poison, <8 x i32> zeroinitializer ; CHECK-NEXT: br label [[VEC_EPILOG_VECTOR_BODY:%.*]] ; CHECK: vec.epilog.vector.body: @@ -106,7 +106,7 @@ ; CHECK-NEXT: store <8 x i16> [[TMP26]], <8 x i16>* [[TMP27]], align 2 ; CHECK-NEXT: [[INDEX_NEXT21]] = add nuw i64 [[INDEX20]], 8 ; CHECK-NEXT: [[TMP28:%.*]] = icmp eq i64 [[INDEX_NEXT21]], [[N_VEC19]] -; CHECK-NEXT: br i1 [[TMP28]], label [[VEC_EPILOG_MIDDLE_BLOCK:%.*]], label [[VEC_EPILOG_VECTOR_BODY]], [[LOOP2:!llvm.loop !.*]] +; CHECK-NEXT: br i1 [[TMP28]], label [[VEC_EPILOG_MIDDLE_BLOCK:%.*]], label [[VEC_EPILOG_VECTOR_BODY]], !llvm.loop [[LOOP2:![0-9]+]] ; CHECK: vec.epilog.middle.block: ; CHECK-NEXT: [[CMP_N30:%.*]] = icmp eq i64 [[TMP24]], [[N_VEC19]] ; CHECK-NEXT: br i1 [[CMP_N30]], label [[WHILE_END]], label [[VEC_EPILOG_SCALAR_PH]] @@ -126,7 +126,7 @@ ; CHECK-NEXT: store i16 [[TMP30]], i16* [[PDST_ADDR_07]], align 2 ; CHECK-NEXT: [[DEC]] = add i32 [[BLKCNT_09]], -1 ; CHECK-NEXT: [[CMP_NOT:%.*]] = icmp eq i32 [[DEC]], 0 -; CHECK-NEXT: br i1 [[CMP_NOT]], label [[WHILE_END]], label [[WHILE_BODY]], [[LOOP4:!llvm.loop !.*]] +; CHECK-NEXT: br i1 [[CMP_NOT]], label [[WHILE_END]], label [[WHILE_BODY]], !llvm.loop [[LOOP4:![0-9]+]] ; CHECK: while.end: ; CHECK-NEXT: ret void ; @@ -175,13 +175,13 @@ ; CHECK-NEXT: br i1 [[MIN_ITERS_CHECK1]], label [[VEC_EPILOG_PH:%.*]], label [[VECTOR_PH:%.*]] ; CHECK: vector.ph: ; CHECK-NEXT: [[N_VEC:%.*]] = and i64 [[TMP2]], 8589934464 -; CHECK-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <32 x i8> poison, i8 [[OFFSET:%.*]], i32 0 +; CHECK-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <32 x i8> poison, i8 [[OFFSET:%.*]], i64 0 ; CHECK-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector <32 x i8> [[BROADCAST_SPLATINSERT]], <32 x i8> poison, <32 x i32> zeroinitializer -; CHECK-NEXT: [[BROADCAST_SPLATINSERT12:%.*]] = insertelement <32 x i8> poison, i8 [[OFFSET]], i32 0 +; CHECK-NEXT: [[BROADCAST_SPLATINSERT12:%.*]] = insertelement <32 x i8> poison, i8 [[OFFSET]], i64 0 ; CHECK-NEXT: [[BROADCAST_SPLAT13:%.*]] = shufflevector <32 x i8> [[BROADCAST_SPLATINSERT12]], <32 x i8> poison, <32 x i32> zeroinitializer -; CHECK-NEXT: [[BROADCAST_SPLATINSERT14:%.*]] = insertelement <32 x i8> poison, i8 [[OFFSET]], i32 0 +; CHECK-NEXT: [[BROADCAST_SPLATINSERT14:%.*]] = insertelement <32 x i8> poison, i8 [[OFFSET]], i64 0 ; CHECK-NEXT: [[BROADCAST_SPLAT15:%.*]] = shufflevector <32 x i8> [[BROADCAST_SPLATINSERT14]], <32 x i8> poison, <32 x i32> zeroinitializer -; CHECK-NEXT: [[BROADCAST_SPLATINSERT16:%.*]] = insertelement <32 x i8> poison, i8 [[OFFSET]], i32 0 +; CHECK-NEXT: [[BROADCAST_SPLATINSERT16:%.*]] = insertelement <32 x i8> poison, i8 [[OFFSET]], i64 0 ; CHECK-NEXT: [[BROADCAST_SPLAT17:%.*]] = shufflevector <32 x i8> [[BROADCAST_SPLATINSERT16]], <32 x i8> poison, <32 x i32> zeroinitializer ; CHECK-NEXT: br label [[VECTOR_BODY:%.*]] ; CHECK: vector.body: @@ -216,7 +216,7 @@ ; CHECK-NEXT: store <32 x i8> [[TMP13]], <32 x i8>* [[TMP20]], align 2 ; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 128 ; CHECK-NEXT: [[TMP21:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]] -; CHECK-NEXT: br i1 [[TMP21]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], [[LOOP5:!llvm.loop !.*]] +; CHECK-NEXT: br i1 [[TMP21]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP5:![0-9]+]] ; CHECK: middle.block: ; CHECK-NEXT: [[CMP_N:%.*]] = icmp eq i64 [[TMP2]], [[N_VEC]] ; CHECK-NEXT: br i1 [[CMP_N]], label [[WHILE_END]], label [[VEC_EPILOG_ITER_CHECK:%.*]] @@ -238,7 +238,7 @@ ; CHECK-NEXT: [[IND_END:%.*]] = sub i32 [[BLOCKSIZE]], [[CAST_CRD]] ; CHECK-NEXT: [[IND_END25:%.*]] = getelementptr i8, i8* [[PSRC]], i64 [[N_VEC19]] ; CHECK-NEXT: [[IND_END28:%.*]] = getelementptr i8, i8* [[PDST]], i64 [[N_VEC19]] -; CHECK-NEXT: [[BROADCAST_SPLATINSERT35:%.*]] = insertelement <16 x i8> poison, i8 [[OFFSET]], i32 0 +; CHECK-NEXT: [[BROADCAST_SPLATINSERT35:%.*]] = insertelement <16 x i8> poison, i8 [[OFFSET]], i64 0 ; CHECK-NEXT: [[BROADCAST_SPLAT36:%.*]] = shufflevector <16 x i8> [[BROADCAST_SPLATINSERT35]], <16 x i8> poison, <16 x i32> zeroinitializer ; CHECK-NEXT: br label [[VEC_EPILOG_VECTOR_BODY:%.*]] ; CHECK: vec.epilog.vector.body: @@ -252,7 +252,7 @@ ; CHECK-NEXT: store <16 x i8> [[TMP26]], <16 x i8>* [[TMP27]], align 2 ; CHECK-NEXT: [[INDEX_NEXT21]] = add nuw i64 [[INDEX20]], 16 ; CHECK-NEXT: [[TMP28:%.*]] = icmp eq i64 [[INDEX_NEXT21]], [[N_VEC19]] -; CHECK-NEXT: br i1 [[TMP28]], label [[VEC_EPILOG_MIDDLE_BLOCK:%.*]], label [[VEC_EPILOG_VECTOR_BODY]], [[LOOP6:!llvm.loop !.*]] +; CHECK-NEXT: br i1 [[TMP28]], label [[VEC_EPILOG_MIDDLE_BLOCK:%.*]], label [[VEC_EPILOG_VECTOR_BODY]], !llvm.loop [[LOOP6:![0-9]+]] ; CHECK: vec.epilog.middle.block: ; CHECK-NEXT: [[CMP_N30:%.*]] = icmp eq i64 [[TMP24]], [[N_VEC19]] ; CHECK-NEXT: br i1 [[CMP_N30]], label [[WHILE_END]], label [[VEC_EPILOG_SCALAR_PH]] @@ -272,7 +272,7 @@ ; CHECK-NEXT: store i8 [[TMP30]], i8* [[PDST_ADDR_07]], align 2 ; CHECK-NEXT: [[DEC]] = add i32 [[BLKCNT_09]], -1 ; CHECK-NEXT: [[CMP_NOT:%.*]] = icmp eq i32 [[DEC]], 0 -; CHECK-NEXT: br i1 [[CMP_NOT]], label [[WHILE_END]], label [[WHILE_BODY]], [[LOOP7:!llvm.loop !.*]] +; CHECK-NEXT: br i1 [[CMP_NOT]], label [[WHILE_END]], label [[WHILE_BODY]], !llvm.loop [[LOOP7:![0-9]+]] ; CHECK: while.end: ; CHECK-NEXT: ret void ; diff --git a/llvm/test/Transforms/LoopVectorize/X86/invariant-load-gather.ll b/llvm/test/Transforms/LoopVectorize/X86/invariant-load-gather.ll --- a/llvm/test/Transforms/LoopVectorize/X86/invariant-load-gather.ll +++ b/llvm/test/Transforms/LoopVectorize/X86/invariant-load-gather.ll @@ -24,9 +24,9 @@ ; CHECK-NEXT: br i1 [[MIN_ITERS_CHECK7]], label [[VEC_EPILOG_PH:%.*]], label [[VECTOR_PH:%.*]] ; CHECK: vector.ph: ; CHECK-NEXT: [[N_VEC:%.*]] = and i64 [[SMAX6]], 9223372036854775792 -; CHECK-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <16 x i32*> poison, i32* [[A]], i32 0 +; CHECK-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <16 x i32*> poison, i32* [[A]], i64 0 ; CHECK-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector <16 x i32*> [[BROADCAST_SPLATINSERT]], <16 x i32*> poison, <16 x i32> zeroinitializer -; CHECK-NEXT: [[BROADCAST_SPLATINSERT8:%.*]] = insertelement <16 x i32> poison, i32 [[NTRUNC]], i32 0 +; CHECK-NEXT: [[BROADCAST_SPLATINSERT8:%.*]] = insertelement <16 x i32> poison, i32 [[NTRUNC]], i64 0 ; CHECK-NEXT: [[BROADCAST_SPLAT9:%.*]] = shufflevector <16 x i32> [[BROADCAST_SPLATINSERT8]], <16 x i32> poison, <16 x i32> zeroinitializer ; CHECK-NEXT: br label [[VECTOR_BODY:%.*]] ; CHECK: vector.body: @@ -42,7 +42,7 @@ ; CHECK-NEXT: [[WIDE_MASKED_GATHER:%.*]] = call <16 x i32> @llvm.masked.gather.v16i32.v16p0i32(<16 x i32*> [[BROADCAST_SPLAT]], i32 4, <16 x i1> [[TMP1]], <16 x i32> undef), !alias.scope !3 ; CHECK-NEXT: [[PREDPHI:%.*]] = select <16 x i1> [[TMP1]], <16 x i32> [[WIDE_MASKED_GATHER]], <16 x i32> ; CHECK-NEXT: [[CMP_N:%.*]] = icmp eq i64 [[SMAX6]], [[N_VEC]] -; CHECK-NEXT: [[TMP4:%.*]] = extractelement <16 x i32> [[PREDPHI]], i32 15 +; CHECK-NEXT: [[TMP4:%.*]] = extractelement <16 x i32> [[PREDPHI]], i64 15 ; CHECK-NEXT: br i1 [[CMP_N]], label [[FOR_END:%.*]], label [[VEC_EPILOG_ITER_CHECK:%.*]] ; CHECK: vec.epilog.iter.check: ; CHECK-NEXT: [[N_VEC_REMAINING:%.*]] = and i64 [[SMAX6]], 8 @@ -52,9 +52,9 @@ ; CHECK-NEXT: [[VEC_EPILOG_RESUME_VAL:%.*]] = phi i64 [ [[N_VEC]], [[VEC_EPILOG_ITER_CHECK]] ], [ 0, [[VECTOR_MAIN_LOOP_ITER_CHECK]] ] ; CHECK-NEXT: [[SMAX11:%.*]] = call i64 @llvm.smax.i64(i64 [[N]], i64 1) ; CHECK-NEXT: [[N_VEC13:%.*]] = and i64 [[SMAX11]], 9223372036854775800 -; CHECK-NEXT: [[BROADCAST_SPLATINSERT18:%.*]] = insertelement <8 x i32*> poison, i32* [[A]], i32 0 +; CHECK-NEXT: [[BROADCAST_SPLATINSERT18:%.*]] = insertelement <8 x i32*> poison, i32* [[A]], i64 0 ; CHECK-NEXT: [[BROADCAST_SPLAT19:%.*]] = shufflevector <8 x i32*> [[BROADCAST_SPLATINSERT18]], <8 x i32*> poison, <8 x i32> zeroinitializer -; CHECK-NEXT: [[BROADCAST_SPLATINSERT20:%.*]] = insertelement <8 x i32> poison, i32 [[NTRUNC]], i32 0 +; CHECK-NEXT: [[BROADCAST_SPLATINSERT20:%.*]] = insertelement <8 x i32> poison, i32 [[NTRUNC]], i64 0 ; CHECK-NEXT: [[BROADCAST_SPLAT21:%.*]] = shufflevector <8 x i32> [[BROADCAST_SPLATINSERT20]], <8 x i32> poison, <8 x i32> zeroinitializer ; CHECK-NEXT: br label [[VEC_EPILOG_VECTOR_BODY:%.*]] ; CHECK: vec.epilog.vector.body: @@ -70,7 +70,7 @@ ; CHECK-NEXT: [[WIDE_MASKED_GATHER22:%.*]] = call <8 x i32> @llvm.masked.gather.v8i32.v8p0i32(<8 x i32*> [[BROADCAST_SPLAT19]], i32 4, <8 x i1> [[TMP6]], <8 x i32> undef) ; CHECK-NEXT: [[PREDPHI23:%.*]] = select <8 x i1> [[TMP6]], <8 x i32> [[WIDE_MASKED_GATHER22]], <8 x i32> ; CHECK-NEXT: [[CMP_N16:%.*]] = icmp eq i64 [[SMAX11]], [[N_VEC13]] -; CHECK-NEXT: [[TMP9:%.*]] = extractelement <8 x i32> [[PREDPHI23]], i32 7 +; CHECK-NEXT: [[TMP9:%.*]] = extractelement <8 x i32> [[PREDPHI23]], i64 7 ; CHECK-NEXT: br i1 [[CMP_N16]], label [[FOR_END_LOOPEXIT:%.*]], label [[VEC_EPILOG_SCALAR_PH]] ; CHECK: vec.epilog.scalar.ph: ; CHECK-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ [[N_VEC13]], [[VEC_EPILOG_MIDDLE_BLOCK]] ], [ [[N_VEC]], [[VEC_EPILOG_ITER_CHECK]] ], [ 0, [[VECTOR_MEMCHECK]] ], [ 0, [[ITER_CHECK:%.*]] ] diff --git a/llvm/test/Transforms/LoopVectorize/X86/invariant-store-vectorization.ll b/llvm/test/Transforms/LoopVectorize/X86/invariant-store-vectorization.ll --- a/llvm/test/Transforms/LoopVectorize/X86/invariant-store-vectorization.ll +++ b/llvm/test/Transforms/LoopVectorize/X86/invariant-store-vectorization.ll @@ -118,11 +118,11 @@ ; CHECK-NEXT: br i1 [[MIN_ITERS_CHECK7]], label [[VEC_EPILOG_PH:%.*]], label [[VECTOR_PH:%.*]] ; CHECK: vector.ph: ; CHECK-NEXT: [[N_VEC:%.*]] = and i64 [[SMAX6]], 9223372036854775792 -; CHECK-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <16 x i32> poison, i32 [[K:%.*]], i32 0 +; CHECK-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <16 x i32> poison, i32 [[K:%.*]], i64 0 ; CHECK-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector <16 x i32> [[BROADCAST_SPLATINSERT]], <16 x i32> poison, <16 x i32> zeroinitializer -; CHECK-NEXT: [[BROADCAST_SPLATINSERT8:%.*]] = insertelement <16 x i32> poison, i32 [[NTRUNC]], i32 0 +; CHECK-NEXT: [[BROADCAST_SPLATINSERT8:%.*]] = insertelement <16 x i32> poison, i32 [[NTRUNC]], i64 0 ; CHECK-NEXT: [[BROADCAST_SPLAT9:%.*]] = shufflevector <16 x i32> [[BROADCAST_SPLATINSERT8]], <16 x i32> poison, <16 x i32> zeroinitializer -; CHECK-NEXT: [[BROADCAST_SPLATINSERT10:%.*]] = insertelement <16 x i32*> poison, i32* [[A]], i32 0 +; CHECK-NEXT: [[BROADCAST_SPLATINSERT10:%.*]] = insertelement <16 x i32*> poison, i32* [[A]], i64 0 ; CHECK-NEXT: [[BROADCAST_SPLAT11:%.*]] = shufflevector <16 x i32*> [[BROADCAST_SPLATINSERT10]], <16 x i32*> poison, <16 x i32> zeroinitializer ; CHECK-NEXT: br label [[VECTOR_BODY:%.*]] ; CHECK: vector.body: @@ -148,11 +148,11 @@ ; CHECK-NEXT: [[VEC_EPILOG_RESUME_VAL:%.*]] = phi i64 [ [[N_VEC]], [[VEC_EPILOG_ITER_CHECK]] ], [ 0, [[VECTOR_MAIN_LOOP_ITER_CHECK]] ] ; CHECK-NEXT: [[SMAX12:%.*]] = call i64 @llvm.smax.i64(i64 [[N]], i64 1) ; CHECK-NEXT: [[N_VEC14:%.*]] = and i64 [[SMAX12]], 9223372036854775800 -; CHECK-NEXT: [[BROADCAST_SPLATINSERT19:%.*]] = insertelement <8 x i32> poison, i32 [[K]], i32 0 +; CHECK-NEXT: [[BROADCAST_SPLATINSERT19:%.*]] = insertelement <8 x i32> poison, i32 [[K]], i64 0 ; CHECK-NEXT: [[BROADCAST_SPLAT20:%.*]] = shufflevector <8 x i32> [[BROADCAST_SPLATINSERT19]], <8 x i32> poison, <8 x i32> zeroinitializer -; CHECK-NEXT: [[BROADCAST_SPLATINSERT21:%.*]] = insertelement <8 x i32> poison, i32 [[NTRUNC]], i32 0 +; CHECK-NEXT: [[BROADCAST_SPLATINSERT21:%.*]] = insertelement <8 x i32> poison, i32 [[NTRUNC]], i64 0 ; CHECK-NEXT: [[BROADCAST_SPLAT22:%.*]] = shufflevector <8 x i32> [[BROADCAST_SPLATINSERT21]], <8 x i32> poison, <8 x i32> zeroinitializer -; CHECK-NEXT: [[BROADCAST_SPLATINSERT23:%.*]] = insertelement <8 x i32*> poison, i32* [[A]], i32 0 +; CHECK-NEXT: [[BROADCAST_SPLATINSERT23:%.*]] = insertelement <8 x i32*> poison, i32* [[A]], i64 0 ; CHECK-NEXT: [[BROADCAST_SPLAT24:%.*]] = shufflevector <8 x i32*> [[BROADCAST_SPLATINSERT23]], <8 x i32*> poison, <8 x i32> zeroinitializer ; CHECK-NEXT: br label [[VEC_EPILOG_VECTOR_BODY:%.*]] ; CHECK: vec.epilog.vector.body: @@ -246,11 +246,11 @@ ; CHECK-NEXT: br i1 [[MIN_ITERS_CHECK17]], label [[VEC_EPILOG_PH:%.*]], label [[VECTOR_PH:%.*]] ; CHECK: vector.ph: ; CHECK-NEXT: [[N_VEC:%.*]] = and i64 [[SMAX16]], 9223372036854775792 -; CHECK-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <16 x i32> poison, i32 [[K:%.*]], i32 0 +; CHECK-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <16 x i32> poison, i32 [[K:%.*]], i64 0 ; CHECK-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector <16 x i32> [[BROADCAST_SPLATINSERT]], <16 x i32> poison, <16 x i32> zeroinitializer -; CHECK-NEXT: [[BROADCAST_SPLATINSERT18:%.*]] = insertelement <16 x i32> poison, i32 [[NTRUNC]], i32 0 +; CHECK-NEXT: [[BROADCAST_SPLATINSERT18:%.*]] = insertelement <16 x i32> poison, i32 [[NTRUNC]], i64 0 ; CHECK-NEXT: [[BROADCAST_SPLAT19:%.*]] = shufflevector <16 x i32> [[BROADCAST_SPLATINSERT18]], <16 x i32> poison, <16 x i32> zeroinitializer -; CHECK-NEXT: [[BROADCAST_SPLATINSERT20:%.*]] = insertelement <16 x i32*> poison, i32* [[A]], i32 0 +; CHECK-NEXT: [[BROADCAST_SPLATINSERT20:%.*]] = insertelement <16 x i32*> poison, i32* [[A]], i64 0 ; CHECK-NEXT: [[BROADCAST_SPLAT21:%.*]] = shufflevector <16 x i32*> [[BROADCAST_SPLATINSERT20]], <16 x i32*> poison, <16 x i32> zeroinitializer ; CHECK-NEXT: br label [[VECTOR_BODY:%.*]] ; CHECK: vector.body: @@ -279,11 +279,11 @@ ; CHECK-NEXT: [[VEC_EPILOG_RESUME_VAL:%.*]] = phi i64 [ [[N_VEC]], [[VEC_EPILOG_ITER_CHECK]] ], [ 0, [[VECTOR_MAIN_LOOP_ITER_CHECK]] ] ; CHECK-NEXT: [[SMAX22:%.*]] = call i64 @llvm.smax.i64(i64 [[N]], i64 1) ; CHECK-NEXT: [[N_VEC24:%.*]] = and i64 [[SMAX22]], 9223372036854775800 -; CHECK-NEXT: [[BROADCAST_SPLATINSERT29:%.*]] = insertelement <8 x i32> poison, i32 [[K]], i32 0 +; CHECK-NEXT: [[BROADCAST_SPLATINSERT29:%.*]] = insertelement <8 x i32> poison, i32 [[K]], i64 0 ; CHECK-NEXT: [[BROADCAST_SPLAT30:%.*]] = shufflevector <8 x i32> [[BROADCAST_SPLATINSERT29]], <8 x i32> poison, <8 x i32> zeroinitializer -; CHECK-NEXT: [[BROADCAST_SPLATINSERT31:%.*]] = insertelement <8 x i32> poison, i32 [[NTRUNC]], i32 0 +; CHECK-NEXT: [[BROADCAST_SPLATINSERT31:%.*]] = insertelement <8 x i32> poison, i32 [[NTRUNC]], i64 0 ; CHECK-NEXT: [[BROADCAST_SPLAT32:%.*]] = shufflevector <8 x i32> [[BROADCAST_SPLATINSERT31]], <8 x i32> poison, <8 x i32> zeroinitializer -; CHECK-NEXT: [[BROADCAST_SPLATINSERT34:%.*]] = insertelement <8 x i32*> poison, i32* [[A]], i32 0 +; CHECK-NEXT: [[BROADCAST_SPLATINSERT34:%.*]] = insertelement <8 x i32*> poison, i32* [[A]], i64 0 ; CHECK-NEXT: [[BROADCAST_SPLAT35:%.*]] = shufflevector <8 x i32*> [[BROADCAST_SPLATINSERT34]], <8 x i32*> poison, <8 x i32> zeroinitializer ; CHECK-NEXT: br label [[VEC_EPILOG_VECTOR_BODY:%.*]] ; CHECK: vec.epilog.vector.body: diff --git a/llvm/test/Transforms/LoopVectorize/X86/metadata-enable.ll b/llvm/test/Transforms/LoopVectorize/X86/metadata-enable.ll --- a/llvm/test/Transforms/LoopVectorize/X86/metadata-enable.ll +++ b/llvm/test/Transforms/LoopVectorize/X86/metadata-enable.ll @@ -19,7 +19,7 @@ define i32 @enabled(i32* noalias nocapture %a, i32* noalias nocapture readonly %b, i32 %N) { ; O1-LABEL: @enabled( ; O1-NEXT: entry: -; O1-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <4 x i32> poison, i32 [[N:%.*]], i32 0 +; O1-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <4 x i32> poison, i32 [[N:%.*]], i64 0 ; O1-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector <4 x i32> [[BROADCAST_SPLATINSERT]], <4 x i32> poison, <4 x i32> zeroinitializer ; O1-NEXT: [[TMP0:%.*]] = bitcast i32* [[B:%.*]] to <4 x i32>* ; O1-NEXT: [[WIDE_LOAD:%.*]] = load <4 x i32>, <4 x i32>* [[TMP0]], align 4 @@ -136,7 +136,7 @@ ; ; O2-LABEL: @enabled( ; O2-NEXT: entry: -; O2-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <4 x i32> poison, i32 [[N:%.*]], i32 0 +; O2-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <4 x i32> poison, i32 [[N:%.*]], i64 0 ; O2-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector <4 x i32> [[BROADCAST_SPLATINSERT]], <4 x i32> poison, <4 x i32> zeroinitializer ; O2-NEXT: [[TMP0:%.*]] = bitcast i32* [[B:%.*]] to <4 x i32>* ; O2-NEXT: [[WIDE_LOAD:%.*]] = load <4 x i32>, <4 x i32>* [[TMP0]], align 4 @@ -253,7 +253,7 @@ ; ; O3-LABEL: @enabled( ; O3-NEXT: entry: -; O3-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <4 x i32> poison, i32 [[N:%.*]], i32 0 +; O3-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <4 x i32> poison, i32 [[N:%.*]], i64 0 ; O3-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector <4 x i32> [[BROADCAST_SPLATINSERT]], <4 x i32> poison, <4 x i32> zeroinitializer ; O3-NEXT: [[TMP0:%.*]] = bitcast i32* [[B:%.*]] to <4 x i32>* ; O3-NEXT: [[WIDE_LOAD:%.*]] = load <4 x i32>, <4 x i32>* [[TMP0]], align 4 @@ -370,7 +370,7 @@ ; ; O3DEFAULT-LABEL: @enabled( ; O3DEFAULT-NEXT: entry: -; O3DEFAULT-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <4 x i32> poison, i32 [[N:%.*]], i32 0 +; O3DEFAULT-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <4 x i32> poison, i32 [[N:%.*]], i64 0 ; O3DEFAULT-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector <4 x i32> [[BROADCAST_SPLATINSERT]], <4 x i32> poison, <4 x i32> zeroinitializer ; O3DEFAULT-NEXT: [[TMP0:%.*]] = bitcast i32* [[B:%.*]] to <4 x i32>* ; O3DEFAULT-NEXT: [[WIDE_LOAD:%.*]] = load <4 x i32>, <4 x i32>* [[TMP0]], align 4 @@ -487,7 +487,7 @@ ; ; Os-LABEL: @enabled( ; Os-NEXT: entry: -; Os-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <4 x i32> poison, i32 [[N:%.*]], i32 0 +; Os-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <4 x i32> poison, i32 [[N:%.*]], i64 0 ; Os-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector <4 x i32> [[BROADCAST_SPLATINSERT]], <4 x i32> poison, <4 x i32> zeroinitializer ; Os-NEXT: [[TMP0:%.*]] = bitcast i32* [[B:%.*]] to <4 x i32>* ; Os-NEXT: [[WIDE_LOAD:%.*]] = load <4 x i32>, <4 x i32>* [[TMP0]], align 4 @@ -604,7 +604,7 @@ ; ; Oz-LABEL: @enabled( ; Oz-NEXT: entry: -; Oz-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <4 x i32> poison, i32 [[N:%.*]], i32 0 +; Oz-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <4 x i32> poison, i32 [[N:%.*]], i64 0 ; Oz-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector <4 x i32> [[BROADCAST_SPLATINSERT]], <4 x i32> poison, <4 x i32> zeroinitializer ; Oz-NEXT: [[TMP0:%.*]] = bitcast i32* [[B:%.*]] to <4 x i32>* ; Oz-NEXT: [[WIDE_LOAD:%.*]] = load <4 x i32>, <4 x i32>* [[TMP0]], align 4 @@ -721,7 +721,7 @@ ; ; O1VEC2-LABEL: @enabled( ; O1VEC2-NEXT: entry: -; O1VEC2-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <4 x i32> poison, i32 [[N:%.*]], i32 0 +; O1VEC2-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <4 x i32> poison, i32 [[N:%.*]], i64 0 ; O1VEC2-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector <4 x i32> [[BROADCAST_SPLATINSERT]], <4 x i32> poison, <4 x i32> zeroinitializer ; O1VEC2-NEXT: [[TMP0:%.*]] = bitcast i32* [[B:%.*]] to <4 x i32>* ; O1VEC2-NEXT: [[WIDE_LOAD:%.*]] = load <4 x i32>, <4 x i32>* [[TMP0]], align 4 @@ -838,7 +838,7 @@ ; ; OzVEC2-LABEL: @enabled( ; OzVEC2-NEXT: entry: -; OzVEC2-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <4 x i32> poison, i32 [[N:%.*]], i32 0 +; OzVEC2-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <4 x i32> poison, i32 [[N:%.*]], i64 0 ; OzVEC2-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector <4 x i32> [[BROADCAST_SPLATINSERT]], <4 x i32> poison, <4 x i32> zeroinitializer ; OzVEC2-NEXT: [[TMP0:%.*]] = bitcast i32* [[B:%.*]] to <4 x i32>* ; OzVEC2-NEXT: [[WIDE_LOAD:%.*]] = load <4 x i32>, <4 x i32>* [[TMP0]], align 4 @@ -955,7 +955,7 @@ ; ; O3DIS-LABEL: @enabled( ; O3DIS-NEXT: entry: -; O3DIS-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <4 x i32> poison, i32 [[N:%.*]], i32 0 +; O3DIS-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <4 x i32> poison, i32 [[N:%.*]], i64 0 ; O3DIS-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector <4 x i32> [[BROADCAST_SPLATINSERT]], <4 x i32> poison, <4 x i32> zeroinitializer ; O3DIS-NEXT: [[TMP0:%.*]] = bitcast i32* [[B:%.*]] to <4 x i32>* ; O3DIS-NEXT: [[WIDE_LOAD:%.*]] = load <4 x i32>, <4 x i32>* [[TMP0]], align 4 @@ -1109,7 +1109,7 @@ ; ; O2-LABEL: @nopragma( ; O2-NEXT: entry: -; O2-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <4 x i32> poison, i32 [[N:%.*]], i32 0 +; O2-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <4 x i32> poison, i32 [[N:%.*]], i64 0 ; O2-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector <4 x i32> [[BROADCAST_SPLATINSERT]], <4 x i32> poison, <4 x i32> zeroinitializer ; O2-NEXT: [[TMP0:%.*]] = bitcast i32* [[B:%.*]] to <4 x i32>* ; O2-NEXT: [[WIDE_LOAD:%.*]] = load <4 x i32>, <4 x i32>* [[TMP0]], align 4 @@ -1226,7 +1226,7 @@ ; ; O3-LABEL: @nopragma( ; O3-NEXT: entry: -; O3-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <4 x i32> poison, i32 [[N:%.*]], i32 0 +; O3-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <4 x i32> poison, i32 [[N:%.*]], i64 0 ; O3-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector <4 x i32> [[BROADCAST_SPLATINSERT]], <4 x i32> poison, <4 x i32> zeroinitializer ; O3-NEXT: [[TMP0:%.*]] = bitcast i32* [[B:%.*]] to <4 x i32>* ; O3-NEXT: [[WIDE_LOAD:%.*]] = load <4 x i32>, <4 x i32>* [[TMP0]], align 4 @@ -1343,7 +1343,7 @@ ; ; O3DEFAULT-LABEL: @nopragma( ; O3DEFAULT-NEXT: entry: -; O3DEFAULT-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <4 x i32> poison, i32 [[N:%.*]], i32 0 +; O3DEFAULT-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <4 x i32> poison, i32 [[N:%.*]], i64 0 ; O3DEFAULT-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector <4 x i32> [[BROADCAST_SPLATINSERT]], <4 x i32> poison, <4 x i32> zeroinitializer ; O3DEFAULT-NEXT: [[TMP0:%.*]] = bitcast i32* [[B:%.*]] to <4 x i32>* ; O3DEFAULT-NEXT: [[WIDE_LOAD:%.*]] = load <4 x i32>, <4 x i32>* [[TMP0]], align 4 @@ -1460,7 +1460,7 @@ ; ; Os-LABEL: @nopragma( ; Os-NEXT: entry: -; Os-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <4 x i32> poison, i32 [[N:%.*]], i32 0 +; Os-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <4 x i32> poison, i32 [[N:%.*]], i64 0 ; Os-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector <4 x i32> [[BROADCAST_SPLATINSERT]], <4 x i32> poison, <4 x i32> zeroinitializer ; Os-NEXT: [[TMP0:%.*]] = bitcast i32* [[B:%.*]] to <4 x i32>* ; Os-NEXT: [[WIDE_LOAD:%.*]] = load <4 x i32>, <4 x i32>* [[TMP0]], align 4 @@ -1768,90 +1768,90 @@ ; O3DEFAULT-NEXT: entry: ; O3DEFAULT-NEXT: [[TMP0:%.*]] = bitcast i32* [[B:%.*]] to <4 x i32>* ; O3DEFAULT-NEXT: [[TMP1:%.*]] = load <4 x i32>, <4 x i32>* [[TMP0]], align 4 -; O3DEFAULT-NEXT: [[TMP2:%.*]] = insertelement <4 x i32> poison, i32 [[N:%.*]], i32 0 -; O3DEFAULT-NEXT: [[TMP3:%.*]] = shufflevector <4 x i32> [[TMP2]], <4 x i32> poison, <4 x i32> zeroinitializer -; O3DEFAULT-NEXT: [[TMP4:%.*]] = add nsw <4 x i32> [[TMP1]], [[TMP3]] -; O3DEFAULT-NEXT: [[TMP5:%.*]] = bitcast i32* [[A:%.*]] to <4 x i32>* -; O3DEFAULT-NEXT: store <4 x i32> [[TMP4]], <4 x i32>* [[TMP5]], align 4 +; O3DEFAULT-NEXT: [[TMP2:%.*]] = insertelement <4 x i32> poison, i32 [[N:%.*]], i64 0 +; O3DEFAULT-NEXT: [[SHUFFLE:%.*]] = shufflevector <4 x i32> [[TMP2]], <4 x i32> poison, <4 x i32> zeroinitializer +; O3DEFAULT-NEXT: [[TMP3:%.*]] = add nsw <4 x i32> [[TMP1]], [[SHUFFLE]] +; O3DEFAULT-NEXT: [[TMP4:%.*]] = bitcast i32* [[A:%.*]] to <4 x i32>* +; O3DEFAULT-NEXT: store <4 x i32> [[TMP3]], <4 x i32>* [[TMP4]], align 4 ; O3DEFAULT-NEXT: [[ARRAYIDX_4:%.*]] = getelementptr inbounds i32, i32* [[B]], i64 4 ; O3DEFAULT-NEXT: [[ARRAYIDX2_4:%.*]] = getelementptr inbounds i32, i32* [[A]], i64 4 -; O3DEFAULT-NEXT: [[TMP6:%.*]] = bitcast i32* [[ARRAYIDX_4]] to <4 x i32>* -; O3DEFAULT-NEXT: [[TMP7:%.*]] = load <4 x i32>, <4 x i32>* [[TMP6]], align 4 -; O3DEFAULT-NEXT: [[TMP8:%.*]] = add nsw <4 x i32> [[TMP7]], [[TMP3]] -; O3DEFAULT-NEXT: [[TMP9:%.*]] = bitcast i32* [[ARRAYIDX2_4]] to <4 x i32>* -; O3DEFAULT-NEXT: store <4 x i32> [[TMP8]], <4 x i32>* [[TMP9]], align 4 +; O3DEFAULT-NEXT: [[TMP5:%.*]] = bitcast i32* [[ARRAYIDX_4]] to <4 x i32>* +; O3DEFAULT-NEXT: [[TMP6:%.*]] = load <4 x i32>, <4 x i32>* [[TMP5]], align 4 +; O3DEFAULT-NEXT: [[TMP7:%.*]] = add nsw <4 x i32> [[TMP6]], [[SHUFFLE]] +; O3DEFAULT-NEXT: [[TMP8:%.*]] = bitcast i32* [[ARRAYIDX2_4]] to <4 x i32>* +; O3DEFAULT-NEXT: store <4 x i32> [[TMP7]], <4 x i32>* [[TMP8]], align 4 ; O3DEFAULT-NEXT: [[ARRAYIDX_8:%.*]] = getelementptr inbounds i32, i32* [[B]], i64 8 ; O3DEFAULT-NEXT: [[ARRAYIDX2_8:%.*]] = getelementptr inbounds i32, i32* [[A]], i64 8 -; O3DEFAULT-NEXT: [[TMP10:%.*]] = bitcast i32* [[ARRAYIDX_8]] to <4 x i32>* -; O3DEFAULT-NEXT: [[TMP11:%.*]] = load <4 x i32>, <4 x i32>* [[TMP10]], align 4 -; O3DEFAULT-NEXT: [[TMP12:%.*]] = add nsw <4 x i32> [[TMP11]], [[TMP3]] -; O3DEFAULT-NEXT: [[TMP13:%.*]] = bitcast i32* [[ARRAYIDX2_8]] to <4 x i32>* -; O3DEFAULT-NEXT: store <4 x i32> [[TMP12]], <4 x i32>* [[TMP13]], align 4 +; O3DEFAULT-NEXT: [[TMP9:%.*]] = bitcast i32* [[ARRAYIDX_8]] to <4 x i32>* +; O3DEFAULT-NEXT: [[TMP10:%.*]] = load <4 x i32>, <4 x i32>* [[TMP9]], align 4 +; O3DEFAULT-NEXT: [[TMP11:%.*]] = add nsw <4 x i32> [[TMP10]], [[SHUFFLE]] +; O3DEFAULT-NEXT: [[TMP12:%.*]] = bitcast i32* [[ARRAYIDX2_8]] to <4 x i32>* +; O3DEFAULT-NEXT: store <4 x i32> [[TMP11]], <4 x i32>* [[TMP12]], align 4 ; O3DEFAULT-NEXT: [[ARRAYIDX_12:%.*]] = getelementptr inbounds i32, i32* [[B]], i64 12 ; O3DEFAULT-NEXT: [[ARRAYIDX2_12:%.*]] = getelementptr inbounds i32, i32* [[A]], i64 12 -; O3DEFAULT-NEXT: [[TMP14:%.*]] = bitcast i32* [[ARRAYIDX_12]] to <4 x i32>* -; O3DEFAULT-NEXT: [[TMP15:%.*]] = load <4 x i32>, <4 x i32>* [[TMP14]], align 4 -; O3DEFAULT-NEXT: [[TMP16:%.*]] = add nsw <4 x i32> [[TMP15]], [[TMP3]] -; O3DEFAULT-NEXT: [[TMP17:%.*]] = bitcast i32* [[ARRAYIDX2_12]] to <4 x i32>* -; O3DEFAULT-NEXT: store <4 x i32> [[TMP16]], <4 x i32>* [[TMP17]], align 4 +; O3DEFAULT-NEXT: [[TMP13:%.*]] = bitcast i32* [[ARRAYIDX_12]] to <4 x i32>* +; O3DEFAULT-NEXT: [[TMP14:%.*]] = load <4 x i32>, <4 x i32>* [[TMP13]], align 4 +; O3DEFAULT-NEXT: [[TMP15:%.*]] = add nsw <4 x i32> [[TMP14]], [[SHUFFLE]] +; O3DEFAULT-NEXT: [[TMP16:%.*]] = bitcast i32* [[ARRAYIDX2_12]] to <4 x i32>* +; O3DEFAULT-NEXT: store <4 x i32> [[TMP15]], <4 x i32>* [[TMP16]], align 4 ; O3DEFAULT-NEXT: [[ARRAYIDX_16:%.*]] = getelementptr inbounds i32, i32* [[B]], i64 16 ; O3DEFAULT-NEXT: [[ARRAYIDX2_16:%.*]] = getelementptr inbounds i32, i32* [[A]], i64 16 -; O3DEFAULT-NEXT: [[TMP18:%.*]] = bitcast i32* [[ARRAYIDX_16]] to <4 x i32>* -; O3DEFAULT-NEXT: [[TMP19:%.*]] = load <4 x i32>, <4 x i32>* [[TMP18]], align 4 -; O3DEFAULT-NEXT: [[TMP20:%.*]] = add nsw <4 x i32> [[TMP19]], [[TMP3]] -; O3DEFAULT-NEXT: [[TMP21:%.*]] = bitcast i32* [[ARRAYIDX2_16]] to <4 x i32>* -; O3DEFAULT-NEXT: store <4 x i32> [[TMP20]], <4 x i32>* [[TMP21]], align 4 +; O3DEFAULT-NEXT: [[TMP17:%.*]] = bitcast i32* [[ARRAYIDX_16]] to <4 x i32>* +; O3DEFAULT-NEXT: [[TMP18:%.*]] = load <4 x i32>, <4 x i32>* [[TMP17]], align 4 +; O3DEFAULT-NEXT: [[TMP19:%.*]] = add nsw <4 x i32> [[TMP18]], [[SHUFFLE]] +; O3DEFAULT-NEXT: [[TMP20:%.*]] = bitcast i32* [[ARRAYIDX2_16]] to <4 x i32>* +; O3DEFAULT-NEXT: store <4 x i32> [[TMP19]], <4 x i32>* [[TMP20]], align 4 ; O3DEFAULT-NEXT: [[ARRAYIDX_20:%.*]] = getelementptr inbounds i32, i32* [[B]], i64 20 ; O3DEFAULT-NEXT: [[ARRAYIDX2_20:%.*]] = getelementptr inbounds i32, i32* [[A]], i64 20 -; O3DEFAULT-NEXT: [[TMP22:%.*]] = bitcast i32* [[ARRAYIDX_20]] to <4 x i32>* -; O3DEFAULT-NEXT: [[TMP23:%.*]] = load <4 x i32>, <4 x i32>* [[TMP22]], align 4 -; O3DEFAULT-NEXT: [[TMP24:%.*]] = add nsw <4 x i32> [[TMP23]], [[TMP3]] -; O3DEFAULT-NEXT: [[TMP25:%.*]] = bitcast i32* [[ARRAYIDX2_20]] to <4 x i32>* -; O3DEFAULT-NEXT: store <4 x i32> [[TMP24]], <4 x i32>* [[TMP25]], align 4 +; O3DEFAULT-NEXT: [[TMP21:%.*]] = bitcast i32* [[ARRAYIDX_20]] to <4 x i32>* +; O3DEFAULT-NEXT: [[TMP22:%.*]] = load <4 x i32>, <4 x i32>* [[TMP21]], align 4 +; O3DEFAULT-NEXT: [[TMP23:%.*]] = add nsw <4 x i32> [[TMP22]], [[SHUFFLE]] +; O3DEFAULT-NEXT: [[TMP24:%.*]] = bitcast i32* [[ARRAYIDX2_20]] to <4 x i32>* +; O3DEFAULT-NEXT: store <4 x i32> [[TMP23]], <4 x i32>* [[TMP24]], align 4 ; O3DEFAULT-NEXT: [[ARRAYIDX_24:%.*]] = getelementptr inbounds i32, i32* [[B]], i64 24 ; O3DEFAULT-NEXT: [[ARRAYIDX2_24:%.*]] = getelementptr inbounds i32, i32* [[A]], i64 24 -; O3DEFAULT-NEXT: [[TMP26:%.*]] = bitcast i32* [[ARRAYIDX_24]] to <4 x i32>* -; O3DEFAULT-NEXT: [[TMP27:%.*]] = load <4 x i32>, <4 x i32>* [[TMP26]], align 4 -; O3DEFAULT-NEXT: [[TMP28:%.*]] = add nsw <4 x i32> [[TMP27]], [[TMP3]] -; O3DEFAULT-NEXT: [[TMP29:%.*]] = bitcast i32* [[ARRAYIDX2_24]] to <4 x i32>* -; O3DEFAULT-NEXT: store <4 x i32> [[TMP28]], <4 x i32>* [[TMP29]], align 4 +; O3DEFAULT-NEXT: [[TMP25:%.*]] = bitcast i32* [[ARRAYIDX_24]] to <4 x i32>* +; O3DEFAULT-NEXT: [[TMP26:%.*]] = load <4 x i32>, <4 x i32>* [[TMP25]], align 4 +; O3DEFAULT-NEXT: [[TMP27:%.*]] = add nsw <4 x i32> [[TMP26]], [[SHUFFLE]] +; O3DEFAULT-NEXT: [[TMP28:%.*]] = bitcast i32* [[ARRAYIDX2_24]] to <4 x i32>* +; O3DEFAULT-NEXT: store <4 x i32> [[TMP27]], <4 x i32>* [[TMP28]], align 4 ; O3DEFAULT-NEXT: [[ARRAYIDX_28:%.*]] = getelementptr inbounds i32, i32* [[B]], i64 28 ; O3DEFAULT-NEXT: [[ARRAYIDX2_28:%.*]] = getelementptr inbounds i32, i32* [[A]], i64 28 -; O3DEFAULT-NEXT: [[TMP30:%.*]] = bitcast i32* [[ARRAYIDX_28]] to <4 x i32>* -; O3DEFAULT-NEXT: [[TMP31:%.*]] = load <4 x i32>, <4 x i32>* [[TMP30]], align 4 -; O3DEFAULT-NEXT: [[TMP32:%.*]] = add nsw <4 x i32> [[TMP31]], [[TMP3]] -; O3DEFAULT-NEXT: [[TMP33:%.*]] = bitcast i32* [[ARRAYIDX2_28]] to <4 x i32>* -; O3DEFAULT-NEXT: store <4 x i32> [[TMP32]], <4 x i32>* [[TMP33]], align 4 +; O3DEFAULT-NEXT: [[TMP29:%.*]] = bitcast i32* [[ARRAYIDX_28]] to <4 x i32>* +; O3DEFAULT-NEXT: [[TMP30:%.*]] = load <4 x i32>, <4 x i32>* [[TMP29]], align 4 +; O3DEFAULT-NEXT: [[TMP31:%.*]] = add nsw <4 x i32> [[TMP30]], [[SHUFFLE]] +; O3DEFAULT-NEXT: [[TMP32:%.*]] = bitcast i32* [[ARRAYIDX2_28]] to <4 x i32>* +; O3DEFAULT-NEXT: store <4 x i32> [[TMP31]], <4 x i32>* [[TMP32]], align 4 ; O3DEFAULT-NEXT: [[ARRAYIDX_32:%.*]] = getelementptr inbounds i32, i32* [[B]], i64 32 ; O3DEFAULT-NEXT: [[ARRAYIDX2_32:%.*]] = getelementptr inbounds i32, i32* [[A]], i64 32 -; O3DEFAULT-NEXT: [[TMP34:%.*]] = bitcast i32* [[ARRAYIDX_32]] to <4 x i32>* -; O3DEFAULT-NEXT: [[TMP35:%.*]] = load <4 x i32>, <4 x i32>* [[TMP34]], align 4 -; O3DEFAULT-NEXT: [[TMP36:%.*]] = add nsw <4 x i32> [[TMP35]], [[TMP3]] -; O3DEFAULT-NEXT: [[TMP37:%.*]] = bitcast i32* [[ARRAYIDX2_32]] to <4 x i32>* -; O3DEFAULT-NEXT: store <4 x i32> [[TMP36]], <4 x i32>* [[TMP37]], align 4 +; O3DEFAULT-NEXT: [[TMP33:%.*]] = bitcast i32* [[ARRAYIDX_32]] to <4 x i32>* +; O3DEFAULT-NEXT: [[TMP34:%.*]] = load <4 x i32>, <4 x i32>* [[TMP33]], align 4 +; O3DEFAULT-NEXT: [[TMP35:%.*]] = add nsw <4 x i32> [[TMP34]], [[SHUFFLE]] +; O3DEFAULT-NEXT: [[TMP36:%.*]] = bitcast i32* [[ARRAYIDX2_32]] to <4 x i32>* +; O3DEFAULT-NEXT: store <4 x i32> [[TMP35]], <4 x i32>* [[TMP36]], align 4 ; O3DEFAULT-NEXT: [[ARRAYIDX_36:%.*]] = getelementptr inbounds i32, i32* [[B]], i64 36 ; O3DEFAULT-NEXT: [[ARRAYIDX2_36:%.*]] = getelementptr inbounds i32, i32* [[A]], i64 36 -; O3DEFAULT-NEXT: [[TMP38:%.*]] = bitcast i32* [[ARRAYIDX_36]] to <4 x i32>* -; O3DEFAULT-NEXT: [[TMP39:%.*]] = load <4 x i32>, <4 x i32>* [[TMP38]], align 4 -; O3DEFAULT-NEXT: [[TMP40:%.*]] = add nsw <4 x i32> [[TMP39]], [[TMP3]] -; O3DEFAULT-NEXT: [[TMP41:%.*]] = bitcast i32* [[ARRAYIDX2_36]] to <4 x i32>* -; O3DEFAULT-NEXT: store <4 x i32> [[TMP40]], <4 x i32>* [[TMP41]], align 4 +; O3DEFAULT-NEXT: [[TMP37:%.*]] = bitcast i32* [[ARRAYIDX_36]] to <4 x i32>* +; O3DEFAULT-NEXT: [[TMP38:%.*]] = load <4 x i32>, <4 x i32>* [[TMP37]], align 4 +; O3DEFAULT-NEXT: [[TMP39:%.*]] = add nsw <4 x i32> [[TMP38]], [[SHUFFLE]] +; O3DEFAULT-NEXT: [[TMP40:%.*]] = bitcast i32* [[ARRAYIDX2_36]] to <4 x i32>* +; O3DEFAULT-NEXT: store <4 x i32> [[TMP39]], <4 x i32>* [[TMP40]], align 4 ; O3DEFAULT-NEXT: [[ARRAYIDX_40:%.*]] = getelementptr inbounds i32, i32* [[B]], i64 40 ; O3DEFAULT-NEXT: [[ARRAYIDX2_40:%.*]] = getelementptr inbounds i32, i32* [[A]], i64 40 -; O3DEFAULT-NEXT: [[TMP42:%.*]] = bitcast i32* [[ARRAYIDX_40]] to <4 x i32>* -; O3DEFAULT-NEXT: [[TMP43:%.*]] = load <4 x i32>, <4 x i32>* [[TMP42]], align 4 -; O3DEFAULT-NEXT: [[TMP44:%.*]] = add nsw <4 x i32> [[TMP43]], [[TMP3]] -; O3DEFAULT-NEXT: [[TMP45:%.*]] = bitcast i32* [[ARRAYIDX2_40]] to <4 x i32>* -; O3DEFAULT-NEXT: store <4 x i32> [[TMP44]], <4 x i32>* [[TMP45]], align 4 +; O3DEFAULT-NEXT: [[TMP41:%.*]] = bitcast i32* [[ARRAYIDX_40]] to <4 x i32>* +; O3DEFAULT-NEXT: [[TMP42:%.*]] = load <4 x i32>, <4 x i32>* [[TMP41]], align 4 +; O3DEFAULT-NEXT: [[TMP43:%.*]] = add nsw <4 x i32> [[TMP42]], [[SHUFFLE]] +; O3DEFAULT-NEXT: [[TMP44:%.*]] = bitcast i32* [[ARRAYIDX2_40]] to <4 x i32>* +; O3DEFAULT-NEXT: store <4 x i32> [[TMP43]], <4 x i32>* [[TMP44]], align 4 ; O3DEFAULT-NEXT: [[ARRAYIDX_44:%.*]] = getelementptr inbounds i32, i32* [[B]], i64 44 ; O3DEFAULT-NEXT: [[ARRAYIDX2_44:%.*]] = getelementptr inbounds i32, i32* [[A]], i64 44 -; O3DEFAULT-NEXT: [[TMP46:%.*]] = bitcast i32* [[ARRAYIDX_44]] to <4 x i32>* -; O3DEFAULT-NEXT: [[TMP47:%.*]] = load <4 x i32>, <4 x i32>* [[TMP46]], align 4 -; O3DEFAULT-NEXT: [[TMP48:%.*]] = add nsw <4 x i32> [[TMP47]], [[TMP3]] -; O3DEFAULT-NEXT: [[TMP49:%.*]] = bitcast i32* [[ARRAYIDX2_44]] to <4 x i32>* -; O3DEFAULT-NEXT: store <4 x i32> [[TMP48]], <4 x i32>* [[TMP49]], align 4 -; O3DEFAULT-NEXT: [[TMP50:%.*]] = load i32, i32* [[A]], align 4 -; O3DEFAULT-NEXT: ret i32 [[TMP50]] +; O3DEFAULT-NEXT: [[TMP45:%.*]] = bitcast i32* [[ARRAYIDX_44]] to <4 x i32>* +; O3DEFAULT-NEXT: [[TMP46:%.*]] = load <4 x i32>, <4 x i32>* [[TMP45]], align 4 +; O3DEFAULT-NEXT: [[TMP47:%.*]] = add nsw <4 x i32> [[TMP46]], [[SHUFFLE]] +; O3DEFAULT-NEXT: [[TMP48:%.*]] = bitcast i32* [[ARRAYIDX2_44]] to <4 x i32>* +; O3DEFAULT-NEXT: store <4 x i32> [[TMP47]], <4 x i32>* [[TMP48]], align 4 +; O3DEFAULT-NEXT: [[TMP49:%.*]] = load i32, i32* [[A]], align 4 +; O3DEFAULT-NEXT: ret i32 [[TMP49]] ; ; Os-LABEL: @disabled( ; Os-NEXT: entry: diff --git a/llvm/test/Transforms/LoopVectorize/X86/parallel-loops.ll b/llvm/test/Transforms/LoopVectorize/X86/parallel-loops.ll --- a/llvm/test/Transforms/LoopVectorize/X86/parallel-loops.ll +++ b/llvm/test/Transforms/LoopVectorize/X86/parallel-loops.ll @@ -93,13 +93,13 @@ ; CHECK-NEXT: [[TMP18:%.*]] = getelementptr inbounds i32, i32* [[A]], i64 [[TMP14]] ; CHECK-NEXT: [[TMP19:%.*]] = getelementptr inbounds i32, i32* [[A]], i64 [[TMP15]] ; CHECK-NEXT: [[TMP20:%.*]] = getelementptr inbounds i32, i32* [[A]], i64 [[TMP16]] -; CHECK-NEXT: [[TMP21:%.*]] = extractelement <4 x i32> [[WIDE_LOAD]], i32 0 +; CHECK-NEXT: [[TMP21:%.*]] = extractelement <4 x i32> [[WIDE_LOAD]], i64 0 ; CHECK-NEXT: store i32 [[TMP21]], i32* [[TMP17]], align 4, !llvm.access.group !1 -; CHECK-NEXT: [[TMP22:%.*]] = extractelement <4 x i32> [[WIDE_LOAD]], i32 1 +; CHECK-NEXT: [[TMP22:%.*]] = extractelement <4 x i32> [[WIDE_LOAD]], i64 1 ; CHECK-NEXT: store i32 [[TMP22]], i32* [[TMP18]], align 4, !llvm.access.group !1 -; CHECK-NEXT: [[TMP23:%.*]] = extractelement <4 x i32> [[WIDE_LOAD]], i32 2 +; CHECK-NEXT: [[TMP23:%.*]] = extractelement <4 x i32> [[WIDE_LOAD]], i64 2 ; CHECK-NEXT: store i32 [[TMP23]], i32* [[TMP19]], align 4, !llvm.access.group !1 -; CHECK-NEXT: [[TMP24:%.*]] = extractelement <4 x i32> [[WIDE_LOAD]], i32 3 +; CHECK-NEXT: [[TMP24:%.*]] = extractelement <4 x i32> [[WIDE_LOAD]], i64 3 ; CHECK-NEXT: store i32 [[TMP24]], i32* [[TMP20]], align 4, !llvm.access.group !1 ; CHECK-NEXT: [[TMP25:%.*]] = or i64 [[INDEX]], 1 ; CHECK-NEXT: [[TMP26:%.*]] = getelementptr inbounds i32, i32* [[B]], i64 [[TMP25]] diff --git a/llvm/test/Transforms/LoopVectorize/X86/small-size.ll b/llvm/test/Transforms/LoopVectorize/X86/small-size.ll --- a/llvm/test/Transforms/LoopVectorize/X86/small-size.ll +++ b/llvm/test/Transforms/LoopVectorize/X86/small-size.ll @@ -82,21 +82,21 @@ ; CHECK: vector.ph: ; CHECK-NEXT: [[N_RND_UP:%.*]] = add nuw nsw i64 [[TMP3]], 4 ; CHECK-NEXT: [[N_VEC:%.*]] = and i64 [[N_RND_UP]], 8589934588 -; CHECK-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <4 x i64> poison, i64 [[TMP3]], i32 0 +; CHECK-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <4 x i64> poison, i64 [[TMP3]], i64 0 ; CHECK-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector <4 x i64> [[BROADCAST_SPLATINSERT]], <4 x i64> poison, <4 x i32> zeroinitializer ; CHECK-NEXT: br label [[VECTOR_BODY:%.*]] ; CHECK: vector.body: ; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[PRED_STORE_CONTINUE6:%.*]] ] ; CHECK-NEXT: [[VEC_IND:%.*]] = phi <4 x i64> [ , [[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], [[PRED_STORE_CONTINUE6]] ] ; CHECK-NEXT: [[TMP4:%.*]] = icmp ule <4 x i64> [[VEC_IND]], [[BROADCAST_SPLAT]] -; CHECK-NEXT: [[TMP5:%.*]] = extractelement <4 x i1> [[TMP4]], i32 0 +; CHECK-NEXT: [[TMP5:%.*]] = extractelement <4 x i1> [[TMP4]], i64 0 ; CHECK-NEXT: br i1 [[TMP5]], label [[PRED_STORE_IF:%.*]], label [[PRED_STORE_CONTINUE:%.*]] ; CHECK: pred.store.if: ; CHECK-NEXT: [[TMP6:%.*]] = getelementptr inbounds [2048 x i32], [2048 x i32]* @b, i64 0, i64 [[INDEX]] ; CHECK-NEXT: store i32 [[X:%.*]], i32* [[TMP6]], align 16 ; CHECK-NEXT: br label [[PRED_STORE_CONTINUE]] ; CHECK: pred.store.continue: -; CHECK-NEXT: [[TMP7:%.*]] = extractelement <4 x i1> [[TMP4]], i32 1 +; CHECK-NEXT: [[TMP7:%.*]] = extractelement <4 x i1> [[TMP4]], i64 1 ; CHECK-NEXT: br i1 [[TMP7]], label [[PRED_STORE_IF1:%.*]], label [[PRED_STORE_CONTINUE2:%.*]] ; CHECK: pred.store.if1: ; CHECK-NEXT: [[TMP8:%.*]] = or i64 [[INDEX]], 1 @@ -104,7 +104,7 @@ ; CHECK-NEXT: store i32 [[X]], i32* [[TMP9]], align 4 ; CHECK-NEXT: br label [[PRED_STORE_CONTINUE2]] ; CHECK: pred.store.continue2: -; CHECK-NEXT: [[TMP10:%.*]] = extractelement <4 x i1> [[TMP4]], i32 2 +; CHECK-NEXT: [[TMP10:%.*]] = extractelement <4 x i1> [[TMP4]], i64 2 ; CHECK-NEXT: br i1 [[TMP10]], label [[PRED_STORE_IF3:%.*]], label [[PRED_STORE_CONTINUE4:%.*]] ; CHECK: pred.store.if3: ; CHECK-NEXT: [[TMP11:%.*]] = or i64 [[INDEX]], 2 @@ -112,7 +112,7 @@ ; CHECK-NEXT: store i32 [[X]], i32* [[TMP12]], align 8 ; CHECK-NEXT: br label [[PRED_STORE_CONTINUE4]] ; CHECK: pred.store.continue4: -; CHECK-NEXT: [[TMP13:%.*]] = extractelement <4 x i1> [[TMP4]], i32 3 +; CHECK-NEXT: [[TMP13:%.*]] = extractelement <4 x i1> [[TMP4]], i64 3 ; CHECK-NEXT: br i1 [[TMP13]], label [[PRED_STORE_IF5:%.*]], label [[PRED_STORE_CONTINUE6]] ; CHECK: pred.store.if5: ; CHECK-NEXT: [[TMP14:%.*]] = or i64 [[INDEX]], 3 @@ -142,17 +142,17 @@ ; CHECK: vector.ph10: ; CHECK-NEXT: [[N_RND_UP11:%.*]] = add nuw nsw i64 [[TMP19]], 4 ; CHECK-NEXT: [[N_VEC13:%.*]] = and i64 [[N_RND_UP11]], 8589934588 -; CHECK-NEXT: [[BROADCAST_SPLATINSERT20:%.*]] = insertelement <4 x i64> poison, i64 [[TMP19]], i32 0 +; CHECK-NEXT: [[BROADCAST_SPLATINSERT20:%.*]] = insertelement <4 x i64> poison, i64 [[TMP19]], i64 0 ; CHECK-NEXT: [[BROADCAST_SPLAT21:%.*]] = shufflevector <4 x i64> [[BROADCAST_SPLATINSERT20]], <4 x i64> poison, <4 x i32> zeroinitializer ; CHECK-NEXT: br label [[VECTOR_BODY9:%.*]] ; CHECK: vector.body9: ; CHECK-NEXT: [[INDEX14:%.*]] = phi i64 [ 0, [[VECTOR_PH10]] ], [ [[INDEX_NEXT15:%.*]], [[PRED_STORE_CONTINUE37:%.*]] ] ; CHECK-NEXT: [[OFFSET_IDX:%.*]] = add i64 [[I_0_LCSSA]], [[INDEX14]] -; CHECK-NEXT: [[BROADCAST_SPLATINSERT28:%.*]] = insertelement <4 x i64> poison, i64 [[INDEX14]], i32 0 +; CHECK-NEXT: [[BROADCAST_SPLATINSERT28:%.*]] = insertelement <4 x i64> poison, i64 [[INDEX14]], i64 0 ; CHECK-NEXT: [[BROADCAST_SPLAT29:%.*]] = shufflevector <4 x i64> [[BROADCAST_SPLATINSERT28]], <4 x i64> poison, <4 x i32> zeroinitializer ; CHECK-NEXT: [[VEC_IV:%.*]] = or <4 x i64> [[BROADCAST_SPLAT29]], ; CHECK-NEXT: [[TMP20:%.*]] = icmp ule <4 x i64> [[VEC_IV]], [[BROADCAST_SPLAT21]] -; CHECK-NEXT: [[TMP21:%.*]] = extractelement <4 x i1> [[TMP20]], i32 0 +; CHECK-NEXT: [[TMP21:%.*]] = extractelement <4 x i1> [[TMP20]], i64 0 ; CHECK-NEXT: br i1 [[TMP21]], label [[PRED_STORE_IF30:%.*]], label [[PRED_STORE_CONTINUE31:%.*]] ; CHECK: pred.store.if30: ; CHECK-NEXT: [[TMP22:%.*]] = getelementptr inbounds [2048 x i32], [2048 x i32]* @b, i64 0, i64 [[OFFSET_IDX]] @@ -164,7 +164,7 @@ ; CHECK-NEXT: store i32 [[TMP26]], i32* [[TMP27]], align 4 ; CHECK-NEXT: br label [[PRED_STORE_CONTINUE31]] ; CHECK: pred.store.continue31: -; CHECK-NEXT: [[TMP28:%.*]] = extractelement <4 x i1> [[TMP20]], i32 1 +; CHECK-NEXT: [[TMP28:%.*]] = extractelement <4 x i1> [[TMP20]], i64 1 ; CHECK-NEXT: br i1 [[TMP28]], label [[PRED_STORE_IF32:%.*]], label [[PRED_STORE_CONTINUE33:%.*]] ; CHECK: pred.store.if32: ; CHECK-NEXT: [[TMP29:%.*]] = add i64 [[OFFSET_IDX]], 1 @@ -177,7 +177,7 @@ ; CHECK-NEXT: store i32 [[TMP34]], i32* [[TMP35]], align 4 ; CHECK-NEXT: br label [[PRED_STORE_CONTINUE33]] ; CHECK: pred.store.continue33: -; CHECK-NEXT: [[TMP36:%.*]] = extractelement <4 x i1> [[TMP20]], i32 2 +; CHECK-NEXT: [[TMP36:%.*]] = extractelement <4 x i1> [[TMP20]], i64 2 ; CHECK-NEXT: br i1 [[TMP36]], label [[PRED_STORE_IF34:%.*]], label [[PRED_STORE_CONTINUE35:%.*]] ; CHECK: pred.store.if34: ; CHECK-NEXT: [[TMP37:%.*]] = add i64 [[OFFSET_IDX]], 2 @@ -190,7 +190,7 @@ ; CHECK-NEXT: store i32 [[TMP42]], i32* [[TMP43]], align 4 ; CHECK-NEXT: br label [[PRED_STORE_CONTINUE35]] ; CHECK: pred.store.continue35: -; CHECK-NEXT: [[TMP44:%.*]] = extractelement <4 x i1> [[TMP20]], i32 3 +; CHECK-NEXT: [[TMP44:%.*]] = extractelement <4 x i1> [[TMP20]], i64 3 ; CHECK-NEXT: br i1 [[TMP44]], label [[PRED_STORE_IF36:%.*]], label [[PRED_STORE_CONTINUE37]] ; CHECK: pred.store.if36: ; CHECK-NEXT: [[TMP45:%.*]] = add i64 [[OFFSET_IDX]], 3 @@ -272,16 +272,16 @@ ; CHECK: vector.ph: ; CHECK-NEXT: [[N_RND_UP:%.*]] = add nuw nsw i64 [[TMP3]], 4 ; CHECK-NEXT: [[N_VEC:%.*]] = and i64 [[N_RND_UP]], 8589934588 -; CHECK-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <4 x i64> poison, i64 [[TMP3]], i32 0 +; CHECK-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <4 x i64> poison, i64 [[TMP3]], i64 0 ; CHECK-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector <4 x i64> [[BROADCAST_SPLATINSERT]], <4 x i64> poison, <4 x i32> zeroinitializer ; CHECK-NEXT: br label [[VECTOR_BODY:%.*]] ; CHECK: vector.body: ; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[PRED_STORE_CONTINUE21:%.*]] ] -; CHECK-NEXT: [[BROADCAST_SPLATINSERT14:%.*]] = insertelement <4 x i64> poison, i64 [[INDEX]], i32 0 +; CHECK-NEXT: [[BROADCAST_SPLATINSERT14:%.*]] = insertelement <4 x i64> poison, i64 [[INDEX]], i64 0 ; CHECK-NEXT: [[BROADCAST_SPLAT15:%.*]] = shufflevector <4 x i64> [[BROADCAST_SPLATINSERT14]], <4 x i64> poison, <4 x i32> zeroinitializer ; CHECK-NEXT: [[VEC_IV:%.*]] = or <4 x i64> [[BROADCAST_SPLAT15]], ; CHECK-NEXT: [[TMP4:%.*]] = icmp ule <4 x i64> [[VEC_IV]], [[BROADCAST_SPLAT]] -; CHECK-NEXT: [[TMP5:%.*]] = extractelement <4 x i1> [[TMP4]], i32 0 +; CHECK-NEXT: [[TMP5:%.*]] = extractelement <4 x i1> [[TMP4]], i64 0 ; CHECK-NEXT: br i1 [[TMP5]], label [[PRED_STORE_IF:%.*]], label [[PRED_STORE_CONTINUE:%.*]] ; CHECK: pred.store.if: ; CHECK-NEXT: [[NEXT_GEP:%.*]] = getelementptr i32, i32* [[P:%.*]], i64 [[INDEX]] @@ -290,7 +290,7 @@ ; CHECK-NEXT: store i32 [[TMP6]], i32* [[NEXT_GEP]], align 16 ; CHECK-NEXT: br label [[PRED_STORE_CONTINUE]] ; CHECK: pred.store.continue: -; CHECK-NEXT: [[TMP7:%.*]] = extractelement <4 x i1> [[TMP4]], i32 1 +; CHECK-NEXT: [[TMP7:%.*]] = extractelement <4 x i1> [[TMP4]], i64 1 ; CHECK-NEXT: br i1 [[TMP7]], label [[PRED_STORE_IF16:%.*]], label [[PRED_STORE_CONTINUE17:%.*]] ; CHECK: pred.store.if16: ; CHECK-NEXT: [[TMP8:%.*]] = or i64 [[INDEX]], 1 @@ -301,7 +301,7 @@ ; CHECK-NEXT: store i32 [[TMP10]], i32* [[NEXT_GEP7]], align 16 ; CHECK-NEXT: br label [[PRED_STORE_CONTINUE17]] ; CHECK: pred.store.continue17: -; CHECK-NEXT: [[TMP11:%.*]] = extractelement <4 x i1> [[TMP4]], i32 2 +; CHECK-NEXT: [[TMP11:%.*]] = extractelement <4 x i1> [[TMP4]], i64 2 ; CHECK-NEXT: br i1 [[TMP11]], label [[PRED_STORE_IF18:%.*]], label [[PRED_STORE_CONTINUE19:%.*]] ; CHECK: pred.store.if18: ; CHECK-NEXT: [[TMP12:%.*]] = or i64 [[INDEX]], 2 @@ -312,7 +312,7 @@ ; CHECK-NEXT: store i32 [[TMP14]], i32* [[NEXT_GEP8]], align 16 ; CHECK-NEXT: br label [[PRED_STORE_CONTINUE19]] ; CHECK: pred.store.continue19: -; CHECK-NEXT: [[TMP15:%.*]] = extractelement <4 x i1> [[TMP4]], i32 3 +; CHECK-NEXT: [[TMP15:%.*]] = extractelement <4 x i1> [[TMP4]], i64 3 ; CHECK-NEXT: br i1 [[TMP15]], label [[PRED_STORE_IF20:%.*]], label [[PRED_STORE_CONTINUE21]] ; CHECK: pred.store.if20: ; CHECK-NEXT: [[TMP16:%.*]] = or i64 [[INDEX]], 3 @@ -453,11 +453,11 @@ ; CHECK-NEXT: br label [[VECTOR_BODY:%.*]] ; CHECK: vector.body: ; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[PRED_STORE_CONTINUE16:%.*]] ] -; CHECK-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <4 x i64> poison, i64 [[INDEX]], i32 0 +; CHECK-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <4 x i64> poison, i64 [[INDEX]], i64 0 ; CHECK-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector <4 x i64> [[BROADCAST_SPLATINSERT]], <4 x i64> poison, <4 x i32> zeroinitializer ; CHECK-NEXT: [[INDUCTION:%.*]] = or <4 x i64> [[BROADCAST_SPLAT]], ; CHECK-NEXT: [[TMP1:%.*]] = icmp ult <4 x i64> [[INDUCTION]], -; CHECK-NEXT: [[TMP2:%.*]] = extractelement <4 x i1> [[TMP1]], i32 0 +; CHECK-NEXT: [[TMP2:%.*]] = extractelement <4 x i1> [[TMP1]], i64 0 ; CHECK-NEXT: br i1 [[TMP2]], label [[PRED_STORE_IF:%.*]], label [[PRED_STORE_CONTINUE:%.*]] ; CHECK: pred.store.if: ; CHECK-NEXT: [[NEXT_GEP7:%.*]] = getelementptr i32, i32* [[DST:%.*]], i64 [[INDEX]] @@ -468,7 +468,7 @@ ; CHECK-NEXT: store i32 [[TMP5]], i32* [[NEXT_GEP7]], align 4 ; CHECK-NEXT: br label [[PRED_STORE_CONTINUE]] ; CHECK: pred.store.continue: -; CHECK-NEXT: [[TMP6:%.*]] = extractelement <4 x i1> [[TMP1]], i32 1 +; CHECK-NEXT: [[TMP6:%.*]] = extractelement <4 x i1> [[TMP1]], i64 1 ; CHECK-NEXT: br i1 [[TMP6]], label [[PRED_STORE_IF11:%.*]], label [[PRED_STORE_CONTINUE12:%.*]] ; CHECK: pred.store.if11: ; CHECK-NEXT: [[TMP7:%.*]] = or i64 [[INDEX]], 1 @@ -481,7 +481,7 @@ ; CHECK-NEXT: store i32 [[TMP11]], i32* [[NEXT_GEP8]], align 4 ; CHECK-NEXT: br label [[PRED_STORE_CONTINUE12]] ; CHECK: pred.store.continue12: -; CHECK-NEXT: [[TMP12:%.*]] = extractelement <4 x i1> [[TMP1]], i32 2 +; CHECK-NEXT: [[TMP12:%.*]] = extractelement <4 x i1> [[TMP1]], i64 2 ; CHECK-NEXT: br i1 [[TMP12]], label [[PRED_STORE_IF13:%.*]], label [[PRED_STORE_CONTINUE14:%.*]] ; CHECK: pred.store.if13: ; CHECK-NEXT: [[TMP13:%.*]] = or i64 [[INDEX]], 2 @@ -494,7 +494,7 @@ ; CHECK-NEXT: store i32 [[TMP17]], i32* [[NEXT_GEP9]], align 4 ; CHECK-NEXT: br label [[PRED_STORE_CONTINUE14]] ; CHECK: pred.store.continue14: -; CHECK-NEXT: [[TMP18:%.*]] = extractelement <4 x i1> [[TMP1]], i32 3 +; CHECK-NEXT: [[TMP18:%.*]] = extractelement <4 x i1> [[TMP1]], i64 3 ; CHECK-NEXT: br i1 [[TMP18]], label [[PRED_STORE_IF15:%.*]], label [[PRED_STORE_CONTINUE16]] ; CHECK: pred.store.if15: ; CHECK-NEXT: [[TMP19:%.*]] = or i64 [[INDEX]], 3 diff --git a/llvm/test/Transforms/LoopVectorize/X86/x86-interleaved-accesses-masked-group.ll b/llvm/test/Transforms/LoopVectorize/X86/x86-interleaved-accesses-masked-group.ll --- a/llvm/test/Transforms/LoopVectorize/X86/x86-interleaved-accesses-masked-group.ll +++ b/llvm/test/Transforms/LoopVectorize/X86/x86-interleaved-accesses-masked-group.ll @@ -33,7 +33,7 @@ ; DISABLED_MASKED_STRIDED-LABEL: @masked_strided1( ; DISABLED_MASKED_STRIDED-NEXT: entry: ; DISABLED_MASKED_STRIDED-NEXT: [[CONV:%.*]] = zext i8 [[GUARD:%.*]] to i32 -; DISABLED_MASKED_STRIDED-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <8 x i32> poison, i32 [[CONV]], i32 0 +; DISABLED_MASKED_STRIDED-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <8 x i32> poison, i32 [[CONV]], i64 0 ; DISABLED_MASKED_STRIDED-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector <8 x i32> [[BROADCAST_SPLATINSERT]], <8 x i32> poison, <8 x i32> zeroinitializer ; DISABLED_MASKED_STRIDED-NEXT: br label [[VECTOR_BODY:%.*]] ; DISABLED_MASKED_STRIDED: vector.body: @@ -41,83 +41,83 @@ ; DISABLED_MASKED_STRIDED-NEXT: [[VEC_IND:%.*]] = phi <8 x i32> [ , [[ENTRY]] ], [ [[VEC_IND_NEXT:%.*]], [[PRED_LOAD_CONTINUE14]] ] ; DISABLED_MASKED_STRIDED-NEXT: [[TMP0:%.*]] = icmp ugt <8 x i32> [[VEC_IND]], [[BROADCAST_SPLAT]] ; DISABLED_MASKED_STRIDED-NEXT: [[TMP1:%.*]] = shl nuw nsw <8 x i32> [[VEC_IND]], -; DISABLED_MASKED_STRIDED-NEXT: [[TMP2:%.*]] = extractelement <8 x i1> [[TMP0]], i32 0 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP2:%.*]] = extractelement <8 x i1> [[TMP0]], i64 0 ; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP2]], label [[PRED_LOAD_IF:%.*]], label [[PRED_LOAD_CONTINUE:%.*]] ; DISABLED_MASKED_STRIDED: pred.load.if: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP3:%.*]] = extractelement <8 x i32> [[TMP1]], i32 0 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP3:%.*]] = extractelement <8 x i32> [[TMP1]], i64 0 ; DISABLED_MASKED_STRIDED-NEXT: [[TMP4:%.*]] = getelementptr inbounds i8, i8* [[P:%.*]], i32 [[TMP3]] ; DISABLED_MASKED_STRIDED-NEXT: [[TMP5:%.*]] = load i8, i8* [[TMP4]], align 1 -; DISABLED_MASKED_STRIDED-NEXT: [[TMP6:%.*]] = insertelement <8 x i8> poison, i8 [[TMP5]], i32 0 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP6:%.*]] = insertelement <8 x i8> poison, i8 [[TMP5]], i64 0 ; DISABLED_MASKED_STRIDED-NEXT: br label [[PRED_LOAD_CONTINUE]] ; DISABLED_MASKED_STRIDED: pred.load.continue: ; DISABLED_MASKED_STRIDED-NEXT: [[TMP7:%.*]] = phi <8 x i8> [ poison, [[VECTOR_BODY]] ], [ [[TMP6]], [[PRED_LOAD_IF]] ] -; DISABLED_MASKED_STRIDED-NEXT: [[TMP8:%.*]] = extractelement <8 x i1> [[TMP0]], i32 1 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP8:%.*]] = extractelement <8 x i1> [[TMP0]], i64 1 ; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP8]], label [[PRED_LOAD_IF1:%.*]], label [[PRED_LOAD_CONTINUE2:%.*]] ; DISABLED_MASKED_STRIDED: pred.load.if1: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP9:%.*]] = extractelement <8 x i32> [[TMP1]], i32 1 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP9:%.*]] = extractelement <8 x i32> [[TMP1]], i64 1 ; DISABLED_MASKED_STRIDED-NEXT: [[TMP10:%.*]] = getelementptr inbounds i8, i8* [[P]], i32 [[TMP9]] ; DISABLED_MASKED_STRIDED-NEXT: [[TMP11:%.*]] = load i8, i8* [[TMP10]], align 1 -; DISABLED_MASKED_STRIDED-NEXT: [[TMP12:%.*]] = insertelement <8 x i8> [[TMP7]], i8 [[TMP11]], i32 1 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP12:%.*]] = insertelement <8 x i8> [[TMP7]], i8 [[TMP11]], i64 1 ; DISABLED_MASKED_STRIDED-NEXT: br label [[PRED_LOAD_CONTINUE2]] ; DISABLED_MASKED_STRIDED: pred.load.continue2: ; DISABLED_MASKED_STRIDED-NEXT: [[TMP13:%.*]] = phi <8 x i8> [ [[TMP7]], [[PRED_LOAD_CONTINUE]] ], [ [[TMP12]], [[PRED_LOAD_IF1]] ] -; DISABLED_MASKED_STRIDED-NEXT: [[TMP14:%.*]] = extractelement <8 x i1> [[TMP0]], i32 2 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP14:%.*]] = extractelement <8 x i1> [[TMP0]], i64 2 ; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP14]], label [[PRED_LOAD_IF3:%.*]], label [[PRED_LOAD_CONTINUE4:%.*]] ; DISABLED_MASKED_STRIDED: pred.load.if3: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP15:%.*]] = extractelement <8 x i32> [[TMP1]], i32 2 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP15:%.*]] = extractelement <8 x i32> [[TMP1]], i64 2 ; DISABLED_MASKED_STRIDED-NEXT: [[TMP16:%.*]] = getelementptr inbounds i8, i8* [[P]], i32 [[TMP15]] ; DISABLED_MASKED_STRIDED-NEXT: [[TMP17:%.*]] = load i8, i8* [[TMP16]], align 1 -; DISABLED_MASKED_STRIDED-NEXT: [[TMP18:%.*]] = insertelement <8 x i8> [[TMP13]], i8 [[TMP17]], i32 2 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP18:%.*]] = insertelement <8 x i8> [[TMP13]], i8 [[TMP17]], i64 2 ; DISABLED_MASKED_STRIDED-NEXT: br label [[PRED_LOAD_CONTINUE4]] ; DISABLED_MASKED_STRIDED: pred.load.continue4: ; DISABLED_MASKED_STRIDED-NEXT: [[TMP19:%.*]] = phi <8 x i8> [ [[TMP13]], [[PRED_LOAD_CONTINUE2]] ], [ [[TMP18]], [[PRED_LOAD_IF3]] ] -; DISABLED_MASKED_STRIDED-NEXT: [[TMP20:%.*]] = extractelement <8 x i1> [[TMP0]], i32 3 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP20:%.*]] = extractelement <8 x i1> [[TMP0]], i64 3 ; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP20]], label [[PRED_LOAD_IF5:%.*]], label [[PRED_LOAD_CONTINUE6:%.*]] ; DISABLED_MASKED_STRIDED: pred.load.if5: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP21:%.*]] = extractelement <8 x i32> [[TMP1]], i32 3 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP21:%.*]] = extractelement <8 x i32> [[TMP1]], i64 3 ; DISABLED_MASKED_STRIDED-NEXT: [[TMP22:%.*]] = getelementptr inbounds i8, i8* [[P]], i32 [[TMP21]] ; DISABLED_MASKED_STRIDED-NEXT: [[TMP23:%.*]] = load i8, i8* [[TMP22]], align 1 -; DISABLED_MASKED_STRIDED-NEXT: [[TMP24:%.*]] = insertelement <8 x i8> [[TMP19]], i8 [[TMP23]], i32 3 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP24:%.*]] = insertelement <8 x i8> [[TMP19]], i8 [[TMP23]], i64 3 ; DISABLED_MASKED_STRIDED-NEXT: br label [[PRED_LOAD_CONTINUE6]] ; DISABLED_MASKED_STRIDED: pred.load.continue6: ; DISABLED_MASKED_STRIDED-NEXT: [[TMP25:%.*]] = phi <8 x i8> [ [[TMP19]], [[PRED_LOAD_CONTINUE4]] ], [ [[TMP24]], [[PRED_LOAD_IF5]] ] -; DISABLED_MASKED_STRIDED-NEXT: [[TMP26:%.*]] = extractelement <8 x i1> [[TMP0]], i32 4 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP26:%.*]] = extractelement <8 x i1> [[TMP0]], i64 4 ; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP26]], label [[PRED_LOAD_IF7:%.*]], label [[PRED_LOAD_CONTINUE8:%.*]] ; DISABLED_MASKED_STRIDED: pred.load.if7: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP27:%.*]] = extractelement <8 x i32> [[TMP1]], i32 4 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP27:%.*]] = extractelement <8 x i32> [[TMP1]], i64 4 ; DISABLED_MASKED_STRIDED-NEXT: [[TMP28:%.*]] = getelementptr inbounds i8, i8* [[P]], i32 [[TMP27]] ; DISABLED_MASKED_STRIDED-NEXT: [[TMP29:%.*]] = load i8, i8* [[TMP28]], align 1 -; DISABLED_MASKED_STRIDED-NEXT: [[TMP30:%.*]] = insertelement <8 x i8> [[TMP25]], i8 [[TMP29]], i32 4 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP30:%.*]] = insertelement <8 x i8> [[TMP25]], i8 [[TMP29]], i64 4 ; DISABLED_MASKED_STRIDED-NEXT: br label [[PRED_LOAD_CONTINUE8]] ; DISABLED_MASKED_STRIDED: pred.load.continue8: ; DISABLED_MASKED_STRIDED-NEXT: [[TMP31:%.*]] = phi <8 x i8> [ [[TMP25]], [[PRED_LOAD_CONTINUE6]] ], [ [[TMP30]], [[PRED_LOAD_IF7]] ] -; DISABLED_MASKED_STRIDED-NEXT: [[TMP32:%.*]] = extractelement <8 x i1> [[TMP0]], i32 5 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP32:%.*]] = extractelement <8 x i1> [[TMP0]], i64 5 ; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP32]], label [[PRED_LOAD_IF9:%.*]], label [[PRED_LOAD_CONTINUE10:%.*]] ; DISABLED_MASKED_STRIDED: pred.load.if9: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP33:%.*]] = extractelement <8 x i32> [[TMP1]], i32 5 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP33:%.*]] = extractelement <8 x i32> [[TMP1]], i64 5 ; DISABLED_MASKED_STRIDED-NEXT: [[TMP34:%.*]] = getelementptr inbounds i8, i8* [[P]], i32 [[TMP33]] ; DISABLED_MASKED_STRIDED-NEXT: [[TMP35:%.*]] = load i8, i8* [[TMP34]], align 1 -; DISABLED_MASKED_STRIDED-NEXT: [[TMP36:%.*]] = insertelement <8 x i8> [[TMP31]], i8 [[TMP35]], i32 5 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP36:%.*]] = insertelement <8 x i8> [[TMP31]], i8 [[TMP35]], i64 5 ; DISABLED_MASKED_STRIDED-NEXT: br label [[PRED_LOAD_CONTINUE10]] ; DISABLED_MASKED_STRIDED: pred.load.continue10: ; DISABLED_MASKED_STRIDED-NEXT: [[TMP37:%.*]] = phi <8 x i8> [ [[TMP31]], [[PRED_LOAD_CONTINUE8]] ], [ [[TMP36]], [[PRED_LOAD_IF9]] ] -; DISABLED_MASKED_STRIDED-NEXT: [[TMP38:%.*]] = extractelement <8 x i1> [[TMP0]], i32 6 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP38:%.*]] = extractelement <8 x i1> [[TMP0]], i64 6 ; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP38]], label [[PRED_LOAD_IF11:%.*]], label [[PRED_LOAD_CONTINUE12:%.*]] ; DISABLED_MASKED_STRIDED: pred.load.if11: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP39:%.*]] = extractelement <8 x i32> [[TMP1]], i32 6 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP39:%.*]] = extractelement <8 x i32> [[TMP1]], i64 6 ; DISABLED_MASKED_STRIDED-NEXT: [[TMP40:%.*]] = getelementptr inbounds i8, i8* [[P]], i32 [[TMP39]] ; DISABLED_MASKED_STRIDED-NEXT: [[TMP41:%.*]] = load i8, i8* [[TMP40]], align 1 -; DISABLED_MASKED_STRIDED-NEXT: [[TMP42:%.*]] = insertelement <8 x i8> [[TMP37]], i8 [[TMP41]], i32 6 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP42:%.*]] = insertelement <8 x i8> [[TMP37]], i8 [[TMP41]], i64 6 ; DISABLED_MASKED_STRIDED-NEXT: br label [[PRED_LOAD_CONTINUE12]] ; DISABLED_MASKED_STRIDED: pred.load.continue12: ; DISABLED_MASKED_STRIDED-NEXT: [[TMP43:%.*]] = phi <8 x i8> [ [[TMP37]], [[PRED_LOAD_CONTINUE10]] ], [ [[TMP42]], [[PRED_LOAD_IF11]] ] -; DISABLED_MASKED_STRIDED-NEXT: [[TMP44:%.*]] = extractelement <8 x i1> [[TMP0]], i32 7 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP44:%.*]] = extractelement <8 x i1> [[TMP0]], i64 7 ; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP44]], label [[PRED_LOAD_IF13:%.*]], label [[PRED_LOAD_CONTINUE14]] ; DISABLED_MASKED_STRIDED: pred.load.if13: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP45:%.*]] = extractelement <8 x i32> [[TMP1]], i32 7 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP45:%.*]] = extractelement <8 x i32> [[TMP1]], i64 7 ; DISABLED_MASKED_STRIDED-NEXT: [[TMP46:%.*]] = getelementptr inbounds i8, i8* [[P]], i32 [[TMP45]] ; DISABLED_MASKED_STRIDED-NEXT: [[TMP47:%.*]] = load i8, i8* [[TMP46]], align 1 -; DISABLED_MASKED_STRIDED-NEXT: [[TMP48:%.*]] = insertelement <8 x i8> [[TMP43]], i8 [[TMP47]], i32 7 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP48:%.*]] = insertelement <8 x i8> [[TMP43]], i8 [[TMP47]], i64 7 ; DISABLED_MASKED_STRIDED-NEXT: br label [[PRED_LOAD_CONTINUE14]] ; DISABLED_MASKED_STRIDED: pred.load.continue14: ; DISABLED_MASKED_STRIDED-NEXT: [[TMP49:%.*]] = phi <8 x i8> [ [[TMP43]], [[PRED_LOAD_CONTINUE12]] ], [ [[TMP48]], [[PRED_LOAD_IF13]] ] @@ -134,7 +134,7 @@ ; ENABLED_MASKED_STRIDED-LABEL: @masked_strided1( ; ENABLED_MASKED_STRIDED-NEXT: entry: ; ENABLED_MASKED_STRIDED-NEXT: [[CONV:%.*]] = zext i8 [[GUARD:%.*]] to i32 -; ENABLED_MASKED_STRIDED-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <8 x i32> poison, i32 [[CONV]], i32 0 +; ENABLED_MASKED_STRIDED-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <8 x i32> poison, i32 [[CONV]], i64 0 ; ENABLED_MASKED_STRIDED-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector <8 x i32> [[BROADCAST_SPLATINSERT]], <8 x i32> poison, <8 x i32> zeroinitializer ; ENABLED_MASKED_STRIDED-NEXT: br label [[VECTOR_BODY:%.*]] ; ENABLED_MASKED_STRIDED: vector.body: @@ -209,7 +209,7 @@ ; DISABLED_MASKED_STRIDED-LABEL: @masked_strided1_optsize( ; DISABLED_MASKED_STRIDED-NEXT: entry: ; DISABLED_MASKED_STRIDED-NEXT: [[CONV:%.*]] = zext i8 [[GUARD:%.*]] to i32 -; DISABLED_MASKED_STRIDED-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <8 x i32> poison, i32 [[CONV]], i32 0 +; DISABLED_MASKED_STRIDED-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <8 x i32> poison, i32 [[CONV]], i64 0 ; DISABLED_MASKED_STRIDED-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector <8 x i32> [[BROADCAST_SPLATINSERT]], <8 x i32> poison, <8 x i32> zeroinitializer ; DISABLED_MASKED_STRIDED-NEXT: br label [[VECTOR_BODY:%.*]] ; DISABLED_MASKED_STRIDED: vector.body: @@ -217,83 +217,83 @@ ; DISABLED_MASKED_STRIDED-NEXT: [[VEC_IND:%.*]] = phi <8 x i32> [ , [[ENTRY]] ], [ [[VEC_IND_NEXT:%.*]], [[PRED_LOAD_CONTINUE14]] ] ; DISABLED_MASKED_STRIDED-NEXT: [[TMP0:%.*]] = icmp ugt <8 x i32> [[VEC_IND]], [[BROADCAST_SPLAT]] ; DISABLED_MASKED_STRIDED-NEXT: [[TMP1:%.*]] = shl nuw nsw <8 x i32> [[VEC_IND]], -; DISABLED_MASKED_STRIDED-NEXT: [[TMP2:%.*]] = extractelement <8 x i1> [[TMP0]], i32 0 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP2:%.*]] = extractelement <8 x i1> [[TMP0]], i64 0 ; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP2]], label [[PRED_LOAD_IF:%.*]], label [[PRED_LOAD_CONTINUE:%.*]] ; DISABLED_MASKED_STRIDED: pred.load.if: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP3:%.*]] = extractelement <8 x i32> [[TMP1]], i32 0 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP3:%.*]] = extractelement <8 x i32> [[TMP1]], i64 0 ; DISABLED_MASKED_STRIDED-NEXT: [[TMP4:%.*]] = getelementptr inbounds i8, i8* [[P:%.*]], i32 [[TMP3]] ; DISABLED_MASKED_STRIDED-NEXT: [[TMP5:%.*]] = load i8, i8* [[TMP4]], align 1 -; DISABLED_MASKED_STRIDED-NEXT: [[TMP6:%.*]] = insertelement <8 x i8> poison, i8 [[TMP5]], i32 0 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP6:%.*]] = insertelement <8 x i8> poison, i8 [[TMP5]], i64 0 ; DISABLED_MASKED_STRIDED-NEXT: br label [[PRED_LOAD_CONTINUE]] ; DISABLED_MASKED_STRIDED: pred.load.continue: ; DISABLED_MASKED_STRIDED-NEXT: [[TMP7:%.*]] = phi <8 x i8> [ poison, [[VECTOR_BODY]] ], [ [[TMP6]], [[PRED_LOAD_IF]] ] -; DISABLED_MASKED_STRIDED-NEXT: [[TMP8:%.*]] = extractelement <8 x i1> [[TMP0]], i32 1 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP8:%.*]] = extractelement <8 x i1> [[TMP0]], i64 1 ; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP8]], label [[PRED_LOAD_IF1:%.*]], label [[PRED_LOAD_CONTINUE2:%.*]] ; DISABLED_MASKED_STRIDED: pred.load.if1: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP9:%.*]] = extractelement <8 x i32> [[TMP1]], i32 1 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP9:%.*]] = extractelement <8 x i32> [[TMP1]], i64 1 ; DISABLED_MASKED_STRIDED-NEXT: [[TMP10:%.*]] = getelementptr inbounds i8, i8* [[P]], i32 [[TMP9]] ; DISABLED_MASKED_STRIDED-NEXT: [[TMP11:%.*]] = load i8, i8* [[TMP10]], align 1 -; DISABLED_MASKED_STRIDED-NEXT: [[TMP12:%.*]] = insertelement <8 x i8> [[TMP7]], i8 [[TMP11]], i32 1 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP12:%.*]] = insertelement <8 x i8> [[TMP7]], i8 [[TMP11]], i64 1 ; DISABLED_MASKED_STRIDED-NEXT: br label [[PRED_LOAD_CONTINUE2]] ; DISABLED_MASKED_STRIDED: pred.load.continue2: ; DISABLED_MASKED_STRIDED-NEXT: [[TMP13:%.*]] = phi <8 x i8> [ [[TMP7]], [[PRED_LOAD_CONTINUE]] ], [ [[TMP12]], [[PRED_LOAD_IF1]] ] -; DISABLED_MASKED_STRIDED-NEXT: [[TMP14:%.*]] = extractelement <8 x i1> [[TMP0]], i32 2 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP14:%.*]] = extractelement <8 x i1> [[TMP0]], i64 2 ; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP14]], label [[PRED_LOAD_IF3:%.*]], label [[PRED_LOAD_CONTINUE4:%.*]] ; DISABLED_MASKED_STRIDED: pred.load.if3: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP15:%.*]] = extractelement <8 x i32> [[TMP1]], i32 2 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP15:%.*]] = extractelement <8 x i32> [[TMP1]], i64 2 ; DISABLED_MASKED_STRIDED-NEXT: [[TMP16:%.*]] = getelementptr inbounds i8, i8* [[P]], i32 [[TMP15]] ; DISABLED_MASKED_STRIDED-NEXT: [[TMP17:%.*]] = load i8, i8* [[TMP16]], align 1 -; DISABLED_MASKED_STRIDED-NEXT: [[TMP18:%.*]] = insertelement <8 x i8> [[TMP13]], i8 [[TMP17]], i32 2 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP18:%.*]] = insertelement <8 x i8> [[TMP13]], i8 [[TMP17]], i64 2 ; DISABLED_MASKED_STRIDED-NEXT: br label [[PRED_LOAD_CONTINUE4]] ; DISABLED_MASKED_STRIDED: pred.load.continue4: ; DISABLED_MASKED_STRIDED-NEXT: [[TMP19:%.*]] = phi <8 x i8> [ [[TMP13]], [[PRED_LOAD_CONTINUE2]] ], [ [[TMP18]], [[PRED_LOAD_IF3]] ] -; DISABLED_MASKED_STRIDED-NEXT: [[TMP20:%.*]] = extractelement <8 x i1> [[TMP0]], i32 3 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP20:%.*]] = extractelement <8 x i1> [[TMP0]], i64 3 ; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP20]], label [[PRED_LOAD_IF5:%.*]], label [[PRED_LOAD_CONTINUE6:%.*]] ; DISABLED_MASKED_STRIDED: pred.load.if5: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP21:%.*]] = extractelement <8 x i32> [[TMP1]], i32 3 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP21:%.*]] = extractelement <8 x i32> [[TMP1]], i64 3 ; DISABLED_MASKED_STRIDED-NEXT: [[TMP22:%.*]] = getelementptr inbounds i8, i8* [[P]], i32 [[TMP21]] ; DISABLED_MASKED_STRIDED-NEXT: [[TMP23:%.*]] = load i8, i8* [[TMP22]], align 1 -; DISABLED_MASKED_STRIDED-NEXT: [[TMP24:%.*]] = insertelement <8 x i8> [[TMP19]], i8 [[TMP23]], i32 3 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP24:%.*]] = insertelement <8 x i8> [[TMP19]], i8 [[TMP23]], i64 3 ; DISABLED_MASKED_STRIDED-NEXT: br label [[PRED_LOAD_CONTINUE6]] ; DISABLED_MASKED_STRIDED: pred.load.continue6: ; DISABLED_MASKED_STRIDED-NEXT: [[TMP25:%.*]] = phi <8 x i8> [ [[TMP19]], [[PRED_LOAD_CONTINUE4]] ], [ [[TMP24]], [[PRED_LOAD_IF5]] ] -; DISABLED_MASKED_STRIDED-NEXT: [[TMP26:%.*]] = extractelement <8 x i1> [[TMP0]], i32 4 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP26:%.*]] = extractelement <8 x i1> [[TMP0]], i64 4 ; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP26]], label [[PRED_LOAD_IF7:%.*]], label [[PRED_LOAD_CONTINUE8:%.*]] ; DISABLED_MASKED_STRIDED: pred.load.if7: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP27:%.*]] = extractelement <8 x i32> [[TMP1]], i32 4 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP27:%.*]] = extractelement <8 x i32> [[TMP1]], i64 4 ; DISABLED_MASKED_STRIDED-NEXT: [[TMP28:%.*]] = getelementptr inbounds i8, i8* [[P]], i32 [[TMP27]] ; DISABLED_MASKED_STRIDED-NEXT: [[TMP29:%.*]] = load i8, i8* [[TMP28]], align 1 -; DISABLED_MASKED_STRIDED-NEXT: [[TMP30:%.*]] = insertelement <8 x i8> [[TMP25]], i8 [[TMP29]], i32 4 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP30:%.*]] = insertelement <8 x i8> [[TMP25]], i8 [[TMP29]], i64 4 ; DISABLED_MASKED_STRIDED-NEXT: br label [[PRED_LOAD_CONTINUE8]] ; DISABLED_MASKED_STRIDED: pred.load.continue8: ; DISABLED_MASKED_STRIDED-NEXT: [[TMP31:%.*]] = phi <8 x i8> [ [[TMP25]], [[PRED_LOAD_CONTINUE6]] ], [ [[TMP30]], [[PRED_LOAD_IF7]] ] -; DISABLED_MASKED_STRIDED-NEXT: [[TMP32:%.*]] = extractelement <8 x i1> [[TMP0]], i32 5 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP32:%.*]] = extractelement <8 x i1> [[TMP0]], i64 5 ; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP32]], label [[PRED_LOAD_IF9:%.*]], label [[PRED_LOAD_CONTINUE10:%.*]] ; DISABLED_MASKED_STRIDED: pred.load.if9: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP33:%.*]] = extractelement <8 x i32> [[TMP1]], i32 5 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP33:%.*]] = extractelement <8 x i32> [[TMP1]], i64 5 ; DISABLED_MASKED_STRIDED-NEXT: [[TMP34:%.*]] = getelementptr inbounds i8, i8* [[P]], i32 [[TMP33]] ; DISABLED_MASKED_STRIDED-NEXT: [[TMP35:%.*]] = load i8, i8* [[TMP34]], align 1 -; DISABLED_MASKED_STRIDED-NEXT: [[TMP36:%.*]] = insertelement <8 x i8> [[TMP31]], i8 [[TMP35]], i32 5 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP36:%.*]] = insertelement <8 x i8> [[TMP31]], i8 [[TMP35]], i64 5 ; DISABLED_MASKED_STRIDED-NEXT: br label [[PRED_LOAD_CONTINUE10]] ; DISABLED_MASKED_STRIDED: pred.load.continue10: ; DISABLED_MASKED_STRIDED-NEXT: [[TMP37:%.*]] = phi <8 x i8> [ [[TMP31]], [[PRED_LOAD_CONTINUE8]] ], [ [[TMP36]], [[PRED_LOAD_IF9]] ] -; DISABLED_MASKED_STRIDED-NEXT: [[TMP38:%.*]] = extractelement <8 x i1> [[TMP0]], i32 6 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP38:%.*]] = extractelement <8 x i1> [[TMP0]], i64 6 ; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP38]], label [[PRED_LOAD_IF11:%.*]], label [[PRED_LOAD_CONTINUE12:%.*]] ; DISABLED_MASKED_STRIDED: pred.load.if11: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP39:%.*]] = extractelement <8 x i32> [[TMP1]], i32 6 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP39:%.*]] = extractelement <8 x i32> [[TMP1]], i64 6 ; DISABLED_MASKED_STRIDED-NEXT: [[TMP40:%.*]] = getelementptr inbounds i8, i8* [[P]], i32 [[TMP39]] ; DISABLED_MASKED_STRIDED-NEXT: [[TMP41:%.*]] = load i8, i8* [[TMP40]], align 1 -; DISABLED_MASKED_STRIDED-NEXT: [[TMP42:%.*]] = insertelement <8 x i8> [[TMP37]], i8 [[TMP41]], i32 6 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP42:%.*]] = insertelement <8 x i8> [[TMP37]], i8 [[TMP41]], i64 6 ; DISABLED_MASKED_STRIDED-NEXT: br label [[PRED_LOAD_CONTINUE12]] ; DISABLED_MASKED_STRIDED: pred.load.continue12: ; DISABLED_MASKED_STRIDED-NEXT: [[TMP43:%.*]] = phi <8 x i8> [ [[TMP37]], [[PRED_LOAD_CONTINUE10]] ], [ [[TMP42]], [[PRED_LOAD_IF11]] ] -; DISABLED_MASKED_STRIDED-NEXT: [[TMP44:%.*]] = extractelement <8 x i1> [[TMP0]], i32 7 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP44:%.*]] = extractelement <8 x i1> [[TMP0]], i64 7 ; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP44]], label [[PRED_LOAD_IF13:%.*]], label [[PRED_LOAD_CONTINUE14]] ; DISABLED_MASKED_STRIDED: pred.load.if13: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP45:%.*]] = extractelement <8 x i32> [[TMP1]], i32 7 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP45:%.*]] = extractelement <8 x i32> [[TMP1]], i64 7 ; DISABLED_MASKED_STRIDED-NEXT: [[TMP46:%.*]] = getelementptr inbounds i8, i8* [[P]], i32 [[TMP45]] ; DISABLED_MASKED_STRIDED-NEXT: [[TMP47:%.*]] = load i8, i8* [[TMP46]], align 1 -; DISABLED_MASKED_STRIDED-NEXT: [[TMP48:%.*]] = insertelement <8 x i8> [[TMP43]], i8 [[TMP47]], i32 7 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP48:%.*]] = insertelement <8 x i8> [[TMP43]], i8 [[TMP47]], i64 7 ; DISABLED_MASKED_STRIDED-NEXT: br label [[PRED_LOAD_CONTINUE14]] ; DISABLED_MASKED_STRIDED: pred.load.continue14: ; DISABLED_MASKED_STRIDED-NEXT: [[TMP49:%.*]] = phi <8 x i8> [ [[TMP43]], [[PRED_LOAD_CONTINUE12]] ], [ [[TMP48]], [[PRED_LOAD_IF13]] ] @@ -310,7 +310,7 @@ ; ENABLED_MASKED_STRIDED-LABEL: @masked_strided1_optsize( ; ENABLED_MASKED_STRIDED-NEXT: entry: ; ENABLED_MASKED_STRIDED-NEXT: [[CONV:%.*]] = zext i8 [[GUARD:%.*]] to i32 -; ENABLED_MASKED_STRIDED-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <8 x i32> poison, i32 [[CONV]], i32 0 +; ENABLED_MASKED_STRIDED-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <8 x i32> poison, i32 [[CONV]], i64 0 ; ENABLED_MASKED_STRIDED-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector <8 x i32> [[BROADCAST_SPLATINSERT]], <8 x i32> poison, <8 x i32> zeroinitializer ; ENABLED_MASKED_STRIDED-NEXT: br label [[VECTOR_BODY:%.*]] ; ENABLED_MASKED_STRIDED: vector.body: @@ -397,9 +397,9 @@ ; DISABLED_MASKED_STRIDED-NEXT: [[N_RND_UP:%.*]] = add i32 [[N]], 7 ; DISABLED_MASKED_STRIDED-NEXT: [[N_VEC:%.*]] = and i32 [[N_RND_UP]], -8 ; DISABLED_MASKED_STRIDED-NEXT: [[TRIP_COUNT_MINUS_1:%.*]] = add i32 [[N]], -1 -; DISABLED_MASKED_STRIDED-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <8 x i32> poison, i32 [[TRIP_COUNT_MINUS_1]], i32 0 +; DISABLED_MASKED_STRIDED-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <8 x i32> poison, i32 [[TRIP_COUNT_MINUS_1]], i64 0 ; DISABLED_MASKED_STRIDED-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector <8 x i32> [[BROADCAST_SPLATINSERT]], <8 x i32> poison, <8 x i32> zeroinitializer -; DISABLED_MASKED_STRIDED-NEXT: [[BROADCAST_SPLATINSERT1:%.*]] = insertelement <8 x i32> poison, i32 [[CONV]], i32 0 +; DISABLED_MASKED_STRIDED-NEXT: [[BROADCAST_SPLATINSERT1:%.*]] = insertelement <8 x i32> poison, i32 [[CONV]], i64 0 ; DISABLED_MASKED_STRIDED-NEXT: [[BROADCAST_SPLAT2:%.*]] = shufflevector <8 x i32> [[BROADCAST_SPLATINSERT1]], <8 x i32> poison, <8 x i32> zeroinitializer ; DISABLED_MASKED_STRIDED-NEXT: br label [[VECTOR_BODY:%.*]] ; DISABLED_MASKED_STRIDED: vector.body: @@ -409,83 +409,83 @@ ; DISABLED_MASKED_STRIDED-NEXT: [[TMP1:%.*]] = icmp ule <8 x i32> [[VEC_IND]], [[BROADCAST_SPLAT]] ; DISABLED_MASKED_STRIDED-NEXT: [[TMP2:%.*]] = shl nuw nsw <8 x i32> [[VEC_IND]], ; DISABLED_MASKED_STRIDED-NEXT: [[TMP3:%.*]] = select <8 x i1> [[TMP1]], <8 x i1> [[TMP0]], <8 x i1> zeroinitializer -; DISABLED_MASKED_STRIDED-NEXT: [[TMP4:%.*]] = extractelement <8 x i1> [[TMP3]], i32 0 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP4:%.*]] = extractelement <8 x i1> [[TMP3]], i64 0 ; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP4]], label [[PRED_LOAD_IF:%.*]], label [[PRED_LOAD_CONTINUE:%.*]] ; DISABLED_MASKED_STRIDED: pred.load.if: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP5:%.*]] = extractelement <8 x i32> [[TMP2]], i32 0 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP5:%.*]] = extractelement <8 x i32> [[TMP2]], i64 0 ; DISABLED_MASKED_STRIDED-NEXT: [[TMP6:%.*]] = getelementptr inbounds i8, i8* [[P:%.*]], i32 [[TMP5]] ; DISABLED_MASKED_STRIDED-NEXT: [[TMP7:%.*]] = load i8, i8* [[TMP6]], align 1 -; DISABLED_MASKED_STRIDED-NEXT: [[TMP8:%.*]] = insertelement <8 x i8> poison, i8 [[TMP7]], i32 0 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP8:%.*]] = insertelement <8 x i8> poison, i8 [[TMP7]], i64 0 ; DISABLED_MASKED_STRIDED-NEXT: br label [[PRED_LOAD_CONTINUE]] ; DISABLED_MASKED_STRIDED: pred.load.continue: ; DISABLED_MASKED_STRIDED-NEXT: [[TMP9:%.*]] = phi <8 x i8> [ poison, [[VECTOR_BODY]] ], [ [[TMP8]], [[PRED_LOAD_IF]] ] -; DISABLED_MASKED_STRIDED-NEXT: [[TMP10:%.*]] = extractelement <8 x i1> [[TMP3]], i32 1 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP10:%.*]] = extractelement <8 x i1> [[TMP3]], i64 1 ; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP10]], label [[PRED_LOAD_IF3:%.*]], label [[PRED_LOAD_CONTINUE4:%.*]] ; DISABLED_MASKED_STRIDED: pred.load.if3: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP11:%.*]] = extractelement <8 x i32> [[TMP2]], i32 1 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP11:%.*]] = extractelement <8 x i32> [[TMP2]], i64 1 ; DISABLED_MASKED_STRIDED-NEXT: [[TMP12:%.*]] = getelementptr inbounds i8, i8* [[P]], i32 [[TMP11]] ; DISABLED_MASKED_STRIDED-NEXT: [[TMP13:%.*]] = load i8, i8* [[TMP12]], align 1 -; DISABLED_MASKED_STRIDED-NEXT: [[TMP14:%.*]] = insertelement <8 x i8> [[TMP9]], i8 [[TMP13]], i32 1 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP14:%.*]] = insertelement <8 x i8> [[TMP9]], i8 [[TMP13]], i64 1 ; DISABLED_MASKED_STRIDED-NEXT: br label [[PRED_LOAD_CONTINUE4]] ; DISABLED_MASKED_STRIDED: pred.load.continue4: ; DISABLED_MASKED_STRIDED-NEXT: [[TMP15:%.*]] = phi <8 x i8> [ [[TMP9]], [[PRED_LOAD_CONTINUE]] ], [ [[TMP14]], [[PRED_LOAD_IF3]] ] -; DISABLED_MASKED_STRIDED-NEXT: [[TMP16:%.*]] = extractelement <8 x i1> [[TMP3]], i32 2 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP16:%.*]] = extractelement <8 x i1> [[TMP3]], i64 2 ; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP16]], label [[PRED_LOAD_IF5:%.*]], label [[PRED_LOAD_CONTINUE6:%.*]] ; DISABLED_MASKED_STRIDED: pred.load.if5: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP17:%.*]] = extractelement <8 x i32> [[TMP2]], i32 2 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP17:%.*]] = extractelement <8 x i32> [[TMP2]], i64 2 ; DISABLED_MASKED_STRIDED-NEXT: [[TMP18:%.*]] = getelementptr inbounds i8, i8* [[P]], i32 [[TMP17]] ; DISABLED_MASKED_STRIDED-NEXT: [[TMP19:%.*]] = load i8, i8* [[TMP18]], align 1 -; DISABLED_MASKED_STRIDED-NEXT: [[TMP20:%.*]] = insertelement <8 x i8> [[TMP15]], i8 [[TMP19]], i32 2 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP20:%.*]] = insertelement <8 x i8> [[TMP15]], i8 [[TMP19]], i64 2 ; DISABLED_MASKED_STRIDED-NEXT: br label [[PRED_LOAD_CONTINUE6]] ; DISABLED_MASKED_STRIDED: pred.load.continue6: ; DISABLED_MASKED_STRIDED-NEXT: [[TMP21:%.*]] = phi <8 x i8> [ [[TMP15]], [[PRED_LOAD_CONTINUE4]] ], [ [[TMP20]], [[PRED_LOAD_IF5]] ] -; DISABLED_MASKED_STRIDED-NEXT: [[TMP22:%.*]] = extractelement <8 x i1> [[TMP3]], i32 3 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP22:%.*]] = extractelement <8 x i1> [[TMP3]], i64 3 ; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP22]], label [[PRED_LOAD_IF7:%.*]], label [[PRED_LOAD_CONTINUE8:%.*]] ; DISABLED_MASKED_STRIDED: pred.load.if7: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP23:%.*]] = extractelement <8 x i32> [[TMP2]], i32 3 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP23:%.*]] = extractelement <8 x i32> [[TMP2]], i64 3 ; DISABLED_MASKED_STRIDED-NEXT: [[TMP24:%.*]] = getelementptr inbounds i8, i8* [[P]], i32 [[TMP23]] ; DISABLED_MASKED_STRIDED-NEXT: [[TMP25:%.*]] = load i8, i8* [[TMP24]], align 1 -; DISABLED_MASKED_STRIDED-NEXT: [[TMP26:%.*]] = insertelement <8 x i8> [[TMP21]], i8 [[TMP25]], i32 3 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP26:%.*]] = insertelement <8 x i8> [[TMP21]], i8 [[TMP25]], i64 3 ; DISABLED_MASKED_STRIDED-NEXT: br label [[PRED_LOAD_CONTINUE8]] ; DISABLED_MASKED_STRIDED: pred.load.continue8: ; DISABLED_MASKED_STRIDED-NEXT: [[TMP27:%.*]] = phi <8 x i8> [ [[TMP21]], [[PRED_LOAD_CONTINUE6]] ], [ [[TMP26]], [[PRED_LOAD_IF7]] ] -; DISABLED_MASKED_STRIDED-NEXT: [[TMP28:%.*]] = extractelement <8 x i1> [[TMP3]], i32 4 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP28:%.*]] = extractelement <8 x i1> [[TMP3]], i64 4 ; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP28]], label [[PRED_LOAD_IF9:%.*]], label [[PRED_LOAD_CONTINUE10:%.*]] ; DISABLED_MASKED_STRIDED: pred.load.if9: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP29:%.*]] = extractelement <8 x i32> [[TMP2]], i32 4 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP29:%.*]] = extractelement <8 x i32> [[TMP2]], i64 4 ; DISABLED_MASKED_STRIDED-NEXT: [[TMP30:%.*]] = getelementptr inbounds i8, i8* [[P]], i32 [[TMP29]] ; DISABLED_MASKED_STRIDED-NEXT: [[TMP31:%.*]] = load i8, i8* [[TMP30]], align 1 -; DISABLED_MASKED_STRIDED-NEXT: [[TMP32:%.*]] = insertelement <8 x i8> [[TMP27]], i8 [[TMP31]], i32 4 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP32:%.*]] = insertelement <8 x i8> [[TMP27]], i8 [[TMP31]], i64 4 ; DISABLED_MASKED_STRIDED-NEXT: br label [[PRED_LOAD_CONTINUE10]] ; DISABLED_MASKED_STRIDED: pred.load.continue10: ; DISABLED_MASKED_STRIDED-NEXT: [[TMP33:%.*]] = phi <8 x i8> [ [[TMP27]], [[PRED_LOAD_CONTINUE8]] ], [ [[TMP32]], [[PRED_LOAD_IF9]] ] -; DISABLED_MASKED_STRIDED-NEXT: [[TMP34:%.*]] = extractelement <8 x i1> [[TMP3]], i32 5 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP34:%.*]] = extractelement <8 x i1> [[TMP3]], i64 5 ; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP34]], label [[PRED_LOAD_IF11:%.*]], label [[PRED_LOAD_CONTINUE12:%.*]] ; DISABLED_MASKED_STRIDED: pred.load.if11: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP35:%.*]] = extractelement <8 x i32> [[TMP2]], i32 5 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP35:%.*]] = extractelement <8 x i32> [[TMP2]], i64 5 ; DISABLED_MASKED_STRIDED-NEXT: [[TMP36:%.*]] = getelementptr inbounds i8, i8* [[P]], i32 [[TMP35]] ; DISABLED_MASKED_STRIDED-NEXT: [[TMP37:%.*]] = load i8, i8* [[TMP36]], align 1 -; DISABLED_MASKED_STRIDED-NEXT: [[TMP38:%.*]] = insertelement <8 x i8> [[TMP33]], i8 [[TMP37]], i32 5 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP38:%.*]] = insertelement <8 x i8> [[TMP33]], i8 [[TMP37]], i64 5 ; DISABLED_MASKED_STRIDED-NEXT: br label [[PRED_LOAD_CONTINUE12]] ; DISABLED_MASKED_STRIDED: pred.load.continue12: ; DISABLED_MASKED_STRIDED-NEXT: [[TMP39:%.*]] = phi <8 x i8> [ [[TMP33]], [[PRED_LOAD_CONTINUE10]] ], [ [[TMP38]], [[PRED_LOAD_IF11]] ] -; DISABLED_MASKED_STRIDED-NEXT: [[TMP40:%.*]] = extractelement <8 x i1> [[TMP3]], i32 6 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP40:%.*]] = extractelement <8 x i1> [[TMP3]], i64 6 ; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP40]], label [[PRED_LOAD_IF13:%.*]], label [[PRED_LOAD_CONTINUE14:%.*]] ; DISABLED_MASKED_STRIDED: pred.load.if13: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP41:%.*]] = extractelement <8 x i32> [[TMP2]], i32 6 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP41:%.*]] = extractelement <8 x i32> [[TMP2]], i64 6 ; DISABLED_MASKED_STRIDED-NEXT: [[TMP42:%.*]] = getelementptr inbounds i8, i8* [[P]], i32 [[TMP41]] ; DISABLED_MASKED_STRIDED-NEXT: [[TMP43:%.*]] = load i8, i8* [[TMP42]], align 1 -; DISABLED_MASKED_STRIDED-NEXT: [[TMP44:%.*]] = insertelement <8 x i8> [[TMP39]], i8 [[TMP43]], i32 6 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP44:%.*]] = insertelement <8 x i8> [[TMP39]], i8 [[TMP43]], i64 6 ; DISABLED_MASKED_STRIDED-NEXT: br label [[PRED_LOAD_CONTINUE14]] ; DISABLED_MASKED_STRIDED: pred.load.continue14: ; DISABLED_MASKED_STRIDED-NEXT: [[TMP45:%.*]] = phi <8 x i8> [ [[TMP39]], [[PRED_LOAD_CONTINUE12]] ], [ [[TMP44]], [[PRED_LOAD_IF13]] ] -; DISABLED_MASKED_STRIDED-NEXT: [[TMP46:%.*]] = extractelement <8 x i1> [[TMP3]], i32 7 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP46:%.*]] = extractelement <8 x i1> [[TMP3]], i64 7 ; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP46]], label [[PRED_LOAD_IF15:%.*]], label [[PRED_LOAD_CONTINUE16]] ; DISABLED_MASKED_STRIDED: pred.load.if15: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP47:%.*]] = extractelement <8 x i32> [[TMP2]], i32 7 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP47:%.*]] = extractelement <8 x i32> [[TMP2]], i64 7 ; DISABLED_MASKED_STRIDED-NEXT: [[TMP48:%.*]] = getelementptr inbounds i8, i8* [[P]], i32 [[TMP47]] ; DISABLED_MASKED_STRIDED-NEXT: [[TMP49:%.*]] = load i8, i8* [[TMP48]], align 1 -; DISABLED_MASKED_STRIDED-NEXT: [[TMP50:%.*]] = insertelement <8 x i8> [[TMP45]], i8 [[TMP49]], i32 7 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP50:%.*]] = insertelement <8 x i8> [[TMP45]], i8 [[TMP49]], i64 7 ; DISABLED_MASKED_STRIDED-NEXT: br label [[PRED_LOAD_CONTINUE16]] ; DISABLED_MASKED_STRIDED: pred.load.continue16: ; DISABLED_MASKED_STRIDED-NEXT: [[TMP51:%.*]] = phi <8 x i8> [ [[TMP45]], [[PRED_LOAD_CONTINUE14]] ], [ [[TMP50]], [[PRED_LOAD_IF15]] ] @@ -508,9 +508,9 @@ ; ENABLED_MASKED_STRIDED-NEXT: [[N_RND_UP:%.*]] = add i32 [[N]], 7 ; ENABLED_MASKED_STRIDED-NEXT: [[N_VEC:%.*]] = and i32 [[N_RND_UP]], -8 ; ENABLED_MASKED_STRIDED-NEXT: [[TRIP_COUNT_MINUS_1:%.*]] = add i32 [[N]], -1 -; ENABLED_MASKED_STRIDED-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <8 x i32> poison, i32 [[TRIP_COUNT_MINUS_1]], i32 0 +; ENABLED_MASKED_STRIDED-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <8 x i32> poison, i32 [[TRIP_COUNT_MINUS_1]], i64 0 ; ENABLED_MASKED_STRIDED-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector <8 x i32> [[BROADCAST_SPLATINSERT]], <8 x i32> poison, <8 x i32> zeroinitializer -; ENABLED_MASKED_STRIDED-NEXT: [[BROADCAST_SPLATINSERT1:%.*]] = insertelement <8 x i32> poison, i32 [[CONV]], i32 0 +; ENABLED_MASKED_STRIDED-NEXT: [[BROADCAST_SPLATINSERT1:%.*]] = insertelement <8 x i32> poison, i32 [[CONV]], i64 0 ; ENABLED_MASKED_STRIDED-NEXT: [[BROADCAST_SPLAT2:%.*]] = shufflevector <8 x i32> [[BROADCAST_SPLATINSERT1]], <8 x i32> poison, <8 x i32> zeroinitializer ; ENABLED_MASKED_STRIDED-NEXT: br label [[VECTOR_BODY:%.*]] ; ENABLED_MASKED_STRIDED: vector.body: @@ -604,9 +604,9 @@ ; DISABLED_MASKED_STRIDED-NEXT: [[N_RND_UP:%.*]] = add i32 [[N]], 7 ; DISABLED_MASKED_STRIDED-NEXT: [[N_VEC:%.*]] = and i32 [[N_RND_UP]], -8 ; DISABLED_MASKED_STRIDED-NEXT: [[TRIP_COUNT_MINUS_1:%.*]] = add i32 [[N]], -1 -; DISABLED_MASKED_STRIDED-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <8 x i32> poison, i32 [[TRIP_COUNT_MINUS_1]], i32 0 +; DISABLED_MASKED_STRIDED-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <8 x i32> poison, i32 [[TRIP_COUNT_MINUS_1]], i64 0 ; DISABLED_MASKED_STRIDED-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector <8 x i32> [[BROADCAST_SPLATINSERT]], <8 x i32> poison, <8 x i32> zeroinitializer -; DISABLED_MASKED_STRIDED-NEXT: [[BROADCAST_SPLATINSERT1:%.*]] = insertelement <8 x i32> poison, i32 [[CONV]], i32 0 +; DISABLED_MASKED_STRIDED-NEXT: [[BROADCAST_SPLATINSERT1:%.*]] = insertelement <8 x i32> poison, i32 [[CONV]], i64 0 ; DISABLED_MASKED_STRIDED-NEXT: [[BROADCAST_SPLAT2:%.*]] = shufflevector <8 x i32> [[BROADCAST_SPLATINSERT1]], <8 x i32> poison, <8 x i32> zeroinitializer ; DISABLED_MASKED_STRIDED-NEXT: br label [[VECTOR_BODY:%.*]] ; DISABLED_MASKED_STRIDED: vector.body: @@ -616,83 +616,83 @@ ; DISABLED_MASKED_STRIDED-NEXT: [[TMP1:%.*]] = icmp ule <8 x i32> [[VEC_IND]], [[BROADCAST_SPLAT]] ; DISABLED_MASKED_STRIDED-NEXT: [[TMP2:%.*]] = mul nsw <8 x i32> [[VEC_IND]], ; DISABLED_MASKED_STRIDED-NEXT: [[TMP3:%.*]] = select <8 x i1> [[TMP1]], <8 x i1> [[TMP0]], <8 x i1> zeroinitializer -; DISABLED_MASKED_STRIDED-NEXT: [[TMP4:%.*]] = extractelement <8 x i1> [[TMP3]], i32 0 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP4:%.*]] = extractelement <8 x i1> [[TMP3]], i64 0 ; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP4]], label [[PRED_LOAD_IF:%.*]], label [[PRED_LOAD_CONTINUE:%.*]] ; DISABLED_MASKED_STRIDED: pred.load.if: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP5:%.*]] = extractelement <8 x i32> [[TMP2]], i32 0 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP5:%.*]] = extractelement <8 x i32> [[TMP2]], i64 0 ; DISABLED_MASKED_STRIDED-NEXT: [[TMP6:%.*]] = getelementptr inbounds i8, i8* [[P:%.*]], i32 [[TMP5]] ; DISABLED_MASKED_STRIDED-NEXT: [[TMP7:%.*]] = load i8, i8* [[TMP6]], align 1 -; DISABLED_MASKED_STRIDED-NEXT: [[TMP8:%.*]] = insertelement <8 x i8> poison, i8 [[TMP7]], i32 0 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP8:%.*]] = insertelement <8 x i8> poison, i8 [[TMP7]], i64 0 ; DISABLED_MASKED_STRIDED-NEXT: br label [[PRED_LOAD_CONTINUE]] ; DISABLED_MASKED_STRIDED: pred.load.continue: ; DISABLED_MASKED_STRIDED-NEXT: [[TMP9:%.*]] = phi <8 x i8> [ poison, [[VECTOR_BODY]] ], [ [[TMP8]], [[PRED_LOAD_IF]] ] -; DISABLED_MASKED_STRIDED-NEXT: [[TMP10:%.*]] = extractelement <8 x i1> [[TMP3]], i32 1 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP10:%.*]] = extractelement <8 x i1> [[TMP3]], i64 1 ; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP10]], label [[PRED_LOAD_IF3:%.*]], label [[PRED_LOAD_CONTINUE4:%.*]] ; DISABLED_MASKED_STRIDED: pred.load.if3: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP11:%.*]] = extractelement <8 x i32> [[TMP2]], i32 1 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP11:%.*]] = extractelement <8 x i32> [[TMP2]], i64 1 ; DISABLED_MASKED_STRIDED-NEXT: [[TMP12:%.*]] = getelementptr inbounds i8, i8* [[P]], i32 [[TMP11]] ; DISABLED_MASKED_STRIDED-NEXT: [[TMP13:%.*]] = load i8, i8* [[TMP12]], align 1 -; DISABLED_MASKED_STRIDED-NEXT: [[TMP14:%.*]] = insertelement <8 x i8> [[TMP9]], i8 [[TMP13]], i32 1 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP14:%.*]] = insertelement <8 x i8> [[TMP9]], i8 [[TMP13]], i64 1 ; DISABLED_MASKED_STRIDED-NEXT: br label [[PRED_LOAD_CONTINUE4]] ; DISABLED_MASKED_STRIDED: pred.load.continue4: ; DISABLED_MASKED_STRIDED-NEXT: [[TMP15:%.*]] = phi <8 x i8> [ [[TMP9]], [[PRED_LOAD_CONTINUE]] ], [ [[TMP14]], [[PRED_LOAD_IF3]] ] -; DISABLED_MASKED_STRIDED-NEXT: [[TMP16:%.*]] = extractelement <8 x i1> [[TMP3]], i32 2 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP16:%.*]] = extractelement <8 x i1> [[TMP3]], i64 2 ; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP16]], label [[PRED_LOAD_IF5:%.*]], label [[PRED_LOAD_CONTINUE6:%.*]] ; DISABLED_MASKED_STRIDED: pred.load.if5: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP17:%.*]] = extractelement <8 x i32> [[TMP2]], i32 2 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP17:%.*]] = extractelement <8 x i32> [[TMP2]], i64 2 ; DISABLED_MASKED_STRIDED-NEXT: [[TMP18:%.*]] = getelementptr inbounds i8, i8* [[P]], i32 [[TMP17]] ; DISABLED_MASKED_STRIDED-NEXT: [[TMP19:%.*]] = load i8, i8* [[TMP18]], align 1 -; DISABLED_MASKED_STRIDED-NEXT: [[TMP20:%.*]] = insertelement <8 x i8> [[TMP15]], i8 [[TMP19]], i32 2 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP20:%.*]] = insertelement <8 x i8> [[TMP15]], i8 [[TMP19]], i64 2 ; DISABLED_MASKED_STRIDED-NEXT: br label [[PRED_LOAD_CONTINUE6]] ; DISABLED_MASKED_STRIDED: pred.load.continue6: ; DISABLED_MASKED_STRIDED-NEXT: [[TMP21:%.*]] = phi <8 x i8> [ [[TMP15]], [[PRED_LOAD_CONTINUE4]] ], [ [[TMP20]], [[PRED_LOAD_IF5]] ] -; DISABLED_MASKED_STRIDED-NEXT: [[TMP22:%.*]] = extractelement <8 x i1> [[TMP3]], i32 3 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP22:%.*]] = extractelement <8 x i1> [[TMP3]], i64 3 ; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP22]], label [[PRED_LOAD_IF7:%.*]], label [[PRED_LOAD_CONTINUE8:%.*]] ; DISABLED_MASKED_STRIDED: pred.load.if7: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP23:%.*]] = extractelement <8 x i32> [[TMP2]], i32 3 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP23:%.*]] = extractelement <8 x i32> [[TMP2]], i64 3 ; DISABLED_MASKED_STRIDED-NEXT: [[TMP24:%.*]] = getelementptr inbounds i8, i8* [[P]], i32 [[TMP23]] ; DISABLED_MASKED_STRIDED-NEXT: [[TMP25:%.*]] = load i8, i8* [[TMP24]], align 1 -; DISABLED_MASKED_STRIDED-NEXT: [[TMP26:%.*]] = insertelement <8 x i8> [[TMP21]], i8 [[TMP25]], i32 3 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP26:%.*]] = insertelement <8 x i8> [[TMP21]], i8 [[TMP25]], i64 3 ; DISABLED_MASKED_STRIDED-NEXT: br label [[PRED_LOAD_CONTINUE8]] ; DISABLED_MASKED_STRIDED: pred.load.continue8: ; DISABLED_MASKED_STRIDED-NEXT: [[TMP27:%.*]] = phi <8 x i8> [ [[TMP21]], [[PRED_LOAD_CONTINUE6]] ], [ [[TMP26]], [[PRED_LOAD_IF7]] ] -; DISABLED_MASKED_STRIDED-NEXT: [[TMP28:%.*]] = extractelement <8 x i1> [[TMP3]], i32 4 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP28:%.*]] = extractelement <8 x i1> [[TMP3]], i64 4 ; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP28]], label [[PRED_LOAD_IF9:%.*]], label [[PRED_LOAD_CONTINUE10:%.*]] ; DISABLED_MASKED_STRIDED: pred.load.if9: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP29:%.*]] = extractelement <8 x i32> [[TMP2]], i32 4 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP29:%.*]] = extractelement <8 x i32> [[TMP2]], i64 4 ; DISABLED_MASKED_STRIDED-NEXT: [[TMP30:%.*]] = getelementptr inbounds i8, i8* [[P]], i32 [[TMP29]] ; DISABLED_MASKED_STRIDED-NEXT: [[TMP31:%.*]] = load i8, i8* [[TMP30]], align 1 -; DISABLED_MASKED_STRIDED-NEXT: [[TMP32:%.*]] = insertelement <8 x i8> [[TMP27]], i8 [[TMP31]], i32 4 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP32:%.*]] = insertelement <8 x i8> [[TMP27]], i8 [[TMP31]], i64 4 ; DISABLED_MASKED_STRIDED-NEXT: br label [[PRED_LOAD_CONTINUE10]] ; DISABLED_MASKED_STRIDED: pred.load.continue10: ; DISABLED_MASKED_STRIDED-NEXT: [[TMP33:%.*]] = phi <8 x i8> [ [[TMP27]], [[PRED_LOAD_CONTINUE8]] ], [ [[TMP32]], [[PRED_LOAD_IF9]] ] -; DISABLED_MASKED_STRIDED-NEXT: [[TMP34:%.*]] = extractelement <8 x i1> [[TMP3]], i32 5 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP34:%.*]] = extractelement <8 x i1> [[TMP3]], i64 5 ; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP34]], label [[PRED_LOAD_IF11:%.*]], label [[PRED_LOAD_CONTINUE12:%.*]] ; DISABLED_MASKED_STRIDED: pred.load.if11: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP35:%.*]] = extractelement <8 x i32> [[TMP2]], i32 5 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP35:%.*]] = extractelement <8 x i32> [[TMP2]], i64 5 ; DISABLED_MASKED_STRIDED-NEXT: [[TMP36:%.*]] = getelementptr inbounds i8, i8* [[P]], i32 [[TMP35]] ; DISABLED_MASKED_STRIDED-NEXT: [[TMP37:%.*]] = load i8, i8* [[TMP36]], align 1 -; DISABLED_MASKED_STRIDED-NEXT: [[TMP38:%.*]] = insertelement <8 x i8> [[TMP33]], i8 [[TMP37]], i32 5 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP38:%.*]] = insertelement <8 x i8> [[TMP33]], i8 [[TMP37]], i64 5 ; DISABLED_MASKED_STRIDED-NEXT: br label [[PRED_LOAD_CONTINUE12]] ; DISABLED_MASKED_STRIDED: pred.load.continue12: ; DISABLED_MASKED_STRIDED-NEXT: [[TMP39:%.*]] = phi <8 x i8> [ [[TMP33]], [[PRED_LOAD_CONTINUE10]] ], [ [[TMP38]], [[PRED_LOAD_IF11]] ] -; DISABLED_MASKED_STRIDED-NEXT: [[TMP40:%.*]] = extractelement <8 x i1> [[TMP3]], i32 6 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP40:%.*]] = extractelement <8 x i1> [[TMP3]], i64 6 ; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP40]], label [[PRED_LOAD_IF13:%.*]], label [[PRED_LOAD_CONTINUE14:%.*]] ; DISABLED_MASKED_STRIDED: pred.load.if13: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP41:%.*]] = extractelement <8 x i32> [[TMP2]], i32 6 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP41:%.*]] = extractelement <8 x i32> [[TMP2]], i64 6 ; DISABLED_MASKED_STRIDED-NEXT: [[TMP42:%.*]] = getelementptr inbounds i8, i8* [[P]], i32 [[TMP41]] ; DISABLED_MASKED_STRIDED-NEXT: [[TMP43:%.*]] = load i8, i8* [[TMP42]], align 1 -; DISABLED_MASKED_STRIDED-NEXT: [[TMP44:%.*]] = insertelement <8 x i8> [[TMP39]], i8 [[TMP43]], i32 6 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP44:%.*]] = insertelement <8 x i8> [[TMP39]], i8 [[TMP43]], i64 6 ; DISABLED_MASKED_STRIDED-NEXT: br label [[PRED_LOAD_CONTINUE14]] ; DISABLED_MASKED_STRIDED: pred.load.continue14: ; DISABLED_MASKED_STRIDED-NEXT: [[TMP45:%.*]] = phi <8 x i8> [ [[TMP39]], [[PRED_LOAD_CONTINUE12]] ], [ [[TMP44]], [[PRED_LOAD_IF13]] ] -; DISABLED_MASKED_STRIDED-NEXT: [[TMP46:%.*]] = extractelement <8 x i1> [[TMP3]], i32 7 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP46:%.*]] = extractelement <8 x i1> [[TMP3]], i64 7 ; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP46]], label [[PRED_LOAD_IF15:%.*]], label [[PRED_LOAD_CONTINUE16]] ; DISABLED_MASKED_STRIDED: pred.load.if15: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP47:%.*]] = extractelement <8 x i32> [[TMP2]], i32 7 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP47:%.*]] = extractelement <8 x i32> [[TMP2]], i64 7 ; DISABLED_MASKED_STRIDED-NEXT: [[TMP48:%.*]] = getelementptr inbounds i8, i8* [[P]], i32 [[TMP47]] ; DISABLED_MASKED_STRIDED-NEXT: [[TMP49:%.*]] = load i8, i8* [[TMP48]], align 1 -; DISABLED_MASKED_STRIDED-NEXT: [[TMP50:%.*]] = insertelement <8 x i8> [[TMP45]], i8 [[TMP49]], i32 7 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP50:%.*]] = insertelement <8 x i8> [[TMP45]], i8 [[TMP49]], i64 7 ; DISABLED_MASKED_STRIDED-NEXT: br label [[PRED_LOAD_CONTINUE16]] ; DISABLED_MASKED_STRIDED: pred.load.continue16: ; DISABLED_MASKED_STRIDED-NEXT: [[TMP51:%.*]] = phi <8 x i8> [ [[TMP45]], [[PRED_LOAD_CONTINUE14]] ], [ [[TMP50]], [[PRED_LOAD_IF15]] ] @@ -715,9 +715,9 @@ ; ENABLED_MASKED_STRIDED-NEXT: [[N_RND_UP:%.*]] = add i32 [[N]], 7 ; ENABLED_MASKED_STRIDED-NEXT: [[N_VEC:%.*]] = and i32 [[N_RND_UP]], -8 ; ENABLED_MASKED_STRIDED-NEXT: [[TRIP_COUNT_MINUS_1:%.*]] = add i32 [[N]], -1 -; ENABLED_MASKED_STRIDED-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <8 x i32> poison, i32 [[TRIP_COUNT_MINUS_1]], i32 0 +; ENABLED_MASKED_STRIDED-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <8 x i32> poison, i32 [[TRIP_COUNT_MINUS_1]], i64 0 ; ENABLED_MASKED_STRIDED-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector <8 x i32> [[BROADCAST_SPLATINSERT]], <8 x i32> poison, <8 x i32> zeroinitializer -; ENABLED_MASKED_STRIDED-NEXT: [[BROADCAST_SPLATINSERT1:%.*]] = insertelement <8 x i32> poison, i32 [[CONV]], i32 0 +; ENABLED_MASKED_STRIDED-NEXT: [[BROADCAST_SPLATINSERT1:%.*]] = insertelement <8 x i32> poison, i32 [[CONV]], i64 0 ; ENABLED_MASKED_STRIDED-NEXT: [[BROADCAST_SPLAT2:%.*]] = shufflevector <8 x i32> [[BROADCAST_SPLATINSERT1]], <8 x i32> poison, <8 x i32> zeroinitializer ; ENABLED_MASKED_STRIDED-NEXT: br label [[VECTOR_BODY:%.*]] ; ENABLED_MASKED_STRIDED: vector.body: @@ -805,21 +805,21 @@ ; DISABLED_MASKED_STRIDED-NEXT: [[INDEX:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ] ; DISABLED_MASKED_STRIDED-NEXT: [[VEC_IND:%.*]] = phi <8 x i32> [ , [[ENTRY]] ], [ [[VEC_IND_NEXT:%.*]], [[VECTOR_BODY]] ] ; DISABLED_MASKED_STRIDED-NEXT: [[TMP0:%.*]] = shl nuw nsw <8 x i32> [[VEC_IND]], -; DISABLED_MASKED_STRIDED-NEXT: [[TMP1:%.*]] = extractelement <8 x i32> [[TMP0]], i32 0 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP1:%.*]] = extractelement <8 x i32> [[TMP0]], i64 0 ; DISABLED_MASKED_STRIDED-NEXT: [[TMP2:%.*]] = getelementptr inbounds i8, i8* [[P:%.*]], i32 [[TMP1]] -; DISABLED_MASKED_STRIDED-NEXT: [[TMP3:%.*]] = extractelement <8 x i32> [[TMP0]], i32 1 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP3:%.*]] = extractelement <8 x i32> [[TMP0]], i64 1 ; DISABLED_MASKED_STRIDED-NEXT: [[TMP4:%.*]] = getelementptr inbounds i8, i8* [[P]], i32 [[TMP3]] -; DISABLED_MASKED_STRIDED-NEXT: [[TMP5:%.*]] = extractelement <8 x i32> [[TMP0]], i32 2 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP5:%.*]] = extractelement <8 x i32> [[TMP0]], i64 2 ; DISABLED_MASKED_STRIDED-NEXT: [[TMP6:%.*]] = getelementptr inbounds i8, i8* [[P]], i32 [[TMP5]] -; DISABLED_MASKED_STRIDED-NEXT: [[TMP7:%.*]] = extractelement <8 x i32> [[TMP0]], i32 3 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP7:%.*]] = extractelement <8 x i32> [[TMP0]], i64 3 ; DISABLED_MASKED_STRIDED-NEXT: [[TMP8:%.*]] = getelementptr inbounds i8, i8* [[P]], i32 [[TMP7]] -; DISABLED_MASKED_STRIDED-NEXT: [[TMP9:%.*]] = extractelement <8 x i32> [[TMP0]], i32 4 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP9:%.*]] = extractelement <8 x i32> [[TMP0]], i64 4 ; DISABLED_MASKED_STRIDED-NEXT: [[TMP10:%.*]] = getelementptr inbounds i8, i8* [[P]], i32 [[TMP9]] -; DISABLED_MASKED_STRIDED-NEXT: [[TMP11:%.*]] = extractelement <8 x i32> [[TMP0]], i32 5 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP11:%.*]] = extractelement <8 x i32> [[TMP0]], i64 5 ; DISABLED_MASKED_STRIDED-NEXT: [[TMP12:%.*]] = getelementptr inbounds i8, i8* [[P]], i32 [[TMP11]] -; DISABLED_MASKED_STRIDED-NEXT: [[TMP13:%.*]] = extractelement <8 x i32> [[TMP0]], i32 6 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP13:%.*]] = extractelement <8 x i32> [[TMP0]], i64 6 ; DISABLED_MASKED_STRIDED-NEXT: [[TMP14:%.*]] = getelementptr inbounds i8, i8* [[P]], i32 [[TMP13]] -; DISABLED_MASKED_STRIDED-NEXT: [[TMP15:%.*]] = extractelement <8 x i32> [[TMP0]], i32 7 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP15:%.*]] = extractelement <8 x i32> [[TMP0]], i64 7 ; DISABLED_MASKED_STRIDED-NEXT: [[TMP16:%.*]] = getelementptr inbounds i8, i8* [[P]], i32 [[TMP15]] ; DISABLED_MASKED_STRIDED-NEXT: [[TMP17:%.*]] = load i8, i8* [[TMP2]], align 1 ; DISABLED_MASKED_STRIDED-NEXT: [[TMP18:%.*]] = load i8, i8* [[TMP4]], align 1 @@ -829,14 +829,14 @@ ; DISABLED_MASKED_STRIDED-NEXT: [[TMP22:%.*]] = load i8, i8* [[TMP12]], align 1 ; DISABLED_MASKED_STRIDED-NEXT: [[TMP23:%.*]] = load i8, i8* [[TMP14]], align 1 ; DISABLED_MASKED_STRIDED-NEXT: [[TMP24:%.*]] = load i8, i8* [[TMP16]], align 1 -; DISABLED_MASKED_STRIDED-NEXT: [[TMP25:%.*]] = insertelement <8 x i8> poison, i8 [[TMP17]], i32 0 -; DISABLED_MASKED_STRIDED-NEXT: [[TMP26:%.*]] = insertelement <8 x i8> [[TMP25]], i8 [[TMP18]], i32 1 -; DISABLED_MASKED_STRIDED-NEXT: [[TMP27:%.*]] = insertelement <8 x i8> [[TMP26]], i8 [[TMP19]], i32 2 -; DISABLED_MASKED_STRIDED-NEXT: [[TMP28:%.*]] = insertelement <8 x i8> [[TMP27]], i8 [[TMP20]], i32 3 -; DISABLED_MASKED_STRIDED-NEXT: [[TMP29:%.*]] = insertelement <8 x i8> [[TMP28]], i8 [[TMP21]], i32 4 -; DISABLED_MASKED_STRIDED-NEXT: [[TMP30:%.*]] = insertelement <8 x i8> [[TMP29]], i8 [[TMP22]], i32 5 -; DISABLED_MASKED_STRIDED-NEXT: [[TMP31:%.*]] = insertelement <8 x i8> [[TMP30]], i8 [[TMP23]], i32 6 -; DISABLED_MASKED_STRIDED-NEXT: [[TMP32:%.*]] = insertelement <8 x i8> [[TMP31]], i8 [[TMP24]], i32 7 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP25:%.*]] = insertelement <8 x i8> poison, i8 [[TMP17]], i64 0 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP26:%.*]] = insertelement <8 x i8> [[TMP25]], i8 [[TMP18]], i64 1 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP27:%.*]] = insertelement <8 x i8> [[TMP26]], i8 [[TMP19]], i64 2 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP28:%.*]] = insertelement <8 x i8> [[TMP27]], i8 [[TMP20]], i64 3 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP29:%.*]] = insertelement <8 x i8> [[TMP28]], i8 [[TMP21]], i64 4 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP30:%.*]] = insertelement <8 x i8> [[TMP29]], i8 [[TMP22]], i64 5 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP31:%.*]] = insertelement <8 x i8> [[TMP30]], i8 [[TMP23]], i64 6 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP32:%.*]] = insertelement <8 x i8> [[TMP31]], i8 [[TMP24]], i64 7 ; DISABLED_MASKED_STRIDED-NEXT: [[TMP33:%.*]] = getelementptr inbounds i8, i8* [[Q:%.*]], i32 [[INDEX]] ; DISABLED_MASKED_STRIDED-NEXT: [[TMP34:%.*]] = bitcast i8* [[TMP33]] to <8 x i8>* ; DISABLED_MASKED_STRIDED-NEXT: store <8 x i8> [[TMP32]], <8 x i8>* [[TMP34]], align 1 @@ -914,7 +914,7 @@ ; DISABLED_MASKED_STRIDED-NEXT: [[N_RND_UP:%.*]] = add i32 [[N]], 7 ; DISABLED_MASKED_STRIDED-NEXT: [[N_VEC:%.*]] = and i32 [[N_RND_UP]], -8 ; DISABLED_MASKED_STRIDED-NEXT: [[TRIP_COUNT_MINUS_1:%.*]] = add i32 [[N]], -1 -; DISABLED_MASKED_STRIDED-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <8 x i32> poison, i32 [[TRIP_COUNT_MINUS_1]], i32 0 +; DISABLED_MASKED_STRIDED-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <8 x i32> poison, i32 [[TRIP_COUNT_MINUS_1]], i64 0 ; DISABLED_MASKED_STRIDED-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector <8 x i32> [[BROADCAST_SPLATINSERT]], <8 x i32> poison, <8 x i32> zeroinitializer ; DISABLED_MASKED_STRIDED-NEXT: br label [[VECTOR_BODY:%.*]] ; DISABLED_MASKED_STRIDED: vector.body: @@ -922,83 +922,83 @@ ; DISABLED_MASKED_STRIDED-NEXT: [[VEC_IND:%.*]] = phi <8 x i32> [ , [[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], [[PRED_LOAD_CONTINUE14]] ] ; DISABLED_MASKED_STRIDED-NEXT: [[TMP0:%.*]] = icmp ule <8 x i32> [[VEC_IND]], [[BROADCAST_SPLAT]] ; DISABLED_MASKED_STRIDED-NEXT: [[TMP1:%.*]] = shl nuw nsw <8 x i32> [[VEC_IND]], -; DISABLED_MASKED_STRIDED-NEXT: [[TMP2:%.*]] = extractelement <8 x i1> [[TMP0]], i32 0 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP2:%.*]] = extractelement <8 x i1> [[TMP0]], i64 0 ; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP2]], label [[PRED_LOAD_IF:%.*]], label [[PRED_LOAD_CONTINUE:%.*]] ; DISABLED_MASKED_STRIDED: pred.load.if: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP3:%.*]] = extractelement <8 x i32> [[TMP1]], i32 0 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP3:%.*]] = extractelement <8 x i32> [[TMP1]], i64 0 ; DISABLED_MASKED_STRIDED-NEXT: [[TMP4:%.*]] = getelementptr inbounds i8, i8* [[P:%.*]], i32 [[TMP3]] ; DISABLED_MASKED_STRIDED-NEXT: [[TMP5:%.*]] = load i8, i8* [[TMP4]], align 1 -; DISABLED_MASKED_STRIDED-NEXT: [[TMP6:%.*]] = insertelement <8 x i8> poison, i8 [[TMP5]], i32 0 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP6:%.*]] = insertelement <8 x i8> poison, i8 [[TMP5]], i64 0 ; DISABLED_MASKED_STRIDED-NEXT: br label [[PRED_LOAD_CONTINUE]] ; DISABLED_MASKED_STRIDED: pred.load.continue: ; DISABLED_MASKED_STRIDED-NEXT: [[TMP7:%.*]] = phi <8 x i8> [ poison, [[VECTOR_BODY]] ], [ [[TMP6]], [[PRED_LOAD_IF]] ] -; DISABLED_MASKED_STRIDED-NEXT: [[TMP8:%.*]] = extractelement <8 x i1> [[TMP0]], i32 1 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP8:%.*]] = extractelement <8 x i1> [[TMP0]], i64 1 ; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP8]], label [[PRED_LOAD_IF1:%.*]], label [[PRED_LOAD_CONTINUE2:%.*]] ; DISABLED_MASKED_STRIDED: pred.load.if1: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP9:%.*]] = extractelement <8 x i32> [[TMP1]], i32 1 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP9:%.*]] = extractelement <8 x i32> [[TMP1]], i64 1 ; DISABLED_MASKED_STRIDED-NEXT: [[TMP10:%.*]] = getelementptr inbounds i8, i8* [[P]], i32 [[TMP9]] ; DISABLED_MASKED_STRIDED-NEXT: [[TMP11:%.*]] = load i8, i8* [[TMP10]], align 1 -; DISABLED_MASKED_STRIDED-NEXT: [[TMP12:%.*]] = insertelement <8 x i8> [[TMP7]], i8 [[TMP11]], i32 1 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP12:%.*]] = insertelement <8 x i8> [[TMP7]], i8 [[TMP11]], i64 1 ; DISABLED_MASKED_STRIDED-NEXT: br label [[PRED_LOAD_CONTINUE2]] ; DISABLED_MASKED_STRIDED: pred.load.continue2: ; DISABLED_MASKED_STRIDED-NEXT: [[TMP13:%.*]] = phi <8 x i8> [ [[TMP7]], [[PRED_LOAD_CONTINUE]] ], [ [[TMP12]], [[PRED_LOAD_IF1]] ] -; DISABLED_MASKED_STRIDED-NEXT: [[TMP14:%.*]] = extractelement <8 x i1> [[TMP0]], i32 2 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP14:%.*]] = extractelement <8 x i1> [[TMP0]], i64 2 ; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP14]], label [[PRED_LOAD_IF3:%.*]], label [[PRED_LOAD_CONTINUE4:%.*]] ; DISABLED_MASKED_STRIDED: pred.load.if3: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP15:%.*]] = extractelement <8 x i32> [[TMP1]], i32 2 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP15:%.*]] = extractelement <8 x i32> [[TMP1]], i64 2 ; DISABLED_MASKED_STRIDED-NEXT: [[TMP16:%.*]] = getelementptr inbounds i8, i8* [[P]], i32 [[TMP15]] ; DISABLED_MASKED_STRIDED-NEXT: [[TMP17:%.*]] = load i8, i8* [[TMP16]], align 1 -; DISABLED_MASKED_STRIDED-NEXT: [[TMP18:%.*]] = insertelement <8 x i8> [[TMP13]], i8 [[TMP17]], i32 2 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP18:%.*]] = insertelement <8 x i8> [[TMP13]], i8 [[TMP17]], i64 2 ; DISABLED_MASKED_STRIDED-NEXT: br label [[PRED_LOAD_CONTINUE4]] ; DISABLED_MASKED_STRIDED: pred.load.continue4: ; DISABLED_MASKED_STRIDED-NEXT: [[TMP19:%.*]] = phi <8 x i8> [ [[TMP13]], [[PRED_LOAD_CONTINUE2]] ], [ [[TMP18]], [[PRED_LOAD_IF3]] ] -; DISABLED_MASKED_STRIDED-NEXT: [[TMP20:%.*]] = extractelement <8 x i1> [[TMP0]], i32 3 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP20:%.*]] = extractelement <8 x i1> [[TMP0]], i64 3 ; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP20]], label [[PRED_LOAD_IF5:%.*]], label [[PRED_LOAD_CONTINUE6:%.*]] ; DISABLED_MASKED_STRIDED: pred.load.if5: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP21:%.*]] = extractelement <8 x i32> [[TMP1]], i32 3 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP21:%.*]] = extractelement <8 x i32> [[TMP1]], i64 3 ; DISABLED_MASKED_STRIDED-NEXT: [[TMP22:%.*]] = getelementptr inbounds i8, i8* [[P]], i32 [[TMP21]] ; DISABLED_MASKED_STRIDED-NEXT: [[TMP23:%.*]] = load i8, i8* [[TMP22]], align 1 -; DISABLED_MASKED_STRIDED-NEXT: [[TMP24:%.*]] = insertelement <8 x i8> [[TMP19]], i8 [[TMP23]], i32 3 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP24:%.*]] = insertelement <8 x i8> [[TMP19]], i8 [[TMP23]], i64 3 ; DISABLED_MASKED_STRIDED-NEXT: br label [[PRED_LOAD_CONTINUE6]] ; DISABLED_MASKED_STRIDED: pred.load.continue6: ; DISABLED_MASKED_STRIDED-NEXT: [[TMP25:%.*]] = phi <8 x i8> [ [[TMP19]], [[PRED_LOAD_CONTINUE4]] ], [ [[TMP24]], [[PRED_LOAD_IF5]] ] -; DISABLED_MASKED_STRIDED-NEXT: [[TMP26:%.*]] = extractelement <8 x i1> [[TMP0]], i32 4 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP26:%.*]] = extractelement <8 x i1> [[TMP0]], i64 4 ; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP26]], label [[PRED_LOAD_IF7:%.*]], label [[PRED_LOAD_CONTINUE8:%.*]] ; DISABLED_MASKED_STRIDED: pred.load.if7: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP27:%.*]] = extractelement <8 x i32> [[TMP1]], i32 4 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP27:%.*]] = extractelement <8 x i32> [[TMP1]], i64 4 ; DISABLED_MASKED_STRIDED-NEXT: [[TMP28:%.*]] = getelementptr inbounds i8, i8* [[P]], i32 [[TMP27]] ; DISABLED_MASKED_STRIDED-NEXT: [[TMP29:%.*]] = load i8, i8* [[TMP28]], align 1 -; DISABLED_MASKED_STRIDED-NEXT: [[TMP30:%.*]] = insertelement <8 x i8> [[TMP25]], i8 [[TMP29]], i32 4 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP30:%.*]] = insertelement <8 x i8> [[TMP25]], i8 [[TMP29]], i64 4 ; DISABLED_MASKED_STRIDED-NEXT: br label [[PRED_LOAD_CONTINUE8]] ; DISABLED_MASKED_STRIDED: pred.load.continue8: ; DISABLED_MASKED_STRIDED-NEXT: [[TMP31:%.*]] = phi <8 x i8> [ [[TMP25]], [[PRED_LOAD_CONTINUE6]] ], [ [[TMP30]], [[PRED_LOAD_IF7]] ] -; DISABLED_MASKED_STRIDED-NEXT: [[TMP32:%.*]] = extractelement <8 x i1> [[TMP0]], i32 5 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP32:%.*]] = extractelement <8 x i1> [[TMP0]], i64 5 ; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP32]], label [[PRED_LOAD_IF9:%.*]], label [[PRED_LOAD_CONTINUE10:%.*]] ; DISABLED_MASKED_STRIDED: pred.load.if9: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP33:%.*]] = extractelement <8 x i32> [[TMP1]], i32 5 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP33:%.*]] = extractelement <8 x i32> [[TMP1]], i64 5 ; DISABLED_MASKED_STRIDED-NEXT: [[TMP34:%.*]] = getelementptr inbounds i8, i8* [[P]], i32 [[TMP33]] ; DISABLED_MASKED_STRIDED-NEXT: [[TMP35:%.*]] = load i8, i8* [[TMP34]], align 1 -; DISABLED_MASKED_STRIDED-NEXT: [[TMP36:%.*]] = insertelement <8 x i8> [[TMP31]], i8 [[TMP35]], i32 5 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP36:%.*]] = insertelement <8 x i8> [[TMP31]], i8 [[TMP35]], i64 5 ; DISABLED_MASKED_STRIDED-NEXT: br label [[PRED_LOAD_CONTINUE10]] ; DISABLED_MASKED_STRIDED: pred.load.continue10: ; DISABLED_MASKED_STRIDED-NEXT: [[TMP37:%.*]] = phi <8 x i8> [ [[TMP31]], [[PRED_LOAD_CONTINUE8]] ], [ [[TMP36]], [[PRED_LOAD_IF9]] ] -; DISABLED_MASKED_STRIDED-NEXT: [[TMP38:%.*]] = extractelement <8 x i1> [[TMP0]], i32 6 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP38:%.*]] = extractelement <8 x i1> [[TMP0]], i64 6 ; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP38]], label [[PRED_LOAD_IF11:%.*]], label [[PRED_LOAD_CONTINUE12:%.*]] ; DISABLED_MASKED_STRIDED: pred.load.if11: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP39:%.*]] = extractelement <8 x i32> [[TMP1]], i32 6 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP39:%.*]] = extractelement <8 x i32> [[TMP1]], i64 6 ; DISABLED_MASKED_STRIDED-NEXT: [[TMP40:%.*]] = getelementptr inbounds i8, i8* [[P]], i32 [[TMP39]] ; DISABLED_MASKED_STRIDED-NEXT: [[TMP41:%.*]] = load i8, i8* [[TMP40]], align 1 -; DISABLED_MASKED_STRIDED-NEXT: [[TMP42:%.*]] = insertelement <8 x i8> [[TMP37]], i8 [[TMP41]], i32 6 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP42:%.*]] = insertelement <8 x i8> [[TMP37]], i8 [[TMP41]], i64 6 ; DISABLED_MASKED_STRIDED-NEXT: br label [[PRED_LOAD_CONTINUE12]] ; DISABLED_MASKED_STRIDED: pred.load.continue12: ; DISABLED_MASKED_STRIDED-NEXT: [[TMP43:%.*]] = phi <8 x i8> [ [[TMP37]], [[PRED_LOAD_CONTINUE10]] ], [ [[TMP42]], [[PRED_LOAD_IF11]] ] -; DISABLED_MASKED_STRIDED-NEXT: [[TMP44:%.*]] = extractelement <8 x i1> [[TMP0]], i32 7 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP44:%.*]] = extractelement <8 x i1> [[TMP0]], i64 7 ; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP44]], label [[PRED_LOAD_IF13:%.*]], label [[PRED_LOAD_CONTINUE14]] ; DISABLED_MASKED_STRIDED: pred.load.if13: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP45:%.*]] = extractelement <8 x i32> [[TMP1]], i32 7 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP45:%.*]] = extractelement <8 x i32> [[TMP1]], i64 7 ; DISABLED_MASKED_STRIDED-NEXT: [[TMP46:%.*]] = getelementptr inbounds i8, i8* [[P]], i32 [[TMP45]] ; DISABLED_MASKED_STRIDED-NEXT: [[TMP47:%.*]] = load i8, i8* [[TMP46]], align 1 -; DISABLED_MASKED_STRIDED-NEXT: [[TMP48:%.*]] = insertelement <8 x i8> [[TMP43]], i8 [[TMP47]], i32 7 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP48:%.*]] = insertelement <8 x i8> [[TMP43]], i8 [[TMP47]], i64 7 ; DISABLED_MASKED_STRIDED-NEXT: br label [[PRED_LOAD_CONTINUE14]] ; DISABLED_MASKED_STRIDED: pred.load.continue14: ; DISABLED_MASKED_STRIDED-NEXT: [[TMP49:%.*]] = phi <8 x i8> [ [[TMP43]], [[PRED_LOAD_CONTINUE12]] ], [ [[TMP48]], [[PRED_LOAD_IF13]] ] @@ -1020,12 +1020,12 @@ ; ENABLED_MASKED_STRIDED-NEXT: [[N_RND_UP:%.*]] = add i32 [[N]], 7 ; ENABLED_MASKED_STRIDED-NEXT: [[N_VEC:%.*]] = and i32 [[N_RND_UP]], -8 ; ENABLED_MASKED_STRIDED-NEXT: [[TRIP_COUNT_MINUS_1:%.*]] = add i32 [[N]], -1 -; ENABLED_MASKED_STRIDED-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <8 x i32> poison, i32 [[TRIP_COUNT_MINUS_1]], i32 0 +; ENABLED_MASKED_STRIDED-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <8 x i32> poison, i32 [[TRIP_COUNT_MINUS_1]], i64 0 ; ENABLED_MASKED_STRIDED-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector <8 x i32> [[BROADCAST_SPLATINSERT]], <8 x i32> poison, <8 x i32> zeroinitializer ; ENABLED_MASKED_STRIDED-NEXT: br label [[VECTOR_BODY:%.*]] ; ENABLED_MASKED_STRIDED: vector.body: ; ENABLED_MASKED_STRIDED-NEXT: [[INDEX:%.*]] = phi i32 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ] -; ENABLED_MASKED_STRIDED-NEXT: [[BROADCAST_SPLATINSERT1:%.*]] = insertelement <8 x i32> poison, i32 [[INDEX]], i32 0 +; ENABLED_MASKED_STRIDED-NEXT: [[BROADCAST_SPLATINSERT1:%.*]] = insertelement <8 x i32> poison, i32 [[INDEX]], i64 0 ; ENABLED_MASKED_STRIDED-NEXT: [[BROADCAST_SPLAT2:%.*]] = shufflevector <8 x i32> [[BROADCAST_SPLATINSERT1]], <8 x i32> poison, <8 x i32> zeroinitializer ; ENABLED_MASKED_STRIDED-NEXT: [[INDUCTION:%.*]] = or <8 x i32> [[BROADCAST_SPLAT2]], ; ENABLED_MASKED_STRIDED-NEXT: [[TMP0:%.*]] = icmp ule <8 x i32> [[INDUCTION]], [[BROADCAST_SPLAT]] @@ -1099,7 +1099,7 @@ ; DISABLED_MASKED_STRIDED-LABEL: @masked_strided2( ; DISABLED_MASKED_STRIDED-NEXT: entry: ; DISABLED_MASKED_STRIDED-NEXT: [[CONV:%.*]] = zext i8 [[GUARD:%.*]] to i32 -; DISABLED_MASKED_STRIDED-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <8 x i32> poison, i32 [[CONV]], i32 0 +; DISABLED_MASKED_STRIDED-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <8 x i32> poison, i32 [[CONV]], i64 0 ; DISABLED_MASKED_STRIDED-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector <8 x i32> [[BROADCAST_SPLATINSERT]], <8 x i32> poison, <8 x i32> zeroinitializer ; DISABLED_MASKED_STRIDED-NEXT: br label [[VECTOR_BODY:%.*]] ; DISABLED_MASKED_STRIDED: vector.body: @@ -1107,311 +1107,311 @@ ; DISABLED_MASKED_STRIDED-NEXT: [[VEC_IND:%.*]] = phi <8 x i32> [ , [[ENTRY]] ], [ [[VEC_IND_NEXT:%.*]], [[PRED_STORE_CONTINUE60]] ] ; DISABLED_MASKED_STRIDED-NEXT: [[TMP0:%.*]] = icmp ugt <8 x i32> [[VEC_IND]], [[BROADCAST_SPLAT]] ; DISABLED_MASKED_STRIDED-NEXT: [[TMP1:%.*]] = shl nuw nsw <8 x i32> [[VEC_IND]], -; DISABLED_MASKED_STRIDED-NEXT: [[TMP2:%.*]] = extractelement <8 x i1> [[TMP0]], i32 0 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP2:%.*]] = extractelement <8 x i1> [[TMP0]], i64 0 ; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP2]], label [[PRED_LOAD_IF:%.*]], label [[PRED_LOAD_CONTINUE:%.*]] ; DISABLED_MASKED_STRIDED: pred.load.if: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP3:%.*]] = extractelement <8 x i32> [[TMP1]], i32 0 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP3:%.*]] = extractelement <8 x i32> [[TMP1]], i64 0 ; DISABLED_MASKED_STRIDED-NEXT: [[TMP4:%.*]] = getelementptr inbounds i8, i8* [[P:%.*]], i32 [[TMP3]] ; DISABLED_MASKED_STRIDED-NEXT: [[TMP5:%.*]] = load i8, i8* [[TMP4]], align 1 -; DISABLED_MASKED_STRIDED-NEXT: [[TMP6:%.*]] = insertelement <8 x i8> poison, i8 [[TMP5]], i32 0 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP6:%.*]] = insertelement <8 x i8> poison, i8 [[TMP5]], i64 0 ; DISABLED_MASKED_STRIDED-NEXT: br label [[PRED_LOAD_CONTINUE]] ; DISABLED_MASKED_STRIDED: pred.load.continue: ; DISABLED_MASKED_STRIDED-NEXT: [[TMP7:%.*]] = phi <8 x i8> [ poison, [[VECTOR_BODY]] ], [ [[TMP6]], [[PRED_LOAD_IF]] ] -; DISABLED_MASKED_STRIDED-NEXT: [[TMP8:%.*]] = extractelement <8 x i1> [[TMP0]], i32 1 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP8:%.*]] = extractelement <8 x i1> [[TMP0]], i64 1 ; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP8]], label [[PRED_LOAD_IF1:%.*]], label [[PRED_LOAD_CONTINUE2:%.*]] ; DISABLED_MASKED_STRIDED: pred.load.if1: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP9:%.*]] = extractelement <8 x i32> [[TMP1]], i32 1 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP9:%.*]] = extractelement <8 x i32> [[TMP1]], i64 1 ; DISABLED_MASKED_STRIDED-NEXT: [[TMP10:%.*]] = getelementptr inbounds i8, i8* [[P]], i32 [[TMP9]] ; DISABLED_MASKED_STRIDED-NEXT: [[TMP11:%.*]] = load i8, i8* [[TMP10]], align 1 -; DISABLED_MASKED_STRIDED-NEXT: [[TMP12:%.*]] = insertelement <8 x i8> [[TMP7]], i8 [[TMP11]], i32 1 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP12:%.*]] = insertelement <8 x i8> [[TMP7]], i8 [[TMP11]], i64 1 ; DISABLED_MASKED_STRIDED-NEXT: br label [[PRED_LOAD_CONTINUE2]] ; DISABLED_MASKED_STRIDED: pred.load.continue2: ; DISABLED_MASKED_STRIDED-NEXT: [[TMP13:%.*]] = phi <8 x i8> [ [[TMP7]], [[PRED_LOAD_CONTINUE]] ], [ [[TMP12]], [[PRED_LOAD_IF1]] ] -; DISABLED_MASKED_STRIDED-NEXT: [[TMP14:%.*]] = extractelement <8 x i1> [[TMP0]], i32 2 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP14:%.*]] = extractelement <8 x i1> [[TMP0]], i64 2 ; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP14]], label [[PRED_LOAD_IF3:%.*]], label [[PRED_LOAD_CONTINUE4:%.*]] ; DISABLED_MASKED_STRIDED: pred.load.if3: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP15:%.*]] = extractelement <8 x i32> [[TMP1]], i32 2 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP15:%.*]] = extractelement <8 x i32> [[TMP1]], i64 2 ; DISABLED_MASKED_STRIDED-NEXT: [[TMP16:%.*]] = getelementptr inbounds i8, i8* [[P]], i32 [[TMP15]] ; DISABLED_MASKED_STRIDED-NEXT: [[TMP17:%.*]] = load i8, i8* [[TMP16]], align 1 -; DISABLED_MASKED_STRIDED-NEXT: [[TMP18:%.*]] = insertelement <8 x i8> [[TMP13]], i8 [[TMP17]], i32 2 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP18:%.*]] = insertelement <8 x i8> [[TMP13]], i8 [[TMP17]], i64 2 ; DISABLED_MASKED_STRIDED-NEXT: br label [[PRED_LOAD_CONTINUE4]] ; DISABLED_MASKED_STRIDED: pred.load.continue4: ; DISABLED_MASKED_STRIDED-NEXT: [[TMP19:%.*]] = phi <8 x i8> [ [[TMP13]], [[PRED_LOAD_CONTINUE2]] ], [ [[TMP18]], [[PRED_LOAD_IF3]] ] -; DISABLED_MASKED_STRIDED-NEXT: [[TMP20:%.*]] = extractelement <8 x i1> [[TMP0]], i32 3 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP20:%.*]] = extractelement <8 x i1> [[TMP0]], i64 3 ; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP20]], label [[PRED_LOAD_IF5:%.*]], label [[PRED_LOAD_CONTINUE6:%.*]] ; DISABLED_MASKED_STRIDED: pred.load.if5: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP21:%.*]] = extractelement <8 x i32> [[TMP1]], i32 3 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP21:%.*]] = extractelement <8 x i32> [[TMP1]], i64 3 ; DISABLED_MASKED_STRIDED-NEXT: [[TMP22:%.*]] = getelementptr inbounds i8, i8* [[P]], i32 [[TMP21]] ; DISABLED_MASKED_STRIDED-NEXT: [[TMP23:%.*]] = load i8, i8* [[TMP22]], align 1 -; DISABLED_MASKED_STRIDED-NEXT: [[TMP24:%.*]] = insertelement <8 x i8> [[TMP19]], i8 [[TMP23]], i32 3 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP24:%.*]] = insertelement <8 x i8> [[TMP19]], i8 [[TMP23]], i64 3 ; DISABLED_MASKED_STRIDED-NEXT: br label [[PRED_LOAD_CONTINUE6]] ; DISABLED_MASKED_STRIDED: pred.load.continue6: ; DISABLED_MASKED_STRIDED-NEXT: [[TMP25:%.*]] = phi <8 x i8> [ [[TMP19]], [[PRED_LOAD_CONTINUE4]] ], [ [[TMP24]], [[PRED_LOAD_IF5]] ] -; DISABLED_MASKED_STRIDED-NEXT: [[TMP26:%.*]] = extractelement <8 x i1> [[TMP0]], i32 4 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP26:%.*]] = extractelement <8 x i1> [[TMP0]], i64 4 ; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP26]], label [[PRED_LOAD_IF7:%.*]], label [[PRED_LOAD_CONTINUE8:%.*]] ; DISABLED_MASKED_STRIDED: pred.load.if7: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP27:%.*]] = extractelement <8 x i32> [[TMP1]], i32 4 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP27:%.*]] = extractelement <8 x i32> [[TMP1]], i64 4 ; DISABLED_MASKED_STRIDED-NEXT: [[TMP28:%.*]] = getelementptr inbounds i8, i8* [[P]], i32 [[TMP27]] ; DISABLED_MASKED_STRIDED-NEXT: [[TMP29:%.*]] = load i8, i8* [[TMP28]], align 1 -; DISABLED_MASKED_STRIDED-NEXT: [[TMP30:%.*]] = insertelement <8 x i8> [[TMP25]], i8 [[TMP29]], i32 4 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP30:%.*]] = insertelement <8 x i8> [[TMP25]], i8 [[TMP29]], i64 4 ; DISABLED_MASKED_STRIDED-NEXT: br label [[PRED_LOAD_CONTINUE8]] ; DISABLED_MASKED_STRIDED: pred.load.continue8: ; DISABLED_MASKED_STRIDED-NEXT: [[TMP31:%.*]] = phi <8 x i8> [ [[TMP25]], [[PRED_LOAD_CONTINUE6]] ], [ [[TMP30]], [[PRED_LOAD_IF7]] ] -; DISABLED_MASKED_STRIDED-NEXT: [[TMP32:%.*]] = extractelement <8 x i1> [[TMP0]], i32 5 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP32:%.*]] = extractelement <8 x i1> [[TMP0]], i64 5 ; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP32]], label [[PRED_LOAD_IF9:%.*]], label [[PRED_LOAD_CONTINUE10:%.*]] ; DISABLED_MASKED_STRIDED: pred.load.if9: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP33:%.*]] = extractelement <8 x i32> [[TMP1]], i32 5 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP33:%.*]] = extractelement <8 x i32> [[TMP1]], i64 5 ; DISABLED_MASKED_STRIDED-NEXT: [[TMP34:%.*]] = getelementptr inbounds i8, i8* [[P]], i32 [[TMP33]] ; DISABLED_MASKED_STRIDED-NEXT: [[TMP35:%.*]] = load i8, i8* [[TMP34]], align 1 -; DISABLED_MASKED_STRIDED-NEXT: [[TMP36:%.*]] = insertelement <8 x i8> [[TMP31]], i8 [[TMP35]], i32 5 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP36:%.*]] = insertelement <8 x i8> [[TMP31]], i8 [[TMP35]], i64 5 ; DISABLED_MASKED_STRIDED-NEXT: br label [[PRED_LOAD_CONTINUE10]] ; DISABLED_MASKED_STRIDED: pred.load.continue10: ; DISABLED_MASKED_STRIDED-NEXT: [[TMP37:%.*]] = phi <8 x i8> [ [[TMP31]], [[PRED_LOAD_CONTINUE8]] ], [ [[TMP36]], [[PRED_LOAD_IF9]] ] -; DISABLED_MASKED_STRIDED-NEXT: [[TMP38:%.*]] = extractelement <8 x i1> [[TMP0]], i32 6 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP38:%.*]] = extractelement <8 x i1> [[TMP0]], i64 6 ; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP38]], label [[PRED_LOAD_IF11:%.*]], label [[PRED_LOAD_CONTINUE12:%.*]] ; DISABLED_MASKED_STRIDED: pred.load.if11: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP39:%.*]] = extractelement <8 x i32> [[TMP1]], i32 6 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP39:%.*]] = extractelement <8 x i32> [[TMP1]], i64 6 ; DISABLED_MASKED_STRIDED-NEXT: [[TMP40:%.*]] = getelementptr inbounds i8, i8* [[P]], i32 [[TMP39]] ; DISABLED_MASKED_STRIDED-NEXT: [[TMP41:%.*]] = load i8, i8* [[TMP40]], align 1 -; DISABLED_MASKED_STRIDED-NEXT: [[TMP42:%.*]] = insertelement <8 x i8> [[TMP37]], i8 [[TMP41]], i32 6 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP42:%.*]] = insertelement <8 x i8> [[TMP37]], i8 [[TMP41]], i64 6 ; DISABLED_MASKED_STRIDED-NEXT: br label [[PRED_LOAD_CONTINUE12]] ; DISABLED_MASKED_STRIDED: pred.load.continue12: ; DISABLED_MASKED_STRIDED-NEXT: [[TMP43:%.*]] = phi <8 x i8> [ [[TMP37]], [[PRED_LOAD_CONTINUE10]] ], [ [[TMP42]], [[PRED_LOAD_IF11]] ] -; DISABLED_MASKED_STRIDED-NEXT: [[TMP44:%.*]] = extractelement <8 x i1> [[TMP0]], i32 7 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP44:%.*]] = extractelement <8 x i1> [[TMP0]], i64 7 ; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP44]], label [[PRED_LOAD_IF13:%.*]], label [[PRED_LOAD_CONTINUE14:%.*]] ; DISABLED_MASKED_STRIDED: pred.load.if13: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP45:%.*]] = extractelement <8 x i32> [[TMP1]], i32 7 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP45:%.*]] = extractelement <8 x i32> [[TMP1]], i64 7 ; DISABLED_MASKED_STRIDED-NEXT: [[TMP46:%.*]] = getelementptr inbounds i8, i8* [[P]], i32 [[TMP45]] ; DISABLED_MASKED_STRIDED-NEXT: [[TMP47:%.*]] = load i8, i8* [[TMP46]], align 1 -; DISABLED_MASKED_STRIDED-NEXT: [[TMP48:%.*]] = insertelement <8 x i8> [[TMP43]], i8 [[TMP47]], i32 7 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP48:%.*]] = insertelement <8 x i8> [[TMP43]], i8 [[TMP47]], i64 7 ; DISABLED_MASKED_STRIDED-NEXT: br label [[PRED_LOAD_CONTINUE14]] ; DISABLED_MASKED_STRIDED: pred.load.continue14: ; DISABLED_MASKED_STRIDED-NEXT: [[TMP49:%.*]] = phi <8 x i8> [ [[TMP43]], [[PRED_LOAD_CONTINUE12]] ], [ [[TMP48]], [[PRED_LOAD_IF13]] ] ; DISABLED_MASKED_STRIDED-NEXT: [[TMP50:%.*]] = or <8 x i32> [[TMP1]], -; DISABLED_MASKED_STRIDED-NEXT: [[TMP51:%.*]] = extractelement <8 x i1> [[TMP0]], i32 0 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP51:%.*]] = extractelement <8 x i1> [[TMP0]], i64 0 ; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP51]], label [[PRED_LOAD_IF15:%.*]], label [[PRED_LOAD_CONTINUE16:%.*]] ; DISABLED_MASKED_STRIDED: pred.load.if15: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP52:%.*]] = extractelement <8 x i32> [[TMP50]], i32 0 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP52:%.*]] = extractelement <8 x i32> [[TMP50]], i64 0 ; DISABLED_MASKED_STRIDED-NEXT: [[TMP53:%.*]] = getelementptr inbounds i8, i8* [[P]], i32 [[TMP52]] ; DISABLED_MASKED_STRIDED-NEXT: [[TMP54:%.*]] = load i8, i8* [[TMP53]], align 1 -; DISABLED_MASKED_STRIDED-NEXT: [[TMP55:%.*]] = insertelement <8 x i8> poison, i8 [[TMP54]], i32 0 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP55:%.*]] = insertelement <8 x i8> poison, i8 [[TMP54]], i64 0 ; DISABLED_MASKED_STRIDED-NEXT: br label [[PRED_LOAD_CONTINUE16]] ; DISABLED_MASKED_STRIDED: pred.load.continue16: ; DISABLED_MASKED_STRIDED-NEXT: [[TMP56:%.*]] = phi <8 x i8> [ poison, [[PRED_LOAD_CONTINUE14]] ], [ [[TMP55]], [[PRED_LOAD_IF15]] ] -; DISABLED_MASKED_STRIDED-NEXT: [[TMP57:%.*]] = extractelement <8 x i1> [[TMP0]], i32 1 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP57:%.*]] = extractelement <8 x i1> [[TMP0]], i64 1 ; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP57]], label [[PRED_LOAD_IF17:%.*]], label [[PRED_LOAD_CONTINUE18:%.*]] ; DISABLED_MASKED_STRIDED: pred.load.if17: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP58:%.*]] = extractelement <8 x i32> [[TMP50]], i32 1 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP58:%.*]] = extractelement <8 x i32> [[TMP50]], i64 1 ; DISABLED_MASKED_STRIDED-NEXT: [[TMP59:%.*]] = getelementptr inbounds i8, i8* [[P]], i32 [[TMP58]] ; DISABLED_MASKED_STRIDED-NEXT: [[TMP60:%.*]] = load i8, i8* [[TMP59]], align 1 -; DISABLED_MASKED_STRIDED-NEXT: [[TMP61:%.*]] = insertelement <8 x i8> [[TMP56]], i8 [[TMP60]], i32 1 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP61:%.*]] = insertelement <8 x i8> [[TMP56]], i8 [[TMP60]], i64 1 ; DISABLED_MASKED_STRIDED-NEXT: br label [[PRED_LOAD_CONTINUE18]] ; DISABLED_MASKED_STRIDED: pred.load.continue18: ; DISABLED_MASKED_STRIDED-NEXT: [[TMP62:%.*]] = phi <8 x i8> [ [[TMP56]], [[PRED_LOAD_CONTINUE16]] ], [ [[TMP61]], [[PRED_LOAD_IF17]] ] -; DISABLED_MASKED_STRIDED-NEXT: [[TMP63:%.*]] = extractelement <8 x i1> [[TMP0]], i32 2 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP63:%.*]] = extractelement <8 x i1> [[TMP0]], i64 2 ; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP63]], label [[PRED_LOAD_IF19:%.*]], label [[PRED_LOAD_CONTINUE20:%.*]] ; DISABLED_MASKED_STRIDED: pred.load.if19: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP64:%.*]] = extractelement <8 x i32> [[TMP50]], i32 2 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP64:%.*]] = extractelement <8 x i32> [[TMP50]], i64 2 ; DISABLED_MASKED_STRIDED-NEXT: [[TMP65:%.*]] = getelementptr inbounds i8, i8* [[P]], i32 [[TMP64]] ; DISABLED_MASKED_STRIDED-NEXT: [[TMP66:%.*]] = load i8, i8* [[TMP65]], align 1 -; DISABLED_MASKED_STRIDED-NEXT: [[TMP67:%.*]] = insertelement <8 x i8> [[TMP62]], i8 [[TMP66]], i32 2 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP67:%.*]] = insertelement <8 x i8> [[TMP62]], i8 [[TMP66]], i64 2 ; DISABLED_MASKED_STRIDED-NEXT: br label [[PRED_LOAD_CONTINUE20]] ; DISABLED_MASKED_STRIDED: pred.load.continue20: ; DISABLED_MASKED_STRIDED-NEXT: [[TMP68:%.*]] = phi <8 x i8> [ [[TMP62]], [[PRED_LOAD_CONTINUE18]] ], [ [[TMP67]], [[PRED_LOAD_IF19]] ] -; DISABLED_MASKED_STRIDED-NEXT: [[TMP69:%.*]] = extractelement <8 x i1> [[TMP0]], i32 3 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP69:%.*]] = extractelement <8 x i1> [[TMP0]], i64 3 ; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP69]], label [[PRED_LOAD_IF21:%.*]], label [[PRED_LOAD_CONTINUE22:%.*]] ; DISABLED_MASKED_STRIDED: pred.load.if21: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP70:%.*]] = extractelement <8 x i32> [[TMP50]], i32 3 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP70:%.*]] = extractelement <8 x i32> [[TMP50]], i64 3 ; DISABLED_MASKED_STRIDED-NEXT: [[TMP71:%.*]] = getelementptr inbounds i8, i8* [[P]], i32 [[TMP70]] ; DISABLED_MASKED_STRIDED-NEXT: [[TMP72:%.*]] = load i8, i8* [[TMP71]], align 1 -; DISABLED_MASKED_STRIDED-NEXT: [[TMP73:%.*]] = insertelement <8 x i8> [[TMP68]], i8 [[TMP72]], i32 3 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP73:%.*]] = insertelement <8 x i8> [[TMP68]], i8 [[TMP72]], i64 3 ; DISABLED_MASKED_STRIDED-NEXT: br label [[PRED_LOAD_CONTINUE22]] ; DISABLED_MASKED_STRIDED: pred.load.continue22: ; DISABLED_MASKED_STRIDED-NEXT: [[TMP74:%.*]] = phi <8 x i8> [ [[TMP68]], [[PRED_LOAD_CONTINUE20]] ], [ [[TMP73]], [[PRED_LOAD_IF21]] ] -; DISABLED_MASKED_STRIDED-NEXT: [[TMP75:%.*]] = extractelement <8 x i1> [[TMP0]], i32 4 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP75:%.*]] = extractelement <8 x i1> [[TMP0]], i64 4 ; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP75]], label [[PRED_LOAD_IF23:%.*]], label [[PRED_LOAD_CONTINUE24:%.*]] ; DISABLED_MASKED_STRIDED: pred.load.if23: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP76:%.*]] = extractelement <8 x i32> [[TMP50]], i32 4 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP76:%.*]] = extractelement <8 x i32> [[TMP50]], i64 4 ; DISABLED_MASKED_STRIDED-NEXT: [[TMP77:%.*]] = getelementptr inbounds i8, i8* [[P]], i32 [[TMP76]] ; DISABLED_MASKED_STRIDED-NEXT: [[TMP78:%.*]] = load i8, i8* [[TMP77]], align 1 -; DISABLED_MASKED_STRIDED-NEXT: [[TMP79:%.*]] = insertelement <8 x i8> [[TMP74]], i8 [[TMP78]], i32 4 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP79:%.*]] = insertelement <8 x i8> [[TMP74]], i8 [[TMP78]], i64 4 ; DISABLED_MASKED_STRIDED-NEXT: br label [[PRED_LOAD_CONTINUE24]] ; DISABLED_MASKED_STRIDED: pred.load.continue24: ; DISABLED_MASKED_STRIDED-NEXT: [[TMP80:%.*]] = phi <8 x i8> [ [[TMP74]], [[PRED_LOAD_CONTINUE22]] ], [ [[TMP79]], [[PRED_LOAD_IF23]] ] -; DISABLED_MASKED_STRIDED-NEXT: [[TMP81:%.*]] = extractelement <8 x i1> [[TMP0]], i32 5 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP81:%.*]] = extractelement <8 x i1> [[TMP0]], i64 5 ; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP81]], label [[PRED_LOAD_IF25:%.*]], label [[PRED_LOAD_CONTINUE26:%.*]] ; DISABLED_MASKED_STRIDED: pred.load.if25: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP82:%.*]] = extractelement <8 x i32> [[TMP50]], i32 5 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP82:%.*]] = extractelement <8 x i32> [[TMP50]], i64 5 ; DISABLED_MASKED_STRIDED-NEXT: [[TMP83:%.*]] = getelementptr inbounds i8, i8* [[P]], i32 [[TMP82]] ; DISABLED_MASKED_STRIDED-NEXT: [[TMP84:%.*]] = load i8, i8* [[TMP83]], align 1 -; DISABLED_MASKED_STRIDED-NEXT: [[TMP85:%.*]] = insertelement <8 x i8> [[TMP80]], i8 [[TMP84]], i32 5 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP85:%.*]] = insertelement <8 x i8> [[TMP80]], i8 [[TMP84]], i64 5 ; DISABLED_MASKED_STRIDED-NEXT: br label [[PRED_LOAD_CONTINUE26]] ; DISABLED_MASKED_STRIDED: pred.load.continue26: ; DISABLED_MASKED_STRIDED-NEXT: [[TMP86:%.*]] = phi <8 x i8> [ [[TMP80]], [[PRED_LOAD_CONTINUE24]] ], [ [[TMP85]], [[PRED_LOAD_IF25]] ] -; DISABLED_MASKED_STRIDED-NEXT: [[TMP87:%.*]] = extractelement <8 x i1> [[TMP0]], i32 6 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP87:%.*]] = extractelement <8 x i1> [[TMP0]], i64 6 ; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP87]], label [[PRED_LOAD_IF27:%.*]], label [[PRED_LOAD_CONTINUE28:%.*]] ; DISABLED_MASKED_STRIDED: pred.load.if27: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP88:%.*]] = extractelement <8 x i32> [[TMP50]], i32 6 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP88:%.*]] = extractelement <8 x i32> [[TMP50]], i64 6 ; DISABLED_MASKED_STRIDED-NEXT: [[TMP89:%.*]] = getelementptr inbounds i8, i8* [[P]], i32 [[TMP88]] ; DISABLED_MASKED_STRIDED-NEXT: [[TMP90:%.*]] = load i8, i8* [[TMP89]], align 1 -; DISABLED_MASKED_STRIDED-NEXT: [[TMP91:%.*]] = insertelement <8 x i8> [[TMP86]], i8 [[TMP90]], i32 6 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP91:%.*]] = insertelement <8 x i8> [[TMP86]], i8 [[TMP90]], i64 6 ; DISABLED_MASKED_STRIDED-NEXT: br label [[PRED_LOAD_CONTINUE28]] ; DISABLED_MASKED_STRIDED: pred.load.continue28: ; DISABLED_MASKED_STRIDED-NEXT: [[TMP92:%.*]] = phi <8 x i8> [ [[TMP86]], [[PRED_LOAD_CONTINUE26]] ], [ [[TMP91]], [[PRED_LOAD_IF27]] ] -; DISABLED_MASKED_STRIDED-NEXT: [[TMP93:%.*]] = extractelement <8 x i1> [[TMP0]], i32 7 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP93:%.*]] = extractelement <8 x i1> [[TMP0]], i64 7 ; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP93]], label [[PRED_LOAD_IF29:%.*]], label [[PRED_LOAD_CONTINUE30:%.*]] ; DISABLED_MASKED_STRIDED: pred.load.if29: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP94:%.*]] = extractelement <8 x i32> [[TMP50]], i32 7 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP94:%.*]] = extractelement <8 x i32> [[TMP50]], i64 7 ; DISABLED_MASKED_STRIDED-NEXT: [[TMP95:%.*]] = getelementptr inbounds i8, i8* [[P]], i32 [[TMP94]] ; DISABLED_MASKED_STRIDED-NEXT: [[TMP96:%.*]] = load i8, i8* [[TMP95]], align 1 -; DISABLED_MASKED_STRIDED-NEXT: [[TMP97:%.*]] = insertelement <8 x i8> [[TMP92]], i8 [[TMP96]], i32 7 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP97:%.*]] = insertelement <8 x i8> [[TMP92]], i8 [[TMP96]], i64 7 ; DISABLED_MASKED_STRIDED-NEXT: br label [[PRED_LOAD_CONTINUE30]] ; DISABLED_MASKED_STRIDED: pred.load.continue30: ; DISABLED_MASKED_STRIDED-NEXT: [[TMP98:%.*]] = phi <8 x i8> [ [[TMP92]], [[PRED_LOAD_CONTINUE28]] ], [ [[TMP97]], [[PRED_LOAD_IF29]] ] ; DISABLED_MASKED_STRIDED-NEXT: [[TMP99:%.*]] = icmp slt <8 x i8> [[TMP49]], [[TMP98]] ; DISABLED_MASKED_STRIDED-NEXT: [[TMP100:%.*]] = select <8 x i1> [[TMP99]], <8 x i8> [[TMP98]], <8 x i8> [[TMP49]] -; DISABLED_MASKED_STRIDED-NEXT: [[TMP101:%.*]] = extractelement <8 x i1> [[TMP0]], i32 0 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP101:%.*]] = extractelement <8 x i1> [[TMP0]], i64 0 ; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP101]], label [[PRED_STORE_IF:%.*]], label [[PRED_STORE_CONTINUE:%.*]] ; DISABLED_MASKED_STRIDED: pred.store.if: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP102:%.*]] = extractelement <8 x i32> [[TMP1]], i32 0 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP102:%.*]] = extractelement <8 x i32> [[TMP1]], i64 0 ; DISABLED_MASKED_STRIDED-NEXT: [[TMP103:%.*]] = getelementptr inbounds i8, i8* [[Q:%.*]], i32 [[TMP102]] -; DISABLED_MASKED_STRIDED-NEXT: [[TMP104:%.*]] = extractelement <8 x i8> [[TMP100]], i32 0 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP104:%.*]] = extractelement <8 x i8> [[TMP100]], i64 0 ; DISABLED_MASKED_STRIDED-NEXT: store i8 [[TMP104]], i8* [[TMP103]], align 1 ; DISABLED_MASKED_STRIDED-NEXT: br label [[PRED_STORE_CONTINUE]] ; DISABLED_MASKED_STRIDED: pred.store.continue: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP105:%.*]] = extractelement <8 x i1> [[TMP0]], i32 1 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP105:%.*]] = extractelement <8 x i1> [[TMP0]], i64 1 ; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP105]], label [[PRED_STORE_IF31:%.*]], label [[PRED_STORE_CONTINUE32:%.*]] ; DISABLED_MASKED_STRIDED: pred.store.if31: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP106:%.*]] = extractelement <8 x i32> [[TMP1]], i32 1 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP106:%.*]] = extractelement <8 x i32> [[TMP1]], i64 1 ; DISABLED_MASKED_STRIDED-NEXT: [[TMP107:%.*]] = getelementptr inbounds i8, i8* [[Q]], i32 [[TMP106]] -; DISABLED_MASKED_STRIDED-NEXT: [[TMP108:%.*]] = extractelement <8 x i8> [[TMP100]], i32 1 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP108:%.*]] = extractelement <8 x i8> [[TMP100]], i64 1 ; DISABLED_MASKED_STRIDED-NEXT: store i8 [[TMP108]], i8* [[TMP107]], align 1 ; DISABLED_MASKED_STRIDED-NEXT: br label [[PRED_STORE_CONTINUE32]] ; DISABLED_MASKED_STRIDED: pred.store.continue32: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP109:%.*]] = extractelement <8 x i1> [[TMP0]], i32 2 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP109:%.*]] = extractelement <8 x i1> [[TMP0]], i64 2 ; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP109]], label [[PRED_STORE_IF33:%.*]], label [[PRED_STORE_CONTINUE34:%.*]] ; DISABLED_MASKED_STRIDED: pred.store.if33: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP110:%.*]] = extractelement <8 x i32> [[TMP1]], i32 2 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP110:%.*]] = extractelement <8 x i32> [[TMP1]], i64 2 ; DISABLED_MASKED_STRIDED-NEXT: [[TMP111:%.*]] = getelementptr inbounds i8, i8* [[Q]], i32 [[TMP110]] -; DISABLED_MASKED_STRIDED-NEXT: [[TMP112:%.*]] = extractelement <8 x i8> [[TMP100]], i32 2 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP112:%.*]] = extractelement <8 x i8> [[TMP100]], i64 2 ; DISABLED_MASKED_STRIDED-NEXT: store i8 [[TMP112]], i8* [[TMP111]], align 1 ; DISABLED_MASKED_STRIDED-NEXT: br label [[PRED_STORE_CONTINUE34]] ; DISABLED_MASKED_STRIDED: pred.store.continue34: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP113:%.*]] = extractelement <8 x i1> [[TMP0]], i32 3 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP113:%.*]] = extractelement <8 x i1> [[TMP0]], i64 3 ; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP113]], label [[PRED_STORE_IF35:%.*]], label [[PRED_STORE_CONTINUE36:%.*]] ; DISABLED_MASKED_STRIDED: pred.store.if35: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP114:%.*]] = extractelement <8 x i32> [[TMP1]], i32 3 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP114:%.*]] = extractelement <8 x i32> [[TMP1]], i64 3 ; DISABLED_MASKED_STRIDED-NEXT: [[TMP115:%.*]] = getelementptr inbounds i8, i8* [[Q]], i32 [[TMP114]] -; DISABLED_MASKED_STRIDED-NEXT: [[TMP116:%.*]] = extractelement <8 x i8> [[TMP100]], i32 3 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP116:%.*]] = extractelement <8 x i8> [[TMP100]], i64 3 ; DISABLED_MASKED_STRIDED-NEXT: store i8 [[TMP116]], i8* [[TMP115]], align 1 ; DISABLED_MASKED_STRIDED-NEXT: br label [[PRED_STORE_CONTINUE36]] ; DISABLED_MASKED_STRIDED: pred.store.continue36: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP117:%.*]] = extractelement <8 x i1> [[TMP0]], i32 4 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP117:%.*]] = extractelement <8 x i1> [[TMP0]], i64 4 ; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP117]], label [[PRED_STORE_IF37:%.*]], label [[PRED_STORE_CONTINUE38:%.*]] ; DISABLED_MASKED_STRIDED: pred.store.if37: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP118:%.*]] = extractelement <8 x i32> [[TMP1]], i32 4 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP118:%.*]] = extractelement <8 x i32> [[TMP1]], i64 4 ; DISABLED_MASKED_STRIDED-NEXT: [[TMP119:%.*]] = getelementptr inbounds i8, i8* [[Q]], i32 [[TMP118]] -; DISABLED_MASKED_STRIDED-NEXT: [[TMP120:%.*]] = extractelement <8 x i8> [[TMP100]], i32 4 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP120:%.*]] = extractelement <8 x i8> [[TMP100]], i64 4 ; DISABLED_MASKED_STRIDED-NEXT: store i8 [[TMP120]], i8* [[TMP119]], align 1 ; DISABLED_MASKED_STRIDED-NEXT: br label [[PRED_STORE_CONTINUE38]] ; DISABLED_MASKED_STRIDED: pred.store.continue38: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP121:%.*]] = extractelement <8 x i1> [[TMP0]], i32 5 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP121:%.*]] = extractelement <8 x i1> [[TMP0]], i64 5 ; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP121]], label [[PRED_STORE_IF39:%.*]], label [[PRED_STORE_CONTINUE40:%.*]] ; DISABLED_MASKED_STRIDED: pred.store.if39: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP122:%.*]] = extractelement <8 x i32> [[TMP1]], i32 5 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP122:%.*]] = extractelement <8 x i32> [[TMP1]], i64 5 ; DISABLED_MASKED_STRIDED-NEXT: [[TMP123:%.*]] = getelementptr inbounds i8, i8* [[Q]], i32 [[TMP122]] -; DISABLED_MASKED_STRIDED-NEXT: [[TMP124:%.*]] = extractelement <8 x i8> [[TMP100]], i32 5 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP124:%.*]] = extractelement <8 x i8> [[TMP100]], i64 5 ; DISABLED_MASKED_STRIDED-NEXT: store i8 [[TMP124]], i8* [[TMP123]], align 1 ; DISABLED_MASKED_STRIDED-NEXT: br label [[PRED_STORE_CONTINUE40]] ; DISABLED_MASKED_STRIDED: pred.store.continue40: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP125:%.*]] = extractelement <8 x i1> [[TMP0]], i32 6 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP125:%.*]] = extractelement <8 x i1> [[TMP0]], i64 6 ; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP125]], label [[PRED_STORE_IF41:%.*]], label [[PRED_STORE_CONTINUE42:%.*]] ; DISABLED_MASKED_STRIDED: pred.store.if41: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP126:%.*]] = extractelement <8 x i32> [[TMP1]], i32 6 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP126:%.*]] = extractelement <8 x i32> [[TMP1]], i64 6 ; DISABLED_MASKED_STRIDED-NEXT: [[TMP127:%.*]] = getelementptr inbounds i8, i8* [[Q]], i32 [[TMP126]] -; DISABLED_MASKED_STRIDED-NEXT: [[TMP128:%.*]] = extractelement <8 x i8> [[TMP100]], i32 6 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP128:%.*]] = extractelement <8 x i8> [[TMP100]], i64 6 ; DISABLED_MASKED_STRIDED-NEXT: store i8 [[TMP128]], i8* [[TMP127]], align 1 ; DISABLED_MASKED_STRIDED-NEXT: br label [[PRED_STORE_CONTINUE42]] ; DISABLED_MASKED_STRIDED: pred.store.continue42: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP129:%.*]] = extractelement <8 x i1> [[TMP0]], i32 7 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP129:%.*]] = extractelement <8 x i1> [[TMP0]], i64 7 ; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP129]], label [[PRED_STORE_IF43:%.*]], label [[PRED_STORE_CONTINUE44:%.*]] ; DISABLED_MASKED_STRIDED: pred.store.if43: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP130:%.*]] = extractelement <8 x i32> [[TMP1]], i32 7 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP130:%.*]] = extractelement <8 x i32> [[TMP1]], i64 7 ; DISABLED_MASKED_STRIDED-NEXT: [[TMP131:%.*]] = getelementptr inbounds i8, i8* [[Q]], i32 [[TMP130]] -; DISABLED_MASKED_STRIDED-NEXT: [[TMP132:%.*]] = extractelement <8 x i8> [[TMP100]], i32 7 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP132:%.*]] = extractelement <8 x i8> [[TMP100]], i64 7 ; DISABLED_MASKED_STRIDED-NEXT: store i8 [[TMP132]], i8* [[TMP131]], align 1 ; DISABLED_MASKED_STRIDED-NEXT: br label [[PRED_STORE_CONTINUE44]] ; DISABLED_MASKED_STRIDED: pred.store.continue44: ; DISABLED_MASKED_STRIDED-NEXT: [[TMP133:%.*]] = sub <8 x i8> zeroinitializer, [[TMP100]] -; DISABLED_MASKED_STRIDED-NEXT: [[TMP134:%.*]] = extractelement <8 x i1> [[TMP0]], i32 0 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP134:%.*]] = extractelement <8 x i1> [[TMP0]], i64 0 ; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP134]], label [[PRED_STORE_IF45:%.*]], label [[PRED_STORE_CONTINUE46:%.*]] ; DISABLED_MASKED_STRIDED: pred.store.if45: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP135:%.*]] = extractelement <8 x i32> [[TMP50]], i32 0 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP135:%.*]] = extractelement <8 x i32> [[TMP50]], i64 0 ; DISABLED_MASKED_STRIDED-NEXT: [[TMP136:%.*]] = getelementptr inbounds i8, i8* [[Q]], i32 [[TMP135]] -; DISABLED_MASKED_STRIDED-NEXT: [[TMP137:%.*]] = extractelement <8 x i8> [[TMP133]], i32 0 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP137:%.*]] = extractelement <8 x i8> [[TMP133]], i64 0 ; DISABLED_MASKED_STRIDED-NEXT: store i8 [[TMP137]], i8* [[TMP136]], align 1 ; DISABLED_MASKED_STRIDED-NEXT: br label [[PRED_STORE_CONTINUE46]] ; DISABLED_MASKED_STRIDED: pred.store.continue46: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP138:%.*]] = extractelement <8 x i1> [[TMP0]], i32 1 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP138:%.*]] = extractelement <8 x i1> [[TMP0]], i64 1 ; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP138]], label [[PRED_STORE_IF47:%.*]], label [[PRED_STORE_CONTINUE48:%.*]] ; DISABLED_MASKED_STRIDED: pred.store.if47: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP139:%.*]] = extractelement <8 x i32> [[TMP50]], i32 1 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP139:%.*]] = extractelement <8 x i32> [[TMP50]], i64 1 ; DISABLED_MASKED_STRIDED-NEXT: [[TMP140:%.*]] = getelementptr inbounds i8, i8* [[Q]], i32 [[TMP139]] -; DISABLED_MASKED_STRIDED-NEXT: [[TMP141:%.*]] = extractelement <8 x i8> [[TMP133]], i32 1 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP141:%.*]] = extractelement <8 x i8> [[TMP133]], i64 1 ; DISABLED_MASKED_STRIDED-NEXT: store i8 [[TMP141]], i8* [[TMP140]], align 1 ; DISABLED_MASKED_STRIDED-NEXT: br label [[PRED_STORE_CONTINUE48]] ; DISABLED_MASKED_STRIDED: pred.store.continue48: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP142:%.*]] = extractelement <8 x i1> [[TMP0]], i32 2 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP142:%.*]] = extractelement <8 x i1> [[TMP0]], i64 2 ; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP142]], label [[PRED_STORE_IF49:%.*]], label [[PRED_STORE_CONTINUE50:%.*]] ; DISABLED_MASKED_STRIDED: pred.store.if49: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP143:%.*]] = extractelement <8 x i32> [[TMP50]], i32 2 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP143:%.*]] = extractelement <8 x i32> [[TMP50]], i64 2 ; DISABLED_MASKED_STRIDED-NEXT: [[TMP144:%.*]] = getelementptr inbounds i8, i8* [[Q]], i32 [[TMP143]] -; DISABLED_MASKED_STRIDED-NEXT: [[TMP145:%.*]] = extractelement <8 x i8> [[TMP133]], i32 2 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP145:%.*]] = extractelement <8 x i8> [[TMP133]], i64 2 ; DISABLED_MASKED_STRIDED-NEXT: store i8 [[TMP145]], i8* [[TMP144]], align 1 ; DISABLED_MASKED_STRIDED-NEXT: br label [[PRED_STORE_CONTINUE50]] ; DISABLED_MASKED_STRIDED: pred.store.continue50: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP146:%.*]] = extractelement <8 x i1> [[TMP0]], i32 3 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP146:%.*]] = extractelement <8 x i1> [[TMP0]], i64 3 ; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP146]], label [[PRED_STORE_IF51:%.*]], label [[PRED_STORE_CONTINUE52:%.*]] ; DISABLED_MASKED_STRIDED: pred.store.if51: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP147:%.*]] = extractelement <8 x i32> [[TMP50]], i32 3 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP147:%.*]] = extractelement <8 x i32> [[TMP50]], i64 3 ; DISABLED_MASKED_STRIDED-NEXT: [[TMP148:%.*]] = getelementptr inbounds i8, i8* [[Q]], i32 [[TMP147]] -; DISABLED_MASKED_STRIDED-NEXT: [[TMP149:%.*]] = extractelement <8 x i8> [[TMP133]], i32 3 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP149:%.*]] = extractelement <8 x i8> [[TMP133]], i64 3 ; DISABLED_MASKED_STRIDED-NEXT: store i8 [[TMP149]], i8* [[TMP148]], align 1 ; DISABLED_MASKED_STRIDED-NEXT: br label [[PRED_STORE_CONTINUE52]] ; DISABLED_MASKED_STRIDED: pred.store.continue52: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP150:%.*]] = extractelement <8 x i1> [[TMP0]], i32 4 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP150:%.*]] = extractelement <8 x i1> [[TMP0]], i64 4 ; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP150]], label [[PRED_STORE_IF53:%.*]], label [[PRED_STORE_CONTINUE54:%.*]] ; DISABLED_MASKED_STRIDED: pred.store.if53: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP151:%.*]] = extractelement <8 x i32> [[TMP50]], i32 4 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP151:%.*]] = extractelement <8 x i32> [[TMP50]], i64 4 ; DISABLED_MASKED_STRIDED-NEXT: [[TMP152:%.*]] = getelementptr inbounds i8, i8* [[Q]], i32 [[TMP151]] -; DISABLED_MASKED_STRIDED-NEXT: [[TMP153:%.*]] = extractelement <8 x i8> [[TMP133]], i32 4 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP153:%.*]] = extractelement <8 x i8> [[TMP133]], i64 4 ; DISABLED_MASKED_STRIDED-NEXT: store i8 [[TMP153]], i8* [[TMP152]], align 1 ; DISABLED_MASKED_STRIDED-NEXT: br label [[PRED_STORE_CONTINUE54]] ; DISABLED_MASKED_STRIDED: pred.store.continue54: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP154:%.*]] = extractelement <8 x i1> [[TMP0]], i32 5 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP154:%.*]] = extractelement <8 x i1> [[TMP0]], i64 5 ; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP154]], label [[PRED_STORE_IF55:%.*]], label [[PRED_STORE_CONTINUE56:%.*]] ; DISABLED_MASKED_STRIDED: pred.store.if55: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP155:%.*]] = extractelement <8 x i32> [[TMP50]], i32 5 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP155:%.*]] = extractelement <8 x i32> [[TMP50]], i64 5 ; DISABLED_MASKED_STRIDED-NEXT: [[TMP156:%.*]] = getelementptr inbounds i8, i8* [[Q]], i32 [[TMP155]] -; DISABLED_MASKED_STRIDED-NEXT: [[TMP157:%.*]] = extractelement <8 x i8> [[TMP133]], i32 5 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP157:%.*]] = extractelement <8 x i8> [[TMP133]], i64 5 ; DISABLED_MASKED_STRIDED-NEXT: store i8 [[TMP157]], i8* [[TMP156]], align 1 ; DISABLED_MASKED_STRIDED-NEXT: br label [[PRED_STORE_CONTINUE56]] ; DISABLED_MASKED_STRIDED: pred.store.continue56: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP158:%.*]] = extractelement <8 x i1> [[TMP0]], i32 6 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP158:%.*]] = extractelement <8 x i1> [[TMP0]], i64 6 ; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP158]], label [[PRED_STORE_IF57:%.*]], label [[PRED_STORE_CONTINUE58:%.*]] ; DISABLED_MASKED_STRIDED: pred.store.if57: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP159:%.*]] = extractelement <8 x i32> [[TMP50]], i32 6 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP159:%.*]] = extractelement <8 x i32> [[TMP50]], i64 6 ; DISABLED_MASKED_STRIDED-NEXT: [[TMP160:%.*]] = getelementptr inbounds i8, i8* [[Q]], i32 [[TMP159]] -; DISABLED_MASKED_STRIDED-NEXT: [[TMP161:%.*]] = extractelement <8 x i8> [[TMP133]], i32 6 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP161:%.*]] = extractelement <8 x i8> [[TMP133]], i64 6 ; DISABLED_MASKED_STRIDED-NEXT: store i8 [[TMP161]], i8* [[TMP160]], align 1 ; DISABLED_MASKED_STRIDED-NEXT: br label [[PRED_STORE_CONTINUE58]] ; DISABLED_MASKED_STRIDED: pred.store.continue58: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP162:%.*]] = extractelement <8 x i1> [[TMP0]], i32 7 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP162:%.*]] = extractelement <8 x i1> [[TMP0]], i64 7 ; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP162]], label [[PRED_STORE_IF59:%.*]], label [[PRED_STORE_CONTINUE60]] ; DISABLED_MASKED_STRIDED: pred.store.if59: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP163:%.*]] = extractelement <8 x i32> [[TMP50]], i32 7 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP163:%.*]] = extractelement <8 x i32> [[TMP50]], i64 7 ; DISABLED_MASKED_STRIDED-NEXT: [[TMP164:%.*]] = getelementptr inbounds i8, i8* [[Q]], i32 [[TMP163]] -; DISABLED_MASKED_STRIDED-NEXT: [[TMP165:%.*]] = extractelement <8 x i8> [[TMP133]], i32 7 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP165:%.*]] = extractelement <8 x i8> [[TMP133]], i64 7 ; DISABLED_MASKED_STRIDED-NEXT: store i8 [[TMP165]], i8* [[TMP164]], align 1 ; DISABLED_MASKED_STRIDED-NEXT: br label [[PRED_STORE_CONTINUE60]] ; DISABLED_MASKED_STRIDED: pred.store.continue60: @@ -1425,7 +1425,7 @@ ; ENABLED_MASKED_STRIDED-LABEL: @masked_strided2( ; ENABLED_MASKED_STRIDED-NEXT: entry: ; ENABLED_MASKED_STRIDED-NEXT: [[CONV:%.*]] = zext i8 [[GUARD:%.*]] to i32 -; ENABLED_MASKED_STRIDED-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <8 x i32> poison, i32 [[CONV]], i32 0 +; ENABLED_MASKED_STRIDED-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <8 x i32> poison, i32 [[CONV]], i64 0 ; ENABLED_MASKED_STRIDED-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector <8 x i32> [[BROADCAST_SPLATINSERT]], <8 x i32> poison, <8 x i32> zeroinitializer ; ENABLED_MASKED_STRIDED-NEXT: br label [[VECTOR_BODY:%.*]] ; ENABLED_MASKED_STRIDED: vector.body: @@ -1508,328 +1508,337 @@ ; define dso_local void @masked_strided2_reverse(i8* noalias nocapture readonly %p, i8* noalias nocapture %q, i8 zeroext %guard) local_unnamed_addr { ; DISABLED_MASKED_STRIDED-LABEL: @masked_strided2_reverse( -; DISABLED_MASKED_STRIDED: br i1 {{.*}}, label [[FOR_BODY:%.*]], label [[VECTOR_PH:%.*]] +; DISABLED_MASKED_STRIDED-NEXT: entry: +; DISABLED_MASKED_STRIDED-NEXT: [[CONV:%.*]] = zext i8 [[GUARD:%.*]] to i32 +; DISABLED_MASKED_STRIDED-NEXT: [[SCEVGEP:%.*]] = getelementptr i8, i8* [[Q:%.*]], i32 2048 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP0:%.*]] = getelementptr i8, i8* [[Q]], i32 2 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP1:%.*]] = icmp ugt i8* [[TMP0]], [[SCEVGEP]] +; DISABLED_MASKED_STRIDED-NEXT: [[SCEVGEP2:%.*]] = getelementptr i8, i8* [[Q]], i32 2049 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP2:%.*]] = getelementptr i8, i8* [[Q]], i32 3 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP3:%.*]] = icmp ugt i8* [[TMP2]], [[SCEVGEP2]] +; DISABLED_MASKED_STRIDED-NEXT: [[TMP4:%.*]] = or i1 [[TMP1]], [[TMP3]] +; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP4]], label [[FOR_BODY:%.*]], label [[VECTOR_PH:%.*]] ; DISABLED_MASKED_STRIDED: vector.ph: -; DISABLED_MASKED_STRIDED-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <8 x i32> poison, i32 [[CONV]], i32 0 +; DISABLED_MASKED_STRIDED-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <8 x i32> poison, i32 [[CONV]], i64 0 ; DISABLED_MASKED_STRIDED-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector <8 x i32> [[BROADCAST_SPLATINSERT]], <8 x i32> poison, <8 x i32> zeroinitializer ; DISABLED_MASKED_STRIDED-NEXT: br label [[VECTOR_BODY:%.*]] ; DISABLED_MASKED_STRIDED: vector.body: ; DISABLED_MASKED_STRIDED-NEXT: [[INDEX:%.*]] = phi i32 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[PRED_STORE_CONTINUE65:%.*]] ] ; DISABLED_MASKED_STRIDED-NEXT: [[VEC_IND:%.*]] = phi <8 x i32> [ , [[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], [[PRED_STORE_CONTINUE65]] ] -; DISABLED_MASKED_STRIDED-NEXT: [[TMP7:%.*]] = icmp ugt <8 x i32> [[VEC_IND]], [[BROADCAST_SPLAT]] -; DISABLED_MASKED_STRIDED-NEXT: [[TMP8:%.*]] = shl nuw nsw <8 x i32> [[VEC_IND]], -; DISABLED_MASKED_STRIDED-NEXT: [[TMP9:%.*]] = extractelement <8 x i1> [[TMP7]], i32 0 -; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP9]], label [[PRED_LOAD_IF:%.*]], label [[PRED_LOAD_CONTINUE:%.*]] +; DISABLED_MASKED_STRIDED-NEXT: [[TMP5:%.*]] = icmp ugt <8 x i32> [[VEC_IND]], [[BROADCAST_SPLAT]] +; DISABLED_MASKED_STRIDED-NEXT: [[TMP6:%.*]] = shl nuw nsw <8 x i32> [[VEC_IND]], +; DISABLED_MASKED_STRIDED-NEXT: [[TMP7:%.*]] = extractelement <8 x i1> [[TMP5]], i64 0 +; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP7]], label [[PRED_LOAD_IF:%.*]], label [[PRED_LOAD_CONTINUE:%.*]] ; DISABLED_MASKED_STRIDED: pred.load.if: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP10:%.*]] = extractelement <8 x i32> [[TMP8]], i32 0 -; DISABLED_MASKED_STRIDED-NEXT: [[TMP11:%.*]] = getelementptr inbounds i8, i8* [[P:%.*]], i32 [[TMP10]] -; DISABLED_MASKED_STRIDED-NEXT: [[TMP12:%.*]] = load i8, i8* [[TMP11]], align 1 -; DISABLED_MASKED_STRIDED-NEXT: [[TMP13:%.*]] = insertelement <8 x i8> poison, i8 [[TMP12]], i32 0 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP8:%.*]] = extractelement <8 x i32> [[TMP6]], i64 0 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP9:%.*]] = getelementptr inbounds i8, i8* [[P:%.*]], i32 [[TMP8]] +; DISABLED_MASKED_STRIDED-NEXT: [[TMP10:%.*]] = load i8, i8* [[TMP9]], align 1 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP11:%.*]] = insertelement <8 x i8> poison, i8 [[TMP10]], i64 0 ; DISABLED_MASKED_STRIDED-NEXT: br label [[PRED_LOAD_CONTINUE]] ; DISABLED_MASKED_STRIDED: pred.load.continue: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP14:%.*]] = phi <8 x i8> [ poison, [[VECTOR_BODY]] ], [ [[TMP13]], [[PRED_LOAD_IF]] ] -; DISABLED_MASKED_STRIDED-NEXT: [[TMP15:%.*]] = extractelement <8 x i1> [[TMP7]], i32 1 -; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP15]], label [[PRED_LOAD_IF6:%.*]], label [[PRED_LOAD_CONTINUE7:%.*]] +; DISABLED_MASKED_STRIDED-NEXT: [[TMP12:%.*]] = phi <8 x i8> [ poison, [[VECTOR_BODY]] ], [ [[TMP11]], [[PRED_LOAD_IF]] ] +; DISABLED_MASKED_STRIDED-NEXT: [[TMP13:%.*]] = extractelement <8 x i1> [[TMP5]], i64 1 +; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP13]], label [[PRED_LOAD_IF6:%.*]], label [[PRED_LOAD_CONTINUE7:%.*]] ; DISABLED_MASKED_STRIDED: pred.load.if6: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP16:%.*]] = extractelement <8 x i32> [[TMP8]], i32 1 -; DISABLED_MASKED_STRIDED-NEXT: [[TMP17:%.*]] = getelementptr inbounds i8, i8* [[P]], i32 [[TMP16]] -; DISABLED_MASKED_STRIDED-NEXT: [[TMP18:%.*]] = load i8, i8* [[TMP17]], align 1 -; DISABLED_MASKED_STRIDED-NEXT: [[TMP19:%.*]] = insertelement <8 x i8> [[TMP14]], i8 [[TMP18]], i32 1 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP14:%.*]] = extractelement <8 x i32> [[TMP6]], i64 1 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP15:%.*]] = getelementptr inbounds i8, i8* [[P]], i32 [[TMP14]] +; DISABLED_MASKED_STRIDED-NEXT: [[TMP16:%.*]] = load i8, i8* [[TMP15]], align 1 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP17:%.*]] = insertelement <8 x i8> [[TMP12]], i8 [[TMP16]], i64 1 ; DISABLED_MASKED_STRIDED-NEXT: br label [[PRED_LOAD_CONTINUE7]] ; DISABLED_MASKED_STRIDED: pred.load.continue7: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP20:%.*]] = phi <8 x i8> [ [[TMP14]], [[PRED_LOAD_CONTINUE]] ], [ [[TMP19]], [[PRED_LOAD_IF6]] ] -; DISABLED_MASKED_STRIDED-NEXT: [[TMP21:%.*]] = extractelement <8 x i1> [[TMP7]], i32 2 -; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP21]], label [[PRED_LOAD_IF8:%.*]], label [[PRED_LOAD_CONTINUE9:%.*]] +; DISABLED_MASKED_STRIDED-NEXT: [[TMP18:%.*]] = phi <8 x i8> [ [[TMP12]], [[PRED_LOAD_CONTINUE]] ], [ [[TMP17]], [[PRED_LOAD_IF6]] ] +; DISABLED_MASKED_STRIDED-NEXT: [[TMP19:%.*]] = extractelement <8 x i1> [[TMP5]], i64 2 +; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP19]], label [[PRED_LOAD_IF8:%.*]], label [[PRED_LOAD_CONTINUE9:%.*]] ; DISABLED_MASKED_STRIDED: pred.load.if8: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP22:%.*]] = extractelement <8 x i32> [[TMP8]], i32 2 -; DISABLED_MASKED_STRIDED-NEXT: [[TMP23:%.*]] = getelementptr inbounds i8, i8* [[P]], i32 [[TMP22]] -; DISABLED_MASKED_STRIDED-NEXT: [[TMP24:%.*]] = load i8, i8* [[TMP23]], align 1 -; DISABLED_MASKED_STRIDED-NEXT: [[TMP25:%.*]] = insertelement <8 x i8> [[TMP20]], i8 [[TMP24]], i32 2 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP20:%.*]] = extractelement <8 x i32> [[TMP6]], i64 2 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP21:%.*]] = getelementptr inbounds i8, i8* [[P]], i32 [[TMP20]] +; DISABLED_MASKED_STRIDED-NEXT: [[TMP22:%.*]] = load i8, i8* [[TMP21]], align 1 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP23:%.*]] = insertelement <8 x i8> [[TMP18]], i8 [[TMP22]], i64 2 ; DISABLED_MASKED_STRIDED-NEXT: br label [[PRED_LOAD_CONTINUE9]] ; DISABLED_MASKED_STRIDED: pred.load.continue9: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP26:%.*]] = phi <8 x i8> [ [[TMP20]], [[PRED_LOAD_CONTINUE7]] ], [ [[TMP25]], [[PRED_LOAD_IF8]] ] -; DISABLED_MASKED_STRIDED-NEXT: [[TMP27:%.*]] = extractelement <8 x i1> [[TMP7]], i32 3 -; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP27]], label [[PRED_LOAD_IF10:%.*]], label [[PRED_LOAD_CONTINUE11:%.*]] +; DISABLED_MASKED_STRIDED-NEXT: [[TMP24:%.*]] = phi <8 x i8> [ [[TMP18]], [[PRED_LOAD_CONTINUE7]] ], [ [[TMP23]], [[PRED_LOAD_IF8]] ] +; DISABLED_MASKED_STRIDED-NEXT: [[TMP25:%.*]] = extractelement <8 x i1> [[TMP5]], i64 3 +; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP25]], label [[PRED_LOAD_IF10:%.*]], label [[PRED_LOAD_CONTINUE11:%.*]] ; DISABLED_MASKED_STRIDED: pred.load.if10: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP28:%.*]] = extractelement <8 x i32> [[TMP8]], i32 3 -; DISABLED_MASKED_STRIDED-NEXT: [[TMP29:%.*]] = getelementptr inbounds i8, i8* [[P]], i32 [[TMP28]] -; DISABLED_MASKED_STRIDED-NEXT: [[TMP30:%.*]] = load i8, i8* [[TMP29]], align 1 -; DISABLED_MASKED_STRIDED-NEXT: [[TMP31:%.*]] = insertelement <8 x i8> [[TMP26]], i8 [[TMP30]], i32 3 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP26:%.*]] = extractelement <8 x i32> [[TMP6]], i64 3 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP27:%.*]] = getelementptr inbounds i8, i8* [[P]], i32 [[TMP26]] +; DISABLED_MASKED_STRIDED-NEXT: [[TMP28:%.*]] = load i8, i8* [[TMP27]], align 1 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP29:%.*]] = insertelement <8 x i8> [[TMP24]], i8 [[TMP28]], i64 3 ; DISABLED_MASKED_STRIDED-NEXT: br label [[PRED_LOAD_CONTINUE11]] ; DISABLED_MASKED_STRIDED: pred.load.continue11: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP32:%.*]] = phi <8 x i8> [ [[TMP26]], [[PRED_LOAD_CONTINUE9]] ], [ [[TMP31]], [[PRED_LOAD_IF10]] ] -; DISABLED_MASKED_STRIDED-NEXT: [[TMP33:%.*]] = extractelement <8 x i1> [[TMP7]], i32 4 -; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP33]], label [[PRED_LOAD_IF12:%.*]], label [[PRED_LOAD_CONTINUE13:%.*]] +; DISABLED_MASKED_STRIDED-NEXT: [[TMP30:%.*]] = phi <8 x i8> [ [[TMP24]], [[PRED_LOAD_CONTINUE9]] ], [ [[TMP29]], [[PRED_LOAD_IF10]] ] +; DISABLED_MASKED_STRIDED-NEXT: [[TMP31:%.*]] = extractelement <8 x i1> [[TMP5]], i64 4 +; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP31]], label [[PRED_LOAD_IF12:%.*]], label [[PRED_LOAD_CONTINUE13:%.*]] ; DISABLED_MASKED_STRIDED: pred.load.if12: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP34:%.*]] = extractelement <8 x i32> [[TMP8]], i32 4 -; DISABLED_MASKED_STRIDED-NEXT: [[TMP35:%.*]] = getelementptr inbounds i8, i8* [[P]], i32 [[TMP34]] -; DISABLED_MASKED_STRIDED-NEXT: [[TMP36:%.*]] = load i8, i8* [[TMP35]], align 1 -; DISABLED_MASKED_STRIDED-NEXT: [[TMP37:%.*]] = insertelement <8 x i8> [[TMP32]], i8 [[TMP36]], i32 4 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP32:%.*]] = extractelement <8 x i32> [[TMP6]], i64 4 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP33:%.*]] = getelementptr inbounds i8, i8* [[P]], i32 [[TMP32]] +; DISABLED_MASKED_STRIDED-NEXT: [[TMP34:%.*]] = load i8, i8* [[TMP33]], align 1 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP35:%.*]] = insertelement <8 x i8> [[TMP30]], i8 [[TMP34]], i64 4 ; DISABLED_MASKED_STRIDED-NEXT: br label [[PRED_LOAD_CONTINUE13]] ; DISABLED_MASKED_STRIDED: pred.load.continue13: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP38:%.*]] = phi <8 x i8> [ [[TMP32]], [[PRED_LOAD_CONTINUE11]] ], [ [[TMP37]], [[PRED_LOAD_IF12]] ] -; DISABLED_MASKED_STRIDED-NEXT: [[TMP39:%.*]] = extractelement <8 x i1> [[TMP7]], i32 5 -; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP39]], label [[PRED_LOAD_IF14:%.*]], label [[PRED_LOAD_CONTINUE15:%.*]] +; DISABLED_MASKED_STRIDED-NEXT: [[TMP36:%.*]] = phi <8 x i8> [ [[TMP30]], [[PRED_LOAD_CONTINUE11]] ], [ [[TMP35]], [[PRED_LOAD_IF12]] ] +; DISABLED_MASKED_STRIDED-NEXT: [[TMP37:%.*]] = extractelement <8 x i1> [[TMP5]], i64 5 +; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP37]], label [[PRED_LOAD_IF14:%.*]], label [[PRED_LOAD_CONTINUE15:%.*]] ; DISABLED_MASKED_STRIDED: pred.load.if14: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP40:%.*]] = extractelement <8 x i32> [[TMP8]], i32 5 -; DISABLED_MASKED_STRIDED-NEXT: [[TMP41:%.*]] = getelementptr inbounds i8, i8* [[P]], i32 [[TMP40]] -; DISABLED_MASKED_STRIDED-NEXT: [[TMP42:%.*]] = load i8, i8* [[TMP41]], align 1 -; DISABLED_MASKED_STRIDED-NEXT: [[TMP43:%.*]] = insertelement <8 x i8> [[TMP38]], i8 [[TMP42]], i32 5 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP38:%.*]] = extractelement <8 x i32> [[TMP6]], i64 5 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP39:%.*]] = getelementptr inbounds i8, i8* [[P]], i32 [[TMP38]] +; DISABLED_MASKED_STRIDED-NEXT: [[TMP40:%.*]] = load i8, i8* [[TMP39]], align 1 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP41:%.*]] = insertelement <8 x i8> [[TMP36]], i8 [[TMP40]], i64 5 ; DISABLED_MASKED_STRIDED-NEXT: br label [[PRED_LOAD_CONTINUE15]] ; DISABLED_MASKED_STRIDED: pred.load.continue15: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP44:%.*]] = phi <8 x i8> [ [[TMP38]], [[PRED_LOAD_CONTINUE13]] ], [ [[TMP43]], [[PRED_LOAD_IF14]] ] -; DISABLED_MASKED_STRIDED-NEXT: [[TMP45:%.*]] = extractelement <8 x i1> [[TMP7]], i32 6 -; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP45]], label [[PRED_LOAD_IF16:%.*]], label [[PRED_LOAD_CONTINUE17:%.*]] +; DISABLED_MASKED_STRIDED-NEXT: [[TMP42:%.*]] = phi <8 x i8> [ [[TMP36]], [[PRED_LOAD_CONTINUE13]] ], [ [[TMP41]], [[PRED_LOAD_IF14]] ] +; DISABLED_MASKED_STRIDED-NEXT: [[TMP43:%.*]] = extractelement <8 x i1> [[TMP5]], i64 6 +; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP43]], label [[PRED_LOAD_IF16:%.*]], label [[PRED_LOAD_CONTINUE17:%.*]] ; DISABLED_MASKED_STRIDED: pred.load.if16: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP46:%.*]] = extractelement <8 x i32> [[TMP8]], i32 6 -; DISABLED_MASKED_STRIDED-NEXT: [[TMP47:%.*]] = getelementptr inbounds i8, i8* [[P]], i32 [[TMP46]] -; DISABLED_MASKED_STRIDED-NEXT: [[TMP48:%.*]] = load i8, i8* [[TMP47]], align 1 -; DISABLED_MASKED_STRIDED-NEXT: [[TMP49:%.*]] = insertelement <8 x i8> [[TMP44]], i8 [[TMP48]], i32 6 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP44:%.*]] = extractelement <8 x i32> [[TMP6]], i64 6 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP45:%.*]] = getelementptr inbounds i8, i8* [[P]], i32 [[TMP44]] +; DISABLED_MASKED_STRIDED-NEXT: [[TMP46:%.*]] = load i8, i8* [[TMP45]], align 1 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP47:%.*]] = insertelement <8 x i8> [[TMP42]], i8 [[TMP46]], i64 6 ; DISABLED_MASKED_STRIDED-NEXT: br label [[PRED_LOAD_CONTINUE17]] ; DISABLED_MASKED_STRIDED: pred.load.continue17: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP50:%.*]] = phi <8 x i8> [ [[TMP44]], [[PRED_LOAD_CONTINUE15]] ], [ [[TMP49]], [[PRED_LOAD_IF16]] ] -; DISABLED_MASKED_STRIDED-NEXT: [[TMP51:%.*]] = extractelement <8 x i1> [[TMP7]], i32 7 -; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP51]], label [[PRED_LOAD_IF18:%.*]], label [[PRED_LOAD_CONTINUE19:%.*]] +; DISABLED_MASKED_STRIDED-NEXT: [[TMP48:%.*]] = phi <8 x i8> [ [[TMP42]], [[PRED_LOAD_CONTINUE15]] ], [ [[TMP47]], [[PRED_LOAD_IF16]] ] +; DISABLED_MASKED_STRIDED-NEXT: [[TMP49:%.*]] = extractelement <8 x i1> [[TMP5]], i64 7 +; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP49]], label [[PRED_LOAD_IF18:%.*]], label [[PRED_LOAD_CONTINUE19:%.*]] ; DISABLED_MASKED_STRIDED: pred.load.if18: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP52:%.*]] = extractelement <8 x i32> [[TMP8]], i32 7 -; DISABLED_MASKED_STRIDED-NEXT: [[TMP53:%.*]] = getelementptr inbounds i8, i8* [[P]], i32 [[TMP52]] -; DISABLED_MASKED_STRIDED-NEXT: [[TMP54:%.*]] = load i8, i8* [[TMP53]], align 1 -; DISABLED_MASKED_STRIDED-NEXT: [[TMP55:%.*]] = insertelement <8 x i8> [[TMP50]], i8 [[TMP54]], i32 7 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP50:%.*]] = extractelement <8 x i32> [[TMP6]], i64 7 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP51:%.*]] = getelementptr inbounds i8, i8* [[P]], i32 [[TMP50]] +; DISABLED_MASKED_STRIDED-NEXT: [[TMP52:%.*]] = load i8, i8* [[TMP51]], align 1 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP53:%.*]] = insertelement <8 x i8> [[TMP48]], i8 [[TMP52]], i64 7 ; DISABLED_MASKED_STRIDED-NEXT: br label [[PRED_LOAD_CONTINUE19]] ; DISABLED_MASKED_STRIDED: pred.load.continue19: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP56:%.*]] = phi <8 x i8> [ [[TMP50]], [[PRED_LOAD_CONTINUE17]] ], [ [[TMP55]], [[PRED_LOAD_IF18]] ] -; DISABLED_MASKED_STRIDED-NEXT: [[TMP57:%.*]] = or <8 x i32> [[TMP8]], -; DISABLED_MASKED_STRIDED-NEXT: [[TMP58:%.*]] = extractelement <8 x i1> [[TMP7]], i32 0 -; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP58]], label [[PRED_LOAD_IF20:%.*]], label [[PRED_LOAD_CONTINUE21:%.*]] +; DISABLED_MASKED_STRIDED-NEXT: [[TMP54:%.*]] = phi <8 x i8> [ [[TMP48]], [[PRED_LOAD_CONTINUE17]] ], [ [[TMP53]], [[PRED_LOAD_IF18]] ] +; DISABLED_MASKED_STRIDED-NEXT: [[TMP55:%.*]] = or <8 x i32> [[TMP6]], +; DISABLED_MASKED_STRIDED-NEXT: [[TMP56:%.*]] = extractelement <8 x i1> [[TMP5]], i64 0 +; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP56]], label [[PRED_LOAD_IF20:%.*]], label [[PRED_LOAD_CONTINUE21:%.*]] ; DISABLED_MASKED_STRIDED: pred.load.if20: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP59:%.*]] = extractelement <8 x i32> [[TMP57]], i32 0 -; DISABLED_MASKED_STRIDED-NEXT: [[TMP60:%.*]] = getelementptr inbounds i8, i8* [[P]], i32 [[TMP59]] -; DISABLED_MASKED_STRIDED-NEXT: [[TMP61:%.*]] = load i8, i8* [[TMP60]], align 1 -; DISABLED_MASKED_STRIDED-NEXT: [[TMP62:%.*]] = insertelement <8 x i8> poison, i8 [[TMP61]], i32 0 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP57:%.*]] = extractelement <8 x i32> [[TMP55]], i64 0 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP58:%.*]] = getelementptr inbounds i8, i8* [[P]], i32 [[TMP57]] +; DISABLED_MASKED_STRIDED-NEXT: [[TMP59:%.*]] = load i8, i8* [[TMP58]], align 1 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP60:%.*]] = insertelement <8 x i8> poison, i8 [[TMP59]], i64 0 ; DISABLED_MASKED_STRIDED-NEXT: br label [[PRED_LOAD_CONTINUE21]] ; DISABLED_MASKED_STRIDED: pred.load.continue21: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP63:%.*]] = phi <8 x i8> [ poison, [[PRED_LOAD_CONTINUE19]] ], [ [[TMP62]], [[PRED_LOAD_IF20]] ] -; DISABLED_MASKED_STRIDED-NEXT: [[TMP64:%.*]] = extractelement <8 x i1> [[TMP7]], i32 1 -; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP64]], label [[PRED_LOAD_IF22:%.*]], label [[PRED_LOAD_CONTINUE23:%.*]] +; DISABLED_MASKED_STRIDED-NEXT: [[TMP61:%.*]] = phi <8 x i8> [ poison, [[PRED_LOAD_CONTINUE19]] ], [ [[TMP60]], [[PRED_LOAD_IF20]] ] +; DISABLED_MASKED_STRIDED-NEXT: [[TMP62:%.*]] = extractelement <8 x i1> [[TMP5]], i64 1 +; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP62]], label [[PRED_LOAD_IF22:%.*]], label [[PRED_LOAD_CONTINUE23:%.*]] ; DISABLED_MASKED_STRIDED: pred.load.if22: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP65:%.*]] = extractelement <8 x i32> [[TMP57]], i32 1 -; DISABLED_MASKED_STRIDED-NEXT: [[TMP66:%.*]] = getelementptr inbounds i8, i8* [[P]], i32 [[TMP65]] -; DISABLED_MASKED_STRIDED-NEXT: [[TMP67:%.*]] = load i8, i8* [[TMP66]], align 1 -; DISABLED_MASKED_STRIDED-NEXT: [[TMP68:%.*]] = insertelement <8 x i8> [[TMP63]], i8 [[TMP67]], i32 1 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP63:%.*]] = extractelement <8 x i32> [[TMP55]], i64 1 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP64:%.*]] = getelementptr inbounds i8, i8* [[P]], i32 [[TMP63]] +; DISABLED_MASKED_STRIDED-NEXT: [[TMP65:%.*]] = load i8, i8* [[TMP64]], align 1 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP66:%.*]] = insertelement <8 x i8> [[TMP61]], i8 [[TMP65]], i64 1 ; DISABLED_MASKED_STRIDED-NEXT: br label [[PRED_LOAD_CONTINUE23]] ; DISABLED_MASKED_STRIDED: pred.load.continue23: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP69:%.*]] = phi <8 x i8> [ [[TMP63]], [[PRED_LOAD_CONTINUE21]] ], [ [[TMP68]], [[PRED_LOAD_IF22]] ] -; DISABLED_MASKED_STRIDED-NEXT: [[TMP70:%.*]] = extractelement <8 x i1> [[TMP7]], i32 2 -; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP70]], label [[PRED_LOAD_IF24:%.*]], label [[PRED_LOAD_CONTINUE25:%.*]] +; DISABLED_MASKED_STRIDED-NEXT: [[TMP67:%.*]] = phi <8 x i8> [ [[TMP61]], [[PRED_LOAD_CONTINUE21]] ], [ [[TMP66]], [[PRED_LOAD_IF22]] ] +; DISABLED_MASKED_STRIDED-NEXT: [[TMP68:%.*]] = extractelement <8 x i1> [[TMP5]], i64 2 +; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP68]], label [[PRED_LOAD_IF24:%.*]], label [[PRED_LOAD_CONTINUE25:%.*]] ; DISABLED_MASKED_STRIDED: pred.load.if24: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP71:%.*]] = extractelement <8 x i32> [[TMP57]], i32 2 -; DISABLED_MASKED_STRIDED-NEXT: [[TMP72:%.*]] = getelementptr inbounds i8, i8* [[P]], i32 [[TMP71]] -; DISABLED_MASKED_STRIDED-NEXT: [[TMP73:%.*]] = load i8, i8* [[TMP72]], align 1 -; DISABLED_MASKED_STRIDED-NEXT: [[TMP74:%.*]] = insertelement <8 x i8> [[TMP69]], i8 [[TMP73]], i32 2 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP69:%.*]] = extractelement <8 x i32> [[TMP55]], i64 2 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP70:%.*]] = getelementptr inbounds i8, i8* [[P]], i32 [[TMP69]] +; DISABLED_MASKED_STRIDED-NEXT: [[TMP71:%.*]] = load i8, i8* [[TMP70]], align 1 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP72:%.*]] = insertelement <8 x i8> [[TMP67]], i8 [[TMP71]], i64 2 ; DISABLED_MASKED_STRIDED-NEXT: br label [[PRED_LOAD_CONTINUE25]] ; DISABLED_MASKED_STRIDED: pred.load.continue25: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP75:%.*]] = phi <8 x i8> [ [[TMP69]], [[PRED_LOAD_CONTINUE23]] ], [ [[TMP74]], [[PRED_LOAD_IF24]] ] -; DISABLED_MASKED_STRIDED-NEXT: [[TMP76:%.*]] = extractelement <8 x i1> [[TMP7]], i32 3 -; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP76]], label [[PRED_LOAD_IF26:%.*]], label [[PRED_LOAD_CONTINUE27:%.*]] +; DISABLED_MASKED_STRIDED-NEXT: [[TMP73:%.*]] = phi <8 x i8> [ [[TMP67]], [[PRED_LOAD_CONTINUE23]] ], [ [[TMP72]], [[PRED_LOAD_IF24]] ] +; DISABLED_MASKED_STRIDED-NEXT: [[TMP74:%.*]] = extractelement <8 x i1> [[TMP5]], i64 3 +; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP74]], label [[PRED_LOAD_IF26:%.*]], label [[PRED_LOAD_CONTINUE27:%.*]] ; DISABLED_MASKED_STRIDED: pred.load.if26: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP77:%.*]] = extractelement <8 x i32> [[TMP57]], i32 3 -; DISABLED_MASKED_STRIDED-NEXT: [[TMP78:%.*]] = getelementptr inbounds i8, i8* [[P]], i32 [[TMP77]] -; DISABLED_MASKED_STRIDED-NEXT: [[TMP79:%.*]] = load i8, i8* [[TMP78]], align 1 -; DISABLED_MASKED_STRIDED-NEXT: [[TMP80:%.*]] = insertelement <8 x i8> [[TMP75]], i8 [[TMP79]], i32 3 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP75:%.*]] = extractelement <8 x i32> [[TMP55]], i64 3 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP76:%.*]] = getelementptr inbounds i8, i8* [[P]], i32 [[TMP75]] +; DISABLED_MASKED_STRIDED-NEXT: [[TMP77:%.*]] = load i8, i8* [[TMP76]], align 1 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP78:%.*]] = insertelement <8 x i8> [[TMP73]], i8 [[TMP77]], i64 3 ; DISABLED_MASKED_STRIDED-NEXT: br label [[PRED_LOAD_CONTINUE27]] ; DISABLED_MASKED_STRIDED: pred.load.continue27: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP81:%.*]] = phi <8 x i8> [ [[TMP75]], [[PRED_LOAD_CONTINUE25]] ], [ [[TMP80]], [[PRED_LOAD_IF26]] ] -; DISABLED_MASKED_STRIDED-NEXT: [[TMP82:%.*]] = extractelement <8 x i1> [[TMP7]], i32 4 -; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP82]], label [[PRED_LOAD_IF28:%.*]], label [[PRED_LOAD_CONTINUE29:%.*]] +; DISABLED_MASKED_STRIDED-NEXT: [[TMP79:%.*]] = phi <8 x i8> [ [[TMP73]], [[PRED_LOAD_CONTINUE25]] ], [ [[TMP78]], [[PRED_LOAD_IF26]] ] +; DISABLED_MASKED_STRIDED-NEXT: [[TMP80:%.*]] = extractelement <8 x i1> [[TMP5]], i64 4 +; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP80]], label [[PRED_LOAD_IF28:%.*]], label [[PRED_LOAD_CONTINUE29:%.*]] ; DISABLED_MASKED_STRIDED: pred.load.if28: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP83:%.*]] = extractelement <8 x i32> [[TMP57]], i32 4 -; DISABLED_MASKED_STRIDED-NEXT: [[TMP84:%.*]] = getelementptr inbounds i8, i8* [[P]], i32 [[TMP83]] -; DISABLED_MASKED_STRIDED-NEXT: [[TMP85:%.*]] = load i8, i8* [[TMP84]], align 1 -; DISABLED_MASKED_STRIDED-NEXT: [[TMP86:%.*]] = insertelement <8 x i8> [[TMP81]], i8 [[TMP85]], i32 4 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP81:%.*]] = extractelement <8 x i32> [[TMP55]], i64 4 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP82:%.*]] = getelementptr inbounds i8, i8* [[P]], i32 [[TMP81]] +; DISABLED_MASKED_STRIDED-NEXT: [[TMP83:%.*]] = load i8, i8* [[TMP82]], align 1 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP84:%.*]] = insertelement <8 x i8> [[TMP79]], i8 [[TMP83]], i64 4 ; DISABLED_MASKED_STRIDED-NEXT: br label [[PRED_LOAD_CONTINUE29]] ; DISABLED_MASKED_STRIDED: pred.load.continue29: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP87:%.*]] = phi <8 x i8> [ [[TMP81]], [[PRED_LOAD_CONTINUE27]] ], [ [[TMP86]], [[PRED_LOAD_IF28]] ] -; DISABLED_MASKED_STRIDED-NEXT: [[TMP88:%.*]] = extractelement <8 x i1> [[TMP7]], i32 5 -; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP88]], label [[PRED_LOAD_IF30:%.*]], label [[PRED_LOAD_CONTINUE31:%.*]] +; DISABLED_MASKED_STRIDED-NEXT: [[TMP85:%.*]] = phi <8 x i8> [ [[TMP79]], [[PRED_LOAD_CONTINUE27]] ], [ [[TMP84]], [[PRED_LOAD_IF28]] ] +; DISABLED_MASKED_STRIDED-NEXT: [[TMP86:%.*]] = extractelement <8 x i1> [[TMP5]], i64 5 +; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP86]], label [[PRED_LOAD_IF30:%.*]], label [[PRED_LOAD_CONTINUE31:%.*]] ; DISABLED_MASKED_STRIDED: pred.load.if30: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP89:%.*]] = extractelement <8 x i32> [[TMP57]], i32 5 -; DISABLED_MASKED_STRIDED-NEXT: [[TMP90:%.*]] = getelementptr inbounds i8, i8* [[P]], i32 [[TMP89]] -; DISABLED_MASKED_STRIDED-NEXT: [[TMP91:%.*]] = load i8, i8* [[TMP90]], align 1 -; DISABLED_MASKED_STRIDED-NEXT: [[TMP92:%.*]] = insertelement <8 x i8> [[TMP87]], i8 [[TMP91]], i32 5 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP87:%.*]] = extractelement <8 x i32> [[TMP55]], i64 5 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP88:%.*]] = getelementptr inbounds i8, i8* [[P]], i32 [[TMP87]] +; DISABLED_MASKED_STRIDED-NEXT: [[TMP89:%.*]] = load i8, i8* [[TMP88]], align 1 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP90:%.*]] = insertelement <8 x i8> [[TMP85]], i8 [[TMP89]], i64 5 ; DISABLED_MASKED_STRIDED-NEXT: br label [[PRED_LOAD_CONTINUE31]] ; DISABLED_MASKED_STRIDED: pred.load.continue31: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP93:%.*]] = phi <8 x i8> [ [[TMP87]], [[PRED_LOAD_CONTINUE29]] ], [ [[TMP92]], [[PRED_LOAD_IF30]] ] -; DISABLED_MASKED_STRIDED-NEXT: [[TMP94:%.*]] = extractelement <8 x i1> [[TMP7]], i32 6 -; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP94]], label [[PRED_LOAD_IF32:%.*]], label [[PRED_LOAD_CONTINUE33:%.*]] +; DISABLED_MASKED_STRIDED-NEXT: [[TMP91:%.*]] = phi <8 x i8> [ [[TMP85]], [[PRED_LOAD_CONTINUE29]] ], [ [[TMP90]], [[PRED_LOAD_IF30]] ] +; DISABLED_MASKED_STRIDED-NEXT: [[TMP92:%.*]] = extractelement <8 x i1> [[TMP5]], i64 6 +; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP92]], label [[PRED_LOAD_IF32:%.*]], label [[PRED_LOAD_CONTINUE33:%.*]] ; DISABLED_MASKED_STRIDED: pred.load.if32: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP95:%.*]] = extractelement <8 x i32> [[TMP57]], i32 6 -; DISABLED_MASKED_STRIDED-NEXT: [[TMP96:%.*]] = getelementptr inbounds i8, i8* [[P]], i32 [[TMP95]] -; DISABLED_MASKED_STRIDED-NEXT: [[TMP97:%.*]] = load i8, i8* [[TMP96]], align 1 -; DISABLED_MASKED_STRIDED-NEXT: [[TMP98:%.*]] = insertelement <8 x i8> [[TMP93]], i8 [[TMP97]], i32 6 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP93:%.*]] = extractelement <8 x i32> [[TMP55]], i64 6 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP94:%.*]] = getelementptr inbounds i8, i8* [[P]], i32 [[TMP93]] +; DISABLED_MASKED_STRIDED-NEXT: [[TMP95:%.*]] = load i8, i8* [[TMP94]], align 1 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP96:%.*]] = insertelement <8 x i8> [[TMP91]], i8 [[TMP95]], i64 6 ; DISABLED_MASKED_STRIDED-NEXT: br label [[PRED_LOAD_CONTINUE33]] ; DISABLED_MASKED_STRIDED: pred.load.continue33: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP99:%.*]] = phi <8 x i8> [ [[TMP93]], [[PRED_LOAD_CONTINUE31]] ], [ [[TMP98]], [[PRED_LOAD_IF32]] ] -; DISABLED_MASKED_STRIDED-NEXT: [[TMP100:%.*]] = extractelement <8 x i1> [[TMP7]], i32 7 -; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP100]], label [[PRED_LOAD_IF34:%.*]], label [[PRED_LOAD_CONTINUE35:%.*]] +; DISABLED_MASKED_STRIDED-NEXT: [[TMP97:%.*]] = phi <8 x i8> [ [[TMP91]], [[PRED_LOAD_CONTINUE31]] ], [ [[TMP96]], [[PRED_LOAD_IF32]] ] +; DISABLED_MASKED_STRIDED-NEXT: [[TMP98:%.*]] = extractelement <8 x i1> [[TMP5]], i64 7 +; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP98]], label [[PRED_LOAD_IF34:%.*]], label [[PRED_LOAD_CONTINUE35:%.*]] ; DISABLED_MASKED_STRIDED: pred.load.if34: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP101:%.*]] = extractelement <8 x i32> [[TMP57]], i32 7 -; DISABLED_MASKED_STRIDED-NEXT: [[TMP102:%.*]] = getelementptr inbounds i8, i8* [[P]], i32 [[TMP101]] -; DISABLED_MASKED_STRIDED-NEXT: [[TMP103:%.*]] = load i8, i8* [[TMP102]], align 1 -; DISABLED_MASKED_STRIDED-NEXT: [[TMP104:%.*]] = insertelement <8 x i8> [[TMP99]], i8 [[TMP103]], i32 7 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP99:%.*]] = extractelement <8 x i32> [[TMP55]], i64 7 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP100:%.*]] = getelementptr inbounds i8, i8* [[P]], i32 [[TMP99]] +; DISABLED_MASKED_STRIDED-NEXT: [[TMP101:%.*]] = load i8, i8* [[TMP100]], align 1 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP102:%.*]] = insertelement <8 x i8> [[TMP97]], i8 [[TMP101]], i64 7 ; DISABLED_MASKED_STRIDED-NEXT: br label [[PRED_LOAD_CONTINUE35]] ; DISABLED_MASKED_STRIDED: pred.load.continue35: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP105:%.*]] = phi <8 x i8> [ [[TMP99]], [[PRED_LOAD_CONTINUE33]] ], [ [[TMP104]], [[PRED_LOAD_IF34]] ] -; DISABLED_MASKED_STRIDED-NEXT: [[TMP106:%.*]] = icmp slt <8 x i8> [[TMP56]], [[TMP105]] -; DISABLED_MASKED_STRIDED-NEXT: [[TMP107:%.*]] = select <8 x i1> [[TMP106]], <8 x i8> [[TMP105]], <8 x i8> [[TMP56]] -; DISABLED_MASKED_STRIDED-NEXT: [[TMP108:%.*]] = extractelement <8 x i1> [[TMP7]], i32 0 -; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP108]], label [[PRED_STORE_IF:%.*]], label [[PRED_STORE_CONTINUE:%.*]] +; DISABLED_MASKED_STRIDED-NEXT: [[TMP103:%.*]] = phi <8 x i8> [ [[TMP97]], [[PRED_LOAD_CONTINUE33]] ], [ [[TMP102]], [[PRED_LOAD_IF34]] ] +; DISABLED_MASKED_STRIDED-NEXT: [[TMP104:%.*]] = icmp slt <8 x i8> [[TMP54]], [[TMP103]] +; DISABLED_MASKED_STRIDED-NEXT: [[TMP105:%.*]] = select <8 x i1> [[TMP104]], <8 x i8> [[TMP103]], <8 x i8> [[TMP54]] +; DISABLED_MASKED_STRIDED-NEXT: [[TMP106:%.*]] = extractelement <8 x i1> [[TMP5]], i64 0 +; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP106]], label [[PRED_STORE_IF:%.*]], label [[PRED_STORE_CONTINUE:%.*]] ; DISABLED_MASKED_STRIDED: pred.store.if: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP109:%.*]] = extractelement <8 x i32> [[TMP8]], i32 0 -; DISABLED_MASKED_STRIDED-NEXT: [[TMP110:%.*]] = getelementptr inbounds i8, i8* [[Q]], i32 [[TMP109]] -; DISABLED_MASKED_STRIDED-NEXT: [[TMP111:%.*]] = extractelement <8 x i8> [[TMP107]], i32 0 -; DISABLED_MASKED_STRIDED-NEXT: store i8 [[TMP111]], i8* [[TMP110]], align 1 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP107:%.*]] = extractelement <8 x i32> [[TMP6]], i64 0 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP108:%.*]] = getelementptr inbounds i8, i8* [[Q]], i32 [[TMP107]] +; DISABLED_MASKED_STRIDED-NEXT: [[TMP109:%.*]] = extractelement <8 x i8> [[TMP105]], i64 0 +; DISABLED_MASKED_STRIDED-NEXT: store i8 [[TMP109]], i8* [[TMP108]], align 1 ; DISABLED_MASKED_STRIDED-NEXT: br label [[PRED_STORE_CONTINUE]] ; DISABLED_MASKED_STRIDED: pred.store.continue: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP112:%.*]] = extractelement <8 x i1> [[TMP7]], i32 1 -; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP112]], label [[PRED_STORE_IF36:%.*]], label [[PRED_STORE_CONTINUE37:%.*]] +; DISABLED_MASKED_STRIDED-NEXT: [[TMP110:%.*]] = extractelement <8 x i1> [[TMP5]], i64 1 +; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP110]], label [[PRED_STORE_IF36:%.*]], label [[PRED_STORE_CONTINUE37:%.*]] ; DISABLED_MASKED_STRIDED: pred.store.if36: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP113:%.*]] = extractelement <8 x i32> [[TMP8]], i32 1 -; DISABLED_MASKED_STRIDED-NEXT: [[TMP114:%.*]] = getelementptr inbounds i8, i8* [[Q]], i32 [[TMP113]] -; DISABLED_MASKED_STRIDED-NEXT: [[TMP115:%.*]] = extractelement <8 x i8> [[TMP107]], i32 1 -; DISABLED_MASKED_STRIDED-NEXT: store i8 [[TMP115]], i8* [[TMP114]], align 1 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP111:%.*]] = extractelement <8 x i32> [[TMP6]], i64 1 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP112:%.*]] = getelementptr inbounds i8, i8* [[Q]], i32 [[TMP111]] +; DISABLED_MASKED_STRIDED-NEXT: [[TMP113:%.*]] = extractelement <8 x i8> [[TMP105]], i64 1 +; DISABLED_MASKED_STRIDED-NEXT: store i8 [[TMP113]], i8* [[TMP112]], align 1 ; DISABLED_MASKED_STRIDED-NEXT: br label [[PRED_STORE_CONTINUE37]] ; DISABLED_MASKED_STRIDED: pred.store.continue37: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP116:%.*]] = extractelement <8 x i1> [[TMP7]], i32 2 -; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP116]], label [[PRED_STORE_IF38:%.*]], label [[PRED_STORE_CONTINUE39:%.*]] +; DISABLED_MASKED_STRIDED-NEXT: [[TMP114:%.*]] = extractelement <8 x i1> [[TMP5]], i64 2 +; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP114]], label [[PRED_STORE_IF38:%.*]], label [[PRED_STORE_CONTINUE39:%.*]] ; DISABLED_MASKED_STRIDED: pred.store.if38: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP117:%.*]] = extractelement <8 x i32> [[TMP8]], i32 2 -; DISABLED_MASKED_STRIDED-NEXT: [[TMP118:%.*]] = getelementptr inbounds i8, i8* [[Q]], i32 [[TMP117]] -; DISABLED_MASKED_STRIDED-NEXT: [[TMP119:%.*]] = extractelement <8 x i8> [[TMP107]], i32 2 -; DISABLED_MASKED_STRIDED-NEXT: store i8 [[TMP119]], i8* [[TMP118]], align 1 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP115:%.*]] = extractelement <8 x i32> [[TMP6]], i64 2 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP116:%.*]] = getelementptr inbounds i8, i8* [[Q]], i32 [[TMP115]] +; DISABLED_MASKED_STRIDED-NEXT: [[TMP117:%.*]] = extractelement <8 x i8> [[TMP105]], i64 2 +; DISABLED_MASKED_STRIDED-NEXT: store i8 [[TMP117]], i8* [[TMP116]], align 1 ; DISABLED_MASKED_STRIDED-NEXT: br label [[PRED_STORE_CONTINUE39]] ; DISABLED_MASKED_STRIDED: pred.store.continue39: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP120:%.*]] = extractelement <8 x i1> [[TMP7]], i32 3 -; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP120]], label [[PRED_STORE_IF40:%.*]], label [[PRED_STORE_CONTINUE41:%.*]] +; DISABLED_MASKED_STRIDED-NEXT: [[TMP118:%.*]] = extractelement <8 x i1> [[TMP5]], i64 3 +; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP118]], label [[PRED_STORE_IF40:%.*]], label [[PRED_STORE_CONTINUE41:%.*]] ; DISABLED_MASKED_STRIDED: pred.store.if40: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP121:%.*]] = extractelement <8 x i32> [[TMP8]], i32 3 -; DISABLED_MASKED_STRIDED-NEXT: [[TMP122:%.*]] = getelementptr inbounds i8, i8* [[Q]], i32 [[TMP121]] -; DISABLED_MASKED_STRIDED-NEXT: [[TMP123:%.*]] = extractelement <8 x i8> [[TMP107]], i32 3 -; DISABLED_MASKED_STRIDED-NEXT: store i8 [[TMP123]], i8* [[TMP122]], align 1 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP119:%.*]] = extractelement <8 x i32> [[TMP6]], i64 3 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP120:%.*]] = getelementptr inbounds i8, i8* [[Q]], i32 [[TMP119]] +; DISABLED_MASKED_STRIDED-NEXT: [[TMP121:%.*]] = extractelement <8 x i8> [[TMP105]], i64 3 +; DISABLED_MASKED_STRIDED-NEXT: store i8 [[TMP121]], i8* [[TMP120]], align 1 ; DISABLED_MASKED_STRIDED-NEXT: br label [[PRED_STORE_CONTINUE41]] ; DISABLED_MASKED_STRIDED: pred.store.continue41: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP124:%.*]] = extractelement <8 x i1> [[TMP7]], i32 4 -; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP124]], label [[PRED_STORE_IF42:%.*]], label [[PRED_STORE_CONTINUE43:%.*]] +; DISABLED_MASKED_STRIDED-NEXT: [[TMP122:%.*]] = extractelement <8 x i1> [[TMP5]], i64 4 +; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP122]], label [[PRED_STORE_IF42:%.*]], label [[PRED_STORE_CONTINUE43:%.*]] ; DISABLED_MASKED_STRIDED: pred.store.if42: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP125:%.*]] = extractelement <8 x i32> [[TMP8]], i32 4 -; DISABLED_MASKED_STRIDED-NEXT: [[TMP126:%.*]] = getelementptr inbounds i8, i8* [[Q]], i32 [[TMP125]] -; DISABLED_MASKED_STRIDED-NEXT: [[TMP127:%.*]] = extractelement <8 x i8> [[TMP107]], i32 4 -; DISABLED_MASKED_STRIDED-NEXT: store i8 [[TMP127]], i8* [[TMP126]], align 1 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP123:%.*]] = extractelement <8 x i32> [[TMP6]], i64 4 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP124:%.*]] = getelementptr inbounds i8, i8* [[Q]], i32 [[TMP123]] +; DISABLED_MASKED_STRIDED-NEXT: [[TMP125:%.*]] = extractelement <8 x i8> [[TMP105]], i64 4 +; DISABLED_MASKED_STRIDED-NEXT: store i8 [[TMP125]], i8* [[TMP124]], align 1 ; DISABLED_MASKED_STRIDED-NEXT: br label [[PRED_STORE_CONTINUE43]] ; DISABLED_MASKED_STRIDED: pred.store.continue43: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP128:%.*]] = extractelement <8 x i1> [[TMP7]], i32 5 -; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP128]], label [[PRED_STORE_IF44:%.*]], label [[PRED_STORE_CONTINUE45:%.*]] +; DISABLED_MASKED_STRIDED-NEXT: [[TMP126:%.*]] = extractelement <8 x i1> [[TMP5]], i64 5 +; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP126]], label [[PRED_STORE_IF44:%.*]], label [[PRED_STORE_CONTINUE45:%.*]] ; DISABLED_MASKED_STRIDED: pred.store.if44: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP129:%.*]] = extractelement <8 x i32> [[TMP8]], i32 5 -; DISABLED_MASKED_STRIDED-NEXT: [[TMP130:%.*]] = getelementptr inbounds i8, i8* [[Q]], i32 [[TMP129]] -; DISABLED_MASKED_STRIDED-NEXT: [[TMP131:%.*]] = extractelement <8 x i8> [[TMP107]], i32 5 -; DISABLED_MASKED_STRIDED-NEXT: store i8 [[TMP131]], i8* [[TMP130]], align 1 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP127:%.*]] = extractelement <8 x i32> [[TMP6]], i64 5 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP128:%.*]] = getelementptr inbounds i8, i8* [[Q]], i32 [[TMP127]] +; DISABLED_MASKED_STRIDED-NEXT: [[TMP129:%.*]] = extractelement <8 x i8> [[TMP105]], i64 5 +; DISABLED_MASKED_STRIDED-NEXT: store i8 [[TMP129]], i8* [[TMP128]], align 1 ; DISABLED_MASKED_STRIDED-NEXT: br label [[PRED_STORE_CONTINUE45]] ; DISABLED_MASKED_STRIDED: pred.store.continue45: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP132:%.*]] = extractelement <8 x i1> [[TMP7]], i32 6 -; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP132]], label [[PRED_STORE_IF46:%.*]], label [[PRED_STORE_CONTINUE47:%.*]] +; DISABLED_MASKED_STRIDED-NEXT: [[TMP130:%.*]] = extractelement <8 x i1> [[TMP5]], i64 6 +; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP130]], label [[PRED_STORE_IF46:%.*]], label [[PRED_STORE_CONTINUE47:%.*]] ; DISABLED_MASKED_STRIDED: pred.store.if46: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP133:%.*]] = extractelement <8 x i32> [[TMP8]], i32 6 -; DISABLED_MASKED_STRIDED-NEXT: [[TMP134:%.*]] = getelementptr inbounds i8, i8* [[Q]], i32 [[TMP133]] -; DISABLED_MASKED_STRIDED-NEXT: [[TMP135:%.*]] = extractelement <8 x i8> [[TMP107]], i32 6 -; DISABLED_MASKED_STRIDED-NEXT: store i8 [[TMP135]], i8* [[TMP134]], align 1 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP131:%.*]] = extractelement <8 x i32> [[TMP6]], i64 6 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP132:%.*]] = getelementptr inbounds i8, i8* [[Q]], i32 [[TMP131]] +; DISABLED_MASKED_STRIDED-NEXT: [[TMP133:%.*]] = extractelement <8 x i8> [[TMP105]], i64 6 +; DISABLED_MASKED_STRIDED-NEXT: store i8 [[TMP133]], i8* [[TMP132]], align 1 ; DISABLED_MASKED_STRIDED-NEXT: br label [[PRED_STORE_CONTINUE47]] ; DISABLED_MASKED_STRIDED: pred.store.continue47: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP136:%.*]] = extractelement <8 x i1> [[TMP7]], i32 7 -; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP136]], label [[PRED_STORE_IF48:%.*]], label [[PRED_STORE_CONTINUE49:%.*]] +; DISABLED_MASKED_STRIDED-NEXT: [[TMP134:%.*]] = extractelement <8 x i1> [[TMP5]], i64 7 +; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP134]], label [[PRED_STORE_IF48:%.*]], label [[PRED_STORE_CONTINUE49:%.*]] ; DISABLED_MASKED_STRIDED: pred.store.if48: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP137:%.*]] = extractelement <8 x i32> [[TMP8]], i32 7 -; DISABLED_MASKED_STRIDED-NEXT: [[TMP138:%.*]] = getelementptr inbounds i8, i8* [[Q]], i32 [[TMP137]] -; DISABLED_MASKED_STRIDED-NEXT: [[TMP139:%.*]] = extractelement <8 x i8> [[TMP107]], i32 7 -; DISABLED_MASKED_STRIDED-NEXT: store i8 [[TMP139]], i8* [[TMP138]], align 1 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP135:%.*]] = extractelement <8 x i32> [[TMP6]], i64 7 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP136:%.*]] = getelementptr inbounds i8, i8* [[Q]], i32 [[TMP135]] +; DISABLED_MASKED_STRIDED-NEXT: [[TMP137:%.*]] = extractelement <8 x i8> [[TMP105]], i64 7 +; DISABLED_MASKED_STRIDED-NEXT: store i8 [[TMP137]], i8* [[TMP136]], align 1 ; DISABLED_MASKED_STRIDED-NEXT: br label [[PRED_STORE_CONTINUE49]] ; DISABLED_MASKED_STRIDED: pred.store.continue49: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP140:%.*]] = sub <8 x i8> zeroinitializer, [[TMP107]] -; DISABLED_MASKED_STRIDED-NEXT: [[TMP141:%.*]] = extractelement <8 x i1> [[TMP7]], i32 0 -; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP141]], label [[PRED_STORE_IF50:%.*]], label [[PRED_STORE_CONTINUE51:%.*]] +; DISABLED_MASKED_STRIDED-NEXT: [[TMP138:%.*]] = sub <8 x i8> zeroinitializer, [[TMP105]] +; DISABLED_MASKED_STRIDED-NEXT: [[TMP139:%.*]] = extractelement <8 x i1> [[TMP5]], i64 0 +; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP139]], label [[PRED_STORE_IF50:%.*]], label [[PRED_STORE_CONTINUE51:%.*]] ; DISABLED_MASKED_STRIDED: pred.store.if50: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP142:%.*]] = extractelement <8 x i32> [[TMP57]], i32 0 -; DISABLED_MASKED_STRIDED-NEXT: [[TMP143:%.*]] = getelementptr inbounds i8, i8* [[Q]], i32 [[TMP142]] -; DISABLED_MASKED_STRIDED-NEXT: [[TMP144:%.*]] = extractelement <8 x i8> [[TMP140]], i32 0 -; DISABLED_MASKED_STRIDED-NEXT: store i8 [[TMP144]], i8* [[TMP143]], align 1 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP140:%.*]] = extractelement <8 x i32> [[TMP55]], i64 0 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP141:%.*]] = getelementptr inbounds i8, i8* [[Q]], i32 [[TMP140]] +; DISABLED_MASKED_STRIDED-NEXT: [[TMP142:%.*]] = extractelement <8 x i8> [[TMP138]], i64 0 +; DISABLED_MASKED_STRIDED-NEXT: store i8 [[TMP142]], i8* [[TMP141]], align 1 ; DISABLED_MASKED_STRIDED-NEXT: br label [[PRED_STORE_CONTINUE51]] ; DISABLED_MASKED_STRIDED: pred.store.continue51: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP145:%.*]] = extractelement <8 x i1> [[TMP7]], i32 1 -; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP145]], label [[PRED_STORE_IF52:%.*]], label [[PRED_STORE_CONTINUE53:%.*]] +; DISABLED_MASKED_STRIDED-NEXT: [[TMP143:%.*]] = extractelement <8 x i1> [[TMP5]], i64 1 +; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP143]], label [[PRED_STORE_IF52:%.*]], label [[PRED_STORE_CONTINUE53:%.*]] ; DISABLED_MASKED_STRIDED: pred.store.if52: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP146:%.*]] = extractelement <8 x i32> [[TMP57]], i32 1 -; DISABLED_MASKED_STRIDED-NEXT: [[TMP147:%.*]] = getelementptr inbounds i8, i8* [[Q]], i32 [[TMP146]] -; DISABLED_MASKED_STRIDED-NEXT: [[TMP148:%.*]] = extractelement <8 x i8> [[TMP140]], i32 1 -; DISABLED_MASKED_STRIDED-NEXT: store i8 [[TMP148]], i8* [[TMP147]], align 1 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP144:%.*]] = extractelement <8 x i32> [[TMP55]], i64 1 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP145:%.*]] = getelementptr inbounds i8, i8* [[Q]], i32 [[TMP144]] +; DISABLED_MASKED_STRIDED-NEXT: [[TMP146:%.*]] = extractelement <8 x i8> [[TMP138]], i64 1 +; DISABLED_MASKED_STRIDED-NEXT: store i8 [[TMP146]], i8* [[TMP145]], align 1 ; DISABLED_MASKED_STRIDED-NEXT: br label [[PRED_STORE_CONTINUE53]] ; DISABLED_MASKED_STRIDED: pred.store.continue53: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP149:%.*]] = extractelement <8 x i1> [[TMP7]], i32 2 -; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP149]], label [[PRED_STORE_IF54:%.*]], label [[PRED_STORE_CONTINUE55:%.*]] +; DISABLED_MASKED_STRIDED-NEXT: [[TMP147:%.*]] = extractelement <8 x i1> [[TMP5]], i64 2 +; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP147]], label [[PRED_STORE_IF54:%.*]], label [[PRED_STORE_CONTINUE55:%.*]] ; DISABLED_MASKED_STRIDED: pred.store.if54: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP150:%.*]] = extractelement <8 x i32> [[TMP57]], i32 2 -; DISABLED_MASKED_STRIDED-NEXT: [[TMP151:%.*]] = getelementptr inbounds i8, i8* [[Q]], i32 [[TMP150]] -; DISABLED_MASKED_STRIDED-NEXT: [[TMP152:%.*]] = extractelement <8 x i8> [[TMP140]], i32 2 -; DISABLED_MASKED_STRIDED-NEXT: store i8 [[TMP152]], i8* [[TMP151]], align 1 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP148:%.*]] = extractelement <8 x i32> [[TMP55]], i64 2 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP149:%.*]] = getelementptr inbounds i8, i8* [[Q]], i32 [[TMP148]] +; DISABLED_MASKED_STRIDED-NEXT: [[TMP150:%.*]] = extractelement <8 x i8> [[TMP138]], i64 2 +; DISABLED_MASKED_STRIDED-NEXT: store i8 [[TMP150]], i8* [[TMP149]], align 1 ; DISABLED_MASKED_STRIDED-NEXT: br label [[PRED_STORE_CONTINUE55]] ; DISABLED_MASKED_STRIDED: pred.store.continue55: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP153:%.*]] = extractelement <8 x i1> [[TMP7]], i32 3 -; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP153]], label [[PRED_STORE_IF56:%.*]], label [[PRED_STORE_CONTINUE57:%.*]] +; DISABLED_MASKED_STRIDED-NEXT: [[TMP151:%.*]] = extractelement <8 x i1> [[TMP5]], i64 3 +; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP151]], label [[PRED_STORE_IF56:%.*]], label [[PRED_STORE_CONTINUE57:%.*]] ; DISABLED_MASKED_STRIDED: pred.store.if56: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP154:%.*]] = extractelement <8 x i32> [[TMP57]], i32 3 -; DISABLED_MASKED_STRIDED-NEXT: [[TMP155:%.*]] = getelementptr inbounds i8, i8* [[Q]], i32 [[TMP154]] -; DISABLED_MASKED_STRIDED-NEXT: [[TMP156:%.*]] = extractelement <8 x i8> [[TMP140]], i32 3 -; DISABLED_MASKED_STRIDED-NEXT: store i8 [[TMP156]], i8* [[TMP155]], align 1 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP152:%.*]] = extractelement <8 x i32> [[TMP55]], i64 3 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP153:%.*]] = getelementptr inbounds i8, i8* [[Q]], i32 [[TMP152]] +; DISABLED_MASKED_STRIDED-NEXT: [[TMP154:%.*]] = extractelement <8 x i8> [[TMP138]], i64 3 +; DISABLED_MASKED_STRIDED-NEXT: store i8 [[TMP154]], i8* [[TMP153]], align 1 ; DISABLED_MASKED_STRIDED-NEXT: br label [[PRED_STORE_CONTINUE57]] ; DISABLED_MASKED_STRIDED: pred.store.continue57: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP157:%.*]] = extractelement <8 x i1> [[TMP7]], i32 4 -; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP157]], label [[PRED_STORE_IF58:%.*]], label [[PRED_STORE_CONTINUE59:%.*]] +; DISABLED_MASKED_STRIDED-NEXT: [[TMP155:%.*]] = extractelement <8 x i1> [[TMP5]], i64 4 +; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP155]], label [[PRED_STORE_IF58:%.*]], label [[PRED_STORE_CONTINUE59:%.*]] ; DISABLED_MASKED_STRIDED: pred.store.if58: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP158:%.*]] = extractelement <8 x i32> [[TMP57]], i32 4 -; DISABLED_MASKED_STRIDED-NEXT: [[TMP159:%.*]] = getelementptr inbounds i8, i8* [[Q]], i32 [[TMP158]] -; DISABLED_MASKED_STRIDED-NEXT: [[TMP160:%.*]] = extractelement <8 x i8> [[TMP140]], i32 4 -; DISABLED_MASKED_STRIDED-NEXT: store i8 [[TMP160]], i8* [[TMP159]], align 1 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP156:%.*]] = extractelement <8 x i32> [[TMP55]], i64 4 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP157:%.*]] = getelementptr inbounds i8, i8* [[Q]], i32 [[TMP156]] +; DISABLED_MASKED_STRIDED-NEXT: [[TMP158:%.*]] = extractelement <8 x i8> [[TMP138]], i64 4 +; DISABLED_MASKED_STRIDED-NEXT: store i8 [[TMP158]], i8* [[TMP157]], align 1 ; DISABLED_MASKED_STRIDED-NEXT: br label [[PRED_STORE_CONTINUE59]] ; DISABLED_MASKED_STRIDED: pred.store.continue59: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP161:%.*]] = extractelement <8 x i1> [[TMP7]], i32 5 -; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP161]], label [[PRED_STORE_IF60:%.*]], label [[PRED_STORE_CONTINUE61:%.*]] +; DISABLED_MASKED_STRIDED-NEXT: [[TMP159:%.*]] = extractelement <8 x i1> [[TMP5]], i64 5 +; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP159]], label [[PRED_STORE_IF60:%.*]], label [[PRED_STORE_CONTINUE61:%.*]] ; DISABLED_MASKED_STRIDED: pred.store.if60: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP162:%.*]] = extractelement <8 x i32> [[TMP57]], i32 5 -; DISABLED_MASKED_STRIDED-NEXT: [[TMP163:%.*]] = getelementptr inbounds i8, i8* [[Q]], i32 [[TMP162]] -; DISABLED_MASKED_STRIDED-NEXT: [[TMP164:%.*]] = extractelement <8 x i8> [[TMP140]], i32 5 -; DISABLED_MASKED_STRIDED-NEXT: store i8 [[TMP164]], i8* [[TMP163]], align 1 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP160:%.*]] = extractelement <8 x i32> [[TMP55]], i64 5 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP161:%.*]] = getelementptr inbounds i8, i8* [[Q]], i32 [[TMP160]] +; DISABLED_MASKED_STRIDED-NEXT: [[TMP162:%.*]] = extractelement <8 x i8> [[TMP138]], i64 5 +; DISABLED_MASKED_STRIDED-NEXT: store i8 [[TMP162]], i8* [[TMP161]], align 1 ; DISABLED_MASKED_STRIDED-NEXT: br label [[PRED_STORE_CONTINUE61]] ; DISABLED_MASKED_STRIDED: pred.store.continue61: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP165:%.*]] = extractelement <8 x i1> [[TMP7]], i32 6 -; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP165]], label [[PRED_STORE_IF62:%.*]], label [[PRED_STORE_CONTINUE63:%.*]] +; DISABLED_MASKED_STRIDED-NEXT: [[TMP163:%.*]] = extractelement <8 x i1> [[TMP5]], i64 6 +; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP163]], label [[PRED_STORE_IF62:%.*]], label [[PRED_STORE_CONTINUE63:%.*]] ; DISABLED_MASKED_STRIDED: pred.store.if62: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP166:%.*]] = extractelement <8 x i32> [[TMP57]], i32 6 -; DISABLED_MASKED_STRIDED-NEXT: [[TMP167:%.*]] = getelementptr inbounds i8, i8* [[Q]], i32 [[TMP166]] -; DISABLED_MASKED_STRIDED-NEXT: [[TMP168:%.*]] = extractelement <8 x i8> [[TMP140]], i32 6 -; DISABLED_MASKED_STRIDED-NEXT: store i8 [[TMP168]], i8* [[TMP167]], align 1 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP164:%.*]] = extractelement <8 x i32> [[TMP55]], i64 6 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP165:%.*]] = getelementptr inbounds i8, i8* [[Q]], i32 [[TMP164]] +; DISABLED_MASKED_STRIDED-NEXT: [[TMP166:%.*]] = extractelement <8 x i8> [[TMP138]], i64 6 +; DISABLED_MASKED_STRIDED-NEXT: store i8 [[TMP166]], i8* [[TMP165]], align 1 ; DISABLED_MASKED_STRIDED-NEXT: br label [[PRED_STORE_CONTINUE63]] ; DISABLED_MASKED_STRIDED: pred.store.continue63: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP169:%.*]] = extractelement <8 x i1> [[TMP7]], i32 7 -; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP169]], label [[PRED_STORE_IF64:%.*]], label [[PRED_STORE_CONTINUE65]] +; DISABLED_MASKED_STRIDED-NEXT: [[TMP167:%.*]] = extractelement <8 x i1> [[TMP5]], i64 7 +; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP167]], label [[PRED_STORE_IF64:%.*]], label [[PRED_STORE_CONTINUE65]] ; DISABLED_MASKED_STRIDED: pred.store.if64: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP170:%.*]] = extractelement <8 x i32> [[TMP57]], i32 7 -; DISABLED_MASKED_STRIDED-NEXT: [[TMP171:%.*]] = getelementptr inbounds i8, i8* [[Q]], i32 [[TMP170]] -; DISABLED_MASKED_STRIDED-NEXT: [[TMP172:%.*]] = extractelement <8 x i8> [[TMP140]], i32 7 -; DISABLED_MASKED_STRIDED-NEXT: store i8 [[TMP172]], i8* [[TMP171]], align 1 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP168:%.*]] = extractelement <8 x i32> [[TMP55]], i64 7 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP169:%.*]] = getelementptr inbounds i8, i8* [[Q]], i32 [[TMP168]] +; DISABLED_MASKED_STRIDED-NEXT: [[TMP170:%.*]] = extractelement <8 x i8> [[TMP138]], i64 7 +; DISABLED_MASKED_STRIDED-NEXT: store i8 [[TMP170]], i8* [[TMP169]], align 1 ; DISABLED_MASKED_STRIDED-NEXT: br label [[PRED_STORE_CONTINUE65]] ; DISABLED_MASKED_STRIDED: pred.store.continue65: ; DISABLED_MASKED_STRIDED-NEXT: [[INDEX_NEXT]] = add nuw i32 [[INDEX]], 8 ; DISABLED_MASKED_STRIDED-NEXT: [[VEC_IND_NEXT]] = add <8 x i32> [[VEC_IND]], -; DISABLED_MASKED_STRIDED-NEXT: [[TMP173:%.*]] = icmp eq i32 [[INDEX_NEXT]], 1024 -; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP173]], label [[FOR_END:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP0:![0-9]+]] +; DISABLED_MASKED_STRIDED-NEXT: [[TMP171:%.*]] = icmp eq i32 [[INDEX_NEXT]], 1024 +; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP171]], label [[FOR_END:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP8:![0-9]+]] ; DISABLED_MASKED_STRIDED: for.body: ; DISABLED_MASKED_STRIDED-NEXT: [[IX_024:%.*]] = phi i32 [ [[INC:%.*]], [[FOR_INC:%.*]] ], [ 1024, [[ENTRY:%.*]] ] ; DISABLED_MASKED_STRIDED-NEXT: [[CMP1:%.*]] = icmp ugt i32 [[IX_024]], [[CONV]] @@ -1837,12 +1846,12 @@ ; DISABLED_MASKED_STRIDED: if.then: ; DISABLED_MASKED_STRIDED-NEXT: [[MUL:%.*]] = shl nuw nsw i32 [[IX_024]], 1 ; DISABLED_MASKED_STRIDED-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i8, i8* [[P]], i32 [[MUL]] -; DISABLED_MASKED_STRIDED-NEXT: [[TMP174:%.*]] = load i8, i8* [[ARRAYIDX]], align 1 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP172:%.*]] = load i8, i8* [[ARRAYIDX]], align 1 ; DISABLED_MASKED_STRIDED-NEXT: [[ADD:%.*]] = or i32 [[MUL]], 1 ; DISABLED_MASKED_STRIDED-NEXT: [[ARRAYIDX4:%.*]] = getelementptr inbounds i8, i8* [[P]], i32 [[ADD]] -; DISABLED_MASKED_STRIDED-NEXT: [[TMP175:%.*]] = load i8, i8* [[ARRAYIDX4]], align 1 -; DISABLED_MASKED_STRIDED-NEXT: [[CMP_I:%.*]] = icmp slt i8 [[TMP174]], [[TMP175]] -; DISABLED_MASKED_STRIDED-NEXT: [[SPEC_SELECT_I:%.*]] = select i1 [[CMP_I]], i8 [[TMP175]], i8 [[TMP174]] +; DISABLED_MASKED_STRIDED-NEXT: [[TMP173:%.*]] = load i8, i8* [[ARRAYIDX4]], align 1 +; DISABLED_MASKED_STRIDED-NEXT: [[CMP_I:%.*]] = icmp slt i8 [[TMP172]], [[TMP173]] +; DISABLED_MASKED_STRIDED-NEXT: [[SPEC_SELECT_I:%.*]] = select i1 [[CMP_I]], i8 [[TMP173]], i8 [[TMP172]] ; DISABLED_MASKED_STRIDED-NEXT: [[ARRAYIDX6:%.*]] = getelementptr inbounds i8, i8* [[Q]], i32 [[MUL]] ; DISABLED_MASKED_STRIDED-NEXT: store i8 [[SPEC_SELECT_I]], i8* [[ARRAYIDX6]], align 1 ; DISABLED_MASKED_STRIDED-NEXT: [[SUB:%.*]] = sub i8 0, [[SPEC_SELECT_I]] @@ -1852,333 +1861,342 @@ ; DISABLED_MASKED_STRIDED: for.inc: ; DISABLED_MASKED_STRIDED-NEXT: [[INC]] = add nsw i32 [[IX_024]], -1 ; DISABLED_MASKED_STRIDED-NEXT: [[EXITCOND:%.*]] = icmp eq i32 [[INC]], 0 -; DISABLED_MASKED_STRIDED-NEXT: br i1 [[EXITCOND]], label [[FOR_END]], label [[FOR_BODY]], !llvm.loop [[LOOP2:![0-9]+]] +; DISABLED_MASKED_STRIDED-NEXT: br i1 [[EXITCOND]], label [[FOR_END]], label [[FOR_BODY]], !llvm.loop [[LOOP9:![0-9]+]] ; DISABLED_MASKED_STRIDED: for.end: ; DISABLED_MASKED_STRIDED-NEXT: ret void ; ; ENABLED_MASKED_STRIDED-LABEL: @masked_strided2_reverse( -; ENABLED_MASKED_STRIDED: br i1 {{%.*}}, label [[FOR_BODY:%.*]], label [[VECTOR_PH:%.*]] +; ENABLED_MASKED_STRIDED-NEXT: entry: +; ENABLED_MASKED_STRIDED-NEXT: [[CONV:%.*]] = zext i8 [[GUARD:%.*]] to i32 +; ENABLED_MASKED_STRIDED-NEXT: [[SCEVGEP:%.*]] = getelementptr i8, i8* [[Q:%.*]], i32 2048 +; ENABLED_MASKED_STRIDED-NEXT: [[TMP0:%.*]] = getelementptr i8, i8* [[Q]], i32 2 +; ENABLED_MASKED_STRIDED-NEXT: [[TMP1:%.*]] = icmp ugt i8* [[TMP0]], [[SCEVGEP]] +; ENABLED_MASKED_STRIDED-NEXT: [[SCEVGEP2:%.*]] = getelementptr i8, i8* [[Q]], i32 2049 +; ENABLED_MASKED_STRIDED-NEXT: [[TMP2:%.*]] = getelementptr i8, i8* [[Q]], i32 3 +; ENABLED_MASKED_STRIDED-NEXT: [[TMP3:%.*]] = icmp ugt i8* [[TMP2]], [[SCEVGEP2]] +; ENABLED_MASKED_STRIDED-NEXT: [[TMP4:%.*]] = or i1 [[TMP1]], [[TMP3]] +; ENABLED_MASKED_STRIDED-NEXT: br i1 [[TMP4]], label [[FOR_BODY:%.*]], label [[VECTOR_PH:%.*]] ; ENABLED_MASKED_STRIDED: vector.ph: -; ENABLED_MASKED_STRIDED-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <8 x i32> poison, i32 [[CONV]], i32 0 +; ENABLED_MASKED_STRIDED-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <8 x i32> poison, i32 [[CONV]], i64 0 ; ENABLED_MASKED_STRIDED-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector <8 x i32> [[BROADCAST_SPLATINSERT]], <8 x i32> poison, <8 x i32> zeroinitializer ; ENABLED_MASKED_STRIDED-NEXT: br label [[VECTOR_BODY:%.*]] ; ENABLED_MASKED_STRIDED: vector.body: ; ENABLED_MASKED_STRIDED-NEXT: [[INDEX:%.*]] = phi i32 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[PRED_STORE_CONTINUE65:%.*]] ] ; ENABLED_MASKED_STRIDED-NEXT: [[VEC_IND:%.*]] = phi <8 x i32> [ , [[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], [[PRED_STORE_CONTINUE65]] ] -; ENABLED_MASKED_STRIDED-NEXT: [[TMP7:%.*]] = icmp ugt <8 x i32> [[VEC_IND]], [[BROADCAST_SPLAT]] -; ENABLED_MASKED_STRIDED-NEXT: [[TMP8:%.*]] = shl nuw nsw <8 x i32> [[VEC_IND]], -; ENABLED_MASKED_STRIDED-NEXT: [[TMP9:%.*]] = extractelement <8 x i1> [[TMP7]], i32 0 -; ENABLED_MASKED_STRIDED-NEXT: br i1 [[TMP9]], label [[PRED_LOAD_IF:%.*]], label [[PRED_LOAD_CONTINUE:%.*]] +; ENABLED_MASKED_STRIDED-NEXT: [[TMP5:%.*]] = icmp ugt <8 x i32> [[VEC_IND]], [[BROADCAST_SPLAT]] +; ENABLED_MASKED_STRIDED-NEXT: [[TMP6:%.*]] = shl nuw nsw <8 x i32> [[VEC_IND]], +; ENABLED_MASKED_STRIDED-NEXT: [[TMP7:%.*]] = extractelement <8 x i1> [[TMP5]], i64 0 +; ENABLED_MASKED_STRIDED-NEXT: br i1 [[TMP7]], label [[PRED_LOAD_IF:%.*]], label [[PRED_LOAD_CONTINUE:%.*]] ; ENABLED_MASKED_STRIDED: pred.load.if: -; ENABLED_MASKED_STRIDED-NEXT: [[TMP10:%.*]] = extractelement <8 x i32> [[TMP8]], i32 0 -; ENABLED_MASKED_STRIDED-NEXT: [[TMP11:%.*]] = getelementptr inbounds i8, i8* [[P:%.*]], i32 [[TMP10]] -; ENABLED_MASKED_STRIDED-NEXT: [[TMP12:%.*]] = load i8, i8* [[TMP11]], align 1 -; ENABLED_MASKED_STRIDED-NEXT: [[TMP13:%.*]] = insertelement <8 x i8> poison, i8 [[TMP12]], i32 0 +; ENABLED_MASKED_STRIDED-NEXT: [[TMP8:%.*]] = extractelement <8 x i32> [[TMP6]], i64 0 +; ENABLED_MASKED_STRIDED-NEXT: [[TMP9:%.*]] = getelementptr inbounds i8, i8* [[P:%.*]], i32 [[TMP8]] +; ENABLED_MASKED_STRIDED-NEXT: [[TMP10:%.*]] = load i8, i8* [[TMP9]], align 1 +; ENABLED_MASKED_STRIDED-NEXT: [[TMP11:%.*]] = insertelement <8 x i8> poison, i8 [[TMP10]], i64 0 ; ENABLED_MASKED_STRIDED-NEXT: br label [[PRED_LOAD_CONTINUE]] ; ENABLED_MASKED_STRIDED: pred.load.continue: -; ENABLED_MASKED_STRIDED-NEXT: [[TMP14:%.*]] = phi <8 x i8> [ poison, [[VECTOR_BODY]] ], [ [[TMP13]], [[PRED_LOAD_IF]] ] -; ENABLED_MASKED_STRIDED-NEXT: [[TMP15:%.*]] = extractelement <8 x i1> [[TMP7]], i32 1 -; ENABLED_MASKED_STRIDED-NEXT: br i1 [[TMP15]], label [[PRED_LOAD_IF6:%.*]], label [[PRED_LOAD_CONTINUE7:%.*]] +; ENABLED_MASKED_STRIDED-NEXT: [[TMP12:%.*]] = phi <8 x i8> [ poison, [[VECTOR_BODY]] ], [ [[TMP11]], [[PRED_LOAD_IF]] ] +; ENABLED_MASKED_STRIDED-NEXT: [[TMP13:%.*]] = extractelement <8 x i1> [[TMP5]], i64 1 +; ENABLED_MASKED_STRIDED-NEXT: br i1 [[TMP13]], label [[PRED_LOAD_IF6:%.*]], label [[PRED_LOAD_CONTINUE7:%.*]] ; ENABLED_MASKED_STRIDED: pred.load.if6: -; ENABLED_MASKED_STRIDED-NEXT: [[TMP16:%.*]] = extractelement <8 x i32> [[TMP8]], i32 1 -; ENABLED_MASKED_STRIDED-NEXT: [[TMP17:%.*]] = getelementptr inbounds i8, i8* [[P]], i32 [[TMP16]] -; ENABLED_MASKED_STRIDED-NEXT: [[TMP18:%.*]] = load i8, i8* [[TMP17]], align 1 -; ENABLED_MASKED_STRIDED-NEXT: [[TMP19:%.*]] = insertelement <8 x i8> [[TMP14]], i8 [[TMP18]], i32 1 +; ENABLED_MASKED_STRIDED-NEXT: [[TMP14:%.*]] = extractelement <8 x i32> [[TMP6]], i64 1 +; ENABLED_MASKED_STRIDED-NEXT: [[TMP15:%.*]] = getelementptr inbounds i8, i8* [[P]], i32 [[TMP14]] +; ENABLED_MASKED_STRIDED-NEXT: [[TMP16:%.*]] = load i8, i8* [[TMP15]], align 1 +; ENABLED_MASKED_STRIDED-NEXT: [[TMP17:%.*]] = insertelement <8 x i8> [[TMP12]], i8 [[TMP16]], i64 1 ; ENABLED_MASKED_STRIDED-NEXT: br label [[PRED_LOAD_CONTINUE7]] ; ENABLED_MASKED_STRIDED: pred.load.continue7: -; ENABLED_MASKED_STRIDED-NEXT: [[TMP20:%.*]] = phi <8 x i8> [ [[TMP14]], [[PRED_LOAD_CONTINUE]] ], [ [[TMP19]], [[PRED_LOAD_IF6]] ] -; ENABLED_MASKED_STRIDED-NEXT: [[TMP21:%.*]] = extractelement <8 x i1> [[TMP7]], i32 2 -; ENABLED_MASKED_STRIDED-NEXT: br i1 [[TMP21]], label [[PRED_LOAD_IF8:%.*]], label [[PRED_LOAD_CONTINUE9:%.*]] +; ENABLED_MASKED_STRIDED-NEXT: [[TMP18:%.*]] = phi <8 x i8> [ [[TMP12]], [[PRED_LOAD_CONTINUE]] ], [ [[TMP17]], [[PRED_LOAD_IF6]] ] +; ENABLED_MASKED_STRIDED-NEXT: [[TMP19:%.*]] = extractelement <8 x i1> [[TMP5]], i64 2 +; ENABLED_MASKED_STRIDED-NEXT: br i1 [[TMP19]], label [[PRED_LOAD_IF8:%.*]], label [[PRED_LOAD_CONTINUE9:%.*]] ; ENABLED_MASKED_STRIDED: pred.load.if8: -; ENABLED_MASKED_STRIDED-NEXT: [[TMP22:%.*]] = extractelement <8 x i32> [[TMP8]], i32 2 -; ENABLED_MASKED_STRIDED-NEXT: [[TMP23:%.*]] = getelementptr inbounds i8, i8* [[P]], i32 [[TMP22]] -; ENABLED_MASKED_STRIDED-NEXT: [[TMP24:%.*]] = load i8, i8* [[TMP23]], align 1 -; ENABLED_MASKED_STRIDED-NEXT: [[TMP25:%.*]] = insertelement <8 x i8> [[TMP20]], i8 [[TMP24]], i32 2 +; ENABLED_MASKED_STRIDED-NEXT: [[TMP20:%.*]] = extractelement <8 x i32> [[TMP6]], i64 2 +; ENABLED_MASKED_STRIDED-NEXT: [[TMP21:%.*]] = getelementptr inbounds i8, i8* [[P]], i32 [[TMP20]] +; ENABLED_MASKED_STRIDED-NEXT: [[TMP22:%.*]] = load i8, i8* [[TMP21]], align 1 +; ENABLED_MASKED_STRIDED-NEXT: [[TMP23:%.*]] = insertelement <8 x i8> [[TMP18]], i8 [[TMP22]], i64 2 ; ENABLED_MASKED_STRIDED-NEXT: br label [[PRED_LOAD_CONTINUE9]] ; ENABLED_MASKED_STRIDED: pred.load.continue9: -; ENABLED_MASKED_STRIDED-NEXT: [[TMP26:%.*]] = phi <8 x i8> [ [[TMP20]], [[PRED_LOAD_CONTINUE7]] ], [ [[TMP25]], [[PRED_LOAD_IF8]] ] -; ENABLED_MASKED_STRIDED-NEXT: [[TMP27:%.*]] = extractelement <8 x i1> [[TMP7]], i32 3 -; ENABLED_MASKED_STRIDED-NEXT: br i1 [[TMP27]], label [[PRED_LOAD_IF10:%.*]], label [[PRED_LOAD_CONTINUE11:%.*]] +; ENABLED_MASKED_STRIDED-NEXT: [[TMP24:%.*]] = phi <8 x i8> [ [[TMP18]], [[PRED_LOAD_CONTINUE7]] ], [ [[TMP23]], [[PRED_LOAD_IF8]] ] +; ENABLED_MASKED_STRIDED-NEXT: [[TMP25:%.*]] = extractelement <8 x i1> [[TMP5]], i64 3 +; ENABLED_MASKED_STRIDED-NEXT: br i1 [[TMP25]], label [[PRED_LOAD_IF10:%.*]], label [[PRED_LOAD_CONTINUE11:%.*]] ; ENABLED_MASKED_STRIDED: pred.load.if10: -; ENABLED_MASKED_STRIDED-NEXT: [[TMP28:%.*]] = extractelement <8 x i32> [[TMP8]], i32 3 -; ENABLED_MASKED_STRIDED-NEXT: [[TMP29:%.*]] = getelementptr inbounds i8, i8* [[P]], i32 [[TMP28]] -; ENABLED_MASKED_STRIDED-NEXT: [[TMP30:%.*]] = load i8, i8* [[TMP29]], align 1 -; ENABLED_MASKED_STRIDED-NEXT: [[TMP31:%.*]] = insertelement <8 x i8> [[TMP26]], i8 [[TMP30]], i32 3 +; ENABLED_MASKED_STRIDED-NEXT: [[TMP26:%.*]] = extractelement <8 x i32> [[TMP6]], i64 3 +; ENABLED_MASKED_STRIDED-NEXT: [[TMP27:%.*]] = getelementptr inbounds i8, i8* [[P]], i32 [[TMP26]] +; ENABLED_MASKED_STRIDED-NEXT: [[TMP28:%.*]] = load i8, i8* [[TMP27]], align 1 +; ENABLED_MASKED_STRIDED-NEXT: [[TMP29:%.*]] = insertelement <8 x i8> [[TMP24]], i8 [[TMP28]], i64 3 ; ENABLED_MASKED_STRIDED-NEXT: br label [[PRED_LOAD_CONTINUE11]] ; ENABLED_MASKED_STRIDED: pred.load.continue11: -; ENABLED_MASKED_STRIDED-NEXT: [[TMP32:%.*]] = phi <8 x i8> [ [[TMP26]], [[PRED_LOAD_CONTINUE9]] ], [ [[TMP31]], [[PRED_LOAD_IF10]] ] -; ENABLED_MASKED_STRIDED-NEXT: [[TMP33:%.*]] = extractelement <8 x i1> [[TMP7]], i32 4 -; ENABLED_MASKED_STRIDED-NEXT: br i1 [[TMP33]], label [[PRED_LOAD_IF12:%.*]], label [[PRED_LOAD_CONTINUE13:%.*]] +; ENABLED_MASKED_STRIDED-NEXT: [[TMP30:%.*]] = phi <8 x i8> [ [[TMP24]], [[PRED_LOAD_CONTINUE9]] ], [ [[TMP29]], [[PRED_LOAD_IF10]] ] +; ENABLED_MASKED_STRIDED-NEXT: [[TMP31:%.*]] = extractelement <8 x i1> [[TMP5]], i64 4 +; ENABLED_MASKED_STRIDED-NEXT: br i1 [[TMP31]], label [[PRED_LOAD_IF12:%.*]], label [[PRED_LOAD_CONTINUE13:%.*]] ; ENABLED_MASKED_STRIDED: pred.load.if12: -; ENABLED_MASKED_STRIDED-NEXT: [[TMP34:%.*]] = extractelement <8 x i32> [[TMP8]], i32 4 -; ENABLED_MASKED_STRIDED-NEXT: [[TMP35:%.*]] = getelementptr inbounds i8, i8* [[P]], i32 [[TMP34]] -; ENABLED_MASKED_STRIDED-NEXT: [[TMP36:%.*]] = load i8, i8* [[TMP35]], align 1 -; ENABLED_MASKED_STRIDED-NEXT: [[TMP37:%.*]] = insertelement <8 x i8> [[TMP32]], i8 [[TMP36]], i32 4 +; ENABLED_MASKED_STRIDED-NEXT: [[TMP32:%.*]] = extractelement <8 x i32> [[TMP6]], i64 4 +; ENABLED_MASKED_STRIDED-NEXT: [[TMP33:%.*]] = getelementptr inbounds i8, i8* [[P]], i32 [[TMP32]] +; ENABLED_MASKED_STRIDED-NEXT: [[TMP34:%.*]] = load i8, i8* [[TMP33]], align 1 +; ENABLED_MASKED_STRIDED-NEXT: [[TMP35:%.*]] = insertelement <8 x i8> [[TMP30]], i8 [[TMP34]], i64 4 ; ENABLED_MASKED_STRIDED-NEXT: br label [[PRED_LOAD_CONTINUE13]] ; ENABLED_MASKED_STRIDED: pred.load.continue13: -; ENABLED_MASKED_STRIDED-NEXT: [[TMP38:%.*]] = phi <8 x i8> [ [[TMP32]], [[PRED_LOAD_CONTINUE11]] ], [ [[TMP37]], [[PRED_LOAD_IF12]] ] -; ENABLED_MASKED_STRIDED-NEXT: [[TMP39:%.*]] = extractelement <8 x i1> [[TMP7]], i32 5 -; ENABLED_MASKED_STRIDED-NEXT: br i1 [[TMP39]], label [[PRED_LOAD_IF14:%.*]], label [[PRED_LOAD_CONTINUE15:%.*]] +; ENABLED_MASKED_STRIDED-NEXT: [[TMP36:%.*]] = phi <8 x i8> [ [[TMP30]], [[PRED_LOAD_CONTINUE11]] ], [ [[TMP35]], [[PRED_LOAD_IF12]] ] +; ENABLED_MASKED_STRIDED-NEXT: [[TMP37:%.*]] = extractelement <8 x i1> [[TMP5]], i64 5 +; ENABLED_MASKED_STRIDED-NEXT: br i1 [[TMP37]], label [[PRED_LOAD_IF14:%.*]], label [[PRED_LOAD_CONTINUE15:%.*]] ; ENABLED_MASKED_STRIDED: pred.load.if14: -; ENABLED_MASKED_STRIDED-NEXT: [[TMP40:%.*]] = extractelement <8 x i32> [[TMP8]], i32 5 -; ENABLED_MASKED_STRIDED-NEXT: [[TMP41:%.*]] = getelementptr inbounds i8, i8* [[P]], i32 [[TMP40]] -; ENABLED_MASKED_STRIDED-NEXT: [[TMP42:%.*]] = load i8, i8* [[TMP41]], align 1 -; ENABLED_MASKED_STRIDED-NEXT: [[TMP43:%.*]] = insertelement <8 x i8> [[TMP38]], i8 [[TMP42]], i32 5 +; ENABLED_MASKED_STRIDED-NEXT: [[TMP38:%.*]] = extractelement <8 x i32> [[TMP6]], i64 5 +; ENABLED_MASKED_STRIDED-NEXT: [[TMP39:%.*]] = getelementptr inbounds i8, i8* [[P]], i32 [[TMP38]] +; ENABLED_MASKED_STRIDED-NEXT: [[TMP40:%.*]] = load i8, i8* [[TMP39]], align 1 +; ENABLED_MASKED_STRIDED-NEXT: [[TMP41:%.*]] = insertelement <8 x i8> [[TMP36]], i8 [[TMP40]], i64 5 ; ENABLED_MASKED_STRIDED-NEXT: br label [[PRED_LOAD_CONTINUE15]] ; ENABLED_MASKED_STRIDED: pred.load.continue15: -; ENABLED_MASKED_STRIDED-NEXT: [[TMP44:%.*]] = phi <8 x i8> [ [[TMP38]], [[PRED_LOAD_CONTINUE13]] ], [ [[TMP43]], [[PRED_LOAD_IF14]] ] -; ENABLED_MASKED_STRIDED-NEXT: [[TMP45:%.*]] = extractelement <8 x i1> [[TMP7]], i32 6 -; ENABLED_MASKED_STRIDED-NEXT: br i1 [[TMP45]], label [[PRED_LOAD_IF16:%.*]], label [[PRED_LOAD_CONTINUE17:%.*]] +; ENABLED_MASKED_STRIDED-NEXT: [[TMP42:%.*]] = phi <8 x i8> [ [[TMP36]], [[PRED_LOAD_CONTINUE13]] ], [ [[TMP41]], [[PRED_LOAD_IF14]] ] +; ENABLED_MASKED_STRIDED-NEXT: [[TMP43:%.*]] = extractelement <8 x i1> [[TMP5]], i64 6 +; ENABLED_MASKED_STRIDED-NEXT: br i1 [[TMP43]], label [[PRED_LOAD_IF16:%.*]], label [[PRED_LOAD_CONTINUE17:%.*]] ; ENABLED_MASKED_STRIDED: pred.load.if16: -; ENABLED_MASKED_STRIDED-NEXT: [[TMP46:%.*]] = extractelement <8 x i32> [[TMP8]], i32 6 -; ENABLED_MASKED_STRIDED-NEXT: [[TMP47:%.*]] = getelementptr inbounds i8, i8* [[P]], i32 [[TMP46]] -; ENABLED_MASKED_STRIDED-NEXT: [[TMP48:%.*]] = load i8, i8* [[TMP47]], align 1 -; ENABLED_MASKED_STRIDED-NEXT: [[TMP49:%.*]] = insertelement <8 x i8> [[TMP44]], i8 [[TMP48]], i32 6 +; ENABLED_MASKED_STRIDED-NEXT: [[TMP44:%.*]] = extractelement <8 x i32> [[TMP6]], i64 6 +; ENABLED_MASKED_STRIDED-NEXT: [[TMP45:%.*]] = getelementptr inbounds i8, i8* [[P]], i32 [[TMP44]] +; ENABLED_MASKED_STRIDED-NEXT: [[TMP46:%.*]] = load i8, i8* [[TMP45]], align 1 +; ENABLED_MASKED_STRIDED-NEXT: [[TMP47:%.*]] = insertelement <8 x i8> [[TMP42]], i8 [[TMP46]], i64 6 ; ENABLED_MASKED_STRIDED-NEXT: br label [[PRED_LOAD_CONTINUE17]] ; ENABLED_MASKED_STRIDED: pred.load.continue17: -; ENABLED_MASKED_STRIDED-NEXT: [[TMP50:%.*]] = phi <8 x i8> [ [[TMP44]], [[PRED_LOAD_CONTINUE15]] ], [ [[TMP49]], [[PRED_LOAD_IF16]] ] -; ENABLED_MASKED_STRIDED-NEXT: [[TMP51:%.*]] = extractelement <8 x i1> [[TMP7]], i32 7 -; ENABLED_MASKED_STRIDED-NEXT: br i1 [[TMP51]], label [[PRED_LOAD_IF18:%.*]], label [[PRED_LOAD_CONTINUE19:%.*]] +; ENABLED_MASKED_STRIDED-NEXT: [[TMP48:%.*]] = phi <8 x i8> [ [[TMP42]], [[PRED_LOAD_CONTINUE15]] ], [ [[TMP47]], [[PRED_LOAD_IF16]] ] +; ENABLED_MASKED_STRIDED-NEXT: [[TMP49:%.*]] = extractelement <8 x i1> [[TMP5]], i64 7 +; ENABLED_MASKED_STRIDED-NEXT: br i1 [[TMP49]], label [[PRED_LOAD_IF18:%.*]], label [[PRED_LOAD_CONTINUE19:%.*]] ; ENABLED_MASKED_STRIDED: pred.load.if18: -; ENABLED_MASKED_STRIDED-NEXT: [[TMP52:%.*]] = extractelement <8 x i32> [[TMP8]], i32 7 -; ENABLED_MASKED_STRIDED-NEXT: [[TMP53:%.*]] = getelementptr inbounds i8, i8* [[P]], i32 [[TMP52]] -; ENABLED_MASKED_STRIDED-NEXT: [[TMP54:%.*]] = load i8, i8* [[TMP53]], align 1 -; ENABLED_MASKED_STRIDED-NEXT: [[TMP55:%.*]] = insertelement <8 x i8> [[TMP50]], i8 [[TMP54]], i32 7 +; ENABLED_MASKED_STRIDED-NEXT: [[TMP50:%.*]] = extractelement <8 x i32> [[TMP6]], i64 7 +; ENABLED_MASKED_STRIDED-NEXT: [[TMP51:%.*]] = getelementptr inbounds i8, i8* [[P]], i32 [[TMP50]] +; ENABLED_MASKED_STRIDED-NEXT: [[TMP52:%.*]] = load i8, i8* [[TMP51]], align 1 +; ENABLED_MASKED_STRIDED-NEXT: [[TMP53:%.*]] = insertelement <8 x i8> [[TMP48]], i8 [[TMP52]], i64 7 ; ENABLED_MASKED_STRIDED-NEXT: br label [[PRED_LOAD_CONTINUE19]] ; ENABLED_MASKED_STRIDED: pred.load.continue19: -; ENABLED_MASKED_STRIDED-NEXT: [[TMP56:%.*]] = phi <8 x i8> [ [[TMP50]], [[PRED_LOAD_CONTINUE17]] ], [ [[TMP55]], [[PRED_LOAD_IF18]] ] -; ENABLED_MASKED_STRIDED-NEXT: [[TMP57:%.*]] = or <8 x i32> [[TMP8]], -; ENABLED_MASKED_STRIDED-NEXT: [[TMP58:%.*]] = extractelement <8 x i1> [[TMP7]], i32 0 -; ENABLED_MASKED_STRIDED-NEXT: br i1 [[TMP58]], label [[PRED_LOAD_IF20:%.*]], label [[PRED_LOAD_CONTINUE21:%.*]] +; ENABLED_MASKED_STRIDED-NEXT: [[TMP54:%.*]] = phi <8 x i8> [ [[TMP48]], [[PRED_LOAD_CONTINUE17]] ], [ [[TMP53]], [[PRED_LOAD_IF18]] ] +; ENABLED_MASKED_STRIDED-NEXT: [[TMP55:%.*]] = or <8 x i32> [[TMP6]], +; ENABLED_MASKED_STRIDED-NEXT: [[TMP56:%.*]] = extractelement <8 x i1> [[TMP5]], i64 0 +; ENABLED_MASKED_STRIDED-NEXT: br i1 [[TMP56]], label [[PRED_LOAD_IF20:%.*]], label [[PRED_LOAD_CONTINUE21:%.*]] ; ENABLED_MASKED_STRIDED: pred.load.if20: -; ENABLED_MASKED_STRIDED-NEXT: [[TMP59:%.*]] = extractelement <8 x i32> [[TMP57]], i32 0 -; ENABLED_MASKED_STRIDED-NEXT: [[TMP60:%.*]] = getelementptr inbounds i8, i8* [[P]], i32 [[TMP59]] -; ENABLED_MASKED_STRIDED-NEXT: [[TMP61:%.*]] = load i8, i8* [[TMP60]], align 1 -; ENABLED_MASKED_STRIDED-NEXT: [[TMP62:%.*]] = insertelement <8 x i8> poison, i8 [[TMP61]], i32 0 +; ENABLED_MASKED_STRIDED-NEXT: [[TMP57:%.*]] = extractelement <8 x i32> [[TMP55]], i64 0 +; ENABLED_MASKED_STRIDED-NEXT: [[TMP58:%.*]] = getelementptr inbounds i8, i8* [[P]], i32 [[TMP57]] +; ENABLED_MASKED_STRIDED-NEXT: [[TMP59:%.*]] = load i8, i8* [[TMP58]], align 1 +; ENABLED_MASKED_STRIDED-NEXT: [[TMP60:%.*]] = insertelement <8 x i8> poison, i8 [[TMP59]], i64 0 ; ENABLED_MASKED_STRIDED-NEXT: br label [[PRED_LOAD_CONTINUE21]] ; ENABLED_MASKED_STRIDED: pred.load.continue21: -; ENABLED_MASKED_STRIDED-NEXT: [[TMP63:%.*]] = phi <8 x i8> [ poison, [[PRED_LOAD_CONTINUE19]] ], [ [[TMP62]], [[PRED_LOAD_IF20]] ] -; ENABLED_MASKED_STRIDED-NEXT: [[TMP64:%.*]] = extractelement <8 x i1> [[TMP7]], i32 1 -; ENABLED_MASKED_STRIDED-NEXT: br i1 [[TMP64]], label [[PRED_LOAD_IF22:%.*]], label [[PRED_LOAD_CONTINUE23:%.*]] +; ENABLED_MASKED_STRIDED-NEXT: [[TMP61:%.*]] = phi <8 x i8> [ poison, [[PRED_LOAD_CONTINUE19]] ], [ [[TMP60]], [[PRED_LOAD_IF20]] ] +; ENABLED_MASKED_STRIDED-NEXT: [[TMP62:%.*]] = extractelement <8 x i1> [[TMP5]], i64 1 +; ENABLED_MASKED_STRIDED-NEXT: br i1 [[TMP62]], label [[PRED_LOAD_IF22:%.*]], label [[PRED_LOAD_CONTINUE23:%.*]] ; ENABLED_MASKED_STRIDED: pred.load.if22: -; ENABLED_MASKED_STRIDED-NEXT: [[TMP65:%.*]] = extractelement <8 x i32> [[TMP57]], i32 1 -; ENABLED_MASKED_STRIDED-NEXT: [[TMP66:%.*]] = getelementptr inbounds i8, i8* [[P]], i32 [[TMP65]] -; ENABLED_MASKED_STRIDED-NEXT: [[TMP67:%.*]] = load i8, i8* [[TMP66]], align 1 -; ENABLED_MASKED_STRIDED-NEXT: [[TMP68:%.*]] = insertelement <8 x i8> [[TMP63]], i8 [[TMP67]], i32 1 +; ENABLED_MASKED_STRIDED-NEXT: [[TMP63:%.*]] = extractelement <8 x i32> [[TMP55]], i64 1 +; ENABLED_MASKED_STRIDED-NEXT: [[TMP64:%.*]] = getelementptr inbounds i8, i8* [[P]], i32 [[TMP63]] +; ENABLED_MASKED_STRIDED-NEXT: [[TMP65:%.*]] = load i8, i8* [[TMP64]], align 1 +; ENABLED_MASKED_STRIDED-NEXT: [[TMP66:%.*]] = insertelement <8 x i8> [[TMP61]], i8 [[TMP65]], i64 1 ; ENABLED_MASKED_STRIDED-NEXT: br label [[PRED_LOAD_CONTINUE23]] ; ENABLED_MASKED_STRIDED: pred.load.continue23: -; ENABLED_MASKED_STRIDED-NEXT: [[TMP69:%.*]] = phi <8 x i8> [ [[TMP63]], [[PRED_LOAD_CONTINUE21]] ], [ [[TMP68]], [[PRED_LOAD_IF22]] ] -; ENABLED_MASKED_STRIDED-NEXT: [[TMP70:%.*]] = extractelement <8 x i1> [[TMP7]], i32 2 -; ENABLED_MASKED_STRIDED-NEXT: br i1 [[TMP70]], label [[PRED_LOAD_IF24:%.*]], label [[PRED_LOAD_CONTINUE25:%.*]] +; ENABLED_MASKED_STRIDED-NEXT: [[TMP67:%.*]] = phi <8 x i8> [ [[TMP61]], [[PRED_LOAD_CONTINUE21]] ], [ [[TMP66]], [[PRED_LOAD_IF22]] ] +; ENABLED_MASKED_STRIDED-NEXT: [[TMP68:%.*]] = extractelement <8 x i1> [[TMP5]], i64 2 +; ENABLED_MASKED_STRIDED-NEXT: br i1 [[TMP68]], label [[PRED_LOAD_IF24:%.*]], label [[PRED_LOAD_CONTINUE25:%.*]] ; ENABLED_MASKED_STRIDED: pred.load.if24: -; ENABLED_MASKED_STRIDED-NEXT: [[TMP71:%.*]] = extractelement <8 x i32> [[TMP57]], i32 2 -; ENABLED_MASKED_STRIDED-NEXT: [[TMP72:%.*]] = getelementptr inbounds i8, i8* [[P]], i32 [[TMP71]] -; ENABLED_MASKED_STRIDED-NEXT: [[TMP73:%.*]] = load i8, i8* [[TMP72]], align 1 -; ENABLED_MASKED_STRIDED-NEXT: [[TMP74:%.*]] = insertelement <8 x i8> [[TMP69]], i8 [[TMP73]], i32 2 +; ENABLED_MASKED_STRIDED-NEXT: [[TMP69:%.*]] = extractelement <8 x i32> [[TMP55]], i64 2 +; ENABLED_MASKED_STRIDED-NEXT: [[TMP70:%.*]] = getelementptr inbounds i8, i8* [[P]], i32 [[TMP69]] +; ENABLED_MASKED_STRIDED-NEXT: [[TMP71:%.*]] = load i8, i8* [[TMP70]], align 1 +; ENABLED_MASKED_STRIDED-NEXT: [[TMP72:%.*]] = insertelement <8 x i8> [[TMP67]], i8 [[TMP71]], i64 2 ; ENABLED_MASKED_STRIDED-NEXT: br label [[PRED_LOAD_CONTINUE25]] ; ENABLED_MASKED_STRIDED: pred.load.continue25: -; ENABLED_MASKED_STRIDED-NEXT: [[TMP75:%.*]] = phi <8 x i8> [ [[TMP69]], [[PRED_LOAD_CONTINUE23]] ], [ [[TMP74]], [[PRED_LOAD_IF24]] ] -; ENABLED_MASKED_STRIDED-NEXT: [[TMP76:%.*]] = extractelement <8 x i1> [[TMP7]], i32 3 -; ENABLED_MASKED_STRIDED-NEXT: br i1 [[TMP76]], label [[PRED_LOAD_IF26:%.*]], label [[PRED_LOAD_CONTINUE27:%.*]] +; ENABLED_MASKED_STRIDED-NEXT: [[TMP73:%.*]] = phi <8 x i8> [ [[TMP67]], [[PRED_LOAD_CONTINUE23]] ], [ [[TMP72]], [[PRED_LOAD_IF24]] ] +; ENABLED_MASKED_STRIDED-NEXT: [[TMP74:%.*]] = extractelement <8 x i1> [[TMP5]], i64 3 +; ENABLED_MASKED_STRIDED-NEXT: br i1 [[TMP74]], label [[PRED_LOAD_IF26:%.*]], label [[PRED_LOAD_CONTINUE27:%.*]] ; ENABLED_MASKED_STRIDED: pred.load.if26: -; ENABLED_MASKED_STRIDED-NEXT: [[TMP77:%.*]] = extractelement <8 x i32> [[TMP57]], i32 3 -; ENABLED_MASKED_STRIDED-NEXT: [[TMP78:%.*]] = getelementptr inbounds i8, i8* [[P]], i32 [[TMP77]] -; ENABLED_MASKED_STRIDED-NEXT: [[TMP79:%.*]] = load i8, i8* [[TMP78]], align 1 -; ENABLED_MASKED_STRIDED-NEXT: [[TMP80:%.*]] = insertelement <8 x i8> [[TMP75]], i8 [[TMP79]], i32 3 +; ENABLED_MASKED_STRIDED-NEXT: [[TMP75:%.*]] = extractelement <8 x i32> [[TMP55]], i64 3 +; ENABLED_MASKED_STRIDED-NEXT: [[TMP76:%.*]] = getelementptr inbounds i8, i8* [[P]], i32 [[TMP75]] +; ENABLED_MASKED_STRIDED-NEXT: [[TMP77:%.*]] = load i8, i8* [[TMP76]], align 1 +; ENABLED_MASKED_STRIDED-NEXT: [[TMP78:%.*]] = insertelement <8 x i8> [[TMP73]], i8 [[TMP77]], i64 3 ; ENABLED_MASKED_STRIDED-NEXT: br label [[PRED_LOAD_CONTINUE27]] ; ENABLED_MASKED_STRIDED: pred.load.continue27: -; ENABLED_MASKED_STRIDED-NEXT: [[TMP81:%.*]] = phi <8 x i8> [ [[TMP75]], [[PRED_LOAD_CONTINUE25]] ], [ [[TMP80]], [[PRED_LOAD_IF26]] ] -; ENABLED_MASKED_STRIDED-NEXT: [[TMP82:%.*]] = extractelement <8 x i1> [[TMP7]], i32 4 -; ENABLED_MASKED_STRIDED-NEXT: br i1 [[TMP82]], label [[PRED_LOAD_IF28:%.*]], label [[PRED_LOAD_CONTINUE29:%.*]] +; ENABLED_MASKED_STRIDED-NEXT: [[TMP79:%.*]] = phi <8 x i8> [ [[TMP73]], [[PRED_LOAD_CONTINUE25]] ], [ [[TMP78]], [[PRED_LOAD_IF26]] ] +; ENABLED_MASKED_STRIDED-NEXT: [[TMP80:%.*]] = extractelement <8 x i1> [[TMP5]], i64 4 +; ENABLED_MASKED_STRIDED-NEXT: br i1 [[TMP80]], label [[PRED_LOAD_IF28:%.*]], label [[PRED_LOAD_CONTINUE29:%.*]] ; ENABLED_MASKED_STRIDED: pred.load.if28: -; ENABLED_MASKED_STRIDED-NEXT: [[TMP83:%.*]] = extractelement <8 x i32> [[TMP57]], i32 4 -; ENABLED_MASKED_STRIDED-NEXT: [[TMP84:%.*]] = getelementptr inbounds i8, i8* [[P]], i32 [[TMP83]] -; ENABLED_MASKED_STRIDED-NEXT: [[TMP85:%.*]] = load i8, i8* [[TMP84]], align 1 -; ENABLED_MASKED_STRIDED-NEXT: [[TMP86:%.*]] = insertelement <8 x i8> [[TMP81]], i8 [[TMP85]], i32 4 +; ENABLED_MASKED_STRIDED-NEXT: [[TMP81:%.*]] = extractelement <8 x i32> [[TMP55]], i64 4 +; ENABLED_MASKED_STRIDED-NEXT: [[TMP82:%.*]] = getelementptr inbounds i8, i8* [[P]], i32 [[TMP81]] +; ENABLED_MASKED_STRIDED-NEXT: [[TMP83:%.*]] = load i8, i8* [[TMP82]], align 1 +; ENABLED_MASKED_STRIDED-NEXT: [[TMP84:%.*]] = insertelement <8 x i8> [[TMP79]], i8 [[TMP83]], i64 4 ; ENABLED_MASKED_STRIDED-NEXT: br label [[PRED_LOAD_CONTINUE29]] ; ENABLED_MASKED_STRIDED: pred.load.continue29: -; ENABLED_MASKED_STRIDED-NEXT: [[TMP87:%.*]] = phi <8 x i8> [ [[TMP81]], [[PRED_LOAD_CONTINUE27]] ], [ [[TMP86]], [[PRED_LOAD_IF28]] ] -; ENABLED_MASKED_STRIDED-NEXT: [[TMP88:%.*]] = extractelement <8 x i1> [[TMP7]], i32 5 -; ENABLED_MASKED_STRIDED-NEXT: br i1 [[TMP88]], label [[PRED_LOAD_IF30:%.*]], label [[PRED_LOAD_CONTINUE31:%.*]] +; ENABLED_MASKED_STRIDED-NEXT: [[TMP85:%.*]] = phi <8 x i8> [ [[TMP79]], [[PRED_LOAD_CONTINUE27]] ], [ [[TMP84]], [[PRED_LOAD_IF28]] ] +; ENABLED_MASKED_STRIDED-NEXT: [[TMP86:%.*]] = extractelement <8 x i1> [[TMP5]], i64 5 +; ENABLED_MASKED_STRIDED-NEXT: br i1 [[TMP86]], label [[PRED_LOAD_IF30:%.*]], label [[PRED_LOAD_CONTINUE31:%.*]] ; ENABLED_MASKED_STRIDED: pred.load.if30: -; ENABLED_MASKED_STRIDED-NEXT: [[TMP89:%.*]] = extractelement <8 x i32> [[TMP57]], i32 5 -; ENABLED_MASKED_STRIDED-NEXT: [[TMP90:%.*]] = getelementptr inbounds i8, i8* [[P]], i32 [[TMP89]] -; ENABLED_MASKED_STRIDED-NEXT: [[TMP91:%.*]] = load i8, i8* [[TMP90]], align 1 -; ENABLED_MASKED_STRIDED-NEXT: [[TMP92:%.*]] = insertelement <8 x i8> [[TMP87]], i8 [[TMP91]], i32 5 +; ENABLED_MASKED_STRIDED-NEXT: [[TMP87:%.*]] = extractelement <8 x i32> [[TMP55]], i64 5 +; ENABLED_MASKED_STRIDED-NEXT: [[TMP88:%.*]] = getelementptr inbounds i8, i8* [[P]], i32 [[TMP87]] +; ENABLED_MASKED_STRIDED-NEXT: [[TMP89:%.*]] = load i8, i8* [[TMP88]], align 1 +; ENABLED_MASKED_STRIDED-NEXT: [[TMP90:%.*]] = insertelement <8 x i8> [[TMP85]], i8 [[TMP89]], i64 5 ; ENABLED_MASKED_STRIDED-NEXT: br label [[PRED_LOAD_CONTINUE31]] ; ENABLED_MASKED_STRIDED: pred.load.continue31: -; ENABLED_MASKED_STRIDED-NEXT: [[TMP93:%.*]] = phi <8 x i8> [ [[TMP87]], [[PRED_LOAD_CONTINUE29]] ], [ [[TMP92]], [[PRED_LOAD_IF30]] ] -; ENABLED_MASKED_STRIDED-NEXT: [[TMP94:%.*]] = extractelement <8 x i1> [[TMP7]], i32 6 -; ENABLED_MASKED_STRIDED-NEXT: br i1 [[TMP94]], label [[PRED_LOAD_IF32:%.*]], label [[PRED_LOAD_CONTINUE33:%.*]] +; ENABLED_MASKED_STRIDED-NEXT: [[TMP91:%.*]] = phi <8 x i8> [ [[TMP85]], [[PRED_LOAD_CONTINUE29]] ], [ [[TMP90]], [[PRED_LOAD_IF30]] ] +; ENABLED_MASKED_STRIDED-NEXT: [[TMP92:%.*]] = extractelement <8 x i1> [[TMP5]], i64 6 +; ENABLED_MASKED_STRIDED-NEXT: br i1 [[TMP92]], label [[PRED_LOAD_IF32:%.*]], label [[PRED_LOAD_CONTINUE33:%.*]] ; ENABLED_MASKED_STRIDED: pred.load.if32: -; ENABLED_MASKED_STRIDED-NEXT: [[TMP95:%.*]] = extractelement <8 x i32> [[TMP57]], i32 6 -; ENABLED_MASKED_STRIDED-NEXT: [[TMP96:%.*]] = getelementptr inbounds i8, i8* [[P]], i32 [[TMP95]] -; ENABLED_MASKED_STRIDED-NEXT: [[TMP97:%.*]] = load i8, i8* [[TMP96]], align 1 -; ENABLED_MASKED_STRIDED-NEXT: [[TMP98:%.*]] = insertelement <8 x i8> [[TMP93]], i8 [[TMP97]], i32 6 +; ENABLED_MASKED_STRIDED-NEXT: [[TMP93:%.*]] = extractelement <8 x i32> [[TMP55]], i64 6 +; ENABLED_MASKED_STRIDED-NEXT: [[TMP94:%.*]] = getelementptr inbounds i8, i8* [[P]], i32 [[TMP93]] +; ENABLED_MASKED_STRIDED-NEXT: [[TMP95:%.*]] = load i8, i8* [[TMP94]], align 1 +; ENABLED_MASKED_STRIDED-NEXT: [[TMP96:%.*]] = insertelement <8 x i8> [[TMP91]], i8 [[TMP95]], i64 6 ; ENABLED_MASKED_STRIDED-NEXT: br label [[PRED_LOAD_CONTINUE33]] ; ENABLED_MASKED_STRIDED: pred.load.continue33: -; ENABLED_MASKED_STRIDED-NEXT: [[TMP99:%.*]] = phi <8 x i8> [ [[TMP93]], [[PRED_LOAD_CONTINUE31]] ], [ [[TMP98]], [[PRED_LOAD_IF32]] ] -; ENABLED_MASKED_STRIDED-NEXT: [[TMP100:%.*]] = extractelement <8 x i1> [[TMP7]], i32 7 -; ENABLED_MASKED_STRIDED-NEXT: br i1 [[TMP100]], label [[PRED_LOAD_IF34:%.*]], label [[PRED_LOAD_CONTINUE35:%.*]] +; ENABLED_MASKED_STRIDED-NEXT: [[TMP97:%.*]] = phi <8 x i8> [ [[TMP91]], [[PRED_LOAD_CONTINUE31]] ], [ [[TMP96]], [[PRED_LOAD_IF32]] ] +; ENABLED_MASKED_STRIDED-NEXT: [[TMP98:%.*]] = extractelement <8 x i1> [[TMP5]], i64 7 +; ENABLED_MASKED_STRIDED-NEXT: br i1 [[TMP98]], label [[PRED_LOAD_IF34:%.*]], label [[PRED_LOAD_CONTINUE35:%.*]] ; ENABLED_MASKED_STRIDED: pred.load.if34: -; ENABLED_MASKED_STRIDED-NEXT: [[TMP101:%.*]] = extractelement <8 x i32> [[TMP57]], i32 7 -; ENABLED_MASKED_STRIDED-NEXT: [[TMP102:%.*]] = getelementptr inbounds i8, i8* [[P]], i32 [[TMP101]] -; ENABLED_MASKED_STRIDED-NEXT: [[TMP103:%.*]] = load i8, i8* [[TMP102]], align 1 -; ENABLED_MASKED_STRIDED-NEXT: [[TMP104:%.*]] = insertelement <8 x i8> [[TMP99]], i8 [[TMP103]], i32 7 +; ENABLED_MASKED_STRIDED-NEXT: [[TMP99:%.*]] = extractelement <8 x i32> [[TMP55]], i64 7 +; ENABLED_MASKED_STRIDED-NEXT: [[TMP100:%.*]] = getelementptr inbounds i8, i8* [[P]], i32 [[TMP99]] +; ENABLED_MASKED_STRIDED-NEXT: [[TMP101:%.*]] = load i8, i8* [[TMP100]], align 1 +; ENABLED_MASKED_STRIDED-NEXT: [[TMP102:%.*]] = insertelement <8 x i8> [[TMP97]], i8 [[TMP101]], i64 7 ; ENABLED_MASKED_STRIDED-NEXT: br label [[PRED_LOAD_CONTINUE35]] ; ENABLED_MASKED_STRIDED: pred.load.continue35: -; ENABLED_MASKED_STRIDED-NEXT: [[TMP105:%.*]] = phi <8 x i8> [ [[TMP99]], [[PRED_LOAD_CONTINUE33]] ], [ [[TMP104]], [[PRED_LOAD_IF34]] ] -; ENABLED_MASKED_STRIDED-NEXT: [[TMP106:%.*]] = icmp slt <8 x i8> [[TMP56]], [[TMP105]] -; ENABLED_MASKED_STRIDED-NEXT: [[TMP107:%.*]] = select <8 x i1> [[TMP106]], <8 x i8> [[TMP105]], <8 x i8> [[TMP56]] -; ENABLED_MASKED_STRIDED-NEXT: [[TMP108:%.*]] = extractelement <8 x i1> [[TMP7]], i32 0 -; ENABLED_MASKED_STRIDED-NEXT: br i1 [[TMP108]], label [[PRED_STORE_IF:%.*]], label [[PRED_STORE_CONTINUE:%.*]] +; ENABLED_MASKED_STRIDED-NEXT: [[TMP103:%.*]] = phi <8 x i8> [ [[TMP97]], [[PRED_LOAD_CONTINUE33]] ], [ [[TMP102]], [[PRED_LOAD_IF34]] ] +; ENABLED_MASKED_STRIDED-NEXT: [[TMP104:%.*]] = icmp slt <8 x i8> [[TMP54]], [[TMP103]] +; ENABLED_MASKED_STRIDED-NEXT: [[TMP105:%.*]] = select <8 x i1> [[TMP104]], <8 x i8> [[TMP103]], <8 x i8> [[TMP54]] +; ENABLED_MASKED_STRIDED-NEXT: [[TMP106:%.*]] = extractelement <8 x i1> [[TMP5]], i64 0 +; ENABLED_MASKED_STRIDED-NEXT: br i1 [[TMP106]], label [[PRED_STORE_IF:%.*]], label [[PRED_STORE_CONTINUE:%.*]] ; ENABLED_MASKED_STRIDED: pred.store.if: -; ENABLED_MASKED_STRIDED-NEXT: [[TMP109:%.*]] = extractelement <8 x i32> [[TMP8]], i32 0 -; ENABLED_MASKED_STRIDED-NEXT: [[TMP110:%.*]] = getelementptr inbounds i8, i8* [[Q]], i32 [[TMP109]] -; ENABLED_MASKED_STRIDED-NEXT: [[TMP111:%.*]] = extractelement <8 x i8> [[TMP107]], i32 0 -; ENABLED_MASKED_STRIDED-NEXT: store i8 [[TMP111]], i8* [[TMP110]], align 1 +; ENABLED_MASKED_STRIDED-NEXT: [[TMP107:%.*]] = extractelement <8 x i32> [[TMP6]], i64 0 +; ENABLED_MASKED_STRIDED-NEXT: [[TMP108:%.*]] = getelementptr inbounds i8, i8* [[Q]], i32 [[TMP107]] +; ENABLED_MASKED_STRIDED-NEXT: [[TMP109:%.*]] = extractelement <8 x i8> [[TMP105]], i64 0 +; ENABLED_MASKED_STRIDED-NEXT: store i8 [[TMP109]], i8* [[TMP108]], align 1 ; ENABLED_MASKED_STRIDED-NEXT: br label [[PRED_STORE_CONTINUE]] ; ENABLED_MASKED_STRIDED: pred.store.continue: -; ENABLED_MASKED_STRIDED-NEXT: [[TMP112:%.*]] = extractelement <8 x i1> [[TMP7]], i32 1 -; ENABLED_MASKED_STRIDED-NEXT: br i1 [[TMP112]], label [[PRED_STORE_IF36:%.*]], label [[PRED_STORE_CONTINUE37:%.*]] +; ENABLED_MASKED_STRIDED-NEXT: [[TMP110:%.*]] = extractelement <8 x i1> [[TMP5]], i64 1 +; ENABLED_MASKED_STRIDED-NEXT: br i1 [[TMP110]], label [[PRED_STORE_IF36:%.*]], label [[PRED_STORE_CONTINUE37:%.*]] ; ENABLED_MASKED_STRIDED: pred.store.if36: -; ENABLED_MASKED_STRIDED-NEXT: [[TMP113:%.*]] = extractelement <8 x i32> [[TMP8]], i32 1 -; ENABLED_MASKED_STRIDED-NEXT: [[TMP114:%.*]] = getelementptr inbounds i8, i8* [[Q]], i32 [[TMP113]] -; ENABLED_MASKED_STRIDED-NEXT: [[TMP115:%.*]] = extractelement <8 x i8> [[TMP107]], i32 1 -; ENABLED_MASKED_STRIDED-NEXT: store i8 [[TMP115]], i8* [[TMP114]], align 1 +; ENABLED_MASKED_STRIDED-NEXT: [[TMP111:%.*]] = extractelement <8 x i32> [[TMP6]], i64 1 +; ENABLED_MASKED_STRIDED-NEXT: [[TMP112:%.*]] = getelementptr inbounds i8, i8* [[Q]], i32 [[TMP111]] +; ENABLED_MASKED_STRIDED-NEXT: [[TMP113:%.*]] = extractelement <8 x i8> [[TMP105]], i64 1 +; ENABLED_MASKED_STRIDED-NEXT: store i8 [[TMP113]], i8* [[TMP112]], align 1 ; ENABLED_MASKED_STRIDED-NEXT: br label [[PRED_STORE_CONTINUE37]] ; ENABLED_MASKED_STRIDED: pred.store.continue37: -; ENABLED_MASKED_STRIDED-NEXT: [[TMP116:%.*]] = extractelement <8 x i1> [[TMP7]], i32 2 -; ENABLED_MASKED_STRIDED-NEXT: br i1 [[TMP116]], label [[PRED_STORE_IF38:%.*]], label [[PRED_STORE_CONTINUE39:%.*]] +; ENABLED_MASKED_STRIDED-NEXT: [[TMP114:%.*]] = extractelement <8 x i1> [[TMP5]], i64 2 +; ENABLED_MASKED_STRIDED-NEXT: br i1 [[TMP114]], label [[PRED_STORE_IF38:%.*]], label [[PRED_STORE_CONTINUE39:%.*]] ; ENABLED_MASKED_STRIDED: pred.store.if38: -; ENABLED_MASKED_STRIDED-NEXT: [[TMP117:%.*]] = extractelement <8 x i32> [[TMP8]], i32 2 -; ENABLED_MASKED_STRIDED-NEXT: [[TMP118:%.*]] = getelementptr inbounds i8, i8* [[Q]], i32 [[TMP117]] -; ENABLED_MASKED_STRIDED-NEXT: [[TMP119:%.*]] = extractelement <8 x i8> [[TMP107]], i32 2 -; ENABLED_MASKED_STRIDED-NEXT: store i8 [[TMP119]], i8* [[TMP118]], align 1 +; ENABLED_MASKED_STRIDED-NEXT: [[TMP115:%.*]] = extractelement <8 x i32> [[TMP6]], i64 2 +; ENABLED_MASKED_STRIDED-NEXT: [[TMP116:%.*]] = getelementptr inbounds i8, i8* [[Q]], i32 [[TMP115]] +; ENABLED_MASKED_STRIDED-NEXT: [[TMP117:%.*]] = extractelement <8 x i8> [[TMP105]], i64 2 +; ENABLED_MASKED_STRIDED-NEXT: store i8 [[TMP117]], i8* [[TMP116]], align 1 ; ENABLED_MASKED_STRIDED-NEXT: br label [[PRED_STORE_CONTINUE39]] ; ENABLED_MASKED_STRIDED: pred.store.continue39: -; ENABLED_MASKED_STRIDED-NEXT: [[TMP120:%.*]] = extractelement <8 x i1> [[TMP7]], i32 3 -; ENABLED_MASKED_STRIDED-NEXT: br i1 [[TMP120]], label [[PRED_STORE_IF40:%.*]], label [[PRED_STORE_CONTINUE41:%.*]] +; ENABLED_MASKED_STRIDED-NEXT: [[TMP118:%.*]] = extractelement <8 x i1> [[TMP5]], i64 3 +; ENABLED_MASKED_STRIDED-NEXT: br i1 [[TMP118]], label [[PRED_STORE_IF40:%.*]], label [[PRED_STORE_CONTINUE41:%.*]] ; ENABLED_MASKED_STRIDED: pred.store.if40: -; ENABLED_MASKED_STRIDED-NEXT: [[TMP121:%.*]] = extractelement <8 x i32> [[TMP8]], i32 3 -; ENABLED_MASKED_STRIDED-NEXT: [[TMP122:%.*]] = getelementptr inbounds i8, i8* [[Q]], i32 [[TMP121]] -; ENABLED_MASKED_STRIDED-NEXT: [[TMP123:%.*]] = extractelement <8 x i8> [[TMP107]], i32 3 -; ENABLED_MASKED_STRIDED-NEXT: store i8 [[TMP123]], i8* [[TMP122]], align 1 +; ENABLED_MASKED_STRIDED-NEXT: [[TMP119:%.*]] = extractelement <8 x i32> [[TMP6]], i64 3 +; ENABLED_MASKED_STRIDED-NEXT: [[TMP120:%.*]] = getelementptr inbounds i8, i8* [[Q]], i32 [[TMP119]] +; ENABLED_MASKED_STRIDED-NEXT: [[TMP121:%.*]] = extractelement <8 x i8> [[TMP105]], i64 3 +; ENABLED_MASKED_STRIDED-NEXT: store i8 [[TMP121]], i8* [[TMP120]], align 1 ; ENABLED_MASKED_STRIDED-NEXT: br label [[PRED_STORE_CONTINUE41]] ; ENABLED_MASKED_STRIDED: pred.store.continue41: -; ENABLED_MASKED_STRIDED-NEXT: [[TMP124:%.*]] = extractelement <8 x i1> [[TMP7]], i32 4 -; ENABLED_MASKED_STRIDED-NEXT: br i1 [[TMP124]], label [[PRED_STORE_IF42:%.*]], label [[PRED_STORE_CONTINUE43:%.*]] +; ENABLED_MASKED_STRIDED-NEXT: [[TMP122:%.*]] = extractelement <8 x i1> [[TMP5]], i64 4 +; ENABLED_MASKED_STRIDED-NEXT: br i1 [[TMP122]], label [[PRED_STORE_IF42:%.*]], label [[PRED_STORE_CONTINUE43:%.*]] ; ENABLED_MASKED_STRIDED: pred.store.if42: -; ENABLED_MASKED_STRIDED-NEXT: [[TMP125:%.*]] = extractelement <8 x i32> [[TMP8]], i32 4 -; ENABLED_MASKED_STRIDED-NEXT: [[TMP126:%.*]] = getelementptr inbounds i8, i8* [[Q]], i32 [[TMP125]] -; ENABLED_MASKED_STRIDED-NEXT: [[TMP127:%.*]] = extractelement <8 x i8> [[TMP107]], i32 4 -; ENABLED_MASKED_STRIDED-NEXT: store i8 [[TMP127]], i8* [[TMP126]], align 1 +; ENABLED_MASKED_STRIDED-NEXT: [[TMP123:%.*]] = extractelement <8 x i32> [[TMP6]], i64 4 +; ENABLED_MASKED_STRIDED-NEXT: [[TMP124:%.*]] = getelementptr inbounds i8, i8* [[Q]], i32 [[TMP123]] +; ENABLED_MASKED_STRIDED-NEXT: [[TMP125:%.*]] = extractelement <8 x i8> [[TMP105]], i64 4 +; ENABLED_MASKED_STRIDED-NEXT: store i8 [[TMP125]], i8* [[TMP124]], align 1 ; ENABLED_MASKED_STRIDED-NEXT: br label [[PRED_STORE_CONTINUE43]] ; ENABLED_MASKED_STRIDED: pred.store.continue43: -; ENABLED_MASKED_STRIDED-NEXT: [[TMP128:%.*]] = extractelement <8 x i1> [[TMP7]], i32 5 -; ENABLED_MASKED_STRIDED-NEXT: br i1 [[TMP128]], label [[PRED_STORE_IF44:%.*]], label [[PRED_STORE_CONTINUE45:%.*]] +; ENABLED_MASKED_STRIDED-NEXT: [[TMP126:%.*]] = extractelement <8 x i1> [[TMP5]], i64 5 +; ENABLED_MASKED_STRIDED-NEXT: br i1 [[TMP126]], label [[PRED_STORE_IF44:%.*]], label [[PRED_STORE_CONTINUE45:%.*]] ; ENABLED_MASKED_STRIDED: pred.store.if44: -; ENABLED_MASKED_STRIDED-NEXT: [[TMP129:%.*]] = extractelement <8 x i32> [[TMP8]], i32 5 -; ENABLED_MASKED_STRIDED-NEXT: [[TMP130:%.*]] = getelementptr inbounds i8, i8* [[Q]], i32 [[TMP129]] -; ENABLED_MASKED_STRIDED-NEXT: [[TMP131:%.*]] = extractelement <8 x i8> [[TMP107]], i32 5 -; ENABLED_MASKED_STRIDED-NEXT: store i8 [[TMP131]], i8* [[TMP130]], align 1 +; ENABLED_MASKED_STRIDED-NEXT: [[TMP127:%.*]] = extractelement <8 x i32> [[TMP6]], i64 5 +; ENABLED_MASKED_STRIDED-NEXT: [[TMP128:%.*]] = getelementptr inbounds i8, i8* [[Q]], i32 [[TMP127]] +; ENABLED_MASKED_STRIDED-NEXT: [[TMP129:%.*]] = extractelement <8 x i8> [[TMP105]], i64 5 +; ENABLED_MASKED_STRIDED-NEXT: store i8 [[TMP129]], i8* [[TMP128]], align 1 ; ENABLED_MASKED_STRIDED-NEXT: br label [[PRED_STORE_CONTINUE45]] ; ENABLED_MASKED_STRIDED: pred.store.continue45: -; ENABLED_MASKED_STRIDED-NEXT: [[TMP132:%.*]] = extractelement <8 x i1> [[TMP7]], i32 6 -; ENABLED_MASKED_STRIDED-NEXT: br i1 [[TMP132]], label [[PRED_STORE_IF46:%.*]], label [[PRED_STORE_CONTINUE47:%.*]] +; ENABLED_MASKED_STRIDED-NEXT: [[TMP130:%.*]] = extractelement <8 x i1> [[TMP5]], i64 6 +; ENABLED_MASKED_STRIDED-NEXT: br i1 [[TMP130]], label [[PRED_STORE_IF46:%.*]], label [[PRED_STORE_CONTINUE47:%.*]] ; ENABLED_MASKED_STRIDED: pred.store.if46: -; ENABLED_MASKED_STRIDED-NEXT: [[TMP133:%.*]] = extractelement <8 x i32> [[TMP8]], i32 6 -; ENABLED_MASKED_STRIDED-NEXT: [[TMP134:%.*]] = getelementptr inbounds i8, i8* [[Q]], i32 [[TMP133]] -; ENABLED_MASKED_STRIDED-NEXT: [[TMP135:%.*]] = extractelement <8 x i8> [[TMP107]], i32 6 -; ENABLED_MASKED_STRIDED-NEXT: store i8 [[TMP135]], i8* [[TMP134]], align 1 +; ENABLED_MASKED_STRIDED-NEXT: [[TMP131:%.*]] = extractelement <8 x i32> [[TMP6]], i64 6 +; ENABLED_MASKED_STRIDED-NEXT: [[TMP132:%.*]] = getelementptr inbounds i8, i8* [[Q]], i32 [[TMP131]] +; ENABLED_MASKED_STRIDED-NEXT: [[TMP133:%.*]] = extractelement <8 x i8> [[TMP105]], i64 6 +; ENABLED_MASKED_STRIDED-NEXT: store i8 [[TMP133]], i8* [[TMP132]], align 1 ; ENABLED_MASKED_STRIDED-NEXT: br label [[PRED_STORE_CONTINUE47]] ; ENABLED_MASKED_STRIDED: pred.store.continue47: -; ENABLED_MASKED_STRIDED-NEXT: [[TMP136:%.*]] = extractelement <8 x i1> [[TMP7]], i32 7 -; ENABLED_MASKED_STRIDED-NEXT: br i1 [[TMP136]], label [[PRED_STORE_IF48:%.*]], label [[PRED_STORE_CONTINUE49:%.*]] +; ENABLED_MASKED_STRIDED-NEXT: [[TMP134:%.*]] = extractelement <8 x i1> [[TMP5]], i64 7 +; ENABLED_MASKED_STRIDED-NEXT: br i1 [[TMP134]], label [[PRED_STORE_IF48:%.*]], label [[PRED_STORE_CONTINUE49:%.*]] ; ENABLED_MASKED_STRIDED: pred.store.if48: -; ENABLED_MASKED_STRIDED-NEXT: [[TMP137:%.*]] = extractelement <8 x i32> [[TMP8]], i32 7 -; ENABLED_MASKED_STRIDED-NEXT: [[TMP138:%.*]] = getelementptr inbounds i8, i8* [[Q]], i32 [[TMP137]] -; ENABLED_MASKED_STRIDED-NEXT: [[TMP139:%.*]] = extractelement <8 x i8> [[TMP107]], i32 7 -; ENABLED_MASKED_STRIDED-NEXT: store i8 [[TMP139]], i8* [[TMP138]], align 1 +; ENABLED_MASKED_STRIDED-NEXT: [[TMP135:%.*]] = extractelement <8 x i32> [[TMP6]], i64 7 +; ENABLED_MASKED_STRIDED-NEXT: [[TMP136:%.*]] = getelementptr inbounds i8, i8* [[Q]], i32 [[TMP135]] +; ENABLED_MASKED_STRIDED-NEXT: [[TMP137:%.*]] = extractelement <8 x i8> [[TMP105]], i64 7 +; ENABLED_MASKED_STRIDED-NEXT: store i8 [[TMP137]], i8* [[TMP136]], align 1 ; ENABLED_MASKED_STRIDED-NEXT: br label [[PRED_STORE_CONTINUE49]] ; ENABLED_MASKED_STRIDED: pred.store.continue49: -; ENABLED_MASKED_STRIDED-NEXT: [[TMP140:%.*]] = sub <8 x i8> zeroinitializer, [[TMP107]] -; ENABLED_MASKED_STRIDED-NEXT: [[TMP141:%.*]] = extractelement <8 x i1> [[TMP7]], i32 0 -; ENABLED_MASKED_STRIDED-NEXT: br i1 [[TMP141]], label [[PRED_STORE_IF50:%.*]], label [[PRED_STORE_CONTINUE51:%.*]] +; ENABLED_MASKED_STRIDED-NEXT: [[TMP138:%.*]] = sub <8 x i8> zeroinitializer, [[TMP105]] +; ENABLED_MASKED_STRIDED-NEXT: [[TMP139:%.*]] = extractelement <8 x i1> [[TMP5]], i64 0 +; ENABLED_MASKED_STRIDED-NEXT: br i1 [[TMP139]], label [[PRED_STORE_IF50:%.*]], label [[PRED_STORE_CONTINUE51:%.*]] ; ENABLED_MASKED_STRIDED: pred.store.if50: -; ENABLED_MASKED_STRIDED-NEXT: [[TMP142:%.*]] = extractelement <8 x i32> [[TMP57]], i32 0 -; ENABLED_MASKED_STRIDED-NEXT: [[TMP143:%.*]] = getelementptr inbounds i8, i8* [[Q]], i32 [[TMP142]] -; ENABLED_MASKED_STRIDED-NEXT: [[TMP144:%.*]] = extractelement <8 x i8> [[TMP140]], i32 0 -; ENABLED_MASKED_STRIDED-NEXT: store i8 [[TMP144]], i8* [[TMP143]], align 1 +; ENABLED_MASKED_STRIDED-NEXT: [[TMP140:%.*]] = extractelement <8 x i32> [[TMP55]], i64 0 +; ENABLED_MASKED_STRIDED-NEXT: [[TMP141:%.*]] = getelementptr inbounds i8, i8* [[Q]], i32 [[TMP140]] +; ENABLED_MASKED_STRIDED-NEXT: [[TMP142:%.*]] = extractelement <8 x i8> [[TMP138]], i64 0 +; ENABLED_MASKED_STRIDED-NEXT: store i8 [[TMP142]], i8* [[TMP141]], align 1 ; ENABLED_MASKED_STRIDED-NEXT: br label [[PRED_STORE_CONTINUE51]] ; ENABLED_MASKED_STRIDED: pred.store.continue51: -; ENABLED_MASKED_STRIDED-NEXT: [[TMP145:%.*]] = extractelement <8 x i1> [[TMP7]], i32 1 -; ENABLED_MASKED_STRIDED-NEXT: br i1 [[TMP145]], label [[PRED_STORE_IF52:%.*]], label [[PRED_STORE_CONTINUE53:%.*]] +; ENABLED_MASKED_STRIDED-NEXT: [[TMP143:%.*]] = extractelement <8 x i1> [[TMP5]], i64 1 +; ENABLED_MASKED_STRIDED-NEXT: br i1 [[TMP143]], label [[PRED_STORE_IF52:%.*]], label [[PRED_STORE_CONTINUE53:%.*]] ; ENABLED_MASKED_STRIDED: pred.store.if52: -; ENABLED_MASKED_STRIDED-NEXT: [[TMP146:%.*]] = extractelement <8 x i32> [[TMP57]], i32 1 -; ENABLED_MASKED_STRIDED-NEXT: [[TMP147:%.*]] = getelementptr inbounds i8, i8* [[Q]], i32 [[TMP146]] -; ENABLED_MASKED_STRIDED-NEXT: [[TMP148:%.*]] = extractelement <8 x i8> [[TMP140]], i32 1 -; ENABLED_MASKED_STRIDED-NEXT: store i8 [[TMP148]], i8* [[TMP147]], align 1 +; ENABLED_MASKED_STRIDED-NEXT: [[TMP144:%.*]] = extractelement <8 x i32> [[TMP55]], i64 1 +; ENABLED_MASKED_STRIDED-NEXT: [[TMP145:%.*]] = getelementptr inbounds i8, i8* [[Q]], i32 [[TMP144]] +; ENABLED_MASKED_STRIDED-NEXT: [[TMP146:%.*]] = extractelement <8 x i8> [[TMP138]], i64 1 +; ENABLED_MASKED_STRIDED-NEXT: store i8 [[TMP146]], i8* [[TMP145]], align 1 ; ENABLED_MASKED_STRIDED-NEXT: br label [[PRED_STORE_CONTINUE53]] ; ENABLED_MASKED_STRIDED: pred.store.continue53: -; ENABLED_MASKED_STRIDED-NEXT: [[TMP149:%.*]] = extractelement <8 x i1> [[TMP7]], i32 2 -; ENABLED_MASKED_STRIDED-NEXT: br i1 [[TMP149]], label [[PRED_STORE_IF54:%.*]], label [[PRED_STORE_CONTINUE55:%.*]] +; ENABLED_MASKED_STRIDED-NEXT: [[TMP147:%.*]] = extractelement <8 x i1> [[TMP5]], i64 2 +; ENABLED_MASKED_STRIDED-NEXT: br i1 [[TMP147]], label [[PRED_STORE_IF54:%.*]], label [[PRED_STORE_CONTINUE55:%.*]] ; ENABLED_MASKED_STRIDED: pred.store.if54: -; ENABLED_MASKED_STRIDED-NEXT: [[TMP150:%.*]] = extractelement <8 x i32> [[TMP57]], i32 2 -; ENABLED_MASKED_STRIDED-NEXT: [[TMP151:%.*]] = getelementptr inbounds i8, i8* [[Q]], i32 [[TMP150]] -; ENABLED_MASKED_STRIDED-NEXT: [[TMP152:%.*]] = extractelement <8 x i8> [[TMP140]], i32 2 -; ENABLED_MASKED_STRIDED-NEXT: store i8 [[TMP152]], i8* [[TMP151]], align 1 +; ENABLED_MASKED_STRIDED-NEXT: [[TMP148:%.*]] = extractelement <8 x i32> [[TMP55]], i64 2 +; ENABLED_MASKED_STRIDED-NEXT: [[TMP149:%.*]] = getelementptr inbounds i8, i8* [[Q]], i32 [[TMP148]] +; ENABLED_MASKED_STRIDED-NEXT: [[TMP150:%.*]] = extractelement <8 x i8> [[TMP138]], i64 2 +; ENABLED_MASKED_STRIDED-NEXT: store i8 [[TMP150]], i8* [[TMP149]], align 1 ; ENABLED_MASKED_STRIDED-NEXT: br label [[PRED_STORE_CONTINUE55]] ; ENABLED_MASKED_STRIDED: pred.store.continue55: -; ENABLED_MASKED_STRIDED-NEXT: [[TMP153:%.*]] = extractelement <8 x i1> [[TMP7]], i32 3 -; ENABLED_MASKED_STRIDED-NEXT: br i1 [[TMP153]], label [[PRED_STORE_IF56:%.*]], label [[PRED_STORE_CONTINUE57:%.*]] +; ENABLED_MASKED_STRIDED-NEXT: [[TMP151:%.*]] = extractelement <8 x i1> [[TMP5]], i64 3 +; ENABLED_MASKED_STRIDED-NEXT: br i1 [[TMP151]], label [[PRED_STORE_IF56:%.*]], label [[PRED_STORE_CONTINUE57:%.*]] ; ENABLED_MASKED_STRIDED: pred.store.if56: -; ENABLED_MASKED_STRIDED-NEXT: [[TMP154:%.*]] = extractelement <8 x i32> [[TMP57]], i32 3 -; ENABLED_MASKED_STRIDED-NEXT: [[TMP155:%.*]] = getelementptr inbounds i8, i8* [[Q]], i32 [[TMP154]] -; ENABLED_MASKED_STRIDED-NEXT: [[TMP156:%.*]] = extractelement <8 x i8> [[TMP140]], i32 3 -; ENABLED_MASKED_STRIDED-NEXT: store i8 [[TMP156]], i8* [[TMP155]], align 1 +; ENABLED_MASKED_STRIDED-NEXT: [[TMP152:%.*]] = extractelement <8 x i32> [[TMP55]], i64 3 +; ENABLED_MASKED_STRIDED-NEXT: [[TMP153:%.*]] = getelementptr inbounds i8, i8* [[Q]], i32 [[TMP152]] +; ENABLED_MASKED_STRIDED-NEXT: [[TMP154:%.*]] = extractelement <8 x i8> [[TMP138]], i64 3 +; ENABLED_MASKED_STRIDED-NEXT: store i8 [[TMP154]], i8* [[TMP153]], align 1 ; ENABLED_MASKED_STRIDED-NEXT: br label [[PRED_STORE_CONTINUE57]] ; ENABLED_MASKED_STRIDED: pred.store.continue57: -; ENABLED_MASKED_STRIDED-NEXT: [[TMP157:%.*]] = extractelement <8 x i1> [[TMP7]], i32 4 -; ENABLED_MASKED_STRIDED-NEXT: br i1 [[TMP157]], label [[PRED_STORE_IF58:%.*]], label [[PRED_STORE_CONTINUE59:%.*]] +; ENABLED_MASKED_STRIDED-NEXT: [[TMP155:%.*]] = extractelement <8 x i1> [[TMP5]], i64 4 +; ENABLED_MASKED_STRIDED-NEXT: br i1 [[TMP155]], label [[PRED_STORE_IF58:%.*]], label [[PRED_STORE_CONTINUE59:%.*]] ; ENABLED_MASKED_STRIDED: pred.store.if58: -; ENABLED_MASKED_STRIDED-NEXT: [[TMP158:%.*]] = extractelement <8 x i32> [[TMP57]], i32 4 -; ENABLED_MASKED_STRIDED-NEXT: [[TMP159:%.*]] = getelementptr inbounds i8, i8* [[Q]], i32 [[TMP158]] -; ENABLED_MASKED_STRIDED-NEXT: [[TMP160:%.*]] = extractelement <8 x i8> [[TMP140]], i32 4 -; ENABLED_MASKED_STRIDED-NEXT: store i8 [[TMP160]], i8* [[TMP159]], align 1 +; ENABLED_MASKED_STRIDED-NEXT: [[TMP156:%.*]] = extractelement <8 x i32> [[TMP55]], i64 4 +; ENABLED_MASKED_STRIDED-NEXT: [[TMP157:%.*]] = getelementptr inbounds i8, i8* [[Q]], i32 [[TMP156]] +; ENABLED_MASKED_STRIDED-NEXT: [[TMP158:%.*]] = extractelement <8 x i8> [[TMP138]], i64 4 +; ENABLED_MASKED_STRIDED-NEXT: store i8 [[TMP158]], i8* [[TMP157]], align 1 ; ENABLED_MASKED_STRIDED-NEXT: br label [[PRED_STORE_CONTINUE59]] ; ENABLED_MASKED_STRIDED: pred.store.continue59: -; ENABLED_MASKED_STRIDED-NEXT: [[TMP161:%.*]] = extractelement <8 x i1> [[TMP7]], i32 5 -; ENABLED_MASKED_STRIDED-NEXT: br i1 [[TMP161]], label [[PRED_STORE_IF60:%.*]], label [[PRED_STORE_CONTINUE61:%.*]] +; ENABLED_MASKED_STRIDED-NEXT: [[TMP159:%.*]] = extractelement <8 x i1> [[TMP5]], i64 5 +; ENABLED_MASKED_STRIDED-NEXT: br i1 [[TMP159]], label [[PRED_STORE_IF60:%.*]], label [[PRED_STORE_CONTINUE61:%.*]] ; ENABLED_MASKED_STRIDED: pred.store.if60: -; ENABLED_MASKED_STRIDED-NEXT: [[TMP162:%.*]] = extractelement <8 x i32> [[TMP57]], i32 5 -; ENABLED_MASKED_STRIDED-NEXT: [[TMP163:%.*]] = getelementptr inbounds i8, i8* [[Q]], i32 [[TMP162]] -; ENABLED_MASKED_STRIDED-NEXT: [[TMP164:%.*]] = extractelement <8 x i8> [[TMP140]], i32 5 -; ENABLED_MASKED_STRIDED-NEXT: store i8 [[TMP164]], i8* [[TMP163]], align 1 +; ENABLED_MASKED_STRIDED-NEXT: [[TMP160:%.*]] = extractelement <8 x i32> [[TMP55]], i64 5 +; ENABLED_MASKED_STRIDED-NEXT: [[TMP161:%.*]] = getelementptr inbounds i8, i8* [[Q]], i32 [[TMP160]] +; ENABLED_MASKED_STRIDED-NEXT: [[TMP162:%.*]] = extractelement <8 x i8> [[TMP138]], i64 5 +; ENABLED_MASKED_STRIDED-NEXT: store i8 [[TMP162]], i8* [[TMP161]], align 1 ; ENABLED_MASKED_STRIDED-NEXT: br label [[PRED_STORE_CONTINUE61]] ; ENABLED_MASKED_STRIDED: pred.store.continue61: -; ENABLED_MASKED_STRIDED-NEXT: [[TMP165:%.*]] = extractelement <8 x i1> [[TMP7]], i32 6 -; ENABLED_MASKED_STRIDED-NEXT: br i1 [[TMP165]], label [[PRED_STORE_IF62:%.*]], label [[PRED_STORE_CONTINUE63:%.*]] +; ENABLED_MASKED_STRIDED-NEXT: [[TMP163:%.*]] = extractelement <8 x i1> [[TMP5]], i64 6 +; ENABLED_MASKED_STRIDED-NEXT: br i1 [[TMP163]], label [[PRED_STORE_IF62:%.*]], label [[PRED_STORE_CONTINUE63:%.*]] ; ENABLED_MASKED_STRIDED: pred.store.if62: -; ENABLED_MASKED_STRIDED-NEXT: [[TMP166:%.*]] = extractelement <8 x i32> [[TMP57]], i32 6 -; ENABLED_MASKED_STRIDED-NEXT: [[TMP167:%.*]] = getelementptr inbounds i8, i8* [[Q]], i32 [[TMP166]] -; ENABLED_MASKED_STRIDED-NEXT: [[TMP168:%.*]] = extractelement <8 x i8> [[TMP140]], i32 6 -; ENABLED_MASKED_STRIDED-NEXT: store i8 [[TMP168]], i8* [[TMP167]], align 1 +; ENABLED_MASKED_STRIDED-NEXT: [[TMP164:%.*]] = extractelement <8 x i32> [[TMP55]], i64 6 +; ENABLED_MASKED_STRIDED-NEXT: [[TMP165:%.*]] = getelementptr inbounds i8, i8* [[Q]], i32 [[TMP164]] +; ENABLED_MASKED_STRIDED-NEXT: [[TMP166:%.*]] = extractelement <8 x i8> [[TMP138]], i64 6 +; ENABLED_MASKED_STRIDED-NEXT: store i8 [[TMP166]], i8* [[TMP165]], align 1 ; ENABLED_MASKED_STRIDED-NEXT: br label [[PRED_STORE_CONTINUE63]] ; ENABLED_MASKED_STRIDED: pred.store.continue63: -; ENABLED_MASKED_STRIDED-NEXT: [[TMP169:%.*]] = extractelement <8 x i1> [[TMP7]], i32 7 -; ENABLED_MASKED_STRIDED-NEXT: br i1 [[TMP169]], label [[PRED_STORE_IF64:%.*]], label [[PRED_STORE_CONTINUE65]] +; ENABLED_MASKED_STRIDED-NEXT: [[TMP167:%.*]] = extractelement <8 x i1> [[TMP5]], i64 7 +; ENABLED_MASKED_STRIDED-NEXT: br i1 [[TMP167]], label [[PRED_STORE_IF64:%.*]], label [[PRED_STORE_CONTINUE65]] ; ENABLED_MASKED_STRIDED: pred.store.if64: -; ENABLED_MASKED_STRIDED-NEXT: [[TMP170:%.*]] = extractelement <8 x i32> [[TMP57]], i32 7 -; ENABLED_MASKED_STRIDED-NEXT: [[TMP171:%.*]] = getelementptr inbounds i8, i8* [[Q]], i32 [[TMP170]] -; ENABLED_MASKED_STRIDED-NEXT: [[TMP172:%.*]] = extractelement <8 x i8> [[TMP140]], i32 7 -; ENABLED_MASKED_STRIDED-NEXT: store i8 [[TMP172]], i8* [[TMP171]], align 1 +; ENABLED_MASKED_STRIDED-NEXT: [[TMP168:%.*]] = extractelement <8 x i32> [[TMP55]], i64 7 +; ENABLED_MASKED_STRIDED-NEXT: [[TMP169:%.*]] = getelementptr inbounds i8, i8* [[Q]], i32 [[TMP168]] +; ENABLED_MASKED_STRIDED-NEXT: [[TMP170:%.*]] = extractelement <8 x i8> [[TMP138]], i64 7 +; ENABLED_MASKED_STRIDED-NEXT: store i8 [[TMP170]], i8* [[TMP169]], align 1 ; ENABLED_MASKED_STRIDED-NEXT: br label [[PRED_STORE_CONTINUE65]] ; ENABLED_MASKED_STRIDED: pred.store.continue65: ; ENABLED_MASKED_STRIDED-NEXT: [[INDEX_NEXT]] = add nuw i32 [[INDEX]], 8 ; ENABLED_MASKED_STRIDED-NEXT: [[VEC_IND_NEXT]] = add <8 x i32> [[VEC_IND]], -; ENABLED_MASKED_STRIDED-NEXT: [[TMP173:%.*]] = icmp eq i32 [[INDEX_NEXT]], 1024 -; ENABLED_MASKED_STRIDED-NEXT: br i1 [[TMP173]], label [[FOR_END:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP0:![0-9]+]] +; ENABLED_MASKED_STRIDED-NEXT: [[TMP171:%.*]] = icmp eq i32 [[INDEX_NEXT]], 1024 +; ENABLED_MASKED_STRIDED-NEXT: br i1 [[TMP171]], label [[FOR_END:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP10:![0-9]+]] ; ENABLED_MASKED_STRIDED: for.body: ; ENABLED_MASKED_STRIDED-NEXT: [[IX_024:%.*]] = phi i32 [ [[INC:%.*]], [[FOR_INC:%.*]] ], [ 1024, [[ENTRY:%.*]] ] ; ENABLED_MASKED_STRIDED-NEXT: [[CMP1:%.*]] = icmp ugt i32 [[IX_024]], [[CONV]] @@ -2186,12 +2204,12 @@ ; ENABLED_MASKED_STRIDED: if.then: ; ENABLED_MASKED_STRIDED-NEXT: [[MUL:%.*]] = shl nuw nsw i32 [[IX_024]], 1 ; ENABLED_MASKED_STRIDED-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i8, i8* [[P]], i32 [[MUL]] -; ENABLED_MASKED_STRIDED-NEXT: [[TMP174:%.*]] = load i8, i8* [[ARRAYIDX]], align 1 +; ENABLED_MASKED_STRIDED-NEXT: [[TMP172:%.*]] = load i8, i8* [[ARRAYIDX]], align 1 ; ENABLED_MASKED_STRIDED-NEXT: [[ADD:%.*]] = or i32 [[MUL]], 1 ; ENABLED_MASKED_STRIDED-NEXT: [[ARRAYIDX4:%.*]] = getelementptr inbounds i8, i8* [[P]], i32 [[ADD]] -; ENABLED_MASKED_STRIDED-NEXT: [[TMP175:%.*]] = load i8, i8* [[ARRAYIDX4]], align 1 -; ENABLED_MASKED_STRIDED-NEXT: [[CMP_I:%.*]] = icmp slt i8 [[TMP174]], [[TMP175]] -; ENABLED_MASKED_STRIDED-NEXT: [[SPEC_SELECT_I:%.*]] = select i1 [[CMP_I]], i8 [[TMP175]], i8 [[TMP174]] +; ENABLED_MASKED_STRIDED-NEXT: [[TMP173:%.*]] = load i8, i8* [[ARRAYIDX4]], align 1 +; ENABLED_MASKED_STRIDED-NEXT: [[CMP_I:%.*]] = icmp slt i8 [[TMP172]], [[TMP173]] +; ENABLED_MASKED_STRIDED-NEXT: [[SPEC_SELECT_I:%.*]] = select i1 [[CMP_I]], i8 [[TMP173]], i8 [[TMP172]] ; ENABLED_MASKED_STRIDED-NEXT: [[ARRAYIDX6:%.*]] = getelementptr inbounds i8, i8* [[Q]], i32 [[MUL]] ; ENABLED_MASKED_STRIDED-NEXT: store i8 [[SPEC_SELECT_I]], i8* [[ARRAYIDX6]], align 1 ; ENABLED_MASKED_STRIDED-NEXT: [[SUB:%.*]] = sub i8 0, [[SPEC_SELECT_I]] @@ -2201,7 +2219,7 @@ ; ENABLED_MASKED_STRIDED: for.inc: ; ENABLED_MASKED_STRIDED-NEXT: [[INC]] = add nsw i32 [[IX_024]], -1 ; ENABLED_MASKED_STRIDED-NEXT: [[EXITCOND:%.*]] = icmp eq i32 [[INC]], 0 -; ENABLED_MASKED_STRIDED-NEXT: br i1 [[EXITCOND]], label [[FOR_END]], label [[FOR_BODY]], !llvm.loop [[LOOP2:![0-9]+]] +; ENABLED_MASKED_STRIDED-NEXT: br i1 [[EXITCOND]], label [[FOR_END]], label [[FOR_BODY]], !llvm.loop [[LOOP11:![0-9]+]] ; ENABLED_MASKED_STRIDED: for.end: ; ENABLED_MASKED_STRIDED-NEXT: ret void ; @@ -2274,9 +2292,9 @@ ; DISABLED_MASKED_STRIDED-NEXT: [[N_RND_UP:%.*]] = add i32 [[N]], 7 ; DISABLED_MASKED_STRIDED-NEXT: [[N_VEC:%.*]] = and i32 [[N_RND_UP]], -8 ; DISABLED_MASKED_STRIDED-NEXT: [[TRIP_COUNT_MINUS_1:%.*]] = add i32 [[N]], -1 -; DISABLED_MASKED_STRIDED-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <8 x i32> poison, i32 [[TRIP_COUNT_MINUS_1]], i32 0 +; DISABLED_MASKED_STRIDED-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <8 x i32> poison, i32 [[TRIP_COUNT_MINUS_1]], i64 0 ; DISABLED_MASKED_STRIDED-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector <8 x i32> [[BROADCAST_SPLATINSERT]], <8 x i32> poison, <8 x i32> zeroinitializer -; DISABLED_MASKED_STRIDED-NEXT: [[BROADCAST_SPLATINSERT1:%.*]] = insertelement <8 x i32> poison, i32 [[GUARD:%.*]], i32 0 +; DISABLED_MASKED_STRIDED-NEXT: [[BROADCAST_SPLATINSERT1:%.*]] = insertelement <8 x i32> poison, i32 [[GUARD:%.*]], i64 0 ; DISABLED_MASKED_STRIDED-NEXT: [[BROADCAST_SPLAT2:%.*]] = shufflevector <8 x i32> [[BROADCAST_SPLATINSERT1]], <8 x i32> poison, <8 x i32> zeroinitializer ; DISABLED_MASKED_STRIDED-NEXT: br label [[VECTOR_BODY:%.*]] ; DISABLED_MASKED_STRIDED: vector.body: @@ -2286,318 +2304,318 @@ ; DISABLED_MASKED_STRIDED-NEXT: [[TMP1:%.*]] = icmp ule <8 x i32> [[VEC_IND]], [[BROADCAST_SPLAT]] ; DISABLED_MASKED_STRIDED-NEXT: [[TMP2:%.*]] = shl nuw nsw <8 x i32> [[VEC_IND]], ; DISABLED_MASKED_STRIDED-NEXT: [[TMP3:%.*]] = select <8 x i1> [[TMP1]], <8 x i1> [[TMP0]], <8 x i1> zeroinitializer -; DISABLED_MASKED_STRIDED-NEXT: [[TMP4:%.*]] = extractelement <8 x i1> [[TMP3]], i32 0 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP4:%.*]] = extractelement <8 x i1> [[TMP3]], i64 0 ; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP4]], label [[PRED_LOAD_IF:%.*]], label [[PRED_LOAD_CONTINUE:%.*]] ; DISABLED_MASKED_STRIDED: pred.load.if: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP5:%.*]] = extractelement <8 x i32> [[TMP2]], i32 0 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP5:%.*]] = extractelement <8 x i32> [[TMP2]], i64 0 ; DISABLED_MASKED_STRIDED-NEXT: [[TMP6:%.*]] = getelementptr inbounds i8, i8* [[P:%.*]], i32 [[TMP5]] ; DISABLED_MASKED_STRIDED-NEXT: [[TMP7:%.*]] = load i8, i8* [[TMP6]], align 1 -; DISABLED_MASKED_STRIDED-NEXT: [[TMP8:%.*]] = insertelement <8 x i8> poison, i8 [[TMP7]], i32 0 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP8:%.*]] = insertelement <8 x i8> poison, i8 [[TMP7]], i64 0 ; DISABLED_MASKED_STRIDED-NEXT: br label [[PRED_LOAD_CONTINUE]] ; DISABLED_MASKED_STRIDED: pred.load.continue: ; DISABLED_MASKED_STRIDED-NEXT: [[TMP9:%.*]] = phi <8 x i8> [ poison, [[VECTOR_BODY]] ], [ [[TMP8]], [[PRED_LOAD_IF]] ] -; DISABLED_MASKED_STRIDED-NEXT: [[TMP10:%.*]] = extractelement <8 x i1> [[TMP3]], i32 1 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP10:%.*]] = extractelement <8 x i1> [[TMP3]], i64 1 ; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP10]], label [[PRED_LOAD_IF3:%.*]], label [[PRED_LOAD_CONTINUE4:%.*]] ; DISABLED_MASKED_STRIDED: pred.load.if3: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP11:%.*]] = extractelement <8 x i32> [[TMP2]], i32 1 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP11:%.*]] = extractelement <8 x i32> [[TMP2]], i64 1 ; DISABLED_MASKED_STRIDED-NEXT: [[TMP12:%.*]] = getelementptr inbounds i8, i8* [[P]], i32 [[TMP11]] ; DISABLED_MASKED_STRIDED-NEXT: [[TMP13:%.*]] = load i8, i8* [[TMP12]], align 1 -; DISABLED_MASKED_STRIDED-NEXT: [[TMP14:%.*]] = insertelement <8 x i8> [[TMP9]], i8 [[TMP13]], i32 1 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP14:%.*]] = insertelement <8 x i8> [[TMP9]], i8 [[TMP13]], i64 1 ; DISABLED_MASKED_STRIDED-NEXT: br label [[PRED_LOAD_CONTINUE4]] ; DISABLED_MASKED_STRIDED: pred.load.continue4: ; DISABLED_MASKED_STRIDED-NEXT: [[TMP15:%.*]] = phi <8 x i8> [ [[TMP9]], [[PRED_LOAD_CONTINUE]] ], [ [[TMP14]], [[PRED_LOAD_IF3]] ] -; DISABLED_MASKED_STRIDED-NEXT: [[TMP16:%.*]] = extractelement <8 x i1> [[TMP3]], i32 2 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP16:%.*]] = extractelement <8 x i1> [[TMP3]], i64 2 ; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP16]], label [[PRED_LOAD_IF5:%.*]], label [[PRED_LOAD_CONTINUE6:%.*]] ; DISABLED_MASKED_STRIDED: pred.load.if5: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP17:%.*]] = extractelement <8 x i32> [[TMP2]], i32 2 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP17:%.*]] = extractelement <8 x i32> [[TMP2]], i64 2 ; DISABLED_MASKED_STRIDED-NEXT: [[TMP18:%.*]] = getelementptr inbounds i8, i8* [[P]], i32 [[TMP17]] ; DISABLED_MASKED_STRIDED-NEXT: [[TMP19:%.*]] = load i8, i8* [[TMP18]], align 1 -; DISABLED_MASKED_STRIDED-NEXT: [[TMP20:%.*]] = insertelement <8 x i8> [[TMP15]], i8 [[TMP19]], i32 2 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP20:%.*]] = insertelement <8 x i8> [[TMP15]], i8 [[TMP19]], i64 2 ; DISABLED_MASKED_STRIDED-NEXT: br label [[PRED_LOAD_CONTINUE6]] ; DISABLED_MASKED_STRIDED: pred.load.continue6: ; DISABLED_MASKED_STRIDED-NEXT: [[TMP21:%.*]] = phi <8 x i8> [ [[TMP15]], [[PRED_LOAD_CONTINUE4]] ], [ [[TMP20]], [[PRED_LOAD_IF5]] ] -; DISABLED_MASKED_STRIDED-NEXT: [[TMP22:%.*]] = extractelement <8 x i1> [[TMP3]], i32 3 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP22:%.*]] = extractelement <8 x i1> [[TMP3]], i64 3 ; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP22]], label [[PRED_LOAD_IF7:%.*]], label [[PRED_LOAD_CONTINUE8:%.*]] ; DISABLED_MASKED_STRIDED: pred.load.if7: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP23:%.*]] = extractelement <8 x i32> [[TMP2]], i32 3 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP23:%.*]] = extractelement <8 x i32> [[TMP2]], i64 3 ; DISABLED_MASKED_STRIDED-NEXT: [[TMP24:%.*]] = getelementptr inbounds i8, i8* [[P]], i32 [[TMP23]] ; DISABLED_MASKED_STRIDED-NEXT: [[TMP25:%.*]] = load i8, i8* [[TMP24]], align 1 -; DISABLED_MASKED_STRIDED-NEXT: [[TMP26:%.*]] = insertelement <8 x i8> [[TMP21]], i8 [[TMP25]], i32 3 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP26:%.*]] = insertelement <8 x i8> [[TMP21]], i8 [[TMP25]], i64 3 ; DISABLED_MASKED_STRIDED-NEXT: br label [[PRED_LOAD_CONTINUE8]] ; DISABLED_MASKED_STRIDED: pred.load.continue8: ; DISABLED_MASKED_STRIDED-NEXT: [[TMP27:%.*]] = phi <8 x i8> [ [[TMP21]], [[PRED_LOAD_CONTINUE6]] ], [ [[TMP26]], [[PRED_LOAD_IF7]] ] -; DISABLED_MASKED_STRIDED-NEXT: [[TMP28:%.*]] = extractelement <8 x i1> [[TMP3]], i32 4 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP28:%.*]] = extractelement <8 x i1> [[TMP3]], i64 4 ; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP28]], label [[PRED_LOAD_IF9:%.*]], label [[PRED_LOAD_CONTINUE10:%.*]] ; DISABLED_MASKED_STRIDED: pred.load.if9: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP29:%.*]] = extractelement <8 x i32> [[TMP2]], i32 4 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP29:%.*]] = extractelement <8 x i32> [[TMP2]], i64 4 ; DISABLED_MASKED_STRIDED-NEXT: [[TMP30:%.*]] = getelementptr inbounds i8, i8* [[P]], i32 [[TMP29]] ; DISABLED_MASKED_STRIDED-NEXT: [[TMP31:%.*]] = load i8, i8* [[TMP30]], align 1 -; DISABLED_MASKED_STRIDED-NEXT: [[TMP32:%.*]] = insertelement <8 x i8> [[TMP27]], i8 [[TMP31]], i32 4 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP32:%.*]] = insertelement <8 x i8> [[TMP27]], i8 [[TMP31]], i64 4 ; DISABLED_MASKED_STRIDED-NEXT: br label [[PRED_LOAD_CONTINUE10]] ; DISABLED_MASKED_STRIDED: pred.load.continue10: ; DISABLED_MASKED_STRIDED-NEXT: [[TMP33:%.*]] = phi <8 x i8> [ [[TMP27]], [[PRED_LOAD_CONTINUE8]] ], [ [[TMP32]], [[PRED_LOAD_IF9]] ] -; DISABLED_MASKED_STRIDED-NEXT: [[TMP34:%.*]] = extractelement <8 x i1> [[TMP3]], i32 5 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP34:%.*]] = extractelement <8 x i1> [[TMP3]], i64 5 ; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP34]], label [[PRED_LOAD_IF11:%.*]], label [[PRED_LOAD_CONTINUE12:%.*]] ; DISABLED_MASKED_STRIDED: pred.load.if11: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP35:%.*]] = extractelement <8 x i32> [[TMP2]], i32 5 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP35:%.*]] = extractelement <8 x i32> [[TMP2]], i64 5 ; DISABLED_MASKED_STRIDED-NEXT: [[TMP36:%.*]] = getelementptr inbounds i8, i8* [[P]], i32 [[TMP35]] ; DISABLED_MASKED_STRIDED-NEXT: [[TMP37:%.*]] = load i8, i8* [[TMP36]], align 1 -; DISABLED_MASKED_STRIDED-NEXT: [[TMP38:%.*]] = insertelement <8 x i8> [[TMP33]], i8 [[TMP37]], i32 5 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP38:%.*]] = insertelement <8 x i8> [[TMP33]], i8 [[TMP37]], i64 5 ; DISABLED_MASKED_STRIDED-NEXT: br label [[PRED_LOAD_CONTINUE12]] ; DISABLED_MASKED_STRIDED: pred.load.continue12: ; DISABLED_MASKED_STRIDED-NEXT: [[TMP39:%.*]] = phi <8 x i8> [ [[TMP33]], [[PRED_LOAD_CONTINUE10]] ], [ [[TMP38]], [[PRED_LOAD_IF11]] ] -; DISABLED_MASKED_STRIDED-NEXT: [[TMP40:%.*]] = extractelement <8 x i1> [[TMP3]], i32 6 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP40:%.*]] = extractelement <8 x i1> [[TMP3]], i64 6 ; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP40]], label [[PRED_LOAD_IF13:%.*]], label [[PRED_LOAD_CONTINUE14:%.*]] ; DISABLED_MASKED_STRIDED: pred.load.if13: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP41:%.*]] = extractelement <8 x i32> [[TMP2]], i32 6 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP41:%.*]] = extractelement <8 x i32> [[TMP2]], i64 6 ; DISABLED_MASKED_STRIDED-NEXT: [[TMP42:%.*]] = getelementptr inbounds i8, i8* [[P]], i32 [[TMP41]] ; DISABLED_MASKED_STRIDED-NEXT: [[TMP43:%.*]] = load i8, i8* [[TMP42]], align 1 -; DISABLED_MASKED_STRIDED-NEXT: [[TMP44:%.*]] = insertelement <8 x i8> [[TMP39]], i8 [[TMP43]], i32 6 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP44:%.*]] = insertelement <8 x i8> [[TMP39]], i8 [[TMP43]], i64 6 ; DISABLED_MASKED_STRIDED-NEXT: br label [[PRED_LOAD_CONTINUE14]] ; DISABLED_MASKED_STRIDED: pred.load.continue14: ; DISABLED_MASKED_STRIDED-NEXT: [[TMP45:%.*]] = phi <8 x i8> [ [[TMP39]], [[PRED_LOAD_CONTINUE12]] ], [ [[TMP44]], [[PRED_LOAD_IF13]] ] -; DISABLED_MASKED_STRIDED-NEXT: [[TMP46:%.*]] = extractelement <8 x i1> [[TMP3]], i32 7 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP46:%.*]] = extractelement <8 x i1> [[TMP3]], i64 7 ; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP46]], label [[PRED_LOAD_IF15:%.*]], label [[PRED_LOAD_CONTINUE16:%.*]] ; DISABLED_MASKED_STRIDED: pred.load.if15: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP47:%.*]] = extractelement <8 x i32> [[TMP2]], i32 7 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP47:%.*]] = extractelement <8 x i32> [[TMP2]], i64 7 ; DISABLED_MASKED_STRIDED-NEXT: [[TMP48:%.*]] = getelementptr inbounds i8, i8* [[P]], i32 [[TMP47]] ; DISABLED_MASKED_STRIDED-NEXT: [[TMP49:%.*]] = load i8, i8* [[TMP48]], align 1 -; DISABLED_MASKED_STRIDED-NEXT: [[TMP50:%.*]] = insertelement <8 x i8> [[TMP45]], i8 [[TMP49]], i32 7 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP50:%.*]] = insertelement <8 x i8> [[TMP45]], i8 [[TMP49]], i64 7 ; DISABLED_MASKED_STRIDED-NEXT: br label [[PRED_LOAD_CONTINUE16]] ; DISABLED_MASKED_STRIDED: pred.load.continue16: ; DISABLED_MASKED_STRIDED-NEXT: [[TMP51:%.*]] = phi <8 x i8> [ [[TMP45]], [[PRED_LOAD_CONTINUE14]] ], [ [[TMP50]], [[PRED_LOAD_IF15]] ] ; DISABLED_MASKED_STRIDED-NEXT: [[TMP52:%.*]] = or <8 x i32> [[TMP2]], -; DISABLED_MASKED_STRIDED-NEXT: [[TMP53:%.*]] = extractelement <8 x i1> [[TMP3]], i32 0 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP53:%.*]] = extractelement <8 x i1> [[TMP3]], i64 0 ; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP53]], label [[PRED_LOAD_IF17:%.*]], label [[PRED_LOAD_CONTINUE18:%.*]] ; DISABLED_MASKED_STRIDED: pred.load.if17: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP54:%.*]] = extractelement <8 x i32> [[TMP52]], i32 0 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP54:%.*]] = extractelement <8 x i32> [[TMP52]], i64 0 ; DISABLED_MASKED_STRIDED-NEXT: [[TMP55:%.*]] = getelementptr inbounds i8, i8* [[P]], i32 [[TMP54]] ; DISABLED_MASKED_STRIDED-NEXT: [[TMP56:%.*]] = load i8, i8* [[TMP55]], align 1 -; DISABLED_MASKED_STRIDED-NEXT: [[TMP57:%.*]] = insertelement <8 x i8> poison, i8 [[TMP56]], i32 0 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP57:%.*]] = insertelement <8 x i8> poison, i8 [[TMP56]], i64 0 ; DISABLED_MASKED_STRIDED-NEXT: br label [[PRED_LOAD_CONTINUE18]] ; DISABLED_MASKED_STRIDED: pred.load.continue18: ; DISABLED_MASKED_STRIDED-NEXT: [[TMP58:%.*]] = phi <8 x i8> [ poison, [[PRED_LOAD_CONTINUE16]] ], [ [[TMP57]], [[PRED_LOAD_IF17]] ] -; DISABLED_MASKED_STRIDED-NEXT: [[TMP59:%.*]] = extractelement <8 x i1> [[TMP3]], i32 1 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP59:%.*]] = extractelement <8 x i1> [[TMP3]], i64 1 ; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP59]], label [[PRED_LOAD_IF19:%.*]], label [[PRED_LOAD_CONTINUE20:%.*]] ; DISABLED_MASKED_STRIDED: pred.load.if19: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP60:%.*]] = extractelement <8 x i32> [[TMP52]], i32 1 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP60:%.*]] = extractelement <8 x i32> [[TMP52]], i64 1 ; DISABLED_MASKED_STRIDED-NEXT: [[TMP61:%.*]] = getelementptr inbounds i8, i8* [[P]], i32 [[TMP60]] ; DISABLED_MASKED_STRIDED-NEXT: [[TMP62:%.*]] = load i8, i8* [[TMP61]], align 1 -; DISABLED_MASKED_STRIDED-NEXT: [[TMP63:%.*]] = insertelement <8 x i8> [[TMP58]], i8 [[TMP62]], i32 1 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP63:%.*]] = insertelement <8 x i8> [[TMP58]], i8 [[TMP62]], i64 1 ; DISABLED_MASKED_STRIDED-NEXT: br label [[PRED_LOAD_CONTINUE20]] ; DISABLED_MASKED_STRIDED: pred.load.continue20: ; DISABLED_MASKED_STRIDED-NEXT: [[TMP64:%.*]] = phi <8 x i8> [ [[TMP58]], [[PRED_LOAD_CONTINUE18]] ], [ [[TMP63]], [[PRED_LOAD_IF19]] ] -; DISABLED_MASKED_STRIDED-NEXT: [[TMP65:%.*]] = extractelement <8 x i1> [[TMP3]], i32 2 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP65:%.*]] = extractelement <8 x i1> [[TMP3]], i64 2 ; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP65]], label [[PRED_LOAD_IF21:%.*]], label [[PRED_LOAD_CONTINUE22:%.*]] ; DISABLED_MASKED_STRIDED: pred.load.if21: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP66:%.*]] = extractelement <8 x i32> [[TMP52]], i32 2 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP66:%.*]] = extractelement <8 x i32> [[TMP52]], i64 2 ; DISABLED_MASKED_STRIDED-NEXT: [[TMP67:%.*]] = getelementptr inbounds i8, i8* [[P]], i32 [[TMP66]] ; DISABLED_MASKED_STRIDED-NEXT: [[TMP68:%.*]] = load i8, i8* [[TMP67]], align 1 -; DISABLED_MASKED_STRIDED-NEXT: [[TMP69:%.*]] = insertelement <8 x i8> [[TMP64]], i8 [[TMP68]], i32 2 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP69:%.*]] = insertelement <8 x i8> [[TMP64]], i8 [[TMP68]], i64 2 ; DISABLED_MASKED_STRIDED-NEXT: br label [[PRED_LOAD_CONTINUE22]] ; DISABLED_MASKED_STRIDED: pred.load.continue22: ; DISABLED_MASKED_STRIDED-NEXT: [[TMP70:%.*]] = phi <8 x i8> [ [[TMP64]], [[PRED_LOAD_CONTINUE20]] ], [ [[TMP69]], [[PRED_LOAD_IF21]] ] -; DISABLED_MASKED_STRIDED-NEXT: [[TMP71:%.*]] = extractelement <8 x i1> [[TMP3]], i32 3 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP71:%.*]] = extractelement <8 x i1> [[TMP3]], i64 3 ; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP71]], label [[PRED_LOAD_IF23:%.*]], label [[PRED_LOAD_CONTINUE24:%.*]] ; DISABLED_MASKED_STRIDED: pred.load.if23: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP72:%.*]] = extractelement <8 x i32> [[TMP52]], i32 3 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP72:%.*]] = extractelement <8 x i32> [[TMP52]], i64 3 ; DISABLED_MASKED_STRIDED-NEXT: [[TMP73:%.*]] = getelementptr inbounds i8, i8* [[P]], i32 [[TMP72]] ; DISABLED_MASKED_STRIDED-NEXT: [[TMP74:%.*]] = load i8, i8* [[TMP73]], align 1 -; DISABLED_MASKED_STRIDED-NEXT: [[TMP75:%.*]] = insertelement <8 x i8> [[TMP70]], i8 [[TMP74]], i32 3 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP75:%.*]] = insertelement <8 x i8> [[TMP70]], i8 [[TMP74]], i64 3 ; DISABLED_MASKED_STRIDED-NEXT: br label [[PRED_LOAD_CONTINUE24]] ; DISABLED_MASKED_STRIDED: pred.load.continue24: ; DISABLED_MASKED_STRIDED-NEXT: [[TMP76:%.*]] = phi <8 x i8> [ [[TMP70]], [[PRED_LOAD_CONTINUE22]] ], [ [[TMP75]], [[PRED_LOAD_IF23]] ] -; DISABLED_MASKED_STRIDED-NEXT: [[TMP77:%.*]] = extractelement <8 x i1> [[TMP3]], i32 4 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP77:%.*]] = extractelement <8 x i1> [[TMP3]], i64 4 ; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP77]], label [[PRED_LOAD_IF25:%.*]], label [[PRED_LOAD_CONTINUE26:%.*]] ; DISABLED_MASKED_STRIDED: pred.load.if25: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP78:%.*]] = extractelement <8 x i32> [[TMP52]], i32 4 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP78:%.*]] = extractelement <8 x i32> [[TMP52]], i64 4 ; DISABLED_MASKED_STRIDED-NEXT: [[TMP79:%.*]] = getelementptr inbounds i8, i8* [[P]], i32 [[TMP78]] ; DISABLED_MASKED_STRIDED-NEXT: [[TMP80:%.*]] = load i8, i8* [[TMP79]], align 1 -; DISABLED_MASKED_STRIDED-NEXT: [[TMP81:%.*]] = insertelement <8 x i8> [[TMP76]], i8 [[TMP80]], i32 4 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP81:%.*]] = insertelement <8 x i8> [[TMP76]], i8 [[TMP80]], i64 4 ; DISABLED_MASKED_STRIDED-NEXT: br label [[PRED_LOAD_CONTINUE26]] ; DISABLED_MASKED_STRIDED: pred.load.continue26: ; DISABLED_MASKED_STRIDED-NEXT: [[TMP82:%.*]] = phi <8 x i8> [ [[TMP76]], [[PRED_LOAD_CONTINUE24]] ], [ [[TMP81]], [[PRED_LOAD_IF25]] ] -; DISABLED_MASKED_STRIDED-NEXT: [[TMP83:%.*]] = extractelement <8 x i1> [[TMP3]], i32 5 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP83:%.*]] = extractelement <8 x i1> [[TMP3]], i64 5 ; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP83]], label [[PRED_LOAD_IF27:%.*]], label [[PRED_LOAD_CONTINUE28:%.*]] ; DISABLED_MASKED_STRIDED: pred.load.if27: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP84:%.*]] = extractelement <8 x i32> [[TMP52]], i32 5 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP84:%.*]] = extractelement <8 x i32> [[TMP52]], i64 5 ; DISABLED_MASKED_STRIDED-NEXT: [[TMP85:%.*]] = getelementptr inbounds i8, i8* [[P]], i32 [[TMP84]] ; DISABLED_MASKED_STRIDED-NEXT: [[TMP86:%.*]] = load i8, i8* [[TMP85]], align 1 -; DISABLED_MASKED_STRIDED-NEXT: [[TMP87:%.*]] = insertelement <8 x i8> [[TMP82]], i8 [[TMP86]], i32 5 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP87:%.*]] = insertelement <8 x i8> [[TMP82]], i8 [[TMP86]], i64 5 ; DISABLED_MASKED_STRIDED-NEXT: br label [[PRED_LOAD_CONTINUE28]] ; DISABLED_MASKED_STRIDED: pred.load.continue28: ; DISABLED_MASKED_STRIDED-NEXT: [[TMP88:%.*]] = phi <8 x i8> [ [[TMP82]], [[PRED_LOAD_CONTINUE26]] ], [ [[TMP87]], [[PRED_LOAD_IF27]] ] -; DISABLED_MASKED_STRIDED-NEXT: [[TMP89:%.*]] = extractelement <8 x i1> [[TMP3]], i32 6 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP89:%.*]] = extractelement <8 x i1> [[TMP3]], i64 6 ; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP89]], label [[PRED_LOAD_IF29:%.*]], label [[PRED_LOAD_CONTINUE30:%.*]] ; DISABLED_MASKED_STRIDED: pred.load.if29: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP90:%.*]] = extractelement <8 x i32> [[TMP52]], i32 6 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP90:%.*]] = extractelement <8 x i32> [[TMP52]], i64 6 ; DISABLED_MASKED_STRIDED-NEXT: [[TMP91:%.*]] = getelementptr inbounds i8, i8* [[P]], i32 [[TMP90]] ; DISABLED_MASKED_STRIDED-NEXT: [[TMP92:%.*]] = load i8, i8* [[TMP91]], align 1 -; DISABLED_MASKED_STRIDED-NEXT: [[TMP93:%.*]] = insertelement <8 x i8> [[TMP88]], i8 [[TMP92]], i32 6 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP93:%.*]] = insertelement <8 x i8> [[TMP88]], i8 [[TMP92]], i64 6 ; DISABLED_MASKED_STRIDED-NEXT: br label [[PRED_LOAD_CONTINUE30]] ; DISABLED_MASKED_STRIDED: pred.load.continue30: ; DISABLED_MASKED_STRIDED-NEXT: [[TMP94:%.*]] = phi <8 x i8> [ [[TMP88]], [[PRED_LOAD_CONTINUE28]] ], [ [[TMP93]], [[PRED_LOAD_IF29]] ] -; DISABLED_MASKED_STRIDED-NEXT: [[TMP95:%.*]] = extractelement <8 x i1> [[TMP3]], i32 7 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP95:%.*]] = extractelement <8 x i1> [[TMP3]], i64 7 ; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP95]], label [[PRED_LOAD_IF31:%.*]], label [[PRED_LOAD_CONTINUE32:%.*]] ; DISABLED_MASKED_STRIDED: pred.load.if31: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP96:%.*]] = extractelement <8 x i32> [[TMP52]], i32 7 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP96:%.*]] = extractelement <8 x i32> [[TMP52]], i64 7 ; DISABLED_MASKED_STRIDED-NEXT: [[TMP97:%.*]] = getelementptr inbounds i8, i8* [[P]], i32 [[TMP96]] ; DISABLED_MASKED_STRIDED-NEXT: [[TMP98:%.*]] = load i8, i8* [[TMP97]], align 1 -; DISABLED_MASKED_STRIDED-NEXT: [[TMP99:%.*]] = insertelement <8 x i8> [[TMP94]], i8 [[TMP98]], i32 7 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP99:%.*]] = insertelement <8 x i8> [[TMP94]], i8 [[TMP98]], i64 7 ; DISABLED_MASKED_STRIDED-NEXT: br label [[PRED_LOAD_CONTINUE32]] ; DISABLED_MASKED_STRIDED: pred.load.continue32: ; DISABLED_MASKED_STRIDED-NEXT: [[TMP100:%.*]] = phi <8 x i8> [ [[TMP94]], [[PRED_LOAD_CONTINUE30]] ], [ [[TMP99]], [[PRED_LOAD_IF31]] ] ; DISABLED_MASKED_STRIDED-NEXT: [[TMP101:%.*]] = icmp slt <8 x i8> [[TMP51]], [[TMP100]] ; DISABLED_MASKED_STRIDED-NEXT: [[TMP102:%.*]] = select <8 x i1> [[TMP101]], <8 x i8> [[TMP100]], <8 x i8> [[TMP51]] -; DISABLED_MASKED_STRIDED-NEXT: [[TMP103:%.*]] = extractelement <8 x i1> [[TMP3]], i32 0 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP103:%.*]] = extractelement <8 x i1> [[TMP3]], i64 0 ; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP103]], label [[PRED_STORE_IF:%.*]], label [[PRED_STORE_CONTINUE:%.*]] ; DISABLED_MASKED_STRIDED: pred.store.if: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP104:%.*]] = extractelement <8 x i32> [[TMP2]], i32 0 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP104:%.*]] = extractelement <8 x i32> [[TMP2]], i64 0 ; DISABLED_MASKED_STRIDED-NEXT: [[TMP105:%.*]] = getelementptr inbounds i8, i8* [[Q:%.*]], i32 [[TMP104]] -; DISABLED_MASKED_STRIDED-NEXT: [[TMP106:%.*]] = extractelement <8 x i8> [[TMP102]], i32 0 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP106:%.*]] = extractelement <8 x i8> [[TMP102]], i64 0 ; DISABLED_MASKED_STRIDED-NEXT: store i8 [[TMP106]], i8* [[TMP105]], align 1 ; DISABLED_MASKED_STRIDED-NEXT: br label [[PRED_STORE_CONTINUE]] ; DISABLED_MASKED_STRIDED: pred.store.continue: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP107:%.*]] = extractelement <8 x i1> [[TMP3]], i32 1 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP107:%.*]] = extractelement <8 x i1> [[TMP3]], i64 1 ; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP107]], label [[PRED_STORE_IF33:%.*]], label [[PRED_STORE_CONTINUE34:%.*]] ; DISABLED_MASKED_STRIDED: pred.store.if33: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP108:%.*]] = extractelement <8 x i32> [[TMP2]], i32 1 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP108:%.*]] = extractelement <8 x i32> [[TMP2]], i64 1 ; DISABLED_MASKED_STRIDED-NEXT: [[TMP109:%.*]] = getelementptr inbounds i8, i8* [[Q]], i32 [[TMP108]] -; DISABLED_MASKED_STRIDED-NEXT: [[TMP110:%.*]] = extractelement <8 x i8> [[TMP102]], i32 1 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP110:%.*]] = extractelement <8 x i8> [[TMP102]], i64 1 ; DISABLED_MASKED_STRIDED-NEXT: store i8 [[TMP110]], i8* [[TMP109]], align 1 ; DISABLED_MASKED_STRIDED-NEXT: br label [[PRED_STORE_CONTINUE34]] ; DISABLED_MASKED_STRIDED: pred.store.continue34: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP111:%.*]] = extractelement <8 x i1> [[TMP3]], i32 2 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP111:%.*]] = extractelement <8 x i1> [[TMP3]], i64 2 ; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP111]], label [[PRED_STORE_IF35:%.*]], label [[PRED_STORE_CONTINUE36:%.*]] ; DISABLED_MASKED_STRIDED: pred.store.if35: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP112:%.*]] = extractelement <8 x i32> [[TMP2]], i32 2 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP112:%.*]] = extractelement <8 x i32> [[TMP2]], i64 2 ; DISABLED_MASKED_STRIDED-NEXT: [[TMP113:%.*]] = getelementptr inbounds i8, i8* [[Q]], i32 [[TMP112]] -; DISABLED_MASKED_STRIDED-NEXT: [[TMP114:%.*]] = extractelement <8 x i8> [[TMP102]], i32 2 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP114:%.*]] = extractelement <8 x i8> [[TMP102]], i64 2 ; DISABLED_MASKED_STRIDED-NEXT: store i8 [[TMP114]], i8* [[TMP113]], align 1 ; DISABLED_MASKED_STRIDED-NEXT: br label [[PRED_STORE_CONTINUE36]] ; DISABLED_MASKED_STRIDED: pred.store.continue36: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP115:%.*]] = extractelement <8 x i1> [[TMP3]], i32 3 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP115:%.*]] = extractelement <8 x i1> [[TMP3]], i64 3 ; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP115]], label [[PRED_STORE_IF37:%.*]], label [[PRED_STORE_CONTINUE38:%.*]] ; DISABLED_MASKED_STRIDED: pred.store.if37: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP116:%.*]] = extractelement <8 x i32> [[TMP2]], i32 3 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP116:%.*]] = extractelement <8 x i32> [[TMP2]], i64 3 ; DISABLED_MASKED_STRIDED-NEXT: [[TMP117:%.*]] = getelementptr inbounds i8, i8* [[Q]], i32 [[TMP116]] -; DISABLED_MASKED_STRIDED-NEXT: [[TMP118:%.*]] = extractelement <8 x i8> [[TMP102]], i32 3 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP118:%.*]] = extractelement <8 x i8> [[TMP102]], i64 3 ; DISABLED_MASKED_STRIDED-NEXT: store i8 [[TMP118]], i8* [[TMP117]], align 1 ; DISABLED_MASKED_STRIDED-NEXT: br label [[PRED_STORE_CONTINUE38]] ; DISABLED_MASKED_STRIDED: pred.store.continue38: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP119:%.*]] = extractelement <8 x i1> [[TMP3]], i32 4 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP119:%.*]] = extractelement <8 x i1> [[TMP3]], i64 4 ; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP119]], label [[PRED_STORE_IF39:%.*]], label [[PRED_STORE_CONTINUE40:%.*]] ; DISABLED_MASKED_STRIDED: pred.store.if39: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP120:%.*]] = extractelement <8 x i32> [[TMP2]], i32 4 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP120:%.*]] = extractelement <8 x i32> [[TMP2]], i64 4 ; DISABLED_MASKED_STRIDED-NEXT: [[TMP121:%.*]] = getelementptr inbounds i8, i8* [[Q]], i32 [[TMP120]] -; DISABLED_MASKED_STRIDED-NEXT: [[TMP122:%.*]] = extractelement <8 x i8> [[TMP102]], i32 4 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP122:%.*]] = extractelement <8 x i8> [[TMP102]], i64 4 ; DISABLED_MASKED_STRIDED-NEXT: store i8 [[TMP122]], i8* [[TMP121]], align 1 ; DISABLED_MASKED_STRIDED-NEXT: br label [[PRED_STORE_CONTINUE40]] ; DISABLED_MASKED_STRIDED: pred.store.continue40: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP123:%.*]] = extractelement <8 x i1> [[TMP3]], i32 5 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP123:%.*]] = extractelement <8 x i1> [[TMP3]], i64 5 ; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP123]], label [[PRED_STORE_IF41:%.*]], label [[PRED_STORE_CONTINUE42:%.*]] ; DISABLED_MASKED_STRIDED: pred.store.if41: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP124:%.*]] = extractelement <8 x i32> [[TMP2]], i32 5 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP124:%.*]] = extractelement <8 x i32> [[TMP2]], i64 5 ; DISABLED_MASKED_STRIDED-NEXT: [[TMP125:%.*]] = getelementptr inbounds i8, i8* [[Q]], i32 [[TMP124]] -; DISABLED_MASKED_STRIDED-NEXT: [[TMP126:%.*]] = extractelement <8 x i8> [[TMP102]], i32 5 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP126:%.*]] = extractelement <8 x i8> [[TMP102]], i64 5 ; DISABLED_MASKED_STRIDED-NEXT: store i8 [[TMP126]], i8* [[TMP125]], align 1 ; DISABLED_MASKED_STRIDED-NEXT: br label [[PRED_STORE_CONTINUE42]] ; DISABLED_MASKED_STRIDED: pred.store.continue42: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP127:%.*]] = extractelement <8 x i1> [[TMP3]], i32 6 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP127:%.*]] = extractelement <8 x i1> [[TMP3]], i64 6 ; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP127]], label [[PRED_STORE_IF43:%.*]], label [[PRED_STORE_CONTINUE44:%.*]] ; DISABLED_MASKED_STRIDED: pred.store.if43: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP128:%.*]] = extractelement <8 x i32> [[TMP2]], i32 6 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP128:%.*]] = extractelement <8 x i32> [[TMP2]], i64 6 ; DISABLED_MASKED_STRIDED-NEXT: [[TMP129:%.*]] = getelementptr inbounds i8, i8* [[Q]], i32 [[TMP128]] -; DISABLED_MASKED_STRIDED-NEXT: [[TMP130:%.*]] = extractelement <8 x i8> [[TMP102]], i32 6 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP130:%.*]] = extractelement <8 x i8> [[TMP102]], i64 6 ; DISABLED_MASKED_STRIDED-NEXT: store i8 [[TMP130]], i8* [[TMP129]], align 1 ; DISABLED_MASKED_STRIDED-NEXT: br label [[PRED_STORE_CONTINUE44]] ; DISABLED_MASKED_STRIDED: pred.store.continue44: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP131:%.*]] = extractelement <8 x i1> [[TMP3]], i32 7 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP131:%.*]] = extractelement <8 x i1> [[TMP3]], i64 7 ; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP131]], label [[PRED_STORE_IF45:%.*]], label [[PRED_STORE_CONTINUE46:%.*]] ; DISABLED_MASKED_STRIDED: pred.store.if45: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP132:%.*]] = extractelement <8 x i32> [[TMP2]], i32 7 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP132:%.*]] = extractelement <8 x i32> [[TMP2]], i64 7 ; DISABLED_MASKED_STRIDED-NEXT: [[TMP133:%.*]] = getelementptr inbounds i8, i8* [[Q]], i32 [[TMP132]] -; DISABLED_MASKED_STRIDED-NEXT: [[TMP134:%.*]] = extractelement <8 x i8> [[TMP102]], i32 7 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP134:%.*]] = extractelement <8 x i8> [[TMP102]], i64 7 ; DISABLED_MASKED_STRIDED-NEXT: store i8 [[TMP134]], i8* [[TMP133]], align 1 ; DISABLED_MASKED_STRIDED-NEXT: br label [[PRED_STORE_CONTINUE46]] ; DISABLED_MASKED_STRIDED: pred.store.continue46: ; DISABLED_MASKED_STRIDED-NEXT: [[TMP135:%.*]] = sub <8 x i8> zeroinitializer, [[TMP102]] -; DISABLED_MASKED_STRIDED-NEXT: [[TMP136:%.*]] = extractelement <8 x i1> [[TMP3]], i32 0 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP136:%.*]] = extractelement <8 x i1> [[TMP3]], i64 0 ; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP136]], label [[PRED_STORE_IF47:%.*]], label [[PRED_STORE_CONTINUE48:%.*]] ; DISABLED_MASKED_STRIDED: pred.store.if47: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP137:%.*]] = extractelement <8 x i32> [[TMP52]], i32 0 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP137:%.*]] = extractelement <8 x i32> [[TMP52]], i64 0 ; DISABLED_MASKED_STRIDED-NEXT: [[TMP138:%.*]] = getelementptr inbounds i8, i8* [[Q]], i32 [[TMP137]] -; DISABLED_MASKED_STRIDED-NEXT: [[TMP139:%.*]] = extractelement <8 x i8> [[TMP135]], i32 0 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP139:%.*]] = extractelement <8 x i8> [[TMP135]], i64 0 ; DISABLED_MASKED_STRIDED-NEXT: store i8 [[TMP139]], i8* [[TMP138]], align 1 ; DISABLED_MASKED_STRIDED-NEXT: br label [[PRED_STORE_CONTINUE48]] ; DISABLED_MASKED_STRIDED: pred.store.continue48: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP140:%.*]] = extractelement <8 x i1> [[TMP3]], i32 1 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP140:%.*]] = extractelement <8 x i1> [[TMP3]], i64 1 ; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP140]], label [[PRED_STORE_IF49:%.*]], label [[PRED_STORE_CONTINUE50:%.*]] ; DISABLED_MASKED_STRIDED: pred.store.if49: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP141:%.*]] = extractelement <8 x i32> [[TMP52]], i32 1 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP141:%.*]] = extractelement <8 x i32> [[TMP52]], i64 1 ; DISABLED_MASKED_STRIDED-NEXT: [[TMP142:%.*]] = getelementptr inbounds i8, i8* [[Q]], i32 [[TMP141]] -; DISABLED_MASKED_STRIDED-NEXT: [[TMP143:%.*]] = extractelement <8 x i8> [[TMP135]], i32 1 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP143:%.*]] = extractelement <8 x i8> [[TMP135]], i64 1 ; DISABLED_MASKED_STRIDED-NEXT: store i8 [[TMP143]], i8* [[TMP142]], align 1 ; DISABLED_MASKED_STRIDED-NEXT: br label [[PRED_STORE_CONTINUE50]] ; DISABLED_MASKED_STRIDED: pred.store.continue50: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP144:%.*]] = extractelement <8 x i1> [[TMP3]], i32 2 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP144:%.*]] = extractelement <8 x i1> [[TMP3]], i64 2 ; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP144]], label [[PRED_STORE_IF51:%.*]], label [[PRED_STORE_CONTINUE52:%.*]] ; DISABLED_MASKED_STRIDED: pred.store.if51: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP145:%.*]] = extractelement <8 x i32> [[TMP52]], i32 2 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP145:%.*]] = extractelement <8 x i32> [[TMP52]], i64 2 ; DISABLED_MASKED_STRIDED-NEXT: [[TMP146:%.*]] = getelementptr inbounds i8, i8* [[Q]], i32 [[TMP145]] -; DISABLED_MASKED_STRIDED-NEXT: [[TMP147:%.*]] = extractelement <8 x i8> [[TMP135]], i32 2 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP147:%.*]] = extractelement <8 x i8> [[TMP135]], i64 2 ; DISABLED_MASKED_STRIDED-NEXT: store i8 [[TMP147]], i8* [[TMP146]], align 1 ; DISABLED_MASKED_STRIDED-NEXT: br label [[PRED_STORE_CONTINUE52]] ; DISABLED_MASKED_STRIDED: pred.store.continue52: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP148:%.*]] = extractelement <8 x i1> [[TMP3]], i32 3 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP148:%.*]] = extractelement <8 x i1> [[TMP3]], i64 3 ; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP148]], label [[PRED_STORE_IF53:%.*]], label [[PRED_STORE_CONTINUE54:%.*]] ; DISABLED_MASKED_STRIDED: pred.store.if53: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP149:%.*]] = extractelement <8 x i32> [[TMP52]], i32 3 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP149:%.*]] = extractelement <8 x i32> [[TMP52]], i64 3 ; DISABLED_MASKED_STRIDED-NEXT: [[TMP150:%.*]] = getelementptr inbounds i8, i8* [[Q]], i32 [[TMP149]] -; DISABLED_MASKED_STRIDED-NEXT: [[TMP151:%.*]] = extractelement <8 x i8> [[TMP135]], i32 3 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP151:%.*]] = extractelement <8 x i8> [[TMP135]], i64 3 ; DISABLED_MASKED_STRIDED-NEXT: store i8 [[TMP151]], i8* [[TMP150]], align 1 ; DISABLED_MASKED_STRIDED-NEXT: br label [[PRED_STORE_CONTINUE54]] ; DISABLED_MASKED_STRIDED: pred.store.continue54: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP152:%.*]] = extractelement <8 x i1> [[TMP3]], i32 4 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP152:%.*]] = extractelement <8 x i1> [[TMP3]], i64 4 ; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP152]], label [[PRED_STORE_IF55:%.*]], label [[PRED_STORE_CONTINUE56:%.*]] ; DISABLED_MASKED_STRIDED: pred.store.if55: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP153:%.*]] = extractelement <8 x i32> [[TMP52]], i32 4 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP153:%.*]] = extractelement <8 x i32> [[TMP52]], i64 4 ; DISABLED_MASKED_STRIDED-NEXT: [[TMP154:%.*]] = getelementptr inbounds i8, i8* [[Q]], i32 [[TMP153]] -; DISABLED_MASKED_STRIDED-NEXT: [[TMP155:%.*]] = extractelement <8 x i8> [[TMP135]], i32 4 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP155:%.*]] = extractelement <8 x i8> [[TMP135]], i64 4 ; DISABLED_MASKED_STRIDED-NEXT: store i8 [[TMP155]], i8* [[TMP154]], align 1 ; DISABLED_MASKED_STRIDED-NEXT: br label [[PRED_STORE_CONTINUE56]] ; DISABLED_MASKED_STRIDED: pred.store.continue56: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP156:%.*]] = extractelement <8 x i1> [[TMP3]], i32 5 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP156:%.*]] = extractelement <8 x i1> [[TMP3]], i64 5 ; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP156]], label [[PRED_STORE_IF57:%.*]], label [[PRED_STORE_CONTINUE58:%.*]] ; DISABLED_MASKED_STRIDED: pred.store.if57: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP157:%.*]] = extractelement <8 x i32> [[TMP52]], i32 5 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP157:%.*]] = extractelement <8 x i32> [[TMP52]], i64 5 ; DISABLED_MASKED_STRIDED-NEXT: [[TMP158:%.*]] = getelementptr inbounds i8, i8* [[Q]], i32 [[TMP157]] -; DISABLED_MASKED_STRIDED-NEXT: [[TMP159:%.*]] = extractelement <8 x i8> [[TMP135]], i32 5 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP159:%.*]] = extractelement <8 x i8> [[TMP135]], i64 5 ; DISABLED_MASKED_STRIDED-NEXT: store i8 [[TMP159]], i8* [[TMP158]], align 1 ; DISABLED_MASKED_STRIDED-NEXT: br label [[PRED_STORE_CONTINUE58]] ; DISABLED_MASKED_STRIDED: pred.store.continue58: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP160:%.*]] = extractelement <8 x i1> [[TMP3]], i32 6 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP160:%.*]] = extractelement <8 x i1> [[TMP3]], i64 6 ; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP160]], label [[PRED_STORE_IF59:%.*]], label [[PRED_STORE_CONTINUE60:%.*]] ; DISABLED_MASKED_STRIDED: pred.store.if59: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP161:%.*]] = extractelement <8 x i32> [[TMP52]], i32 6 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP161:%.*]] = extractelement <8 x i32> [[TMP52]], i64 6 ; DISABLED_MASKED_STRIDED-NEXT: [[TMP162:%.*]] = getelementptr inbounds i8, i8* [[Q]], i32 [[TMP161]] -; DISABLED_MASKED_STRIDED-NEXT: [[TMP163:%.*]] = extractelement <8 x i8> [[TMP135]], i32 6 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP163:%.*]] = extractelement <8 x i8> [[TMP135]], i64 6 ; DISABLED_MASKED_STRIDED-NEXT: store i8 [[TMP163]], i8* [[TMP162]], align 1 ; DISABLED_MASKED_STRIDED-NEXT: br label [[PRED_STORE_CONTINUE60]] ; DISABLED_MASKED_STRIDED: pred.store.continue60: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP164:%.*]] = extractelement <8 x i1> [[TMP3]], i32 7 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP164:%.*]] = extractelement <8 x i1> [[TMP3]], i64 7 ; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP164]], label [[PRED_STORE_IF61:%.*]], label [[PRED_STORE_CONTINUE62]] ; DISABLED_MASKED_STRIDED: pred.store.if61: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP165:%.*]] = extractelement <8 x i32> [[TMP52]], i32 7 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP165:%.*]] = extractelement <8 x i32> [[TMP52]], i64 7 ; DISABLED_MASKED_STRIDED-NEXT: [[TMP166:%.*]] = getelementptr inbounds i8, i8* [[Q]], i32 [[TMP165]] -; DISABLED_MASKED_STRIDED-NEXT: [[TMP167:%.*]] = extractelement <8 x i8> [[TMP135]], i32 7 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP167:%.*]] = extractelement <8 x i8> [[TMP135]], i64 7 ; DISABLED_MASKED_STRIDED-NEXT: store i8 [[TMP167]], i8* [[TMP166]], align 1 ; DISABLED_MASKED_STRIDED-NEXT: br label [[PRED_STORE_CONTINUE62]] ; DISABLED_MASKED_STRIDED: pred.store.continue62: ; DISABLED_MASKED_STRIDED-NEXT: [[INDEX_NEXT]] = add i32 [[INDEX]], 8 ; DISABLED_MASKED_STRIDED-NEXT: [[VEC_IND_NEXT]] = add <8 x i32> [[VEC_IND]], ; DISABLED_MASKED_STRIDED-NEXT: [[TMP168:%.*]] = icmp eq i32 [[INDEX_NEXT]], [[N_VEC]] -; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP168]], label [[FOR_END]], label [[VECTOR_BODY]], !llvm.loop [[LOOP8:![0-9]+]] +; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP168]], label [[FOR_END]], label [[VECTOR_BODY]], !llvm.loop [[LOOP10:![0-9]+]] ; DISABLED_MASKED_STRIDED: for.end: ; DISABLED_MASKED_STRIDED-NEXT: ret void ; @@ -2609,9 +2627,9 @@ ; ENABLED_MASKED_STRIDED-NEXT: [[N_RND_UP:%.*]] = add i32 [[N]], 7 ; ENABLED_MASKED_STRIDED-NEXT: [[N_VEC:%.*]] = and i32 [[N_RND_UP]], -8 ; ENABLED_MASKED_STRIDED-NEXT: [[TRIP_COUNT_MINUS_1:%.*]] = add i32 [[N]], -1 -; ENABLED_MASKED_STRIDED-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <8 x i32> poison, i32 [[TRIP_COUNT_MINUS_1]], i32 0 +; ENABLED_MASKED_STRIDED-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <8 x i32> poison, i32 [[TRIP_COUNT_MINUS_1]], i64 0 ; ENABLED_MASKED_STRIDED-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector <8 x i32> [[BROADCAST_SPLATINSERT]], <8 x i32> poison, <8 x i32> zeroinitializer -; ENABLED_MASKED_STRIDED-NEXT: [[BROADCAST_SPLATINSERT1:%.*]] = insertelement <8 x i32> poison, i32 [[GUARD:%.*]], i32 0 +; ENABLED_MASKED_STRIDED-NEXT: [[BROADCAST_SPLATINSERT1:%.*]] = insertelement <8 x i32> poison, i32 [[GUARD:%.*]], i64 0 ; ENABLED_MASKED_STRIDED-NEXT: [[BROADCAST_SPLAT2:%.*]] = shufflevector <8 x i32> [[BROADCAST_SPLATINSERT1]], <8 x i32> poison, <8 x i32> zeroinitializer ; ENABLED_MASKED_STRIDED-NEXT: br label [[VECTOR_BODY:%.*]] ; ENABLED_MASKED_STRIDED: vector.body: @@ -2639,7 +2657,7 @@ ; ENABLED_MASKED_STRIDED-NEXT: [[INDEX_NEXT]] = add i32 [[INDEX]], 8 ; ENABLED_MASKED_STRIDED-NEXT: [[VEC_IND_NEXT]] = add <8 x i32> [[VEC_IND]], ; ENABLED_MASKED_STRIDED-NEXT: [[TMP13:%.*]] = icmp eq i32 [[INDEX_NEXT]], [[N_VEC]] -; ENABLED_MASKED_STRIDED-NEXT: br i1 [[TMP13]], label [[FOR_END]], label [[VECTOR_BODY]], !llvm.loop [[LOOP10:![0-9]+]] +; ENABLED_MASKED_STRIDED-NEXT: br i1 [[TMP13]], label [[FOR_END]], label [[VECTOR_BODY]], !llvm.loop [[LOOP12:![0-9]+]] ; ENABLED_MASKED_STRIDED: for.end: ; ENABLED_MASKED_STRIDED-NEXT: ret void ; @@ -2718,7 +2736,7 @@ ; DISABLED_MASKED_STRIDED-NEXT: [[N_RND_UP:%.*]] = add i32 [[N]], 7 ; DISABLED_MASKED_STRIDED-NEXT: [[N_VEC:%.*]] = and i32 [[N_RND_UP]], -8 ; DISABLED_MASKED_STRIDED-NEXT: [[TRIP_COUNT_MINUS_1:%.*]] = add i32 [[N]], -1 -; DISABLED_MASKED_STRIDED-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <8 x i32> poison, i32 [[TRIP_COUNT_MINUS_1]], i32 0 +; DISABLED_MASKED_STRIDED-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <8 x i32> poison, i32 [[TRIP_COUNT_MINUS_1]], i64 0 ; DISABLED_MASKED_STRIDED-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector <8 x i32> [[BROADCAST_SPLATINSERT]], <8 x i32> poison, <8 x i32> zeroinitializer ; DISABLED_MASKED_STRIDED-NEXT: br label [[VECTOR_BODY:%.*]] ; DISABLED_MASKED_STRIDED: vector.body: @@ -2726,318 +2744,318 @@ ; DISABLED_MASKED_STRIDED-NEXT: [[VEC_IND:%.*]] = phi <8 x i32> [ , [[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], [[PRED_STORE_CONTINUE60]] ] ; DISABLED_MASKED_STRIDED-NEXT: [[TMP0:%.*]] = icmp ule <8 x i32> [[VEC_IND]], [[BROADCAST_SPLAT]] ; DISABLED_MASKED_STRIDED-NEXT: [[TMP1:%.*]] = shl nuw nsw <8 x i32> [[VEC_IND]], -; DISABLED_MASKED_STRIDED-NEXT: [[TMP2:%.*]] = extractelement <8 x i1> [[TMP0]], i32 0 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP2:%.*]] = extractelement <8 x i1> [[TMP0]], i64 0 ; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP2]], label [[PRED_LOAD_IF:%.*]], label [[PRED_LOAD_CONTINUE:%.*]] ; DISABLED_MASKED_STRIDED: pred.load.if: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP3:%.*]] = extractelement <8 x i32> [[TMP1]], i32 0 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP3:%.*]] = extractelement <8 x i32> [[TMP1]], i64 0 ; DISABLED_MASKED_STRIDED-NEXT: [[TMP4:%.*]] = getelementptr inbounds i8, i8* [[P:%.*]], i32 [[TMP3]] ; DISABLED_MASKED_STRIDED-NEXT: [[TMP5:%.*]] = load i8, i8* [[TMP4]], align 1 -; DISABLED_MASKED_STRIDED-NEXT: [[TMP6:%.*]] = insertelement <8 x i8> poison, i8 [[TMP5]], i32 0 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP6:%.*]] = insertelement <8 x i8> poison, i8 [[TMP5]], i64 0 ; DISABLED_MASKED_STRIDED-NEXT: br label [[PRED_LOAD_CONTINUE]] ; DISABLED_MASKED_STRIDED: pred.load.continue: ; DISABLED_MASKED_STRIDED-NEXT: [[TMP7:%.*]] = phi <8 x i8> [ poison, [[VECTOR_BODY]] ], [ [[TMP6]], [[PRED_LOAD_IF]] ] -; DISABLED_MASKED_STRIDED-NEXT: [[TMP8:%.*]] = extractelement <8 x i1> [[TMP0]], i32 1 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP8:%.*]] = extractelement <8 x i1> [[TMP0]], i64 1 ; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP8]], label [[PRED_LOAD_IF1:%.*]], label [[PRED_LOAD_CONTINUE2:%.*]] ; DISABLED_MASKED_STRIDED: pred.load.if1: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP9:%.*]] = extractelement <8 x i32> [[TMP1]], i32 1 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP9:%.*]] = extractelement <8 x i32> [[TMP1]], i64 1 ; DISABLED_MASKED_STRIDED-NEXT: [[TMP10:%.*]] = getelementptr inbounds i8, i8* [[P]], i32 [[TMP9]] ; DISABLED_MASKED_STRIDED-NEXT: [[TMP11:%.*]] = load i8, i8* [[TMP10]], align 1 -; DISABLED_MASKED_STRIDED-NEXT: [[TMP12:%.*]] = insertelement <8 x i8> [[TMP7]], i8 [[TMP11]], i32 1 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP12:%.*]] = insertelement <8 x i8> [[TMP7]], i8 [[TMP11]], i64 1 ; DISABLED_MASKED_STRIDED-NEXT: br label [[PRED_LOAD_CONTINUE2]] ; DISABLED_MASKED_STRIDED: pred.load.continue2: ; DISABLED_MASKED_STRIDED-NEXT: [[TMP13:%.*]] = phi <8 x i8> [ [[TMP7]], [[PRED_LOAD_CONTINUE]] ], [ [[TMP12]], [[PRED_LOAD_IF1]] ] -; DISABLED_MASKED_STRIDED-NEXT: [[TMP14:%.*]] = extractelement <8 x i1> [[TMP0]], i32 2 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP14:%.*]] = extractelement <8 x i1> [[TMP0]], i64 2 ; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP14]], label [[PRED_LOAD_IF3:%.*]], label [[PRED_LOAD_CONTINUE4:%.*]] ; DISABLED_MASKED_STRIDED: pred.load.if3: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP15:%.*]] = extractelement <8 x i32> [[TMP1]], i32 2 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP15:%.*]] = extractelement <8 x i32> [[TMP1]], i64 2 ; DISABLED_MASKED_STRIDED-NEXT: [[TMP16:%.*]] = getelementptr inbounds i8, i8* [[P]], i32 [[TMP15]] ; DISABLED_MASKED_STRIDED-NEXT: [[TMP17:%.*]] = load i8, i8* [[TMP16]], align 1 -; DISABLED_MASKED_STRIDED-NEXT: [[TMP18:%.*]] = insertelement <8 x i8> [[TMP13]], i8 [[TMP17]], i32 2 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP18:%.*]] = insertelement <8 x i8> [[TMP13]], i8 [[TMP17]], i64 2 ; DISABLED_MASKED_STRIDED-NEXT: br label [[PRED_LOAD_CONTINUE4]] ; DISABLED_MASKED_STRIDED: pred.load.continue4: ; DISABLED_MASKED_STRIDED-NEXT: [[TMP19:%.*]] = phi <8 x i8> [ [[TMP13]], [[PRED_LOAD_CONTINUE2]] ], [ [[TMP18]], [[PRED_LOAD_IF3]] ] -; DISABLED_MASKED_STRIDED-NEXT: [[TMP20:%.*]] = extractelement <8 x i1> [[TMP0]], i32 3 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP20:%.*]] = extractelement <8 x i1> [[TMP0]], i64 3 ; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP20]], label [[PRED_LOAD_IF5:%.*]], label [[PRED_LOAD_CONTINUE6:%.*]] ; DISABLED_MASKED_STRIDED: pred.load.if5: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP21:%.*]] = extractelement <8 x i32> [[TMP1]], i32 3 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP21:%.*]] = extractelement <8 x i32> [[TMP1]], i64 3 ; DISABLED_MASKED_STRIDED-NEXT: [[TMP22:%.*]] = getelementptr inbounds i8, i8* [[P]], i32 [[TMP21]] ; DISABLED_MASKED_STRIDED-NEXT: [[TMP23:%.*]] = load i8, i8* [[TMP22]], align 1 -; DISABLED_MASKED_STRIDED-NEXT: [[TMP24:%.*]] = insertelement <8 x i8> [[TMP19]], i8 [[TMP23]], i32 3 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP24:%.*]] = insertelement <8 x i8> [[TMP19]], i8 [[TMP23]], i64 3 ; DISABLED_MASKED_STRIDED-NEXT: br label [[PRED_LOAD_CONTINUE6]] ; DISABLED_MASKED_STRIDED: pred.load.continue6: ; DISABLED_MASKED_STRIDED-NEXT: [[TMP25:%.*]] = phi <8 x i8> [ [[TMP19]], [[PRED_LOAD_CONTINUE4]] ], [ [[TMP24]], [[PRED_LOAD_IF5]] ] -; DISABLED_MASKED_STRIDED-NEXT: [[TMP26:%.*]] = extractelement <8 x i1> [[TMP0]], i32 4 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP26:%.*]] = extractelement <8 x i1> [[TMP0]], i64 4 ; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP26]], label [[PRED_LOAD_IF7:%.*]], label [[PRED_LOAD_CONTINUE8:%.*]] ; DISABLED_MASKED_STRIDED: pred.load.if7: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP27:%.*]] = extractelement <8 x i32> [[TMP1]], i32 4 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP27:%.*]] = extractelement <8 x i32> [[TMP1]], i64 4 ; DISABLED_MASKED_STRIDED-NEXT: [[TMP28:%.*]] = getelementptr inbounds i8, i8* [[P]], i32 [[TMP27]] ; DISABLED_MASKED_STRIDED-NEXT: [[TMP29:%.*]] = load i8, i8* [[TMP28]], align 1 -; DISABLED_MASKED_STRIDED-NEXT: [[TMP30:%.*]] = insertelement <8 x i8> [[TMP25]], i8 [[TMP29]], i32 4 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP30:%.*]] = insertelement <8 x i8> [[TMP25]], i8 [[TMP29]], i64 4 ; DISABLED_MASKED_STRIDED-NEXT: br label [[PRED_LOAD_CONTINUE8]] ; DISABLED_MASKED_STRIDED: pred.load.continue8: ; DISABLED_MASKED_STRIDED-NEXT: [[TMP31:%.*]] = phi <8 x i8> [ [[TMP25]], [[PRED_LOAD_CONTINUE6]] ], [ [[TMP30]], [[PRED_LOAD_IF7]] ] -; DISABLED_MASKED_STRIDED-NEXT: [[TMP32:%.*]] = extractelement <8 x i1> [[TMP0]], i32 5 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP32:%.*]] = extractelement <8 x i1> [[TMP0]], i64 5 ; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP32]], label [[PRED_LOAD_IF9:%.*]], label [[PRED_LOAD_CONTINUE10:%.*]] ; DISABLED_MASKED_STRIDED: pred.load.if9: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP33:%.*]] = extractelement <8 x i32> [[TMP1]], i32 5 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP33:%.*]] = extractelement <8 x i32> [[TMP1]], i64 5 ; DISABLED_MASKED_STRIDED-NEXT: [[TMP34:%.*]] = getelementptr inbounds i8, i8* [[P]], i32 [[TMP33]] ; DISABLED_MASKED_STRIDED-NEXT: [[TMP35:%.*]] = load i8, i8* [[TMP34]], align 1 -; DISABLED_MASKED_STRIDED-NEXT: [[TMP36:%.*]] = insertelement <8 x i8> [[TMP31]], i8 [[TMP35]], i32 5 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP36:%.*]] = insertelement <8 x i8> [[TMP31]], i8 [[TMP35]], i64 5 ; DISABLED_MASKED_STRIDED-NEXT: br label [[PRED_LOAD_CONTINUE10]] ; DISABLED_MASKED_STRIDED: pred.load.continue10: ; DISABLED_MASKED_STRIDED-NEXT: [[TMP37:%.*]] = phi <8 x i8> [ [[TMP31]], [[PRED_LOAD_CONTINUE8]] ], [ [[TMP36]], [[PRED_LOAD_IF9]] ] -; DISABLED_MASKED_STRIDED-NEXT: [[TMP38:%.*]] = extractelement <8 x i1> [[TMP0]], i32 6 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP38:%.*]] = extractelement <8 x i1> [[TMP0]], i64 6 ; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP38]], label [[PRED_LOAD_IF11:%.*]], label [[PRED_LOAD_CONTINUE12:%.*]] ; DISABLED_MASKED_STRIDED: pred.load.if11: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP39:%.*]] = extractelement <8 x i32> [[TMP1]], i32 6 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP39:%.*]] = extractelement <8 x i32> [[TMP1]], i64 6 ; DISABLED_MASKED_STRIDED-NEXT: [[TMP40:%.*]] = getelementptr inbounds i8, i8* [[P]], i32 [[TMP39]] ; DISABLED_MASKED_STRIDED-NEXT: [[TMP41:%.*]] = load i8, i8* [[TMP40]], align 1 -; DISABLED_MASKED_STRIDED-NEXT: [[TMP42:%.*]] = insertelement <8 x i8> [[TMP37]], i8 [[TMP41]], i32 6 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP42:%.*]] = insertelement <8 x i8> [[TMP37]], i8 [[TMP41]], i64 6 ; DISABLED_MASKED_STRIDED-NEXT: br label [[PRED_LOAD_CONTINUE12]] ; DISABLED_MASKED_STRIDED: pred.load.continue12: ; DISABLED_MASKED_STRIDED-NEXT: [[TMP43:%.*]] = phi <8 x i8> [ [[TMP37]], [[PRED_LOAD_CONTINUE10]] ], [ [[TMP42]], [[PRED_LOAD_IF11]] ] -; DISABLED_MASKED_STRIDED-NEXT: [[TMP44:%.*]] = extractelement <8 x i1> [[TMP0]], i32 7 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP44:%.*]] = extractelement <8 x i1> [[TMP0]], i64 7 ; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP44]], label [[PRED_LOAD_IF13:%.*]], label [[PRED_LOAD_CONTINUE14:%.*]] ; DISABLED_MASKED_STRIDED: pred.load.if13: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP45:%.*]] = extractelement <8 x i32> [[TMP1]], i32 7 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP45:%.*]] = extractelement <8 x i32> [[TMP1]], i64 7 ; DISABLED_MASKED_STRIDED-NEXT: [[TMP46:%.*]] = getelementptr inbounds i8, i8* [[P]], i32 [[TMP45]] ; DISABLED_MASKED_STRIDED-NEXT: [[TMP47:%.*]] = load i8, i8* [[TMP46]], align 1 -; DISABLED_MASKED_STRIDED-NEXT: [[TMP48:%.*]] = insertelement <8 x i8> [[TMP43]], i8 [[TMP47]], i32 7 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP48:%.*]] = insertelement <8 x i8> [[TMP43]], i8 [[TMP47]], i64 7 ; DISABLED_MASKED_STRIDED-NEXT: br label [[PRED_LOAD_CONTINUE14]] ; DISABLED_MASKED_STRIDED: pred.load.continue14: ; DISABLED_MASKED_STRIDED-NEXT: [[TMP49:%.*]] = phi <8 x i8> [ [[TMP43]], [[PRED_LOAD_CONTINUE12]] ], [ [[TMP48]], [[PRED_LOAD_IF13]] ] ; DISABLED_MASKED_STRIDED-NEXT: [[TMP50:%.*]] = or <8 x i32> [[TMP1]], -; DISABLED_MASKED_STRIDED-NEXT: [[TMP51:%.*]] = extractelement <8 x i1> [[TMP0]], i32 0 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP51:%.*]] = extractelement <8 x i1> [[TMP0]], i64 0 ; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP51]], label [[PRED_LOAD_IF15:%.*]], label [[PRED_LOAD_CONTINUE16:%.*]] ; DISABLED_MASKED_STRIDED: pred.load.if15: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP52:%.*]] = extractelement <8 x i32> [[TMP50]], i32 0 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP52:%.*]] = extractelement <8 x i32> [[TMP50]], i64 0 ; DISABLED_MASKED_STRIDED-NEXT: [[TMP53:%.*]] = getelementptr inbounds i8, i8* [[P]], i32 [[TMP52]] ; DISABLED_MASKED_STRIDED-NEXT: [[TMP54:%.*]] = load i8, i8* [[TMP53]], align 1 -; DISABLED_MASKED_STRIDED-NEXT: [[TMP55:%.*]] = insertelement <8 x i8> poison, i8 [[TMP54]], i32 0 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP55:%.*]] = insertelement <8 x i8> poison, i8 [[TMP54]], i64 0 ; DISABLED_MASKED_STRIDED-NEXT: br label [[PRED_LOAD_CONTINUE16]] ; DISABLED_MASKED_STRIDED: pred.load.continue16: ; DISABLED_MASKED_STRIDED-NEXT: [[TMP56:%.*]] = phi <8 x i8> [ poison, [[PRED_LOAD_CONTINUE14]] ], [ [[TMP55]], [[PRED_LOAD_IF15]] ] -; DISABLED_MASKED_STRIDED-NEXT: [[TMP57:%.*]] = extractelement <8 x i1> [[TMP0]], i32 1 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP57:%.*]] = extractelement <8 x i1> [[TMP0]], i64 1 ; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP57]], label [[PRED_LOAD_IF17:%.*]], label [[PRED_LOAD_CONTINUE18:%.*]] ; DISABLED_MASKED_STRIDED: pred.load.if17: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP58:%.*]] = extractelement <8 x i32> [[TMP50]], i32 1 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP58:%.*]] = extractelement <8 x i32> [[TMP50]], i64 1 ; DISABLED_MASKED_STRIDED-NEXT: [[TMP59:%.*]] = getelementptr inbounds i8, i8* [[P]], i32 [[TMP58]] ; DISABLED_MASKED_STRIDED-NEXT: [[TMP60:%.*]] = load i8, i8* [[TMP59]], align 1 -; DISABLED_MASKED_STRIDED-NEXT: [[TMP61:%.*]] = insertelement <8 x i8> [[TMP56]], i8 [[TMP60]], i32 1 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP61:%.*]] = insertelement <8 x i8> [[TMP56]], i8 [[TMP60]], i64 1 ; DISABLED_MASKED_STRIDED-NEXT: br label [[PRED_LOAD_CONTINUE18]] ; DISABLED_MASKED_STRIDED: pred.load.continue18: ; DISABLED_MASKED_STRIDED-NEXT: [[TMP62:%.*]] = phi <8 x i8> [ [[TMP56]], [[PRED_LOAD_CONTINUE16]] ], [ [[TMP61]], [[PRED_LOAD_IF17]] ] -; DISABLED_MASKED_STRIDED-NEXT: [[TMP63:%.*]] = extractelement <8 x i1> [[TMP0]], i32 2 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP63:%.*]] = extractelement <8 x i1> [[TMP0]], i64 2 ; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP63]], label [[PRED_LOAD_IF19:%.*]], label [[PRED_LOAD_CONTINUE20:%.*]] ; DISABLED_MASKED_STRIDED: pred.load.if19: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP64:%.*]] = extractelement <8 x i32> [[TMP50]], i32 2 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP64:%.*]] = extractelement <8 x i32> [[TMP50]], i64 2 ; DISABLED_MASKED_STRIDED-NEXT: [[TMP65:%.*]] = getelementptr inbounds i8, i8* [[P]], i32 [[TMP64]] ; DISABLED_MASKED_STRIDED-NEXT: [[TMP66:%.*]] = load i8, i8* [[TMP65]], align 1 -; DISABLED_MASKED_STRIDED-NEXT: [[TMP67:%.*]] = insertelement <8 x i8> [[TMP62]], i8 [[TMP66]], i32 2 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP67:%.*]] = insertelement <8 x i8> [[TMP62]], i8 [[TMP66]], i64 2 ; DISABLED_MASKED_STRIDED-NEXT: br label [[PRED_LOAD_CONTINUE20]] ; DISABLED_MASKED_STRIDED: pred.load.continue20: ; DISABLED_MASKED_STRIDED-NEXT: [[TMP68:%.*]] = phi <8 x i8> [ [[TMP62]], [[PRED_LOAD_CONTINUE18]] ], [ [[TMP67]], [[PRED_LOAD_IF19]] ] -; DISABLED_MASKED_STRIDED-NEXT: [[TMP69:%.*]] = extractelement <8 x i1> [[TMP0]], i32 3 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP69:%.*]] = extractelement <8 x i1> [[TMP0]], i64 3 ; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP69]], label [[PRED_LOAD_IF21:%.*]], label [[PRED_LOAD_CONTINUE22:%.*]] ; DISABLED_MASKED_STRIDED: pred.load.if21: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP70:%.*]] = extractelement <8 x i32> [[TMP50]], i32 3 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP70:%.*]] = extractelement <8 x i32> [[TMP50]], i64 3 ; DISABLED_MASKED_STRIDED-NEXT: [[TMP71:%.*]] = getelementptr inbounds i8, i8* [[P]], i32 [[TMP70]] ; DISABLED_MASKED_STRIDED-NEXT: [[TMP72:%.*]] = load i8, i8* [[TMP71]], align 1 -; DISABLED_MASKED_STRIDED-NEXT: [[TMP73:%.*]] = insertelement <8 x i8> [[TMP68]], i8 [[TMP72]], i32 3 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP73:%.*]] = insertelement <8 x i8> [[TMP68]], i8 [[TMP72]], i64 3 ; DISABLED_MASKED_STRIDED-NEXT: br label [[PRED_LOAD_CONTINUE22]] ; DISABLED_MASKED_STRIDED: pred.load.continue22: ; DISABLED_MASKED_STRIDED-NEXT: [[TMP74:%.*]] = phi <8 x i8> [ [[TMP68]], [[PRED_LOAD_CONTINUE20]] ], [ [[TMP73]], [[PRED_LOAD_IF21]] ] -; DISABLED_MASKED_STRIDED-NEXT: [[TMP75:%.*]] = extractelement <8 x i1> [[TMP0]], i32 4 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP75:%.*]] = extractelement <8 x i1> [[TMP0]], i64 4 ; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP75]], label [[PRED_LOAD_IF23:%.*]], label [[PRED_LOAD_CONTINUE24:%.*]] ; DISABLED_MASKED_STRIDED: pred.load.if23: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP76:%.*]] = extractelement <8 x i32> [[TMP50]], i32 4 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP76:%.*]] = extractelement <8 x i32> [[TMP50]], i64 4 ; DISABLED_MASKED_STRIDED-NEXT: [[TMP77:%.*]] = getelementptr inbounds i8, i8* [[P]], i32 [[TMP76]] ; DISABLED_MASKED_STRIDED-NEXT: [[TMP78:%.*]] = load i8, i8* [[TMP77]], align 1 -; DISABLED_MASKED_STRIDED-NEXT: [[TMP79:%.*]] = insertelement <8 x i8> [[TMP74]], i8 [[TMP78]], i32 4 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP79:%.*]] = insertelement <8 x i8> [[TMP74]], i8 [[TMP78]], i64 4 ; DISABLED_MASKED_STRIDED-NEXT: br label [[PRED_LOAD_CONTINUE24]] ; DISABLED_MASKED_STRIDED: pred.load.continue24: ; DISABLED_MASKED_STRIDED-NEXT: [[TMP80:%.*]] = phi <8 x i8> [ [[TMP74]], [[PRED_LOAD_CONTINUE22]] ], [ [[TMP79]], [[PRED_LOAD_IF23]] ] -; DISABLED_MASKED_STRIDED-NEXT: [[TMP81:%.*]] = extractelement <8 x i1> [[TMP0]], i32 5 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP81:%.*]] = extractelement <8 x i1> [[TMP0]], i64 5 ; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP81]], label [[PRED_LOAD_IF25:%.*]], label [[PRED_LOAD_CONTINUE26:%.*]] ; DISABLED_MASKED_STRIDED: pred.load.if25: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP82:%.*]] = extractelement <8 x i32> [[TMP50]], i32 5 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP82:%.*]] = extractelement <8 x i32> [[TMP50]], i64 5 ; DISABLED_MASKED_STRIDED-NEXT: [[TMP83:%.*]] = getelementptr inbounds i8, i8* [[P]], i32 [[TMP82]] ; DISABLED_MASKED_STRIDED-NEXT: [[TMP84:%.*]] = load i8, i8* [[TMP83]], align 1 -; DISABLED_MASKED_STRIDED-NEXT: [[TMP85:%.*]] = insertelement <8 x i8> [[TMP80]], i8 [[TMP84]], i32 5 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP85:%.*]] = insertelement <8 x i8> [[TMP80]], i8 [[TMP84]], i64 5 ; DISABLED_MASKED_STRIDED-NEXT: br label [[PRED_LOAD_CONTINUE26]] ; DISABLED_MASKED_STRIDED: pred.load.continue26: ; DISABLED_MASKED_STRIDED-NEXT: [[TMP86:%.*]] = phi <8 x i8> [ [[TMP80]], [[PRED_LOAD_CONTINUE24]] ], [ [[TMP85]], [[PRED_LOAD_IF25]] ] -; DISABLED_MASKED_STRIDED-NEXT: [[TMP87:%.*]] = extractelement <8 x i1> [[TMP0]], i32 6 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP87:%.*]] = extractelement <8 x i1> [[TMP0]], i64 6 ; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP87]], label [[PRED_LOAD_IF27:%.*]], label [[PRED_LOAD_CONTINUE28:%.*]] ; DISABLED_MASKED_STRIDED: pred.load.if27: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP88:%.*]] = extractelement <8 x i32> [[TMP50]], i32 6 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP88:%.*]] = extractelement <8 x i32> [[TMP50]], i64 6 ; DISABLED_MASKED_STRIDED-NEXT: [[TMP89:%.*]] = getelementptr inbounds i8, i8* [[P]], i32 [[TMP88]] ; DISABLED_MASKED_STRIDED-NEXT: [[TMP90:%.*]] = load i8, i8* [[TMP89]], align 1 -; DISABLED_MASKED_STRIDED-NEXT: [[TMP91:%.*]] = insertelement <8 x i8> [[TMP86]], i8 [[TMP90]], i32 6 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP91:%.*]] = insertelement <8 x i8> [[TMP86]], i8 [[TMP90]], i64 6 ; DISABLED_MASKED_STRIDED-NEXT: br label [[PRED_LOAD_CONTINUE28]] ; DISABLED_MASKED_STRIDED: pred.load.continue28: ; DISABLED_MASKED_STRIDED-NEXT: [[TMP92:%.*]] = phi <8 x i8> [ [[TMP86]], [[PRED_LOAD_CONTINUE26]] ], [ [[TMP91]], [[PRED_LOAD_IF27]] ] -; DISABLED_MASKED_STRIDED-NEXT: [[TMP93:%.*]] = extractelement <8 x i1> [[TMP0]], i32 7 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP93:%.*]] = extractelement <8 x i1> [[TMP0]], i64 7 ; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP93]], label [[PRED_LOAD_IF29:%.*]], label [[PRED_LOAD_CONTINUE30:%.*]] ; DISABLED_MASKED_STRIDED: pred.load.if29: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP94:%.*]] = extractelement <8 x i32> [[TMP50]], i32 7 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP94:%.*]] = extractelement <8 x i32> [[TMP50]], i64 7 ; DISABLED_MASKED_STRIDED-NEXT: [[TMP95:%.*]] = getelementptr inbounds i8, i8* [[P]], i32 [[TMP94]] ; DISABLED_MASKED_STRIDED-NEXT: [[TMP96:%.*]] = load i8, i8* [[TMP95]], align 1 -; DISABLED_MASKED_STRIDED-NEXT: [[TMP97:%.*]] = insertelement <8 x i8> [[TMP92]], i8 [[TMP96]], i32 7 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP97:%.*]] = insertelement <8 x i8> [[TMP92]], i8 [[TMP96]], i64 7 ; DISABLED_MASKED_STRIDED-NEXT: br label [[PRED_LOAD_CONTINUE30]] ; DISABLED_MASKED_STRIDED: pred.load.continue30: ; DISABLED_MASKED_STRIDED-NEXT: [[TMP98:%.*]] = phi <8 x i8> [ [[TMP92]], [[PRED_LOAD_CONTINUE28]] ], [ [[TMP97]], [[PRED_LOAD_IF29]] ] ; DISABLED_MASKED_STRIDED-NEXT: [[TMP99:%.*]] = icmp slt <8 x i8> [[TMP49]], [[TMP98]] ; DISABLED_MASKED_STRIDED-NEXT: [[TMP100:%.*]] = select <8 x i1> [[TMP99]], <8 x i8> [[TMP98]], <8 x i8> [[TMP49]] -; DISABLED_MASKED_STRIDED-NEXT: [[TMP101:%.*]] = extractelement <8 x i1> [[TMP0]], i32 0 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP101:%.*]] = extractelement <8 x i1> [[TMP0]], i64 0 ; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP101]], label [[PRED_STORE_IF:%.*]], label [[PRED_STORE_CONTINUE:%.*]] ; DISABLED_MASKED_STRIDED: pred.store.if: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP102:%.*]] = extractelement <8 x i32> [[TMP1]], i32 0 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP102:%.*]] = extractelement <8 x i32> [[TMP1]], i64 0 ; DISABLED_MASKED_STRIDED-NEXT: [[TMP103:%.*]] = getelementptr inbounds i8, i8* [[Q:%.*]], i32 [[TMP102]] -; DISABLED_MASKED_STRIDED-NEXT: [[TMP104:%.*]] = extractelement <8 x i8> [[TMP100]], i32 0 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP104:%.*]] = extractelement <8 x i8> [[TMP100]], i64 0 ; DISABLED_MASKED_STRIDED-NEXT: store i8 [[TMP104]], i8* [[TMP103]], align 1 ; DISABLED_MASKED_STRIDED-NEXT: br label [[PRED_STORE_CONTINUE]] ; DISABLED_MASKED_STRIDED: pred.store.continue: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP105:%.*]] = extractelement <8 x i1> [[TMP0]], i32 1 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP105:%.*]] = extractelement <8 x i1> [[TMP0]], i64 1 ; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP105]], label [[PRED_STORE_IF31:%.*]], label [[PRED_STORE_CONTINUE32:%.*]] ; DISABLED_MASKED_STRIDED: pred.store.if31: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP106:%.*]] = extractelement <8 x i32> [[TMP1]], i32 1 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP106:%.*]] = extractelement <8 x i32> [[TMP1]], i64 1 ; DISABLED_MASKED_STRIDED-NEXT: [[TMP107:%.*]] = getelementptr inbounds i8, i8* [[Q]], i32 [[TMP106]] -; DISABLED_MASKED_STRIDED-NEXT: [[TMP108:%.*]] = extractelement <8 x i8> [[TMP100]], i32 1 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP108:%.*]] = extractelement <8 x i8> [[TMP100]], i64 1 ; DISABLED_MASKED_STRIDED-NEXT: store i8 [[TMP108]], i8* [[TMP107]], align 1 ; DISABLED_MASKED_STRIDED-NEXT: br label [[PRED_STORE_CONTINUE32]] ; DISABLED_MASKED_STRIDED: pred.store.continue32: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP109:%.*]] = extractelement <8 x i1> [[TMP0]], i32 2 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP109:%.*]] = extractelement <8 x i1> [[TMP0]], i64 2 ; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP109]], label [[PRED_STORE_IF33:%.*]], label [[PRED_STORE_CONTINUE34:%.*]] ; DISABLED_MASKED_STRIDED: pred.store.if33: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP110:%.*]] = extractelement <8 x i32> [[TMP1]], i32 2 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP110:%.*]] = extractelement <8 x i32> [[TMP1]], i64 2 ; DISABLED_MASKED_STRIDED-NEXT: [[TMP111:%.*]] = getelementptr inbounds i8, i8* [[Q]], i32 [[TMP110]] -; DISABLED_MASKED_STRIDED-NEXT: [[TMP112:%.*]] = extractelement <8 x i8> [[TMP100]], i32 2 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP112:%.*]] = extractelement <8 x i8> [[TMP100]], i64 2 ; DISABLED_MASKED_STRIDED-NEXT: store i8 [[TMP112]], i8* [[TMP111]], align 1 ; DISABLED_MASKED_STRIDED-NEXT: br label [[PRED_STORE_CONTINUE34]] ; DISABLED_MASKED_STRIDED: pred.store.continue34: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP113:%.*]] = extractelement <8 x i1> [[TMP0]], i32 3 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP113:%.*]] = extractelement <8 x i1> [[TMP0]], i64 3 ; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP113]], label [[PRED_STORE_IF35:%.*]], label [[PRED_STORE_CONTINUE36:%.*]] ; DISABLED_MASKED_STRIDED: pred.store.if35: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP114:%.*]] = extractelement <8 x i32> [[TMP1]], i32 3 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP114:%.*]] = extractelement <8 x i32> [[TMP1]], i64 3 ; DISABLED_MASKED_STRIDED-NEXT: [[TMP115:%.*]] = getelementptr inbounds i8, i8* [[Q]], i32 [[TMP114]] -; DISABLED_MASKED_STRIDED-NEXT: [[TMP116:%.*]] = extractelement <8 x i8> [[TMP100]], i32 3 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP116:%.*]] = extractelement <8 x i8> [[TMP100]], i64 3 ; DISABLED_MASKED_STRIDED-NEXT: store i8 [[TMP116]], i8* [[TMP115]], align 1 ; DISABLED_MASKED_STRIDED-NEXT: br label [[PRED_STORE_CONTINUE36]] ; DISABLED_MASKED_STRIDED: pred.store.continue36: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP117:%.*]] = extractelement <8 x i1> [[TMP0]], i32 4 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP117:%.*]] = extractelement <8 x i1> [[TMP0]], i64 4 ; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP117]], label [[PRED_STORE_IF37:%.*]], label [[PRED_STORE_CONTINUE38:%.*]] ; DISABLED_MASKED_STRIDED: pred.store.if37: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP118:%.*]] = extractelement <8 x i32> [[TMP1]], i32 4 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP118:%.*]] = extractelement <8 x i32> [[TMP1]], i64 4 ; DISABLED_MASKED_STRIDED-NEXT: [[TMP119:%.*]] = getelementptr inbounds i8, i8* [[Q]], i32 [[TMP118]] -; DISABLED_MASKED_STRIDED-NEXT: [[TMP120:%.*]] = extractelement <8 x i8> [[TMP100]], i32 4 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP120:%.*]] = extractelement <8 x i8> [[TMP100]], i64 4 ; DISABLED_MASKED_STRIDED-NEXT: store i8 [[TMP120]], i8* [[TMP119]], align 1 ; DISABLED_MASKED_STRIDED-NEXT: br label [[PRED_STORE_CONTINUE38]] ; DISABLED_MASKED_STRIDED: pred.store.continue38: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP121:%.*]] = extractelement <8 x i1> [[TMP0]], i32 5 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP121:%.*]] = extractelement <8 x i1> [[TMP0]], i64 5 ; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP121]], label [[PRED_STORE_IF39:%.*]], label [[PRED_STORE_CONTINUE40:%.*]] ; DISABLED_MASKED_STRIDED: pred.store.if39: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP122:%.*]] = extractelement <8 x i32> [[TMP1]], i32 5 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP122:%.*]] = extractelement <8 x i32> [[TMP1]], i64 5 ; DISABLED_MASKED_STRIDED-NEXT: [[TMP123:%.*]] = getelementptr inbounds i8, i8* [[Q]], i32 [[TMP122]] -; DISABLED_MASKED_STRIDED-NEXT: [[TMP124:%.*]] = extractelement <8 x i8> [[TMP100]], i32 5 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP124:%.*]] = extractelement <8 x i8> [[TMP100]], i64 5 ; DISABLED_MASKED_STRIDED-NEXT: store i8 [[TMP124]], i8* [[TMP123]], align 1 ; DISABLED_MASKED_STRIDED-NEXT: br label [[PRED_STORE_CONTINUE40]] ; DISABLED_MASKED_STRIDED: pred.store.continue40: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP125:%.*]] = extractelement <8 x i1> [[TMP0]], i32 6 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP125:%.*]] = extractelement <8 x i1> [[TMP0]], i64 6 ; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP125]], label [[PRED_STORE_IF41:%.*]], label [[PRED_STORE_CONTINUE42:%.*]] ; DISABLED_MASKED_STRIDED: pred.store.if41: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP126:%.*]] = extractelement <8 x i32> [[TMP1]], i32 6 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP126:%.*]] = extractelement <8 x i32> [[TMP1]], i64 6 ; DISABLED_MASKED_STRIDED-NEXT: [[TMP127:%.*]] = getelementptr inbounds i8, i8* [[Q]], i32 [[TMP126]] -; DISABLED_MASKED_STRIDED-NEXT: [[TMP128:%.*]] = extractelement <8 x i8> [[TMP100]], i32 6 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP128:%.*]] = extractelement <8 x i8> [[TMP100]], i64 6 ; DISABLED_MASKED_STRIDED-NEXT: store i8 [[TMP128]], i8* [[TMP127]], align 1 ; DISABLED_MASKED_STRIDED-NEXT: br label [[PRED_STORE_CONTINUE42]] ; DISABLED_MASKED_STRIDED: pred.store.continue42: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP129:%.*]] = extractelement <8 x i1> [[TMP0]], i32 7 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP129:%.*]] = extractelement <8 x i1> [[TMP0]], i64 7 ; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP129]], label [[PRED_STORE_IF43:%.*]], label [[PRED_STORE_CONTINUE44:%.*]] ; DISABLED_MASKED_STRIDED: pred.store.if43: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP130:%.*]] = extractelement <8 x i32> [[TMP1]], i32 7 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP130:%.*]] = extractelement <8 x i32> [[TMP1]], i64 7 ; DISABLED_MASKED_STRIDED-NEXT: [[TMP131:%.*]] = getelementptr inbounds i8, i8* [[Q]], i32 [[TMP130]] -; DISABLED_MASKED_STRIDED-NEXT: [[TMP132:%.*]] = extractelement <8 x i8> [[TMP100]], i32 7 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP132:%.*]] = extractelement <8 x i8> [[TMP100]], i64 7 ; DISABLED_MASKED_STRIDED-NEXT: store i8 [[TMP132]], i8* [[TMP131]], align 1 ; DISABLED_MASKED_STRIDED-NEXT: br label [[PRED_STORE_CONTINUE44]] ; DISABLED_MASKED_STRIDED: pred.store.continue44: ; DISABLED_MASKED_STRIDED-NEXT: [[TMP133:%.*]] = sub <8 x i8> zeroinitializer, [[TMP100]] -; DISABLED_MASKED_STRIDED-NEXT: [[TMP134:%.*]] = extractelement <8 x i1> [[TMP0]], i32 0 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP134:%.*]] = extractelement <8 x i1> [[TMP0]], i64 0 ; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP134]], label [[PRED_STORE_IF45:%.*]], label [[PRED_STORE_CONTINUE46:%.*]] ; DISABLED_MASKED_STRIDED: pred.store.if45: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP135:%.*]] = extractelement <8 x i32> [[TMP50]], i32 0 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP135:%.*]] = extractelement <8 x i32> [[TMP50]], i64 0 ; DISABLED_MASKED_STRIDED-NEXT: [[TMP136:%.*]] = getelementptr inbounds i8, i8* [[Q]], i32 [[TMP135]] -; DISABLED_MASKED_STRIDED-NEXT: [[TMP137:%.*]] = extractelement <8 x i8> [[TMP133]], i32 0 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP137:%.*]] = extractelement <8 x i8> [[TMP133]], i64 0 ; DISABLED_MASKED_STRIDED-NEXT: store i8 [[TMP137]], i8* [[TMP136]], align 1 ; DISABLED_MASKED_STRIDED-NEXT: br label [[PRED_STORE_CONTINUE46]] ; DISABLED_MASKED_STRIDED: pred.store.continue46: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP138:%.*]] = extractelement <8 x i1> [[TMP0]], i32 1 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP138:%.*]] = extractelement <8 x i1> [[TMP0]], i64 1 ; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP138]], label [[PRED_STORE_IF47:%.*]], label [[PRED_STORE_CONTINUE48:%.*]] ; DISABLED_MASKED_STRIDED: pred.store.if47: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP139:%.*]] = extractelement <8 x i32> [[TMP50]], i32 1 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP139:%.*]] = extractelement <8 x i32> [[TMP50]], i64 1 ; DISABLED_MASKED_STRIDED-NEXT: [[TMP140:%.*]] = getelementptr inbounds i8, i8* [[Q]], i32 [[TMP139]] -; DISABLED_MASKED_STRIDED-NEXT: [[TMP141:%.*]] = extractelement <8 x i8> [[TMP133]], i32 1 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP141:%.*]] = extractelement <8 x i8> [[TMP133]], i64 1 ; DISABLED_MASKED_STRIDED-NEXT: store i8 [[TMP141]], i8* [[TMP140]], align 1 ; DISABLED_MASKED_STRIDED-NEXT: br label [[PRED_STORE_CONTINUE48]] ; DISABLED_MASKED_STRIDED: pred.store.continue48: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP142:%.*]] = extractelement <8 x i1> [[TMP0]], i32 2 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP142:%.*]] = extractelement <8 x i1> [[TMP0]], i64 2 ; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP142]], label [[PRED_STORE_IF49:%.*]], label [[PRED_STORE_CONTINUE50:%.*]] ; DISABLED_MASKED_STRIDED: pred.store.if49: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP143:%.*]] = extractelement <8 x i32> [[TMP50]], i32 2 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP143:%.*]] = extractelement <8 x i32> [[TMP50]], i64 2 ; DISABLED_MASKED_STRIDED-NEXT: [[TMP144:%.*]] = getelementptr inbounds i8, i8* [[Q]], i32 [[TMP143]] -; DISABLED_MASKED_STRIDED-NEXT: [[TMP145:%.*]] = extractelement <8 x i8> [[TMP133]], i32 2 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP145:%.*]] = extractelement <8 x i8> [[TMP133]], i64 2 ; DISABLED_MASKED_STRIDED-NEXT: store i8 [[TMP145]], i8* [[TMP144]], align 1 ; DISABLED_MASKED_STRIDED-NEXT: br label [[PRED_STORE_CONTINUE50]] ; DISABLED_MASKED_STRIDED: pred.store.continue50: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP146:%.*]] = extractelement <8 x i1> [[TMP0]], i32 3 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP146:%.*]] = extractelement <8 x i1> [[TMP0]], i64 3 ; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP146]], label [[PRED_STORE_IF51:%.*]], label [[PRED_STORE_CONTINUE52:%.*]] ; DISABLED_MASKED_STRIDED: pred.store.if51: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP147:%.*]] = extractelement <8 x i32> [[TMP50]], i32 3 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP147:%.*]] = extractelement <8 x i32> [[TMP50]], i64 3 ; DISABLED_MASKED_STRIDED-NEXT: [[TMP148:%.*]] = getelementptr inbounds i8, i8* [[Q]], i32 [[TMP147]] -; DISABLED_MASKED_STRIDED-NEXT: [[TMP149:%.*]] = extractelement <8 x i8> [[TMP133]], i32 3 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP149:%.*]] = extractelement <8 x i8> [[TMP133]], i64 3 ; DISABLED_MASKED_STRIDED-NEXT: store i8 [[TMP149]], i8* [[TMP148]], align 1 ; DISABLED_MASKED_STRIDED-NEXT: br label [[PRED_STORE_CONTINUE52]] ; DISABLED_MASKED_STRIDED: pred.store.continue52: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP150:%.*]] = extractelement <8 x i1> [[TMP0]], i32 4 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP150:%.*]] = extractelement <8 x i1> [[TMP0]], i64 4 ; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP150]], label [[PRED_STORE_IF53:%.*]], label [[PRED_STORE_CONTINUE54:%.*]] ; DISABLED_MASKED_STRIDED: pred.store.if53: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP151:%.*]] = extractelement <8 x i32> [[TMP50]], i32 4 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP151:%.*]] = extractelement <8 x i32> [[TMP50]], i64 4 ; DISABLED_MASKED_STRIDED-NEXT: [[TMP152:%.*]] = getelementptr inbounds i8, i8* [[Q]], i32 [[TMP151]] -; DISABLED_MASKED_STRIDED-NEXT: [[TMP153:%.*]] = extractelement <8 x i8> [[TMP133]], i32 4 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP153:%.*]] = extractelement <8 x i8> [[TMP133]], i64 4 ; DISABLED_MASKED_STRIDED-NEXT: store i8 [[TMP153]], i8* [[TMP152]], align 1 ; DISABLED_MASKED_STRIDED-NEXT: br label [[PRED_STORE_CONTINUE54]] ; DISABLED_MASKED_STRIDED: pred.store.continue54: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP154:%.*]] = extractelement <8 x i1> [[TMP0]], i32 5 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP154:%.*]] = extractelement <8 x i1> [[TMP0]], i64 5 ; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP154]], label [[PRED_STORE_IF55:%.*]], label [[PRED_STORE_CONTINUE56:%.*]] ; DISABLED_MASKED_STRIDED: pred.store.if55: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP155:%.*]] = extractelement <8 x i32> [[TMP50]], i32 5 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP155:%.*]] = extractelement <8 x i32> [[TMP50]], i64 5 ; DISABLED_MASKED_STRIDED-NEXT: [[TMP156:%.*]] = getelementptr inbounds i8, i8* [[Q]], i32 [[TMP155]] -; DISABLED_MASKED_STRIDED-NEXT: [[TMP157:%.*]] = extractelement <8 x i8> [[TMP133]], i32 5 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP157:%.*]] = extractelement <8 x i8> [[TMP133]], i64 5 ; DISABLED_MASKED_STRIDED-NEXT: store i8 [[TMP157]], i8* [[TMP156]], align 1 ; DISABLED_MASKED_STRIDED-NEXT: br label [[PRED_STORE_CONTINUE56]] ; DISABLED_MASKED_STRIDED: pred.store.continue56: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP158:%.*]] = extractelement <8 x i1> [[TMP0]], i32 6 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP158:%.*]] = extractelement <8 x i1> [[TMP0]], i64 6 ; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP158]], label [[PRED_STORE_IF57:%.*]], label [[PRED_STORE_CONTINUE58:%.*]] ; DISABLED_MASKED_STRIDED: pred.store.if57: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP159:%.*]] = extractelement <8 x i32> [[TMP50]], i32 6 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP159:%.*]] = extractelement <8 x i32> [[TMP50]], i64 6 ; DISABLED_MASKED_STRIDED-NEXT: [[TMP160:%.*]] = getelementptr inbounds i8, i8* [[Q]], i32 [[TMP159]] -; DISABLED_MASKED_STRIDED-NEXT: [[TMP161:%.*]] = extractelement <8 x i8> [[TMP133]], i32 6 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP161:%.*]] = extractelement <8 x i8> [[TMP133]], i64 6 ; DISABLED_MASKED_STRIDED-NEXT: store i8 [[TMP161]], i8* [[TMP160]], align 1 ; DISABLED_MASKED_STRIDED-NEXT: br label [[PRED_STORE_CONTINUE58]] ; DISABLED_MASKED_STRIDED: pred.store.continue58: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP162:%.*]] = extractelement <8 x i1> [[TMP0]], i32 7 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP162:%.*]] = extractelement <8 x i1> [[TMP0]], i64 7 ; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP162]], label [[PRED_STORE_IF59:%.*]], label [[PRED_STORE_CONTINUE60]] ; DISABLED_MASKED_STRIDED: pred.store.if59: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP163:%.*]] = extractelement <8 x i32> [[TMP50]], i32 7 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP163:%.*]] = extractelement <8 x i32> [[TMP50]], i64 7 ; DISABLED_MASKED_STRIDED-NEXT: [[TMP164:%.*]] = getelementptr inbounds i8, i8* [[Q]], i32 [[TMP163]] -; DISABLED_MASKED_STRIDED-NEXT: [[TMP165:%.*]] = extractelement <8 x i8> [[TMP133]], i32 7 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP165:%.*]] = extractelement <8 x i8> [[TMP133]], i64 7 ; DISABLED_MASKED_STRIDED-NEXT: store i8 [[TMP165]], i8* [[TMP164]], align 1 ; DISABLED_MASKED_STRIDED-NEXT: br label [[PRED_STORE_CONTINUE60]] ; DISABLED_MASKED_STRIDED: pred.store.continue60: ; DISABLED_MASKED_STRIDED-NEXT: [[INDEX_NEXT]] = add i32 [[INDEX]], 8 ; DISABLED_MASKED_STRIDED-NEXT: [[VEC_IND_NEXT]] = add <8 x i32> [[VEC_IND]], ; DISABLED_MASKED_STRIDED-NEXT: [[TMP166:%.*]] = icmp eq i32 [[INDEX_NEXT]], [[N_VEC]] -; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP166]], label [[FOR_END]], label [[VECTOR_BODY]], !llvm.loop [[LOOP9:![0-9]+]] +; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP166]], label [[FOR_END]], label [[VECTOR_BODY]], !llvm.loop [[LOOP11:![0-9]+]] ; DISABLED_MASKED_STRIDED: for.end: ; DISABLED_MASKED_STRIDED-NEXT: ret void ; @@ -3049,12 +3067,12 @@ ; ENABLED_MASKED_STRIDED-NEXT: [[N_RND_UP:%.*]] = add i32 [[N]], 7 ; ENABLED_MASKED_STRIDED-NEXT: [[N_VEC:%.*]] = and i32 [[N_RND_UP]], -8 ; ENABLED_MASKED_STRIDED-NEXT: [[TRIP_COUNT_MINUS_1:%.*]] = add i32 [[N]], -1 -; ENABLED_MASKED_STRIDED-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <8 x i32> poison, i32 [[TRIP_COUNT_MINUS_1]], i32 0 +; ENABLED_MASKED_STRIDED-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <8 x i32> poison, i32 [[TRIP_COUNT_MINUS_1]], i64 0 ; ENABLED_MASKED_STRIDED-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector <8 x i32> [[BROADCAST_SPLATINSERT]], <8 x i32> poison, <8 x i32> zeroinitializer ; ENABLED_MASKED_STRIDED-NEXT: br label [[VECTOR_BODY:%.*]] ; ENABLED_MASKED_STRIDED: vector.body: ; ENABLED_MASKED_STRIDED-NEXT: [[INDEX:%.*]] = phi i32 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ] -; ENABLED_MASKED_STRIDED-NEXT: [[BROADCAST_SPLATINSERT1:%.*]] = insertelement <8 x i32> poison, i32 [[INDEX]], i32 0 +; ENABLED_MASKED_STRIDED-NEXT: [[BROADCAST_SPLATINSERT1:%.*]] = insertelement <8 x i32> poison, i32 [[INDEX]], i64 0 ; ENABLED_MASKED_STRIDED-NEXT: [[BROADCAST_SPLAT2:%.*]] = shufflevector <8 x i32> [[BROADCAST_SPLATINSERT1]], <8 x i32> poison, <8 x i32> zeroinitializer ; ENABLED_MASKED_STRIDED-NEXT: [[INDUCTION:%.*]] = or <8 x i32> [[BROADCAST_SPLAT2]], ; ENABLED_MASKED_STRIDED-NEXT: [[TMP0:%.*]] = icmp ule <8 x i32> [[INDUCTION]], [[BROADCAST_SPLAT]] @@ -3076,7 +3094,7 @@ ; ENABLED_MASKED_STRIDED-NEXT: call void @llvm.masked.store.v16i8.p0v16i8(<16 x i8> [[INTERLEAVED_VEC]], <16 x i8>* [[TMP10]], i32 1, <16 x i1> [[INTERLEAVED_MASK]]) ; ENABLED_MASKED_STRIDED-NEXT: [[INDEX_NEXT]] = add i32 [[INDEX]], 8 ; ENABLED_MASKED_STRIDED-NEXT: [[TMP11:%.*]] = icmp eq i32 [[INDEX_NEXT]], [[N_VEC]] -; ENABLED_MASKED_STRIDED-NEXT: br i1 [[TMP11]], label [[FOR_END]], label [[VECTOR_BODY]], !llvm.loop [[LOOP11:![0-9]+]] +; ENABLED_MASKED_STRIDED-NEXT: br i1 [[TMP11]], label [[FOR_END]], label [[VECTOR_BODY]], !llvm.loop [[LOOP13:![0-9]+]] ; ENABLED_MASKED_STRIDED: for.end: ; ENABLED_MASKED_STRIDED-NEXT: ret void ; diff --git a/llvm/test/Transforms/LoopVectorize/X86/x86-interleaved-store-accesses-with-gaps.ll b/llvm/test/Transforms/LoopVectorize/X86/x86-interleaved-store-accesses-with-gaps.ll --- a/llvm/test/Transforms/LoopVectorize/X86/x86-interleaved-store-accesses-with-gaps.ll +++ b/llvm/test/Transforms/LoopVectorize/X86/x86-interleaved-store-accesses-with-gaps.ll @@ -29,41 +29,41 @@ ; DISABLED_MASKED_STRIDED-NEXT: [[TMP1:%.*]] = bitcast i16* [[TMP0]] to <4 x i16>* ; DISABLED_MASKED_STRIDED-NEXT: [[WIDE_LOAD:%.*]] = load <4 x i16>, <4 x i16>* [[TMP1]], align 2 ; DISABLED_MASKED_STRIDED-NEXT: [[TMP2:%.*]] = shl nuw nsw <4 x i64> [[VEC_IND]], -; DISABLED_MASKED_STRIDED-NEXT: [[TMP3:%.*]] = extractelement <4 x i64> [[TMP2]], i32 0 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP3:%.*]] = extractelement <4 x i64> [[TMP2]], i64 0 ; DISABLED_MASKED_STRIDED-NEXT: [[TMP4:%.*]] = getelementptr inbounds i16, i16* [[POINTS:%.*]], i64 [[TMP3]] -; DISABLED_MASKED_STRIDED-NEXT: [[TMP5:%.*]] = extractelement <4 x i64> [[TMP2]], i32 1 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP5:%.*]] = extractelement <4 x i64> [[TMP2]], i64 1 ; DISABLED_MASKED_STRIDED-NEXT: [[TMP6:%.*]] = getelementptr inbounds i16, i16* [[POINTS]], i64 [[TMP5]] -; DISABLED_MASKED_STRIDED-NEXT: [[TMP7:%.*]] = extractelement <4 x i64> [[TMP2]], i32 2 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP7:%.*]] = extractelement <4 x i64> [[TMP2]], i64 2 ; DISABLED_MASKED_STRIDED-NEXT: [[TMP8:%.*]] = getelementptr inbounds i16, i16* [[POINTS]], i64 [[TMP7]] -; DISABLED_MASKED_STRIDED-NEXT: [[TMP9:%.*]] = extractelement <4 x i64> [[TMP2]], i32 3 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP9:%.*]] = extractelement <4 x i64> [[TMP2]], i64 3 ; DISABLED_MASKED_STRIDED-NEXT: [[TMP10:%.*]] = getelementptr inbounds i16, i16* [[POINTS]], i64 [[TMP9]] -; DISABLED_MASKED_STRIDED-NEXT: [[TMP11:%.*]] = extractelement <4 x i16> [[WIDE_LOAD]], i32 0 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP11:%.*]] = extractelement <4 x i16> [[WIDE_LOAD]], i64 0 ; DISABLED_MASKED_STRIDED-NEXT: store i16 [[TMP11]], i16* [[TMP4]], align 2 -; DISABLED_MASKED_STRIDED-NEXT: [[TMP12:%.*]] = extractelement <4 x i16> [[WIDE_LOAD]], i32 1 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP12:%.*]] = extractelement <4 x i16> [[WIDE_LOAD]], i64 1 ; DISABLED_MASKED_STRIDED-NEXT: store i16 [[TMP12]], i16* [[TMP6]], align 2 -; DISABLED_MASKED_STRIDED-NEXT: [[TMP13:%.*]] = extractelement <4 x i16> [[WIDE_LOAD]], i32 2 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP13:%.*]] = extractelement <4 x i16> [[WIDE_LOAD]], i64 2 ; DISABLED_MASKED_STRIDED-NEXT: store i16 [[TMP13]], i16* [[TMP8]], align 2 -; DISABLED_MASKED_STRIDED-NEXT: [[TMP14:%.*]] = extractelement <4 x i16> [[WIDE_LOAD]], i32 3 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP14:%.*]] = extractelement <4 x i16> [[WIDE_LOAD]], i64 3 ; DISABLED_MASKED_STRIDED-NEXT: store i16 [[TMP14]], i16* [[TMP10]], align 2 ; DISABLED_MASKED_STRIDED-NEXT: [[TMP15:%.*]] = getelementptr inbounds i16, i16* [[Y:%.*]], i64 [[INDEX]] ; DISABLED_MASKED_STRIDED-NEXT: [[TMP16:%.*]] = bitcast i16* [[TMP15]] to <4 x i16>* ; DISABLED_MASKED_STRIDED-NEXT: [[WIDE_LOAD1:%.*]] = load <4 x i16>, <4 x i16>* [[TMP16]], align 2 ; DISABLED_MASKED_STRIDED-NEXT: [[TMP17:%.*]] = or <4 x i64> [[TMP2]], -; DISABLED_MASKED_STRIDED-NEXT: [[TMP18:%.*]] = extractelement <4 x i64> [[TMP17]], i32 0 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP18:%.*]] = extractelement <4 x i64> [[TMP17]], i64 0 ; DISABLED_MASKED_STRIDED-NEXT: [[TMP19:%.*]] = getelementptr inbounds i16, i16* [[POINTS]], i64 [[TMP18]] -; DISABLED_MASKED_STRIDED-NEXT: [[TMP20:%.*]] = extractelement <4 x i64> [[TMP17]], i32 1 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP20:%.*]] = extractelement <4 x i64> [[TMP17]], i64 1 ; DISABLED_MASKED_STRIDED-NEXT: [[TMP21:%.*]] = getelementptr inbounds i16, i16* [[POINTS]], i64 [[TMP20]] -; DISABLED_MASKED_STRIDED-NEXT: [[TMP22:%.*]] = extractelement <4 x i64> [[TMP17]], i32 2 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP22:%.*]] = extractelement <4 x i64> [[TMP17]], i64 2 ; DISABLED_MASKED_STRIDED-NEXT: [[TMP23:%.*]] = getelementptr inbounds i16, i16* [[POINTS]], i64 [[TMP22]] -; DISABLED_MASKED_STRIDED-NEXT: [[TMP24:%.*]] = extractelement <4 x i64> [[TMP17]], i32 3 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP24:%.*]] = extractelement <4 x i64> [[TMP17]], i64 3 ; DISABLED_MASKED_STRIDED-NEXT: [[TMP25:%.*]] = getelementptr inbounds i16, i16* [[POINTS]], i64 [[TMP24]] -; DISABLED_MASKED_STRIDED-NEXT: [[TMP26:%.*]] = extractelement <4 x i16> [[WIDE_LOAD1]], i32 0 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP26:%.*]] = extractelement <4 x i16> [[WIDE_LOAD1]], i64 0 ; DISABLED_MASKED_STRIDED-NEXT: store i16 [[TMP26]], i16* [[TMP19]], align 2 -; DISABLED_MASKED_STRIDED-NEXT: [[TMP27:%.*]] = extractelement <4 x i16> [[WIDE_LOAD1]], i32 1 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP27:%.*]] = extractelement <4 x i16> [[WIDE_LOAD1]], i64 1 ; DISABLED_MASKED_STRIDED-NEXT: store i16 [[TMP27]], i16* [[TMP21]], align 2 -; DISABLED_MASKED_STRIDED-NEXT: [[TMP28:%.*]] = extractelement <4 x i16> [[WIDE_LOAD1]], i32 2 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP28:%.*]] = extractelement <4 x i16> [[WIDE_LOAD1]], i64 2 ; DISABLED_MASKED_STRIDED-NEXT: store i16 [[TMP28]], i16* [[TMP23]], align 2 -; DISABLED_MASKED_STRIDED-NEXT: [[TMP29:%.*]] = extractelement <4 x i16> [[WIDE_LOAD1]], i32 3 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP29:%.*]] = extractelement <4 x i16> [[WIDE_LOAD1]], i64 3 ; DISABLED_MASKED_STRIDED-NEXT: store i16 [[TMP29]], i16* [[TMP25]], align 2 ; DISABLED_MASKED_STRIDED-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4 ; DISABLED_MASKED_STRIDED-NEXT: [[VEC_IND_NEXT]] = add <4 x i64> [[VEC_IND]], @@ -139,7 +139,7 @@ ; DISABLED_MASKED_STRIDED-NEXT: [[N_RND_UP:%.*]] = add nuw nsw i64 [[WIDE_TRIP_COUNT]], 3 ; DISABLED_MASKED_STRIDED-NEXT: [[N_VEC:%.*]] = and i64 [[N_RND_UP]], 8589934588 ; DISABLED_MASKED_STRIDED-NEXT: [[TRIP_COUNT_MINUS_1:%.*]] = add nsw i64 [[WIDE_TRIP_COUNT]], -1 -; DISABLED_MASKED_STRIDED-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <4 x i64> poison, i64 [[TRIP_COUNT_MINUS_1]], i32 0 +; DISABLED_MASKED_STRIDED-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <4 x i64> poison, i64 [[TRIP_COUNT_MINUS_1]], i64 0 ; DISABLED_MASKED_STRIDED-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector <4 x i64> [[BROADCAST_SPLATINSERT]], <4 x i64> poison, <4 x i32> zeroinitializer ; DISABLED_MASKED_STRIDED-NEXT: br label [[VECTOR_BODY:%.*]] ; DISABLED_MASKED_STRIDED: vector.body: @@ -150,39 +150,39 @@ ; DISABLED_MASKED_STRIDED-NEXT: [[TMP2:%.*]] = bitcast i16* [[TMP1]] to <4 x i16>* ; DISABLED_MASKED_STRIDED-NEXT: [[WIDE_MASKED_LOAD:%.*]] = call <4 x i16> @llvm.masked.load.v4i16.p0v4i16(<4 x i16>* [[TMP2]], i32 2, <4 x i1> [[TMP0]], <4 x i16> poison) ; DISABLED_MASKED_STRIDED-NEXT: [[TMP3:%.*]] = shl nsw <4 x i64> [[VEC_IND]], -; DISABLED_MASKED_STRIDED-NEXT: [[TMP4:%.*]] = extractelement <4 x i1> [[TMP0]], i32 0 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP4:%.*]] = extractelement <4 x i1> [[TMP0]], i64 0 ; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP4]], label [[PRED_STORE_IF:%.*]], label [[PRED_STORE_CONTINUE:%.*]] ; DISABLED_MASKED_STRIDED: pred.store.if: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP5:%.*]] = extractelement <4 x i64> [[TMP3]], i32 0 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP5:%.*]] = extractelement <4 x i64> [[TMP3]], i64 0 ; DISABLED_MASKED_STRIDED-NEXT: [[TMP6:%.*]] = getelementptr inbounds i16, i16* [[POINTS:%.*]], i64 [[TMP5]] -; DISABLED_MASKED_STRIDED-NEXT: [[TMP7:%.*]] = extractelement <4 x i16> [[WIDE_MASKED_LOAD]], i32 0 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP7:%.*]] = extractelement <4 x i16> [[WIDE_MASKED_LOAD]], i64 0 ; DISABLED_MASKED_STRIDED-NEXT: store i16 [[TMP7]], i16* [[TMP6]], align 2 ; DISABLED_MASKED_STRIDED-NEXT: br label [[PRED_STORE_CONTINUE]] ; DISABLED_MASKED_STRIDED: pred.store.continue: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP8:%.*]] = extractelement <4 x i1> [[TMP0]], i32 1 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP8:%.*]] = extractelement <4 x i1> [[TMP0]], i64 1 ; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP8]], label [[PRED_STORE_IF1:%.*]], label [[PRED_STORE_CONTINUE2:%.*]] ; DISABLED_MASKED_STRIDED: pred.store.if1: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP9:%.*]] = extractelement <4 x i64> [[TMP3]], i32 1 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP9:%.*]] = extractelement <4 x i64> [[TMP3]], i64 1 ; DISABLED_MASKED_STRIDED-NEXT: [[TMP10:%.*]] = getelementptr inbounds i16, i16* [[POINTS]], i64 [[TMP9]] -; DISABLED_MASKED_STRIDED-NEXT: [[TMP11:%.*]] = extractelement <4 x i16> [[WIDE_MASKED_LOAD]], i32 1 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP11:%.*]] = extractelement <4 x i16> [[WIDE_MASKED_LOAD]], i64 1 ; DISABLED_MASKED_STRIDED-NEXT: store i16 [[TMP11]], i16* [[TMP10]], align 2 ; DISABLED_MASKED_STRIDED-NEXT: br label [[PRED_STORE_CONTINUE2]] ; DISABLED_MASKED_STRIDED: pred.store.continue2: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP12:%.*]] = extractelement <4 x i1> [[TMP0]], i32 2 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP12:%.*]] = extractelement <4 x i1> [[TMP0]], i64 2 ; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP12]], label [[PRED_STORE_IF3:%.*]], label [[PRED_STORE_CONTINUE4:%.*]] ; DISABLED_MASKED_STRIDED: pred.store.if3: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP13:%.*]] = extractelement <4 x i64> [[TMP3]], i32 2 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP13:%.*]] = extractelement <4 x i64> [[TMP3]], i64 2 ; DISABLED_MASKED_STRIDED-NEXT: [[TMP14:%.*]] = getelementptr inbounds i16, i16* [[POINTS]], i64 [[TMP13]] -; DISABLED_MASKED_STRIDED-NEXT: [[TMP15:%.*]] = extractelement <4 x i16> [[WIDE_MASKED_LOAD]], i32 2 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP15:%.*]] = extractelement <4 x i16> [[WIDE_MASKED_LOAD]], i64 2 ; DISABLED_MASKED_STRIDED-NEXT: store i16 [[TMP15]], i16* [[TMP14]], align 2 ; DISABLED_MASKED_STRIDED-NEXT: br label [[PRED_STORE_CONTINUE4]] ; DISABLED_MASKED_STRIDED: pred.store.continue4: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP16:%.*]] = extractelement <4 x i1> [[TMP0]], i32 3 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP16:%.*]] = extractelement <4 x i1> [[TMP0]], i64 3 ; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP16]], label [[PRED_STORE_IF5:%.*]], label [[PRED_STORE_CONTINUE6:%.*]] ; DISABLED_MASKED_STRIDED: pred.store.if5: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP17:%.*]] = extractelement <4 x i64> [[TMP3]], i32 3 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP17:%.*]] = extractelement <4 x i64> [[TMP3]], i64 3 ; DISABLED_MASKED_STRIDED-NEXT: [[TMP18:%.*]] = getelementptr inbounds i16, i16* [[POINTS]], i64 [[TMP17]] -; DISABLED_MASKED_STRIDED-NEXT: [[TMP19:%.*]] = extractelement <4 x i16> [[WIDE_MASKED_LOAD]], i32 3 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP19:%.*]] = extractelement <4 x i16> [[WIDE_MASKED_LOAD]], i64 3 ; DISABLED_MASKED_STRIDED-NEXT: store i16 [[TMP19]], i16* [[TMP18]], align 2 ; DISABLED_MASKED_STRIDED-NEXT: br label [[PRED_STORE_CONTINUE6]] ; DISABLED_MASKED_STRIDED: pred.store.continue6: @@ -190,39 +190,39 @@ ; DISABLED_MASKED_STRIDED-NEXT: [[TMP21:%.*]] = bitcast i16* [[TMP20]] to <4 x i16>* ; DISABLED_MASKED_STRIDED-NEXT: [[WIDE_MASKED_LOAD7:%.*]] = call <4 x i16> @llvm.masked.load.v4i16.p0v4i16(<4 x i16>* [[TMP21]], i32 2, <4 x i1> [[TMP0]], <4 x i16> poison) ; DISABLED_MASKED_STRIDED-NEXT: [[TMP22:%.*]] = or <4 x i64> [[TMP3]], -; DISABLED_MASKED_STRIDED-NEXT: [[TMP23:%.*]] = extractelement <4 x i1> [[TMP0]], i32 0 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP23:%.*]] = extractelement <4 x i1> [[TMP0]], i64 0 ; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP23]], label [[PRED_STORE_IF8:%.*]], label [[PRED_STORE_CONTINUE9:%.*]] ; DISABLED_MASKED_STRIDED: pred.store.if8: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP24:%.*]] = extractelement <4 x i64> [[TMP22]], i32 0 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP24:%.*]] = extractelement <4 x i64> [[TMP22]], i64 0 ; DISABLED_MASKED_STRIDED-NEXT: [[TMP25:%.*]] = getelementptr inbounds i16, i16* [[POINTS]], i64 [[TMP24]] -; DISABLED_MASKED_STRIDED-NEXT: [[TMP26:%.*]] = extractelement <4 x i16> [[WIDE_MASKED_LOAD7]], i32 0 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP26:%.*]] = extractelement <4 x i16> [[WIDE_MASKED_LOAD7]], i64 0 ; DISABLED_MASKED_STRIDED-NEXT: store i16 [[TMP26]], i16* [[TMP25]], align 2 ; DISABLED_MASKED_STRIDED-NEXT: br label [[PRED_STORE_CONTINUE9]] ; DISABLED_MASKED_STRIDED: pred.store.continue9: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP27:%.*]] = extractelement <4 x i1> [[TMP0]], i32 1 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP27:%.*]] = extractelement <4 x i1> [[TMP0]], i64 1 ; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP27]], label [[PRED_STORE_IF10:%.*]], label [[PRED_STORE_CONTINUE11:%.*]] ; DISABLED_MASKED_STRIDED: pred.store.if10: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP28:%.*]] = extractelement <4 x i64> [[TMP22]], i32 1 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP28:%.*]] = extractelement <4 x i64> [[TMP22]], i64 1 ; DISABLED_MASKED_STRIDED-NEXT: [[TMP29:%.*]] = getelementptr inbounds i16, i16* [[POINTS]], i64 [[TMP28]] -; DISABLED_MASKED_STRIDED-NEXT: [[TMP30:%.*]] = extractelement <4 x i16> [[WIDE_MASKED_LOAD7]], i32 1 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP30:%.*]] = extractelement <4 x i16> [[WIDE_MASKED_LOAD7]], i64 1 ; DISABLED_MASKED_STRIDED-NEXT: store i16 [[TMP30]], i16* [[TMP29]], align 2 ; DISABLED_MASKED_STRIDED-NEXT: br label [[PRED_STORE_CONTINUE11]] ; DISABLED_MASKED_STRIDED: pred.store.continue11: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP31:%.*]] = extractelement <4 x i1> [[TMP0]], i32 2 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP31:%.*]] = extractelement <4 x i1> [[TMP0]], i64 2 ; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP31]], label [[PRED_STORE_IF12:%.*]], label [[PRED_STORE_CONTINUE13:%.*]] ; DISABLED_MASKED_STRIDED: pred.store.if12: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP32:%.*]] = extractelement <4 x i64> [[TMP22]], i32 2 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP32:%.*]] = extractelement <4 x i64> [[TMP22]], i64 2 ; DISABLED_MASKED_STRIDED-NEXT: [[TMP33:%.*]] = getelementptr inbounds i16, i16* [[POINTS]], i64 [[TMP32]] -; DISABLED_MASKED_STRIDED-NEXT: [[TMP34:%.*]] = extractelement <4 x i16> [[WIDE_MASKED_LOAD7]], i32 2 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP34:%.*]] = extractelement <4 x i16> [[WIDE_MASKED_LOAD7]], i64 2 ; DISABLED_MASKED_STRIDED-NEXT: store i16 [[TMP34]], i16* [[TMP33]], align 2 ; DISABLED_MASKED_STRIDED-NEXT: br label [[PRED_STORE_CONTINUE13]] ; DISABLED_MASKED_STRIDED: pred.store.continue13: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP35:%.*]] = extractelement <4 x i1> [[TMP0]], i32 3 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP35:%.*]] = extractelement <4 x i1> [[TMP0]], i64 3 ; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP35]], label [[PRED_STORE_IF14:%.*]], label [[PRED_STORE_CONTINUE15]] ; DISABLED_MASKED_STRIDED: pred.store.if14: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP36:%.*]] = extractelement <4 x i64> [[TMP22]], i32 3 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP36:%.*]] = extractelement <4 x i64> [[TMP22]], i64 3 ; DISABLED_MASKED_STRIDED-NEXT: [[TMP37:%.*]] = getelementptr inbounds i16, i16* [[POINTS]], i64 [[TMP36]] -; DISABLED_MASKED_STRIDED-NEXT: [[TMP38:%.*]] = extractelement <4 x i16> [[WIDE_MASKED_LOAD7]], i32 3 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP38:%.*]] = extractelement <4 x i16> [[WIDE_MASKED_LOAD7]], i64 3 ; DISABLED_MASKED_STRIDED-NEXT: store i16 [[TMP38]], i16* [[TMP37]], align 2 ; DISABLED_MASKED_STRIDED-NEXT: br label [[PRED_STORE_CONTINUE15]] ; DISABLED_MASKED_STRIDED: pred.store.continue15: @@ -244,13 +244,13 @@ ; ENABLED_MASKED_STRIDED-NEXT: [[N_RND_UP:%.*]] = add nuw nsw i64 [[WIDE_TRIP_COUNT]], 3 ; ENABLED_MASKED_STRIDED-NEXT: [[N_VEC:%.*]] = and i64 [[N_RND_UP]], 8589934588 ; ENABLED_MASKED_STRIDED-NEXT: [[TRIP_COUNT_MINUS_1:%.*]] = add nsw i64 [[WIDE_TRIP_COUNT]], -1 -; ENABLED_MASKED_STRIDED-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <4 x i64> poison, i64 [[TRIP_COUNT_MINUS_1]], i32 0 +; ENABLED_MASKED_STRIDED-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <4 x i64> poison, i64 [[TRIP_COUNT_MINUS_1]], i64 0 ; ENABLED_MASKED_STRIDED-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector <4 x i64> [[BROADCAST_SPLATINSERT]], <4 x i64> poison, <4 x i32> zeroinitializer ; ENABLED_MASKED_STRIDED-NEXT: [[TMP0:%.*]] = getelementptr inbounds i16, i16* [[POINTS:%.*]], i64 -1 ; ENABLED_MASKED_STRIDED-NEXT: br label [[VECTOR_BODY:%.*]] ; ENABLED_MASKED_STRIDED: vector.body: ; ENABLED_MASKED_STRIDED-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[FOR_BODY_PREHEADER]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ] -; ENABLED_MASKED_STRIDED-NEXT: [[BROADCAST_SPLATINSERT1:%.*]] = insertelement <4 x i64> poison, i64 [[INDEX]], i32 0 +; ENABLED_MASKED_STRIDED-NEXT: [[BROADCAST_SPLATINSERT1:%.*]] = insertelement <4 x i64> poison, i64 [[INDEX]], i64 0 ; ENABLED_MASKED_STRIDED-NEXT: [[BROADCAST_SPLAT2:%.*]] = shufflevector <4 x i64> [[BROADCAST_SPLATINSERT1]], <4 x i64> poison, <4 x i32> zeroinitializer ; ENABLED_MASKED_STRIDED-NEXT: [[INDUCTION:%.*]] = or <4 x i64> [[BROADCAST_SPLAT2]], ; ENABLED_MASKED_STRIDED-NEXT: [[TMP1:%.*]] = icmp ule <4 x i64> [[INDUCTION]], [[BROADCAST_SPLAT]] @@ -330,39 +330,39 @@ ; DISABLED_MASKED_STRIDED-NEXT: [[WIDE_LOAD:%.*]] = load <4 x i16>, <4 x i16>* [[TMP1]], align 2 ; DISABLED_MASKED_STRIDED-NEXT: [[TMP2:%.*]] = icmp sgt <4 x i16> [[WIDE_LOAD]], zeroinitializer ; DISABLED_MASKED_STRIDED-NEXT: [[TMP3:%.*]] = mul nuw nsw <4 x i64> [[VEC_IND]], -; DISABLED_MASKED_STRIDED-NEXT: [[TMP4:%.*]] = extractelement <4 x i1> [[TMP2]], i32 0 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP4:%.*]] = extractelement <4 x i1> [[TMP2]], i64 0 ; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP4]], label [[PRED_STORE_IF:%.*]], label [[PRED_STORE_CONTINUE:%.*]] ; DISABLED_MASKED_STRIDED: pred.store.if: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP5:%.*]] = extractelement <4 x i64> [[TMP3]], i32 0 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP5:%.*]] = extractelement <4 x i64> [[TMP3]], i64 0 ; DISABLED_MASKED_STRIDED-NEXT: [[TMP6:%.*]] = getelementptr inbounds i16, i16* [[POINTS:%.*]], i64 [[TMP5]] -; DISABLED_MASKED_STRIDED-NEXT: [[TMP7:%.*]] = extractelement <4 x i16> [[WIDE_LOAD]], i32 0 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP7:%.*]] = extractelement <4 x i16> [[WIDE_LOAD]], i64 0 ; DISABLED_MASKED_STRIDED-NEXT: store i16 [[TMP7]], i16* [[TMP6]], align 2 ; DISABLED_MASKED_STRIDED-NEXT: br label [[PRED_STORE_CONTINUE]] ; DISABLED_MASKED_STRIDED: pred.store.continue: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP8:%.*]] = extractelement <4 x i1> [[TMP2]], i32 1 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP8:%.*]] = extractelement <4 x i1> [[TMP2]], i64 1 ; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP8]], label [[PRED_STORE_IF1:%.*]], label [[PRED_STORE_CONTINUE2:%.*]] ; DISABLED_MASKED_STRIDED: pred.store.if1: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP9:%.*]] = extractelement <4 x i64> [[TMP3]], i32 1 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP9:%.*]] = extractelement <4 x i64> [[TMP3]], i64 1 ; DISABLED_MASKED_STRIDED-NEXT: [[TMP10:%.*]] = getelementptr inbounds i16, i16* [[POINTS]], i64 [[TMP9]] -; DISABLED_MASKED_STRIDED-NEXT: [[TMP11:%.*]] = extractelement <4 x i16> [[WIDE_LOAD]], i32 1 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP11:%.*]] = extractelement <4 x i16> [[WIDE_LOAD]], i64 1 ; DISABLED_MASKED_STRIDED-NEXT: store i16 [[TMP11]], i16* [[TMP10]], align 2 ; DISABLED_MASKED_STRIDED-NEXT: br label [[PRED_STORE_CONTINUE2]] ; DISABLED_MASKED_STRIDED: pred.store.continue2: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP12:%.*]] = extractelement <4 x i1> [[TMP2]], i32 2 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP12:%.*]] = extractelement <4 x i1> [[TMP2]], i64 2 ; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP12]], label [[PRED_STORE_IF3:%.*]], label [[PRED_STORE_CONTINUE4:%.*]] ; DISABLED_MASKED_STRIDED: pred.store.if3: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP13:%.*]] = extractelement <4 x i64> [[TMP3]], i32 2 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP13:%.*]] = extractelement <4 x i64> [[TMP3]], i64 2 ; DISABLED_MASKED_STRIDED-NEXT: [[TMP14:%.*]] = getelementptr inbounds i16, i16* [[POINTS]], i64 [[TMP13]] -; DISABLED_MASKED_STRIDED-NEXT: [[TMP15:%.*]] = extractelement <4 x i16> [[WIDE_LOAD]], i32 2 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP15:%.*]] = extractelement <4 x i16> [[WIDE_LOAD]], i64 2 ; DISABLED_MASKED_STRIDED-NEXT: store i16 [[TMP15]], i16* [[TMP14]], align 2 ; DISABLED_MASKED_STRIDED-NEXT: br label [[PRED_STORE_CONTINUE4]] ; DISABLED_MASKED_STRIDED: pred.store.continue4: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP16:%.*]] = extractelement <4 x i1> [[TMP2]], i32 3 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP16:%.*]] = extractelement <4 x i1> [[TMP2]], i64 3 ; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP16]], label [[PRED_STORE_IF5:%.*]], label [[PRED_STORE_CONTINUE6]] ; DISABLED_MASKED_STRIDED: pred.store.if5: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP17:%.*]] = extractelement <4 x i64> [[TMP3]], i32 3 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP17:%.*]] = extractelement <4 x i64> [[TMP3]], i64 3 ; DISABLED_MASKED_STRIDED-NEXT: [[TMP18:%.*]] = getelementptr inbounds i16, i16* [[POINTS]], i64 [[TMP17]] -; DISABLED_MASKED_STRIDED-NEXT: [[TMP19:%.*]] = extractelement <4 x i16> [[WIDE_LOAD]], i32 3 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP19:%.*]] = extractelement <4 x i16> [[WIDE_LOAD]], i64 3 ; DISABLED_MASKED_STRIDED-NEXT: store i16 [[TMP19]], i16* [[TMP18]], align 2 ; DISABLED_MASKED_STRIDED-NEXT: br label [[PRED_STORE_CONTINUE6]] ; DISABLED_MASKED_STRIDED: pred.store.continue6: @@ -384,39 +384,39 @@ ; ENABLED_MASKED_STRIDED-NEXT: [[WIDE_LOAD:%.*]] = load <4 x i16>, <4 x i16>* [[TMP1]], align 2 ; ENABLED_MASKED_STRIDED-NEXT: [[TMP2:%.*]] = icmp sgt <4 x i16> [[WIDE_LOAD]], zeroinitializer ; ENABLED_MASKED_STRIDED-NEXT: [[TMP3:%.*]] = mul nuw nsw <4 x i64> [[VEC_IND]], -; ENABLED_MASKED_STRIDED-NEXT: [[TMP4:%.*]] = extractelement <4 x i1> [[TMP2]], i32 0 +; ENABLED_MASKED_STRIDED-NEXT: [[TMP4:%.*]] = extractelement <4 x i1> [[TMP2]], i64 0 ; ENABLED_MASKED_STRIDED-NEXT: br i1 [[TMP4]], label [[PRED_STORE_IF:%.*]], label [[PRED_STORE_CONTINUE:%.*]] ; ENABLED_MASKED_STRIDED: pred.store.if: -; ENABLED_MASKED_STRIDED-NEXT: [[TMP5:%.*]] = extractelement <4 x i64> [[TMP3]], i32 0 +; ENABLED_MASKED_STRIDED-NEXT: [[TMP5:%.*]] = extractelement <4 x i64> [[TMP3]], i64 0 ; ENABLED_MASKED_STRIDED-NEXT: [[TMP6:%.*]] = getelementptr inbounds i16, i16* [[POINTS:%.*]], i64 [[TMP5]] -; ENABLED_MASKED_STRIDED-NEXT: [[TMP7:%.*]] = extractelement <4 x i16> [[WIDE_LOAD]], i32 0 +; ENABLED_MASKED_STRIDED-NEXT: [[TMP7:%.*]] = extractelement <4 x i16> [[WIDE_LOAD]], i64 0 ; ENABLED_MASKED_STRIDED-NEXT: store i16 [[TMP7]], i16* [[TMP6]], align 2 ; ENABLED_MASKED_STRIDED-NEXT: br label [[PRED_STORE_CONTINUE]] ; ENABLED_MASKED_STRIDED: pred.store.continue: -; ENABLED_MASKED_STRIDED-NEXT: [[TMP8:%.*]] = extractelement <4 x i1> [[TMP2]], i32 1 +; ENABLED_MASKED_STRIDED-NEXT: [[TMP8:%.*]] = extractelement <4 x i1> [[TMP2]], i64 1 ; ENABLED_MASKED_STRIDED-NEXT: br i1 [[TMP8]], label [[PRED_STORE_IF1:%.*]], label [[PRED_STORE_CONTINUE2:%.*]] ; ENABLED_MASKED_STRIDED: pred.store.if1: -; ENABLED_MASKED_STRIDED-NEXT: [[TMP9:%.*]] = extractelement <4 x i64> [[TMP3]], i32 1 +; ENABLED_MASKED_STRIDED-NEXT: [[TMP9:%.*]] = extractelement <4 x i64> [[TMP3]], i64 1 ; ENABLED_MASKED_STRIDED-NEXT: [[TMP10:%.*]] = getelementptr inbounds i16, i16* [[POINTS]], i64 [[TMP9]] -; ENABLED_MASKED_STRIDED-NEXT: [[TMP11:%.*]] = extractelement <4 x i16> [[WIDE_LOAD]], i32 1 +; ENABLED_MASKED_STRIDED-NEXT: [[TMP11:%.*]] = extractelement <4 x i16> [[WIDE_LOAD]], i64 1 ; ENABLED_MASKED_STRIDED-NEXT: store i16 [[TMP11]], i16* [[TMP10]], align 2 ; ENABLED_MASKED_STRIDED-NEXT: br label [[PRED_STORE_CONTINUE2]] ; ENABLED_MASKED_STRIDED: pred.store.continue2: -; ENABLED_MASKED_STRIDED-NEXT: [[TMP12:%.*]] = extractelement <4 x i1> [[TMP2]], i32 2 +; ENABLED_MASKED_STRIDED-NEXT: [[TMP12:%.*]] = extractelement <4 x i1> [[TMP2]], i64 2 ; ENABLED_MASKED_STRIDED-NEXT: br i1 [[TMP12]], label [[PRED_STORE_IF3:%.*]], label [[PRED_STORE_CONTINUE4:%.*]] ; ENABLED_MASKED_STRIDED: pred.store.if3: -; ENABLED_MASKED_STRIDED-NEXT: [[TMP13:%.*]] = extractelement <4 x i64> [[TMP3]], i32 2 +; ENABLED_MASKED_STRIDED-NEXT: [[TMP13:%.*]] = extractelement <4 x i64> [[TMP3]], i64 2 ; ENABLED_MASKED_STRIDED-NEXT: [[TMP14:%.*]] = getelementptr inbounds i16, i16* [[POINTS]], i64 [[TMP13]] -; ENABLED_MASKED_STRIDED-NEXT: [[TMP15:%.*]] = extractelement <4 x i16> [[WIDE_LOAD]], i32 2 +; ENABLED_MASKED_STRIDED-NEXT: [[TMP15:%.*]] = extractelement <4 x i16> [[WIDE_LOAD]], i64 2 ; ENABLED_MASKED_STRIDED-NEXT: store i16 [[TMP15]], i16* [[TMP14]], align 2 ; ENABLED_MASKED_STRIDED-NEXT: br label [[PRED_STORE_CONTINUE4]] ; ENABLED_MASKED_STRIDED: pred.store.continue4: -; ENABLED_MASKED_STRIDED-NEXT: [[TMP16:%.*]] = extractelement <4 x i1> [[TMP2]], i32 3 +; ENABLED_MASKED_STRIDED-NEXT: [[TMP16:%.*]] = extractelement <4 x i1> [[TMP2]], i64 3 ; ENABLED_MASKED_STRIDED-NEXT: br i1 [[TMP16]], label [[PRED_STORE_IF5:%.*]], label [[PRED_STORE_CONTINUE6]] ; ENABLED_MASKED_STRIDED: pred.store.if5: -; ENABLED_MASKED_STRIDED-NEXT: [[TMP17:%.*]] = extractelement <4 x i64> [[TMP3]], i32 3 +; ENABLED_MASKED_STRIDED-NEXT: [[TMP17:%.*]] = extractelement <4 x i64> [[TMP3]], i64 3 ; ENABLED_MASKED_STRIDED-NEXT: [[TMP18:%.*]] = getelementptr inbounds i16, i16* [[POINTS]], i64 [[TMP17]] -; ENABLED_MASKED_STRIDED-NEXT: [[TMP19:%.*]] = extractelement <4 x i16> [[WIDE_LOAD]], i32 3 +; ENABLED_MASKED_STRIDED-NEXT: [[TMP19:%.*]] = extractelement <4 x i16> [[WIDE_LOAD]], i64 3 ; ENABLED_MASKED_STRIDED-NEXT: store i16 [[TMP19]], i16* [[TMP18]], align 2 ; ENABLED_MASKED_STRIDED-NEXT: br label [[PRED_STORE_CONTINUE6]] ; ENABLED_MASKED_STRIDED: pred.store.continue6: diff --git a/llvm/test/Transforms/LoopVectorize/bsd_regex.ll b/llvm/test/Transforms/LoopVectorize/bsd_regex.ll --- a/llvm/test/Transforms/LoopVectorize/bsd_regex.ll +++ b/llvm/test/Transforms/LoopVectorize/bsd_regex.ll @@ -20,13 +20,13 @@ ; CHECK-NEXT: [[TMP0:%.*]] = shl nsw <2 x i64> [[VEC_IND]], ; CHECK-NEXT: [[STEP_ADD:%.*]] = shl <2 x i64> [[VEC_IND]], ; CHECK-NEXT: [[TMP1:%.*]] = add <2 x i64> [[STEP_ADD]], -; CHECK-NEXT: [[TMP2:%.*]] = extractelement <2 x i64> [[TMP0]], i32 0 +; CHECK-NEXT: [[TMP2:%.*]] = extractelement <2 x i64> [[TMP0]], i64 0 ; CHECK-NEXT: [[TMP3:%.*]] = getelementptr inbounds i32, i32* [[A:%.*]], i64 [[TMP2]] -; CHECK-NEXT: [[TMP4:%.*]] = extractelement <2 x i64> [[TMP0]], i32 1 +; CHECK-NEXT: [[TMP4:%.*]] = extractelement <2 x i64> [[TMP0]], i64 1 ; CHECK-NEXT: [[TMP5:%.*]] = getelementptr inbounds i32, i32* [[A]], i64 [[TMP4]] -; CHECK-NEXT: [[TMP6:%.*]] = extractelement <2 x i64> [[TMP1]], i32 0 +; CHECK-NEXT: [[TMP6:%.*]] = extractelement <2 x i64> [[TMP1]], i64 0 ; CHECK-NEXT: [[TMP7:%.*]] = getelementptr inbounds i32, i32* [[A]], i64 [[TMP6]] -; CHECK-NEXT: [[TMP8:%.*]] = extractelement <2 x i64> [[TMP1]], i32 1 +; CHECK-NEXT: [[TMP8:%.*]] = extractelement <2 x i64> [[TMP1]], i64 1 ; CHECK-NEXT: [[TMP9:%.*]] = getelementptr inbounds i32, i32* [[A]], i64 [[TMP8]] ; CHECK-NEXT: store i32 4, i32* [[TMP3]], align 4 ; CHECK-NEXT: store i32 4, i32* [[TMP5]], align 4 diff --git a/llvm/test/Transforms/LoopVectorize/extract-last-veclane.ll b/llvm/test/Transforms/LoopVectorize/extract-last-veclane.ll --- a/llvm/test/Transforms/LoopVectorize/extract-last-veclane.ll +++ b/llvm/test/Transforms/LoopVectorize/extract-last-veclane.ll @@ -23,7 +23,7 @@ ; CHECK-NEXT: br i1 [[TMP5]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP0:![0-9]+]] ; CHECK: middle.block: ; CHECK-NEXT: [[CMP_N:%.*]] = icmp eq i64 [[N_VEC]], [[N]] -; CHECK-NEXT: [[TMP6:%.*]] = extractelement <4 x i32> [[TMP2]], i32 3 +; CHECK-NEXT: [[TMP6:%.*]] = extractelement <4 x i32> [[TMP2]], i64 3 ; CHECK-NEXT: br i1 [[CMP_N]], label [[EXIT:%.*]], label [[SCALAR_PH]] ; CHECK: scalar.ph: ; CHECK-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ [[N_VEC]], [[MIDDLE_BLOCK]] ], [ 0, [[ENTRY:%.*]] ] @@ -86,7 +86,7 @@ ; CHECK-NEXT: br i1 [[TMP5]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP4:![0-9]+]] ; CHECK: middle.block: ; CHECK-NEXT: [[CMP_N:%.*]] = icmp eq i64 [[N_VEC]], [[N]] -; CHECK-NEXT: [[TMP6:%.*]] = extractelement <4 x float> [[TMP2]], i32 3 +; CHECK-NEXT: [[TMP6:%.*]] = extractelement <4 x float> [[TMP2]], i64 3 ; CHECK-NEXT: br i1 [[CMP_N]], label [[EXIT:%.*]], label [[SCALAR_PH]] ; CHECK: scalar.ph: ; CHECK-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ [[N_VEC]], [[MIDDLE_BLOCK]] ], [ 0, [[ENTRY:%.*]] ] diff --git a/llvm/test/Transforms/LoopVectorize/first-order-recurrence.ll b/llvm/test/Transforms/LoopVectorize/first-order-recurrence.ll --- a/llvm/test/Transforms/LoopVectorize/first-order-recurrence.ll +++ b/llvm/test/Transforms/LoopVectorize/first-order-recurrence.ll @@ -40,7 +40,7 @@ ; CHECK-NEXT: br i1 [[FOUND_CONFLICT]], label [[SCALAR_PH]], label [[VECTOR_PH:%.*]] ; CHECK: vector.ph: ; CHECK-NEXT: [[N_VEC:%.*]] = and i64 [[TMP2]], 8589934588 -; CHECK-NEXT: [[VECTOR_RECUR_INIT:%.*]] = insertelement <4 x i32> poison, i32 [[PRE_LOAD]], i32 3 +; CHECK-NEXT: [[VECTOR_RECUR_INIT:%.*]] = insertelement <4 x i32> poison, i32 [[PRE_LOAD]], i64 3 ; CHECK-NEXT: br label [[VECTOR_BODY:%.*]] ; CHECK: vector.body: ; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ] @@ -59,7 +59,7 @@ ; CHECK-NEXT: br i1 [[TMP14]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP5:![0-9]+]] ; CHECK: middle.block: ; CHECK-NEXT: [[CMP_N:%.*]] = icmp eq i64 [[TMP2]], [[N_VEC]] -; CHECK-NEXT: [[VECTOR_RECUR_EXTRACT:%.*]] = extractelement <4 x i32> [[WIDE_LOAD]], i32 3 +; CHECK-NEXT: [[VECTOR_RECUR_EXTRACT:%.*]] = extractelement <4 x i32> [[WIDE_LOAD]], i64 3 ; CHECK-NEXT: br i1 [[CMP_N]], label [[FOR_EXIT:%.*]], label [[SCALAR_PH]] ; CHECK: scalar.ph: ; CHECK-NEXT: [[SCALAR_RECUR_INIT:%.*]] = phi i32 [ [[PRE_LOAD]], [[VECTOR_MEMCHECK]] ], [ [[PRE_LOAD]], [[FOR_PREHEADER]] ], [ [[VECTOR_RECUR_EXTRACT]], [[MIDDLE_BLOCK]] ] @@ -104,7 +104,7 @@ ; UNROLL-NEXT: br i1 [[FOUND_CONFLICT]], label [[SCALAR_PH]], label [[VECTOR_PH:%.*]] ; UNROLL: vector.ph: ; UNROLL-NEXT: [[N_VEC:%.*]] = and i64 [[TMP2]], 8589934584 -; UNROLL-NEXT: [[VECTOR_RECUR_INIT:%.*]] = insertelement <4 x i32> poison, i32 [[PRE_LOAD]], i32 3 +; UNROLL-NEXT: [[VECTOR_RECUR_INIT:%.*]] = insertelement <4 x i32> poison, i32 [[PRE_LOAD]], i64 3 ; UNROLL-NEXT: br label [[VECTOR_BODY:%.*]] ; UNROLL: vector.body: ; UNROLL-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ] @@ -131,7 +131,7 @@ ; UNROLL-NEXT: br i1 [[TMP20]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP5:![0-9]+]] ; UNROLL: middle.block: ; UNROLL-NEXT: [[CMP_N:%.*]] = icmp eq i64 [[TMP2]], [[N_VEC]] -; UNROLL-NEXT: [[VECTOR_RECUR_EXTRACT:%.*]] = extractelement <4 x i32> [[WIDE_LOAD7]], i32 3 +; UNROLL-NEXT: [[VECTOR_RECUR_EXTRACT:%.*]] = extractelement <4 x i32> [[WIDE_LOAD7]], i64 3 ; UNROLL-NEXT: br i1 [[CMP_N]], label [[FOR_EXIT:%.*]], label [[SCALAR_PH]] ; UNROLL: scalar.ph: ; UNROLL-NEXT: [[SCALAR_RECUR_INIT:%.*]] = phi i32 [ [[PRE_LOAD]], [[VECTOR_MEMCHECK]] ], [ [[PRE_LOAD]], [[FOR_PREHEADER]] ], [ [[VECTOR_RECUR_EXTRACT]], [[MIDDLE_BLOCK]] ] @@ -508,7 +508,7 @@ ; CHECK-NEXT: br i1 [[MIN_ITERS_CHECK]], label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]] ; CHECK: vector.ph: ; CHECK-NEXT: [[N_VEC:%.*]] = and i64 [[TMP2]], 8589934588 -; CHECK-NEXT: [[VECTOR_RECUR_INIT:%.*]] = insertelement <4 x i32> poison, i32 [[DOTPRE]], i32 3 +; CHECK-NEXT: [[VECTOR_RECUR_INIT:%.*]] = insertelement <4 x i32> poison, i32 [[DOTPRE]], i64 3 ; CHECK-NEXT: br label [[VECTOR_BODY:%.*]] ; CHECK: vector.body: ; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ] @@ -529,7 +529,7 @@ ; CHECK: middle.block: ; CHECK-NEXT: [[TMP12:%.*]] = call i32 @llvm.vector.reduce.smin.v4i32(<4 x i32> [[TMP10]]) ; CHECK-NEXT: [[CMP_N:%.*]] = icmp eq i64 [[TMP2]], [[N_VEC]] -; CHECK-NEXT: [[VECTOR_RECUR_EXTRACT:%.*]] = extractelement <4 x i32> [[WIDE_LOAD]], i32 3 +; CHECK-NEXT: [[VECTOR_RECUR_EXTRACT:%.*]] = extractelement <4 x i32> [[WIDE_LOAD]], i64 3 ; CHECK-NEXT: br i1 [[CMP_N]], label [[FOR_COND_CLEANUP_LOOPEXIT:%.*]], label [[SCALAR_PH]] ; CHECK: scalar.ph: ; CHECK-NEXT: [[SCALAR_RECUR_INIT:%.*]] = phi i32 [ [[DOTPRE]], [[FOR_PREHEADER]] ], [ [[VECTOR_RECUR_EXTRACT]], [[MIDDLE_BLOCK]] ] @@ -572,7 +572,7 @@ ; UNROLL-NEXT: br i1 [[MIN_ITERS_CHECK]], label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]] ; UNROLL: vector.ph: ; UNROLL-NEXT: [[N_VEC:%.*]] = and i64 [[TMP2]], 8589934584 -; UNROLL-NEXT: [[VECTOR_RECUR_INIT:%.*]] = insertelement <4 x i32> poison, i32 [[DOTPRE]], i32 3 +; UNROLL-NEXT: [[VECTOR_RECUR_INIT:%.*]] = insertelement <4 x i32> poison, i32 [[DOTPRE]], i64 3 ; UNROLL-NEXT: br label [[VECTOR_BODY:%.*]] ; UNROLL: vector.body: ; UNROLL-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ] @@ -605,7 +605,7 @@ ; UNROLL-NEXT: [[RDX_MINMAX_SELECT:%.*]] = select <4 x i1> [[RDX_MINMAX_CMP]], <4 x i32> [[TMP17]], <4 x i32> [[TMP18]] ; UNROLL-NEXT: [[TMP20:%.*]] = call i32 @llvm.vector.reduce.smin.v4i32(<4 x i32> [[RDX_MINMAX_SELECT]]) ; UNROLL-NEXT: [[CMP_N:%.*]] = icmp eq i64 [[TMP2]], [[N_VEC]] -; UNROLL-NEXT: [[VECTOR_RECUR_EXTRACT:%.*]] = extractelement <4 x i32> [[WIDE_LOAD2]], i32 3 +; UNROLL-NEXT: [[VECTOR_RECUR_EXTRACT:%.*]] = extractelement <4 x i32> [[WIDE_LOAD2]], i64 3 ; UNROLL-NEXT: br i1 [[CMP_N]], label [[FOR_COND_CLEANUP_LOOPEXIT:%.*]], label [[SCALAR_PH]] ; UNROLL: scalar.ph: ; UNROLL-NEXT: [[SCALAR_RECUR_INIT:%.*]] = phi i32 [ [[DOTPRE]], [[FOR_PREHEADER]] ], [ [[VECTOR_RECUR_EXTRACT]], [[MIDDLE_BLOCK]] ] @@ -1002,8 +1002,8 @@ ; CHECK: vector.ph: ; CHECK-NEXT: [[N_VEC:%.*]] = and i64 [[TMP3]], 8589934588 ; CHECK-NEXT: [[IND_END:%.*]] = or i64 [[N_VEC]], 1 -; CHECK-NEXT: [[VECTOR_RECUR_INIT:%.*]] = insertelement <4 x i16> poison, i16 [[TMP0]], i32 3 -; CHECK-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <4 x double> poison, double [[CONV1]], i32 0 +; CHECK-NEXT: [[VECTOR_RECUR_INIT:%.*]] = insertelement <4 x i16> poison, i16 [[TMP0]], i64 3 +; CHECK-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <4 x double> poison, double [[CONV1]], i64 0 ; CHECK-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector <4 x double> [[BROADCAST_SPLATINSERT]], <4 x double> poison, <4 x i32> zeroinitializer ; CHECK-NEXT: br label [[VECTOR_BODY:%.*]] ; CHECK: vector.body: @@ -1026,7 +1026,7 @@ ; CHECK-NEXT: br i1 [[TMP18]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP16:![0-9]+]] ; CHECK: middle.block: ; CHECK-NEXT: [[CMP_N:%.*]] = icmp eq i64 [[TMP3]], [[N_VEC]] -; CHECK-NEXT: [[VECTOR_RECUR_EXTRACT:%.*]] = extractelement <4 x i16> [[WIDE_LOAD]], i32 3 +; CHECK-NEXT: [[VECTOR_RECUR_EXTRACT:%.*]] = extractelement <4 x i16> [[WIDE_LOAD]], i64 3 ; CHECK-NEXT: br i1 [[CMP_N]], label [[FOR_END_LOOPEXIT:%.*]], label [[SCALAR_PH]] ; CHECK: scalar.ph: ; CHECK-NEXT: [[SCALAR_RECUR_INIT:%.*]] = phi i16 [ [[TMP0]], [[VECTOR_MEMCHECK]] ], [ [[TMP0]], [[FOR_PREHEADER]] ], [ [[VECTOR_RECUR_EXTRACT]], [[MIDDLE_BLOCK]] ] @@ -1086,10 +1086,10 @@ ; UNROLL: vector.ph: ; UNROLL-NEXT: [[N_VEC:%.*]] = and i64 [[TMP3]], 8589934584 ; UNROLL-NEXT: [[IND_END:%.*]] = or i64 [[N_VEC]], 1 -; UNROLL-NEXT: [[VECTOR_RECUR_INIT:%.*]] = insertelement <4 x i16> poison, i16 [[TMP0]], i32 3 -; UNROLL-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <4 x double> poison, double [[CONV1]], i32 0 +; UNROLL-NEXT: [[VECTOR_RECUR_INIT:%.*]] = insertelement <4 x i16> poison, i16 [[TMP0]], i64 3 +; UNROLL-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <4 x double> poison, double [[CONV1]], i64 0 ; UNROLL-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector <4 x double> [[BROADCAST_SPLATINSERT]], <4 x double> poison, <4 x i32> zeroinitializer -; UNROLL-NEXT: [[BROADCAST_SPLATINSERT9:%.*]] = insertelement <4 x double> poison, double [[CONV1]], i32 0 +; UNROLL-NEXT: [[BROADCAST_SPLATINSERT9:%.*]] = insertelement <4 x double> poison, double [[CONV1]], i64 0 ; UNROLL-NEXT: [[BROADCAST_SPLAT10:%.*]] = shufflevector <4 x double> [[BROADCAST_SPLATINSERT9]], <4 x double> poison, <4 x i32> zeroinitializer ; UNROLL-NEXT: br label [[VECTOR_BODY:%.*]] ; UNROLL: vector.body: @@ -1123,7 +1123,7 @@ ; UNROLL-NEXT: br i1 [[TMP27]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP16:![0-9]+]] ; UNROLL: middle.block: ; UNROLL-NEXT: [[CMP_N:%.*]] = icmp eq i64 [[TMP3]], [[N_VEC]] -; UNROLL-NEXT: [[VECTOR_RECUR_EXTRACT:%.*]] = extractelement <4 x i16> [[WIDE_LOAD8]], i32 3 +; UNROLL-NEXT: [[VECTOR_RECUR_EXTRACT:%.*]] = extractelement <4 x i16> [[WIDE_LOAD8]], i64 3 ; UNROLL-NEXT: br i1 [[CMP_N]], label [[FOR_END_LOOPEXIT:%.*]], label [[SCALAR_PH]] ; UNROLL: scalar.ph: ; UNROLL-NEXT: [[SCALAR_RECUR_INIT:%.*]] = phi i16 [ [[TMP0]], [[VECTOR_MEMCHECK]] ], [ [[TMP0]], [[FOR_PREHEADER]] ], [ [[VECTOR_RECUR_EXTRACT]], [[MIDDLE_BLOCK]] ] @@ -2727,7 +2727,7 @@ ; CHECK-NEXT: [[IDXPROM:%.*]] = sext i32 [[D:%.*]] to i64 ; CHECK-NEXT: br i1 false, label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]] ; CHECK: vector.ph: -; CHECK-NEXT: [[VECTOR_RECUR_INIT:%.*]] = insertelement <4 x double> poison, double [[J:%.*]], i32 3 +; CHECK-NEXT: [[VECTOR_RECUR_INIT:%.*]] = insertelement <4 x double> poison, double [[J:%.*]], i64 3 ; CHECK-NEXT: br label [[VECTOR_BODY:%.*]] ; CHECK: vector.body: ; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ] @@ -2752,10 +2752,10 @@ ; CHECK-NEXT: [[TMP12:%.*]] = load double, double* [[TMP8]], align 8 ; CHECK-NEXT: [[TMP13:%.*]] = load double, double* [[TMP9]], align 8 ; CHECK-NEXT: [[TMP14:%.*]] = load double, double* [[TMP10]], align 8 -; CHECK-NEXT: [[TMP15:%.*]] = insertelement <4 x double> poison, double [[TMP11]], i32 0 -; CHECK-NEXT: [[TMP16:%.*]] = insertelement <4 x double> [[TMP15]], double [[TMP12]], i32 1 -; CHECK-NEXT: [[TMP17:%.*]] = insertelement <4 x double> [[TMP16]], double [[TMP13]], i32 2 -; CHECK-NEXT: [[TMP18]] = insertelement <4 x double> [[TMP17]], double [[TMP14]], i32 3 +; CHECK-NEXT: [[TMP15:%.*]] = insertelement <4 x double> poison, double [[TMP11]], i64 0 +; CHECK-NEXT: [[TMP16:%.*]] = insertelement <4 x double> [[TMP15]], double [[TMP12]], i64 1 +; CHECK-NEXT: [[TMP17:%.*]] = insertelement <4 x double> [[TMP16]], double [[TMP13]], i64 2 +; CHECK-NEXT: [[TMP18]] = insertelement <4 x double> [[TMP17]], double [[TMP14]], i64 3 ; CHECK-NEXT: [[TMP19:%.*]] = shufflevector <4 x double> [[VECTOR_RECUR]], <4 x double> [[TMP17]], <4 x i32> ; CHECK-NEXT: [[TMP20:%.*]] = fmul <4 x double> [[TMP19]], [[TMP18]] ; CHECK-NEXT: [[TMP21:%.*]] = fcmp une <4 x double> [[TMP20]], zeroinitializer @@ -2780,7 +2780,7 @@ ; UNROLL-NEXT: [[IDXPROM:%.*]] = sext i32 [[D:%.*]] to i64 ; UNROLL-NEXT: br i1 false, label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]] ; UNROLL: vector.ph: -; UNROLL-NEXT: [[VECTOR_RECUR_INIT:%.*]] = insertelement <4 x double> poison, double [[J:%.*]], i32 3 +; UNROLL-NEXT: [[VECTOR_RECUR_INIT:%.*]] = insertelement <4 x double> poison, double [[J:%.*]], i64 3 ; UNROLL-NEXT: br label [[VECTOR_BODY:%.*]] ; UNROLL: vector.body: ; UNROLL-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ] @@ -2822,18 +2822,18 @@ ; UNROLL-NEXT: [[TMP24:%.*]] = load double, double* [[TMP16]], align 8 ; UNROLL-NEXT: [[TMP25:%.*]] = load double, double* [[TMP17]], align 8 ; UNROLL-NEXT: [[TMP26:%.*]] = load double, double* [[TMP18]], align 8 -; UNROLL-NEXT: [[TMP27:%.*]] = insertelement <4 x double> poison, double [[TMP23]], i32 0 -; UNROLL-NEXT: [[TMP28:%.*]] = insertelement <4 x double> [[TMP27]], double [[TMP24]], i32 1 -; UNROLL-NEXT: [[TMP29:%.*]] = insertelement <4 x double> [[TMP28]], double [[TMP25]], i32 2 -; UNROLL-NEXT: [[TMP30:%.*]] = insertelement <4 x double> [[TMP29]], double [[TMP26]], i32 3 +; UNROLL-NEXT: [[TMP27:%.*]] = insertelement <4 x double> poison, double [[TMP23]], i64 0 +; UNROLL-NEXT: [[TMP28:%.*]] = insertelement <4 x double> [[TMP27]], double [[TMP24]], i64 1 +; UNROLL-NEXT: [[TMP29:%.*]] = insertelement <4 x double> [[TMP28]], double [[TMP25]], i64 2 +; UNROLL-NEXT: [[TMP30:%.*]] = insertelement <4 x double> [[TMP29]], double [[TMP26]], i64 3 ; UNROLL-NEXT: [[TMP31:%.*]] = load double, double* [[TMP19]], align 8 ; UNROLL-NEXT: [[TMP32:%.*]] = load double, double* [[TMP20]], align 8 ; UNROLL-NEXT: [[TMP33:%.*]] = load double, double* [[TMP21]], align 8 ; UNROLL-NEXT: [[TMP34:%.*]] = load double, double* [[TMP22]], align 8 -; UNROLL-NEXT: [[TMP35:%.*]] = insertelement <4 x double> poison, double [[TMP31]], i32 0 -; UNROLL-NEXT: [[TMP36:%.*]] = insertelement <4 x double> [[TMP35]], double [[TMP32]], i32 1 -; UNROLL-NEXT: [[TMP37:%.*]] = insertelement <4 x double> [[TMP36]], double [[TMP33]], i32 2 -; UNROLL-NEXT: [[TMP38]] = insertelement <4 x double> [[TMP37]], double [[TMP34]], i32 3 +; UNROLL-NEXT: [[TMP35:%.*]] = insertelement <4 x double> poison, double [[TMP31]], i64 0 +; UNROLL-NEXT: [[TMP36:%.*]] = insertelement <4 x double> [[TMP35]], double [[TMP32]], i64 1 +; UNROLL-NEXT: [[TMP37:%.*]] = insertelement <4 x double> [[TMP36]], double [[TMP33]], i64 2 +; UNROLL-NEXT: [[TMP38]] = insertelement <4 x double> [[TMP37]], double [[TMP34]], i64 3 ; UNROLL-NEXT: [[TMP39:%.*]] = shufflevector <4 x double> [[VECTOR_RECUR]], <4 x double> [[TMP29]], <4 x i32> ; UNROLL-NEXT: [[TMP40:%.*]] = shufflevector <4 x double> [[TMP30]], <4 x double> [[TMP37]], <4 x i32> ; UNROLL-NEXT: [[TMP41:%.*]] = fmul <4 x double> [[TMP39]], [[TMP30]] @@ -3238,7 +3238,7 @@ ; CHECK-NEXT: br i1 [[FOUND_CONFLICT]], label [[SCALAR_PH]], label [[VECTOR_PH:%.*]] ; CHECK: vector.ph: ; CHECK-NEXT: [[N_VEC:%.*]] = and i64 [[N]], -4 -; CHECK-NEXT: [[VECTOR_RECUR_INIT:%.*]] = insertelement <4 x i16> poison, i16 [[DOTPRE]], i32 3 +; CHECK-NEXT: [[VECTOR_RECUR_INIT:%.*]] = insertelement <4 x i16> poison, i16 [[DOTPRE]], i64 3 ; CHECK-NEXT: br label [[VECTOR_BODY:%.*]] ; CHECK: vector.body: ; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ] @@ -3259,7 +3259,7 @@ ; CHECK-NEXT: br i1 [[TMP12]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP31:![0-9]+]] ; CHECK: middle.block: ; CHECK-NEXT: [[CMP_N:%.*]] = icmp eq i64 [[N_VEC]], [[N]] -; CHECK-NEXT: [[VECTOR_RECUR_EXTRACT:%.*]] = extractelement <4 x i16> [[WIDE_LOAD]], i32 3 +; CHECK-NEXT: [[VECTOR_RECUR_EXTRACT:%.*]] = extractelement <4 x i16> [[WIDE_LOAD]], i64 3 ; CHECK-NEXT: br i1 [[CMP_N]], label [[FOR_END:%.*]], label [[SCALAR_PH]] ; CHECK: scalar.ph: ; CHECK-NEXT: [[SCALAR_RECUR_INIT:%.*]] = phi i16 [ [[DOTPRE]], [[VECTOR_MEMCHECK]] ], [ [[DOTPRE]], [[ENTRY:%.*]] ], [ [[VECTOR_RECUR_EXTRACT]], [[MIDDLE_BLOCK]] ] @@ -3299,7 +3299,7 @@ ; UNROLL-NEXT: br i1 [[FOUND_CONFLICT]], label [[SCALAR_PH]], label [[VECTOR_PH:%.*]] ; UNROLL: vector.ph: ; UNROLL-NEXT: [[N_VEC:%.*]] = and i64 [[N]], -8 -; UNROLL-NEXT: [[VECTOR_RECUR_INIT:%.*]] = insertelement <4 x i16> poison, i16 [[DOTPRE]], i32 3 +; UNROLL-NEXT: [[VECTOR_RECUR_INIT:%.*]] = insertelement <4 x i16> poison, i16 [[DOTPRE]], i64 3 ; UNROLL-NEXT: br label [[VECTOR_BODY:%.*]] ; UNROLL: vector.body: ; UNROLL-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ] @@ -3330,7 +3330,7 @@ ; UNROLL-NEXT: br i1 [[TMP20]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP31:![0-9]+]] ; UNROLL: middle.block: ; UNROLL-NEXT: [[CMP_N:%.*]] = icmp eq i64 [[N_VEC]], [[N]] -; UNROLL-NEXT: [[VECTOR_RECUR_EXTRACT:%.*]] = extractelement <4 x i16> [[WIDE_LOAD7]], i32 3 +; UNROLL-NEXT: [[VECTOR_RECUR_EXTRACT:%.*]] = extractelement <4 x i16> [[WIDE_LOAD7]], i64 3 ; UNROLL-NEXT: br i1 [[CMP_N]], label [[FOR_END:%.*]], label [[SCALAR_PH]] ; UNROLL: scalar.ph: ; UNROLL-NEXT: [[SCALAR_RECUR_INIT:%.*]] = phi i16 [ [[DOTPRE]], [[VECTOR_MEMCHECK]] ], [ [[DOTPRE]], [[ENTRY:%.*]] ], [ [[VECTOR_RECUR_EXTRACT]], [[MIDDLE_BLOCK]] ] @@ -3707,7 +3707,7 @@ ; CHECK-NEXT: br i1 [[CONFLICT_RDX16]], label [[SCALAR_PH]], label [[VECTOR_PH:%.*]] ; CHECK: vector.ph: ; CHECK-NEXT: [[N_VEC:%.*]] = and i64 [[N]], -4 -; CHECK-NEXT: [[VECTOR_RECUR_INIT:%.*]] = insertelement <4 x i16> poison, i16 [[DOTPRE]], i32 3 +; CHECK-NEXT: [[VECTOR_RECUR_INIT:%.*]] = insertelement <4 x i16> poison, i16 [[DOTPRE]], i64 3 ; CHECK-NEXT: br label [[VECTOR_BODY:%.*]] ; CHECK: vector.body: ; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ] @@ -3726,10 +3726,10 @@ ; CHECK-NEXT: [[TMP14:%.*]] = load i16, i16* [[TMP9]], align 2, !alias.scope !39 ; CHECK-NEXT: [[TMP15:%.*]] = load i16, i16* [[TMP10]], align 2, !alias.scope !39 ; CHECK-NEXT: [[TMP16:%.*]] = load i16, i16* [[TMP11]], align 2, !alias.scope !39 -; CHECK-NEXT: [[TMP17:%.*]] = insertelement <4 x i16> poison, i16 [[TMP13]], i32 0 -; CHECK-NEXT: [[TMP18:%.*]] = insertelement <4 x i16> [[TMP17]], i16 [[TMP14]], i32 1 -; CHECK-NEXT: [[TMP19:%.*]] = insertelement <4 x i16> [[TMP18]], i16 [[TMP15]], i32 2 -; CHECK-NEXT: [[TMP20]] = insertelement <4 x i16> [[TMP19]], i16 [[TMP16]], i32 3 +; CHECK-NEXT: [[TMP17:%.*]] = insertelement <4 x i16> poison, i16 [[TMP13]], i64 0 +; CHECK-NEXT: [[TMP18:%.*]] = insertelement <4 x i16> [[TMP17]], i16 [[TMP14]], i64 1 +; CHECK-NEXT: [[TMP19:%.*]] = insertelement <4 x i16> [[TMP18]], i16 [[TMP15]], i64 2 +; CHECK-NEXT: [[TMP20]] = insertelement <4 x i16> [[TMP19]], i16 [[TMP16]], i64 3 ; CHECK-NEXT: [[TMP21:%.*]] = shufflevector <4 x i16> [[VECTOR_RECUR]], <4 x i16> [[TMP19]], <4 x i32> ; CHECK-NEXT: [[TMP22:%.*]] = sext <4 x i16> [[TMP21]] to <4 x i32> ; CHECK-NEXT: [[TMP23:%.*]] = sext <4 x i16> [[TMP20]] to <4 x i32> @@ -3794,7 +3794,7 @@ ; UNROLL-NEXT: br i1 [[CONFLICT_RDX16]], label [[SCALAR_PH]], label [[VECTOR_PH:%.*]] ; UNROLL: vector.ph: ; UNROLL-NEXT: [[N_VEC:%.*]] = and i64 [[N]], -8 -; UNROLL-NEXT: [[VECTOR_RECUR_INIT:%.*]] = insertelement <4 x i16> poison, i16 [[DOTPRE]], i32 3 +; UNROLL-NEXT: [[VECTOR_RECUR_INIT:%.*]] = insertelement <4 x i16> poison, i16 [[DOTPRE]], i64 3 ; UNROLL-NEXT: br label [[VECTOR_BODY:%.*]] ; UNROLL: vector.body: ; UNROLL-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ] @@ -3824,18 +3824,18 @@ ; UNROLL-NEXT: [[TMP24:%.*]] = load i16, i16* [[TMP13]], align 2, !alias.scope !39 ; UNROLL-NEXT: [[TMP25:%.*]] = load i16, i16* [[TMP14]], align 2, !alias.scope !39 ; UNROLL-NEXT: [[TMP26:%.*]] = load i16, i16* [[TMP15]], align 2, !alias.scope !39 -; UNROLL-NEXT: [[TMP27:%.*]] = insertelement <4 x i16> poison, i16 [[TMP23]], i32 0 -; UNROLL-NEXT: [[TMP28:%.*]] = insertelement <4 x i16> [[TMP27]], i16 [[TMP24]], i32 1 -; UNROLL-NEXT: [[TMP29:%.*]] = insertelement <4 x i16> [[TMP28]], i16 [[TMP25]], i32 2 -; UNROLL-NEXT: [[TMP30:%.*]] = insertelement <4 x i16> [[TMP29]], i16 [[TMP26]], i32 3 +; UNROLL-NEXT: [[TMP27:%.*]] = insertelement <4 x i16> poison, i16 [[TMP23]], i64 0 +; UNROLL-NEXT: [[TMP28:%.*]] = insertelement <4 x i16> [[TMP27]], i16 [[TMP24]], i64 1 +; UNROLL-NEXT: [[TMP29:%.*]] = insertelement <4 x i16> [[TMP28]], i16 [[TMP25]], i64 2 +; UNROLL-NEXT: [[TMP30:%.*]] = insertelement <4 x i16> [[TMP29]], i16 [[TMP26]], i64 3 ; UNROLL-NEXT: [[TMP31:%.*]] = load i16, i16* [[TMP16]], align 2, !alias.scope !39 ; UNROLL-NEXT: [[TMP32:%.*]] = load i16, i16* [[TMP17]], align 2, !alias.scope !39 ; UNROLL-NEXT: [[TMP33:%.*]] = load i16, i16* [[TMP18]], align 2, !alias.scope !39 ; UNROLL-NEXT: [[TMP34:%.*]] = load i16, i16* [[TMP19]], align 2, !alias.scope !39 -; UNROLL-NEXT: [[TMP35:%.*]] = insertelement <4 x i16> poison, i16 [[TMP31]], i32 0 -; UNROLL-NEXT: [[TMP36:%.*]] = insertelement <4 x i16> [[TMP35]], i16 [[TMP32]], i32 1 -; UNROLL-NEXT: [[TMP37:%.*]] = insertelement <4 x i16> [[TMP36]], i16 [[TMP33]], i32 2 -; UNROLL-NEXT: [[TMP38]] = insertelement <4 x i16> [[TMP37]], i16 [[TMP34]], i32 3 +; UNROLL-NEXT: [[TMP35:%.*]] = insertelement <4 x i16> poison, i16 [[TMP31]], i64 0 +; UNROLL-NEXT: [[TMP36:%.*]] = insertelement <4 x i16> [[TMP35]], i16 [[TMP32]], i64 1 +; UNROLL-NEXT: [[TMP37:%.*]] = insertelement <4 x i16> [[TMP36]], i16 [[TMP33]], i64 2 +; UNROLL-NEXT: [[TMP38]] = insertelement <4 x i16> [[TMP37]], i16 [[TMP34]], i64 3 ; UNROLL-NEXT: [[TMP39:%.*]] = shufflevector <4 x i16> [[VECTOR_RECUR]], <4 x i16> [[TMP29]], <4 x i32> ; UNROLL-NEXT: [[TMP40:%.*]] = shufflevector <4 x i16> [[TMP30]], <4 x i16> [[TMP37]], <4 x i32> ; UNROLL-NEXT: [[TMP41:%.*]] = sext <4 x i16> [[TMP39]] to <4 x i32> @@ -4326,7 +4326,7 @@ ; CHECK-NEXT: br i1 [[FOUND_CONFLICT]], label [[SCALAR_PH]], label [[VECTOR_PH:%.*]] ; CHECK: vector.ph: ; CHECK-NEXT: [[N_VEC:%.*]] = and i64 [[N]], -4 -; CHECK-NEXT: [[VECTOR_RECUR_INIT:%.*]] = insertelement <4 x i16> poison, i16 [[DOTPRE]], i32 3 +; CHECK-NEXT: [[VECTOR_RECUR_INIT:%.*]] = insertelement <4 x i16> poison, i16 [[DOTPRE]], i64 3 ; CHECK-NEXT: br label [[VECTOR_BODY:%.*]] ; CHECK: vector.body: ; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ] @@ -4348,7 +4348,7 @@ ; CHECK-NEXT: br i1 [[TMP13]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP48:![0-9]+]] ; CHECK: middle.block: ; CHECK-NEXT: [[CMP_N:%.*]] = icmp eq i64 [[N_VEC]], [[N]] -; CHECK-NEXT: [[VECTOR_RECUR_EXTRACT:%.*]] = extractelement <4 x i16> [[WIDE_LOAD]], i32 3 +; CHECK-NEXT: [[VECTOR_RECUR_EXTRACT:%.*]] = extractelement <4 x i16> [[WIDE_LOAD]], i64 3 ; CHECK-NEXT: br i1 [[CMP_N]], label [[FOR_END:%.*]], label [[SCALAR_PH]] ; CHECK: scalar.ph: ; CHECK-NEXT: [[SCALAR_RECUR_INIT:%.*]] = phi i16 [ [[DOTPRE]], [[VECTOR_MEMCHECK]] ], [ [[DOTPRE]], [[ENTRY:%.*]] ], [ [[VECTOR_RECUR_EXTRACT]], [[MIDDLE_BLOCK]] ] @@ -4389,7 +4389,7 @@ ; UNROLL-NEXT: br i1 [[FOUND_CONFLICT]], label [[SCALAR_PH]], label [[VECTOR_PH:%.*]] ; UNROLL: vector.ph: ; UNROLL-NEXT: [[N_VEC:%.*]] = and i64 [[N]], -8 -; UNROLL-NEXT: [[VECTOR_RECUR_INIT:%.*]] = insertelement <4 x i16> poison, i16 [[DOTPRE]], i32 3 +; UNROLL-NEXT: [[VECTOR_RECUR_INIT:%.*]] = insertelement <4 x i16> poison, i16 [[DOTPRE]], i64 3 ; UNROLL-NEXT: br label [[VECTOR_BODY:%.*]] ; UNROLL: vector.body: ; UNROLL-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ] @@ -4422,7 +4422,7 @@ ; UNROLL-NEXT: br i1 [[TMP22]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP48:![0-9]+]] ; UNROLL: middle.block: ; UNROLL-NEXT: [[CMP_N:%.*]] = icmp eq i64 [[N_VEC]], [[N]] -; UNROLL-NEXT: [[VECTOR_RECUR_EXTRACT:%.*]] = extractelement <4 x i16> [[WIDE_LOAD7]], i32 3 +; UNROLL-NEXT: [[VECTOR_RECUR_EXTRACT:%.*]] = extractelement <4 x i16> [[WIDE_LOAD7]], i64 3 ; UNROLL-NEXT: br i1 [[CMP_N]], label [[FOR_END:%.*]], label [[SCALAR_PH]] ; UNROLL: scalar.ph: ; UNROLL-NEXT: [[SCALAR_RECUR_INIT:%.*]] = phi i16 [ [[DOTPRE]], [[VECTOR_MEMCHECK]] ], [ [[DOTPRE]], [[ENTRY:%.*]] ], [ [[VECTOR_RECUR_EXTRACT]], [[MIDDLE_BLOCK]] ] @@ -5220,7 +5220,7 @@ ; CHECK-NEXT: [[N_RND_UP:%.*]] = add i32 [[TMP1]], 3 ; CHECK-NEXT: [[N_VEC:%.*]] = and i32 [[N_RND_UP]], -4 ; CHECK-NEXT: [[TRIP_COUNT_MINUS_1:%.*]] = add i32 [[TMP1]], -1 -; CHECK-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <4 x i32> poison, i32 [[TRIP_COUNT_MINUS_1]], i32 0 +; CHECK-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <4 x i32> poison, i32 [[TRIP_COUNT_MINUS_1]], i64 0 ; CHECK-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector <4 x i32> [[BROADCAST_SPLATINSERT]], <4 x i32> poison, <4 x i32> zeroinitializer ; CHECK-NEXT: br label [[VECTOR_BODY:%.*]] ; CHECK: vector.body: @@ -5228,42 +5228,42 @@ ; CHECK-NEXT: [[VECTOR_RECUR:%.*]] = phi <4 x i32> [ , [[VECTOR_PH]] ], [ [[TMP21:%.*]], [[PRED_UDIV_CONTINUE8]] ] ; CHECK-NEXT: [[VEC_PHI:%.*]] = phi <4 x i32> [ zeroinitializer, [[VECTOR_PH]] ], [ [[TMP23:%.*]], [[PRED_UDIV_CONTINUE8]] ] ; CHECK-NEXT: [[OFFSET_IDX:%.*]] = sub i32 [[Y]], [[INDEX]] -; CHECK-NEXT: [[BROADCAST_SPLATINSERT1:%.*]] = insertelement <4 x i32> poison, i32 [[INDEX]], i32 0 +; CHECK-NEXT: [[BROADCAST_SPLATINSERT1:%.*]] = insertelement <4 x i32> poison, i32 [[INDEX]], i64 0 ; CHECK-NEXT: [[BROADCAST_SPLAT2:%.*]] = shufflevector <4 x i32> [[BROADCAST_SPLATINSERT1]], <4 x i32> poison, <4 x i32> zeroinitializer ; CHECK-NEXT: [[VEC_IV:%.*]] = or <4 x i32> [[BROADCAST_SPLAT2]], ; CHECK-NEXT: [[TMP2:%.*]] = icmp ule <4 x i32> [[VEC_IV]], [[BROADCAST_SPLAT]] -; CHECK-NEXT: [[TMP3:%.*]] = extractelement <4 x i1> [[TMP2]], i32 0 +; CHECK-NEXT: [[TMP3:%.*]] = extractelement <4 x i1> [[TMP2]], i64 0 ; CHECK-NEXT: br i1 [[TMP3]], label [[PRED_UDIV_IF:%.*]], label [[PRED_UDIV_CONTINUE:%.*]] ; CHECK: pred.udiv.if: ; CHECK-NEXT: [[TMP4:%.*]] = udiv i32 219220132, [[OFFSET_IDX]] -; CHECK-NEXT: [[TMP5:%.*]] = insertelement <4 x i32> poison, i32 [[TMP4]], i32 0 +; CHECK-NEXT: [[TMP5:%.*]] = insertelement <4 x i32> poison, i32 [[TMP4]], i64 0 ; CHECK-NEXT: br label [[PRED_UDIV_CONTINUE]] ; CHECK: pred.udiv.continue: ; CHECK-NEXT: [[TMP6:%.*]] = phi <4 x i32> [ poison, [[VECTOR_BODY]] ], [ [[TMP5]], [[PRED_UDIV_IF]] ] -; CHECK-NEXT: [[TMP7:%.*]] = extractelement <4 x i1> [[TMP2]], i32 1 +; CHECK-NEXT: [[TMP7:%.*]] = extractelement <4 x i1> [[TMP2]], i64 1 ; CHECK-NEXT: br i1 [[TMP7]], label [[PRED_UDIV_IF3:%.*]], label [[PRED_UDIV_CONTINUE4:%.*]] ; CHECK: pred.udiv.if3: ; CHECK-NEXT: [[TMP8:%.*]] = add i32 [[OFFSET_IDX]], -1 ; CHECK-NEXT: [[TMP9:%.*]] = udiv i32 219220132, [[TMP8]] -; CHECK-NEXT: [[TMP10:%.*]] = insertelement <4 x i32> [[TMP6]], i32 [[TMP9]], i32 1 +; CHECK-NEXT: [[TMP10:%.*]] = insertelement <4 x i32> [[TMP6]], i32 [[TMP9]], i64 1 ; CHECK-NEXT: br label [[PRED_UDIV_CONTINUE4]] ; CHECK: pred.udiv.continue4: ; CHECK-NEXT: [[TMP11:%.*]] = phi <4 x i32> [ [[TMP6]], [[PRED_UDIV_CONTINUE]] ], [ [[TMP10]], [[PRED_UDIV_IF3]] ] -; CHECK-NEXT: [[TMP12:%.*]] = extractelement <4 x i1> [[TMP2]], i32 2 +; CHECK-NEXT: [[TMP12:%.*]] = extractelement <4 x i1> [[TMP2]], i64 2 ; CHECK-NEXT: br i1 [[TMP12]], label [[PRED_UDIV_IF5:%.*]], label [[PRED_UDIV_CONTINUE6:%.*]] ; CHECK: pred.udiv.if5: ; CHECK-NEXT: [[TMP13:%.*]] = add i32 [[OFFSET_IDX]], -2 ; CHECK-NEXT: [[TMP14:%.*]] = udiv i32 219220132, [[TMP13]] -; CHECK-NEXT: [[TMP15:%.*]] = insertelement <4 x i32> [[TMP11]], i32 [[TMP14]], i32 2 +; CHECK-NEXT: [[TMP15:%.*]] = insertelement <4 x i32> [[TMP11]], i32 [[TMP14]], i64 2 ; CHECK-NEXT: br label [[PRED_UDIV_CONTINUE6]] ; CHECK: pred.udiv.continue6: ; CHECK-NEXT: [[TMP16:%.*]] = phi <4 x i32> [ [[TMP11]], [[PRED_UDIV_CONTINUE4]] ], [ [[TMP15]], [[PRED_UDIV_IF5]] ] -; CHECK-NEXT: [[TMP17:%.*]] = extractelement <4 x i1> [[TMP2]], i32 3 +; CHECK-NEXT: [[TMP17:%.*]] = extractelement <4 x i1> [[TMP2]], i64 3 ; CHECK-NEXT: br i1 [[TMP17]], label [[PRED_UDIV_IF7:%.*]], label [[PRED_UDIV_CONTINUE8]] ; CHECK: pred.udiv.if7: ; CHECK-NEXT: [[TMP18:%.*]] = add i32 [[OFFSET_IDX]], -3 ; CHECK-NEXT: [[TMP19:%.*]] = udiv i32 219220132, [[TMP18]] -; CHECK-NEXT: [[TMP20:%.*]] = insertelement <4 x i32> [[TMP16]], i32 [[TMP19]], i32 3 +; CHECK-NEXT: [[TMP20:%.*]] = insertelement <4 x i32> [[TMP16]], i32 [[TMP19]], i64 3 ; CHECK-NEXT: br label [[PRED_UDIV_CONTINUE8]] ; CHECK: pred.udiv.continue8: ; CHECK-NEXT: [[TMP21]] = phi <4 x i32> [ [[TMP16]], [[PRED_UDIV_CONTINUE6]] ], [ [[TMP20]], [[PRED_UDIV_IF7]] ] @@ -5294,7 +5294,7 @@ ; UNROLL-NEXT: [[N_RND_UP:%.*]] = add i32 [[TMP1]], 7 ; UNROLL-NEXT: [[N_VEC:%.*]] = and i32 [[N_RND_UP]], -8 ; UNROLL-NEXT: [[TRIP_COUNT_MINUS_1:%.*]] = add i32 [[TMP1]], -1 -; UNROLL-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <4 x i32> poison, i32 [[TRIP_COUNT_MINUS_1]], i32 0 +; UNROLL-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <4 x i32> poison, i32 [[TRIP_COUNT_MINUS_1]], i64 0 ; UNROLL-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector <4 x i32> [[BROADCAST_SPLATINSERT]], <4 x i32> poison, <4 x i32> zeroinitializer ; UNROLL-NEXT: br label [[VECTOR_BODY:%.*]] ; UNROLL: vector.body: @@ -5303,80 +5303,80 @@ ; UNROLL-NEXT: [[VEC_PHI:%.*]] = phi <4 x i32> [ zeroinitializer, [[VECTOR_PH]] ], [ [[TMP45:%.*]], [[PRED_UDIV_CONTINUE19]] ] ; UNROLL-NEXT: [[VEC_PHI2:%.*]] = phi <4 x i32> [ zeroinitializer, [[VECTOR_PH]] ], [ [[TMP46:%.*]], [[PRED_UDIV_CONTINUE19]] ] ; UNROLL-NEXT: [[OFFSET_IDX:%.*]] = sub i32 [[Y]], [[INDEX]] -; UNROLL-NEXT: [[BROADCAST_SPLATINSERT3:%.*]] = insertelement <4 x i32> poison, i32 [[INDEX]], i32 0 +; UNROLL-NEXT: [[BROADCAST_SPLATINSERT3:%.*]] = insertelement <4 x i32> poison, i32 [[INDEX]], i64 0 ; UNROLL-NEXT: [[BROADCAST_SPLAT4:%.*]] = shufflevector <4 x i32> [[BROADCAST_SPLATINSERT3]], <4 x i32> poison, <4 x i32> zeroinitializer ; UNROLL-NEXT: [[VEC_IV:%.*]] = or <4 x i32> [[BROADCAST_SPLAT4]], ; UNROLL-NEXT: [[VEC_IV5:%.*]] = or <4 x i32> [[BROADCAST_SPLAT4]], ; UNROLL-NEXT: [[TMP2:%.*]] = icmp ule <4 x i32> [[VEC_IV]], [[BROADCAST_SPLAT]] ; UNROLL-NEXT: [[TMP3:%.*]] = icmp ule <4 x i32> [[VEC_IV5]], [[BROADCAST_SPLAT]] -; UNROLL-NEXT: [[TMP4:%.*]] = extractelement <4 x i1> [[TMP2]], i32 0 +; UNROLL-NEXT: [[TMP4:%.*]] = extractelement <4 x i1> [[TMP2]], i64 0 ; UNROLL-NEXT: br i1 [[TMP4]], label [[PRED_UDIV_IF:%.*]], label [[PRED_UDIV_CONTINUE:%.*]] ; UNROLL: pred.udiv.if: ; UNROLL-NEXT: [[TMP5:%.*]] = udiv i32 219220132, [[OFFSET_IDX]] -; UNROLL-NEXT: [[TMP6:%.*]] = insertelement <4 x i32> poison, i32 [[TMP5]], i32 0 +; UNROLL-NEXT: [[TMP6:%.*]] = insertelement <4 x i32> poison, i32 [[TMP5]], i64 0 ; UNROLL-NEXT: br label [[PRED_UDIV_CONTINUE]] ; UNROLL: pred.udiv.continue: ; UNROLL-NEXT: [[TMP7:%.*]] = phi <4 x i32> [ poison, [[VECTOR_BODY]] ], [ [[TMP6]], [[PRED_UDIV_IF]] ] -; UNROLL-NEXT: [[TMP8:%.*]] = extractelement <4 x i1> [[TMP2]], i32 1 +; UNROLL-NEXT: [[TMP8:%.*]] = extractelement <4 x i1> [[TMP2]], i64 1 ; UNROLL-NEXT: br i1 [[TMP8]], label [[PRED_UDIV_IF6:%.*]], label [[PRED_UDIV_CONTINUE7:%.*]] ; UNROLL: pred.udiv.if6: ; UNROLL-NEXT: [[TMP9:%.*]] = add i32 [[OFFSET_IDX]], -1 ; UNROLL-NEXT: [[TMP10:%.*]] = udiv i32 219220132, [[TMP9]] -; UNROLL-NEXT: [[TMP11:%.*]] = insertelement <4 x i32> [[TMP7]], i32 [[TMP10]], i32 1 +; UNROLL-NEXT: [[TMP11:%.*]] = insertelement <4 x i32> [[TMP7]], i32 [[TMP10]], i64 1 ; UNROLL-NEXT: br label [[PRED_UDIV_CONTINUE7]] ; UNROLL: pred.udiv.continue7: ; UNROLL-NEXT: [[TMP12:%.*]] = phi <4 x i32> [ [[TMP7]], [[PRED_UDIV_CONTINUE]] ], [ [[TMP11]], [[PRED_UDIV_IF6]] ] -; UNROLL-NEXT: [[TMP13:%.*]] = extractelement <4 x i1> [[TMP2]], i32 2 +; UNROLL-NEXT: [[TMP13:%.*]] = extractelement <4 x i1> [[TMP2]], i64 2 ; UNROLL-NEXT: br i1 [[TMP13]], label [[PRED_UDIV_IF8:%.*]], label [[PRED_UDIV_CONTINUE9:%.*]] ; UNROLL: pred.udiv.if8: ; UNROLL-NEXT: [[TMP14:%.*]] = add i32 [[OFFSET_IDX]], -2 ; UNROLL-NEXT: [[TMP15:%.*]] = udiv i32 219220132, [[TMP14]] -; UNROLL-NEXT: [[TMP16:%.*]] = insertelement <4 x i32> [[TMP12]], i32 [[TMP15]], i32 2 +; UNROLL-NEXT: [[TMP16:%.*]] = insertelement <4 x i32> [[TMP12]], i32 [[TMP15]], i64 2 ; UNROLL-NEXT: br label [[PRED_UDIV_CONTINUE9]] ; UNROLL: pred.udiv.continue9: ; UNROLL-NEXT: [[TMP17:%.*]] = phi <4 x i32> [ [[TMP12]], [[PRED_UDIV_CONTINUE7]] ], [ [[TMP16]], [[PRED_UDIV_IF8]] ] -; UNROLL-NEXT: [[TMP18:%.*]] = extractelement <4 x i1> [[TMP2]], i32 3 +; UNROLL-NEXT: [[TMP18:%.*]] = extractelement <4 x i1> [[TMP2]], i64 3 ; UNROLL-NEXT: br i1 [[TMP18]], label [[PRED_UDIV_IF10:%.*]], label [[PRED_UDIV_CONTINUE11:%.*]] ; UNROLL: pred.udiv.if10: ; UNROLL-NEXT: [[TMP19:%.*]] = add i32 [[OFFSET_IDX]], -3 ; UNROLL-NEXT: [[TMP20:%.*]] = udiv i32 219220132, [[TMP19]] -; UNROLL-NEXT: [[TMP21:%.*]] = insertelement <4 x i32> [[TMP17]], i32 [[TMP20]], i32 3 +; UNROLL-NEXT: [[TMP21:%.*]] = insertelement <4 x i32> [[TMP17]], i32 [[TMP20]], i64 3 ; UNROLL-NEXT: br label [[PRED_UDIV_CONTINUE11]] ; UNROLL: pred.udiv.continue11: ; UNROLL-NEXT: [[TMP22:%.*]] = phi <4 x i32> [ [[TMP17]], [[PRED_UDIV_CONTINUE9]] ], [ [[TMP21]], [[PRED_UDIV_IF10]] ] -; UNROLL-NEXT: [[TMP23:%.*]] = extractelement <4 x i1> [[TMP3]], i32 0 +; UNROLL-NEXT: [[TMP23:%.*]] = extractelement <4 x i1> [[TMP3]], i64 0 ; UNROLL-NEXT: br i1 [[TMP23]], label [[PRED_UDIV_IF12:%.*]], label [[PRED_UDIV_CONTINUE13:%.*]] ; UNROLL: pred.udiv.if12: ; UNROLL-NEXT: [[TMP24:%.*]] = add i32 [[OFFSET_IDX]], -4 ; UNROLL-NEXT: [[TMP25:%.*]] = udiv i32 219220132, [[TMP24]] -; UNROLL-NEXT: [[TMP26:%.*]] = insertelement <4 x i32> poison, i32 [[TMP25]], i32 0 +; UNROLL-NEXT: [[TMP26:%.*]] = insertelement <4 x i32> poison, i32 [[TMP25]], i64 0 ; UNROLL-NEXT: br label [[PRED_UDIV_CONTINUE13]] ; UNROLL: pred.udiv.continue13: ; UNROLL-NEXT: [[TMP27:%.*]] = phi <4 x i32> [ poison, [[PRED_UDIV_CONTINUE11]] ], [ [[TMP26]], [[PRED_UDIV_IF12]] ] -; UNROLL-NEXT: [[TMP28:%.*]] = extractelement <4 x i1> [[TMP3]], i32 1 +; UNROLL-NEXT: [[TMP28:%.*]] = extractelement <4 x i1> [[TMP3]], i64 1 ; UNROLL-NEXT: br i1 [[TMP28]], label [[PRED_UDIV_IF14:%.*]], label [[PRED_UDIV_CONTINUE15:%.*]] ; UNROLL: pred.udiv.if14: ; UNROLL-NEXT: [[TMP29:%.*]] = add i32 [[OFFSET_IDX]], -5 ; UNROLL-NEXT: [[TMP30:%.*]] = udiv i32 219220132, [[TMP29]] -; UNROLL-NEXT: [[TMP31:%.*]] = insertelement <4 x i32> [[TMP27]], i32 [[TMP30]], i32 1 +; UNROLL-NEXT: [[TMP31:%.*]] = insertelement <4 x i32> [[TMP27]], i32 [[TMP30]], i64 1 ; UNROLL-NEXT: br label [[PRED_UDIV_CONTINUE15]] ; UNROLL: pred.udiv.continue15: ; UNROLL-NEXT: [[TMP32:%.*]] = phi <4 x i32> [ [[TMP27]], [[PRED_UDIV_CONTINUE13]] ], [ [[TMP31]], [[PRED_UDIV_IF14]] ] -; UNROLL-NEXT: [[TMP33:%.*]] = extractelement <4 x i1> [[TMP3]], i32 2 +; UNROLL-NEXT: [[TMP33:%.*]] = extractelement <4 x i1> [[TMP3]], i64 2 ; UNROLL-NEXT: br i1 [[TMP33]], label [[PRED_UDIV_IF16:%.*]], label [[PRED_UDIV_CONTINUE17:%.*]] ; UNROLL: pred.udiv.if16: ; UNROLL-NEXT: [[TMP34:%.*]] = add i32 [[OFFSET_IDX]], -6 ; UNROLL-NEXT: [[TMP35:%.*]] = udiv i32 219220132, [[TMP34]] -; UNROLL-NEXT: [[TMP36:%.*]] = insertelement <4 x i32> [[TMP32]], i32 [[TMP35]], i32 2 +; UNROLL-NEXT: [[TMP36:%.*]] = insertelement <4 x i32> [[TMP32]], i32 [[TMP35]], i64 2 ; UNROLL-NEXT: br label [[PRED_UDIV_CONTINUE17]] ; UNROLL: pred.udiv.continue17: ; UNROLL-NEXT: [[TMP37:%.*]] = phi <4 x i32> [ [[TMP32]], [[PRED_UDIV_CONTINUE15]] ], [ [[TMP36]], [[PRED_UDIV_IF16]] ] -; UNROLL-NEXT: [[TMP38:%.*]] = extractelement <4 x i1> [[TMP3]], i32 3 +; UNROLL-NEXT: [[TMP38:%.*]] = extractelement <4 x i1> [[TMP3]], i64 3 ; UNROLL-NEXT: br i1 [[TMP38]], label [[PRED_UDIV_IF18:%.*]], label [[PRED_UDIV_CONTINUE19]] ; UNROLL: pred.udiv.if18: ; UNROLL-NEXT: [[TMP39:%.*]] = add i32 [[OFFSET_IDX]], -7 ; UNROLL-NEXT: [[TMP40:%.*]] = udiv i32 219220132, [[TMP39]] -; UNROLL-NEXT: [[TMP41:%.*]] = insertelement <4 x i32> [[TMP37]], i32 [[TMP40]], i32 3 +; UNROLL-NEXT: [[TMP41:%.*]] = insertelement <4 x i32> [[TMP37]], i32 [[TMP40]], i64 3 ; UNROLL-NEXT: br label [[PRED_UDIV_CONTINUE19]] ; UNROLL: pred.udiv.continue19: ; UNROLL-NEXT: [[TMP42]] = phi <4 x i32> [ [[TMP37]], [[PRED_UDIV_CONTINUE17]] ], [ [[TMP41]], [[PRED_UDIV_IF18]] ] @@ -5822,7 +5822,7 @@ ; CHECK-NEXT: [[N_RND_UP:%.*]] = add i32 [[TMP1]], 3 ; CHECK-NEXT: [[N_VEC:%.*]] = and i32 [[N_RND_UP]], -4 ; CHECK-NEXT: [[TRIP_COUNT_MINUS_1:%.*]] = add i32 [[TMP1]], -1 -; CHECK-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <4 x i32> poison, i32 [[TRIP_COUNT_MINUS_1]], i32 0 +; CHECK-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <4 x i32> poison, i32 [[TRIP_COUNT_MINUS_1]], i64 0 ; CHECK-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector <4 x i32> [[BROADCAST_SPLATINSERT]], <4 x i32> poison, <4 x i32> zeroinitializer ; CHECK-NEXT: br label [[VECTOR_BODY:%.*]] ; CHECK: vector.body: @@ -5835,41 +5835,41 @@ ; CHECK-NEXT: [[TMP3:%.*]] = add i32 [[OFFSET_IDX]], -2 ; CHECK-NEXT: [[TMP4:%.*]] = add i32 [[OFFSET_IDX]], -3 ; CHECK-NEXT: [[TMP5:%.*]] = icmp ule <4 x i32> [[VEC_IND2]], [[BROADCAST_SPLAT]] -; CHECK-NEXT: [[TMP6:%.*]] = extractelement <4 x i1> [[TMP5]], i32 0 +; CHECK-NEXT: [[TMP6:%.*]] = extractelement <4 x i1> [[TMP5]], i64 0 ; CHECK-NEXT: br i1 [[TMP6]], label [[PRED_UDIV_IF:%.*]], label [[PRED_UDIV_CONTINUE:%.*]] ; CHECK: pred.udiv.if: ; CHECK-NEXT: [[TMP7:%.*]] = udiv i32 219220132, [[OFFSET_IDX]] -; CHECK-NEXT: [[TMP8:%.*]] = insertelement <4 x i32> poison, i32 [[TMP7]], i32 0 +; CHECK-NEXT: [[TMP8:%.*]] = insertelement <4 x i32> poison, i32 [[TMP7]], i64 0 ; CHECK-NEXT: br label [[PRED_UDIV_CONTINUE]] ; CHECK: pred.udiv.continue: ; CHECK-NEXT: [[TMP9:%.*]] = phi <4 x i32> [ poison, [[VECTOR_BODY]] ], [ [[TMP8]], [[PRED_UDIV_IF]] ] -; CHECK-NEXT: [[TMP10:%.*]] = extractelement <4 x i1> [[TMP5]], i32 1 +; CHECK-NEXT: [[TMP10:%.*]] = extractelement <4 x i1> [[TMP5]], i64 1 ; CHECK-NEXT: br i1 [[TMP10]], label [[PRED_UDIV_IF4:%.*]], label [[PRED_UDIV_CONTINUE5:%.*]] ; CHECK: pred.udiv.if4: ; CHECK-NEXT: [[TMP11:%.*]] = udiv i32 219220132, [[TMP2]] -; CHECK-NEXT: [[TMP12:%.*]] = insertelement <4 x i32> [[TMP9]], i32 [[TMP11]], i32 1 +; CHECK-NEXT: [[TMP12:%.*]] = insertelement <4 x i32> [[TMP9]], i32 [[TMP11]], i64 1 ; CHECK-NEXT: br label [[PRED_UDIV_CONTINUE5]] ; CHECK: pred.udiv.continue5: ; CHECK-NEXT: [[TMP13:%.*]] = phi <4 x i32> [ [[TMP9]], [[PRED_UDIV_CONTINUE]] ], [ [[TMP12]], [[PRED_UDIV_IF4]] ] -; CHECK-NEXT: [[TMP14:%.*]] = extractelement <4 x i1> [[TMP5]], i32 2 +; CHECK-NEXT: [[TMP14:%.*]] = extractelement <4 x i1> [[TMP5]], i64 2 ; CHECK-NEXT: br i1 [[TMP14]], label [[PRED_UDIV_IF6:%.*]], label [[PRED_UDIV_CONTINUE7:%.*]] ; CHECK: pred.udiv.if6: ; CHECK-NEXT: [[TMP15:%.*]] = udiv i32 219220132, [[TMP3]] -; CHECK-NEXT: [[TMP16:%.*]] = insertelement <4 x i32> [[TMP13]], i32 [[TMP15]], i32 2 +; CHECK-NEXT: [[TMP16:%.*]] = insertelement <4 x i32> [[TMP13]], i32 [[TMP15]], i64 2 ; CHECK-NEXT: br label [[PRED_UDIV_CONTINUE7]] ; CHECK: pred.udiv.continue7: ; CHECK-NEXT: [[TMP17:%.*]] = phi <4 x i32> [ [[TMP13]], [[PRED_UDIV_CONTINUE5]] ], [ [[TMP16]], [[PRED_UDIV_IF6]] ] -; CHECK-NEXT: [[TMP18:%.*]] = extractelement <4 x i1> [[TMP5]], i32 3 +; CHECK-NEXT: [[TMP18:%.*]] = extractelement <4 x i1> [[TMP5]], i64 3 ; CHECK-NEXT: br i1 [[TMP18]], label [[PRED_UDIV_IF8:%.*]], label [[PRED_UDIV_CONTINUE9:%.*]] ; CHECK: pred.udiv.if8: ; CHECK-NEXT: [[TMP19:%.*]] = udiv i32 219220132, [[TMP4]] -; CHECK-NEXT: [[TMP20:%.*]] = insertelement <4 x i32> [[TMP17]], i32 [[TMP19]], i32 3 +; CHECK-NEXT: [[TMP20:%.*]] = insertelement <4 x i32> [[TMP17]], i32 [[TMP19]], i64 3 ; CHECK-NEXT: br label [[PRED_UDIV_CONTINUE9]] ; CHECK: pred.udiv.continue9: ; CHECK-NEXT: [[TMP21]] = phi <4 x i32> [ [[TMP17]], [[PRED_UDIV_CONTINUE7]] ], [ [[TMP20]], [[PRED_UDIV_IF8]] ] ; CHECK-NEXT: [[TMP22:%.*]] = shufflevector <4 x i32> [[VECTOR_RECUR]], <4 x i32> [[TMP21]], <4 x i32> ; CHECK-NEXT: [[TMP23]] = add <4 x i32> [[VEC_PHI]], [[TMP22]] -; CHECK-NEXT: [[TMP24:%.*]] = extractelement <4 x i1> [[TMP5]], i32 0 +; CHECK-NEXT: [[TMP24:%.*]] = extractelement <4 x i1> [[TMP5]], i64 0 ; CHECK-NEXT: br i1 [[TMP24]], label [[PRED_STORE_IF:%.*]], label [[PRED_STORE_CONTINUE:%.*]] ; CHECK: pred.store.if: ; CHECK-NEXT: [[TMP25:%.*]] = sext i32 [[INDEX]] to i64 @@ -5877,7 +5877,7 @@ ; CHECK-NEXT: store i32 [[OFFSET_IDX]], i32* [[TMP26]], align 4 ; CHECK-NEXT: br label [[PRED_STORE_CONTINUE]] ; CHECK: pred.store.continue: -; CHECK-NEXT: [[TMP27:%.*]] = extractelement <4 x i1> [[TMP5]], i32 1 +; CHECK-NEXT: [[TMP27:%.*]] = extractelement <4 x i1> [[TMP5]], i64 1 ; CHECK-NEXT: br i1 [[TMP27]], label [[PRED_STORE_IF10:%.*]], label [[PRED_STORE_CONTINUE11:%.*]] ; CHECK: pred.store.if10: ; CHECK-NEXT: [[TMP28:%.*]] = or i32 [[INDEX]], 1 @@ -5886,7 +5886,7 @@ ; CHECK-NEXT: store i32 [[TMP2]], i32* [[TMP30]], align 4 ; CHECK-NEXT: br label [[PRED_STORE_CONTINUE11]] ; CHECK: pred.store.continue11: -; CHECK-NEXT: [[TMP31:%.*]] = extractelement <4 x i1> [[TMP5]], i32 2 +; CHECK-NEXT: [[TMP31:%.*]] = extractelement <4 x i1> [[TMP5]], i64 2 ; CHECK-NEXT: br i1 [[TMP31]], label [[PRED_STORE_IF12:%.*]], label [[PRED_STORE_CONTINUE13:%.*]] ; CHECK: pred.store.if12: ; CHECK-NEXT: [[TMP32:%.*]] = or i32 [[INDEX]], 2 @@ -5895,7 +5895,7 @@ ; CHECK-NEXT: store i32 [[TMP3]], i32* [[TMP34]], align 4 ; CHECK-NEXT: br label [[PRED_STORE_CONTINUE13]] ; CHECK: pred.store.continue13: -; CHECK-NEXT: [[TMP35:%.*]] = extractelement <4 x i1> [[TMP5]], i32 3 +; CHECK-NEXT: [[TMP35:%.*]] = extractelement <4 x i1> [[TMP5]], i64 3 ; CHECK-NEXT: br i1 [[TMP35]], label [[PRED_STORE_IF14:%.*]], label [[PRED_STORE_CONTINUE15]] ; CHECK: pred.store.if14: ; CHECK-NEXT: [[TMP36:%.*]] = or i32 [[INDEX]], 3 @@ -5930,7 +5930,7 @@ ; UNROLL-NEXT: [[N_RND_UP:%.*]] = add i32 [[TMP1]], 7 ; UNROLL-NEXT: [[N_VEC:%.*]] = and i32 [[N_RND_UP]], -8 ; UNROLL-NEXT: [[TRIP_COUNT_MINUS_1:%.*]] = add i32 [[TMP1]], -1 -; UNROLL-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <4 x i32> poison, i32 [[TRIP_COUNT_MINUS_1]], i32 0 +; UNROLL-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <4 x i32> poison, i32 [[TRIP_COUNT_MINUS_1]], i64 0 ; UNROLL-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector <4 x i32> [[BROADCAST_SPLATINSERT]], <4 x i32> poison, <4 x i32> zeroinitializer ; UNROLL-NEXT: br label [[VECTOR_BODY:%.*]] ; UNROLL: vector.body: @@ -5950,67 +5950,67 @@ ; UNROLL-NEXT: [[STEP_ADD4:%.*]] = add <4 x i32> [[VEC_IND3]], ; UNROLL-NEXT: [[TMP9:%.*]] = icmp ule <4 x i32> [[VEC_IND3]], [[BROADCAST_SPLAT]] ; UNROLL-NEXT: [[TMP10:%.*]] = icmp ule <4 x i32> [[STEP_ADD4]], [[BROADCAST_SPLAT]] -; UNROLL-NEXT: [[TMP11:%.*]] = extractelement <4 x i1> [[TMP9]], i32 0 +; UNROLL-NEXT: [[TMP11:%.*]] = extractelement <4 x i1> [[TMP9]], i64 0 ; UNROLL-NEXT: br i1 [[TMP11]], label [[PRED_UDIV_IF:%.*]], label [[PRED_UDIV_CONTINUE:%.*]] ; UNROLL: pred.udiv.if: ; UNROLL-NEXT: [[TMP12:%.*]] = udiv i32 219220132, [[OFFSET_IDX]] -; UNROLL-NEXT: [[TMP13:%.*]] = insertelement <4 x i32> poison, i32 [[TMP12]], i32 0 +; UNROLL-NEXT: [[TMP13:%.*]] = insertelement <4 x i32> poison, i32 [[TMP12]], i64 0 ; UNROLL-NEXT: br label [[PRED_UDIV_CONTINUE]] ; UNROLL: pred.udiv.continue: ; UNROLL-NEXT: [[TMP14:%.*]] = phi <4 x i32> [ poison, [[VECTOR_BODY]] ], [ [[TMP13]], [[PRED_UDIV_IF]] ] -; UNROLL-NEXT: [[TMP15:%.*]] = extractelement <4 x i1> [[TMP9]], i32 1 +; UNROLL-NEXT: [[TMP15:%.*]] = extractelement <4 x i1> [[TMP9]], i64 1 ; UNROLL-NEXT: br i1 [[TMP15]], label [[PRED_UDIV_IF8:%.*]], label [[PRED_UDIV_CONTINUE9:%.*]] ; UNROLL: pred.udiv.if8: ; UNROLL-NEXT: [[TMP16:%.*]] = udiv i32 219220132, [[TMP2]] -; UNROLL-NEXT: [[TMP17:%.*]] = insertelement <4 x i32> [[TMP14]], i32 [[TMP16]], i32 1 +; UNROLL-NEXT: [[TMP17:%.*]] = insertelement <4 x i32> [[TMP14]], i32 [[TMP16]], i64 1 ; UNROLL-NEXT: br label [[PRED_UDIV_CONTINUE9]] ; UNROLL: pred.udiv.continue9: ; UNROLL-NEXT: [[TMP18:%.*]] = phi <4 x i32> [ [[TMP14]], [[PRED_UDIV_CONTINUE]] ], [ [[TMP17]], [[PRED_UDIV_IF8]] ] -; UNROLL-NEXT: [[TMP19:%.*]] = extractelement <4 x i1> [[TMP9]], i32 2 +; UNROLL-NEXT: [[TMP19:%.*]] = extractelement <4 x i1> [[TMP9]], i64 2 ; UNROLL-NEXT: br i1 [[TMP19]], label [[PRED_UDIV_IF10:%.*]], label [[PRED_UDIV_CONTINUE11:%.*]] ; UNROLL: pred.udiv.if10: ; UNROLL-NEXT: [[TMP20:%.*]] = udiv i32 219220132, [[TMP3]] -; UNROLL-NEXT: [[TMP21:%.*]] = insertelement <4 x i32> [[TMP18]], i32 [[TMP20]], i32 2 +; UNROLL-NEXT: [[TMP21:%.*]] = insertelement <4 x i32> [[TMP18]], i32 [[TMP20]], i64 2 ; UNROLL-NEXT: br label [[PRED_UDIV_CONTINUE11]] ; UNROLL: pred.udiv.continue11: ; UNROLL-NEXT: [[TMP22:%.*]] = phi <4 x i32> [ [[TMP18]], [[PRED_UDIV_CONTINUE9]] ], [ [[TMP21]], [[PRED_UDIV_IF10]] ] -; UNROLL-NEXT: [[TMP23:%.*]] = extractelement <4 x i1> [[TMP9]], i32 3 +; UNROLL-NEXT: [[TMP23:%.*]] = extractelement <4 x i1> [[TMP9]], i64 3 ; UNROLL-NEXT: br i1 [[TMP23]], label [[PRED_UDIV_IF12:%.*]], label [[PRED_UDIV_CONTINUE13:%.*]] ; UNROLL: pred.udiv.if12: ; UNROLL-NEXT: [[TMP24:%.*]] = udiv i32 219220132, [[TMP4]] -; UNROLL-NEXT: [[TMP25:%.*]] = insertelement <4 x i32> [[TMP22]], i32 [[TMP24]], i32 3 +; UNROLL-NEXT: [[TMP25:%.*]] = insertelement <4 x i32> [[TMP22]], i32 [[TMP24]], i64 3 ; UNROLL-NEXT: br label [[PRED_UDIV_CONTINUE13]] ; UNROLL: pred.udiv.continue13: ; UNROLL-NEXT: [[TMP26:%.*]] = phi <4 x i32> [ [[TMP22]], [[PRED_UDIV_CONTINUE11]] ], [ [[TMP25]], [[PRED_UDIV_IF12]] ] -; UNROLL-NEXT: [[TMP27:%.*]] = extractelement <4 x i1> [[TMP10]], i32 0 +; UNROLL-NEXT: [[TMP27:%.*]] = extractelement <4 x i1> [[TMP10]], i64 0 ; UNROLL-NEXT: br i1 [[TMP27]], label [[PRED_UDIV_IF14:%.*]], label [[PRED_UDIV_CONTINUE15:%.*]] ; UNROLL: pred.udiv.if14: ; UNROLL-NEXT: [[TMP28:%.*]] = udiv i32 219220132, [[TMP5]] -; UNROLL-NEXT: [[TMP29:%.*]] = insertelement <4 x i32> poison, i32 [[TMP28]], i32 0 +; UNROLL-NEXT: [[TMP29:%.*]] = insertelement <4 x i32> poison, i32 [[TMP28]], i64 0 ; UNROLL-NEXT: br label [[PRED_UDIV_CONTINUE15]] ; UNROLL: pred.udiv.continue15: ; UNROLL-NEXT: [[TMP30:%.*]] = phi <4 x i32> [ poison, [[PRED_UDIV_CONTINUE13]] ], [ [[TMP29]], [[PRED_UDIV_IF14]] ] -; UNROLL-NEXT: [[TMP31:%.*]] = extractelement <4 x i1> [[TMP10]], i32 1 +; UNROLL-NEXT: [[TMP31:%.*]] = extractelement <4 x i1> [[TMP10]], i64 1 ; UNROLL-NEXT: br i1 [[TMP31]], label [[PRED_UDIV_IF16:%.*]], label [[PRED_UDIV_CONTINUE17:%.*]] ; UNROLL: pred.udiv.if16: ; UNROLL-NEXT: [[TMP32:%.*]] = udiv i32 219220132, [[TMP6]] -; UNROLL-NEXT: [[TMP33:%.*]] = insertelement <4 x i32> [[TMP30]], i32 [[TMP32]], i32 1 +; UNROLL-NEXT: [[TMP33:%.*]] = insertelement <4 x i32> [[TMP30]], i32 [[TMP32]], i64 1 ; UNROLL-NEXT: br label [[PRED_UDIV_CONTINUE17]] ; UNROLL: pred.udiv.continue17: ; UNROLL-NEXT: [[TMP34:%.*]] = phi <4 x i32> [ [[TMP30]], [[PRED_UDIV_CONTINUE15]] ], [ [[TMP33]], [[PRED_UDIV_IF16]] ] -; UNROLL-NEXT: [[TMP35:%.*]] = extractelement <4 x i1> [[TMP10]], i32 2 +; UNROLL-NEXT: [[TMP35:%.*]] = extractelement <4 x i1> [[TMP10]], i64 2 ; UNROLL-NEXT: br i1 [[TMP35]], label [[PRED_UDIV_IF18:%.*]], label [[PRED_UDIV_CONTINUE19:%.*]] ; UNROLL: pred.udiv.if18: ; UNROLL-NEXT: [[TMP36:%.*]] = udiv i32 219220132, [[TMP7]] -; UNROLL-NEXT: [[TMP37:%.*]] = insertelement <4 x i32> [[TMP34]], i32 [[TMP36]], i32 2 +; UNROLL-NEXT: [[TMP37:%.*]] = insertelement <4 x i32> [[TMP34]], i32 [[TMP36]], i64 2 ; UNROLL-NEXT: br label [[PRED_UDIV_CONTINUE19]] ; UNROLL: pred.udiv.continue19: ; UNROLL-NEXT: [[TMP38:%.*]] = phi <4 x i32> [ [[TMP34]], [[PRED_UDIV_CONTINUE17]] ], [ [[TMP37]], [[PRED_UDIV_IF18]] ] -; UNROLL-NEXT: [[TMP39:%.*]] = extractelement <4 x i1> [[TMP10]], i32 3 +; UNROLL-NEXT: [[TMP39:%.*]] = extractelement <4 x i1> [[TMP10]], i64 3 ; UNROLL-NEXT: br i1 [[TMP39]], label [[PRED_UDIV_IF20:%.*]], label [[PRED_UDIV_CONTINUE21:%.*]] ; UNROLL: pred.udiv.if20: ; UNROLL-NEXT: [[TMP40:%.*]] = udiv i32 219220132, [[TMP8]] -; UNROLL-NEXT: [[TMP41:%.*]] = insertelement <4 x i32> [[TMP38]], i32 [[TMP40]], i32 3 +; UNROLL-NEXT: [[TMP41:%.*]] = insertelement <4 x i32> [[TMP38]], i32 [[TMP40]], i64 3 ; UNROLL-NEXT: br label [[PRED_UDIV_CONTINUE21]] ; UNROLL: pred.udiv.continue21: ; UNROLL-NEXT: [[TMP42]] = phi <4 x i32> [ [[TMP38]], [[PRED_UDIV_CONTINUE19]] ], [ [[TMP41]], [[PRED_UDIV_IF20]] ] @@ -6018,7 +6018,7 @@ ; UNROLL-NEXT: [[TMP44:%.*]] = shufflevector <4 x i32> [[TMP26]], <4 x i32> [[TMP42]], <4 x i32> ; UNROLL-NEXT: [[TMP45]] = add <4 x i32> [[VEC_PHI]], [[TMP43]] ; UNROLL-NEXT: [[TMP46]] = add <4 x i32> [[VEC_PHI7]], [[TMP44]] -; UNROLL-NEXT: [[TMP47:%.*]] = extractelement <4 x i1> [[TMP9]], i32 0 +; UNROLL-NEXT: [[TMP47:%.*]] = extractelement <4 x i1> [[TMP9]], i64 0 ; UNROLL-NEXT: br i1 [[TMP47]], label [[PRED_STORE_IF:%.*]], label [[PRED_STORE_CONTINUE:%.*]] ; UNROLL: pred.store.if: ; UNROLL-NEXT: [[TMP48:%.*]] = sext i32 [[INDEX]] to i64 @@ -6026,7 +6026,7 @@ ; UNROLL-NEXT: store i32 [[OFFSET_IDX]], i32* [[TMP49]], align 4 ; UNROLL-NEXT: br label [[PRED_STORE_CONTINUE]] ; UNROLL: pred.store.continue: -; UNROLL-NEXT: [[TMP50:%.*]] = extractelement <4 x i1> [[TMP9]], i32 1 +; UNROLL-NEXT: [[TMP50:%.*]] = extractelement <4 x i1> [[TMP9]], i64 1 ; UNROLL-NEXT: br i1 [[TMP50]], label [[PRED_STORE_IF22:%.*]], label [[PRED_STORE_CONTINUE23:%.*]] ; UNROLL: pred.store.if22: ; UNROLL-NEXT: [[TMP51:%.*]] = or i32 [[INDEX]], 1 @@ -6035,7 +6035,7 @@ ; UNROLL-NEXT: store i32 [[TMP2]], i32* [[TMP53]], align 4 ; UNROLL-NEXT: br label [[PRED_STORE_CONTINUE23]] ; UNROLL: pred.store.continue23: -; UNROLL-NEXT: [[TMP54:%.*]] = extractelement <4 x i1> [[TMP9]], i32 2 +; UNROLL-NEXT: [[TMP54:%.*]] = extractelement <4 x i1> [[TMP9]], i64 2 ; UNROLL-NEXT: br i1 [[TMP54]], label [[PRED_STORE_IF24:%.*]], label [[PRED_STORE_CONTINUE25:%.*]] ; UNROLL: pred.store.if24: ; UNROLL-NEXT: [[TMP55:%.*]] = or i32 [[INDEX]], 2 @@ -6044,7 +6044,7 @@ ; UNROLL-NEXT: store i32 [[TMP3]], i32* [[TMP57]], align 4 ; UNROLL-NEXT: br label [[PRED_STORE_CONTINUE25]] ; UNROLL: pred.store.continue25: -; UNROLL-NEXT: [[TMP58:%.*]] = extractelement <4 x i1> [[TMP9]], i32 3 +; UNROLL-NEXT: [[TMP58:%.*]] = extractelement <4 x i1> [[TMP9]], i64 3 ; UNROLL-NEXT: br i1 [[TMP58]], label [[PRED_STORE_IF26:%.*]], label [[PRED_STORE_CONTINUE27:%.*]] ; UNROLL: pred.store.if26: ; UNROLL-NEXT: [[TMP59:%.*]] = or i32 [[INDEX]], 3 @@ -6053,7 +6053,7 @@ ; UNROLL-NEXT: store i32 [[TMP4]], i32* [[TMP61]], align 4 ; UNROLL-NEXT: br label [[PRED_STORE_CONTINUE27]] ; UNROLL: pred.store.continue27: -; UNROLL-NEXT: [[TMP62:%.*]] = extractelement <4 x i1> [[TMP10]], i32 0 +; UNROLL-NEXT: [[TMP62:%.*]] = extractelement <4 x i1> [[TMP10]], i64 0 ; UNROLL-NEXT: br i1 [[TMP62]], label [[PRED_STORE_IF28:%.*]], label [[PRED_STORE_CONTINUE29:%.*]] ; UNROLL: pred.store.if28: ; UNROLL-NEXT: [[TMP63:%.*]] = or i32 [[INDEX]], 4 @@ -6062,7 +6062,7 @@ ; UNROLL-NEXT: store i32 [[TMP5]], i32* [[TMP65]], align 4 ; UNROLL-NEXT: br label [[PRED_STORE_CONTINUE29]] ; UNROLL: pred.store.continue29: -; UNROLL-NEXT: [[TMP66:%.*]] = extractelement <4 x i1> [[TMP10]], i32 1 +; UNROLL-NEXT: [[TMP66:%.*]] = extractelement <4 x i1> [[TMP10]], i64 1 ; UNROLL-NEXT: br i1 [[TMP66]], label [[PRED_STORE_IF30:%.*]], label [[PRED_STORE_CONTINUE31:%.*]] ; UNROLL: pred.store.if30: ; UNROLL-NEXT: [[TMP67:%.*]] = or i32 [[INDEX]], 5 @@ -6071,7 +6071,7 @@ ; UNROLL-NEXT: store i32 [[TMP6]], i32* [[TMP69]], align 4 ; UNROLL-NEXT: br label [[PRED_STORE_CONTINUE31]] ; UNROLL: pred.store.continue31: -; UNROLL-NEXT: [[TMP70:%.*]] = extractelement <4 x i1> [[TMP10]], i32 2 +; UNROLL-NEXT: [[TMP70:%.*]] = extractelement <4 x i1> [[TMP10]], i64 2 ; UNROLL-NEXT: br i1 [[TMP70]], label [[PRED_STORE_IF32:%.*]], label [[PRED_STORE_CONTINUE33:%.*]] ; UNROLL: pred.store.if32: ; UNROLL-NEXT: [[TMP71:%.*]] = or i32 [[INDEX]], 6 @@ -6080,7 +6080,7 @@ ; UNROLL-NEXT: store i32 [[TMP7]], i32* [[TMP73]], align 4 ; UNROLL-NEXT: br label [[PRED_STORE_CONTINUE33]] ; UNROLL: pred.store.continue33: -; UNROLL-NEXT: [[TMP74:%.*]] = extractelement <4 x i1> [[TMP10]], i32 3 +; UNROLL-NEXT: [[TMP74:%.*]] = extractelement <4 x i1> [[TMP10]], i64 3 ; UNROLL-NEXT: br i1 [[TMP74]], label [[PRED_STORE_IF34:%.*]], label [[PRED_STORE_CONTINUE35]] ; UNROLL: pred.store.if34: ; UNROLL-NEXT: [[TMP75:%.*]] = or i32 [[INDEX]], 7 diff --git a/llvm/test/Transforms/LoopVectorize/float-induction.ll b/llvm/test/Transforms/LoopVectorize/float-induction.ll --- a/llvm/test/Transforms/LoopVectorize/float-induction.ll +++ b/llvm/test/Transforms/LoopVectorize/float-induction.ll @@ -34,14 +34,14 @@ ; VEC4_INTERL1-NEXT: [[CAST_CRD:%.*]] = sitofp i64 [[N_VEC]] to float ; VEC4_INTERL1-NEXT: [[TMP3:%.*]] = fmul fast float [[FPINC]], [[CAST_CRD]] ; VEC4_INTERL1-NEXT: [[IND_END:%.*]] = fsub fast float [[INIT:%.*]], [[TMP3]] -; VEC4_INTERL1-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <4 x float> poison, float [[INIT]], i32 0 +; VEC4_INTERL1-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <4 x float> poison, float [[INIT]], i64 0 ; VEC4_INTERL1-NEXT: [[DOTSPLAT:%.*]] = shufflevector <4 x float> [[DOTSPLATINSERT]], <4 x float> poison, <4 x i32> zeroinitializer -; VEC4_INTERL1-NEXT: [[DOTSPLATINSERT2:%.*]] = insertelement <4 x float> poison, float [[FPINC]], i32 0 +; VEC4_INTERL1-NEXT: [[DOTSPLATINSERT2:%.*]] = insertelement <4 x float> poison, float [[FPINC]], i64 0 ; VEC4_INTERL1-NEXT: [[DOTSPLAT3:%.*]] = shufflevector <4 x float> [[DOTSPLATINSERT2]], <4 x float> poison, <4 x i32> zeroinitializer ; VEC4_INTERL1-NEXT: [[TMP4:%.*]] = fmul fast <4 x float> [[DOTSPLAT3]], ; VEC4_INTERL1-NEXT: [[INDUCTION:%.*]] = fsub fast <4 x float> [[DOTSPLAT]], [[TMP4]] ; VEC4_INTERL1-NEXT: [[TMP5:%.*]] = fmul fast float [[FPINC]], 4.000000e+00 -; VEC4_INTERL1-NEXT: [[DOTSPLATINSERT4:%.*]] = insertelement <4 x float> poison, float [[TMP5]], i32 0 +; VEC4_INTERL1-NEXT: [[DOTSPLATINSERT4:%.*]] = insertelement <4 x float> poison, float [[TMP5]], i64 0 ; VEC4_INTERL1-NEXT: [[DOTSPLAT5:%.*]] = shufflevector <4 x float> [[DOTSPLATINSERT4]], <4 x float> poison, <4 x i32> zeroinitializer ; VEC4_INTERL1-NEXT: br label [[VECTOR_BODY:%.*]] ; VEC4_INTERL1: vector.body: @@ -92,14 +92,14 @@ ; VEC4_INTERL2-NEXT: [[CAST_CRD:%.*]] = sitofp i64 [[N_VEC]] to float ; VEC4_INTERL2-NEXT: [[TMP3:%.*]] = fmul fast float [[FPINC]], [[CAST_CRD]] ; VEC4_INTERL2-NEXT: [[IND_END:%.*]] = fsub fast float [[INIT:%.*]], [[TMP3]] -; VEC4_INTERL2-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <4 x float> poison, float [[INIT]], i32 0 +; VEC4_INTERL2-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <4 x float> poison, float [[INIT]], i64 0 ; VEC4_INTERL2-NEXT: [[DOTSPLAT:%.*]] = shufflevector <4 x float> [[DOTSPLATINSERT]], <4 x float> poison, <4 x i32> zeroinitializer -; VEC4_INTERL2-NEXT: [[DOTSPLATINSERT2:%.*]] = insertelement <4 x float> poison, float [[FPINC]], i32 0 +; VEC4_INTERL2-NEXT: [[DOTSPLATINSERT2:%.*]] = insertelement <4 x float> poison, float [[FPINC]], i64 0 ; VEC4_INTERL2-NEXT: [[DOTSPLAT3:%.*]] = shufflevector <4 x float> [[DOTSPLATINSERT2]], <4 x float> poison, <4 x i32> zeroinitializer ; VEC4_INTERL2-NEXT: [[TMP4:%.*]] = fmul fast <4 x float> [[DOTSPLAT3]], ; VEC4_INTERL2-NEXT: [[INDUCTION:%.*]] = fsub fast <4 x float> [[DOTSPLAT]], [[TMP4]] ; VEC4_INTERL2-NEXT: [[TMP5:%.*]] = fmul fast float [[FPINC]], 4.000000e+00 -; VEC4_INTERL2-NEXT: [[DOTSPLATINSERT4:%.*]] = insertelement <4 x float> poison, float [[TMP5]], i32 0 +; VEC4_INTERL2-NEXT: [[DOTSPLATINSERT4:%.*]] = insertelement <4 x float> poison, float [[TMP5]], i64 0 ; VEC4_INTERL2-NEXT: [[DOTSPLAT5:%.*]] = shufflevector <4 x float> [[DOTSPLATINSERT4]], <4 x float> poison, <4 x i32> zeroinitializer ; VEC4_INTERL2-NEXT: br label [[VECTOR_BODY:%.*]] ; VEC4_INTERL2: vector.body: @@ -207,14 +207,14 @@ ; VEC2_INTERL1_PRED_STORE-NEXT: [[CAST_CRD:%.*]] = sitofp i64 [[N_VEC]] to float ; VEC2_INTERL1_PRED_STORE-NEXT: [[TMP3:%.*]] = fmul fast float [[FPINC]], [[CAST_CRD]] ; VEC2_INTERL1_PRED_STORE-NEXT: [[IND_END:%.*]] = fsub fast float [[INIT:%.*]], [[TMP3]] -; VEC2_INTERL1_PRED_STORE-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <2 x float> poison, float [[INIT]], i32 0 +; VEC2_INTERL1_PRED_STORE-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <2 x float> poison, float [[INIT]], i64 0 ; VEC2_INTERL1_PRED_STORE-NEXT: [[DOTSPLAT:%.*]] = shufflevector <2 x float> [[DOTSPLATINSERT]], <2 x float> poison, <2 x i32> zeroinitializer -; VEC2_INTERL1_PRED_STORE-NEXT: [[DOTSPLATINSERT2:%.*]] = insertelement <2 x float> poison, float [[FPINC]], i32 0 +; VEC2_INTERL1_PRED_STORE-NEXT: [[DOTSPLATINSERT2:%.*]] = insertelement <2 x float> poison, float [[FPINC]], i64 0 ; VEC2_INTERL1_PRED_STORE-NEXT: [[DOTSPLAT3:%.*]] = shufflevector <2 x float> [[DOTSPLATINSERT2]], <2 x float> poison, <2 x i32> zeroinitializer ; VEC2_INTERL1_PRED_STORE-NEXT: [[TMP4:%.*]] = fmul fast <2 x float> [[DOTSPLAT3]], ; VEC2_INTERL1_PRED_STORE-NEXT: [[INDUCTION:%.*]] = fsub fast <2 x float> [[DOTSPLAT]], [[TMP4]] ; VEC2_INTERL1_PRED_STORE-NEXT: [[TMP5:%.*]] = fmul fast float [[FPINC]], 2.000000e+00 -; VEC2_INTERL1_PRED_STORE-NEXT: [[DOTSPLATINSERT4:%.*]] = insertelement <2 x float> poison, float [[TMP5]], i32 0 +; VEC2_INTERL1_PRED_STORE-NEXT: [[DOTSPLATINSERT4:%.*]] = insertelement <2 x float> poison, float [[TMP5]], i64 0 ; VEC2_INTERL1_PRED_STORE-NEXT: [[DOTSPLAT5:%.*]] = shufflevector <2 x float> [[DOTSPLATINSERT4]], <2 x float> poison, <2 x i32> zeroinitializer ; VEC2_INTERL1_PRED_STORE-NEXT: br label [[VECTOR_BODY:%.*]] ; VEC2_INTERL1_PRED_STORE: vector.body: @@ -293,14 +293,14 @@ ; VEC4_INTERL1-NEXT: [[CAST_CRD:%.*]] = sitofp i64 [[N_VEC]] to float ; VEC4_INTERL1-NEXT: [[TMP3:%.*]] = fmul reassoc float [[FPINC]], [[CAST_CRD]] ; VEC4_INTERL1-NEXT: [[IND_END:%.*]] = fsub reassoc float [[INIT:%.*]], [[TMP3]] -; VEC4_INTERL1-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <4 x float> poison, float [[INIT]], i32 0 +; VEC4_INTERL1-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <4 x float> poison, float [[INIT]], i64 0 ; VEC4_INTERL1-NEXT: [[DOTSPLAT:%.*]] = shufflevector <4 x float> [[DOTSPLATINSERT]], <4 x float> poison, <4 x i32> zeroinitializer -; VEC4_INTERL1-NEXT: [[DOTSPLATINSERT2:%.*]] = insertelement <4 x float> poison, float [[FPINC]], i32 0 +; VEC4_INTERL1-NEXT: [[DOTSPLATINSERT2:%.*]] = insertelement <4 x float> poison, float [[FPINC]], i64 0 ; VEC4_INTERL1-NEXT: [[DOTSPLAT3:%.*]] = shufflevector <4 x float> [[DOTSPLATINSERT2]], <4 x float> poison, <4 x i32> zeroinitializer ; VEC4_INTERL1-NEXT: [[TMP4:%.*]] = fmul reassoc <4 x float> [[DOTSPLAT3]], ; VEC4_INTERL1-NEXT: [[INDUCTION:%.*]] = fsub reassoc <4 x float> [[DOTSPLAT]], [[TMP4]] ; VEC4_INTERL1-NEXT: [[TMP5:%.*]] = fmul reassoc float [[FPINC]], 4.000000e+00 -; VEC4_INTERL1-NEXT: [[DOTSPLATINSERT4:%.*]] = insertelement <4 x float> poison, float [[TMP5]], i32 0 +; VEC4_INTERL1-NEXT: [[DOTSPLATINSERT4:%.*]] = insertelement <4 x float> poison, float [[TMP5]], i64 0 ; VEC4_INTERL1-NEXT: [[DOTSPLAT5:%.*]] = shufflevector <4 x float> [[DOTSPLATINSERT4]], <4 x float> poison, <4 x i32> zeroinitializer ; VEC4_INTERL1-NEXT: br label [[VECTOR_BODY:%.*]] ; VEC4_INTERL1: vector.body: @@ -351,14 +351,14 @@ ; VEC4_INTERL2-NEXT: [[CAST_CRD:%.*]] = sitofp i64 [[N_VEC]] to float ; VEC4_INTERL2-NEXT: [[TMP3:%.*]] = fmul reassoc float [[FPINC]], [[CAST_CRD]] ; VEC4_INTERL2-NEXT: [[IND_END:%.*]] = fsub reassoc float [[INIT:%.*]], [[TMP3]] -; VEC4_INTERL2-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <4 x float> poison, float [[INIT]], i32 0 +; VEC4_INTERL2-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <4 x float> poison, float [[INIT]], i64 0 ; VEC4_INTERL2-NEXT: [[DOTSPLAT:%.*]] = shufflevector <4 x float> [[DOTSPLATINSERT]], <4 x float> poison, <4 x i32> zeroinitializer -; VEC4_INTERL2-NEXT: [[DOTSPLATINSERT2:%.*]] = insertelement <4 x float> poison, float [[FPINC]], i32 0 +; VEC4_INTERL2-NEXT: [[DOTSPLATINSERT2:%.*]] = insertelement <4 x float> poison, float [[FPINC]], i64 0 ; VEC4_INTERL2-NEXT: [[DOTSPLAT3:%.*]] = shufflevector <4 x float> [[DOTSPLATINSERT2]], <4 x float> poison, <4 x i32> zeroinitializer ; VEC4_INTERL2-NEXT: [[TMP4:%.*]] = fmul reassoc <4 x float> [[DOTSPLAT3]], ; VEC4_INTERL2-NEXT: [[INDUCTION:%.*]] = fsub reassoc <4 x float> [[DOTSPLAT]], [[TMP4]] ; VEC4_INTERL2-NEXT: [[TMP5:%.*]] = fmul reassoc float [[FPINC]], 4.000000e+00 -; VEC4_INTERL2-NEXT: [[DOTSPLATINSERT4:%.*]] = insertelement <4 x float> poison, float [[TMP5]], i32 0 +; VEC4_INTERL2-NEXT: [[DOTSPLATINSERT4:%.*]] = insertelement <4 x float> poison, float [[TMP5]], i64 0 ; VEC4_INTERL2-NEXT: [[DOTSPLAT5:%.*]] = shufflevector <4 x float> [[DOTSPLATINSERT4]], <4 x float> poison, <4 x i32> zeroinitializer ; VEC4_INTERL2-NEXT: br label [[VECTOR_BODY:%.*]] ; VEC4_INTERL2: vector.body: @@ -468,14 +468,14 @@ ; VEC2_INTERL1_PRED_STORE-NEXT: [[CAST_CRD:%.*]] = sitofp i64 [[N_VEC]] to float ; VEC2_INTERL1_PRED_STORE-NEXT: [[TMP3:%.*]] = fmul reassoc float [[FPINC]], [[CAST_CRD]] ; VEC2_INTERL1_PRED_STORE-NEXT: [[IND_END:%.*]] = fsub reassoc float [[INIT:%.*]], [[TMP3]] -; VEC2_INTERL1_PRED_STORE-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <2 x float> poison, float [[INIT]], i32 0 +; VEC2_INTERL1_PRED_STORE-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <2 x float> poison, float [[INIT]], i64 0 ; VEC2_INTERL1_PRED_STORE-NEXT: [[DOTSPLAT:%.*]] = shufflevector <2 x float> [[DOTSPLATINSERT]], <2 x float> poison, <2 x i32> zeroinitializer -; VEC2_INTERL1_PRED_STORE-NEXT: [[DOTSPLATINSERT2:%.*]] = insertelement <2 x float> poison, float [[FPINC]], i32 0 +; VEC2_INTERL1_PRED_STORE-NEXT: [[DOTSPLATINSERT2:%.*]] = insertelement <2 x float> poison, float [[FPINC]], i64 0 ; VEC2_INTERL1_PRED_STORE-NEXT: [[DOTSPLAT3:%.*]] = shufflevector <2 x float> [[DOTSPLATINSERT2]], <2 x float> poison, <2 x i32> zeroinitializer ; VEC2_INTERL1_PRED_STORE-NEXT: [[TMP4:%.*]] = fmul reassoc <2 x float> [[DOTSPLAT3]], ; VEC2_INTERL1_PRED_STORE-NEXT: [[INDUCTION:%.*]] = fsub reassoc <2 x float> [[DOTSPLAT]], [[TMP4]] ; VEC2_INTERL1_PRED_STORE-NEXT: [[TMP5:%.*]] = fmul reassoc float [[FPINC]], 2.000000e+00 -; VEC2_INTERL1_PRED_STORE-NEXT: [[DOTSPLATINSERT4:%.*]] = insertelement <2 x float> poison, float [[TMP5]], i32 0 +; VEC2_INTERL1_PRED_STORE-NEXT: [[DOTSPLATINSERT4:%.*]] = insertelement <2 x float> poison, float [[TMP5]], i64 0 ; VEC2_INTERL1_PRED_STORE-NEXT: [[DOTSPLAT5:%.*]] = shufflevector <2 x float> [[DOTSPLATINSERT4]], <2 x float> poison, <2 x i32> zeroinitializer ; VEC2_INTERL1_PRED_STORE-NEXT: br label [[VECTOR_BODY:%.*]] ; VEC2_INTERL1_PRED_STORE: vector.body: @@ -555,7 +555,7 @@ ; VEC4_INTERL1-NEXT: [[CAST_CRD:%.*]] = sitofp i64 [[N_VEC]] to float ; VEC4_INTERL1-NEXT: [[TMP3:%.*]] = fmul fast float [[CAST_CRD]], 5.000000e-01 ; VEC4_INTERL1-NEXT: [[IND_END:%.*]] = fadd fast float [[TMP3]], [[INIT:%.*]] -; VEC4_INTERL1-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <4 x float> poison, float [[INIT]], i32 0 +; VEC4_INTERL1-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <4 x float> poison, float [[INIT]], i64 0 ; VEC4_INTERL1-NEXT: [[DOTSPLAT:%.*]] = shufflevector <4 x float> [[DOTSPLATINSERT]], <4 x float> poison, <4 x i32> zeroinitializer ; VEC4_INTERL1-NEXT: [[INDUCTION:%.*]] = fadd fast <4 x float> [[DOTSPLAT]], ; VEC4_INTERL1-NEXT: br label [[VECTOR_BODY:%.*]] @@ -606,7 +606,7 @@ ; VEC4_INTERL2-NEXT: [[CAST_CRD:%.*]] = sitofp i64 [[N_VEC]] to float ; VEC4_INTERL2-NEXT: [[TMP3:%.*]] = fmul fast float [[CAST_CRD]], 5.000000e-01 ; VEC4_INTERL2-NEXT: [[IND_END:%.*]] = fadd fast float [[TMP3]], [[INIT:%.*]] -; VEC4_INTERL2-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <4 x float> poison, float [[INIT]], i32 0 +; VEC4_INTERL2-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <4 x float> poison, float [[INIT]], i64 0 ; VEC4_INTERL2-NEXT: [[DOTSPLAT:%.*]] = shufflevector <4 x float> [[DOTSPLATINSERT]], <4 x float> poison, <4 x i32> zeroinitializer ; VEC4_INTERL2-NEXT: [[INDUCTION:%.*]] = fadd fast <4 x float> [[DOTSPLAT]], ; VEC4_INTERL2-NEXT: br label [[VECTOR_BODY:%.*]] @@ -713,7 +713,7 @@ ; VEC2_INTERL1_PRED_STORE-NEXT: [[CAST_CRD:%.*]] = sitofp i64 [[N_VEC]] to float ; VEC2_INTERL1_PRED_STORE-NEXT: [[TMP3:%.*]] = fmul fast float [[CAST_CRD]], 5.000000e-01 ; VEC2_INTERL1_PRED_STORE-NEXT: [[IND_END:%.*]] = fadd fast float [[TMP3]], [[INIT:%.*]] -; VEC2_INTERL1_PRED_STORE-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <2 x float> poison, float [[INIT]], i32 0 +; VEC2_INTERL1_PRED_STORE-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <2 x float> poison, float [[INIT]], i64 0 ; VEC2_INTERL1_PRED_STORE-NEXT: [[DOTSPLAT:%.*]] = shufflevector <2 x float> [[DOTSPLATINSERT]], <2 x float> poison, <2 x i32> zeroinitializer ; VEC2_INTERL1_PRED_STORE-NEXT: [[INDUCTION:%.*]] = fadd fast <2 x float> [[DOTSPLAT]], ; VEC2_INTERL1_PRED_STORE-NEXT: br label [[VECTOR_BODY:%.*]] @@ -802,16 +802,16 @@ ; VEC4_INTERL1-NEXT: [[CAST_CRD3:%.*]] = sitofp i64 [[N_VEC]] to float ; VEC4_INTERL1-NEXT: [[TMP5:%.*]] = fmul fast float [[TMP0]], [[CAST_CRD3]] ; VEC4_INTERL1-NEXT: [[IND_END4:%.*]] = fadd fast float [[TMP5]], [[INIT:%.*]] -; VEC4_INTERL1-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <4 x float> poison, float [[INIT]], i32 0 +; VEC4_INTERL1-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <4 x float> poison, float [[INIT]], i64 0 ; VEC4_INTERL1-NEXT: [[DOTSPLAT:%.*]] = shufflevector <4 x float> [[DOTSPLATINSERT]], <4 x float> poison, <4 x i32> zeroinitializer -; VEC4_INTERL1-NEXT: [[DOTSPLATINSERT5:%.*]] = insertelement <4 x float> poison, float [[TMP0]], i32 0 +; VEC4_INTERL1-NEXT: [[DOTSPLATINSERT5:%.*]] = insertelement <4 x float> poison, float [[TMP0]], i64 0 ; VEC4_INTERL1-NEXT: [[DOTSPLAT6:%.*]] = shufflevector <4 x float> [[DOTSPLATINSERT5]], <4 x float> poison, <4 x i32> zeroinitializer ; VEC4_INTERL1-NEXT: [[TMP6:%.*]] = fmul fast <4 x float> [[DOTSPLAT6]], ; VEC4_INTERL1-NEXT: [[INDUCTION:%.*]] = fadd fast <4 x float> [[DOTSPLAT]], [[TMP6]] ; VEC4_INTERL1-NEXT: [[TMP7:%.*]] = fmul fast float [[TMP0]], 4.000000e+00 -; VEC4_INTERL1-NEXT: [[DOTSPLATINSERT7:%.*]] = insertelement <4 x float> poison, float [[TMP7]], i32 0 +; VEC4_INTERL1-NEXT: [[DOTSPLATINSERT7:%.*]] = insertelement <4 x float> poison, float [[TMP7]], i64 0 ; VEC4_INTERL1-NEXT: [[DOTSPLAT8:%.*]] = shufflevector <4 x float> [[DOTSPLATINSERT7]], <4 x float> poison, <4 x i32> zeroinitializer -; VEC4_INTERL1-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <4 x float> poison, float [[TMP0]], i32 0 +; VEC4_INTERL1-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <4 x float> poison, float [[TMP0]], i64 0 ; VEC4_INTERL1-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector <4 x float> [[BROADCAST_SPLATINSERT]], <4 x float> poison, <4 x i32> zeroinitializer ; VEC4_INTERL1-NEXT: br label [[VECTOR_BODY:%.*]] ; VEC4_INTERL1: vector.body: @@ -884,18 +884,18 @@ ; VEC4_INTERL2-NEXT: [[CAST_CRD3:%.*]] = sitofp i64 [[N_VEC]] to float ; VEC4_INTERL2-NEXT: [[TMP5:%.*]] = fmul fast float [[TMP0]], [[CAST_CRD3]] ; VEC4_INTERL2-NEXT: [[IND_END4:%.*]] = fadd fast float [[TMP5]], [[INIT:%.*]] -; VEC4_INTERL2-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <4 x float> poison, float [[INIT]], i32 0 +; VEC4_INTERL2-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <4 x float> poison, float [[INIT]], i64 0 ; VEC4_INTERL2-NEXT: [[DOTSPLAT:%.*]] = shufflevector <4 x float> [[DOTSPLATINSERT]], <4 x float> poison, <4 x i32> zeroinitializer -; VEC4_INTERL2-NEXT: [[DOTSPLATINSERT6:%.*]] = insertelement <4 x float> poison, float [[TMP0]], i32 0 +; VEC4_INTERL2-NEXT: [[DOTSPLATINSERT6:%.*]] = insertelement <4 x float> poison, float [[TMP0]], i64 0 ; VEC4_INTERL2-NEXT: [[DOTSPLAT7:%.*]] = shufflevector <4 x float> [[DOTSPLATINSERT6]], <4 x float> poison, <4 x i32> zeroinitializer ; VEC4_INTERL2-NEXT: [[TMP6:%.*]] = fmul fast <4 x float> [[DOTSPLAT7]], ; VEC4_INTERL2-NEXT: [[INDUCTION:%.*]] = fadd fast <4 x float> [[DOTSPLAT]], [[TMP6]] ; VEC4_INTERL2-NEXT: [[TMP7:%.*]] = fmul fast float [[TMP0]], 4.000000e+00 -; VEC4_INTERL2-NEXT: [[DOTSPLATINSERT8:%.*]] = insertelement <4 x float> poison, float [[TMP7]], i32 0 +; VEC4_INTERL2-NEXT: [[DOTSPLATINSERT8:%.*]] = insertelement <4 x float> poison, float [[TMP7]], i64 0 ; VEC4_INTERL2-NEXT: [[DOTSPLAT9:%.*]] = shufflevector <4 x float> [[DOTSPLATINSERT8]], <4 x float> poison, <4 x i32> zeroinitializer -; VEC4_INTERL2-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <4 x float> poison, float [[TMP0]], i32 0 +; VEC4_INTERL2-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <4 x float> poison, float [[TMP0]], i64 0 ; VEC4_INTERL2-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector <4 x float> [[BROADCAST_SPLATINSERT]], <4 x float> poison, <4 x i32> zeroinitializer -; VEC4_INTERL2-NEXT: [[BROADCAST_SPLATINSERT14:%.*]] = insertelement <4 x float> poison, float [[TMP0]], i32 0 +; VEC4_INTERL2-NEXT: [[BROADCAST_SPLATINSERT14:%.*]] = insertelement <4 x float> poison, float [[TMP0]], i64 0 ; VEC4_INTERL2-NEXT: [[BROADCAST_SPLAT15:%.*]] = shufflevector <4 x float> [[BROADCAST_SPLATINSERT14]], <4 x float> poison, <4 x i32> zeroinitializer ; VEC4_INTERL2-NEXT: br label [[VECTOR_BODY:%.*]] ; VEC4_INTERL2: vector.body: @@ -1061,16 +1061,16 @@ ; VEC2_INTERL1_PRED_STORE-NEXT: [[CAST_CRD3:%.*]] = sitofp i64 [[N_VEC]] to float ; VEC2_INTERL1_PRED_STORE-NEXT: [[TMP5:%.*]] = fmul fast float [[TMP0]], [[CAST_CRD3]] ; VEC2_INTERL1_PRED_STORE-NEXT: [[IND_END4:%.*]] = fadd fast float [[TMP5]], [[INIT:%.*]] -; VEC2_INTERL1_PRED_STORE-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <2 x float> poison, float [[INIT]], i32 0 +; VEC2_INTERL1_PRED_STORE-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <2 x float> poison, float [[INIT]], i64 0 ; VEC2_INTERL1_PRED_STORE-NEXT: [[DOTSPLAT:%.*]] = shufflevector <2 x float> [[DOTSPLATINSERT]], <2 x float> poison, <2 x i32> zeroinitializer -; VEC2_INTERL1_PRED_STORE-NEXT: [[DOTSPLATINSERT5:%.*]] = insertelement <2 x float> poison, float [[TMP0]], i32 0 +; VEC2_INTERL1_PRED_STORE-NEXT: [[DOTSPLATINSERT5:%.*]] = insertelement <2 x float> poison, float [[TMP0]], i64 0 ; VEC2_INTERL1_PRED_STORE-NEXT: [[DOTSPLAT6:%.*]] = shufflevector <2 x float> [[DOTSPLATINSERT5]], <2 x float> poison, <2 x i32> zeroinitializer ; VEC2_INTERL1_PRED_STORE-NEXT: [[TMP6:%.*]] = fmul fast <2 x float> [[DOTSPLAT6]], ; VEC2_INTERL1_PRED_STORE-NEXT: [[INDUCTION:%.*]] = fadd fast <2 x float> [[DOTSPLAT]], [[TMP6]] ; VEC2_INTERL1_PRED_STORE-NEXT: [[TMP7:%.*]] = fmul fast float [[TMP0]], 2.000000e+00 -; VEC2_INTERL1_PRED_STORE-NEXT: [[DOTSPLATINSERT7:%.*]] = insertelement <2 x float> poison, float [[TMP7]], i32 0 +; VEC2_INTERL1_PRED_STORE-NEXT: [[DOTSPLATINSERT7:%.*]] = insertelement <2 x float> poison, float [[TMP7]], i64 0 ; VEC2_INTERL1_PRED_STORE-NEXT: [[DOTSPLAT8:%.*]] = shufflevector <2 x float> [[DOTSPLATINSERT7]], <2 x float> poison, <2 x i32> zeroinitializer -; VEC2_INTERL1_PRED_STORE-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <2 x float> poison, float [[TMP0]], i32 0 +; VEC2_INTERL1_PRED_STORE-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <2 x float> poison, float [[TMP0]], i64 0 ; VEC2_INTERL1_PRED_STORE-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector <2 x float> [[BROADCAST_SPLATINSERT]], <2 x float> poison, <2 x i32> zeroinitializer ; VEC2_INTERL1_PRED_STORE-NEXT: br label [[VECTOR_BODY:%.*]] ; VEC2_INTERL1_PRED_STORE: vector.body: @@ -1398,14 +1398,14 @@ ; VEC4_INTERL1-NEXT: [[TMP2:%.*]] = bitcast float* [[TMP1]] to <4 x float>* ; VEC4_INTERL1-NEXT: [[WIDE_LOAD:%.*]] = load <4 x float>, <4 x float>* [[TMP2]], align 4 ; VEC4_INTERL1-NEXT: [[TMP3:%.*]] = fcmp fast oeq <4 x float> [[WIDE_LOAD]], zeroinitializer -; VEC4_INTERL1-NEXT: [[TMP4:%.*]] = extractelement <4 x i1> [[TMP3]], i32 0 +; VEC4_INTERL1-NEXT: [[TMP4:%.*]] = extractelement <4 x i1> [[TMP3]], i64 0 ; VEC4_INTERL1-NEXT: br i1 [[TMP4]], label [[PRED_STORE_IF:%.*]], label [[PRED_STORE_CONTINUE:%.*]] ; VEC4_INTERL1: pred.store.if: ; VEC4_INTERL1-NEXT: [[TMP5:%.*]] = getelementptr inbounds float, float* [[A]], i64 [[INDEX]] ; VEC4_INTERL1-NEXT: store float [[TMP0]], float* [[TMP5]], align 4 ; VEC4_INTERL1-NEXT: br label [[PRED_STORE_CONTINUE]] ; VEC4_INTERL1: pred.store.continue: -; VEC4_INTERL1-NEXT: [[TMP6:%.*]] = extractelement <4 x i1> [[TMP3]], i32 1 +; VEC4_INTERL1-NEXT: [[TMP6:%.*]] = extractelement <4 x i1> [[TMP3]], i64 1 ; VEC4_INTERL1-NEXT: br i1 [[TMP6]], label [[PRED_STORE_IF2:%.*]], label [[PRED_STORE_CONTINUE3:%.*]] ; VEC4_INTERL1: pred.store.if2: ; VEC4_INTERL1-NEXT: [[TMP7:%.*]] = fadd fast float [[TMP0]], 1.000000e+00 @@ -1414,7 +1414,7 @@ ; VEC4_INTERL1-NEXT: store float [[TMP7]], float* [[TMP9]], align 4 ; VEC4_INTERL1-NEXT: br label [[PRED_STORE_CONTINUE3]] ; VEC4_INTERL1: pred.store.continue3: -; VEC4_INTERL1-NEXT: [[TMP10:%.*]] = extractelement <4 x i1> [[TMP3]], i32 2 +; VEC4_INTERL1-NEXT: [[TMP10:%.*]] = extractelement <4 x i1> [[TMP3]], i64 2 ; VEC4_INTERL1-NEXT: br i1 [[TMP10]], label [[PRED_STORE_IF4:%.*]], label [[PRED_STORE_CONTINUE5:%.*]] ; VEC4_INTERL1: pred.store.if4: ; VEC4_INTERL1-NEXT: [[TMP11:%.*]] = fadd fast float [[TMP0]], 2.000000e+00 @@ -1423,7 +1423,7 @@ ; VEC4_INTERL1-NEXT: store float [[TMP11]], float* [[TMP13]], align 4 ; VEC4_INTERL1-NEXT: br label [[PRED_STORE_CONTINUE5]] ; VEC4_INTERL1: pred.store.continue5: -; VEC4_INTERL1-NEXT: [[TMP14:%.*]] = extractelement <4 x i1> [[TMP3]], i32 3 +; VEC4_INTERL1-NEXT: [[TMP14:%.*]] = extractelement <4 x i1> [[TMP3]], i64 3 ; VEC4_INTERL1-NEXT: br i1 [[TMP14]], label [[PRED_STORE_IF6:%.*]], label [[PRED_STORE_CONTINUE7]] ; VEC4_INTERL1: pred.store.if6: ; VEC4_INTERL1-NEXT: [[TMP15:%.*]] = fadd fast float [[TMP0]], 3.000000e+00 @@ -1481,14 +1481,14 @@ ; VEC4_INTERL2-NEXT: [[WIDE_LOAD3:%.*]] = load <4 x float>, <4 x float>* [[TMP5]], align 4 ; VEC4_INTERL2-NEXT: [[TMP6:%.*]] = fcmp fast oeq <4 x float> [[WIDE_LOAD]], zeroinitializer ; VEC4_INTERL2-NEXT: [[TMP7:%.*]] = fcmp fast oeq <4 x float> [[WIDE_LOAD3]], zeroinitializer -; VEC4_INTERL2-NEXT: [[TMP8:%.*]] = extractelement <4 x i1> [[TMP6]], i32 0 +; VEC4_INTERL2-NEXT: [[TMP8:%.*]] = extractelement <4 x i1> [[TMP6]], i64 0 ; VEC4_INTERL2-NEXT: br i1 [[TMP8]], label [[PRED_STORE_IF:%.*]], label [[PRED_STORE_CONTINUE:%.*]] ; VEC4_INTERL2: pred.store.if: ; VEC4_INTERL2-NEXT: [[TMP9:%.*]] = getelementptr inbounds float, float* [[A]], i64 [[INDEX]] ; VEC4_INTERL2-NEXT: store float [[TMP1]], float* [[TMP9]], align 4 ; VEC4_INTERL2-NEXT: br label [[PRED_STORE_CONTINUE]] ; VEC4_INTERL2: pred.store.continue: -; VEC4_INTERL2-NEXT: [[TMP10:%.*]] = extractelement <4 x i1> [[TMP6]], i32 1 +; VEC4_INTERL2-NEXT: [[TMP10:%.*]] = extractelement <4 x i1> [[TMP6]], i64 1 ; VEC4_INTERL2-NEXT: br i1 [[TMP10]], label [[PRED_STORE_IF4:%.*]], label [[PRED_STORE_CONTINUE5:%.*]] ; VEC4_INTERL2: pred.store.if4: ; VEC4_INTERL2-NEXT: [[TMP11:%.*]] = fadd fast float [[TMP1]], 1.000000e+00 @@ -1497,7 +1497,7 @@ ; VEC4_INTERL2-NEXT: store float [[TMP11]], float* [[TMP13]], align 4 ; VEC4_INTERL2-NEXT: br label [[PRED_STORE_CONTINUE5]] ; VEC4_INTERL2: pred.store.continue5: -; VEC4_INTERL2-NEXT: [[TMP14:%.*]] = extractelement <4 x i1> [[TMP6]], i32 2 +; VEC4_INTERL2-NEXT: [[TMP14:%.*]] = extractelement <4 x i1> [[TMP6]], i64 2 ; VEC4_INTERL2-NEXT: br i1 [[TMP14]], label [[PRED_STORE_IF6:%.*]], label [[PRED_STORE_CONTINUE7:%.*]] ; VEC4_INTERL2: pred.store.if6: ; VEC4_INTERL2-NEXT: [[TMP15:%.*]] = fadd fast float [[TMP1]], 2.000000e+00 @@ -1506,7 +1506,7 @@ ; VEC4_INTERL2-NEXT: store float [[TMP15]], float* [[TMP17]], align 4 ; VEC4_INTERL2-NEXT: br label [[PRED_STORE_CONTINUE7]] ; VEC4_INTERL2: pred.store.continue7: -; VEC4_INTERL2-NEXT: [[TMP18:%.*]] = extractelement <4 x i1> [[TMP6]], i32 3 +; VEC4_INTERL2-NEXT: [[TMP18:%.*]] = extractelement <4 x i1> [[TMP6]], i64 3 ; VEC4_INTERL2-NEXT: br i1 [[TMP18]], label [[PRED_STORE_IF8:%.*]], label [[PRED_STORE_CONTINUE9:%.*]] ; VEC4_INTERL2: pred.store.if8: ; VEC4_INTERL2-NEXT: [[TMP19:%.*]] = fadd fast float [[TMP1]], 3.000000e+00 @@ -1515,7 +1515,7 @@ ; VEC4_INTERL2-NEXT: store float [[TMP19]], float* [[TMP21]], align 4 ; VEC4_INTERL2-NEXT: br label [[PRED_STORE_CONTINUE9]] ; VEC4_INTERL2: pred.store.continue9: -; VEC4_INTERL2-NEXT: [[TMP22:%.*]] = extractelement <4 x i1> [[TMP7]], i32 0 +; VEC4_INTERL2-NEXT: [[TMP22:%.*]] = extractelement <4 x i1> [[TMP7]], i64 0 ; VEC4_INTERL2-NEXT: br i1 [[TMP22]], label [[PRED_STORE_IF10:%.*]], label [[PRED_STORE_CONTINUE11:%.*]] ; VEC4_INTERL2: pred.store.if10: ; VEC4_INTERL2-NEXT: [[TMP23:%.*]] = fadd fast float [[TMP1]], 4.000000e+00 @@ -1523,7 +1523,7 @@ ; VEC4_INTERL2-NEXT: store float [[TMP23]], float* [[TMP24]], align 4 ; VEC4_INTERL2-NEXT: br label [[PRED_STORE_CONTINUE11]] ; VEC4_INTERL2: pred.store.continue11: -; VEC4_INTERL2-NEXT: [[TMP25:%.*]] = extractelement <4 x i1> [[TMP7]], i32 1 +; VEC4_INTERL2-NEXT: [[TMP25:%.*]] = extractelement <4 x i1> [[TMP7]], i64 1 ; VEC4_INTERL2-NEXT: br i1 [[TMP25]], label [[PRED_STORE_IF12:%.*]], label [[PRED_STORE_CONTINUE13:%.*]] ; VEC4_INTERL2: pred.store.if12: ; VEC4_INTERL2-NEXT: [[TMP26:%.*]] = fadd fast float [[TMP1]], 5.000000e+00 @@ -1532,7 +1532,7 @@ ; VEC4_INTERL2-NEXT: store float [[TMP26]], float* [[TMP28]], align 4 ; VEC4_INTERL2-NEXT: br label [[PRED_STORE_CONTINUE13]] ; VEC4_INTERL2: pred.store.continue13: -; VEC4_INTERL2-NEXT: [[TMP29:%.*]] = extractelement <4 x i1> [[TMP7]], i32 2 +; VEC4_INTERL2-NEXT: [[TMP29:%.*]] = extractelement <4 x i1> [[TMP7]], i64 2 ; VEC4_INTERL2-NEXT: br i1 [[TMP29]], label [[PRED_STORE_IF14:%.*]], label [[PRED_STORE_CONTINUE15:%.*]] ; VEC4_INTERL2: pred.store.if14: ; VEC4_INTERL2-NEXT: [[TMP30:%.*]] = fadd fast float [[TMP1]], 6.000000e+00 @@ -1541,7 +1541,7 @@ ; VEC4_INTERL2-NEXT: store float [[TMP30]], float* [[TMP32]], align 4 ; VEC4_INTERL2-NEXT: br label [[PRED_STORE_CONTINUE15]] ; VEC4_INTERL2: pred.store.continue15: -; VEC4_INTERL2-NEXT: [[TMP33:%.*]] = extractelement <4 x i1> [[TMP7]], i32 3 +; VEC4_INTERL2-NEXT: [[TMP33:%.*]] = extractelement <4 x i1> [[TMP7]], i64 3 ; VEC4_INTERL2-NEXT: br i1 [[TMP33]], label [[PRED_STORE_IF16:%.*]], label [[PRED_STORE_CONTINUE17]] ; VEC4_INTERL2: pred.store.if16: ; VEC4_INTERL2-NEXT: [[TMP34:%.*]] = fadd fast float [[TMP1]], 7.000000e+00 @@ -1652,14 +1652,14 @@ ; VEC2_INTERL1_PRED_STORE-NEXT: [[TMP2:%.*]] = bitcast float* [[TMP1]] to <2 x float>* ; VEC2_INTERL1_PRED_STORE-NEXT: [[WIDE_LOAD:%.*]] = load <2 x float>, <2 x float>* [[TMP2]], align 4 ; VEC2_INTERL1_PRED_STORE-NEXT: [[TMP3:%.*]] = fcmp fast oeq <2 x float> [[WIDE_LOAD]], zeroinitializer -; VEC2_INTERL1_PRED_STORE-NEXT: [[TMP4:%.*]] = extractelement <2 x i1> [[TMP3]], i32 0 +; VEC2_INTERL1_PRED_STORE-NEXT: [[TMP4:%.*]] = extractelement <2 x i1> [[TMP3]], i64 0 ; VEC2_INTERL1_PRED_STORE-NEXT: br i1 [[TMP4]], label [[PRED_STORE_IF:%.*]], label [[PRED_STORE_CONTINUE:%.*]] ; VEC2_INTERL1_PRED_STORE: pred.store.if: ; VEC2_INTERL1_PRED_STORE-NEXT: [[TMP5:%.*]] = getelementptr inbounds float, float* [[A]], i64 [[INDEX]] ; VEC2_INTERL1_PRED_STORE-NEXT: store float [[TMP0]], float* [[TMP5]], align 4 ; VEC2_INTERL1_PRED_STORE-NEXT: br label [[PRED_STORE_CONTINUE]] ; VEC2_INTERL1_PRED_STORE: pred.store.continue: -; VEC2_INTERL1_PRED_STORE-NEXT: [[TMP6:%.*]] = extractelement <2 x i1> [[TMP3]], i32 1 +; VEC2_INTERL1_PRED_STORE-NEXT: [[TMP6:%.*]] = extractelement <2 x i1> [[TMP3]], i64 1 ; VEC2_INTERL1_PRED_STORE-NEXT: br i1 [[TMP6]], label [[PRED_STORE_IF2:%.*]], label [[PRED_STORE_CONTINUE3]] ; VEC2_INTERL1_PRED_STORE: pred.store.if2: ; VEC2_INTERL1_PRED_STORE-NEXT: [[TMP7:%.*]] = fadd fast float [[TMP0]], 1.000000e+00 diff --git a/llvm/test/Transforms/LoopVectorize/induction.ll b/llvm/test/Transforms/LoopVectorize/induction.ll --- a/llvm/test/Transforms/LoopVectorize/induction.ll +++ b/llvm/test/Transforms/LoopVectorize/induction.ll @@ -352,7 +352,7 @@ ; IND-NEXT: br i1 [[FOUND_CONFLICT]], label [[SCALAR_PH]], label [[VECTOR_PH:%.*]] ; IND: vector.ph: ; IND-NEXT: [[N_VEC:%.*]] = and i64 [[N]], -2 -; IND-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <2 x float> poison, float [[B:%.*]], i32 0 +; IND-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <2 x float> poison, float [[B:%.*]], i64 0 ; IND-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector <2 x float> [[BROADCAST_SPLATINSERT]], <2 x float> poison, <2 x i32> zeroinitializer ; IND-NEXT: br label [[VECTOR_BODY:%.*]] ; IND: vector.body: @@ -412,9 +412,9 @@ ; UNROLL-NEXT: br i1 [[FOUND_CONFLICT]], label [[SCALAR_PH]], label [[VECTOR_PH:%.*]] ; UNROLL: vector.ph: ; UNROLL-NEXT: [[N_VEC:%.*]] = and i64 [[N]], -4 -; UNROLL-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <2 x float> poison, float [[B:%.*]], i32 0 +; UNROLL-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <2 x float> poison, float [[B:%.*]], i64 0 ; UNROLL-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector <2 x float> [[BROADCAST_SPLATINSERT]], <2 x float> poison, <2 x i32> zeroinitializer -; UNROLL-NEXT: [[BROADCAST_SPLATINSERT11:%.*]] = insertelement <2 x float> poison, float [[B]], i32 0 +; UNROLL-NEXT: [[BROADCAST_SPLATINSERT11:%.*]] = insertelement <2 x float> poison, float [[B]], i64 0 ; UNROLL-NEXT: [[BROADCAST_SPLAT12:%.*]] = shufflevector <2 x float> [[BROADCAST_SPLATINSERT11]], <2 x float> poison, <2 x i32> zeroinitializer ; UNROLL-NEXT: br label [[VECTOR_BODY:%.*]] ; UNROLL: vector.body: @@ -569,9 +569,9 @@ ; INTERLEAVE-NEXT: br i1 [[FOUND_CONFLICT]], label [[SCALAR_PH]], label [[VECTOR_PH:%.*]] ; INTERLEAVE: vector.ph: ; INTERLEAVE-NEXT: [[N_VEC:%.*]] = and i64 [[N]], -8 -; INTERLEAVE-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <4 x float> poison, float [[B:%.*]], i32 0 +; INTERLEAVE-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <4 x float> poison, float [[B:%.*]], i64 0 ; INTERLEAVE-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector <4 x float> [[BROADCAST_SPLATINSERT]], <4 x float> poison, <4 x i32> zeroinitializer -; INTERLEAVE-NEXT: [[BROADCAST_SPLATINSERT11:%.*]] = insertelement <4 x float> poison, float [[B]], i32 0 +; INTERLEAVE-NEXT: [[BROADCAST_SPLATINSERT11:%.*]] = insertelement <4 x float> poison, float [[B]], i64 0 ; INTERLEAVE-NEXT: [[BROADCAST_SPLAT12:%.*]] = shufflevector <4 x float> [[BROADCAST_SPLATINSERT11]], <4 x float> poison, <4 x i32> zeroinitializer ; INTERLEAVE-NEXT: br label [[VECTOR_BODY:%.*]] ; INTERLEAVE: vector.body: @@ -991,14 +991,14 @@ ; IND-NEXT: [[TMP5:%.*]] = getelementptr inbounds float, float* [[A]], i64 [[TMP3]] ; IND-NEXT: [[TMP6:%.*]] = load float, float* [[TMP4]], align 4 ; IND-NEXT: [[TMP7:%.*]] = load float, float* [[TMP5]], align 4 -; IND-NEXT: [[TMP8:%.*]] = insertelement <2 x float> poison, float [[TMP6]], i32 0 -; IND-NEXT: [[TMP9:%.*]] = insertelement <2 x float> [[TMP8]], float [[TMP7]], i32 1 +; IND-NEXT: [[TMP8:%.*]] = insertelement <2 x float> poison, float [[TMP6]], i64 0 +; IND-NEXT: [[TMP9:%.*]] = insertelement <2 x float> [[TMP8]], float [[TMP7]], i64 1 ; IND-NEXT: [[TMP10:%.*]] = getelementptr inbounds float, float* [[B:%.*]], i64 [[OFFSET_IDX]] ; IND-NEXT: [[TMP11:%.*]] = getelementptr inbounds float, float* [[B]], i64 [[TMP3]] ; IND-NEXT: [[TMP12:%.*]] = load float, float* [[TMP10]], align 4 ; IND-NEXT: [[TMP13:%.*]] = load float, float* [[TMP11]], align 4 -; IND-NEXT: [[TMP14:%.*]] = insertelement <2 x float> poison, float [[TMP12]], i32 0 -; IND-NEXT: [[TMP15:%.*]] = insertelement <2 x float> [[TMP14]], float [[TMP13]], i32 1 +; IND-NEXT: [[TMP14:%.*]] = insertelement <2 x float> poison, float [[TMP12]], i64 0 +; IND-NEXT: [[TMP15:%.*]] = insertelement <2 x float> [[TMP14]], float [[TMP13]], i64 1 ; IND-NEXT: [[TMP16:%.*]] = fadd fast <2 x float> [[VEC_PHI]], ; IND-NEXT: [[TMP17:%.*]] = fadd fast <2 x float> [[TMP16]], [[TMP9]] ; IND-NEXT: [[TMP18]] = fadd fast <2 x float> [[TMP17]], [[TMP15]] @@ -1056,24 +1056,24 @@ ; UNROLL-NEXT: [[TMP9:%.*]] = getelementptr inbounds float, float* [[A]], i64 [[TMP5]] ; UNROLL-NEXT: [[TMP10:%.*]] = load float, float* [[TMP6]], align 4 ; UNROLL-NEXT: [[TMP11:%.*]] = load float, float* [[TMP7]], align 4 -; UNROLL-NEXT: [[TMP12:%.*]] = insertelement <2 x float> poison, float [[TMP10]], i32 0 -; UNROLL-NEXT: [[TMP13:%.*]] = insertelement <2 x float> [[TMP12]], float [[TMP11]], i32 1 +; UNROLL-NEXT: [[TMP12:%.*]] = insertelement <2 x float> poison, float [[TMP10]], i64 0 +; UNROLL-NEXT: [[TMP13:%.*]] = insertelement <2 x float> [[TMP12]], float [[TMP11]], i64 1 ; UNROLL-NEXT: [[TMP14:%.*]] = load float, float* [[TMP8]], align 4 ; UNROLL-NEXT: [[TMP15:%.*]] = load float, float* [[TMP9]], align 4 -; UNROLL-NEXT: [[TMP16:%.*]] = insertelement <2 x float> poison, float [[TMP14]], i32 0 -; UNROLL-NEXT: [[TMP17:%.*]] = insertelement <2 x float> [[TMP16]], float [[TMP15]], i32 1 +; UNROLL-NEXT: [[TMP16:%.*]] = insertelement <2 x float> poison, float [[TMP14]], i64 0 +; UNROLL-NEXT: [[TMP17:%.*]] = insertelement <2 x float> [[TMP16]], float [[TMP15]], i64 1 ; UNROLL-NEXT: [[TMP18:%.*]] = getelementptr inbounds float, float* [[B:%.*]], i64 [[OFFSET_IDX]] ; UNROLL-NEXT: [[TMP19:%.*]] = getelementptr inbounds float, float* [[B]], i64 [[TMP3]] ; UNROLL-NEXT: [[TMP20:%.*]] = getelementptr inbounds float, float* [[B]], i64 [[TMP4]] ; UNROLL-NEXT: [[TMP21:%.*]] = getelementptr inbounds float, float* [[B]], i64 [[TMP5]] ; UNROLL-NEXT: [[TMP22:%.*]] = load float, float* [[TMP18]], align 4 ; UNROLL-NEXT: [[TMP23:%.*]] = load float, float* [[TMP19]], align 4 -; UNROLL-NEXT: [[TMP24:%.*]] = insertelement <2 x float> poison, float [[TMP22]], i32 0 -; UNROLL-NEXT: [[TMP25:%.*]] = insertelement <2 x float> [[TMP24]], float [[TMP23]], i32 1 +; UNROLL-NEXT: [[TMP24:%.*]] = insertelement <2 x float> poison, float [[TMP22]], i64 0 +; UNROLL-NEXT: [[TMP25:%.*]] = insertelement <2 x float> [[TMP24]], float [[TMP23]], i64 1 ; UNROLL-NEXT: [[TMP26:%.*]] = load float, float* [[TMP20]], align 4 ; UNROLL-NEXT: [[TMP27:%.*]] = load float, float* [[TMP21]], align 4 -; UNROLL-NEXT: [[TMP28:%.*]] = insertelement <2 x float> poison, float [[TMP26]], i32 0 -; UNROLL-NEXT: [[TMP29:%.*]] = insertelement <2 x float> [[TMP28]], float [[TMP27]], i32 1 +; UNROLL-NEXT: [[TMP28:%.*]] = insertelement <2 x float> poison, float [[TMP26]], i64 0 +; UNROLL-NEXT: [[TMP29:%.*]] = insertelement <2 x float> [[TMP28]], float [[TMP27]], i64 1 ; UNROLL-NEXT: [[TMP30:%.*]] = fadd fast <2 x float> [[VEC_PHI]], ; UNROLL-NEXT: [[TMP31:%.*]] = fadd fast <2 x float> [[VEC_PHI1]], ; UNROLL-NEXT: [[TMP32:%.*]] = fadd fast <2 x float> [[TMP30]], [[TMP13]] @@ -1345,7 +1345,7 @@ ; IND-NEXT: br i1 [[MIN_ITERS_CHECK]], label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]] ; IND: vector.ph: ; IND-NEXT: [[N_VEC:%.*]] = and i64 [[SMAX]], 9223372036854775806 -; IND-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <2 x i32> poison, i32 [[Y:%.*]], i32 0 +; IND-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <2 x i32> poison, i32 [[Y:%.*]], i64 0 ; IND-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector <2 x i32> [[BROADCAST_SPLATINSERT]], <2 x i32> poison, <2 x i32> zeroinitializer ; IND-NEXT: br label [[VECTOR_BODY:%.*]] ; IND: vector.body: @@ -1355,12 +1355,12 @@ ; IND-NEXT: [[TMP2:%.*]] = getelementptr inbounds [[PAIR_I32]], %pair.i32* [[P]], i64 [[TMP0]], i32 1 ; IND-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP1]], align 8 ; IND-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP2]], align 8 -; IND-NEXT: [[TMP5:%.*]] = insertelement <2 x i32> poison, i32 [[TMP3]], i32 0 -; IND-NEXT: [[TMP6:%.*]] = insertelement <2 x i32> [[TMP5]], i32 [[TMP4]], i32 1 +; IND-NEXT: [[TMP5:%.*]] = insertelement <2 x i32> poison, i32 [[TMP3]], i64 0 +; IND-NEXT: [[TMP6:%.*]] = insertelement <2 x i32> [[TMP5]], i32 [[TMP4]], i64 1 ; IND-NEXT: [[TMP7:%.*]] = xor <2 x i32> [[TMP6]], [[BROADCAST_SPLAT]] -; IND-NEXT: [[TMP8:%.*]] = extractelement <2 x i32> [[TMP7]], i32 0 +; IND-NEXT: [[TMP8:%.*]] = extractelement <2 x i32> [[TMP7]], i64 0 ; IND-NEXT: store i32 [[TMP8]], i32* [[TMP1]], align 8 -; IND-NEXT: [[TMP9:%.*]] = extractelement <2 x i32> [[TMP7]], i32 1 +; IND-NEXT: [[TMP9:%.*]] = extractelement <2 x i32> [[TMP7]], i64 1 ; IND-NEXT: store i32 [[TMP9]], i32* [[TMP2]], align 8 ; IND-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 2 ; IND-NEXT: [[TMP10:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]] @@ -1390,9 +1390,9 @@ ; UNROLL-NEXT: br i1 [[MIN_ITERS_CHECK]], label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]] ; UNROLL: vector.ph: ; UNROLL-NEXT: [[N_VEC:%.*]] = and i64 [[SMAX]], 9223372036854775804 -; UNROLL-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <2 x i32> poison, i32 [[Y:%.*]], i32 0 +; UNROLL-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <2 x i32> poison, i32 [[Y:%.*]], i64 0 ; UNROLL-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector <2 x i32> [[BROADCAST_SPLATINSERT]], <2 x i32> poison, <2 x i32> zeroinitializer -; UNROLL-NEXT: [[BROADCAST_SPLATINSERT1:%.*]] = insertelement <2 x i32> poison, i32 [[Y]], i32 0 +; UNROLL-NEXT: [[BROADCAST_SPLATINSERT1:%.*]] = insertelement <2 x i32> poison, i32 [[Y]], i64 0 ; UNROLL-NEXT: [[BROADCAST_SPLAT2:%.*]] = shufflevector <2 x i32> [[BROADCAST_SPLATINSERT1]], <2 x i32> poison, <2 x i32> zeroinitializer ; UNROLL-NEXT: br label [[VECTOR_BODY:%.*]] ; UNROLL: vector.body: @@ -1406,21 +1406,21 @@ ; UNROLL-NEXT: [[TMP6:%.*]] = getelementptr inbounds [[PAIR_I32]], %pair.i32* [[P]], i64 [[TMP2]], i32 1 ; UNROLL-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP3]], align 8 ; UNROLL-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP4]], align 8 -; UNROLL-NEXT: [[TMP9:%.*]] = insertelement <2 x i32> poison, i32 [[TMP7]], i32 0 -; UNROLL-NEXT: [[TMP10:%.*]] = insertelement <2 x i32> [[TMP9]], i32 [[TMP8]], i32 1 +; UNROLL-NEXT: [[TMP9:%.*]] = insertelement <2 x i32> poison, i32 [[TMP7]], i64 0 +; UNROLL-NEXT: [[TMP10:%.*]] = insertelement <2 x i32> [[TMP9]], i32 [[TMP8]], i64 1 ; UNROLL-NEXT: [[TMP11:%.*]] = load i32, i32* [[TMP5]], align 8 ; UNROLL-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP6]], align 8 -; UNROLL-NEXT: [[TMP13:%.*]] = insertelement <2 x i32> poison, i32 [[TMP11]], i32 0 -; UNROLL-NEXT: [[TMP14:%.*]] = insertelement <2 x i32> [[TMP13]], i32 [[TMP12]], i32 1 +; UNROLL-NEXT: [[TMP13:%.*]] = insertelement <2 x i32> poison, i32 [[TMP11]], i64 0 +; UNROLL-NEXT: [[TMP14:%.*]] = insertelement <2 x i32> [[TMP13]], i32 [[TMP12]], i64 1 ; UNROLL-NEXT: [[TMP15:%.*]] = xor <2 x i32> [[TMP10]], [[BROADCAST_SPLAT]] ; UNROLL-NEXT: [[TMP16:%.*]] = xor <2 x i32> [[TMP14]], [[BROADCAST_SPLAT2]] -; UNROLL-NEXT: [[TMP17:%.*]] = extractelement <2 x i32> [[TMP15]], i32 0 +; UNROLL-NEXT: [[TMP17:%.*]] = extractelement <2 x i32> [[TMP15]], i64 0 ; UNROLL-NEXT: store i32 [[TMP17]], i32* [[TMP3]], align 8 -; UNROLL-NEXT: [[TMP18:%.*]] = extractelement <2 x i32> [[TMP15]], i32 1 +; UNROLL-NEXT: [[TMP18:%.*]] = extractelement <2 x i32> [[TMP15]], i64 1 ; UNROLL-NEXT: store i32 [[TMP18]], i32* [[TMP4]], align 8 -; UNROLL-NEXT: [[TMP19:%.*]] = extractelement <2 x i32> [[TMP16]], i32 0 +; UNROLL-NEXT: [[TMP19:%.*]] = extractelement <2 x i32> [[TMP16]], i64 0 ; UNROLL-NEXT: store i32 [[TMP19]], i32* [[TMP5]], align 8 -; UNROLL-NEXT: [[TMP20:%.*]] = extractelement <2 x i32> [[TMP16]], i32 1 +; UNROLL-NEXT: [[TMP20:%.*]] = extractelement <2 x i32> [[TMP16]], i64 1 ; UNROLL-NEXT: store i32 [[TMP20]], i32* [[TMP6]], align 8 ; UNROLL-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4 ; UNROLL-NEXT: [[TMP21:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]] @@ -1515,9 +1515,9 @@ ; INTERLEAVE-NEXT: [[TMP0:%.*]] = icmp eq i64 [[N_MOD_VF]], 0 ; INTERLEAVE-NEXT: [[TMP1:%.*]] = select i1 [[TMP0]], i64 8, i64 [[N_MOD_VF]] ; INTERLEAVE-NEXT: [[N_VEC:%.*]] = sub nsw i64 [[SMAX]], [[TMP1]] -; INTERLEAVE-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <4 x i32> poison, i32 [[Y:%.*]], i32 0 +; INTERLEAVE-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <4 x i32> poison, i32 [[Y:%.*]], i64 0 ; INTERLEAVE-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector <4 x i32> [[BROADCAST_SPLATINSERT]], <4 x i32> poison, <4 x i32> zeroinitializer -; INTERLEAVE-NEXT: [[BROADCAST_SPLATINSERT3:%.*]] = insertelement <4 x i32> poison, i32 [[Y]], i32 0 +; INTERLEAVE-NEXT: [[BROADCAST_SPLATINSERT3:%.*]] = insertelement <4 x i32> poison, i32 [[Y]], i64 0 ; INTERLEAVE-NEXT: [[BROADCAST_SPLAT4:%.*]] = shufflevector <4 x i32> [[BROADCAST_SPLATINSERT3]], <4 x i32> poison, <4 x i32> zeroinitializer ; INTERLEAVE-NEXT: br label [[VECTOR_BODY:%.*]] ; INTERLEAVE: vector.body: @@ -1545,21 +1545,21 @@ ; INTERLEAVE-NEXT: [[STRIDED_VEC2:%.*]] = shufflevector <8 x i32> [[WIDE_VEC1]], <8 x i32> poison, <4 x i32> ; INTERLEAVE-NEXT: [[TMP19:%.*]] = xor <4 x i32> [[STRIDED_VEC]], [[BROADCAST_SPLAT]] ; INTERLEAVE-NEXT: [[TMP20:%.*]] = xor <4 x i32> [[STRIDED_VEC2]], [[BROADCAST_SPLAT4]] -; INTERLEAVE-NEXT: [[TMP21:%.*]] = extractelement <4 x i32> [[TMP19]], i32 0 +; INTERLEAVE-NEXT: [[TMP21:%.*]] = extractelement <4 x i32> [[TMP19]], i64 0 ; INTERLEAVE-NEXT: store i32 [[TMP21]], i32* [[TMP9]], align 8 -; INTERLEAVE-NEXT: [[TMP22:%.*]] = extractelement <4 x i32> [[TMP19]], i32 1 +; INTERLEAVE-NEXT: [[TMP22:%.*]] = extractelement <4 x i32> [[TMP19]], i64 1 ; INTERLEAVE-NEXT: store i32 [[TMP22]], i32* [[TMP10]], align 8 -; INTERLEAVE-NEXT: [[TMP23:%.*]] = extractelement <4 x i32> [[TMP19]], i32 2 +; INTERLEAVE-NEXT: [[TMP23:%.*]] = extractelement <4 x i32> [[TMP19]], i64 2 ; INTERLEAVE-NEXT: store i32 [[TMP23]], i32* [[TMP11]], align 8 -; INTERLEAVE-NEXT: [[TMP24:%.*]] = extractelement <4 x i32> [[TMP19]], i32 3 +; INTERLEAVE-NEXT: [[TMP24:%.*]] = extractelement <4 x i32> [[TMP19]], i64 3 ; INTERLEAVE-NEXT: store i32 [[TMP24]], i32* [[TMP12]], align 8 -; INTERLEAVE-NEXT: [[TMP25:%.*]] = extractelement <4 x i32> [[TMP20]], i32 0 +; INTERLEAVE-NEXT: [[TMP25:%.*]] = extractelement <4 x i32> [[TMP20]], i64 0 ; INTERLEAVE-NEXT: store i32 [[TMP25]], i32* [[TMP13]], align 8 -; INTERLEAVE-NEXT: [[TMP26:%.*]] = extractelement <4 x i32> [[TMP20]], i32 1 +; INTERLEAVE-NEXT: [[TMP26:%.*]] = extractelement <4 x i32> [[TMP20]], i64 1 ; INTERLEAVE-NEXT: store i32 [[TMP26]], i32* [[TMP14]], align 8 -; INTERLEAVE-NEXT: [[TMP27:%.*]] = extractelement <4 x i32> [[TMP20]], i32 2 +; INTERLEAVE-NEXT: [[TMP27:%.*]] = extractelement <4 x i32> [[TMP20]], i64 2 ; INTERLEAVE-NEXT: store i32 [[TMP27]], i32* [[TMP15]], align 8 -; INTERLEAVE-NEXT: [[TMP28:%.*]] = extractelement <4 x i32> [[TMP20]], i32 3 +; INTERLEAVE-NEXT: [[TMP28:%.*]] = extractelement <4 x i32> [[TMP20]], i64 3 ; INTERLEAVE-NEXT: store i32 [[TMP28]], i32* [[TMP16]], align 8 ; INTERLEAVE-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 8 ; INTERLEAVE-NEXT: [[TMP29:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]] @@ -1702,9 +1702,9 @@ ; IND-NEXT: [[VEC_IND:%.*]] = phi <2 x i64> [ , [[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], [[VECTOR_BODY]] ] ; IND-NEXT: [[TMP9:%.*]] = or i64 [[INDEX]], 1 ; IND-NEXT: [[TMP10:%.*]] = shl nsw <2 x i64> [[VEC_IND]], -; IND-NEXT: [[TMP11:%.*]] = extractelement <2 x i64> [[TMP10]], i32 0 +; IND-NEXT: [[TMP11:%.*]] = extractelement <2 x i64> [[TMP10]], i64 0 ; IND-NEXT: [[TMP12:%.*]] = getelementptr inbounds i32, i32* [[A]], i64 [[TMP11]] -; IND-NEXT: [[TMP13:%.*]] = extractelement <2 x i64> [[TMP10]], i32 1 +; IND-NEXT: [[TMP13:%.*]] = extractelement <2 x i64> [[TMP10]], i64 1 ; IND-NEXT: [[TMP14:%.*]] = getelementptr inbounds i32, i32* [[A]], i64 [[TMP13]] ; IND-NEXT: [[TMP15:%.*]] = load i32, i32* [[TMP12]], align 1, !alias.scope !17 ; IND-NEXT: [[TMP16:%.*]] = load i32, i32* [[TMP14]], align 1, !alias.scope !17 @@ -1768,13 +1768,13 @@ ; UNROLL-NEXT: [[TMP12:%.*]] = shl nsw <2 x i64> [[VEC_IND]], ; UNROLL-NEXT: [[STEP_ADD:%.*]] = shl <2 x i64> [[VEC_IND]], ; UNROLL-NEXT: [[TMP13:%.*]] = add <2 x i64> [[STEP_ADD]], -; UNROLL-NEXT: [[TMP14:%.*]] = extractelement <2 x i64> [[TMP12]], i32 0 +; UNROLL-NEXT: [[TMP14:%.*]] = extractelement <2 x i64> [[TMP12]], i64 0 ; UNROLL-NEXT: [[TMP15:%.*]] = getelementptr inbounds i32, i32* [[A]], i64 [[TMP14]] -; UNROLL-NEXT: [[TMP16:%.*]] = extractelement <2 x i64> [[TMP12]], i32 1 +; UNROLL-NEXT: [[TMP16:%.*]] = extractelement <2 x i64> [[TMP12]], i64 1 ; UNROLL-NEXT: [[TMP17:%.*]] = getelementptr inbounds i32, i32* [[A]], i64 [[TMP16]] -; UNROLL-NEXT: [[TMP18:%.*]] = extractelement <2 x i64> [[TMP13]], i32 0 +; UNROLL-NEXT: [[TMP18:%.*]] = extractelement <2 x i64> [[TMP13]], i64 0 ; UNROLL-NEXT: [[TMP19:%.*]] = getelementptr inbounds i32, i32* [[A]], i64 [[TMP18]] -; UNROLL-NEXT: [[TMP20:%.*]] = extractelement <2 x i64> [[TMP13]], i32 1 +; UNROLL-NEXT: [[TMP20:%.*]] = extractelement <2 x i64> [[TMP13]], i64 1 ; UNROLL-NEXT: [[TMP21:%.*]] = getelementptr inbounds i32, i32* [[A]], i64 [[TMP20]] ; UNROLL-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP15]], align 1, !alias.scope !17 ; UNROLL-NEXT: [[TMP23:%.*]] = load i32, i32* [[TMP17]], align 1, !alias.scope !17 @@ -1945,21 +1945,21 @@ ; INTERLEAVE-NEXT: [[TMP29:%.*]] = getelementptr inbounds [[PAIR_I32]], %pair.i32* [[P]], i64 [[TMP15]], i32 1 ; INTERLEAVE-NEXT: [[TMP30:%.*]] = getelementptr inbounds [[PAIR_I32]], %pair.i32* [[P]], i64 [[TMP16]], i32 1 ; INTERLEAVE-NEXT: [[TMP31:%.*]] = getelementptr inbounds [[PAIR_I32]], %pair.i32* [[P]], i64 [[TMP17]], i32 1 -; INTERLEAVE-NEXT: [[TMP32:%.*]] = extractelement <16 x i32> [[WIDE_VEC]], i32 0 +; INTERLEAVE-NEXT: [[TMP32:%.*]] = extractelement <16 x i32> [[WIDE_VEC]], i64 0 ; INTERLEAVE-NEXT: store i32 [[TMP32]], i32* [[TMP24]], align 1, !alias.scope !17, !noalias !20 -; INTERLEAVE-NEXT: [[TMP33:%.*]] = extractelement <16 x i32> [[WIDE_VEC]], i32 4 +; INTERLEAVE-NEXT: [[TMP33:%.*]] = extractelement <16 x i32> [[WIDE_VEC]], i64 4 ; INTERLEAVE-NEXT: store i32 [[TMP33]], i32* [[TMP25]], align 1, !alias.scope !17, !noalias !20 -; INTERLEAVE-NEXT: [[TMP34:%.*]] = extractelement <16 x i32> [[WIDE_VEC]], i32 8 +; INTERLEAVE-NEXT: [[TMP34:%.*]] = extractelement <16 x i32> [[WIDE_VEC]], i64 8 ; INTERLEAVE-NEXT: store i32 [[TMP34]], i32* [[TMP26]], align 1, !alias.scope !17, !noalias !20 -; INTERLEAVE-NEXT: [[TMP35:%.*]] = extractelement <16 x i32> [[WIDE_VEC]], i32 12 +; INTERLEAVE-NEXT: [[TMP35:%.*]] = extractelement <16 x i32> [[WIDE_VEC]], i64 12 ; INTERLEAVE-NEXT: store i32 [[TMP35]], i32* [[TMP27]], align 1, !alias.scope !17, !noalias !20 -; INTERLEAVE-NEXT: [[TMP36:%.*]] = extractelement <16 x i32> [[WIDE_VEC7]], i32 0 +; INTERLEAVE-NEXT: [[TMP36:%.*]] = extractelement <16 x i32> [[WIDE_VEC7]], i64 0 ; INTERLEAVE-NEXT: store i32 [[TMP36]], i32* [[TMP28]], align 1, !alias.scope !17, !noalias !20 -; INTERLEAVE-NEXT: [[TMP37:%.*]] = extractelement <16 x i32> [[WIDE_VEC7]], i32 4 +; INTERLEAVE-NEXT: [[TMP37:%.*]] = extractelement <16 x i32> [[WIDE_VEC7]], i64 4 ; INTERLEAVE-NEXT: store i32 [[TMP37]], i32* [[TMP29]], align 1, !alias.scope !17, !noalias !20 -; INTERLEAVE-NEXT: [[TMP38:%.*]] = extractelement <16 x i32> [[WIDE_VEC7]], i32 8 +; INTERLEAVE-NEXT: [[TMP38:%.*]] = extractelement <16 x i32> [[WIDE_VEC7]], i64 8 ; INTERLEAVE-NEXT: store i32 [[TMP38]], i32* [[TMP30]], align 1, !alias.scope !17, !noalias !20 -; INTERLEAVE-NEXT: [[TMP39:%.*]] = extractelement <16 x i32> [[WIDE_VEC7]], i32 12 +; INTERLEAVE-NEXT: [[TMP39:%.*]] = extractelement <16 x i32> [[WIDE_VEC7]], i64 12 ; INTERLEAVE-NEXT: store i32 [[TMP39]], i32* [[TMP31]], align 1, !alias.scope !17, !noalias !20 ; INTERLEAVE-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 8 ; INTERLEAVE-NEXT: [[TMP40:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]] @@ -2099,7 +2099,7 @@ ; IND-NEXT: br i1 [[MIN_ITERS_CHECK]], label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]] ; IND: vector.ph: ; IND-NEXT: [[N_VEC:%.*]] = and i32 [[SMAX]], 2147483646 -; IND-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <2 x i1> poison, i1 [[C:%.*]], i32 0 +; IND-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <2 x i1> poison, i1 [[C:%.*]], i64 0 ; IND-NEXT: br label [[VECTOR_BODY:%.*]] ; IND: vector.body: ; IND-NEXT: [[INDEX:%.*]] = phi i32 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[PRED_UDIV_CONTINUE2:%.*]] ] @@ -2110,18 +2110,18 @@ ; IND-NEXT: [[WIDE_LOAD:%.*]] = load <2 x i32>, <2 x i32>* [[TMP2]], align 4 ; IND-NEXT: br i1 [[C]], label [[PRED_UDIV_IF:%.*]], label [[PRED_UDIV_CONTINUE:%.*]] ; IND: pred.udiv.if: -; IND-NEXT: [[TMP3:%.*]] = extractelement <2 x i32> [[WIDE_LOAD]], i32 0 +; IND-NEXT: [[TMP3:%.*]] = extractelement <2 x i32> [[WIDE_LOAD]], i64 0 ; IND-NEXT: [[TMP4:%.*]] = udiv i32 [[TMP3]], [[INDEX]] -; IND-NEXT: [[TMP5:%.*]] = insertelement <2 x i32> poison, i32 [[TMP4]], i32 0 +; IND-NEXT: [[TMP5:%.*]] = insertelement <2 x i32> poison, i32 [[TMP4]], i64 0 ; IND-NEXT: br label [[PRED_UDIV_CONTINUE]] ; IND: pred.udiv.continue: ; IND-NEXT: [[TMP6:%.*]] = phi <2 x i32> [ poison, [[VECTOR_BODY]] ], [ [[TMP5]], [[PRED_UDIV_IF]] ] ; IND-NEXT: br i1 [[C]], label [[PRED_UDIV_IF1:%.*]], label [[PRED_UDIV_CONTINUE2]] ; IND: pred.udiv.if1: ; IND-NEXT: [[TMP7:%.*]] = or i32 [[INDEX]], 1 -; IND-NEXT: [[TMP8:%.*]] = extractelement <2 x i32> [[WIDE_LOAD]], i32 1 +; IND-NEXT: [[TMP8:%.*]] = extractelement <2 x i32> [[WIDE_LOAD]], i64 1 ; IND-NEXT: [[TMP9:%.*]] = udiv i32 [[TMP8]], [[TMP7]] -; IND-NEXT: [[TMP10:%.*]] = insertelement <2 x i32> [[TMP6]], i32 [[TMP9]], i32 1 +; IND-NEXT: [[TMP10:%.*]] = insertelement <2 x i32> [[TMP6]], i32 [[TMP9]], i64 1 ; IND-NEXT: br label [[PRED_UDIV_CONTINUE2]] ; IND: pred.udiv.continue2: ; IND-NEXT: [[TMP11:%.*]] = phi <2 x i32> [ [[TMP6]], [[PRED_UDIV_CONTINUE]] ], [ [[TMP10]], [[PRED_UDIV_IF1]] ] @@ -2167,8 +2167,8 @@ ; UNROLL-NEXT: br i1 [[MIN_ITERS_CHECK]], label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]] ; UNROLL: vector.ph: ; UNROLL-NEXT: [[N_VEC:%.*]] = and i32 [[SMAX]], 2147483644 -; UNROLL-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <2 x i1> poison, i1 [[C:%.*]], i32 0 -; UNROLL-NEXT: [[BROADCAST_SPLATINSERT6:%.*]] = insertelement <2 x i1> poison, i1 [[C]], i32 0 +; UNROLL-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <2 x i1> poison, i1 [[C:%.*]], i64 0 +; UNROLL-NEXT: [[BROADCAST_SPLATINSERT6:%.*]] = insertelement <2 x i1> poison, i1 [[C]], i64 0 ; UNROLL-NEXT: br label [[VECTOR_BODY:%.*]] ; UNROLL: vector.body: ; UNROLL-NEXT: [[INDEX:%.*]] = phi i32 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[PRED_UDIV_CONTINUE11:%.*]] ] @@ -2184,35 +2184,35 @@ ; UNROLL-NEXT: [[WIDE_LOAD3:%.*]] = load <2 x i32>, <2 x i32>* [[TMP5]], align 4 ; UNROLL-NEXT: br i1 [[C]], label [[PRED_UDIV_IF:%.*]], label [[PRED_UDIV_CONTINUE:%.*]] ; UNROLL: pred.udiv.if: -; UNROLL-NEXT: [[TMP6:%.*]] = extractelement <2 x i32> [[WIDE_LOAD]], i32 0 +; UNROLL-NEXT: [[TMP6:%.*]] = extractelement <2 x i32> [[WIDE_LOAD]], i64 0 ; UNROLL-NEXT: [[TMP7:%.*]] = udiv i32 [[TMP6]], [[INDEX]] -; UNROLL-NEXT: [[TMP8:%.*]] = insertelement <2 x i32> poison, i32 [[TMP7]], i32 0 +; UNROLL-NEXT: [[TMP8:%.*]] = insertelement <2 x i32> poison, i32 [[TMP7]], i64 0 ; UNROLL-NEXT: br label [[PRED_UDIV_CONTINUE]] ; UNROLL: pred.udiv.continue: ; UNROLL-NEXT: [[TMP9:%.*]] = phi <2 x i32> [ poison, [[VECTOR_BODY]] ], [ [[TMP8]], [[PRED_UDIV_IF]] ] ; UNROLL-NEXT: br i1 [[C]], label [[PRED_UDIV_IF4:%.*]], label [[PRED_UDIV_CONTINUE5:%.*]] ; UNROLL: pred.udiv.if4: ; UNROLL-NEXT: [[TMP10:%.*]] = or i32 [[INDEX]], 1 -; UNROLL-NEXT: [[TMP11:%.*]] = extractelement <2 x i32> [[WIDE_LOAD]], i32 1 +; UNROLL-NEXT: [[TMP11:%.*]] = extractelement <2 x i32> [[WIDE_LOAD]], i64 1 ; UNROLL-NEXT: [[TMP12:%.*]] = udiv i32 [[TMP11]], [[TMP10]] -; UNROLL-NEXT: [[TMP13:%.*]] = insertelement <2 x i32> [[TMP9]], i32 [[TMP12]], i32 1 +; UNROLL-NEXT: [[TMP13:%.*]] = insertelement <2 x i32> [[TMP9]], i32 [[TMP12]], i64 1 ; UNROLL-NEXT: br label [[PRED_UDIV_CONTINUE5]] ; UNROLL: pred.udiv.continue5: ; UNROLL-NEXT: [[TMP14:%.*]] = phi <2 x i32> [ [[TMP9]], [[PRED_UDIV_CONTINUE]] ], [ [[TMP13]], [[PRED_UDIV_IF4]] ] ; UNROLL-NEXT: br i1 [[C]], label [[PRED_UDIV_IF8:%.*]], label [[PRED_UDIV_CONTINUE9:%.*]] ; UNROLL: pred.udiv.if8: -; UNROLL-NEXT: [[TMP15:%.*]] = extractelement <2 x i32> [[WIDE_LOAD3]], i32 0 +; UNROLL-NEXT: [[TMP15:%.*]] = extractelement <2 x i32> [[WIDE_LOAD3]], i64 0 ; UNROLL-NEXT: [[TMP16:%.*]] = udiv i32 [[TMP15]], [[TMP0]] -; UNROLL-NEXT: [[TMP17:%.*]] = insertelement <2 x i32> poison, i32 [[TMP16]], i32 0 +; UNROLL-NEXT: [[TMP17:%.*]] = insertelement <2 x i32> poison, i32 [[TMP16]], i64 0 ; UNROLL-NEXT: br label [[PRED_UDIV_CONTINUE9]] ; UNROLL: pred.udiv.continue9: ; UNROLL-NEXT: [[TMP18:%.*]] = phi <2 x i32> [ poison, [[PRED_UDIV_CONTINUE5]] ], [ [[TMP17]], [[PRED_UDIV_IF8]] ] ; UNROLL-NEXT: br i1 [[C]], label [[PRED_UDIV_IF10:%.*]], label [[PRED_UDIV_CONTINUE11]] ; UNROLL: pred.udiv.if10: ; UNROLL-NEXT: [[TMP19:%.*]] = or i32 [[INDEX]], 3 -; UNROLL-NEXT: [[TMP20:%.*]] = extractelement <2 x i32> [[WIDE_LOAD3]], i32 1 +; UNROLL-NEXT: [[TMP20:%.*]] = extractelement <2 x i32> [[WIDE_LOAD3]], i64 1 ; UNROLL-NEXT: [[TMP21:%.*]] = udiv i32 [[TMP20]], [[TMP19]] -; UNROLL-NEXT: [[TMP22:%.*]] = insertelement <2 x i32> [[TMP18]], i32 [[TMP21]], i32 1 +; UNROLL-NEXT: [[TMP22:%.*]] = insertelement <2 x i32> [[TMP18]], i32 [[TMP21]], i64 1 ; UNROLL-NEXT: br label [[PRED_UDIV_CONTINUE11]] ; UNROLL: pred.udiv.continue11: ; UNROLL-NEXT: [[TMP23:%.*]] = phi <2 x i32> [ [[TMP18]], [[PRED_UDIV_CONTINUE9]] ], [ [[TMP22]], [[PRED_UDIV_IF10]] ] @@ -2368,8 +2368,8 @@ ; INTERLEAVE-NEXT: br i1 [[MIN_ITERS_CHECK]], label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]] ; INTERLEAVE: vector.ph: ; INTERLEAVE-NEXT: [[N_VEC:%.*]] = and i32 [[SMAX]], 2147483640 -; INTERLEAVE-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <4 x i1> poison, i1 [[C:%.*]], i32 0 -; INTERLEAVE-NEXT: [[BROADCAST_SPLATINSERT10:%.*]] = insertelement <4 x i1> poison, i1 [[C]], i32 0 +; INTERLEAVE-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <4 x i1> poison, i1 [[C:%.*]], i64 0 +; INTERLEAVE-NEXT: [[BROADCAST_SPLATINSERT10:%.*]] = insertelement <4 x i1> poison, i1 [[C]], i64 0 ; INTERLEAVE-NEXT: br label [[VECTOR_BODY:%.*]] ; INTERLEAVE: vector.body: ; INTERLEAVE-NEXT: [[INDEX:%.*]] = phi i32 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[PRED_UDIV_CONTINUE19:%.*]] ] @@ -2385,71 +2385,71 @@ ; INTERLEAVE-NEXT: [[WIDE_LOAD3:%.*]] = load <4 x i32>, <4 x i32>* [[TMP5]], align 4 ; INTERLEAVE-NEXT: br i1 [[C]], label [[PRED_UDIV_IF:%.*]], label [[PRED_UDIV_CONTINUE:%.*]] ; INTERLEAVE: pred.udiv.if: -; INTERLEAVE-NEXT: [[TMP6:%.*]] = extractelement <4 x i32> [[WIDE_LOAD]], i32 0 +; INTERLEAVE-NEXT: [[TMP6:%.*]] = extractelement <4 x i32> [[WIDE_LOAD]], i64 0 ; INTERLEAVE-NEXT: [[TMP7:%.*]] = udiv i32 [[TMP6]], [[INDEX]] -; INTERLEAVE-NEXT: [[TMP8:%.*]] = insertelement <4 x i32> poison, i32 [[TMP7]], i32 0 +; INTERLEAVE-NEXT: [[TMP8:%.*]] = insertelement <4 x i32> poison, i32 [[TMP7]], i64 0 ; INTERLEAVE-NEXT: br label [[PRED_UDIV_CONTINUE]] ; INTERLEAVE: pred.udiv.continue: ; INTERLEAVE-NEXT: [[TMP9:%.*]] = phi <4 x i32> [ poison, [[VECTOR_BODY]] ], [ [[TMP8]], [[PRED_UDIV_IF]] ] ; INTERLEAVE-NEXT: br i1 [[C]], label [[PRED_UDIV_IF4:%.*]], label [[PRED_UDIV_CONTINUE5:%.*]] ; INTERLEAVE: pred.udiv.if4: ; INTERLEAVE-NEXT: [[TMP10:%.*]] = or i32 [[INDEX]], 1 -; INTERLEAVE-NEXT: [[TMP11:%.*]] = extractelement <4 x i32> [[WIDE_LOAD]], i32 1 +; INTERLEAVE-NEXT: [[TMP11:%.*]] = extractelement <4 x i32> [[WIDE_LOAD]], i64 1 ; INTERLEAVE-NEXT: [[TMP12:%.*]] = udiv i32 [[TMP11]], [[TMP10]] -; INTERLEAVE-NEXT: [[TMP13:%.*]] = insertelement <4 x i32> [[TMP9]], i32 [[TMP12]], i32 1 +; INTERLEAVE-NEXT: [[TMP13:%.*]] = insertelement <4 x i32> [[TMP9]], i32 [[TMP12]], i64 1 ; INTERLEAVE-NEXT: br label [[PRED_UDIV_CONTINUE5]] ; INTERLEAVE: pred.udiv.continue5: ; INTERLEAVE-NEXT: [[TMP14:%.*]] = phi <4 x i32> [ [[TMP9]], [[PRED_UDIV_CONTINUE]] ], [ [[TMP13]], [[PRED_UDIV_IF4]] ] ; INTERLEAVE-NEXT: br i1 [[C]], label [[PRED_UDIV_IF6:%.*]], label [[PRED_UDIV_CONTINUE7:%.*]] ; INTERLEAVE: pred.udiv.if6: ; INTERLEAVE-NEXT: [[TMP15:%.*]] = or i32 [[INDEX]], 2 -; INTERLEAVE-NEXT: [[TMP16:%.*]] = extractelement <4 x i32> [[WIDE_LOAD]], i32 2 +; INTERLEAVE-NEXT: [[TMP16:%.*]] = extractelement <4 x i32> [[WIDE_LOAD]], i64 2 ; INTERLEAVE-NEXT: [[TMP17:%.*]] = udiv i32 [[TMP16]], [[TMP15]] -; INTERLEAVE-NEXT: [[TMP18:%.*]] = insertelement <4 x i32> [[TMP14]], i32 [[TMP17]], i32 2 +; INTERLEAVE-NEXT: [[TMP18:%.*]] = insertelement <4 x i32> [[TMP14]], i32 [[TMP17]], i64 2 ; INTERLEAVE-NEXT: br label [[PRED_UDIV_CONTINUE7]] ; INTERLEAVE: pred.udiv.continue7: ; INTERLEAVE-NEXT: [[TMP19:%.*]] = phi <4 x i32> [ [[TMP14]], [[PRED_UDIV_CONTINUE5]] ], [ [[TMP18]], [[PRED_UDIV_IF6]] ] ; INTERLEAVE-NEXT: br i1 [[C]], label [[PRED_UDIV_IF8:%.*]], label [[PRED_UDIV_CONTINUE9:%.*]] ; INTERLEAVE: pred.udiv.if8: ; INTERLEAVE-NEXT: [[TMP20:%.*]] = or i32 [[INDEX]], 3 -; INTERLEAVE-NEXT: [[TMP21:%.*]] = extractelement <4 x i32> [[WIDE_LOAD]], i32 3 +; INTERLEAVE-NEXT: [[TMP21:%.*]] = extractelement <4 x i32> [[WIDE_LOAD]], i64 3 ; INTERLEAVE-NEXT: [[TMP22:%.*]] = udiv i32 [[TMP21]], [[TMP20]] -; INTERLEAVE-NEXT: [[TMP23:%.*]] = insertelement <4 x i32> [[TMP19]], i32 [[TMP22]], i32 3 +; INTERLEAVE-NEXT: [[TMP23:%.*]] = insertelement <4 x i32> [[TMP19]], i32 [[TMP22]], i64 3 ; INTERLEAVE-NEXT: br label [[PRED_UDIV_CONTINUE9]] ; INTERLEAVE: pred.udiv.continue9: ; INTERLEAVE-NEXT: [[TMP24:%.*]] = phi <4 x i32> [ [[TMP19]], [[PRED_UDIV_CONTINUE7]] ], [ [[TMP23]], [[PRED_UDIV_IF8]] ] ; INTERLEAVE-NEXT: br i1 [[C]], label [[PRED_UDIV_IF12:%.*]], label [[PRED_UDIV_CONTINUE13:%.*]] ; INTERLEAVE: pred.udiv.if12: -; INTERLEAVE-NEXT: [[TMP25:%.*]] = extractelement <4 x i32> [[WIDE_LOAD3]], i32 0 +; INTERLEAVE-NEXT: [[TMP25:%.*]] = extractelement <4 x i32> [[WIDE_LOAD3]], i64 0 ; INTERLEAVE-NEXT: [[TMP26:%.*]] = udiv i32 [[TMP25]], [[TMP0]] -; INTERLEAVE-NEXT: [[TMP27:%.*]] = insertelement <4 x i32> poison, i32 [[TMP26]], i32 0 +; INTERLEAVE-NEXT: [[TMP27:%.*]] = insertelement <4 x i32> poison, i32 [[TMP26]], i64 0 ; INTERLEAVE-NEXT: br label [[PRED_UDIV_CONTINUE13]] ; INTERLEAVE: pred.udiv.continue13: ; INTERLEAVE-NEXT: [[TMP28:%.*]] = phi <4 x i32> [ poison, [[PRED_UDIV_CONTINUE9]] ], [ [[TMP27]], [[PRED_UDIV_IF12]] ] ; INTERLEAVE-NEXT: br i1 [[C]], label [[PRED_UDIV_IF14:%.*]], label [[PRED_UDIV_CONTINUE15:%.*]] ; INTERLEAVE: pred.udiv.if14: ; INTERLEAVE-NEXT: [[TMP29:%.*]] = or i32 [[INDEX]], 5 -; INTERLEAVE-NEXT: [[TMP30:%.*]] = extractelement <4 x i32> [[WIDE_LOAD3]], i32 1 +; INTERLEAVE-NEXT: [[TMP30:%.*]] = extractelement <4 x i32> [[WIDE_LOAD3]], i64 1 ; INTERLEAVE-NEXT: [[TMP31:%.*]] = udiv i32 [[TMP30]], [[TMP29]] -; INTERLEAVE-NEXT: [[TMP32:%.*]] = insertelement <4 x i32> [[TMP28]], i32 [[TMP31]], i32 1 +; INTERLEAVE-NEXT: [[TMP32:%.*]] = insertelement <4 x i32> [[TMP28]], i32 [[TMP31]], i64 1 ; INTERLEAVE-NEXT: br label [[PRED_UDIV_CONTINUE15]] ; INTERLEAVE: pred.udiv.continue15: ; INTERLEAVE-NEXT: [[TMP33:%.*]] = phi <4 x i32> [ [[TMP28]], [[PRED_UDIV_CONTINUE13]] ], [ [[TMP32]], [[PRED_UDIV_IF14]] ] ; INTERLEAVE-NEXT: br i1 [[C]], label [[PRED_UDIV_IF16:%.*]], label [[PRED_UDIV_CONTINUE17:%.*]] ; INTERLEAVE: pred.udiv.if16: ; INTERLEAVE-NEXT: [[TMP34:%.*]] = or i32 [[INDEX]], 6 -; INTERLEAVE-NEXT: [[TMP35:%.*]] = extractelement <4 x i32> [[WIDE_LOAD3]], i32 2 +; INTERLEAVE-NEXT: [[TMP35:%.*]] = extractelement <4 x i32> [[WIDE_LOAD3]], i64 2 ; INTERLEAVE-NEXT: [[TMP36:%.*]] = udiv i32 [[TMP35]], [[TMP34]] -; INTERLEAVE-NEXT: [[TMP37:%.*]] = insertelement <4 x i32> [[TMP33]], i32 [[TMP36]], i32 2 +; INTERLEAVE-NEXT: [[TMP37:%.*]] = insertelement <4 x i32> [[TMP33]], i32 [[TMP36]], i64 2 ; INTERLEAVE-NEXT: br label [[PRED_UDIV_CONTINUE17]] ; INTERLEAVE: pred.udiv.continue17: ; INTERLEAVE-NEXT: [[TMP38:%.*]] = phi <4 x i32> [ [[TMP33]], [[PRED_UDIV_CONTINUE15]] ], [ [[TMP37]], [[PRED_UDIV_IF16]] ] ; INTERLEAVE-NEXT: br i1 [[C]], label [[PRED_UDIV_IF18:%.*]], label [[PRED_UDIV_CONTINUE19]] ; INTERLEAVE: pred.udiv.if18: ; INTERLEAVE-NEXT: [[TMP39:%.*]] = or i32 [[INDEX]], 7 -; INTERLEAVE-NEXT: [[TMP40:%.*]] = extractelement <4 x i32> [[WIDE_LOAD3]], i32 3 +; INTERLEAVE-NEXT: [[TMP40:%.*]] = extractelement <4 x i32> [[WIDE_LOAD3]], i64 3 ; INTERLEAVE-NEXT: [[TMP41:%.*]] = udiv i32 [[TMP40]], [[TMP39]] -; INTERLEAVE-NEXT: [[TMP42:%.*]] = insertelement <4 x i32> [[TMP38]], i32 [[TMP41]], i32 3 +; INTERLEAVE-NEXT: [[TMP42:%.*]] = insertelement <4 x i32> [[TMP38]], i32 [[TMP41]], i64 3 ; INTERLEAVE-NEXT: br label [[PRED_UDIV_CONTINUE19]] ; INTERLEAVE: pred.udiv.continue19: ; INTERLEAVE-NEXT: [[TMP43:%.*]] = phi <4 x i32> [ [[TMP38]], [[PRED_UDIV_CONTINUE17]] ], [ [[TMP42]], [[PRED_UDIV_IF18]] ] @@ -2590,7 +2590,7 @@ ; IND-NEXT: br i1 [[MIN_ITERS_CHECK]], label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]] ; IND: vector.ph: ; IND-NEXT: [[N_VEC:%.*]] = and i64 [[TMP2]], 8589934590 -; IND-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <2 x i32> poison, i32 [[A:%.*]], i32 0 +; IND-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <2 x i32> poison, i32 [[A:%.*]], i64 0 ; IND-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector <2 x i32> [[BROADCAST_SPLATINSERT]], <2 x i32> poison, <2 x i32> zeroinitializer ; IND-NEXT: br label [[VECTOR_BODY:%.*]] ; IND: vector.body: @@ -2601,9 +2601,9 @@ ; IND-NEXT: [[TMP5:%.*]] = trunc <2 x i32> [[TMP4]] to <2 x i16> ; IND-NEXT: [[TMP6:%.*]] = getelementptr inbounds [[PAIR_I16:%.*]], %pair.i16* [[P:%.*]], i64 [[INDEX]], i32 1 ; IND-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[PAIR_I16]], %pair.i16* [[P]], i64 [[TMP3]], i32 1 -; IND-NEXT: [[TMP8:%.*]] = extractelement <2 x i16> [[TMP5]], i32 0 +; IND-NEXT: [[TMP8:%.*]] = extractelement <2 x i16> [[TMP5]], i64 0 ; IND-NEXT: store i16 [[TMP8]], i16* [[TMP6]], align 2 -; IND-NEXT: [[TMP9:%.*]] = extractelement <2 x i16> [[TMP5]], i32 1 +; IND-NEXT: [[TMP9:%.*]] = extractelement <2 x i16> [[TMP5]], i64 1 ; IND-NEXT: store i16 [[TMP9]], i16* [[TMP7]], align 2 ; IND-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 2 ; IND-NEXT: [[VEC_IND_NEXT2]] = add <2 x i32> [[VEC_IND1]], @@ -2638,9 +2638,9 @@ ; UNROLL-NEXT: br i1 [[MIN_ITERS_CHECK]], label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]] ; UNROLL: vector.ph: ; UNROLL-NEXT: [[N_VEC:%.*]] = and i64 [[TMP2]], 8589934588 -; UNROLL-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <2 x i32> poison, i32 [[A:%.*]], i32 0 +; UNROLL-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <2 x i32> poison, i32 [[A:%.*]], i64 0 ; UNROLL-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector <2 x i32> [[BROADCAST_SPLATINSERT]], <2 x i32> poison, <2 x i32> zeroinitializer -; UNROLL-NEXT: [[BROADCAST_SPLATINSERT6:%.*]] = insertelement <2 x i32> poison, i32 [[A]], i32 0 +; UNROLL-NEXT: [[BROADCAST_SPLATINSERT6:%.*]] = insertelement <2 x i32> poison, i32 [[A]], i64 0 ; UNROLL-NEXT: br label [[VECTOR_BODY:%.*]] ; UNROLL: vector.body: ; UNROLL-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ] @@ -2658,13 +2658,13 @@ ; UNROLL-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[PAIR_I16]], %pair.i16* [[P]], i64 [[TMP3]], i32 1 ; UNROLL-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[PAIR_I16]], %pair.i16* [[P]], i64 [[TMP4]], i32 1 ; UNROLL-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[PAIR_I16]], %pair.i16* [[P]], i64 [[TMP5]], i32 1 -; UNROLL-NEXT: [[TMP16:%.*]] = extractelement <2 x i16> [[TMP10]], i32 0 +; UNROLL-NEXT: [[TMP16:%.*]] = extractelement <2 x i16> [[TMP10]], i64 0 ; UNROLL-NEXT: store i16 [[TMP16]], i16* [[TMP12]], align 2 -; UNROLL-NEXT: [[TMP17:%.*]] = extractelement <2 x i16> [[TMP10]], i32 1 +; UNROLL-NEXT: [[TMP17:%.*]] = extractelement <2 x i16> [[TMP10]], i64 1 ; UNROLL-NEXT: store i16 [[TMP17]], i16* [[TMP13]], align 2 -; UNROLL-NEXT: [[TMP18:%.*]] = extractelement <2 x i16> [[TMP11]], i32 0 +; UNROLL-NEXT: [[TMP18:%.*]] = extractelement <2 x i16> [[TMP11]], i64 0 ; UNROLL-NEXT: store i16 [[TMP18]], i16* [[TMP14]], align 2 -; UNROLL-NEXT: [[TMP19:%.*]] = extractelement <2 x i16> [[TMP11]], i32 1 +; UNROLL-NEXT: [[TMP19:%.*]] = extractelement <2 x i16> [[TMP11]], i64 1 ; UNROLL-NEXT: store i16 [[TMP19]], i16* [[TMP15]], align 2 ; UNROLL-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4 ; UNROLL-NEXT: [[VEC_IND_NEXT5]] = add <2 x i32> [[VEC_IND2]], @@ -2765,9 +2765,9 @@ ; INTERLEAVE-NEXT: br i1 [[MIN_ITERS_CHECK]], label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]] ; INTERLEAVE: vector.ph: ; INTERLEAVE-NEXT: [[N_VEC:%.*]] = and i64 [[TMP2]], 8589934584 -; INTERLEAVE-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <4 x i32> poison, i32 [[A:%.*]], i32 0 +; INTERLEAVE-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <4 x i32> poison, i32 [[A:%.*]], i64 0 ; INTERLEAVE-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector <4 x i32> [[BROADCAST_SPLATINSERT]], <4 x i32> poison, <4 x i32> zeroinitializer -; INTERLEAVE-NEXT: [[BROADCAST_SPLATINSERT6:%.*]] = insertelement <4 x i32> poison, i32 [[A]], i32 0 +; INTERLEAVE-NEXT: [[BROADCAST_SPLATINSERT6:%.*]] = insertelement <4 x i32> poison, i32 [[A]], i64 0 ; INTERLEAVE-NEXT: br label [[VECTOR_BODY:%.*]] ; INTERLEAVE: vector.body: ; INTERLEAVE-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ] @@ -2793,21 +2793,21 @@ ; INTERLEAVE-NEXT: [[TMP21:%.*]] = getelementptr inbounds [[PAIR_I16]], %pair.i16* [[P]], i64 [[TMP7]], i32 1 ; INTERLEAVE-NEXT: [[TMP22:%.*]] = getelementptr inbounds [[PAIR_I16]], %pair.i16* [[P]], i64 [[TMP8]], i32 1 ; INTERLEAVE-NEXT: [[TMP23:%.*]] = getelementptr inbounds [[PAIR_I16]], %pair.i16* [[P]], i64 [[TMP9]], i32 1 -; INTERLEAVE-NEXT: [[TMP24:%.*]] = extractelement <4 x i16> [[TMP14]], i32 0 +; INTERLEAVE-NEXT: [[TMP24:%.*]] = extractelement <4 x i16> [[TMP14]], i64 0 ; INTERLEAVE-NEXT: store i16 [[TMP24]], i16* [[TMP16]], align 2 -; INTERLEAVE-NEXT: [[TMP25:%.*]] = extractelement <4 x i16> [[TMP14]], i32 1 +; INTERLEAVE-NEXT: [[TMP25:%.*]] = extractelement <4 x i16> [[TMP14]], i64 1 ; INTERLEAVE-NEXT: store i16 [[TMP25]], i16* [[TMP17]], align 2 -; INTERLEAVE-NEXT: [[TMP26:%.*]] = extractelement <4 x i16> [[TMP14]], i32 2 +; INTERLEAVE-NEXT: [[TMP26:%.*]] = extractelement <4 x i16> [[TMP14]], i64 2 ; INTERLEAVE-NEXT: store i16 [[TMP26]], i16* [[TMP18]], align 2 -; INTERLEAVE-NEXT: [[TMP27:%.*]] = extractelement <4 x i16> [[TMP14]], i32 3 +; INTERLEAVE-NEXT: [[TMP27:%.*]] = extractelement <4 x i16> [[TMP14]], i64 3 ; INTERLEAVE-NEXT: store i16 [[TMP27]], i16* [[TMP19]], align 2 -; INTERLEAVE-NEXT: [[TMP28:%.*]] = extractelement <4 x i16> [[TMP15]], i32 0 +; INTERLEAVE-NEXT: [[TMP28:%.*]] = extractelement <4 x i16> [[TMP15]], i64 0 ; INTERLEAVE-NEXT: store i16 [[TMP28]], i16* [[TMP20]], align 2 -; INTERLEAVE-NEXT: [[TMP29:%.*]] = extractelement <4 x i16> [[TMP15]], i32 1 +; INTERLEAVE-NEXT: [[TMP29:%.*]] = extractelement <4 x i16> [[TMP15]], i64 1 ; INTERLEAVE-NEXT: store i16 [[TMP29]], i16* [[TMP21]], align 2 -; INTERLEAVE-NEXT: [[TMP30:%.*]] = extractelement <4 x i16> [[TMP15]], i32 2 +; INTERLEAVE-NEXT: [[TMP30:%.*]] = extractelement <4 x i16> [[TMP15]], i64 2 ; INTERLEAVE-NEXT: store i16 [[TMP30]], i16* [[TMP22]], align 2 -; INTERLEAVE-NEXT: [[TMP31:%.*]] = extractelement <4 x i16> [[TMP15]], i32 3 +; INTERLEAVE-NEXT: [[TMP31:%.*]] = extractelement <4 x i16> [[TMP15]], i64 3 ; INTERLEAVE-NEXT: store i16 [[TMP31]], i16* [[TMP23]], align 2 ; INTERLEAVE-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 8 ; INTERLEAVE-NEXT: [[VEC_IND_NEXT5]] = add <4 x i32> [[VEC_IND2]], @@ -3350,8 +3350,8 @@ ; IND-NEXT: [[N_VEC:%.*]] = and i32 [[TMP3]], 510 ; IND-NEXT: [[CAST_CRD:%.*]] = trunc i32 [[N_VEC]] to i8 ; IND-NEXT: [[IND_END:%.*]] = add i8 [[DOTPR_I]], [[CAST_CRD]] -; IND-NEXT: [[TMP4:%.*]] = insertelement <2 x i32> , i32 [[C_PROMOTED_I]], i32 0 -; IND-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <2 x i32> poison, i32 [[TMP0]], i32 0 +; IND-NEXT: [[TMP4:%.*]] = insertelement <2 x i32> , i32 [[C_PROMOTED_I]], i64 0 +; IND-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <2 x i32> poison, i32 [[TMP0]], i64 0 ; IND-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector <2 x i32> [[BROADCAST_SPLATINSERT]], <2 x i32> poison, <2 x i32> zeroinitializer ; IND-NEXT: br label [[VECTOR_BODY:%.*]] ; IND: vector.body: @@ -3392,9 +3392,9 @@ ; UNROLL-NEXT: [[N_VEC:%.*]] = and i32 [[TMP3]], 508 ; UNROLL-NEXT: [[CAST_CRD:%.*]] = trunc i32 [[N_VEC]] to i8 ; UNROLL-NEXT: [[IND_END:%.*]] = add i8 [[DOTPR_I]], [[CAST_CRD]] -; UNROLL-NEXT: [[TMP4:%.*]] = insertelement <2 x i32> , i32 [[C_PROMOTED_I]], i32 0 -; UNROLL-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <2 x i32> poison, i32 [[TMP0]], i32 0 -; UNROLL-NEXT: [[BROADCAST_SPLATINSERT2:%.*]] = insertelement <2 x i32> poison, i32 [[TMP0]], i32 0 +; UNROLL-NEXT: [[TMP4:%.*]] = insertelement <2 x i32> , i32 [[C_PROMOTED_I]], i64 0 +; UNROLL-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <2 x i32> poison, i32 [[TMP0]], i64 0 +; UNROLL-NEXT: [[BROADCAST_SPLATINSERT2:%.*]] = insertelement <2 x i32> poison, i32 [[TMP0]], i64 0 ; UNROLL-NEXT: br label [[VECTOR_BODY:%.*]] ; UNROLL: vector.body: ; UNROLL-NEXT: [[INDEX:%.*]] = phi i32 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ] @@ -3490,9 +3490,9 @@ ; INTERLEAVE-NEXT: [[N_VEC:%.*]] = and i32 [[TMP3]], 504 ; INTERLEAVE-NEXT: [[CAST_CRD:%.*]] = trunc i32 [[N_VEC]] to i8 ; INTERLEAVE-NEXT: [[IND_END:%.*]] = add i8 [[DOTPR_I]], [[CAST_CRD]] -; INTERLEAVE-NEXT: [[TMP4:%.*]] = insertelement <4 x i32> , i32 [[C_PROMOTED_I]], i32 0 -; INTERLEAVE-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <4 x i32> poison, i32 [[TMP0]], i32 0 -; INTERLEAVE-NEXT: [[BROADCAST_SPLATINSERT2:%.*]] = insertelement <4 x i32> poison, i32 [[TMP0]], i32 0 +; INTERLEAVE-NEXT: [[TMP4:%.*]] = insertelement <4 x i32> , i32 [[C_PROMOTED_I]], i64 0 +; INTERLEAVE-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <4 x i32> poison, i32 [[TMP0]], i64 0 +; INTERLEAVE-NEXT: [[BROADCAST_SPLATINSERT2:%.*]] = insertelement <4 x i32> poison, i32 [[TMP0]], i64 0 ; INTERLEAVE-NEXT: br label [[VECTOR_BODY:%.*]] ; INTERLEAVE: vector.body: ; INTERLEAVE-NEXT: [[INDEX:%.*]] = phi i32 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ] @@ -3657,7 +3657,7 @@ ; IND-NEXT: [[CAST_CRD:%.*]] = trunc i32 [[N_VEC]] to i8 ; IND-NEXT: [[IND_END:%.*]] = add i8 [[CAST_CRD]], [[T]] ; IND-NEXT: [[IND_END3:%.*]] = add i32 [[N_VEC]], [[EXT]] -; IND-NEXT: [[DOTSPLATINSERT4:%.*]] = insertelement <2 x i32> poison, i32 [[EXT]], i32 0 +; IND-NEXT: [[DOTSPLATINSERT4:%.*]] = insertelement <2 x i32> poison, i32 [[EXT]], i64 0 ; IND-NEXT: [[DOTSPLAT5:%.*]] = shufflevector <2 x i32> [[DOTSPLATINSERT4]], <2 x i32> poison, <2 x i32> zeroinitializer ; IND-NEXT: [[INDUCTION6:%.*]] = add nuw nsw <2 x i32> [[DOTSPLAT5]], ; IND-NEXT: br label [[VECTOR_BODY:%.*]] @@ -3726,7 +3726,7 @@ ; UNROLL-NEXT: [[CAST_CRD:%.*]] = trunc i32 [[N_VEC]] to i8 ; UNROLL-NEXT: [[IND_END:%.*]] = add i8 [[CAST_CRD]], [[T]] ; UNROLL-NEXT: [[IND_END3:%.*]] = add i32 [[N_VEC]], [[EXT]] -; UNROLL-NEXT: [[DOTSPLATINSERT5:%.*]] = insertelement <2 x i32> poison, i32 [[EXT]], i32 0 +; UNROLL-NEXT: [[DOTSPLATINSERT5:%.*]] = insertelement <2 x i32> poison, i32 [[EXT]], i64 0 ; UNROLL-NEXT: [[DOTSPLAT6:%.*]] = shufflevector <2 x i32> [[DOTSPLATINSERT5]], <2 x i32> poison, <2 x i32> zeroinitializer ; UNROLL-NEXT: [[INDUCTION7:%.*]] = add nuw nsw <2 x i32> [[DOTSPLAT6]], ; UNROLL-NEXT: br label [[VECTOR_BODY:%.*]] @@ -3895,7 +3895,7 @@ ; INTERLEAVE-NEXT: [[CAST_CRD:%.*]] = trunc i32 [[N_VEC]] to i8 ; INTERLEAVE-NEXT: [[IND_END:%.*]] = add i8 [[CAST_CRD]], [[T]] ; INTERLEAVE-NEXT: [[IND_END3:%.*]] = add i32 [[N_VEC]], [[EXT]] -; INTERLEAVE-NEXT: [[DOTSPLATINSERT5:%.*]] = insertelement <4 x i32> poison, i32 [[EXT]], i32 0 +; INTERLEAVE-NEXT: [[DOTSPLATINSERT5:%.*]] = insertelement <4 x i32> poison, i32 [[EXT]], i64 0 ; INTERLEAVE-NEXT: [[DOTSPLAT6:%.*]] = shufflevector <4 x i32> [[DOTSPLATINSERT5]], <4 x i32> poison, <4 x i32> zeroinitializer ; INTERLEAVE-NEXT: [[INDUCTION7:%.*]] = add nuw nsw <4 x i32> [[DOTSPLAT6]], ; INTERLEAVE-NEXT: br label [[VECTOR_BODY:%.*]] @@ -4091,7 +4091,7 @@ ; IND-NEXT: [[IND_END:%.*]] = add i8 [[CAST_CRD]], [[T]] ; IND-NEXT: [[TMP12:%.*]] = add i32 [[N_VEC]], [[EXT]] ; IND-NEXT: [[IND_END2:%.*]] = shl i32 [[TMP12]], 2 -; IND-NEXT: [[DOTSPLATINSERT4:%.*]] = insertelement <2 x i32> poison, i32 [[EXT_MUL]], i32 0 +; IND-NEXT: [[DOTSPLATINSERT4:%.*]] = insertelement <2 x i32> poison, i32 [[EXT_MUL]], i64 0 ; IND-NEXT: [[DOTSPLAT5:%.*]] = shufflevector <2 x i32> [[DOTSPLATINSERT4]], <2 x i32> poison, <2 x i32> zeroinitializer ; IND-NEXT: [[INDUCTION6:%.*]] = add nuw nsw <2 x i32> [[DOTSPLAT5]], ; IND-NEXT: br label [[VECTOR_BODY:%.*]] @@ -4163,7 +4163,7 @@ ; UNROLL-NEXT: [[IND_END:%.*]] = add i8 [[CAST_CRD]], [[T]] ; UNROLL-NEXT: [[TMP12:%.*]] = add i32 [[N_VEC]], [[EXT]] ; UNROLL-NEXT: [[IND_END2:%.*]] = shl i32 [[TMP12]], 2 -; UNROLL-NEXT: [[DOTSPLATINSERT5:%.*]] = insertelement <2 x i32> poison, i32 [[EXT_MUL]], i32 0 +; UNROLL-NEXT: [[DOTSPLATINSERT5:%.*]] = insertelement <2 x i32> poison, i32 [[EXT_MUL]], i64 0 ; UNROLL-NEXT: [[DOTSPLAT6:%.*]] = shufflevector <2 x i32> [[DOTSPLATINSERT5]], <2 x i32> poison, <2 x i32> zeroinitializer ; UNROLL-NEXT: [[INDUCTION7:%.*]] = add nuw nsw <2 x i32> [[DOTSPLAT6]], ; UNROLL-NEXT: br label [[VECTOR_BODY:%.*]] @@ -4340,7 +4340,7 @@ ; INTERLEAVE-NEXT: [[IND_END:%.*]] = add i8 [[CAST_CRD]], [[T]] ; INTERLEAVE-NEXT: [[TMP12:%.*]] = add i32 [[N_VEC]], [[EXT]] ; INTERLEAVE-NEXT: [[IND_END2:%.*]] = shl i32 [[TMP12]], 2 -; INTERLEAVE-NEXT: [[DOTSPLATINSERT5:%.*]] = insertelement <4 x i32> poison, i32 [[EXT_MUL]], i32 0 +; INTERLEAVE-NEXT: [[DOTSPLATINSERT5:%.*]] = insertelement <4 x i32> poison, i32 [[EXT_MUL]], i64 0 ; INTERLEAVE-NEXT: [[DOTSPLAT6:%.*]] = shufflevector <4 x i32> [[DOTSPLATINSERT5]], <4 x i32> poison, <4 x i32> zeroinitializer ; INTERLEAVE-NEXT: [[INDUCTION7:%.*]] = add nuw nsw <4 x i32> [[DOTSPLAT6]], ; INTERLEAVE-NEXT: br label [[VECTOR_BODY:%.*]] @@ -4948,7 +4948,7 @@ ; IND: vector.ph: ; IND-NEXT: [[N_VEC:%.*]] = and i32 [[TMP0]], -2 ; IND-NEXT: [[IND_END:%.*]] = add i32 [[N_VEC]], [[I]] -; IND-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <2 x i32> poison, i32 [[I]], i32 0 +; IND-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <2 x i32> poison, i32 [[I]], i64 0 ; IND-NEXT: [[DOTSPLAT:%.*]] = shufflevector <2 x i32> [[DOTSPLATINSERT]], <2 x i32> poison, <2 x i32> zeroinitializer ; IND-NEXT: [[INDUCTION:%.*]] = add <2 x i32> [[DOTSPLAT]], ; IND-NEXT: br label [[VECTOR_BODY:%.*]] @@ -4989,7 +4989,7 @@ ; UNROLL: vector.ph: ; UNROLL-NEXT: [[N_VEC:%.*]] = and i32 [[TMP0]], -4 ; UNROLL-NEXT: [[IND_END:%.*]] = add i32 [[N_VEC]], [[I]] -; UNROLL-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <2 x i32> poison, i32 [[I]], i32 0 +; UNROLL-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <2 x i32> poison, i32 [[I]], i64 0 ; UNROLL-NEXT: [[DOTSPLAT:%.*]] = shufflevector <2 x i32> [[DOTSPLATINSERT]], <2 x i32> poison, <2 x i32> zeroinitializer ; UNROLL-NEXT: [[INDUCTION:%.*]] = add <2 x i32> [[DOTSPLAT]], ; UNROLL-NEXT: br label [[VECTOR_BODY:%.*]] @@ -5084,7 +5084,7 @@ ; INTERLEAVE: vector.ph: ; INTERLEAVE-NEXT: [[N_VEC:%.*]] = and i32 [[TMP0]], -8 ; INTERLEAVE-NEXT: [[IND_END:%.*]] = add i32 [[N_VEC]], [[I]] -; INTERLEAVE-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <4 x i32> poison, i32 [[I]], i32 0 +; INTERLEAVE-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <4 x i32> poison, i32 [[I]], i64 0 ; INTERLEAVE-NEXT: [[DOTSPLAT:%.*]] = shufflevector <4 x i32> [[DOTSPLATINSERT]], <4 x i32> poison, <4 x i32> zeroinitializer ; INTERLEAVE-NEXT: [[INDUCTION:%.*]] = add <4 x i32> [[DOTSPLAT]], ; INTERLEAVE-NEXT: br label [[VECTOR_BODY:%.*]] @@ -5455,7 +5455,7 @@ ; IND-NEXT: entry: ; IND-NEXT: br i1 false, label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]] ; IND: vector.ph: -; IND-NEXT: [[TMP0:%.*]] = insertelement <2 x i32> , i32 [[A:%.*]], i32 0 +; IND-NEXT: [[TMP0:%.*]] = insertelement <2 x i32> , i32 [[A:%.*]], i64 0 ; IND-NEXT: br label [[VECTOR_BODY:%.*]] ; IND: vector.body: ; IND-NEXT: [[INDEX:%.*]] = phi i32 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[PRED_UREM_CONTINUE4:%.*]] ] @@ -5464,21 +5464,21 @@ ; IND-NEXT: [[TMP1:%.*]] = trunc i32 [[INDEX]] to i16 ; IND-NEXT: [[TMP2:%.*]] = icmp eq <2 x i16> [[VEC_IND1]], zeroinitializer ; IND-NEXT: [[TMP3:%.*]] = xor <2 x i1> [[TMP2]], -; IND-NEXT: [[TMP4:%.*]] = extractelement <2 x i1> [[TMP3]], i32 0 +; IND-NEXT: [[TMP4:%.*]] = extractelement <2 x i1> [[TMP3]], i64 0 ; IND-NEXT: br i1 [[TMP4]], label [[PRED_UREM_IF:%.*]], label [[PRED_UREM_CONTINUE:%.*]] ; IND: pred.urem.if: ; IND-NEXT: [[TMP5:%.*]] = add i16 [[TMP1]], -20 ; IND-NEXT: [[TMP6:%.*]] = urem i16 [[B:%.*]], [[TMP5]] -; IND-NEXT: [[TMP7:%.*]] = insertelement <2 x i16> poison, i16 [[TMP6]], i32 0 +; IND-NEXT: [[TMP7:%.*]] = insertelement <2 x i16> poison, i16 [[TMP6]], i64 0 ; IND-NEXT: br label [[PRED_UREM_CONTINUE]] ; IND: pred.urem.continue: ; IND-NEXT: [[TMP8:%.*]] = phi <2 x i16> [ poison, [[VECTOR_BODY]] ], [ [[TMP7]], [[PRED_UREM_IF]] ] -; IND-NEXT: [[TMP9:%.*]] = extractelement <2 x i1> [[TMP3]], i32 1 +; IND-NEXT: [[TMP9:%.*]] = extractelement <2 x i1> [[TMP3]], i64 1 ; IND-NEXT: br i1 [[TMP9]], label [[PRED_UREM_IF3:%.*]], label [[PRED_UREM_CONTINUE4]] ; IND: pred.urem.if3: ; IND-NEXT: [[TMP10:%.*]] = add i16 [[TMP1]], -19 ; IND-NEXT: [[TMP11:%.*]] = urem i16 [[B]], [[TMP10]] -; IND-NEXT: [[TMP12:%.*]] = insertelement <2 x i16> [[TMP8]], i16 [[TMP11]], i32 1 +; IND-NEXT: [[TMP12:%.*]] = insertelement <2 x i16> [[TMP8]], i16 [[TMP11]], i64 1 ; IND-NEXT: br label [[PRED_UREM_CONTINUE4]] ; IND: pred.urem.continue4: ; IND-NEXT: [[TMP13:%.*]] = phi <2 x i16> [ [[TMP8]], [[PRED_UREM_CONTINUE]] ], [ [[TMP12]], [[PRED_UREM_IF3]] ] @@ -5508,7 +5508,7 @@ ; UNROLL-NEXT: entry: ; UNROLL-NEXT: br i1 false, label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]] ; UNROLL: vector.ph: -; UNROLL-NEXT: [[TMP0:%.*]] = insertelement <2 x i32> , i32 [[A:%.*]], i32 0 +; UNROLL-NEXT: [[TMP0:%.*]] = insertelement <2 x i32> , i32 [[A:%.*]], i64 0 ; UNROLL-NEXT: br label [[VECTOR_BODY:%.*]] ; UNROLL: vector.body: ; UNROLL-NEXT: [[INDEX:%.*]] = phi i32 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[PRED_UREM_CONTINUE12:%.*]] ] @@ -5520,39 +5520,39 @@ ; UNROLL-NEXT: [[TMP3:%.*]] = icmp eq <2 x i16> [[VEC_IND3]], ; UNROLL-NEXT: [[TMP4:%.*]] = xor <2 x i1> [[TMP2]], ; UNROLL-NEXT: [[TMP5:%.*]] = xor <2 x i1> [[TMP3]], -; UNROLL-NEXT: [[TMP6:%.*]] = extractelement <2 x i1> [[TMP4]], i32 0 +; UNROLL-NEXT: [[TMP6:%.*]] = extractelement <2 x i1> [[TMP4]], i64 0 ; UNROLL-NEXT: br i1 [[TMP6]], label [[PRED_UREM_IF:%.*]], label [[PRED_UREM_CONTINUE:%.*]] ; UNROLL: pred.urem.if: ; UNROLL-NEXT: [[TMP7:%.*]] = add i16 [[TMP1]], -20 ; UNROLL-NEXT: [[TMP8:%.*]] = urem i16 [[B:%.*]], [[TMP7]] -; UNROLL-NEXT: [[TMP9:%.*]] = insertelement <2 x i16> poison, i16 [[TMP8]], i32 0 +; UNROLL-NEXT: [[TMP9:%.*]] = insertelement <2 x i16> poison, i16 [[TMP8]], i64 0 ; UNROLL-NEXT: br label [[PRED_UREM_CONTINUE]] ; UNROLL: pred.urem.continue: ; UNROLL-NEXT: [[TMP10:%.*]] = phi <2 x i16> [ poison, [[VECTOR_BODY]] ], [ [[TMP9]], [[PRED_UREM_IF]] ] -; UNROLL-NEXT: [[TMP11:%.*]] = extractelement <2 x i1> [[TMP4]], i32 1 +; UNROLL-NEXT: [[TMP11:%.*]] = extractelement <2 x i1> [[TMP4]], i64 1 ; UNROLL-NEXT: br i1 [[TMP11]], label [[PRED_UREM_IF7:%.*]], label [[PRED_UREM_CONTINUE8:%.*]] ; UNROLL: pred.urem.if7: ; UNROLL-NEXT: [[TMP12:%.*]] = add i16 [[TMP1]], -19 ; UNROLL-NEXT: [[TMP13:%.*]] = urem i16 [[B]], [[TMP12]] -; UNROLL-NEXT: [[TMP14:%.*]] = insertelement <2 x i16> [[TMP10]], i16 [[TMP13]], i32 1 +; UNROLL-NEXT: [[TMP14:%.*]] = insertelement <2 x i16> [[TMP10]], i16 [[TMP13]], i64 1 ; UNROLL-NEXT: br label [[PRED_UREM_CONTINUE8]] ; UNROLL: pred.urem.continue8: ; UNROLL-NEXT: [[TMP15:%.*]] = phi <2 x i16> [ [[TMP10]], [[PRED_UREM_CONTINUE]] ], [ [[TMP14]], [[PRED_UREM_IF7]] ] -; UNROLL-NEXT: [[TMP16:%.*]] = extractelement <2 x i1> [[TMP5]], i32 0 +; UNROLL-NEXT: [[TMP16:%.*]] = extractelement <2 x i1> [[TMP5]], i64 0 ; UNROLL-NEXT: br i1 [[TMP16]], label [[PRED_UREM_IF9:%.*]], label [[PRED_UREM_CONTINUE10:%.*]] ; UNROLL: pred.urem.if9: ; UNROLL-NEXT: [[TMP17:%.*]] = add i16 [[TMP1]], -18 ; UNROLL-NEXT: [[TMP18:%.*]] = urem i16 [[B]], [[TMP17]] -; UNROLL-NEXT: [[TMP19:%.*]] = insertelement <2 x i16> poison, i16 [[TMP18]], i32 0 +; UNROLL-NEXT: [[TMP19:%.*]] = insertelement <2 x i16> poison, i16 [[TMP18]], i64 0 ; UNROLL-NEXT: br label [[PRED_UREM_CONTINUE10]] ; UNROLL: pred.urem.continue10: ; UNROLL-NEXT: [[TMP20:%.*]] = phi <2 x i16> [ poison, [[PRED_UREM_CONTINUE8]] ], [ [[TMP19]], [[PRED_UREM_IF9]] ] -; UNROLL-NEXT: [[TMP21:%.*]] = extractelement <2 x i1> [[TMP5]], i32 1 +; UNROLL-NEXT: [[TMP21:%.*]] = extractelement <2 x i1> [[TMP5]], i64 1 ; UNROLL-NEXT: br i1 [[TMP21]], label [[PRED_UREM_IF11:%.*]], label [[PRED_UREM_CONTINUE12]] ; UNROLL: pred.urem.if11: ; UNROLL-NEXT: [[TMP22:%.*]] = add i16 [[TMP1]], -17 ; UNROLL-NEXT: [[TMP23:%.*]] = urem i16 [[B]], [[TMP22]] -; UNROLL-NEXT: [[TMP24:%.*]] = insertelement <2 x i16> [[TMP20]], i16 [[TMP23]], i32 1 +; UNROLL-NEXT: [[TMP24:%.*]] = insertelement <2 x i16> [[TMP20]], i16 [[TMP23]], i64 1 ; UNROLL-NEXT: br label [[PRED_UREM_CONTINUE12]] ; UNROLL: pred.urem.continue12: ; UNROLL-NEXT: [[TMP25:%.*]] = phi <2 x i16> [ [[TMP20]], [[PRED_UREM_CONTINUE10]] ], [ [[TMP24]], [[PRED_UREM_IF11]] ] @@ -5682,7 +5682,7 @@ ; INTERLEAVE-NEXT: entry: ; INTERLEAVE-NEXT: br i1 false, label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]] ; INTERLEAVE: vector.ph: -; INTERLEAVE-NEXT: [[TMP0:%.*]] = insertelement <4 x i32> , i32 [[A:%.*]], i32 0 +; INTERLEAVE-NEXT: [[TMP0:%.*]] = insertelement <4 x i32> , i32 [[A:%.*]], i64 0 ; INTERLEAVE-NEXT: br label [[VECTOR_BODY:%.*]] ; INTERLEAVE: vector.body: ; INTERLEAVE-NEXT: [[INDEX:%.*]] = phi i32 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[PRED_UREM_CONTINUE20:%.*]] ] @@ -5694,75 +5694,75 @@ ; INTERLEAVE-NEXT: [[TMP3:%.*]] = icmp eq <4 x i16> [[VEC_IND3]], ; INTERLEAVE-NEXT: [[TMP4:%.*]] = xor <4 x i1> [[TMP2]], ; INTERLEAVE-NEXT: [[TMP5:%.*]] = xor <4 x i1> [[TMP3]], -; INTERLEAVE-NEXT: [[TMP6:%.*]] = extractelement <4 x i1> [[TMP4]], i32 0 +; INTERLEAVE-NEXT: [[TMP6:%.*]] = extractelement <4 x i1> [[TMP4]], i64 0 ; INTERLEAVE-NEXT: br i1 [[TMP6]], label [[PRED_UREM_IF:%.*]], label [[PRED_UREM_CONTINUE:%.*]] ; INTERLEAVE: pred.urem.if: ; INTERLEAVE-NEXT: [[TMP7:%.*]] = add i16 [[TMP1]], -20 ; INTERLEAVE-NEXT: [[TMP8:%.*]] = urem i16 [[B:%.*]], [[TMP7]] -; INTERLEAVE-NEXT: [[TMP9:%.*]] = insertelement <4 x i16> poison, i16 [[TMP8]], i32 0 +; INTERLEAVE-NEXT: [[TMP9:%.*]] = insertelement <4 x i16> poison, i16 [[TMP8]], i64 0 ; INTERLEAVE-NEXT: br label [[PRED_UREM_CONTINUE]] ; INTERLEAVE: pred.urem.continue: ; INTERLEAVE-NEXT: [[TMP10:%.*]] = phi <4 x i16> [ poison, [[VECTOR_BODY]] ], [ [[TMP9]], [[PRED_UREM_IF]] ] -; INTERLEAVE-NEXT: [[TMP11:%.*]] = extractelement <4 x i1> [[TMP4]], i32 1 +; INTERLEAVE-NEXT: [[TMP11:%.*]] = extractelement <4 x i1> [[TMP4]], i64 1 ; INTERLEAVE-NEXT: br i1 [[TMP11]], label [[PRED_UREM_IF7:%.*]], label [[PRED_UREM_CONTINUE8:%.*]] ; INTERLEAVE: pred.urem.if7: ; INTERLEAVE-NEXT: [[TMP12:%.*]] = add i16 [[TMP1]], -19 ; INTERLEAVE-NEXT: [[TMP13:%.*]] = urem i16 [[B]], [[TMP12]] -; INTERLEAVE-NEXT: [[TMP14:%.*]] = insertelement <4 x i16> [[TMP10]], i16 [[TMP13]], i32 1 +; INTERLEAVE-NEXT: [[TMP14:%.*]] = insertelement <4 x i16> [[TMP10]], i16 [[TMP13]], i64 1 ; INTERLEAVE-NEXT: br label [[PRED_UREM_CONTINUE8]] ; INTERLEAVE: pred.urem.continue8: ; INTERLEAVE-NEXT: [[TMP15:%.*]] = phi <4 x i16> [ [[TMP10]], [[PRED_UREM_CONTINUE]] ], [ [[TMP14]], [[PRED_UREM_IF7]] ] -; INTERLEAVE-NEXT: [[TMP16:%.*]] = extractelement <4 x i1> [[TMP4]], i32 2 +; INTERLEAVE-NEXT: [[TMP16:%.*]] = extractelement <4 x i1> [[TMP4]], i64 2 ; INTERLEAVE-NEXT: br i1 [[TMP16]], label [[PRED_UREM_IF9:%.*]], label [[PRED_UREM_CONTINUE10:%.*]] ; INTERLEAVE: pred.urem.if9: ; INTERLEAVE-NEXT: [[TMP17:%.*]] = add i16 [[TMP1]], -18 ; INTERLEAVE-NEXT: [[TMP18:%.*]] = urem i16 [[B]], [[TMP17]] -; INTERLEAVE-NEXT: [[TMP19:%.*]] = insertelement <4 x i16> [[TMP15]], i16 [[TMP18]], i32 2 +; INTERLEAVE-NEXT: [[TMP19:%.*]] = insertelement <4 x i16> [[TMP15]], i16 [[TMP18]], i64 2 ; INTERLEAVE-NEXT: br label [[PRED_UREM_CONTINUE10]] ; INTERLEAVE: pred.urem.continue10: ; INTERLEAVE-NEXT: [[TMP20:%.*]] = phi <4 x i16> [ [[TMP15]], [[PRED_UREM_CONTINUE8]] ], [ [[TMP19]], [[PRED_UREM_IF9]] ] -; INTERLEAVE-NEXT: [[TMP21:%.*]] = extractelement <4 x i1> [[TMP4]], i32 3 +; INTERLEAVE-NEXT: [[TMP21:%.*]] = extractelement <4 x i1> [[TMP4]], i64 3 ; INTERLEAVE-NEXT: br i1 [[TMP21]], label [[PRED_UREM_IF11:%.*]], label [[PRED_UREM_CONTINUE12:%.*]] ; INTERLEAVE: pred.urem.if11: ; INTERLEAVE-NEXT: [[TMP22:%.*]] = add i16 [[TMP1]], -17 ; INTERLEAVE-NEXT: [[TMP23:%.*]] = urem i16 [[B]], [[TMP22]] -; INTERLEAVE-NEXT: [[TMP24:%.*]] = insertelement <4 x i16> [[TMP20]], i16 [[TMP23]], i32 3 +; INTERLEAVE-NEXT: [[TMP24:%.*]] = insertelement <4 x i16> [[TMP20]], i16 [[TMP23]], i64 3 ; INTERLEAVE-NEXT: br label [[PRED_UREM_CONTINUE12]] ; INTERLEAVE: pred.urem.continue12: ; INTERLEAVE-NEXT: [[TMP25:%.*]] = phi <4 x i16> [ [[TMP20]], [[PRED_UREM_CONTINUE10]] ], [ [[TMP24]], [[PRED_UREM_IF11]] ] -; INTERLEAVE-NEXT: [[TMP26:%.*]] = extractelement <4 x i1> [[TMP5]], i32 0 +; INTERLEAVE-NEXT: [[TMP26:%.*]] = extractelement <4 x i1> [[TMP5]], i64 0 ; INTERLEAVE-NEXT: br i1 [[TMP26]], label [[PRED_UREM_IF13:%.*]], label [[PRED_UREM_CONTINUE14:%.*]] ; INTERLEAVE: pred.urem.if13: ; INTERLEAVE-NEXT: [[TMP27:%.*]] = add i16 [[TMP1]], -16 ; INTERLEAVE-NEXT: [[TMP28:%.*]] = urem i16 [[B]], [[TMP27]] -; INTERLEAVE-NEXT: [[TMP29:%.*]] = insertelement <4 x i16> poison, i16 [[TMP28]], i32 0 +; INTERLEAVE-NEXT: [[TMP29:%.*]] = insertelement <4 x i16> poison, i16 [[TMP28]], i64 0 ; INTERLEAVE-NEXT: br label [[PRED_UREM_CONTINUE14]] ; INTERLEAVE: pred.urem.continue14: ; INTERLEAVE-NEXT: [[TMP30:%.*]] = phi <4 x i16> [ poison, [[PRED_UREM_CONTINUE12]] ], [ [[TMP29]], [[PRED_UREM_IF13]] ] -; INTERLEAVE-NEXT: [[TMP31:%.*]] = extractelement <4 x i1> [[TMP5]], i32 1 +; INTERLEAVE-NEXT: [[TMP31:%.*]] = extractelement <4 x i1> [[TMP5]], i64 1 ; INTERLEAVE-NEXT: br i1 [[TMP31]], label [[PRED_UREM_IF15:%.*]], label [[PRED_UREM_CONTINUE16:%.*]] ; INTERLEAVE: pred.urem.if15: ; INTERLEAVE-NEXT: [[TMP32:%.*]] = add i16 [[TMP1]], -15 ; INTERLEAVE-NEXT: [[TMP33:%.*]] = urem i16 [[B]], [[TMP32]] -; INTERLEAVE-NEXT: [[TMP34:%.*]] = insertelement <4 x i16> [[TMP30]], i16 [[TMP33]], i32 1 +; INTERLEAVE-NEXT: [[TMP34:%.*]] = insertelement <4 x i16> [[TMP30]], i16 [[TMP33]], i64 1 ; INTERLEAVE-NEXT: br label [[PRED_UREM_CONTINUE16]] ; INTERLEAVE: pred.urem.continue16: ; INTERLEAVE-NEXT: [[TMP35:%.*]] = phi <4 x i16> [ [[TMP30]], [[PRED_UREM_CONTINUE14]] ], [ [[TMP34]], [[PRED_UREM_IF15]] ] -; INTERLEAVE-NEXT: [[TMP36:%.*]] = extractelement <4 x i1> [[TMP5]], i32 2 +; INTERLEAVE-NEXT: [[TMP36:%.*]] = extractelement <4 x i1> [[TMP5]], i64 2 ; INTERLEAVE-NEXT: br i1 [[TMP36]], label [[PRED_UREM_IF17:%.*]], label [[PRED_UREM_CONTINUE18:%.*]] ; INTERLEAVE: pred.urem.if17: ; INTERLEAVE-NEXT: [[TMP37:%.*]] = add i16 [[TMP1]], -14 ; INTERLEAVE-NEXT: [[TMP38:%.*]] = urem i16 [[B]], [[TMP37]] -; INTERLEAVE-NEXT: [[TMP39:%.*]] = insertelement <4 x i16> [[TMP35]], i16 [[TMP38]], i32 2 +; INTERLEAVE-NEXT: [[TMP39:%.*]] = insertelement <4 x i16> [[TMP35]], i16 [[TMP38]], i64 2 ; INTERLEAVE-NEXT: br label [[PRED_UREM_CONTINUE18]] ; INTERLEAVE: pred.urem.continue18: ; INTERLEAVE-NEXT: [[TMP40:%.*]] = phi <4 x i16> [ [[TMP35]], [[PRED_UREM_CONTINUE16]] ], [ [[TMP39]], [[PRED_UREM_IF17]] ] -; INTERLEAVE-NEXT: [[TMP41:%.*]] = extractelement <4 x i1> [[TMP5]], i32 3 +; INTERLEAVE-NEXT: [[TMP41:%.*]] = extractelement <4 x i1> [[TMP5]], i64 3 ; INTERLEAVE-NEXT: br i1 [[TMP41]], label [[PRED_UREM_IF19:%.*]], label [[PRED_UREM_CONTINUE20]] ; INTERLEAVE: pred.urem.if19: ; INTERLEAVE-NEXT: [[TMP42:%.*]] = add i16 [[TMP1]], -13 ; INTERLEAVE-NEXT: [[TMP43:%.*]] = urem i16 [[B]], [[TMP42]] -; INTERLEAVE-NEXT: [[TMP44:%.*]] = insertelement <4 x i16> [[TMP40]], i16 [[TMP43]], i32 3 +; INTERLEAVE-NEXT: [[TMP44:%.*]] = insertelement <4 x i16> [[TMP40]], i16 [[TMP43]], i64 3 ; INTERLEAVE-NEXT: br label [[PRED_UREM_CONTINUE20]] ; INTERLEAVE: pred.urem.continue20: ; INTERLEAVE-NEXT: [[TMP45:%.*]] = phi <4 x i16> [ [[TMP40]], [[PRED_UREM_CONTINUE18]] ], [ [[TMP44]], [[PRED_UREM_IF19]] ] @@ -5936,7 +5936,7 @@ ; IND-NEXT: br i1 [[TMP11]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP50:![0-9]+]] ; IND: middle.block: ; IND-NEXT: [[TMP12:%.*]] = call i64 @llvm.vector.reduce.add.v2i64(<2 x i64> [[TMP10]]) -; IND-NEXT: [[VECTOR_RECUR_EXTRACT:%.*]] = extractelement <2 x i32> [[VEC_IND4]], i32 1 +; IND-NEXT: [[VECTOR_RECUR_EXTRACT:%.*]] = extractelement <2 x i32> [[VEC_IND4]], i64 1 ; IND-NEXT: br i1 false, label [[EXIT:%.*]], label [[SCALAR_PH]] ; IND: scalar.ph: ; IND-NEXT: [[SCALAR_RECUR_INIT:%.*]] = phi i32 [ 42, [[ENTRY:%.*]] ], [ [[VECTOR_RECUR_EXTRACT]], [[MIDDLE_BLOCK]] ] @@ -6016,7 +6016,7 @@ ; UNROLL: middle.block: ; UNROLL-NEXT: [[BIN_RDX:%.*]] = add <2 x i64> [[TMP21]], [[TMP20]] ; UNROLL-NEXT: [[TMP23:%.*]] = call i64 @llvm.vector.reduce.add.v2i64(<2 x i64> [[BIN_RDX]]) -; UNROLL-NEXT: [[VECTOR_RECUR_EXTRACT:%.*]] = extractelement <2 x i32> [[STEP_ADD9]], i32 1 +; UNROLL-NEXT: [[VECTOR_RECUR_EXTRACT:%.*]] = extractelement <2 x i32> [[STEP_ADD9]], i64 1 ; UNROLL-NEXT: br i1 false, label [[EXIT:%.*]], label [[SCALAR_PH]] ; UNROLL: scalar.ph: ; UNROLL-NEXT: [[SCALAR_RECUR_INIT:%.*]] = phi i32 [ 42, [[ENTRY:%.*]] ], [ [[VECTOR_RECUR_EXTRACT]], [[MIDDLE_BLOCK]] ] @@ -6181,7 +6181,7 @@ ; INTERLEAVE: middle.block: ; INTERLEAVE-NEXT: [[BIN_RDX:%.*]] = add <4 x i64> [[TMP21]], [[TMP20]] ; INTERLEAVE-NEXT: [[TMP23:%.*]] = call i64 @llvm.vector.reduce.add.v4i64(<4 x i64> [[BIN_RDX]]) -; INTERLEAVE-NEXT: [[VECTOR_RECUR_EXTRACT:%.*]] = extractelement <4 x i32> [[STEP_ADD9]], i32 3 +; INTERLEAVE-NEXT: [[VECTOR_RECUR_EXTRACT:%.*]] = extractelement <4 x i32> [[STEP_ADD9]], i64 3 ; INTERLEAVE-NEXT: br i1 false, label [[EXIT:%.*]], label [[SCALAR_PH]] ; INTERLEAVE: scalar.ph: ; INTERLEAVE-NEXT: [[SCALAR_RECUR_INIT:%.*]] = phi i32 [ 42, [[ENTRY:%.*]] ], [ [[VECTOR_RECUR_EXTRACT]], [[MIDDLE_BLOCK]] ] @@ -6316,7 +6316,7 @@ ; IND-NEXT: [[VEC_IND2]] = phi <2 x i32> [ , [[VECTOR_PH]] ], [ [[VEC_IND_NEXT3:%.*]], [[VECTOR_BODY]] ] ; IND-NEXT: [[TMP0:%.*]] = shufflevector <2 x i32> [[VECTOR_RECUR]], <2 x i32> [[VEC_IND2]], <2 x i32> ; IND-NEXT: [[TMP1:%.*]] = load i32, i32* [[SRC:%.*]], align 4 -; IND-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <2 x i32> poison, i32 [[TMP1]], i32 0 +; IND-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <2 x i32> poison, i32 [[TMP1]], i64 0 ; IND-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector <2 x i32> [[BROADCAST_SPLATINSERT]], <2 x i32> poison, <2 x i32> zeroinitializer ; IND-NEXT: [[TMP2:%.*]] = mul nsw <2 x i32> [[BROADCAST_SPLAT]], [[TMP0]] ; IND-NEXT: [[SEXT:%.*]] = shl i64 [[INDEX]], 32 @@ -6351,9 +6351,9 @@ ; UNROLL-NEXT: [[TMP0:%.*]] = shufflevector <2 x i32> [[VECTOR_RECUR]], <2 x i32> [[VEC_IND3]], <2 x i32> ; UNROLL-NEXT: [[TMP1:%.*]] = shufflevector <2 x i32> [[VEC_IND3]], <2 x i32> [[STEP_ADD4]], <2 x i32> ; UNROLL-NEXT: [[TMP2:%.*]] = load i32, i32* [[SRC:%.*]], align 4 -; UNROLL-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <2 x i32> poison, i32 [[TMP2]], i32 0 +; UNROLL-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <2 x i32> poison, i32 [[TMP2]], i64 0 ; UNROLL-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector <2 x i32> [[BROADCAST_SPLATINSERT]], <2 x i32> poison, <2 x i32> zeroinitializer -; UNROLL-NEXT: [[BROADCAST_SPLATINSERT7:%.*]] = insertelement <2 x i32> poison, i32 [[TMP2]], i32 0 +; UNROLL-NEXT: [[BROADCAST_SPLATINSERT7:%.*]] = insertelement <2 x i32> poison, i32 [[TMP2]], i64 0 ; UNROLL-NEXT: [[BROADCAST_SPLAT8:%.*]] = shufflevector <2 x i32> [[BROADCAST_SPLATINSERT7]], <2 x i32> poison, <2 x i32> zeroinitializer ; UNROLL-NEXT: [[TMP3:%.*]] = mul nsw <2 x i32> [[BROADCAST_SPLAT]], [[TMP0]] ; UNROLL-NEXT: [[TMP4:%.*]] = mul nsw <2 x i32> [[BROADCAST_SPLAT8]], [[TMP1]] @@ -6465,9 +6465,9 @@ ; INTERLEAVE-NEXT: [[TMP0:%.*]] = shufflevector <4 x i32> [[VECTOR_RECUR]], <4 x i32> [[VEC_IND3]], <4 x i32> ; INTERLEAVE-NEXT: [[TMP1:%.*]] = shufflevector <4 x i32> [[VEC_IND3]], <4 x i32> [[STEP_ADD4]], <4 x i32> ; INTERLEAVE-NEXT: [[TMP2:%.*]] = load i32, i32* [[SRC:%.*]], align 4 -; INTERLEAVE-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <4 x i32> poison, i32 [[TMP2]], i32 0 +; INTERLEAVE-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <4 x i32> poison, i32 [[TMP2]], i64 0 ; INTERLEAVE-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector <4 x i32> [[BROADCAST_SPLATINSERT]], <4 x i32> poison, <4 x i32> zeroinitializer -; INTERLEAVE-NEXT: [[BROADCAST_SPLATINSERT7:%.*]] = insertelement <4 x i32> poison, i32 [[TMP2]], i32 0 +; INTERLEAVE-NEXT: [[BROADCAST_SPLATINSERT7:%.*]] = insertelement <4 x i32> poison, i32 [[TMP2]], i64 0 ; INTERLEAVE-NEXT: [[BROADCAST_SPLAT8:%.*]] = shufflevector <4 x i32> [[BROADCAST_SPLATINSERT7]], <4 x i32> poison, <4 x i32> zeroinitializer ; INTERLEAVE-NEXT: [[TMP3:%.*]] = mul nsw <4 x i32> [[BROADCAST_SPLAT]], [[TMP0]] ; INTERLEAVE-NEXT: [[TMP4:%.*]] = mul nsw <4 x i32> [[BROADCAST_SPLAT8]], [[TMP1]] @@ -6486,7 +6486,7 @@ ; INTERLEAVE-NEXT: [[TMP12:%.*]] = icmp eq i64 [[INDEX_NEXT]], 96 ; INTERLEAVE-NEXT: br i1 [[TMP12]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP52:![0-9]+]] ; INTERLEAVE: middle.block: -; INTERLEAVE-NEXT: [[VECTOR_RECUR_EXTRACT:%.*]] = extractelement <4 x i32> [[STEP_ADD4]], i32 3 +; INTERLEAVE-NEXT: [[VECTOR_RECUR_EXTRACT:%.*]] = extractelement <4 x i32> [[STEP_ADD4]], i64 3 ; INTERLEAVE-NEXT: br i1 false, label [[EXIT:%.*]], label [[SCALAR_PH]] ; INTERLEAVE: scalar.ph: ; INTERLEAVE-NEXT: [[SCALAR_RECUR_INIT:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[VECTOR_RECUR_EXTRACT]], [[MIDDLE_BLOCK]] ] @@ -6650,11 +6650,11 @@ ; IND-NEXT: [[N_VEC:%.*]] = and i64 [[N]], -2 ; IND-NEXT: [[CAST_CRD:%.*]] = trunc i64 [[N_VEC]] to i32 ; IND-NEXT: [[IND_END:%.*]] = mul i32 [[CAST_CRD]], [[STEP]] -; IND-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <2 x i32> poison, i32 [[STEP]], i32 0 +; IND-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <2 x i32> poison, i32 [[STEP]], i64 0 ; IND-NEXT: [[DOTSPLAT:%.*]] = shufflevector <2 x i32> [[DOTSPLATINSERT]], <2 x i32> poison, <2 x i32> zeroinitializer ; IND-NEXT: [[TMP17:%.*]] = mul nuw <2 x i32> [[DOTSPLAT]], ; IND-NEXT: [[TMP18:%.*]] = shl i32 [[STEP]], 1 -; IND-NEXT: [[DOTSPLATINSERT2:%.*]] = insertelement <2 x i32> poison, i32 [[TMP18]], i32 0 +; IND-NEXT: [[DOTSPLATINSERT2:%.*]] = insertelement <2 x i32> poison, i32 [[TMP18]], i64 0 ; IND-NEXT: [[DOTSPLAT3:%.*]] = shufflevector <2 x i32> [[DOTSPLATINSERT2]], <2 x i32> poison, <2 x i32> zeroinitializer ; IND-NEXT: br label [[VECTOR_BODY:%.*]] ; IND: vector.body: @@ -6671,7 +6671,7 @@ ; IND-NEXT: br i1 [[TMP22]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP54:![0-9]+]] ; IND: middle.block: ; IND-NEXT: [[CMP_N:%.*]] = icmp eq i64 [[N_VEC]], [[N]] -; IND-NEXT: [[VECTOR_RECUR_EXTRACT:%.*]] = extractelement <2 x i32> [[VEC_IND]], i32 1 +; IND-NEXT: [[VECTOR_RECUR_EXTRACT:%.*]] = extractelement <2 x i32> [[VEC_IND]], i64 1 ; IND-NEXT: br i1 [[CMP_N]], label [[EXIT:%.*]], label [[SCALAR_PH]] ; IND: scalar.ph: ; IND-NEXT: [[SCALAR_RECUR_INIT:%.*]] = phi i32 [ 0, [[VECTOR_SCEVCHECK]] ], [ 0, [[ENTRY:%.*]] ], [ [[VECTOR_RECUR_EXTRACT]], [[MIDDLE_BLOCK]] ] @@ -6723,11 +6723,11 @@ ; UNROLL-NEXT: [[N_VEC:%.*]] = and i64 [[N]], -4 ; UNROLL-NEXT: [[CAST_CRD:%.*]] = trunc i64 [[N_VEC]] to i32 ; UNROLL-NEXT: [[IND_END:%.*]] = mul i32 [[CAST_CRD]], [[STEP]] -; UNROLL-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <2 x i32> poison, i32 [[STEP]], i32 0 +; UNROLL-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <2 x i32> poison, i32 [[STEP]], i64 0 ; UNROLL-NEXT: [[DOTSPLAT:%.*]] = shufflevector <2 x i32> [[DOTSPLATINSERT]], <2 x i32> poison, <2 x i32> zeroinitializer ; UNROLL-NEXT: [[TMP17:%.*]] = mul nuw <2 x i32> [[DOTSPLAT]], ; UNROLL-NEXT: [[TMP18:%.*]] = shl i32 [[STEP]], 1 -; UNROLL-NEXT: [[DOTSPLATINSERT2:%.*]] = insertelement <2 x i32> poison, i32 [[TMP18]], i32 0 +; UNROLL-NEXT: [[DOTSPLATINSERT2:%.*]] = insertelement <2 x i32> poison, i32 [[TMP18]], i64 0 ; UNROLL-NEXT: [[DOTSPLAT3:%.*]] = shufflevector <2 x i32> [[DOTSPLATINSERT2]], <2 x i32> poison, <2 x i32> zeroinitializer ; UNROLL-NEXT: br label [[VECTOR_BODY:%.*]] ; UNROLL: vector.body: @@ -6749,7 +6749,7 @@ ; UNROLL-NEXT: br i1 [[TMP25]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP54:![0-9]+]] ; UNROLL: middle.block: ; UNROLL-NEXT: [[CMP_N:%.*]] = icmp eq i64 [[N_VEC]], [[N]] -; UNROLL-NEXT: [[VECTOR_RECUR_EXTRACT:%.*]] = extractelement <2 x i32> [[STEP_ADD]], i32 1 +; UNROLL-NEXT: [[VECTOR_RECUR_EXTRACT:%.*]] = extractelement <2 x i32> [[STEP_ADD]], i64 1 ; UNROLL-NEXT: br i1 [[CMP_N]], label [[EXIT:%.*]], label [[SCALAR_PH]] ; UNROLL: scalar.ph: ; UNROLL-NEXT: [[SCALAR_RECUR_INIT:%.*]] = phi i32 [ 0, [[VECTOR_SCEVCHECK]] ], [ 0, [[ENTRY:%.*]] ], [ [[VECTOR_RECUR_EXTRACT]], [[MIDDLE_BLOCK]] ] @@ -6889,11 +6889,11 @@ ; INTERLEAVE-NEXT: [[N_VEC:%.*]] = and i64 [[N]], -8 ; INTERLEAVE-NEXT: [[CAST_CRD:%.*]] = trunc i64 [[N_VEC]] to i32 ; INTERLEAVE-NEXT: [[IND_END:%.*]] = mul i32 [[CAST_CRD]], [[STEP]] -; INTERLEAVE-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <4 x i32> poison, i32 [[STEP]], i32 0 +; INTERLEAVE-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <4 x i32> poison, i32 [[STEP]], i64 0 ; INTERLEAVE-NEXT: [[DOTSPLAT:%.*]] = shufflevector <4 x i32> [[DOTSPLATINSERT]], <4 x i32> poison, <4 x i32> zeroinitializer ; INTERLEAVE-NEXT: [[TMP17:%.*]] = mul <4 x i32> [[DOTSPLAT]], ; INTERLEAVE-NEXT: [[TMP18:%.*]] = shl i32 [[STEP]], 2 -; INTERLEAVE-NEXT: [[DOTSPLATINSERT2:%.*]] = insertelement <4 x i32> poison, i32 [[TMP18]], i32 0 +; INTERLEAVE-NEXT: [[DOTSPLATINSERT2:%.*]] = insertelement <4 x i32> poison, i32 [[TMP18]], i64 0 ; INTERLEAVE-NEXT: [[DOTSPLAT3:%.*]] = shufflevector <4 x i32> [[DOTSPLATINSERT2]], <4 x i32> poison, <4 x i32> zeroinitializer ; INTERLEAVE-NEXT: br label [[VECTOR_BODY:%.*]] ; INTERLEAVE: vector.body: @@ -6915,7 +6915,7 @@ ; INTERLEAVE-NEXT: br i1 [[TMP25]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP54:![0-9]+]] ; INTERLEAVE: middle.block: ; INTERLEAVE-NEXT: [[CMP_N:%.*]] = icmp eq i64 [[N_VEC]], [[N]] -; INTERLEAVE-NEXT: [[VECTOR_RECUR_EXTRACT:%.*]] = extractelement <4 x i32> [[STEP_ADD]], i32 3 +; INTERLEAVE-NEXT: [[VECTOR_RECUR_EXTRACT:%.*]] = extractelement <4 x i32> [[STEP_ADD]], i64 3 ; INTERLEAVE-NEXT: br i1 [[CMP_N]], label [[EXIT:%.*]], label [[SCALAR_PH]] ; INTERLEAVE: scalar.ph: ; INTERLEAVE-NEXT: [[SCALAR_RECUR_INIT:%.*]] = phi i32 [ 0, [[VECTOR_SCEVCHECK]] ], [ 0, [[ENTRY:%.*]] ], [ [[VECTOR_RECUR_EXTRACT]], [[MIDDLE_BLOCK]] ] diff --git a/llvm/test/Transforms/LoopVectorize/interleaved-accesses-pred-stores.ll b/llvm/test/Transforms/LoopVectorize/interleaved-accesses-pred-stores.ll --- a/llvm/test/Transforms/LoopVectorize/interleaved-accesses-pred-stores.ll +++ b/llvm/test/Transforms/LoopVectorize/interleaved-accesses-pred-stores.ll @@ -25,7 +25,7 @@ ; CHECK-NEXT: [[TMP0:%.*]] = icmp eq i64 [[N_MOD_VF]], 0 ; CHECK-NEXT: [[TMP1:%.*]] = select i1 [[TMP0]], i64 2, i64 [[N_MOD_VF]] ; CHECK-NEXT: [[N_VEC:%.*]] = sub nsw i64 [[SMAX]], [[TMP1]] -; CHECK-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <2 x i64> poison, i64 [[X:%.*]], i32 0 +; CHECK-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <2 x i64> poison, i64 [[X:%.*]], i64 0 ; CHECK-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector <2 x i64> [[BROADCAST_SPLATINSERT]], <2 x i64> poison, <2 x i32> zeroinitializer ; CHECK-NEXT: br label [[VECTOR_BODY:%.*]] ; CHECK: vector.body: @@ -35,19 +35,19 @@ ; CHECK-NEXT: [[WIDE_VEC:%.*]] = load <4 x i64>, <4 x i64>* [[TMP3]], align 8 ; CHECK-NEXT: [[STRIDED_VEC:%.*]] = shufflevector <4 x i64> [[WIDE_VEC]], <4 x i64> poison, <2 x i32> ; CHECK-NEXT: [[TMP4:%.*]] = icmp eq <2 x i64> [[STRIDED_VEC]], [[BROADCAST_SPLAT]] -; CHECK-NEXT: [[TMP5:%.*]] = extractelement <2 x i1> [[TMP4]], i32 0 +; CHECK-NEXT: [[TMP5:%.*]] = extractelement <2 x i1> [[TMP4]], i64 0 ; CHECK-NEXT: br i1 [[TMP5]], label [[PRED_STORE_IF:%.*]], label [[PRED_STORE_CONTINUE:%.*]] ; CHECK: pred.store.if: -; CHECK-NEXT: [[TMP6:%.*]] = extractelement <4 x i64> [[WIDE_VEC]], i32 0 +; CHECK-NEXT: [[TMP6:%.*]] = extractelement <4 x i64> [[WIDE_VEC]], i64 0 ; CHECK-NEXT: store i64 [[TMP6]], i64* [[TMP2]], align 8 ; CHECK-NEXT: br label [[PRED_STORE_CONTINUE]] ; CHECK: pred.store.continue: -; CHECK-NEXT: [[TMP7:%.*]] = extractelement <2 x i1> [[TMP4]], i32 1 +; CHECK-NEXT: [[TMP7:%.*]] = extractelement <2 x i1> [[TMP4]], i64 1 ; CHECK-NEXT: br i1 [[TMP7]], label [[PRED_STORE_IF1:%.*]], label [[PRED_STORE_CONTINUE2]] ; CHECK: pred.store.if1: ; CHECK-NEXT: [[TMP8:%.*]] = or i64 [[INDEX]], 1 ; CHECK-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[PAIR]], %pair* [[P]], i64 [[TMP8]], i32 1 -; CHECK-NEXT: [[TMP10:%.*]] = extractelement <4 x i64> [[WIDE_VEC]], i32 2 +; CHECK-NEXT: [[TMP10:%.*]] = extractelement <4 x i64> [[WIDE_VEC]], i64 2 ; CHECK-NEXT: store i64 [[TMP10]], i64* [[TMP9]], align 8 ; CHECK-NEXT: br label [[PRED_STORE_CONTINUE2]] ; CHECK: pred.store.continue2: @@ -120,7 +120,7 @@ ; CHECK-NEXT: [[TMP0:%.*]] = icmp eq i64 [[N_MOD_VF]], 0 ; CHECK-NEXT: [[TMP1:%.*]] = select i1 [[TMP0]], i64 2, i64 [[N_MOD_VF]] ; CHECK-NEXT: [[N_VEC:%.*]] = sub nsw i64 [[SMAX]], [[TMP1]] -; CHECK-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <2 x i64> poison, i64 [[X:%.*]], i32 0 +; CHECK-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <2 x i64> poison, i64 [[X:%.*]], i64 0 ; CHECK-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector <2 x i64> [[BROADCAST_SPLATINSERT]], <2 x i64> poison, <2 x i32> zeroinitializer ; CHECK-NEXT: br label [[VECTOR_BODY:%.*]] ; CHECK: vector.body: @@ -133,26 +133,26 @@ ; CHECK-NEXT: [[WIDE_VEC:%.*]] = load <4 x i64>, <4 x i64>* [[TMP6]], align 8 ; CHECK-NEXT: [[STRIDED_VEC:%.*]] = shufflevector <4 x i64> [[WIDE_VEC]], <4 x i64> poison, <2 x i32> ; CHECK-NEXT: [[TMP7:%.*]] = icmp eq <2 x i64> [[STRIDED_VEC]], [[BROADCAST_SPLAT]] -; CHECK-NEXT: [[TMP8:%.*]] = extractelement <2 x i1> [[TMP7]], i32 0 +; CHECK-NEXT: [[TMP8:%.*]] = extractelement <2 x i1> [[TMP7]], i64 0 ; CHECK-NEXT: br i1 [[TMP8]], label [[PRED_STORE_IF:%.*]], label [[PRED_STORE_CONTINUE:%.*]] ; CHECK: pred.store.if: -; CHECK-NEXT: [[TMP9:%.*]] = extractelement <4 x i64> [[WIDE_VEC]], i32 0 +; CHECK-NEXT: [[TMP9:%.*]] = extractelement <4 x i64> [[WIDE_VEC]], i64 0 ; CHECK-NEXT: store i64 [[TMP9]], i64* [[TMP3]], align 8 ; CHECK-NEXT: br label [[PRED_STORE_CONTINUE]] ; CHECK: pred.store.continue: -; CHECK-NEXT: [[TMP10:%.*]] = extractelement <2 x i1> [[TMP7]], i32 1 +; CHECK-NEXT: [[TMP10:%.*]] = extractelement <2 x i1> [[TMP7]], i64 1 ; CHECK-NEXT: br i1 [[TMP10]], label [[PRED_STORE_IF1:%.*]], label [[PRED_STORE_CONTINUE2]] ; CHECK: pred.store.if1: ; CHECK-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[PAIR]], %pair* [[P]], i64 [[TMP2]], i32 0 -; CHECK-NEXT: [[TMP12:%.*]] = extractelement <4 x i64> [[WIDE_VEC]], i32 2 +; CHECK-NEXT: [[TMP12:%.*]] = extractelement <4 x i64> [[WIDE_VEC]], i64 2 ; CHECK-NEXT: store i64 [[TMP12]], i64* [[TMP11]], align 8 ; CHECK-NEXT: br label [[PRED_STORE_CONTINUE2]] ; CHECK: pred.store.continue2: ; CHECK-NEXT: [[TMP13:%.*]] = bitcast i64* [[TMP3]] to <4 x i64>* ; CHECK-NEXT: [[WIDE_VEC3:%.*]] = load <4 x i64>, <4 x i64>* [[TMP13]], align 8 -; CHECK-NEXT: [[TMP14:%.*]] = extractelement <4 x i64> [[WIDE_VEC3]], i32 0 +; CHECK-NEXT: [[TMP14:%.*]] = extractelement <4 x i64> [[WIDE_VEC3]], i64 0 ; CHECK-NEXT: store i64 [[TMP14]], i64* [[TMP4]], align 8 -; CHECK-NEXT: [[TMP15:%.*]] = extractelement <4 x i64> [[WIDE_VEC3]], i32 2 +; CHECK-NEXT: [[TMP15:%.*]] = extractelement <4 x i64> [[WIDE_VEC3]], i64 2 ; CHECK-NEXT: store i64 [[TMP15]], i64* [[TMP5]], align 8 ; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 2 ; CHECK-NEXT: [[TMP16:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]] @@ -228,7 +228,7 @@ ; CHECK-NEXT: [[TMP0:%.*]] = icmp eq i64 [[N_MOD_VF]], 0 ; CHECK-NEXT: [[TMP1:%.*]] = select i1 [[TMP0]], i64 2, i64 [[N_MOD_VF]] ; CHECK-NEXT: [[N_VEC:%.*]] = sub nsw i64 [[SMAX]], [[TMP1]] -; CHECK-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <2 x i64> poison, i64 [[X:%.*]], i32 0 +; CHECK-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <2 x i64> poison, i64 [[X:%.*]], i64 0 ; CHECK-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector <2 x i64> [[BROADCAST_SPLATINSERT]], <2 x i64> poison, <2 x i32> zeroinitializer ; CHECK-NEXT: br label [[VECTOR_BODY:%.*]] ; CHECK: vector.body: @@ -243,18 +243,18 @@ ; CHECK-NEXT: store i64 [[X]], i64* [[TMP3]], align 8 ; CHECK-NEXT: store i64 [[X]], i64* [[TMP4]], align 8 ; CHECK-NEXT: [[TMP7:%.*]] = icmp eq <2 x i64> [[STRIDED_VEC]], [[BROADCAST_SPLAT]] -; CHECK-NEXT: [[TMP8:%.*]] = extractelement <2 x i1> [[TMP7]], i32 0 +; CHECK-NEXT: [[TMP8:%.*]] = extractelement <2 x i1> [[TMP7]], i64 0 ; CHECK-NEXT: br i1 [[TMP8]], label [[PRED_STORE_IF:%.*]], label [[PRED_STORE_CONTINUE:%.*]] ; CHECK: pred.store.if: -; CHECK-NEXT: [[TMP9:%.*]] = extractelement <4 x i64> [[WIDE_VEC]], i32 0 +; CHECK-NEXT: [[TMP9:%.*]] = extractelement <4 x i64> [[WIDE_VEC]], i64 0 ; CHECK-NEXT: store i64 [[TMP9]], i64* [[TMP5]], align 8 ; CHECK-NEXT: br label [[PRED_STORE_CONTINUE]] ; CHECK: pred.store.continue: -; CHECK-NEXT: [[TMP10:%.*]] = extractelement <2 x i1> [[TMP7]], i32 1 +; CHECK-NEXT: [[TMP10:%.*]] = extractelement <2 x i1> [[TMP7]], i64 1 ; CHECK-NEXT: br i1 [[TMP10]], label [[PRED_STORE_IF1:%.*]], label [[PRED_STORE_CONTINUE2]] ; CHECK: pred.store.if1: ; CHECK-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[PAIR]], %pair* [[P]], i64 [[TMP2]], i32 1 -; CHECK-NEXT: [[TMP12:%.*]] = extractelement <4 x i64> [[WIDE_VEC]], i32 2 +; CHECK-NEXT: [[TMP12:%.*]] = extractelement <4 x i64> [[WIDE_VEC]], i64 2 ; CHECK-NEXT: store i64 [[TMP12]], i64* [[TMP11]], align 8 ; CHECK-NEXT: br label [[PRED_STORE_CONTINUE2]] ; CHECK: pred.store.continue2: diff --git a/llvm/test/Transforms/LoopVectorize/interleaved-accesses.ll b/llvm/test/Transforms/LoopVectorize/interleaved-accesses.ll --- a/llvm/test/Transforms/LoopVectorize/interleaved-accesses.ll +++ b/llvm/test/Transforms/LoopVectorize/interleaved-accesses.ll @@ -26,9 +26,9 @@ ; CHECK-NEXT: entry: ; CHECK-NEXT: br i1 false, label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]] ; CHECK: vector.ph: -; CHECK-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <4 x i32> poison, i32 [[C:%.*]], i32 0 +; CHECK-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <4 x i32> poison, i32 [[C:%.*]], i64 0 ; CHECK-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector <4 x i32> [[BROADCAST_SPLATINSERT]], <4 x i32> poison, <4 x i32> zeroinitializer -; CHECK-NEXT: [[BROADCAST_SPLATINSERT2:%.*]] = insertelement <4 x i32> poison, i32 [[D:%.*]], i32 0 +; CHECK-NEXT: [[BROADCAST_SPLATINSERT2:%.*]] = insertelement <4 x i32> poison, i32 [[D:%.*]], i64 0 ; CHECK-NEXT: [[BROADCAST_SPLAT3:%.*]] = shufflevector <4 x i32> [[BROADCAST_SPLATINSERT2]], <4 x i32> poison, <4 x i32> zeroinitializer ; CHECK-NEXT: br label [[VECTOR_BODY:%.*]] ; CHECK: vector.body: @@ -354,7 +354,7 @@ ; CHECK-NEXT: br label [[VECTOR_BODY:%.*]] ; CHECK: vector.body: ; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ] -; CHECK-NEXT: [[VEC_IND3:%.*]] = phi <4 x i32> [ , [[VECTOR_PH]] ], [ [[VEC_IND_NEXT4:%.*]], [[VECTOR_BODY]] ] +; CHECK-NEXT: [[VEC_IND1:%.*]] = phi <4 x i32> [ , [[VECTOR_PH]] ], [ [[VEC_IND_NEXT2:%.*]], [[VECTOR_BODY]] ] ; CHECK-NEXT: [[OFFSET_IDX:%.*]] = sub i64 1023, [[INDEX]] ; CHECK-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[STRUCT_ST2:%.*]], %struct.ST2* [[A:%.*]], i64 [[OFFSET_IDX]], i32 0 ; CHECK-NEXT: [[TMP1:%.*]] = getelementptr inbounds i32, i32* [[TMP0]], i64 -6 @@ -362,10 +362,10 @@ ; CHECK-NEXT: [[WIDE_VEC:%.*]] = load <8 x i32>, <8 x i32>* [[TMP2]], align 4 ; CHECK-NEXT: [[STRIDED_VEC:%.*]] = shufflevector <8 x i32> [[WIDE_VEC]], <8 x i32> poison, <4 x i32> ; CHECK-NEXT: [[REVERSE:%.*]] = shufflevector <4 x i32> [[STRIDED_VEC]], <4 x i32> poison, <4 x i32> -; CHECK-NEXT: [[STRIDED_VEC1:%.*]] = shufflevector <8 x i32> [[WIDE_VEC]], <8 x i32> poison, <4 x i32> -; CHECK-NEXT: [[REVERSE2:%.*]] = shufflevector <4 x i32> [[STRIDED_VEC1]], <4 x i32> poison, <4 x i32> -; CHECK-NEXT: [[TMP3:%.*]] = add nsw <4 x i32> [[REVERSE]], [[VEC_IND3]] -; CHECK-NEXT: [[TMP4:%.*]] = sub nsw <4 x i32> [[REVERSE2]], [[VEC_IND3]] +; CHECK-NEXT: [[STRIDED_VEC3:%.*]] = shufflevector <8 x i32> [[WIDE_VEC]], <8 x i32> poison, <4 x i32> +; CHECK-NEXT: [[REVERSE4:%.*]] = shufflevector <4 x i32> [[STRIDED_VEC3]], <4 x i32> poison, <4 x i32> +; CHECK-NEXT: [[TMP3:%.*]] = add nsw <4 x i32> [[REVERSE]], [[VEC_IND1]] +; CHECK-NEXT: [[TMP4:%.*]] = sub nsw <4 x i32> [[REVERSE4]], [[VEC_IND1]] ; CHECK-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_ST2]], %struct.ST2* [[B:%.*]], i64 [[OFFSET_IDX]], i32 1 ; CHECK-NEXT: [[TMP6:%.*]] = getelementptr inbounds i32, i32* [[TMP5]], i64 -7 ; CHECK-NEXT: [[TMP7:%.*]] = bitcast i32* [[TMP6]] to <8 x i32>* @@ -374,7 +374,7 @@ ; CHECK-NEXT: [[INTERLEAVED_VEC:%.*]] = shufflevector <4 x i32> [[REVERSE5]], <4 x i32> [[REVERSE6]], <8 x i32> ; CHECK-NEXT: store <8 x i32> [[INTERLEAVED_VEC]], <8 x i32>* [[TMP7]], align 4 ; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4 -; CHECK-NEXT: [[VEC_IND_NEXT4]] = add <4 x i32> [[VEC_IND3]], +; CHECK-NEXT: [[VEC_IND_NEXT2]] = add <4 x i32> [[VEC_IND1]], ; CHECK-NEXT: [[TMP8:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1024 ; CHECK-NEXT: br i1 [[TMP8]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP10:![0-9]+]] ; CHECK: middle.block: @@ -585,7 +585,7 @@ ; CHECK-NEXT: entry: ; CHECK-NEXT: br i1 false, label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]] ; CHECK: vector.ph: -; CHECK-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <4 x i64> poison, i64 [[X:%.*]], i32 0 +; CHECK-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <4 x i64> poison, i64 [[X:%.*]], i64 0 ; CHECK-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector <4 x i64> [[BROADCAST_SPLATINSERT]], <4 x i64> poison, <4 x i32> zeroinitializer ; CHECK-NEXT: br label [[VECTOR_BODY:%.*]] ; CHECK: vector.body: @@ -608,26 +608,26 @@ ; CHECK-NEXT: [[TMP13:%.*]] = load i64, i64* [[TMP9]], align 8 ; CHECK-NEXT: [[TMP14:%.*]] = load i64, i64* [[TMP10]], align 8 ; CHECK-NEXT: [[TMP15:%.*]] = load i64, i64* [[TMP11]], align 8 -; CHECK-NEXT: [[TMP16:%.*]] = insertelement <4 x i64> poison, i64 [[TMP12]], i32 0 -; CHECK-NEXT: [[TMP17:%.*]] = insertelement <4 x i64> [[TMP16]], i64 [[TMP13]], i32 1 -; CHECK-NEXT: [[TMP18:%.*]] = insertelement <4 x i64> [[TMP17]], i64 [[TMP14]], i32 2 -; CHECK-NEXT: [[TMP19:%.*]] = insertelement <4 x i64> [[TMP18]], i64 [[TMP15]], i32 3 +; CHECK-NEXT: [[TMP16:%.*]] = insertelement <4 x i64> poison, i64 [[TMP12]], i64 0 +; CHECK-NEXT: [[TMP17:%.*]] = insertelement <4 x i64> [[TMP16]], i64 [[TMP13]], i64 1 +; CHECK-NEXT: [[TMP18:%.*]] = insertelement <4 x i64> [[TMP17]], i64 [[TMP14]], i64 2 +; CHECK-NEXT: [[TMP19:%.*]] = insertelement <4 x i64> [[TMP18]], i64 [[TMP15]], i64 3 ; CHECK-NEXT: [[TMP20:%.*]] = sub nsw <4 x i64> [[TMP19]], [[VEC_IND]] -; CHECK-NEXT: [[TMP21:%.*]] = extractelement <4 x i64> [[TMP3]], i32 0 +; CHECK-NEXT: [[TMP21:%.*]] = extractelement <4 x i64> [[TMP3]], i64 0 ; CHECK-NEXT: store i64 [[TMP21]], i64* [[TMP4]], align 8 -; CHECK-NEXT: [[TMP22:%.*]] = extractelement <4 x i64> [[TMP3]], i32 1 +; CHECK-NEXT: [[TMP22:%.*]] = extractelement <4 x i64> [[TMP3]], i64 1 ; CHECK-NEXT: store i64 [[TMP22]], i64* [[TMP5]], align 8 -; CHECK-NEXT: [[TMP23:%.*]] = extractelement <4 x i64> [[TMP3]], i32 2 +; CHECK-NEXT: [[TMP23:%.*]] = extractelement <4 x i64> [[TMP3]], i64 2 ; CHECK-NEXT: store i64 [[TMP23]], i64* [[TMP6]], align 8 -; CHECK-NEXT: [[TMP24:%.*]] = extractelement <4 x i64> [[TMP3]], i32 3 +; CHECK-NEXT: [[TMP24:%.*]] = extractelement <4 x i64> [[TMP3]], i64 3 ; CHECK-NEXT: store i64 [[TMP24]], i64* [[TMP7]], align 8 -; CHECK-NEXT: [[TMP25:%.*]] = extractelement <4 x i64> [[TMP20]], i32 0 +; CHECK-NEXT: [[TMP25:%.*]] = extractelement <4 x i64> [[TMP20]], i64 0 ; CHECK-NEXT: store i64 [[TMP25]], i64* [[TMP8]], align 8 -; CHECK-NEXT: [[TMP26:%.*]] = extractelement <4 x i64> [[TMP20]], i32 1 +; CHECK-NEXT: [[TMP26:%.*]] = extractelement <4 x i64> [[TMP20]], i64 1 ; CHECK-NEXT: store i64 [[TMP26]], i64* [[TMP9]], align 8 -; CHECK-NEXT: [[TMP27:%.*]] = extractelement <4 x i64> [[TMP20]], i32 2 +; CHECK-NEXT: [[TMP27:%.*]] = extractelement <4 x i64> [[TMP20]], i64 2 ; CHECK-NEXT: store i64 [[TMP27]], i64* [[TMP10]], align 8 -; CHECK-NEXT: [[TMP28:%.*]] = extractelement <4 x i64> [[TMP20]], i32 3 +; CHECK-NEXT: [[TMP28:%.*]] = extractelement <4 x i64> [[TMP20]], i64 3 ; CHECK-NEXT: store i64 [[TMP28]], i64* [[TMP11]], align 8 ; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4 ; CHECK-NEXT: [[VEC_IND_NEXT]] = add <4 x i64> [[VEC_IND]], @@ -947,13 +947,13 @@ ; CHECK-NEXT: store i32 [[Z]], i32* [[TMP8]], align 4 ; CHECK-NEXT: [[TMP13:%.*]] = bitcast i32* [[TMP5]] to <8 x i32>* ; CHECK-NEXT: [[WIDE_VEC:%.*]] = load <8 x i32>, <8 x i32>* [[TMP13]], align 4 -; CHECK-NEXT: [[TMP14:%.*]] = extractelement <8 x i32> [[WIDE_VEC]], i32 0 +; CHECK-NEXT: [[TMP14:%.*]] = extractelement <8 x i32> [[WIDE_VEC]], i64 0 ; CHECK-NEXT: store i32 [[TMP14]], i32* [[TMP9]], align 4 -; CHECK-NEXT: [[TMP15:%.*]] = extractelement <8 x i32> [[WIDE_VEC]], i32 2 +; CHECK-NEXT: [[TMP15:%.*]] = extractelement <8 x i32> [[WIDE_VEC]], i64 2 ; CHECK-NEXT: store i32 [[TMP15]], i32* [[TMP10]], align 4 -; CHECK-NEXT: [[TMP16:%.*]] = extractelement <8 x i32> [[WIDE_VEC]], i32 4 +; CHECK-NEXT: [[TMP16:%.*]] = extractelement <8 x i32> [[WIDE_VEC]], i64 4 ; CHECK-NEXT: store i32 [[TMP16]], i32* [[TMP11]], align 4 -; CHECK-NEXT: [[TMP17:%.*]] = extractelement <8 x i32> [[WIDE_VEC]], i32 6 +; CHECK-NEXT: [[TMP17:%.*]] = extractelement <8 x i32> [[WIDE_VEC]], i64 6 ; CHECK-NEXT: store i32 [[TMP17]], i32* [[TMP12]], align 4 ; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4 ; CHECK-NEXT: [[TMP18:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]] @@ -1030,13 +1030,13 @@ ; CHECK-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[PAIR_I32]], %pair.i32* [[P]], i64 [[TMP4]], i32 1 ; CHECK-NEXT: [[TMP10:%.*]] = bitcast i32* [[TMP5]] to <8 x i32>* ; CHECK-NEXT: [[WIDE_VEC:%.*]] = load <8 x i32>, <8 x i32>* [[TMP10]], align 4 -; CHECK-NEXT: [[TMP11:%.*]] = extractelement <8 x i32> [[WIDE_VEC]], i32 0 +; CHECK-NEXT: [[TMP11:%.*]] = extractelement <8 x i32> [[WIDE_VEC]], i64 0 ; CHECK-NEXT: store i32 [[TMP11]], i32* [[TMP6]], align 4 -; CHECK-NEXT: [[TMP12:%.*]] = extractelement <8 x i32> [[WIDE_VEC]], i32 2 +; CHECK-NEXT: [[TMP12:%.*]] = extractelement <8 x i32> [[WIDE_VEC]], i64 2 ; CHECK-NEXT: store i32 [[TMP12]], i32* [[TMP7]], align 4 -; CHECK-NEXT: [[TMP13:%.*]] = extractelement <8 x i32> [[WIDE_VEC]], i32 4 +; CHECK-NEXT: [[TMP13:%.*]] = extractelement <8 x i32> [[WIDE_VEC]], i64 4 ; CHECK-NEXT: store i32 [[TMP13]], i32* [[TMP8]], align 4 -; CHECK-NEXT: [[TMP14:%.*]] = extractelement <8 x i32> [[WIDE_VEC]], i32 6 +; CHECK-NEXT: [[TMP14:%.*]] = extractelement <8 x i32> [[WIDE_VEC]], i64 6 ; CHECK-NEXT: store i32 [[TMP14]], i32* [[TMP9]], align 4 ; CHECK-NEXT: [[TMP15:%.*]] = bitcast i32* [[TMP6]] to <8 x i32>* ; CHECK-NEXT: [[WIDE_VEC1:%.*]] = load <8 x i32>, <8 x i32>* [[TMP15]], align 4 @@ -1130,13 +1130,13 @@ ; CHECK-NEXT: store i32 [[Z]], i32* [[TMP8]], align 4 ; CHECK-NEXT: [[TMP14:%.*]] = bitcast i32* [[TMP9]] to <8 x i32>* ; CHECK-NEXT: [[WIDE_VEC:%.*]] = load <8 x i32>, <8 x i32>* [[TMP14]], align 4 -; CHECK-NEXT: [[TMP15:%.*]] = extractelement <8 x i32> [[WIDE_VEC]], i32 0 +; CHECK-NEXT: [[TMP15:%.*]] = extractelement <8 x i32> [[WIDE_VEC]], i64 0 ; CHECK-NEXT: store i32 [[TMP15]], i32* [[TMP10]], align 4 -; CHECK-NEXT: [[TMP16:%.*]] = extractelement <8 x i32> [[WIDE_VEC]], i32 2 +; CHECK-NEXT: [[TMP16:%.*]] = extractelement <8 x i32> [[WIDE_VEC]], i64 2 ; CHECK-NEXT: store i32 [[TMP16]], i32* [[TMP11]], align 4 -; CHECK-NEXT: [[TMP17:%.*]] = extractelement <8 x i32> [[WIDE_VEC]], i32 4 +; CHECK-NEXT: [[TMP17:%.*]] = extractelement <8 x i32> [[WIDE_VEC]], i64 4 ; CHECK-NEXT: store i32 [[TMP17]], i32* [[TMP12]], align 4 -; CHECK-NEXT: [[TMP18:%.*]] = extractelement <8 x i32> [[WIDE_VEC]], i32 6 +; CHECK-NEXT: [[TMP18:%.*]] = extractelement <8 x i32> [[WIDE_VEC]], i64 6 ; CHECK-NEXT: store i32 [[TMP18]], i32* [[TMP13]], align 4 ; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4 ; CHECK-NEXT: [[TMP19:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]] @@ -1210,23 +1210,23 @@ ; CHECK-NEXT: [[TMP2:%.*]] = add nuw nsw <4 x i64> [[VEC_IND]], ; CHECK-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[PAIR_I32:%.*]], %pair.i32* [[P:%.*]], i64 [[INDEX]], i32 0 ; CHECK-NEXT: [[TMP4:%.*]] = getelementptr inbounds [[PAIR_I32]], %pair.i32* [[P]], i64 [[INDEX]], i32 1 -; CHECK-NEXT: [[TMP5:%.*]] = extractelement <4 x i64> [[TMP2]], i32 0 +; CHECK-NEXT: [[TMP5:%.*]] = extractelement <4 x i64> [[TMP2]], i64 0 ; CHECK-NEXT: [[TMP6:%.*]] = getelementptr inbounds [[PAIR_I32]], %pair.i32* [[P]], i64 [[TMP5]], i32 1 -; CHECK-NEXT: [[TMP7:%.*]] = extractelement <4 x i64> [[TMP2]], i32 1 +; CHECK-NEXT: [[TMP7:%.*]] = extractelement <4 x i64> [[TMP2]], i64 1 ; CHECK-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[PAIR_I32]], %pair.i32* [[P]], i64 [[TMP7]], i32 1 -; CHECK-NEXT: [[TMP9:%.*]] = extractelement <4 x i64> [[TMP2]], i32 2 +; CHECK-NEXT: [[TMP9:%.*]] = extractelement <4 x i64> [[TMP2]], i64 2 ; CHECK-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[PAIR_I32]], %pair.i32* [[P]], i64 [[TMP9]], i32 1 -; CHECK-NEXT: [[TMP11:%.*]] = extractelement <4 x i64> [[TMP2]], i32 3 +; CHECK-NEXT: [[TMP11:%.*]] = extractelement <4 x i64> [[TMP2]], i64 3 ; CHECK-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[PAIR_I32]], %pair.i32* [[P]], i64 [[TMP11]], i32 1 ; CHECK-NEXT: [[TMP13:%.*]] = bitcast i32* [[TMP3]] to <8 x i32>* ; CHECK-NEXT: [[WIDE_VEC:%.*]] = load <8 x i32>, <8 x i32>* [[TMP13]], align 4 -; CHECK-NEXT: [[TMP14:%.*]] = extractelement <8 x i32> [[WIDE_VEC]], i32 0 +; CHECK-NEXT: [[TMP14:%.*]] = extractelement <8 x i32> [[WIDE_VEC]], i64 0 ; CHECK-NEXT: store i32 [[TMP14]], i32* [[TMP6]], align 4 -; CHECK-NEXT: [[TMP15:%.*]] = extractelement <8 x i32> [[WIDE_VEC]], i32 2 +; CHECK-NEXT: [[TMP15:%.*]] = extractelement <8 x i32> [[WIDE_VEC]], i64 2 ; CHECK-NEXT: store i32 [[TMP15]], i32* [[TMP8]], align 4 -; CHECK-NEXT: [[TMP16:%.*]] = extractelement <8 x i32> [[WIDE_VEC]], i32 4 +; CHECK-NEXT: [[TMP16:%.*]] = extractelement <8 x i32> [[WIDE_VEC]], i64 4 ; CHECK-NEXT: store i32 [[TMP16]], i32* [[TMP10]], align 4 -; CHECK-NEXT: [[TMP17:%.*]] = extractelement <8 x i32> [[WIDE_VEC]], i32 6 +; CHECK-NEXT: [[TMP17:%.*]] = extractelement <8 x i32> [[WIDE_VEC]], i64 6 ; CHECK-NEXT: store i32 [[TMP17]], i32* [[TMP12]], align 4 ; CHECK-NEXT: [[TMP18:%.*]] = bitcast i32* [[TMP4]] to <8 x i32>* ; CHECK-NEXT: [[WIDE_VEC1:%.*]] = load <8 x i32>, <8 x i32>* [[TMP18]], align 4 @@ -1308,9 +1308,9 @@ ; CHECK: vector.ph: ; CHECK-NEXT: [[N_VEC:%.*]] = and i64 [[TMP2]], 9223372036854775804 ; CHECK-NEXT: [[IND_END:%.*]] = shl nuw i64 [[N_VEC]], 1 -; CHECK-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <4 x i32> poison, i32 [[Y:%.*]], i32 0 +; CHECK-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <4 x i32> poison, i32 [[Y:%.*]], i64 0 ; CHECK-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector <4 x i32> [[BROADCAST_SPLATINSERT]], <4 x i32> poison, <4 x i32> zeroinitializer -; CHECK-NEXT: [[BROADCAST_SPLATINSERT1:%.*]] = insertelement <4 x i32> poison, i32 [[Z:%.*]], i32 0 +; CHECK-NEXT: [[BROADCAST_SPLATINSERT1:%.*]] = insertelement <4 x i32> poison, i32 [[Z:%.*]], i64 0 ; CHECK-NEXT: [[BROADCAST_SPLAT2:%.*]] = shufflevector <4 x i32> [[BROADCAST_SPLATINSERT1]], <4 x i32> poison, <4 x i32> zeroinitializer ; CHECK-NEXT: br label [[VECTOR_BODY:%.*]] ; CHECK: vector.body: @@ -1414,21 +1414,21 @@ ; CHECK-NEXT: [[TMP11:%.*]] = getelementptr inbounds i32, i32* [[A]], i64 [[TMP5]] ; CHECK-NEXT: [[TMP12:%.*]] = getelementptr inbounds i32, i32* [[A]], i64 [[TMP6]] ; CHECK-NEXT: [[TMP13:%.*]] = getelementptr inbounds i32, i32* [[A]], i64 [[TMP7]] -; CHECK-NEXT: [[TMP14:%.*]] = extractelement <4 x i64> [[TMP8]], i32 0 +; CHECK-NEXT: [[TMP14:%.*]] = extractelement <4 x i64> [[TMP8]], i64 0 ; CHECK-NEXT: [[TMP15:%.*]] = getelementptr inbounds i32, i32* [[A]], i64 [[TMP14]] -; CHECK-NEXT: [[TMP16:%.*]] = extractelement <4 x i64> [[TMP8]], i32 1 +; CHECK-NEXT: [[TMP16:%.*]] = extractelement <4 x i64> [[TMP8]], i64 1 ; CHECK-NEXT: [[TMP17:%.*]] = getelementptr inbounds i32, i32* [[A]], i64 [[TMP16]] -; CHECK-NEXT: [[TMP18:%.*]] = extractelement <4 x i64> [[TMP8]], i32 2 +; CHECK-NEXT: [[TMP18:%.*]] = extractelement <4 x i64> [[TMP8]], i64 2 ; CHECK-NEXT: [[TMP19:%.*]] = getelementptr inbounds i32, i32* [[A]], i64 [[TMP18]] -; CHECK-NEXT: [[TMP20:%.*]] = extractelement <4 x i64> [[TMP8]], i32 3 +; CHECK-NEXT: [[TMP20:%.*]] = extractelement <4 x i64> [[TMP8]], i64 3 ; CHECK-NEXT: [[TMP21:%.*]] = getelementptr inbounds i32, i32* [[A]], i64 [[TMP20]] -; CHECK-NEXT: [[TMP22:%.*]] = extractelement <4 x i64> [[TMP9]], i32 0 +; CHECK-NEXT: [[TMP22:%.*]] = extractelement <4 x i64> [[TMP9]], i64 0 ; CHECK-NEXT: [[TMP23:%.*]] = getelementptr inbounds i32, i32* [[A]], i64 [[TMP22]] -; CHECK-NEXT: [[TMP24:%.*]] = extractelement <4 x i64> [[TMP9]], i32 1 +; CHECK-NEXT: [[TMP24:%.*]] = extractelement <4 x i64> [[TMP9]], i64 1 ; CHECK-NEXT: [[TMP25:%.*]] = getelementptr inbounds i32, i32* [[A]], i64 [[TMP24]] -; CHECK-NEXT: [[TMP26:%.*]] = extractelement <4 x i64> [[TMP9]], i32 2 +; CHECK-NEXT: [[TMP26:%.*]] = extractelement <4 x i64> [[TMP9]], i64 2 ; CHECK-NEXT: [[TMP27:%.*]] = getelementptr inbounds i32, i32* [[A]], i64 [[TMP26]] -; CHECK-NEXT: [[TMP28:%.*]] = extractelement <4 x i64> [[TMP9]], i32 3 +; CHECK-NEXT: [[TMP28:%.*]] = extractelement <4 x i64> [[TMP9]], i64 3 ; CHECK-NEXT: [[TMP29:%.*]] = getelementptr inbounds i32, i32* [[A]], i64 [[TMP28]] ; CHECK-NEXT: store i32 [[X:%.*]], i32* [[TMP15]], align 4 ; CHECK-NEXT: store i32 [[X]], i32* [[TMP17]], align 4 @@ -1524,7 +1524,7 @@ ; CHECK: vector.ph: ; CHECK-NEXT: [[N_VEC:%.*]] = and i64 [[TMP1]], -4 ; CHECK-NEXT: [[IND_END:%.*]] = shl i64 [[N_VEC]], 1 -; CHECK-NEXT: [[VECTOR_RECUR_INIT:%.*]] = insertelement <4 x i16> poison, i16 [[DOTPRE]], i32 3 +; CHECK-NEXT: [[VECTOR_RECUR_INIT:%.*]] = insertelement <4 x i16> poison, i16 [[DOTPRE]], i64 3 ; CHECK-NEXT: br label [[VECTOR_BODY:%.*]] ; CHECK: vector.body: ; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ] @@ -1550,7 +1550,7 @@ ; CHECK-NEXT: br i1 [[TMP19]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP41:![0-9]+]] ; CHECK: middle.block: ; CHECK-NEXT: [[CMP_N:%.*]] = icmp eq i64 [[TMP1]], [[N_VEC]] -; CHECK-NEXT: [[VECTOR_RECUR_EXTRACT:%.*]] = extractelement <8 x i16> [[WIDE_VEC]], i32 7 +; CHECK-NEXT: [[VECTOR_RECUR_EXTRACT:%.*]] = extractelement <8 x i16> [[WIDE_VEC]], i64 7 ; CHECK-NEXT: br i1 [[CMP_N]], label [[END:%.*]], label [[SCALAR_PH]] ; CHECK: scalar.ph: ; CHECK-NEXT: [[SCALAR_RECUR_INIT:%.*]] = phi i16 [ [[DOTPRE]], [[VECTOR_MEMCHECK]] ], [ [[DOTPRE]], [[ENTRY:%.*]] ], [ [[VECTOR_RECUR_EXTRACT]], [[MIDDLE_BLOCK]] ] diff --git a/llvm/test/Transforms/LoopVectorize/invariant-store-vectorization-2.ll b/llvm/test/Transforms/LoopVectorize/invariant-store-vectorization-2.ll --- a/llvm/test/Transforms/LoopVectorize/invariant-store-vectorization-2.ll +++ b/llvm/test/Transforms/LoopVectorize/invariant-store-vectorization-2.ll @@ -34,9 +34,9 @@ ; CHECK-NEXT: br i1 [[FOUND_CONFLICT]], label [[SCALAR_PH]], label [[VECTOR_PH:%.*]] ; CHECK: vector.ph: ; CHECK-NEXT: [[N_VEC:%.*]] = and i64 [[SMAX6]], 9223372036854775804 -; CHECK-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <4 x i32> poison, i32 [[K:%.*]], i32 0 +; CHECK-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <4 x i32> poison, i32 [[K:%.*]], i64 0 ; CHECK-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector <4 x i32> [[BROADCAST_SPLATINSERT]], <4 x i32> poison, <4 x i32> zeroinitializer -; CHECK-NEXT: [[BROADCAST_SPLATINSERT7:%.*]] = insertelement <4 x i32> poison, i32 [[NTRUNC]], i32 0 +; CHECK-NEXT: [[BROADCAST_SPLATINSERT7:%.*]] = insertelement <4 x i32> poison, i32 [[NTRUNC]], i64 0 ; CHECK-NEXT: [[BROADCAST_SPLAT8:%.*]] = shufflevector <4 x i32> [[BROADCAST_SPLATINSERT7]], <4 x i32> poison, <4 x i32> zeroinitializer ; CHECK-NEXT: br label [[VECTOR_BODY:%.*]] ; CHECK: vector.body: @@ -48,7 +48,7 @@ ; CHECK-NEXT: [[TMP2:%.*]] = bitcast i32* [[TMP0]] to <4 x i32>* ; CHECK-NEXT: store <4 x i32> [[BROADCAST_SPLAT8]], <4 x i32>* [[TMP2]], align 4, !alias.scope !0, !noalias !3 ; CHECK-NEXT: [[PREDPHI:%.*]] = select <4 x i1> [[DOTNOT]], <4 x i32> [[BROADCAST_SPLAT8]], <4 x i32> [[BROADCAST_SPLAT]] -; CHECK-NEXT: [[TMP3:%.*]] = extractelement <4 x i32> [[PREDPHI]], i32 3 +; CHECK-NEXT: [[TMP3:%.*]] = extractelement <4 x i32> [[PREDPHI]], i64 3 ; CHECK-NEXT: store i32 [[TMP3]], i32* [[A]], align 4, !alias.scope !3 ; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4 ; CHECK-NEXT: [[TMP4:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]] @@ -136,12 +136,12 @@ ; CHECK-NEXT: br i1 [[FOUND_CONFLICT]], label [[SCALAR_PH]], label [[VECTOR_PH:%.*]] ; CHECK: vector.ph: ; CHECK-NEXT: [[N_VEC:%.*]] = and i64 [[SMAX6]], 9223372036854775804 -; CHECK-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <4 x i32> poison, i32 [[NTRUNC]], i32 0 +; CHECK-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <4 x i32> poison, i32 [[NTRUNC]], i64 0 ; CHECK-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector <4 x i32> [[BROADCAST_SPLATINSERT]], <4 x i32> poison, <4 x i32> zeroinitializer -; CHECK-NEXT: [[TMP0:%.*]] = insertelement <4 x i1> undef, i1 [[CMP]], i32 3 -; CHECK-NEXT: [[BROADCAST_SPLAT10:%.*]] = insertelement <4 x i32> poison, i32 [[K]], i32 3 +; CHECK-NEXT: [[TMP0:%.*]] = insertelement <4 x i1> undef, i1 [[CMP]], i64 3 +; CHECK-NEXT: [[BROADCAST_SPLAT10:%.*]] = insertelement <4 x i32> poison, i32 [[K]], i64 3 ; CHECK-NEXT: [[PREDPHI:%.*]] = select <4 x i1> [[TMP0]], <4 x i32> [[BROADCAST_SPLAT]], <4 x i32> [[BROADCAST_SPLAT10]] -; CHECK-NEXT: [[TMP1:%.*]] = extractelement <4 x i32> [[PREDPHI]], i32 3 +; CHECK-NEXT: [[TMP1:%.*]] = extractelement <4 x i32> [[PREDPHI]], i64 3 ; CHECK-NEXT: br label [[VECTOR_BODY:%.*]] ; CHECK: vector.body: ; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ] @@ -233,7 +233,7 @@ ; CHECK-NEXT: [[TMP0:%.*]] = getelementptr inbounds i32, i32* [[B]], i64 [[INDEX]] ; CHECK-NEXT: [[TMP1:%.*]] = bitcast i32* [[TMP0]] to <4 x i32>* ; CHECK-NEXT: [[WIDE_LOAD:%.*]] = load <4 x i32>, <4 x i32>* [[TMP1]], align 8, !alias.scope !15 -; CHECK-NEXT: [[TMP2:%.*]] = extractelement <4 x i32> [[WIDE_LOAD]], i32 3 +; CHECK-NEXT: [[TMP2:%.*]] = extractelement <4 x i32> [[WIDE_LOAD]], i64 3 ; CHECK-NEXT: store i32 [[TMP2]], i32* [[A]], align 4, !alias.scope !18, !noalias !15 ; CHECK-NEXT: [[TMP3]] = add <4 x i32> [[VEC_PHI]], [[WIDE_LOAD]] ; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4 diff --git a/llvm/test/Transforms/LoopVectorize/invariant-store-vectorization.ll b/llvm/test/Transforms/LoopVectorize/invariant-store-vectorization.ll --- a/llvm/test/Transforms/LoopVectorize/invariant-store-vectorization.ll +++ b/llvm/test/Transforms/LoopVectorize/invariant-store-vectorization.ll @@ -108,7 +108,7 @@ ; CHECK-NEXT: br i1 [[FOUND_CONFLICT]], label [[SCALAR_PH]], label [[VECTOR_PH:%.*]] ; CHECK: vector.ph: ; CHECK-NEXT: [[N_VEC:%.*]] = and i64 [[SMAX6]], 9223372036854775804 -; CHECK-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <4 x i32> poison, i32 [[NTRUNC]], i32 0 +; CHECK-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <4 x i32> poison, i32 [[NTRUNC]], i64 0 ; CHECK-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector <4 x i32> [[BROADCAST_SPLATINSERT]], <4 x i32> poison, <4 x i32> zeroinitializer ; CHECK-NEXT: br label [[VECTOR_BODY:%.*]] ; CHECK: vector.body: @@ -184,9 +184,9 @@ ; CHECK-NEXT: br i1 [[FOUND_CONFLICT]], label [[SCALAR_PH]], label [[VECTOR_PH:%.*]] ; CHECK: vector.ph: ; CHECK-NEXT: [[N_VEC:%.*]] = and i64 [[SMAX6]], 9223372036854775804 -; CHECK-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <4 x i32> poison, i32 [[K:%.*]], i32 0 +; CHECK-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <4 x i32> poison, i32 [[K:%.*]], i64 0 ; CHECK-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector <4 x i32> [[BROADCAST_SPLATINSERT]], <4 x i32> poison, <4 x i32> zeroinitializer -; CHECK-NEXT: [[BROADCAST_SPLATINSERT7:%.*]] = insertelement <4 x i32> poison, i32 [[NTRUNC]], i32 0 +; CHECK-NEXT: [[BROADCAST_SPLATINSERT7:%.*]] = insertelement <4 x i32> poison, i32 [[NTRUNC]], i64 0 ; CHECK-NEXT: [[BROADCAST_SPLAT8:%.*]] = shufflevector <4 x i32> [[BROADCAST_SPLATINSERT7]], <4 x i32> poison, <4 x i32> zeroinitializer ; CHECK-NEXT: br label [[VECTOR_BODY:%.*]] ; CHECK: vector.body: @@ -197,25 +197,25 @@ ; CHECK-NEXT: [[TMP2:%.*]] = icmp eq <4 x i32> [[WIDE_LOAD]], [[BROADCAST_SPLAT]] ; CHECK-NEXT: [[TMP3:%.*]] = bitcast i32* [[TMP0]] to <4 x i32>* ; CHECK-NEXT: store <4 x i32> [[BROADCAST_SPLAT8]], <4 x i32>* [[TMP3]], align 4, !alias.scope !15, !noalias !18 -; CHECK-NEXT: [[TMP4:%.*]] = extractelement <4 x i1> [[TMP2]], i32 0 +; CHECK-NEXT: [[TMP4:%.*]] = extractelement <4 x i1> [[TMP2]], i64 0 ; CHECK-NEXT: br i1 [[TMP4]], label [[PRED_STORE_IF:%.*]], label [[PRED_STORE_CONTINUE:%.*]] ; CHECK: pred.store.if: ; CHECK-NEXT: store i32 [[NTRUNC]], i32* [[A]], align 4, !alias.scope !18 ; CHECK-NEXT: br label [[PRED_STORE_CONTINUE]] ; CHECK: pred.store.continue: -; CHECK-NEXT: [[TMP5:%.*]] = extractelement <4 x i1> [[TMP2]], i32 1 +; CHECK-NEXT: [[TMP5:%.*]] = extractelement <4 x i1> [[TMP2]], i64 1 ; CHECK-NEXT: br i1 [[TMP5]], label [[PRED_STORE_IF9:%.*]], label [[PRED_STORE_CONTINUE10:%.*]] ; CHECK: pred.store.if9: ; CHECK-NEXT: store i32 [[NTRUNC]], i32* [[A]], align 4, !alias.scope !18 ; CHECK-NEXT: br label [[PRED_STORE_CONTINUE10]] ; CHECK: pred.store.continue10: -; CHECK-NEXT: [[TMP6:%.*]] = extractelement <4 x i1> [[TMP2]], i32 2 +; CHECK-NEXT: [[TMP6:%.*]] = extractelement <4 x i1> [[TMP2]], i64 2 ; CHECK-NEXT: br i1 [[TMP6]], label [[PRED_STORE_IF11:%.*]], label [[PRED_STORE_CONTINUE12:%.*]] ; CHECK: pred.store.if11: ; CHECK-NEXT: store i32 [[NTRUNC]], i32* [[A]], align 4, !alias.scope !18 ; CHECK-NEXT: br label [[PRED_STORE_CONTINUE12]] ; CHECK: pred.store.continue12: -; CHECK-NEXT: [[TMP7:%.*]] = extractelement <4 x i1> [[TMP2]], i32 3 +; CHECK-NEXT: [[TMP7:%.*]] = extractelement <4 x i1> [[TMP2]], i64 3 ; CHECK-NEXT: br i1 [[TMP7]], label [[PRED_STORE_IF13:%.*]], label [[PRED_STORE_CONTINUE14]] ; CHECK: pred.store.if13: ; CHECK-NEXT: store i32 [[NTRUNC]], i32* [[A]], align 4, !alias.scope !18 diff --git a/llvm/test/Transforms/LoopVectorize/loop-scalars.ll b/llvm/test/Transforms/LoopVectorize/loop-scalars.ll --- a/llvm/test/Transforms/LoopVectorize/loop-scalars.ll +++ b/llvm/test/Transforms/LoopVectorize/loop-scalars.ll @@ -199,9 +199,9 @@ ; CHECK-NEXT: [[TMP0:%.*]] = getelementptr inbounds i32*, i32** [[A:%.*]], i64 [[INDEX]] ; CHECK-NEXT: [[TMP1:%.*]] = bitcast i32** [[TMP0]] to <2 x i32*>* ; CHECK-NEXT: [[WIDE_LOAD:%.*]] = load <2 x i32*>, <2 x i32*>* [[TMP1]], align 8 -; CHECK-NEXT: [[TMP2:%.*]] = extractelement <2 x i32*> [[WIDE_LOAD]], i32 0 +; CHECK-NEXT: [[TMP2:%.*]] = extractelement <2 x i32*> [[WIDE_LOAD]], i64 0 ; CHECK-NEXT: store i32 0, i32* [[TMP2]], align 8 -; CHECK-NEXT: [[TMP3:%.*]] = extractelement <2 x i32*> [[WIDE_LOAD]], i32 1 +; CHECK-NEXT: [[TMP3:%.*]] = extractelement <2 x i32*> [[WIDE_LOAD]], i64 1 ; CHECK-NEXT: store i32 0, i32* [[TMP3]], align 8 ; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 2 ; CHECK-NEXT: [[TMP4:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]] diff --git a/llvm/test/Transforms/LoopVectorize/reduction-inloop-pred.ll b/llvm/test/Transforms/LoopVectorize/reduction-inloop-pred.ll --- a/llvm/test/Transforms/LoopVectorize/reduction-inloop-pred.ll +++ b/llvm/test/Transforms/LoopVectorize/reduction-inloop-pred.ll @@ -14,42 +14,42 @@ ; CHECK-NEXT: [[VEC_IND:%.*]] = phi <4 x i64> [ , [[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], [[PRED_LOAD_CONTINUE6]] ] ; CHECK-NEXT: [[VEC_PHI:%.*]] = phi i32 [ 0, [[VECTOR_PH]] ], [ [[TMP26:%.*]], [[PRED_LOAD_CONTINUE6]] ] ; CHECK-NEXT: [[TMP0:%.*]] = icmp ult <4 x i64> [[VEC_IND]], -; CHECK-NEXT: [[TMP1:%.*]] = extractelement <4 x i1> [[TMP0]], i32 0 +; CHECK-NEXT: [[TMP1:%.*]] = extractelement <4 x i1> [[TMP0]], i64 0 ; CHECK-NEXT: br i1 [[TMP1]], label [[PRED_LOAD_IF:%.*]], label [[PRED_LOAD_CONTINUE:%.*]] ; CHECK: pred.load.if: ; CHECK-NEXT: [[TMP2:%.*]] = getelementptr inbounds i32, i32* [[A:%.*]], i64 [[INDEX]] ; CHECK-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 -; CHECK-NEXT: [[TMP4:%.*]] = insertelement <4 x i32> poison, i32 [[TMP3]], i32 0 +; CHECK-NEXT: [[TMP4:%.*]] = insertelement <4 x i32> poison, i32 [[TMP3]], i64 0 ; CHECK-NEXT: br label [[PRED_LOAD_CONTINUE]] ; CHECK: pred.load.continue: ; CHECK-NEXT: [[TMP5:%.*]] = phi <4 x i32> [ poison, [[VECTOR_BODY]] ], [ [[TMP4]], [[PRED_LOAD_IF]] ] -; CHECK-NEXT: [[TMP6:%.*]] = extractelement <4 x i1> [[TMP0]], i32 1 +; CHECK-NEXT: [[TMP6:%.*]] = extractelement <4 x i1> [[TMP0]], i64 1 ; CHECK-NEXT: br i1 [[TMP6]], label [[PRED_LOAD_IF1:%.*]], label [[PRED_LOAD_CONTINUE2:%.*]] ; CHECK: pred.load.if1: ; CHECK-NEXT: [[TMP7:%.*]] = or i64 [[INDEX]], 1 ; CHECK-NEXT: [[TMP8:%.*]] = getelementptr inbounds i32, i32* [[A]], i64 [[TMP7]] ; CHECK-NEXT: [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4 -; CHECK-NEXT: [[TMP10:%.*]] = insertelement <4 x i32> [[TMP5]], i32 [[TMP9]], i32 1 +; CHECK-NEXT: [[TMP10:%.*]] = insertelement <4 x i32> [[TMP5]], i32 [[TMP9]], i64 1 ; CHECK-NEXT: br label [[PRED_LOAD_CONTINUE2]] ; CHECK: pred.load.continue2: ; CHECK-NEXT: [[TMP11:%.*]] = phi <4 x i32> [ [[TMP5]], [[PRED_LOAD_CONTINUE]] ], [ [[TMP10]], [[PRED_LOAD_IF1]] ] -; CHECK-NEXT: [[TMP12:%.*]] = extractelement <4 x i1> [[TMP0]], i32 2 +; CHECK-NEXT: [[TMP12:%.*]] = extractelement <4 x i1> [[TMP0]], i64 2 ; CHECK-NEXT: br i1 [[TMP12]], label [[PRED_LOAD_IF3:%.*]], label [[PRED_LOAD_CONTINUE4:%.*]] ; CHECK: pred.load.if3: ; CHECK-NEXT: [[TMP13:%.*]] = or i64 [[INDEX]], 2 ; CHECK-NEXT: [[TMP14:%.*]] = getelementptr inbounds i32, i32* [[A]], i64 [[TMP13]] ; CHECK-NEXT: [[TMP15:%.*]] = load i32, i32* [[TMP14]], align 4 -; CHECK-NEXT: [[TMP16:%.*]] = insertelement <4 x i32> [[TMP11]], i32 [[TMP15]], i32 2 +; CHECK-NEXT: [[TMP16:%.*]] = insertelement <4 x i32> [[TMP11]], i32 [[TMP15]], i64 2 ; CHECK-NEXT: br label [[PRED_LOAD_CONTINUE4]] ; CHECK: pred.load.continue4: ; CHECK-NEXT: [[TMP17:%.*]] = phi <4 x i32> [ [[TMP11]], [[PRED_LOAD_CONTINUE2]] ], [ [[TMP16]], [[PRED_LOAD_IF3]] ] -; CHECK-NEXT: [[TMP18:%.*]] = extractelement <4 x i1> [[TMP0]], i32 3 +; CHECK-NEXT: [[TMP18:%.*]] = extractelement <4 x i1> [[TMP0]], i64 3 ; CHECK-NEXT: br i1 [[TMP18]], label [[PRED_LOAD_IF5:%.*]], label [[PRED_LOAD_CONTINUE6]] ; CHECK: pred.load.if5: ; CHECK-NEXT: [[TMP19:%.*]] = or i64 [[INDEX]], 3 ; CHECK-NEXT: [[TMP20:%.*]] = getelementptr inbounds i32, i32* [[A]], i64 [[TMP19]] ; CHECK-NEXT: [[TMP21:%.*]] = load i32, i32* [[TMP20]], align 4 -; CHECK-NEXT: [[TMP22:%.*]] = insertelement <4 x i32> [[TMP17]], i32 [[TMP21]], i32 3 +; CHECK-NEXT: [[TMP22:%.*]] = insertelement <4 x i32> [[TMP17]], i32 [[TMP21]], i64 3 ; CHECK-NEXT: br label [[PRED_LOAD_CONTINUE6]] ; CHECK: pred.load.continue6: ; CHECK-NEXT: [[TMP23:%.*]] = phi <4 x i32> [ [[TMP17]], [[PRED_LOAD_CONTINUE4]] ], [ [[TMP22]], [[PRED_LOAD_IF5]] ] @@ -101,57 +101,57 @@ ; CHECK-NEXT: [[VEC_PHI:%.*]] = phi i32 [ 0, [[VECTOR_PH]] ], [ [[TMP48:%.*]], [[PRED_LOAD_CONTINUE8]] ] ; CHECK-NEXT: [[VEC_IND1:%.*]] = phi <4 x i32> [ , [[VECTOR_PH]] ], [ [[VEC_IND_NEXT2:%.*]], [[PRED_LOAD_CONTINUE8]] ] ; CHECK-NEXT: [[TMP0:%.*]] = icmp ult <4 x i64> [[VEC_IND]], -; CHECK-NEXT: [[TMP1:%.*]] = extractelement <4 x i1> [[TMP0]], i32 0 +; CHECK-NEXT: [[TMP1:%.*]] = extractelement <4 x i1> [[TMP0]], i64 0 ; CHECK-NEXT: br i1 [[TMP1]], label [[PRED_LOAD_IF:%.*]], label [[PRED_LOAD_CONTINUE:%.*]] ; CHECK: pred.load.if: ; CHECK-NEXT: [[TMP2:%.*]] = getelementptr inbounds i32, i32* [[A:%.*]], i64 [[INDEX]] ; CHECK-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 -; CHECK-NEXT: [[TMP4:%.*]] = insertelement <4 x i32> poison, i32 [[TMP3]], i32 0 +; CHECK-NEXT: [[TMP4:%.*]] = insertelement <4 x i32> poison, i32 [[TMP3]], i64 0 ; CHECK-NEXT: [[TMP5:%.*]] = getelementptr inbounds i32, i32* [[B:%.*]], i64 [[INDEX]] ; CHECK-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4 -; CHECK-NEXT: [[TMP7:%.*]] = insertelement <4 x i32> poison, i32 [[TMP6]], i32 0 +; CHECK-NEXT: [[TMP7:%.*]] = insertelement <4 x i32> poison, i32 [[TMP6]], i64 0 ; CHECK-NEXT: br label [[PRED_LOAD_CONTINUE]] ; CHECK: pred.load.continue: ; CHECK-NEXT: [[TMP8:%.*]] = phi <4 x i32> [ poison, [[VECTOR_BODY]] ], [ [[TMP4]], [[PRED_LOAD_IF]] ] ; CHECK-NEXT: [[TMP9:%.*]] = phi <4 x i32> [ poison, [[VECTOR_BODY]] ], [ [[TMP7]], [[PRED_LOAD_IF]] ] -; CHECK-NEXT: [[TMP10:%.*]] = extractelement <4 x i1> [[TMP0]], i32 1 +; CHECK-NEXT: [[TMP10:%.*]] = extractelement <4 x i1> [[TMP0]], i64 1 ; CHECK-NEXT: br i1 [[TMP10]], label [[PRED_LOAD_IF3:%.*]], label [[PRED_LOAD_CONTINUE4:%.*]] ; CHECK: pred.load.if3: ; CHECK-NEXT: [[TMP11:%.*]] = or i64 [[INDEX]], 1 ; CHECK-NEXT: [[TMP12:%.*]] = getelementptr inbounds i32, i32* [[A]], i64 [[TMP11]] ; CHECK-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP12]], align 4 -; CHECK-NEXT: [[TMP14:%.*]] = insertelement <4 x i32> [[TMP8]], i32 [[TMP13]], i32 1 +; CHECK-NEXT: [[TMP14:%.*]] = insertelement <4 x i32> [[TMP8]], i32 [[TMP13]], i64 1 ; CHECK-NEXT: [[TMP15:%.*]] = getelementptr inbounds i32, i32* [[B]], i64 [[TMP11]] ; CHECK-NEXT: [[TMP16:%.*]] = load i32, i32* [[TMP15]], align 4 -; CHECK-NEXT: [[TMP17:%.*]] = insertelement <4 x i32> [[TMP9]], i32 [[TMP16]], i32 1 +; CHECK-NEXT: [[TMP17:%.*]] = insertelement <4 x i32> [[TMP9]], i32 [[TMP16]], i64 1 ; CHECK-NEXT: br label [[PRED_LOAD_CONTINUE4]] ; CHECK: pred.load.continue4: ; CHECK-NEXT: [[TMP18:%.*]] = phi <4 x i32> [ [[TMP8]], [[PRED_LOAD_CONTINUE]] ], [ [[TMP14]], [[PRED_LOAD_IF3]] ] ; CHECK-NEXT: [[TMP19:%.*]] = phi <4 x i32> [ [[TMP9]], [[PRED_LOAD_CONTINUE]] ], [ [[TMP17]], [[PRED_LOAD_IF3]] ] -; CHECK-NEXT: [[TMP20:%.*]] = extractelement <4 x i1> [[TMP0]], i32 2 +; CHECK-NEXT: [[TMP20:%.*]] = extractelement <4 x i1> [[TMP0]], i64 2 ; CHECK-NEXT: br i1 [[TMP20]], label [[PRED_LOAD_IF5:%.*]], label [[PRED_LOAD_CONTINUE6:%.*]] ; CHECK: pred.load.if5: ; CHECK-NEXT: [[TMP21:%.*]] = or i64 [[INDEX]], 2 ; CHECK-NEXT: [[TMP22:%.*]] = getelementptr inbounds i32, i32* [[A]], i64 [[TMP21]] ; CHECK-NEXT: [[TMP23:%.*]] = load i32, i32* [[TMP22]], align 4 -; CHECK-NEXT: [[TMP24:%.*]] = insertelement <4 x i32> [[TMP18]], i32 [[TMP23]], i32 2 +; CHECK-NEXT: [[TMP24:%.*]] = insertelement <4 x i32> [[TMP18]], i32 [[TMP23]], i64 2 ; CHECK-NEXT: [[TMP25:%.*]] = getelementptr inbounds i32, i32* [[B]], i64 [[TMP21]] ; CHECK-NEXT: [[TMP26:%.*]] = load i32, i32* [[TMP25]], align 4 -; CHECK-NEXT: [[TMP27:%.*]] = insertelement <4 x i32> [[TMP19]], i32 [[TMP26]], i32 2 +; CHECK-NEXT: [[TMP27:%.*]] = insertelement <4 x i32> [[TMP19]], i32 [[TMP26]], i64 2 ; CHECK-NEXT: br label [[PRED_LOAD_CONTINUE6]] ; CHECK: pred.load.continue6: ; CHECK-NEXT: [[TMP28:%.*]] = phi <4 x i32> [ [[TMP18]], [[PRED_LOAD_CONTINUE4]] ], [ [[TMP24]], [[PRED_LOAD_IF5]] ] ; CHECK-NEXT: [[TMP29:%.*]] = phi <4 x i32> [ [[TMP19]], [[PRED_LOAD_CONTINUE4]] ], [ [[TMP27]], [[PRED_LOAD_IF5]] ] -; CHECK-NEXT: [[TMP30:%.*]] = extractelement <4 x i1> [[TMP0]], i32 3 +; CHECK-NEXT: [[TMP30:%.*]] = extractelement <4 x i1> [[TMP0]], i64 3 ; CHECK-NEXT: br i1 [[TMP30]], label [[PRED_LOAD_IF7:%.*]], label [[PRED_LOAD_CONTINUE8]] ; CHECK: pred.load.if7: ; CHECK-NEXT: [[TMP31:%.*]] = or i64 [[INDEX]], 3 ; CHECK-NEXT: [[TMP32:%.*]] = getelementptr inbounds i32, i32* [[A]], i64 [[TMP31]] ; CHECK-NEXT: [[TMP33:%.*]] = load i32, i32* [[TMP32]], align 4 -; CHECK-NEXT: [[TMP34:%.*]] = insertelement <4 x i32> [[TMP28]], i32 [[TMP33]], i32 3 +; CHECK-NEXT: [[TMP34:%.*]] = insertelement <4 x i32> [[TMP28]], i32 [[TMP33]], i64 3 ; CHECK-NEXT: [[TMP35:%.*]] = getelementptr inbounds i32, i32* [[B]], i64 [[TMP31]] ; CHECK-NEXT: [[TMP36:%.*]] = load i32, i32* [[TMP35]], align 4 -; CHECK-NEXT: [[TMP37:%.*]] = insertelement <4 x i32> [[TMP29]], i32 [[TMP36]], i32 3 +; CHECK-NEXT: [[TMP37:%.*]] = insertelement <4 x i32> [[TMP29]], i32 [[TMP36]], i64 3 ; CHECK-NEXT: br label [[PRED_LOAD_CONTINUE8]] ; CHECK: pred.load.continue8: ; CHECK-NEXT: [[TMP38:%.*]] = phi <4 x i32> [ [[TMP28]], [[PRED_LOAD_CONTINUE6]] ], [ [[TMP34]], [[PRED_LOAD_IF7]] ] @@ -215,42 +215,42 @@ ; CHECK-NEXT: [[VEC_IND:%.*]] = phi <4 x i64> [ , [[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], [[PRED_LOAD_CONTINUE6]] ] ; CHECK-NEXT: [[VEC_PHI:%.*]] = phi i32 [ 0, [[VECTOR_PH]] ], [ [[TMP29:%.*]], [[PRED_LOAD_CONTINUE6]] ] ; CHECK-NEXT: [[TMP0:%.*]] = icmp ult <4 x i64> [[VEC_IND]], -; CHECK-NEXT: [[TMP1:%.*]] = extractelement <4 x i1> [[TMP0]], i32 0 +; CHECK-NEXT: [[TMP1:%.*]] = extractelement <4 x i1> [[TMP0]], i64 0 ; CHECK-NEXT: br i1 [[TMP1]], label [[PRED_LOAD_IF:%.*]], label [[PRED_LOAD_CONTINUE:%.*]] ; CHECK: pred.load.if: ; CHECK-NEXT: [[TMP2:%.*]] = getelementptr inbounds i32, i32* [[A:%.*]], i64 [[INDEX]] ; CHECK-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 -; CHECK-NEXT: [[TMP4:%.*]] = insertelement <4 x i32> poison, i32 [[TMP3]], i32 0 +; CHECK-NEXT: [[TMP4:%.*]] = insertelement <4 x i32> poison, i32 [[TMP3]], i64 0 ; CHECK-NEXT: br label [[PRED_LOAD_CONTINUE]] ; CHECK: pred.load.continue: ; CHECK-NEXT: [[TMP5:%.*]] = phi <4 x i32> [ poison, [[VECTOR_BODY]] ], [ [[TMP4]], [[PRED_LOAD_IF]] ] -; CHECK-NEXT: [[TMP6:%.*]] = extractelement <4 x i1> [[TMP0]], i32 1 +; CHECK-NEXT: [[TMP6:%.*]] = extractelement <4 x i1> [[TMP0]], i64 1 ; CHECK-NEXT: br i1 [[TMP6]], label [[PRED_LOAD_IF1:%.*]], label [[PRED_LOAD_CONTINUE2:%.*]] ; CHECK: pred.load.if1: ; CHECK-NEXT: [[TMP7:%.*]] = or i64 [[INDEX]], 1 ; CHECK-NEXT: [[TMP8:%.*]] = getelementptr inbounds i32, i32* [[A]], i64 [[TMP7]] ; CHECK-NEXT: [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4 -; CHECK-NEXT: [[TMP10:%.*]] = insertelement <4 x i32> [[TMP5]], i32 [[TMP9]], i32 1 +; CHECK-NEXT: [[TMP10:%.*]] = insertelement <4 x i32> [[TMP5]], i32 [[TMP9]], i64 1 ; CHECK-NEXT: br label [[PRED_LOAD_CONTINUE2]] ; CHECK: pred.load.continue2: ; CHECK-NEXT: [[TMP11:%.*]] = phi <4 x i32> [ [[TMP5]], [[PRED_LOAD_CONTINUE]] ], [ [[TMP10]], [[PRED_LOAD_IF1]] ] -; CHECK-NEXT: [[TMP12:%.*]] = extractelement <4 x i1> [[TMP0]], i32 2 +; CHECK-NEXT: [[TMP12:%.*]] = extractelement <4 x i1> [[TMP0]], i64 2 ; CHECK-NEXT: br i1 [[TMP12]], label [[PRED_LOAD_IF3:%.*]], label [[PRED_LOAD_CONTINUE4:%.*]] ; CHECK: pred.load.if3: ; CHECK-NEXT: [[TMP13:%.*]] = or i64 [[INDEX]], 2 ; CHECK-NEXT: [[TMP14:%.*]] = getelementptr inbounds i32, i32* [[A]], i64 [[TMP13]] ; CHECK-NEXT: [[TMP15:%.*]] = load i32, i32* [[TMP14]], align 4 -; CHECK-NEXT: [[TMP16:%.*]] = insertelement <4 x i32> [[TMP11]], i32 [[TMP15]], i32 2 +; CHECK-NEXT: [[TMP16:%.*]] = insertelement <4 x i32> [[TMP11]], i32 [[TMP15]], i64 2 ; CHECK-NEXT: br label [[PRED_LOAD_CONTINUE4]] ; CHECK: pred.load.continue4: ; CHECK-NEXT: [[TMP17:%.*]] = phi <4 x i32> [ [[TMP11]], [[PRED_LOAD_CONTINUE2]] ], [ [[TMP16]], [[PRED_LOAD_IF3]] ] -; CHECK-NEXT: [[TMP18:%.*]] = extractelement <4 x i1> [[TMP0]], i32 3 +; CHECK-NEXT: [[TMP18:%.*]] = extractelement <4 x i1> [[TMP0]], i64 3 ; CHECK-NEXT: br i1 [[TMP18]], label [[PRED_LOAD_IF5:%.*]], label [[PRED_LOAD_CONTINUE6]] ; CHECK: pred.load.if5: ; CHECK-NEXT: [[TMP19:%.*]] = or i64 [[INDEX]], 3 ; CHECK-NEXT: [[TMP20:%.*]] = getelementptr inbounds i32, i32* [[A]], i64 [[TMP19]] ; CHECK-NEXT: [[TMP21:%.*]] = load i32, i32* [[TMP20]], align 4 -; CHECK-NEXT: [[TMP22:%.*]] = insertelement <4 x i32> [[TMP17]], i32 [[TMP21]], i32 3 +; CHECK-NEXT: [[TMP22:%.*]] = insertelement <4 x i32> [[TMP17]], i32 [[TMP21]], i64 3 ; CHECK-NEXT: br label [[PRED_LOAD_CONTINUE6]] ; CHECK: pred.load.continue6: ; CHECK-NEXT: [[TMP23:%.*]] = phi <4 x i32> [ [[TMP17]], [[PRED_LOAD_CONTINUE4]] ], [ [[TMP22]], [[PRED_LOAD_IF5]] ] @@ -306,57 +306,57 @@ ; CHECK-NEXT: [[VEC_PHI:%.*]] = phi i32 [ 1, [[VECTOR_PH]] ], [ [[TMP48:%.*]], [[PRED_LOAD_CONTINUE8]] ] ; CHECK-NEXT: [[VEC_IND1:%.*]] = phi <4 x i32> [ , [[VECTOR_PH]] ], [ [[VEC_IND_NEXT2:%.*]], [[PRED_LOAD_CONTINUE8]] ] ; CHECK-NEXT: [[TMP0:%.*]] = icmp ult <4 x i64> [[VEC_IND]], -; CHECK-NEXT: [[TMP1:%.*]] = extractelement <4 x i1> [[TMP0]], i32 0 +; CHECK-NEXT: [[TMP1:%.*]] = extractelement <4 x i1> [[TMP0]], i64 0 ; CHECK-NEXT: br i1 [[TMP1]], label [[PRED_LOAD_IF:%.*]], label [[PRED_LOAD_CONTINUE:%.*]] ; CHECK: pred.load.if: ; CHECK-NEXT: [[TMP2:%.*]] = getelementptr inbounds i32, i32* [[A:%.*]], i64 [[INDEX]] ; CHECK-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 -; CHECK-NEXT: [[TMP4:%.*]] = insertelement <4 x i32> poison, i32 [[TMP3]], i32 0 +; CHECK-NEXT: [[TMP4:%.*]] = insertelement <4 x i32> poison, i32 [[TMP3]], i64 0 ; CHECK-NEXT: [[TMP5:%.*]] = getelementptr inbounds i32, i32* [[B:%.*]], i64 [[INDEX]] ; CHECK-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4 -; CHECK-NEXT: [[TMP7:%.*]] = insertelement <4 x i32> poison, i32 [[TMP6]], i32 0 +; CHECK-NEXT: [[TMP7:%.*]] = insertelement <4 x i32> poison, i32 [[TMP6]], i64 0 ; CHECK-NEXT: br label [[PRED_LOAD_CONTINUE]] ; CHECK: pred.load.continue: ; CHECK-NEXT: [[TMP8:%.*]] = phi <4 x i32> [ poison, [[VECTOR_BODY]] ], [ [[TMP4]], [[PRED_LOAD_IF]] ] ; CHECK-NEXT: [[TMP9:%.*]] = phi <4 x i32> [ poison, [[VECTOR_BODY]] ], [ [[TMP7]], [[PRED_LOAD_IF]] ] -; CHECK-NEXT: [[TMP10:%.*]] = extractelement <4 x i1> [[TMP0]], i32 1 +; CHECK-NEXT: [[TMP10:%.*]] = extractelement <4 x i1> [[TMP0]], i64 1 ; CHECK-NEXT: br i1 [[TMP10]], label [[PRED_LOAD_IF3:%.*]], label [[PRED_LOAD_CONTINUE4:%.*]] ; CHECK: pred.load.if3: ; CHECK-NEXT: [[TMP11:%.*]] = or i64 [[INDEX]], 1 ; CHECK-NEXT: [[TMP12:%.*]] = getelementptr inbounds i32, i32* [[A]], i64 [[TMP11]] ; CHECK-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP12]], align 4 -; CHECK-NEXT: [[TMP14:%.*]] = insertelement <4 x i32> [[TMP8]], i32 [[TMP13]], i32 1 +; CHECK-NEXT: [[TMP14:%.*]] = insertelement <4 x i32> [[TMP8]], i32 [[TMP13]], i64 1 ; CHECK-NEXT: [[TMP15:%.*]] = getelementptr inbounds i32, i32* [[B]], i64 [[TMP11]] ; CHECK-NEXT: [[TMP16:%.*]] = load i32, i32* [[TMP15]], align 4 -; CHECK-NEXT: [[TMP17:%.*]] = insertelement <4 x i32> [[TMP9]], i32 [[TMP16]], i32 1 +; CHECK-NEXT: [[TMP17:%.*]] = insertelement <4 x i32> [[TMP9]], i32 [[TMP16]], i64 1 ; CHECK-NEXT: br label [[PRED_LOAD_CONTINUE4]] ; CHECK: pred.load.continue4: ; CHECK-NEXT: [[TMP18:%.*]] = phi <4 x i32> [ [[TMP8]], [[PRED_LOAD_CONTINUE]] ], [ [[TMP14]], [[PRED_LOAD_IF3]] ] ; CHECK-NEXT: [[TMP19:%.*]] = phi <4 x i32> [ [[TMP9]], [[PRED_LOAD_CONTINUE]] ], [ [[TMP17]], [[PRED_LOAD_IF3]] ] -; CHECK-NEXT: [[TMP20:%.*]] = extractelement <4 x i1> [[TMP0]], i32 2 +; CHECK-NEXT: [[TMP20:%.*]] = extractelement <4 x i1> [[TMP0]], i64 2 ; CHECK-NEXT: br i1 [[TMP20]], label [[PRED_LOAD_IF5:%.*]], label [[PRED_LOAD_CONTINUE6:%.*]] ; CHECK: pred.load.if5: ; CHECK-NEXT: [[TMP21:%.*]] = or i64 [[INDEX]], 2 ; CHECK-NEXT: [[TMP22:%.*]] = getelementptr inbounds i32, i32* [[A]], i64 [[TMP21]] ; CHECK-NEXT: [[TMP23:%.*]] = load i32, i32* [[TMP22]], align 4 -; CHECK-NEXT: [[TMP24:%.*]] = insertelement <4 x i32> [[TMP18]], i32 [[TMP23]], i32 2 +; CHECK-NEXT: [[TMP24:%.*]] = insertelement <4 x i32> [[TMP18]], i32 [[TMP23]], i64 2 ; CHECK-NEXT: [[TMP25:%.*]] = getelementptr inbounds i32, i32* [[B]], i64 [[TMP21]] ; CHECK-NEXT: [[TMP26:%.*]] = load i32, i32* [[TMP25]], align 4 -; CHECK-NEXT: [[TMP27:%.*]] = insertelement <4 x i32> [[TMP19]], i32 [[TMP26]], i32 2 +; CHECK-NEXT: [[TMP27:%.*]] = insertelement <4 x i32> [[TMP19]], i32 [[TMP26]], i64 2 ; CHECK-NEXT: br label [[PRED_LOAD_CONTINUE6]] ; CHECK: pred.load.continue6: ; CHECK-NEXT: [[TMP28:%.*]] = phi <4 x i32> [ [[TMP18]], [[PRED_LOAD_CONTINUE4]] ], [ [[TMP24]], [[PRED_LOAD_IF5]] ] ; CHECK-NEXT: [[TMP29:%.*]] = phi <4 x i32> [ [[TMP19]], [[PRED_LOAD_CONTINUE4]] ], [ [[TMP27]], [[PRED_LOAD_IF5]] ] -; CHECK-NEXT: [[TMP30:%.*]] = extractelement <4 x i1> [[TMP0]], i32 3 +; CHECK-NEXT: [[TMP30:%.*]] = extractelement <4 x i1> [[TMP0]], i64 3 ; CHECK-NEXT: br i1 [[TMP30]], label [[PRED_LOAD_IF7:%.*]], label [[PRED_LOAD_CONTINUE8]] ; CHECK: pred.load.if7: ; CHECK-NEXT: [[TMP31:%.*]] = or i64 [[INDEX]], 3 ; CHECK-NEXT: [[TMP32:%.*]] = getelementptr inbounds i32, i32* [[A]], i64 [[TMP31]] ; CHECK-NEXT: [[TMP33:%.*]] = load i32, i32* [[TMP32]], align 4 -; CHECK-NEXT: [[TMP34:%.*]] = insertelement <4 x i32> [[TMP28]], i32 [[TMP33]], i32 3 +; CHECK-NEXT: [[TMP34:%.*]] = insertelement <4 x i32> [[TMP28]], i32 [[TMP33]], i64 3 ; CHECK-NEXT: [[TMP35:%.*]] = getelementptr inbounds i32, i32* [[B]], i64 [[TMP31]] ; CHECK-NEXT: [[TMP36:%.*]] = load i32, i32* [[TMP35]], align 4 -; CHECK-NEXT: [[TMP37:%.*]] = insertelement <4 x i32> [[TMP29]], i32 [[TMP36]], i32 3 +; CHECK-NEXT: [[TMP37:%.*]] = insertelement <4 x i32> [[TMP29]], i32 [[TMP36]], i64 3 ; CHECK-NEXT: br label [[PRED_LOAD_CONTINUE8]] ; CHECK: pred.load.continue8: ; CHECK-NEXT: [[TMP38:%.*]] = phi <4 x i32> [ [[TMP28]], [[PRED_LOAD_CONTINUE6]] ], [ [[TMP34]], [[PRED_LOAD_IF7]] ] @@ -421,57 +421,57 @@ ; CHECK-NEXT: [[VEC_PHI:%.*]] = phi i32 [ 0, [[VECTOR_PH]] ], [ [[TMP46:%.*]], [[PRED_LOAD_CONTINUE8]] ] ; CHECK-NEXT: [[VEC_IND1:%.*]] = phi <4 x i32> [ , [[VECTOR_PH]] ], [ [[VEC_IND_NEXT2:%.*]], [[PRED_LOAD_CONTINUE8]] ] ; CHECK-NEXT: [[TMP0:%.*]] = icmp ult <4 x i64> [[VEC_IND]], -; CHECK-NEXT: [[TMP1:%.*]] = extractelement <4 x i1> [[TMP0]], i32 0 +; CHECK-NEXT: [[TMP1:%.*]] = extractelement <4 x i1> [[TMP0]], i64 0 ; CHECK-NEXT: br i1 [[TMP1]], label [[PRED_LOAD_IF:%.*]], label [[PRED_LOAD_CONTINUE:%.*]] ; CHECK: pred.load.if: ; CHECK-NEXT: [[TMP2:%.*]] = getelementptr inbounds i32, i32* [[A:%.*]], i64 [[INDEX]] ; CHECK-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 -; CHECK-NEXT: [[TMP4:%.*]] = insertelement <4 x i32> poison, i32 [[TMP3]], i32 0 +; CHECK-NEXT: [[TMP4:%.*]] = insertelement <4 x i32> poison, i32 [[TMP3]], i64 0 ; CHECK-NEXT: [[TMP5:%.*]] = getelementptr inbounds i32, i32* [[B:%.*]], i64 [[INDEX]] ; CHECK-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4 -; CHECK-NEXT: [[TMP7:%.*]] = insertelement <4 x i32> poison, i32 [[TMP6]], i32 0 +; CHECK-NEXT: [[TMP7:%.*]] = insertelement <4 x i32> poison, i32 [[TMP6]], i64 0 ; CHECK-NEXT: br label [[PRED_LOAD_CONTINUE]] ; CHECK: pred.load.continue: ; CHECK-NEXT: [[TMP8:%.*]] = phi <4 x i32> [ poison, [[VECTOR_BODY]] ], [ [[TMP4]], [[PRED_LOAD_IF]] ] ; CHECK-NEXT: [[TMP9:%.*]] = phi <4 x i32> [ poison, [[VECTOR_BODY]] ], [ [[TMP7]], [[PRED_LOAD_IF]] ] -; CHECK-NEXT: [[TMP10:%.*]] = extractelement <4 x i1> [[TMP0]], i32 1 +; CHECK-NEXT: [[TMP10:%.*]] = extractelement <4 x i1> [[TMP0]], i64 1 ; CHECK-NEXT: br i1 [[TMP10]], label [[PRED_LOAD_IF3:%.*]], label [[PRED_LOAD_CONTINUE4:%.*]] ; CHECK: pred.load.if3: ; CHECK-NEXT: [[TMP11:%.*]] = or i64 [[INDEX]], 1 ; CHECK-NEXT: [[TMP12:%.*]] = getelementptr inbounds i32, i32* [[A]], i64 [[TMP11]] ; CHECK-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP12]], align 4 -; CHECK-NEXT: [[TMP14:%.*]] = insertelement <4 x i32> [[TMP8]], i32 [[TMP13]], i32 1 +; CHECK-NEXT: [[TMP14:%.*]] = insertelement <4 x i32> [[TMP8]], i32 [[TMP13]], i64 1 ; CHECK-NEXT: [[TMP15:%.*]] = getelementptr inbounds i32, i32* [[B]], i64 [[TMP11]] ; CHECK-NEXT: [[TMP16:%.*]] = load i32, i32* [[TMP15]], align 4 -; CHECK-NEXT: [[TMP17:%.*]] = insertelement <4 x i32> [[TMP9]], i32 [[TMP16]], i32 1 +; CHECK-NEXT: [[TMP17:%.*]] = insertelement <4 x i32> [[TMP9]], i32 [[TMP16]], i64 1 ; CHECK-NEXT: br label [[PRED_LOAD_CONTINUE4]] ; CHECK: pred.load.continue4: ; CHECK-NEXT: [[TMP18:%.*]] = phi <4 x i32> [ [[TMP8]], [[PRED_LOAD_CONTINUE]] ], [ [[TMP14]], [[PRED_LOAD_IF3]] ] ; CHECK-NEXT: [[TMP19:%.*]] = phi <4 x i32> [ [[TMP9]], [[PRED_LOAD_CONTINUE]] ], [ [[TMP17]], [[PRED_LOAD_IF3]] ] -; CHECK-NEXT: [[TMP20:%.*]] = extractelement <4 x i1> [[TMP0]], i32 2 +; CHECK-NEXT: [[TMP20:%.*]] = extractelement <4 x i1> [[TMP0]], i64 2 ; CHECK-NEXT: br i1 [[TMP20]], label [[PRED_LOAD_IF5:%.*]], label [[PRED_LOAD_CONTINUE6:%.*]] ; CHECK: pred.load.if5: ; CHECK-NEXT: [[TMP21:%.*]] = or i64 [[INDEX]], 2 ; CHECK-NEXT: [[TMP22:%.*]] = getelementptr inbounds i32, i32* [[A]], i64 [[TMP21]] ; CHECK-NEXT: [[TMP23:%.*]] = load i32, i32* [[TMP22]], align 4 -; CHECK-NEXT: [[TMP24:%.*]] = insertelement <4 x i32> [[TMP18]], i32 [[TMP23]], i32 2 +; CHECK-NEXT: [[TMP24:%.*]] = insertelement <4 x i32> [[TMP18]], i32 [[TMP23]], i64 2 ; CHECK-NEXT: [[TMP25:%.*]] = getelementptr inbounds i32, i32* [[B]], i64 [[TMP21]] ; CHECK-NEXT: [[TMP26:%.*]] = load i32, i32* [[TMP25]], align 4 -; CHECK-NEXT: [[TMP27:%.*]] = insertelement <4 x i32> [[TMP19]], i32 [[TMP26]], i32 2 +; CHECK-NEXT: [[TMP27:%.*]] = insertelement <4 x i32> [[TMP19]], i32 [[TMP26]], i64 2 ; CHECK-NEXT: br label [[PRED_LOAD_CONTINUE6]] ; CHECK: pred.load.continue6: ; CHECK-NEXT: [[TMP28:%.*]] = phi <4 x i32> [ [[TMP18]], [[PRED_LOAD_CONTINUE4]] ], [ [[TMP24]], [[PRED_LOAD_IF5]] ] ; CHECK-NEXT: [[TMP29:%.*]] = phi <4 x i32> [ [[TMP19]], [[PRED_LOAD_CONTINUE4]] ], [ [[TMP27]], [[PRED_LOAD_IF5]] ] -; CHECK-NEXT: [[TMP30:%.*]] = extractelement <4 x i1> [[TMP0]], i32 3 +; CHECK-NEXT: [[TMP30:%.*]] = extractelement <4 x i1> [[TMP0]], i64 3 ; CHECK-NEXT: br i1 [[TMP30]], label [[PRED_LOAD_IF7:%.*]], label [[PRED_LOAD_CONTINUE8]] ; CHECK: pred.load.if7: ; CHECK-NEXT: [[TMP31:%.*]] = or i64 [[INDEX]], 3 ; CHECK-NEXT: [[TMP32:%.*]] = getelementptr inbounds i32, i32* [[A]], i64 [[TMP31]] ; CHECK-NEXT: [[TMP33:%.*]] = load i32, i32* [[TMP32]], align 4 -; CHECK-NEXT: [[TMP34:%.*]] = insertelement <4 x i32> [[TMP28]], i32 [[TMP33]], i32 3 +; CHECK-NEXT: [[TMP34:%.*]] = insertelement <4 x i32> [[TMP28]], i32 [[TMP33]], i64 3 ; CHECK-NEXT: [[TMP35:%.*]] = getelementptr inbounds i32, i32* [[B]], i64 [[TMP31]] ; CHECK-NEXT: [[TMP36:%.*]] = load i32, i32* [[TMP35]], align 4 -; CHECK-NEXT: [[TMP37:%.*]] = insertelement <4 x i32> [[TMP29]], i32 [[TMP36]], i32 3 +; CHECK-NEXT: [[TMP37:%.*]] = insertelement <4 x i32> [[TMP29]], i32 [[TMP36]], i64 3 ; CHECK-NEXT: br label [[PRED_LOAD_CONTINUE8]] ; CHECK: pred.load.continue8: ; CHECK-NEXT: [[TMP38:%.*]] = phi <4 x i32> [ [[TMP28]], [[PRED_LOAD_CONTINUE6]] ], [ [[TMP34]], [[PRED_LOAD_IF7]] ] @@ -533,57 +533,57 @@ ; CHECK-NEXT: [[VEC_IND:%.*]] = phi <4 x i64> [ , [[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], [[PRED_LOAD_CONTINUE6]] ] ; CHECK-NEXT: [[VEC_PHI:%.*]] = phi i32 [ 19, [[VECTOR_PH]] ], [ [[TMP45:%.*]], [[PRED_LOAD_CONTINUE6]] ] ; CHECK-NEXT: [[TMP0:%.*]] = icmp ult <4 x i64> [[VEC_IND]], -; CHECK-NEXT: [[TMP1:%.*]] = extractelement <4 x i1> [[TMP0]], i32 0 +; CHECK-NEXT: [[TMP1:%.*]] = extractelement <4 x i1> [[TMP0]], i64 0 ; CHECK-NEXT: br i1 [[TMP1]], label [[PRED_LOAD_IF:%.*]], label [[PRED_LOAD_CONTINUE:%.*]] ; CHECK: pred.load.if: ; CHECK-NEXT: [[TMP2:%.*]] = getelementptr inbounds i32, i32* [[A:%.*]], i64 [[INDEX]] ; CHECK-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 -; CHECK-NEXT: [[TMP4:%.*]] = insertelement <4 x i32> poison, i32 [[TMP3]], i32 0 +; CHECK-NEXT: [[TMP4:%.*]] = insertelement <4 x i32> poison, i32 [[TMP3]], i64 0 ; CHECK-NEXT: [[TMP5:%.*]] = getelementptr inbounds i32, i32* [[B:%.*]], i64 [[INDEX]] ; CHECK-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4 -; CHECK-NEXT: [[TMP7:%.*]] = insertelement <4 x i32> poison, i32 [[TMP6]], i32 0 +; CHECK-NEXT: [[TMP7:%.*]] = insertelement <4 x i32> poison, i32 [[TMP6]], i64 0 ; CHECK-NEXT: br label [[PRED_LOAD_CONTINUE]] ; CHECK: pred.load.continue: ; CHECK-NEXT: [[TMP8:%.*]] = phi <4 x i32> [ poison, [[VECTOR_BODY]] ], [ [[TMP4]], [[PRED_LOAD_IF]] ] ; CHECK-NEXT: [[TMP9:%.*]] = phi <4 x i32> [ poison, [[VECTOR_BODY]] ], [ [[TMP7]], [[PRED_LOAD_IF]] ] -; CHECK-NEXT: [[TMP10:%.*]] = extractelement <4 x i1> [[TMP0]], i32 1 +; CHECK-NEXT: [[TMP10:%.*]] = extractelement <4 x i1> [[TMP0]], i64 1 ; CHECK-NEXT: br i1 [[TMP10]], label [[PRED_LOAD_IF1:%.*]], label [[PRED_LOAD_CONTINUE2:%.*]] ; CHECK: pred.load.if1: ; CHECK-NEXT: [[TMP11:%.*]] = or i64 [[INDEX]], 1 ; CHECK-NEXT: [[TMP12:%.*]] = getelementptr inbounds i32, i32* [[A]], i64 [[TMP11]] ; CHECK-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP12]], align 4 -; CHECK-NEXT: [[TMP14:%.*]] = insertelement <4 x i32> [[TMP8]], i32 [[TMP13]], i32 1 +; CHECK-NEXT: [[TMP14:%.*]] = insertelement <4 x i32> [[TMP8]], i32 [[TMP13]], i64 1 ; CHECK-NEXT: [[TMP15:%.*]] = getelementptr inbounds i32, i32* [[B]], i64 [[TMP11]] ; CHECK-NEXT: [[TMP16:%.*]] = load i32, i32* [[TMP15]], align 4 -; CHECK-NEXT: [[TMP17:%.*]] = insertelement <4 x i32> [[TMP9]], i32 [[TMP16]], i32 1 +; CHECK-NEXT: [[TMP17:%.*]] = insertelement <4 x i32> [[TMP9]], i32 [[TMP16]], i64 1 ; CHECK-NEXT: br label [[PRED_LOAD_CONTINUE2]] ; CHECK: pred.load.continue2: ; CHECK-NEXT: [[TMP18:%.*]] = phi <4 x i32> [ [[TMP8]], [[PRED_LOAD_CONTINUE]] ], [ [[TMP14]], [[PRED_LOAD_IF1]] ] ; CHECK-NEXT: [[TMP19:%.*]] = phi <4 x i32> [ [[TMP9]], [[PRED_LOAD_CONTINUE]] ], [ [[TMP17]], [[PRED_LOAD_IF1]] ] -; CHECK-NEXT: [[TMP20:%.*]] = extractelement <4 x i1> [[TMP0]], i32 2 +; CHECK-NEXT: [[TMP20:%.*]] = extractelement <4 x i1> [[TMP0]], i64 2 ; CHECK-NEXT: br i1 [[TMP20]], label [[PRED_LOAD_IF3:%.*]], label [[PRED_LOAD_CONTINUE4:%.*]] ; CHECK: pred.load.if3: ; CHECK-NEXT: [[TMP21:%.*]] = or i64 [[INDEX]], 2 ; CHECK-NEXT: [[TMP22:%.*]] = getelementptr inbounds i32, i32* [[A]], i64 [[TMP21]] ; CHECK-NEXT: [[TMP23:%.*]] = load i32, i32* [[TMP22]], align 4 -; CHECK-NEXT: [[TMP24:%.*]] = insertelement <4 x i32> [[TMP18]], i32 [[TMP23]], i32 2 +; CHECK-NEXT: [[TMP24:%.*]] = insertelement <4 x i32> [[TMP18]], i32 [[TMP23]], i64 2 ; CHECK-NEXT: [[TMP25:%.*]] = getelementptr inbounds i32, i32* [[B]], i64 [[TMP21]] ; CHECK-NEXT: [[TMP26:%.*]] = load i32, i32* [[TMP25]], align 4 -; CHECK-NEXT: [[TMP27:%.*]] = insertelement <4 x i32> [[TMP19]], i32 [[TMP26]], i32 2 +; CHECK-NEXT: [[TMP27:%.*]] = insertelement <4 x i32> [[TMP19]], i32 [[TMP26]], i64 2 ; CHECK-NEXT: br label [[PRED_LOAD_CONTINUE4]] ; CHECK: pred.load.continue4: ; CHECK-NEXT: [[TMP28:%.*]] = phi <4 x i32> [ [[TMP18]], [[PRED_LOAD_CONTINUE2]] ], [ [[TMP24]], [[PRED_LOAD_IF3]] ] ; CHECK-NEXT: [[TMP29:%.*]] = phi <4 x i32> [ [[TMP19]], [[PRED_LOAD_CONTINUE2]] ], [ [[TMP27]], [[PRED_LOAD_IF3]] ] -; CHECK-NEXT: [[TMP30:%.*]] = extractelement <4 x i1> [[TMP0]], i32 3 +; CHECK-NEXT: [[TMP30:%.*]] = extractelement <4 x i1> [[TMP0]], i64 3 ; CHECK-NEXT: br i1 [[TMP30]], label [[PRED_LOAD_IF5:%.*]], label [[PRED_LOAD_CONTINUE6]] ; CHECK: pred.load.if5: ; CHECK-NEXT: [[TMP31:%.*]] = or i64 [[INDEX]], 3 ; CHECK-NEXT: [[TMP32:%.*]] = getelementptr inbounds i32, i32* [[A]], i64 [[TMP31]] ; CHECK-NEXT: [[TMP33:%.*]] = load i32, i32* [[TMP32]], align 4 -; CHECK-NEXT: [[TMP34:%.*]] = insertelement <4 x i32> [[TMP28]], i32 [[TMP33]], i32 3 +; CHECK-NEXT: [[TMP34:%.*]] = insertelement <4 x i32> [[TMP28]], i32 [[TMP33]], i64 3 ; CHECK-NEXT: [[TMP35:%.*]] = getelementptr inbounds i32, i32* [[B]], i64 [[TMP31]] ; CHECK-NEXT: [[TMP36:%.*]] = load i32, i32* [[TMP35]], align 4 -; CHECK-NEXT: [[TMP37:%.*]] = insertelement <4 x i32> [[TMP29]], i32 [[TMP36]], i32 3 +; CHECK-NEXT: [[TMP37:%.*]] = insertelement <4 x i32> [[TMP29]], i32 [[TMP36]], i64 3 ; CHECK-NEXT: br label [[PRED_LOAD_CONTINUE6]] ; CHECK: pred.load.continue6: ; CHECK-NEXT: [[TMP38:%.*]] = phi <4 x i32> [ [[TMP28]], [[PRED_LOAD_CONTINUE4]] ], [ [[TMP34]], [[PRED_LOAD_IF5]] ] @@ -641,57 +641,57 @@ ; CHECK-NEXT: [[VEC_IND:%.*]] = phi <4 x i64> [ , [[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], [[PRED_LOAD_CONTINUE6]] ] ; CHECK-NEXT: [[VEC_PHI:%.*]] = phi i32 [ -1, [[VECTOR_PH]] ], [ [[TMP45:%.*]], [[PRED_LOAD_CONTINUE6]] ] ; CHECK-NEXT: [[TMP0:%.*]] = icmp ult <4 x i64> [[VEC_IND]], -; CHECK-NEXT: [[TMP1:%.*]] = extractelement <4 x i1> [[TMP0]], i32 0 +; CHECK-NEXT: [[TMP1:%.*]] = extractelement <4 x i1> [[TMP0]], i64 0 ; CHECK-NEXT: br i1 [[TMP1]], label [[PRED_LOAD_IF:%.*]], label [[PRED_LOAD_CONTINUE:%.*]] ; CHECK: pred.load.if: ; CHECK-NEXT: [[TMP2:%.*]] = getelementptr inbounds i32, i32* [[A:%.*]], i64 [[INDEX]] ; CHECK-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 -; CHECK-NEXT: [[TMP4:%.*]] = insertelement <4 x i32> poison, i32 [[TMP3]], i32 0 +; CHECK-NEXT: [[TMP4:%.*]] = insertelement <4 x i32> poison, i32 [[TMP3]], i64 0 ; CHECK-NEXT: [[TMP5:%.*]] = getelementptr inbounds i32, i32* [[B:%.*]], i64 [[INDEX]] ; CHECK-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4 -; CHECK-NEXT: [[TMP7:%.*]] = insertelement <4 x i32> poison, i32 [[TMP6]], i32 0 +; CHECK-NEXT: [[TMP7:%.*]] = insertelement <4 x i32> poison, i32 [[TMP6]], i64 0 ; CHECK-NEXT: br label [[PRED_LOAD_CONTINUE]] ; CHECK: pred.load.continue: ; CHECK-NEXT: [[TMP8:%.*]] = phi <4 x i32> [ poison, [[VECTOR_BODY]] ], [ [[TMP4]], [[PRED_LOAD_IF]] ] ; CHECK-NEXT: [[TMP9:%.*]] = phi <4 x i32> [ poison, [[VECTOR_BODY]] ], [ [[TMP7]], [[PRED_LOAD_IF]] ] -; CHECK-NEXT: [[TMP10:%.*]] = extractelement <4 x i1> [[TMP0]], i32 1 +; CHECK-NEXT: [[TMP10:%.*]] = extractelement <4 x i1> [[TMP0]], i64 1 ; CHECK-NEXT: br i1 [[TMP10]], label [[PRED_LOAD_IF1:%.*]], label [[PRED_LOAD_CONTINUE2:%.*]] ; CHECK: pred.load.if1: ; CHECK-NEXT: [[TMP11:%.*]] = or i64 [[INDEX]], 1 ; CHECK-NEXT: [[TMP12:%.*]] = getelementptr inbounds i32, i32* [[A]], i64 [[TMP11]] ; CHECK-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP12]], align 4 -; CHECK-NEXT: [[TMP14:%.*]] = insertelement <4 x i32> [[TMP8]], i32 [[TMP13]], i32 1 +; CHECK-NEXT: [[TMP14:%.*]] = insertelement <4 x i32> [[TMP8]], i32 [[TMP13]], i64 1 ; CHECK-NEXT: [[TMP15:%.*]] = getelementptr inbounds i32, i32* [[B]], i64 [[TMP11]] ; CHECK-NEXT: [[TMP16:%.*]] = load i32, i32* [[TMP15]], align 4 -; CHECK-NEXT: [[TMP17:%.*]] = insertelement <4 x i32> [[TMP9]], i32 [[TMP16]], i32 1 +; CHECK-NEXT: [[TMP17:%.*]] = insertelement <4 x i32> [[TMP9]], i32 [[TMP16]], i64 1 ; CHECK-NEXT: br label [[PRED_LOAD_CONTINUE2]] ; CHECK: pred.load.continue2: ; CHECK-NEXT: [[TMP18:%.*]] = phi <4 x i32> [ [[TMP8]], [[PRED_LOAD_CONTINUE]] ], [ [[TMP14]], [[PRED_LOAD_IF1]] ] ; CHECK-NEXT: [[TMP19:%.*]] = phi <4 x i32> [ [[TMP9]], [[PRED_LOAD_CONTINUE]] ], [ [[TMP17]], [[PRED_LOAD_IF1]] ] -; CHECK-NEXT: [[TMP20:%.*]] = extractelement <4 x i1> [[TMP0]], i32 2 +; CHECK-NEXT: [[TMP20:%.*]] = extractelement <4 x i1> [[TMP0]], i64 2 ; CHECK-NEXT: br i1 [[TMP20]], label [[PRED_LOAD_IF3:%.*]], label [[PRED_LOAD_CONTINUE4:%.*]] ; CHECK: pred.load.if3: ; CHECK-NEXT: [[TMP21:%.*]] = or i64 [[INDEX]], 2 ; CHECK-NEXT: [[TMP22:%.*]] = getelementptr inbounds i32, i32* [[A]], i64 [[TMP21]] ; CHECK-NEXT: [[TMP23:%.*]] = load i32, i32* [[TMP22]], align 4 -; CHECK-NEXT: [[TMP24:%.*]] = insertelement <4 x i32> [[TMP18]], i32 [[TMP23]], i32 2 +; CHECK-NEXT: [[TMP24:%.*]] = insertelement <4 x i32> [[TMP18]], i32 [[TMP23]], i64 2 ; CHECK-NEXT: [[TMP25:%.*]] = getelementptr inbounds i32, i32* [[B]], i64 [[TMP21]] ; CHECK-NEXT: [[TMP26:%.*]] = load i32, i32* [[TMP25]], align 4 -; CHECK-NEXT: [[TMP27:%.*]] = insertelement <4 x i32> [[TMP19]], i32 [[TMP26]], i32 2 +; CHECK-NEXT: [[TMP27:%.*]] = insertelement <4 x i32> [[TMP19]], i32 [[TMP26]], i64 2 ; CHECK-NEXT: br label [[PRED_LOAD_CONTINUE4]] ; CHECK: pred.load.continue4: ; CHECK-NEXT: [[TMP28:%.*]] = phi <4 x i32> [ [[TMP18]], [[PRED_LOAD_CONTINUE2]] ], [ [[TMP24]], [[PRED_LOAD_IF3]] ] ; CHECK-NEXT: [[TMP29:%.*]] = phi <4 x i32> [ [[TMP19]], [[PRED_LOAD_CONTINUE2]] ], [ [[TMP27]], [[PRED_LOAD_IF3]] ] -; CHECK-NEXT: [[TMP30:%.*]] = extractelement <4 x i1> [[TMP0]], i32 3 +; CHECK-NEXT: [[TMP30:%.*]] = extractelement <4 x i1> [[TMP0]], i64 3 ; CHECK-NEXT: br i1 [[TMP30]], label [[PRED_LOAD_IF5:%.*]], label [[PRED_LOAD_CONTINUE6]] ; CHECK: pred.load.if5: ; CHECK-NEXT: [[TMP31:%.*]] = or i64 [[INDEX]], 3 ; CHECK-NEXT: [[TMP32:%.*]] = getelementptr inbounds i32, i32* [[A]], i64 [[TMP31]] ; CHECK-NEXT: [[TMP33:%.*]] = load i32, i32* [[TMP32]], align 4 -; CHECK-NEXT: [[TMP34:%.*]] = insertelement <4 x i32> [[TMP28]], i32 [[TMP33]], i32 3 +; CHECK-NEXT: [[TMP34:%.*]] = insertelement <4 x i32> [[TMP28]], i32 [[TMP33]], i64 3 ; CHECK-NEXT: [[TMP35:%.*]] = getelementptr inbounds i32, i32* [[B]], i64 [[TMP31]] ; CHECK-NEXT: [[TMP36:%.*]] = load i32, i32* [[TMP35]], align 4 -; CHECK-NEXT: [[TMP37:%.*]] = insertelement <4 x i32> [[TMP29]], i32 [[TMP36]], i32 3 +; CHECK-NEXT: [[TMP37:%.*]] = insertelement <4 x i32> [[TMP29]], i32 [[TMP36]], i64 3 ; CHECK-NEXT: br label [[PRED_LOAD_CONTINUE6]] ; CHECK: pred.load.continue6: ; CHECK-NEXT: [[TMP38:%.*]] = phi <4 x i32> [ [[TMP28]], [[PRED_LOAD_CONTINUE4]] ], [ [[TMP34]], [[PRED_LOAD_IF5]] ] @@ -749,57 +749,57 @@ ; CHECK-NEXT: [[VEC_IND:%.*]] = phi <4 x i64> [ , [[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], [[PRED_LOAD_CONTINUE6]] ] ; CHECK-NEXT: [[VEC_PHI:%.*]] = phi i32 [ 0, [[VECTOR_PH]] ], [ [[TMP43:%.*]], [[PRED_LOAD_CONTINUE6]] ] ; CHECK-NEXT: [[TMP0:%.*]] = icmp ult <4 x i64> [[VEC_IND]], -; CHECK-NEXT: [[TMP1:%.*]] = extractelement <4 x i1> [[TMP0]], i32 0 +; CHECK-NEXT: [[TMP1:%.*]] = extractelement <4 x i1> [[TMP0]], i64 0 ; CHECK-NEXT: br i1 [[TMP1]], label [[PRED_LOAD_IF:%.*]], label [[PRED_LOAD_CONTINUE:%.*]] ; CHECK: pred.load.if: ; CHECK-NEXT: [[TMP2:%.*]] = getelementptr inbounds i32, i32* [[A:%.*]], i64 [[INDEX]] ; CHECK-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 -; CHECK-NEXT: [[TMP4:%.*]] = insertelement <4 x i32> poison, i32 [[TMP3]], i32 0 +; CHECK-NEXT: [[TMP4:%.*]] = insertelement <4 x i32> poison, i32 [[TMP3]], i64 0 ; CHECK-NEXT: [[TMP5:%.*]] = getelementptr inbounds i32, i32* [[B:%.*]], i64 [[INDEX]] ; CHECK-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4 -; CHECK-NEXT: [[TMP7:%.*]] = insertelement <4 x i32> poison, i32 [[TMP6]], i32 0 +; CHECK-NEXT: [[TMP7:%.*]] = insertelement <4 x i32> poison, i32 [[TMP6]], i64 0 ; CHECK-NEXT: br label [[PRED_LOAD_CONTINUE]] ; CHECK: pred.load.continue: ; CHECK-NEXT: [[TMP8:%.*]] = phi <4 x i32> [ poison, [[VECTOR_BODY]] ], [ [[TMP4]], [[PRED_LOAD_IF]] ] ; CHECK-NEXT: [[TMP9:%.*]] = phi <4 x i32> [ poison, [[VECTOR_BODY]] ], [ [[TMP7]], [[PRED_LOAD_IF]] ] -; CHECK-NEXT: [[TMP10:%.*]] = extractelement <4 x i1> [[TMP0]], i32 1 +; CHECK-NEXT: [[TMP10:%.*]] = extractelement <4 x i1> [[TMP0]], i64 1 ; CHECK-NEXT: br i1 [[TMP10]], label [[PRED_LOAD_IF1:%.*]], label [[PRED_LOAD_CONTINUE2:%.*]] ; CHECK: pred.load.if1: ; CHECK-NEXT: [[TMP11:%.*]] = or i64 [[INDEX]], 1 ; CHECK-NEXT: [[TMP12:%.*]] = getelementptr inbounds i32, i32* [[A]], i64 [[TMP11]] ; CHECK-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP12]], align 4 -; CHECK-NEXT: [[TMP14:%.*]] = insertelement <4 x i32> [[TMP8]], i32 [[TMP13]], i32 1 +; CHECK-NEXT: [[TMP14:%.*]] = insertelement <4 x i32> [[TMP8]], i32 [[TMP13]], i64 1 ; CHECK-NEXT: [[TMP15:%.*]] = getelementptr inbounds i32, i32* [[B]], i64 [[TMP11]] ; CHECK-NEXT: [[TMP16:%.*]] = load i32, i32* [[TMP15]], align 4 -; CHECK-NEXT: [[TMP17:%.*]] = insertelement <4 x i32> [[TMP9]], i32 [[TMP16]], i32 1 +; CHECK-NEXT: [[TMP17:%.*]] = insertelement <4 x i32> [[TMP9]], i32 [[TMP16]], i64 1 ; CHECK-NEXT: br label [[PRED_LOAD_CONTINUE2]] ; CHECK: pred.load.continue2: ; CHECK-NEXT: [[TMP18:%.*]] = phi <4 x i32> [ [[TMP8]], [[PRED_LOAD_CONTINUE]] ], [ [[TMP14]], [[PRED_LOAD_IF1]] ] ; CHECK-NEXT: [[TMP19:%.*]] = phi <4 x i32> [ [[TMP9]], [[PRED_LOAD_CONTINUE]] ], [ [[TMP17]], [[PRED_LOAD_IF1]] ] -; CHECK-NEXT: [[TMP20:%.*]] = extractelement <4 x i1> [[TMP0]], i32 2 +; CHECK-NEXT: [[TMP20:%.*]] = extractelement <4 x i1> [[TMP0]], i64 2 ; CHECK-NEXT: br i1 [[TMP20]], label [[PRED_LOAD_IF3:%.*]], label [[PRED_LOAD_CONTINUE4:%.*]] ; CHECK: pred.load.if3: ; CHECK-NEXT: [[TMP21:%.*]] = or i64 [[INDEX]], 2 ; CHECK-NEXT: [[TMP22:%.*]] = getelementptr inbounds i32, i32* [[A]], i64 [[TMP21]] ; CHECK-NEXT: [[TMP23:%.*]] = load i32, i32* [[TMP22]], align 4 -; CHECK-NEXT: [[TMP24:%.*]] = insertelement <4 x i32> [[TMP18]], i32 [[TMP23]], i32 2 +; CHECK-NEXT: [[TMP24:%.*]] = insertelement <4 x i32> [[TMP18]], i32 [[TMP23]], i64 2 ; CHECK-NEXT: [[TMP25:%.*]] = getelementptr inbounds i32, i32* [[B]], i64 [[TMP21]] ; CHECK-NEXT: [[TMP26:%.*]] = load i32, i32* [[TMP25]], align 4 -; CHECK-NEXT: [[TMP27:%.*]] = insertelement <4 x i32> [[TMP19]], i32 [[TMP26]], i32 2 +; CHECK-NEXT: [[TMP27:%.*]] = insertelement <4 x i32> [[TMP19]], i32 [[TMP26]], i64 2 ; CHECK-NEXT: br label [[PRED_LOAD_CONTINUE4]] ; CHECK: pred.load.continue4: ; CHECK-NEXT: [[TMP28:%.*]] = phi <4 x i32> [ [[TMP18]], [[PRED_LOAD_CONTINUE2]] ], [ [[TMP24]], [[PRED_LOAD_IF3]] ] ; CHECK-NEXT: [[TMP29:%.*]] = phi <4 x i32> [ [[TMP19]], [[PRED_LOAD_CONTINUE2]] ], [ [[TMP27]], [[PRED_LOAD_IF3]] ] -; CHECK-NEXT: [[TMP30:%.*]] = extractelement <4 x i1> [[TMP0]], i32 3 +; CHECK-NEXT: [[TMP30:%.*]] = extractelement <4 x i1> [[TMP0]], i64 3 ; CHECK-NEXT: br i1 [[TMP30]], label [[PRED_LOAD_IF5:%.*]], label [[PRED_LOAD_CONTINUE6]] ; CHECK: pred.load.if5: ; CHECK-NEXT: [[TMP31:%.*]] = or i64 [[INDEX]], 3 ; CHECK-NEXT: [[TMP32:%.*]] = getelementptr inbounds i32, i32* [[A]], i64 [[TMP31]] ; CHECK-NEXT: [[TMP33:%.*]] = load i32, i32* [[TMP32]], align 4 -; CHECK-NEXT: [[TMP34:%.*]] = insertelement <4 x i32> [[TMP28]], i32 [[TMP33]], i32 3 +; CHECK-NEXT: [[TMP34:%.*]] = insertelement <4 x i32> [[TMP28]], i32 [[TMP33]], i64 3 ; CHECK-NEXT: [[TMP35:%.*]] = getelementptr inbounds i32, i32* [[B]], i64 [[TMP31]] ; CHECK-NEXT: [[TMP36:%.*]] = load i32, i32* [[TMP35]], align 4 -; CHECK-NEXT: [[TMP37:%.*]] = insertelement <4 x i32> [[TMP29]], i32 [[TMP36]], i32 3 +; CHECK-NEXT: [[TMP37:%.*]] = insertelement <4 x i32> [[TMP29]], i32 [[TMP36]], i64 3 ; CHECK-NEXT: br label [[PRED_LOAD_CONTINUE6]] ; CHECK: pred.load.continue6: ; CHECK-NEXT: [[TMP38:%.*]] = phi <4 x i32> [ [[TMP28]], [[PRED_LOAD_CONTINUE4]] ], [ [[TMP34]], [[PRED_LOAD_IF5]] ] @@ -855,57 +855,57 @@ ; CHECK-NEXT: [[VEC_IND:%.*]] = phi <4 x i64> [ , [[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], [[PRED_LOAD_CONTINUE6]] ] ; CHECK-NEXT: [[VEC_PHI:%.*]] = phi i32 [ 0, [[VECTOR_PH]] ], [ [[TMP43:%.*]], [[PRED_LOAD_CONTINUE6]] ] ; CHECK-NEXT: [[TMP0:%.*]] = icmp ult <4 x i64> [[VEC_IND]], -; CHECK-NEXT: [[TMP1:%.*]] = extractelement <4 x i1> [[TMP0]], i32 0 +; CHECK-NEXT: [[TMP1:%.*]] = extractelement <4 x i1> [[TMP0]], i64 0 ; CHECK-NEXT: br i1 [[TMP1]], label [[PRED_LOAD_IF:%.*]], label [[PRED_LOAD_CONTINUE:%.*]] ; CHECK: pred.load.if: ; CHECK-NEXT: [[TMP2:%.*]] = getelementptr inbounds i32, i32* [[A:%.*]], i64 [[INDEX]] ; CHECK-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 -; CHECK-NEXT: [[TMP4:%.*]] = insertelement <4 x i32> poison, i32 [[TMP3]], i32 0 +; CHECK-NEXT: [[TMP4:%.*]] = insertelement <4 x i32> poison, i32 [[TMP3]], i64 0 ; CHECK-NEXT: [[TMP5:%.*]] = getelementptr inbounds i32, i32* [[B:%.*]], i64 [[INDEX]] ; CHECK-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4 -; CHECK-NEXT: [[TMP7:%.*]] = insertelement <4 x i32> poison, i32 [[TMP6]], i32 0 +; CHECK-NEXT: [[TMP7:%.*]] = insertelement <4 x i32> poison, i32 [[TMP6]], i64 0 ; CHECK-NEXT: br label [[PRED_LOAD_CONTINUE]] ; CHECK: pred.load.continue: ; CHECK-NEXT: [[TMP8:%.*]] = phi <4 x i32> [ poison, [[VECTOR_BODY]] ], [ [[TMP4]], [[PRED_LOAD_IF]] ] ; CHECK-NEXT: [[TMP9:%.*]] = phi <4 x i32> [ poison, [[VECTOR_BODY]] ], [ [[TMP7]], [[PRED_LOAD_IF]] ] -; CHECK-NEXT: [[TMP10:%.*]] = extractelement <4 x i1> [[TMP0]], i32 1 +; CHECK-NEXT: [[TMP10:%.*]] = extractelement <4 x i1> [[TMP0]], i64 1 ; CHECK-NEXT: br i1 [[TMP10]], label [[PRED_LOAD_IF1:%.*]], label [[PRED_LOAD_CONTINUE2:%.*]] ; CHECK: pred.load.if1: ; CHECK-NEXT: [[TMP11:%.*]] = or i64 [[INDEX]], 1 ; CHECK-NEXT: [[TMP12:%.*]] = getelementptr inbounds i32, i32* [[A]], i64 [[TMP11]] ; CHECK-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP12]], align 4 -; CHECK-NEXT: [[TMP14:%.*]] = insertelement <4 x i32> [[TMP8]], i32 [[TMP13]], i32 1 +; CHECK-NEXT: [[TMP14:%.*]] = insertelement <4 x i32> [[TMP8]], i32 [[TMP13]], i64 1 ; CHECK-NEXT: [[TMP15:%.*]] = getelementptr inbounds i32, i32* [[B]], i64 [[TMP11]] ; CHECK-NEXT: [[TMP16:%.*]] = load i32, i32* [[TMP15]], align 4 -; CHECK-NEXT: [[TMP17:%.*]] = insertelement <4 x i32> [[TMP9]], i32 [[TMP16]], i32 1 +; CHECK-NEXT: [[TMP17:%.*]] = insertelement <4 x i32> [[TMP9]], i32 [[TMP16]], i64 1 ; CHECK-NEXT: br label [[PRED_LOAD_CONTINUE2]] ; CHECK: pred.load.continue2: ; CHECK-NEXT: [[TMP18:%.*]] = phi <4 x i32> [ [[TMP8]], [[PRED_LOAD_CONTINUE]] ], [ [[TMP14]], [[PRED_LOAD_IF1]] ] ; CHECK-NEXT: [[TMP19:%.*]] = phi <4 x i32> [ [[TMP9]], [[PRED_LOAD_CONTINUE]] ], [ [[TMP17]], [[PRED_LOAD_IF1]] ] -; CHECK-NEXT: [[TMP20:%.*]] = extractelement <4 x i1> [[TMP0]], i32 2 +; CHECK-NEXT: [[TMP20:%.*]] = extractelement <4 x i1> [[TMP0]], i64 2 ; CHECK-NEXT: br i1 [[TMP20]], label [[PRED_LOAD_IF3:%.*]], label [[PRED_LOAD_CONTINUE4:%.*]] ; CHECK: pred.load.if3: ; CHECK-NEXT: [[TMP21:%.*]] = or i64 [[INDEX]], 2 ; CHECK-NEXT: [[TMP22:%.*]] = getelementptr inbounds i32, i32* [[A]], i64 [[TMP21]] ; CHECK-NEXT: [[TMP23:%.*]] = load i32, i32* [[TMP22]], align 4 -; CHECK-NEXT: [[TMP24:%.*]] = insertelement <4 x i32> [[TMP18]], i32 [[TMP23]], i32 2 +; CHECK-NEXT: [[TMP24:%.*]] = insertelement <4 x i32> [[TMP18]], i32 [[TMP23]], i64 2 ; CHECK-NEXT: [[TMP25:%.*]] = getelementptr inbounds i32, i32* [[B]], i64 [[TMP21]] ; CHECK-NEXT: [[TMP26:%.*]] = load i32, i32* [[TMP25]], align 4 -; CHECK-NEXT: [[TMP27:%.*]] = insertelement <4 x i32> [[TMP19]], i32 [[TMP26]], i32 2 +; CHECK-NEXT: [[TMP27:%.*]] = insertelement <4 x i32> [[TMP19]], i32 [[TMP26]], i64 2 ; CHECK-NEXT: br label [[PRED_LOAD_CONTINUE4]] ; CHECK: pred.load.continue4: ; CHECK-NEXT: [[TMP28:%.*]] = phi <4 x i32> [ [[TMP18]], [[PRED_LOAD_CONTINUE2]] ], [ [[TMP24]], [[PRED_LOAD_IF3]] ] ; CHECK-NEXT: [[TMP29:%.*]] = phi <4 x i32> [ [[TMP19]], [[PRED_LOAD_CONTINUE2]] ], [ [[TMP27]], [[PRED_LOAD_IF3]] ] -; CHECK-NEXT: [[TMP30:%.*]] = extractelement <4 x i1> [[TMP0]], i32 3 +; CHECK-NEXT: [[TMP30:%.*]] = extractelement <4 x i1> [[TMP0]], i64 3 ; CHECK-NEXT: br i1 [[TMP30]], label [[PRED_LOAD_IF5:%.*]], label [[PRED_LOAD_CONTINUE6]] ; CHECK: pred.load.if5: ; CHECK-NEXT: [[TMP31:%.*]] = or i64 [[INDEX]], 3 ; CHECK-NEXT: [[TMP32:%.*]] = getelementptr inbounds i32, i32* [[A]], i64 [[TMP31]] ; CHECK-NEXT: [[TMP33:%.*]] = load i32, i32* [[TMP32]], align 4 -; CHECK-NEXT: [[TMP34:%.*]] = insertelement <4 x i32> [[TMP28]], i32 [[TMP33]], i32 3 +; CHECK-NEXT: [[TMP34:%.*]] = insertelement <4 x i32> [[TMP28]], i32 [[TMP33]], i64 3 ; CHECK-NEXT: [[TMP35:%.*]] = getelementptr inbounds i32, i32* [[B]], i64 [[TMP31]] ; CHECK-NEXT: [[TMP36:%.*]] = load i32, i32* [[TMP35]], align 4 -; CHECK-NEXT: [[TMP37:%.*]] = insertelement <4 x i32> [[TMP29]], i32 [[TMP36]], i32 3 +; CHECK-NEXT: [[TMP37:%.*]] = insertelement <4 x i32> [[TMP29]], i32 [[TMP36]], i64 3 ; CHECK-NEXT: br label [[PRED_LOAD_CONTINUE6]] ; CHECK: pred.load.continue6: ; CHECK-NEXT: [[TMP38:%.*]] = phi <4 x i32> [ [[TMP28]], [[PRED_LOAD_CONTINUE4]] ], [ [[TMP34]], [[PRED_LOAD_IF5]] ] @@ -961,57 +961,57 @@ ; CHECK-NEXT: [[VEC_IND:%.*]] = phi <4 x i64> [ , [[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], [[PRED_LOAD_CONTINUE6]] ] ; CHECK-NEXT: [[VEC_PHI:%.*]] = phi float [ 0.000000e+00, [[VECTOR_PH]] ], [ [[TMP43:%.*]], [[PRED_LOAD_CONTINUE6]] ] ; CHECK-NEXT: [[TMP0:%.*]] = icmp ult <4 x i64> [[VEC_IND]], -; CHECK-NEXT: [[TMP1:%.*]] = extractelement <4 x i1> [[TMP0]], i32 0 +; CHECK-NEXT: [[TMP1:%.*]] = extractelement <4 x i1> [[TMP0]], i64 0 ; CHECK-NEXT: br i1 [[TMP1]], label [[PRED_LOAD_IF:%.*]], label [[PRED_LOAD_CONTINUE:%.*]] ; CHECK: pred.load.if: ; CHECK-NEXT: [[TMP2:%.*]] = getelementptr inbounds float, float* [[A:%.*]], i64 [[INDEX]] ; CHECK-NEXT: [[TMP3:%.*]] = load float, float* [[TMP2]], align 4 -; CHECK-NEXT: [[TMP4:%.*]] = insertelement <4 x float> poison, float [[TMP3]], i32 0 +; CHECK-NEXT: [[TMP4:%.*]] = insertelement <4 x float> poison, float [[TMP3]], i64 0 ; CHECK-NEXT: [[TMP5:%.*]] = getelementptr inbounds float, float* [[B:%.*]], i64 [[INDEX]] ; CHECK-NEXT: [[TMP6:%.*]] = load float, float* [[TMP5]], align 4 -; CHECK-NEXT: [[TMP7:%.*]] = insertelement <4 x float> poison, float [[TMP6]], i32 0 +; CHECK-NEXT: [[TMP7:%.*]] = insertelement <4 x float> poison, float [[TMP6]], i64 0 ; CHECK-NEXT: br label [[PRED_LOAD_CONTINUE]] ; CHECK: pred.load.continue: ; CHECK-NEXT: [[TMP8:%.*]] = phi <4 x float> [ poison, [[VECTOR_BODY]] ], [ [[TMP4]], [[PRED_LOAD_IF]] ] ; CHECK-NEXT: [[TMP9:%.*]] = phi <4 x float> [ poison, [[VECTOR_BODY]] ], [ [[TMP7]], [[PRED_LOAD_IF]] ] -; CHECK-NEXT: [[TMP10:%.*]] = extractelement <4 x i1> [[TMP0]], i32 1 +; CHECK-NEXT: [[TMP10:%.*]] = extractelement <4 x i1> [[TMP0]], i64 1 ; CHECK-NEXT: br i1 [[TMP10]], label [[PRED_LOAD_IF1:%.*]], label [[PRED_LOAD_CONTINUE2:%.*]] ; CHECK: pred.load.if1: ; CHECK-NEXT: [[TMP11:%.*]] = or i64 [[INDEX]], 1 ; CHECK-NEXT: [[TMP12:%.*]] = getelementptr inbounds float, float* [[A]], i64 [[TMP11]] ; CHECK-NEXT: [[TMP13:%.*]] = load float, float* [[TMP12]], align 4 -; CHECK-NEXT: [[TMP14:%.*]] = insertelement <4 x float> [[TMP8]], float [[TMP13]], i32 1 +; CHECK-NEXT: [[TMP14:%.*]] = insertelement <4 x float> [[TMP8]], float [[TMP13]], i64 1 ; CHECK-NEXT: [[TMP15:%.*]] = getelementptr inbounds float, float* [[B]], i64 [[TMP11]] ; CHECK-NEXT: [[TMP16:%.*]] = load float, float* [[TMP15]], align 4 -; CHECK-NEXT: [[TMP17:%.*]] = insertelement <4 x float> [[TMP9]], float [[TMP16]], i32 1 +; CHECK-NEXT: [[TMP17:%.*]] = insertelement <4 x float> [[TMP9]], float [[TMP16]], i64 1 ; CHECK-NEXT: br label [[PRED_LOAD_CONTINUE2]] ; CHECK: pred.load.continue2: ; CHECK-NEXT: [[TMP18:%.*]] = phi <4 x float> [ [[TMP8]], [[PRED_LOAD_CONTINUE]] ], [ [[TMP14]], [[PRED_LOAD_IF1]] ] ; CHECK-NEXT: [[TMP19:%.*]] = phi <4 x float> [ [[TMP9]], [[PRED_LOAD_CONTINUE]] ], [ [[TMP17]], [[PRED_LOAD_IF1]] ] -; CHECK-NEXT: [[TMP20:%.*]] = extractelement <4 x i1> [[TMP0]], i32 2 +; CHECK-NEXT: [[TMP20:%.*]] = extractelement <4 x i1> [[TMP0]], i64 2 ; CHECK-NEXT: br i1 [[TMP20]], label [[PRED_LOAD_IF3:%.*]], label [[PRED_LOAD_CONTINUE4:%.*]] ; CHECK: pred.load.if3: ; CHECK-NEXT: [[TMP21:%.*]] = or i64 [[INDEX]], 2 ; CHECK-NEXT: [[TMP22:%.*]] = getelementptr inbounds float, float* [[A]], i64 [[TMP21]] ; CHECK-NEXT: [[TMP23:%.*]] = load float, float* [[TMP22]], align 4 -; CHECK-NEXT: [[TMP24:%.*]] = insertelement <4 x float> [[TMP18]], float [[TMP23]], i32 2 +; CHECK-NEXT: [[TMP24:%.*]] = insertelement <4 x float> [[TMP18]], float [[TMP23]], i64 2 ; CHECK-NEXT: [[TMP25:%.*]] = getelementptr inbounds float, float* [[B]], i64 [[TMP21]] ; CHECK-NEXT: [[TMP26:%.*]] = load float, float* [[TMP25]], align 4 -; CHECK-NEXT: [[TMP27:%.*]] = insertelement <4 x float> [[TMP19]], float [[TMP26]], i32 2 +; CHECK-NEXT: [[TMP27:%.*]] = insertelement <4 x float> [[TMP19]], float [[TMP26]], i64 2 ; CHECK-NEXT: br label [[PRED_LOAD_CONTINUE4]] ; CHECK: pred.load.continue4: ; CHECK-NEXT: [[TMP28:%.*]] = phi <4 x float> [ [[TMP18]], [[PRED_LOAD_CONTINUE2]] ], [ [[TMP24]], [[PRED_LOAD_IF3]] ] ; CHECK-NEXT: [[TMP29:%.*]] = phi <4 x float> [ [[TMP19]], [[PRED_LOAD_CONTINUE2]] ], [ [[TMP27]], [[PRED_LOAD_IF3]] ] -; CHECK-NEXT: [[TMP30:%.*]] = extractelement <4 x i1> [[TMP0]], i32 3 +; CHECK-NEXT: [[TMP30:%.*]] = extractelement <4 x i1> [[TMP0]], i64 3 ; CHECK-NEXT: br i1 [[TMP30]], label [[PRED_LOAD_IF5:%.*]], label [[PRED_LOAD_CONTINUE6]] ; CHECK: pred.load.if5: ; CHECK-NEXT: [[TMP31:%.*]] = or i64 [[INDEX]], 3 ; CHECK-NEXT: [[TMP32:%.*]] = getelementptr inbounds float, float* [[A]], i64 [[TMP31]] ; CHECK-NEXT: [[TMP33:%.*]] = load float, float* [[TMP32]], align 4 -; CHECK-NEXT: [[TMP34:%.*]] = insertelement <4 x float> [[TMP28]], float [[TMP33]], i32 3 +; CHECK-NEXT: [[TMP34:%.*]] = insertelement <4 x float> [[TMP28]], float [[TMP33]], i64 3 ; CHECK-NEXT: [[TMP35:%.*]] = getelementptr inbounds float, float* [[B]], i64 [[TMP31]] ; CHECK-NEXT: [[TMP36:%.*]] = load float, float* [[TMP35]], align 4 -; CHECK-NEXT: [[TMP37:%.*]] = insertelement <4 x float> [[TMP29]], float [[TMP36]], i32 3 +; CHECK-NEXT: [[TMP37:%.*]] = insertelement <4 x float> [[TMP29]], float [[TMP36]], i64 3 ; CHECK-NEXT: br label [[PRED_LOAD_CONTINUE6]] ; CHECK: pred.load.continue6: ; CHECK-NEXT: [[TMP38:%.*]] = phi <4 x float> [ [[TMP28]], [[PRED_LOAD_CONTINUE4]] ], [ [[TMP34]], [[PRED_LOAD_IF5]] ] @@ -1067,57 +1067,57 @@ ; CHECK-NEXT: [[VEC_IND:%.*]] = phi <4 x i64> [ , [[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], [[PRED_LOAD_CONTINUE6]] ] ; CHECK-NEXT: [[VEC_PHI:%.*]] = phi float [ 0.000000e+00, [[VECTOR_PH]] ], [ [[TMP45:%.*]], [[PRED_LOAD_CONTINUE6]] ] ; CHECK-NEXT: [[TMP0:%.*]] = icmp ult <4 x i64> [[VEC_IND]], -; CHECK-NEXT: [[TMP1:%.*]] = extractelement <4 x i1> [[TMP0]], i32 0 +; CHECK-NEXT: [[TMP1:%.*]] = extractelement <4 x i1> [[TMP0]], i64 0 ; CHECK-NEXT: br i1 [[TMP1]], label [[PRED_LOAD_IF:%.*]], label [[PRED_LOAD_CONTINUE:%.*]] ; CHECK: pred.load.if: ; CHECK-NEXT: [[TMP2:%.*]] = getelementptr inbounds float, float* [[A:%.*]], i64 [[INDEX]] ; CHECK-NEXT: [[TMP3:%.*]] = load float, float* [[TMP2]], align 4 -; CHECK-NEXT: [[TMP4:%.*]] = insertelement <4 x float> poison, float [[TMP3]], i32 0 +; CHECK-NEXT: [[TMP4:%.*]] = insertelement <4 x float> poison, float [[TMP3]], i64 0 ; CHECK-NEXT: [[TMP5:%.*]] = getelementptr inbounds float, float* [[B:%.*]], i64 [[INDEX]] ; CHECK-NEXT: [[TMP6:%.*]] = load float, float* [[TMP5]], align 4 -; CHECK-NEXT: [[TMP7:%.*]] = insertelement <4 x float> poison, float [[TMP6]], i32 0 +; CHECK-NEXT: [[TMP7:%.*]] = insertelement <4 x float> poison, float [[TMP6]], i64 0 ; CHECK-NEXT: br label [[PRED_LOAD_CONTINUE]] ; CHECK: pred.load.continue: ; CHECK-NEXT: [[TMP8:%.*]] = phi <4 x float> [ poison, [[VECTOR_BODY]] ], [ [[TMP4]], [[PRED_LOAD_IF]] ] ; CHECK-NEXT: [[TMP9:%.*]] = phi <4 x float> [ poison, [[VECTOR_BODY]] ], [ [[TMP7]], [[PRED_LOAD_IF]] ] -; CHECK-NEXT: [[TMP10:%.*]] = extractelement <4 x i1> [[TMP0]], i32 1 +; CHECK-NEXT: [[TMP10:%.*]] = extractelement <4 x i1> [[TMP0]], i64 1 ; CHECK-NEXT: br i1 [[TMP10]], label [[PRED_LOAD_IF1:%.*]], label [[PRED_LOAD_CONTINUE2:%.*]] ; CHECK: pred.load.if1: ; CHECK-NEXT: [[TMP11:%.*]] = or i64 [[INDEX]], 1 ; CHECK-NEXT: [[TMP12:%.*]] = getelementptr inbounds float, float* [[A]], i64 [[TMP11]] ; CHECK-NEXT: [[TMP13:%.*]] = load float, float* [[TMP12]], align 4 -; CHECK-NEXT: [[TMP14:%.*]] = insertelement <4 x float> [[TMP8]], float [[TMP13]], i32 1 +; CHECK-NEXT: [[TMP14:%.*]] = insertelement <4 x float> [[TMP8]], float [[TMP13]], i64 1 ; CHECK-NEXT: [[TMP15:%.*]] = getelementptr inbounds float, float* [[B]], i64 [[TMP11]] ; CHECK-NEXT: [[TMP16:%.*]] = load float, float* [[TMP15]], align 4 -; CHECK-NEXT: [[TMP17:%.*]] = insertelement <4 x float> [[TMP9]], float [[TMP16]], i32 1 +; CHECK-NEXT: [[TMP17:%.*]] = insertelement <4 x float> [[TMP9]], float [[TMP16]], i64 1 ; CHECK-NEXT: br label [[PRED_LOAD_CONTINUE2]] ; CHECK: pred.load.continue2: ; CHECK-NEXT: [[TMP18:%.*]] = phi <4 x float> [ [[TMP8]], [[PRED_LOAD_CONTINUE]] ], [ [[TMP14]], [[PRED_LOAD_IF1]] ] ; CHECK-NEXT: [[TMP19:%.*]] = phi <4 x float> [ [[TMP9]], [[PRED_LOAD_CONTINUE]] ], [ [[TMP17]], [[PRED_LOAD_IF1]] ] -; CHECK-NEXT: [[TMP20:%.*]] = extractelement <4 x i1> [[TMP0]], i32 2 +; CHECK-NEXT: [[TMP20:%.*]] = extractelement <4 x i1> [[TMP0]], i64 2 ; CHECK-NEXT: br i1 [[TMP20]], label [[PRED_LOAD_IF3:%.*]], label [[PRED_LOAD_CONTINUE4:%.*]] ; CHECK: pred.load.if3: ; CHECK-NEXT: [[TMP21:%.*]] = or i64 [[INDEX]], 2 ; CHECK-NEXT: [[TMP22:%.*]] = getelementptr inbounds float, float* [[A]], i64 [[TMP21]] ; CHECK-NEXT: [[TMP23:%.*]] = load float, float* [[TMP22]], align 4 -; CHECK-NEXT: [[TMP24:%.*]] = insertelement <4 x float> [[TMP18]], float [[TMP23]], i32 2 +; CHECK-NEXT: [[TMP24:%.*]] = insertelement <4 x float> [[TMP18]], float [[TMP23]], i64 2 ; CHECK-NEXT: [[TMP25:%.*]] = getelementptr inbounds float, float* [[B]], i64 [[TMP21]] ; CHECK-NEXT: [[TMP26:%.*]] = load float, float* [[TMP25]], align 4 -; CHECK-NEXT: [[TMP27:%.*]] = insertelement <4 x float> [[TMP19]], float [[TMP26]], i32 2 +; CHECK-NEXT: [[TMP27:%.*]] = insertelement <4 x float> [[TMP19]], float [[TMP26]], i64 2 ; CHECK-NEXT: br label [[PRED_LOAD_CONTINUE4]] ; CHECK: pred.load.continue4: ; CHECK-NEXT: [[TMP28:%.*]] = phi <4 x float> [ [[TMP18]], [[PRED_LOAD_CONTINUE2]] ], [ [[TMP24]], [[PRED_LOAD_IF3]] ] ; CHECK-NEXT: [[TMP29:%.*]] = phi <4 x float> [ [[TMP19]], [[PRED_LOAD_CONTINUE2]] ], [ [[TMP27]], [[PRED_LOAD_IF3]] ] -; CHECK-NEXT: [[TMP30:%.*]] = extractelement <4 x i1> [[TMP0]], i32 3 +; CHECK-NEXT: [[TMP30:%.*]] = extractelement <4 x i1> [[TMP0]], i64 3 ; CHECK-NEXT: br i1 [[TMP30]], label [[PRED_LOAD_IF5:%.*]], label [[PRED_LOAD_CONTINUE6]] ; CHECK: pred.load.if5: ; CHECK-NEXT: [[TMP31:%.*]] = or i64 [[INDEX]], 3 ; CHECK-NEXT: [[TMP32:%.*]] = getelementptr inbounds float, float* [[A]], i64 [[TMP31]] ; CHECK-NEXT: [[TMP33:%.*]] = load float, float* [[TMP32]], align 4 -; CHECK-NEXT: [[TMP34:%.*]] = insertelement <4 x float> [[TMP28]], float [[TMP33]], i32 3 +; CHECK-NEXT: [[TMP34:%.*]] = insertelement <4 x float> [[TMP28]], float [[TMP33]], i64 3 ; CHECK-NEXT: [[TMP35:%.*]] = getelementptr inbounds float, float* [[B]], i64 [[TMP31]] ; CHECK-NEXT: [[TMP36:%.*]] = load float, float* [[TMP35]], align 4 -; CHECK-NEXT: [[TMP37:%.*]] = insertelement <4 x float> [[TMP29]], float [[TMP36]], i32 3 +; CHECK-NEXT: [[TMP37:%.*]] = insertelement <4 x float> [[TMP29]], float [[TMP36]], i64 3 ; CHECK-NEXT: br label [[PRED_LOAD_CONTINUE6]] ; CHECK: pred.load.continue6: ; CHECK-NEXT: [[TMP38:%.*]] = phi <4 x float> [ [[TMP28]], [[PRED_LOAD_CONTINUE4]] ], [ [[TMP34]], [[PRED_LOAD_IF5]] ] @@ -1175,42 +1175,42 @@ ; CHECK-NEXT: [[VEC_IND:%.*]] = phi <4 x i64> [ , [[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], [[PRED_LOAD_CONTINUE6]] ] ; CHECK-NEXT: [[VEC_PHI:%.*]] = phi i32 [ 1000, [[VECTOR_PH]] ], [ [[RDX_MINMAX_SELECT:%.*]], [[PRED_LOAD_CONTINUE6]] ] ; CHECK-NEXT: [[TMP0:%.*]] = icmp ult <4 x i64> [[VEC_IND]], -; CHECK-NEXT: [[TMP1:%.*]] = extractelement <4 x i1> [[TMP0]], i32 0 +; CHECK-NEXT: [[TMP1:%.*]] = extractelement <4 x i1> [[TMP0]], i64 0 ; CHECK-NEXT: br i1 [[TMP1]], label [[PRED_LOAD_IF:%.*]], label [[PRED_LOAD_CONTINUE:%.*]] ; CHECK: pred.load.if: ; CHECK-NEXT: [[TMP2:%.*]] = getelementptr inbounds i32, i32* [[A:%.*]], i64 [[INDEX]] ; CHECK-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 -; CHECK-NEXT: [[TMP4:%.*]] = insertelement <4 x i32> poison, i32 [[TMP3]], i32 0 +; CHECK-NEXT: [[TMP4:%.*]] = insertelement <4 x i32> poison, i32 [[TMP3]], i64 0 ; CHECK-NEXT: br label [[PRED_LOAD_CONTINUE]] ; CHECK: pred.load.continue: ; CHECK-NEXT: [[TMP5:%.*]] = phi <4 x i32> [ poison, [[VECTOR_BODY]] ], [ [[TMP4]], [[PRED_LOAD_IF]] ] -; CHECK-NEXT: [[TMP6:%.*]] = extractelement <4 x i1> [[TMP0]], i32 1 +; CHECK-NEXT: [[TMP6:%.*]] = extractelement <4 x i1> [[TMP0]], i64 1 ; CHECK-NEXT: br i1 [[TMP6]], label [[PRED_LOAD_IF1:%.*]], label [[PRED_LOAD_CONTINUE2:%.*]] ; CHECK: pred.load.if1: ; CHECK-NEXT: [[TMP7:%.*]] = or i64 [[INDEX]], 1 ; CHECK-NEXT: [[TMP8:%.*]] = getelementptr inbounds i32, i32* [[A]], i64 [[TMP7]] ; CHECK-NEXT: [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4 -; CHECK-NEXT: [[TMP10:%.*]] = insertelement <4 x i32> [[TMP5]], i32 [[TMP9]], i32 1 +; CHECK-NEXT: [[TMP10:%.*]] = insertelement <4 x i32> [[TMP5]], i32 [[TMP9]], i64 1 ; CHECK-NEXT: br label [[PRED_LOAD_CONTINUE2]] ; CHECK: pred.load.continue2: ; CHECK-NEXT: [[TMP11:%.*]] = phi <4 x i32> [ [[TMP5]], [[PRED_LOAD_CONTINUE]] ], [ [[TMP10]], [[PRED_LOAD_IF1]] ] -; CHECK-NEXT: [[TMP12:%.*]] = extractelement <4 x i1> [[TMP0]], i32 2 +; CHECK-NEXT: [[TMP12:%.*]] = extractelement <4 x i1> [[TMP0]], i64 2 ; CHECK-NEXT: br i1 [[TMP12]], label [[PRED_LOAD_IF3:%.*]], label [[PRED_LOAD_CONTINUE4:%.*]] ; CHECK: pred.load.if3: ; CHECK-NEXT: [[TMP13:%.*]] = or i64 [[INDEX]], 2 ; CHECK-NEXT: [[TMP14:%.*]] = getelementptr inbounds i32, i32* [[A]], i64 [[TMP13]] ; CHECK-NEXT: [[TMP15:%.*]] = load i32, i32* [[TMP14]], align 4 -; CHECK-NEXT: [[TMP16:%.*]] = insertelement <4 x i32> [[TMP11]], i32 [[TMP15]], i32 2 +; CHECK-NEXT: [[TMP16:%.*]] = insertelement <4 x i32> [[TMP11]], i32 [[TMP15]], i64 2 ; CHECK-NEXT: br label [[PRED_LOAD_CONTINUE4]] ; CHECK: pred.load.continue4: ; CHECK-NEXT: [[TMP17:%.*]] = phi <4 x i32> [ [[TMP11]], [[PRED_LOAD_CONTINUE2]] ], [ [[TMP16]], [[PRED_LOAD_IF3]] ] -; CHECK-NEXT: [[TMP18:%.*]] = extractelement <4 x i1> [[TMP0]], i32 3 +; CHECK-NEXT: [[TMP18:%.*]] = extractelement <4 x i1> [[TMP0]], i64 3 ; CHECK-NEXT: br i1 [[TMP18]], label [[PRED_LOAD_IF5:%.*]], label [[PRED_LOAD_CONTINUE6]] ; CHECK: pred.load.if5: ; CHECK-NEXT: [[TMP19:%.*]] = or i64 [[INDEX]], 3 ; CHECK-NEXT: [[TMP20:%.*]] = getelementptr inbounds i32, i32* [[A]], i64 [[TMP19]] ; CHECK-NEXT: [[TMP21:%.*]] = load i32, i32* [[TMP20]], align 4 -; CHECK-NEXT: [[TMP22:%.*]] = insertelement <4 x i32> [[TMP17]], i32 [[TMP21]], i32 3 +; CHECK-NEXT: [[TMP22:%.*]] = insertelement <4 x i32> [[TMP17]], i32 [[TMP21]], i64 3 ; CHECK-NEXT: br label [[PRED_LOAD_CONTINUE6]] ; CHECK: pred.load.continue6: ; CHECK-NEXT: [[TMP23:%.*]] = phi <4 x i32> [ [[TMP17]], [[PRED_LOAD_CONTINUE4]] ], [ [[TMP22]], [[PRED_LOAD_IF5]] ] @@ -1263,42 +1263,42 @@ ; CHECK-NEXT: [[VEC_IND:%.*]] = phi <4 x i64> [ , [[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], [[PRED_LOAD_CONTINUE6]] ] ; CHECK-NEXT: [[VEC_PHI:%.*]] = phi i32 [ 1000, [[VECTOR_PH]] ], [ [[RDX_MINMAX_SELECT:%.*]], [[PRED_LOAD_CONTINUE6]] ] ; CHECK-NEXT: [[TMP0:%.*]] = icmp ult <4 x i64> [[VEC_IND]], -; CHECK-NEXT: [[TMP1:%.*]] = extractelement <4 x i1> [[TMP0]], i32 0 +; CHECK-NEXT: [[TMP1:%.*]] = extractelement <4 x i1> [[TMP0]], i64 0 ; CHECK-NEXT: br i1 [[TMP1]], label [[PRED_LOAD_IF:%.*]], label [[PRED_LOAD_CONTINUE:%.*]] ; CHECK: pred.load.if: ; CHECK-NEXT: [[TMP2:%.*]] = getelementptr inbounds i32, i32* [[A:%.*]], i64 [[INDEX]] ; CHECK-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 -; CHECK-NEXT: [[TMP4:%.*]] = insertelement <4 x i32> poison, i32 [[TMP3]], i32 0 +; CHECK-NEXT: [[TMP4:%.*]] = insertelement <4 x i32> poison, i32 [[TMP3]], i64 0 ; CHECK-NEXT: br label [[PRED_LOAD_CONTINUE]] ; CHECK: pred.load.continue: ; CHECK-NEXT: [[TMP5:%.*]] = phi <4 x i32> [ poison, [[VECTOR_BODY]] ], [ [[TMP4]], [[PRED_LOAD_IF]] ] -; CHECK-NEXT: [[TMP6:%.*]] = extractelement <4 x i1> [[TMP0]], i32 1 +; CHECK-NEXT: [[TMP6:%.*]] = extractelement <4 x i1> [[TMP0]], i64 1 ; CHECK-NEXT: br i1 [[TMP6]], label [[PRED_LOAD_IF1:%.*]], label [[PRED_LOAD_CONTINUE2:%.*]] ; CHECK: pred.load.if1: ; CHECK-NEXT: [[TMP7:%.*]] = or i64 [[INDEX]], 1 ; CHECK-NEXT: [[TMP8:%.*]] = getelementptr inbounds i32, i32* [[A]], i64 [[TMP7]] ; CHECK-NEXT: [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4 -; CHECK-NEXT: [[TMP10:%.*]] = insertelement <4 x i32> [[TMP5]], i32 [[TMP9]], i32 1 +; CHECK-NEXT: [[TMP10:%.*]] = insertelement <4 x i32> [[TMP5]], i32 [[TMP9]], i64 1 ; CHECK-NEXT: br label [[PRED_LOAD_CONTINUE2]] ; CHECK: pred.load.continue2: ; CHECK-NEXT: [[TMP11:%.*]] = phi <4 x i32> [ [[TMP5]], [[PRED_LOAD_CONTINUE]] ], [ [[TMP10]], [[PRED_LOAD_IF1]] ] -; CHECK-NEXT: [[TMP12:%.*]] = extractelement <4 x i1> [[TMP0]], i32 2 +; CHECK-NEXT: [[TMP12:%.*]] = extractelement <4 x i1> [[TMP0]], i64 2 ; CHECK-NEXT: br i1 [[TMP12]], label [[PRED_LOAD_IF3:%.*]], label [[PRED_LOAD_CONTINUE4:%.*]] ; CHECK: pred.load.if3: ; CHECK-NEXT: [[TMP13:%.*]] = or i64 [[INDEX]], 2 ; CHECK-NEXT: [[TMP14:%.*]] = getelementptr inbounds i32, i32* [[A]], i64 [[TMP13]] ; CHECK-NEXT: [[TMP15:%.*]] = load i32, i32* [[TMP14]], align 4 -; CHECK-NEXT: [[TMP16:%.*]] = insertelement <4 x i32> [[TMP11]], i32 [[TMP15]], i32 2 +; CHECK-NEXT: [[TMP16:%.*]] = insertelement <4 x i32> [[TMP11]], i32 [[TMP15]], i64 2 ; CHECK-NEXT: br label [[PRED_LOAD_CONTINUE4]] ; CHECK: pred.load.continue4: ; CHECK-NEXT: [[TMP17:%.*]] = phi <4 x i32> [ [[TMP11]], [[PRED_LOAD_CONTINUE2]] ], [ [[TMP16]], [[PRED_LOAD_IF3]] ] -; CHECK-NEXT: [[TMP18:%.*]] = extractelement <4 x i1> [[TMP0]], i32 3 +; CHECK-NEXT: [[TMP18:%.*]] = extractelement <4 x i1> [[TMP0]], i64 3 ; CHECK-NEXT: br i1 [[TMP18]], label [[PRED_LOAD_IF5:%.*]], label [[PRED_LOAD_CONTINUE6]] ; CHECK: pred.load.if5: ; CHECK-NEXT: [[TMP19:%.*]] = or i64 [[INDEX]], 3 ; CHECK-NEXT: [[TMP20:%.*]] = getelementptr inbounds i32, i32* [[A]], i64 [[TMP19]] ; CHECK-NEXT: [[TMP21:%.*]] = load i32, i32* [[TMP20]], align 4 -; CHECK-NEXT: [[TMP22:%.*]] = insertelement <4 x i32> [[TMP17]], i32 [[TMP21]], i32 3 +; CHECK-NEXT: [[TMP22:%.*]] = insertelement <4 x i32> [[TMP17]], i32 [[TMP21]], i64 3 ; CHECK-NEXT: br label [[PRED_LOAD_CONTINUE6]] ; CHECK: pred.load.continue6: ; CHECK-NEXT: [[TMP23:%.*]] = phi <4 x i32> [ [[TMP17]], [[PRED_LOAD_CONTINUE4]] ], [ [[TMP22]], [[PRED_LOAD_IF5]] ] @@ -1346,7 +1346,7 @@ ; CHECK-NEXT: entry: ; CHECK-NEXT: br i1 false, label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]] ; CHECK: vector.ph: -; CHECK-NEXT: [[TMP0:%.*]] = insertelement <4 x float> , float [[S:%.*]], i32 0 +; CHECK-NEXT: [[TMP0:%.*]] = insertelement <4 x float> , float [[S:%.*]], i64 0 ; CHECK-NEXT: br label [[VECTOR_BODY:%.*]] ; CHECK: vector.body: ; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ] @@ -1446,46 +1446,46 @@ ; CHECK-NEXT: [[VEC_PHI:%.*]] = phi <4 x i32> [ , [[VECTOR_PH]] ], [ [[TMP30:%.*]], [[PRED_LOAD_CONTINUE6]] ] ; CHECK-NEXT: [[TMP0:%.*]] = icmp ult <4 x i32> [[VEC_IND]], ; CHECK-NEXT: [[TMP1:%.*]] = and <4 x i32> [[VEC_PHI]], -; CHECK-NEXT: [[TMP2:%.*]] = extractelement <4 x i1> [[TMP0]], i32 0 +; CHECK-NEXT: [[TMP2:%.*]] = extractelement <4 x i1> [[TMP0]], i64 0 ; CHECK-NEXT: br i1 [[TMP2]], label [[PRED_LOAD_IF:%.*]], label [[PRED_LOAD_CONTINUE:%.*]] ; CHECK: pred.load.if: ; CHECK-NEXT: [[TMP3:%.*]] = sext i32 [[INDEX]] to i64 ; CHECK-NEXT: [[TMP4:%.*]] = getelementptr inbounds i8, i8* [[A:%.*]], i64 [[TMP3]] ; CHECK-NEXT: [[TMP5:%.*]] = load i8, i8* [[TMP4]], align 4 -; CHECK-NEXT: [[TMP6:%.*]] = insertelement <4 x i8> poison, i8 [[TMP5]], i32 0 +; CHECK-NEXT: [[TMP6:%.*]] = insertelement <4 x i8> poison, i8 [[TMP5]], i64 0 ; CHECK-NEXT: br label [[PRED_LOAD_CONTINUE]] ; CHECK: pred.load.continue: ; CHECK-NEXT: [[TMP7:%.*]] = phi <4 x i8> [ poison, [[VECTOR_BODY]] ], [ [[TMP6]], [[PRED_LOAD_IF]] ] -; CHECK-NEXT: [[TMP8:%.*]] = extractelement <4 x i1> [[TMP0]], i32 1 +; CHECK-NEXT: [[TMP8:%.*]] = extractelement <4 x i1> [[TMP0]], i64 1 ; CHECK-NEXT: br i1 [[TMP8]], label [[PRED_LOAD_IF1:%.*]], label [[PRED_LOAD_CONTINUE2:%.*]] ; CHECK: pred.load.if1: ; CHECK-NEXT: [[TMP9:%.*]] = or i32 [[INDEX]], 1 ; CHECK-NEXT: [[TMP10:%.*]] = sext i32 [[TMP9]] to i64 ; CHECK-NEXT: [[TMP11:%.*]] = getelementptr inbounds i8, i8* [[A]], i64 [[TMP10]] ; CHECK-NEXT: [[TMP12:%.*]] = load i8, i8* [[TMP11]], align 4 -; CHECK-NEXT: [[TMP13:%.*]] = insertelement <4 x i8> [[TMP7]], i8 [[TMP12]], i32 1 +; CHECK-NEXT: [[TMP13:%.*]] = insertelement <4 x i8> [[TMP7]], i8 [[TMP12]], i64 1 ; CHECK-NEXT: br label [[PRED_LOAD_CONTINUE2]] ; CHECK: pred.load.continue2: ; CHECK-NEXT: [[TMP14:%.*]] = phi <4 x i8> [ [[TMP7]], [[PRED_LOAD_CONTINUE]] ], [ [[TMP13]], [[PRED_LOAD_IF1]] ] -; CHECK-NEXT: [[TMP15:%.*]] = extractelement <4 x i1> [[TMP0]], i32 2 +; CHECK-NEXT: [[TMP15:%.*]] = extractelement <4 x i1> [[TMP0]], i64 2 ; CHECK-NEXT: br i1 [[TMP15]], label [[PRED_LOAD_IF3:%.*]], label [[PRED_LOAD_CONTINUE4:%.*]] ; CHECK: pred.load.if3: ; CHECK-NEXT: [[TMP16:%.*]] = or i32 [[INDEX]], 2 ; CHECK-NEXT: [[TMP17:%.*]] = sext i32 [[TMP16]] to i64 ; CHECK-NEXT: [[TMP18:%.*]] = getelementptr inbounds i8, i8* [[A]], i64 [[TMP17]] ; CHECK-NEXT: [[TMP19:%.*]] = load i8, i8* [[TMP18]], align 4 -; CHECK-NEXT: [[TMP20:%.*]] = insertelement <4 x i8> [[TMP14]], i8 [[TMP19]], i32 2 +; CHECK-NEXT: [[TMP20:%.*]] = insertelement <4 x i8> [[TMP14]], i8 [[TMP19]], i64 2 ; CHECK-NEXT: br label [[PRED_LOAD_CONTINUE4]] ; CHECK: pred.load.continue4: ; CHECK-NEXT: [[TMP21:%.*]] = phi <4 x i8> [ [[TMP14]], [[PRED_LOAD_CONTINUE2]] ], [ [[TMP20]], [[PRED_LOAD_IF3]] ] -; CHECK-NEXT: [[TMP22:%.*]] = extractelement <4 x i1> [[TMP0]], i32 3 +; CHECK-NEXT: [[TMP22:%.*]] = extractelement <4 x i1> [[TMP0]], i64 3 ; CHECK-NEXT: br i1 [[TMP22]], label [[PRED_LOAD_IF5:%.*]], label [[PRED_LOAD_CONTINUE6]] ; CHECK: pred.load.if5: ; CHECK-NEXT: [[TMP23:%.*]] = or i32 [[INDEX]], 3 ; CHECK-NEXT: [[TMP24:%.*]] = sext i32 [[TMP23]] to i64 ; CHECK-NEXT: [[TMP25:%.*]] = getelementptr inbounds i8, i8* [[A]], i64 [[TMP24]] ; CHECK-NEXT: [[TMP26:%.*]] = load i8, i8* [[TMP25]], align 4 -; CHECK-NEXT: [[TMP27:%.*]] = insertelement <4 x i8> [[TMP21]], i8 [[TMP26]], i32 3 +; CHECK-NEXT: [[TMP27:%.*]] = insertelement <4 x i8> [[TMP21]], i8 [[TMP26]], i64 3 ; CHECK-NEXT: br label [[PRED_LOAD_CONTINUE6]] ; CHECK: pred.load.continue6: ; CHECK-NEXT: [[TMP28:%.*]] = phi <4 x i8> [ [[TMP21]], [[PRED_LOAD_CONTINUE4]] ], [ [[TMP27]], [[PRED_LOAD_IF5]] ] @@ -1541,46 +1541,46 @@ ; CHECK-NEXT: [[VEC_IND:%.*]] = phi <4 x i32> [ , [[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], [[PRED_LOAD_CONTINUE6]] ] ; CHECK-NEXT: [[VEC_PHI:%.*]] = phi <4 x i32> [ , [[VECTOR_PH]] ], [ [[TMP29:%.*]], [[PRED_LOAD_CONTINUE6]] ] ; CHECK-NEXT: [[TMP0:%.*]] = icmp ult <4 x i32> [[VEC_IND]], -; CHECK-NEXT: [[TMP1:%.*]] = extractelement <4 x i1> [[TMP0]], i32 0 +; CHECK-NEXT: [[TMP1:%.*]] = extractelement <4 x i1> [[TMP0]], i64 0 ; CHECK-NEXT: br i1 [[TMP1]], label [[PRED_LOAD_IF:%.*]], label [[PRED_LOAD_CONTINUE:%.*]] ; CHECK: pred.load.if: ; CHECK-NEXT: [[TMP2:%.*]] = sext i32 [[INDEX]] to i64 ; CHECK-NEXT: [[TMP3:%.*]] = getelementptr inbounds i8, i8* [[A:%.*]], i64 [[TMP2]] ; CHECK-NEXT: [[TMP4:%.*]] = load i8, i8* [[TMP3]], align 4 -; CHECK-NEXT: [[TMP5:%.*]] = insertelement <4 x i8> poison, i8 [[TMP4]], i32 0 +; CHECK-NEXT: [[TMP5:%.*]] = insertelement <4 x i8> poison, i8 [[TMP4]], i64 0 ; CHECK-NEXT: br label [[PRED_LOAD_CONTINUE]] ; CHECK: pred.load.continue: ; CHECK-NEXT: [[TMP6:%.*]] = phi <4 x i8> [ poison, [[VECTOR_BODY]] ], [ [[TMP5]], [[PRED_LOAD_IF]] ] -; CHECK-NEXT: [[TMP7:%.*]] = extractelement <4 x i1> [[TMP0]], i32 1 +; CHECK-NEXT: [[TMP7:%.*]] = extractelement <4 x i1> [[TMP0]], i64 1 ; CHECK-NEXT: br i1 [[TMP7]], label [[PRED_LOAD_IF1:%.*]], label [[PRED_LOAD_CONTINUE2:%.*]] ; CHECK: pred.load.if1: ; CHECK-NEXT: [[TMP8:%.*]] = or i32 [[INDEX]], 1 ; CHECK-NEXT: [[TMP9:%.*]] = sext i32 [[TMP8]] to i64 ; CHECK-NEXT: [[TMP10:%.*]] = getelementptr inbounds i8, i8* [[A]], i64 [[TMP9]] ; CHECK-NEXT: [[TMP11:%.*]] = load i8, i8* [[TMP10]], align 4 -; CHECK-NEXT: [[TMP12:%.*]] = insertelement <4 x i8> [[TMP6]], i8 [[TMP11]], i32 1 +; CHECK-NEXT: [[TMP12:%.*]] = insertelement <4 x i8> [[TMP6]], i8 [[TMP11]], i64 1 ; CHECK-NEXT: br label [[PRED_LOAD_CONTINUE2]] ; CHECK: pred.load.continue2: ; CHECK-NEXT: [[TMP13:%.*]] = phi <4 x i8> [ [[TMP6]], [[PRED_LOAD_CONTINUE]] ], [ [[TMP12]], [[PRED_LOAD_IF1]] ] -; CHECK-NEXT: [[TMP14:%.*]] = extractelement <4 x i1> [[TMP0]], i32 2 +; CHECK-NEXT: [[TMP14:%.*]] = extractelement <4 x i1> [[TMP0]], i64 2 ; CHECK-NEXT: br i1 [[TMP14]], label [[PRED_LOAD_IF3:%.*]], label [[PRED_LOAD_CONTINUE4:%.*]] ; CHECK: pred.load.if3: ; CHECK-NEXT: [[TMP15:%.*]] = or i32 [[INDEX]], 2 ; CHECK-NEXT: [[TMP16:%.*]] = sext i32 [[TMP15]] to i64 ; CHECK-NEXT: [[TMP17:%.*]] = getelementptr inbounds i8, i8* [[A]], i64 [[TMP16]] ; CHECK-NEXT: [[TMP18:%.*]] = load i8, i8* [[TMP17]], align 4 -; CHECK-NEXT: [[TMP19:%.*]] = insertelement <4 x i8> [[TMP13]], i8 [[TMP18]], i32 2 +; CHECK-NEXT: [[TMP19:%.*]] = insertelement <4 x i8> [[TMP13]], i8 [[TMP18]], i64 2 ; CHECK-NEXT: br label [[PRED_LOAD_CONTINUE4]] ; CHECK: pred.load.continue4: ; CHECK-NEXT: [[TMP20:%.*]] = phi <4 x i8> [ [[TMP13]], [[PRED_LOAD_CONTINUE2]] ], [ [[TMP19]], [[PRED_LOAD_IF3]] ] -; CHECK-NEXT: [[TMP21:%.*]] = extractelement <4 x i1> [[TMP0]], i32 3 +; CHECK-NEXT: [[TMP21:%.*]] = extractelement <4 x i1> [[TMP0]], i64 3 ; CHECK-NEXT: br i1 [[TMP21]], label [[PRED_LOAD_IF5:%.*]], label [[PRED_LOAD_CONTINUE6]] ; CHECK: pred.load.if5: ; CHECK-NEXT: [[TMP22:%.*]] = or i32 [[INDEX]], 3 ; CHECK-NEXT: [[TMP23:%.*]] = sext i32 [[TMP22]] to i64 ; CHECK-NEXT: [[TMP24:%.*]] = getelementptr inbounds i8, i8* [[A]], i64 [[TMP23]] ; CHECK-NEXT: [[TMP25:%.*]] = load i8, i8* [[TMP24]], align 4 -; CHECK-NEXT: [[TMP26:%.*]] = insertelement <4 x i8> [[TMP20]], i8 [[TMP25]], i32 3 +; CHECK-NEXT: [[TMP26:%.*]] = insertelement <4 x i8> [[TMP20]], i8 [[TMP25]], i64 3 ; CHECK-NEXT: br label [[PRED_LOAD_CONTINUE6]] ; CHECK: pred.load.continue6: ; CHECK-NEXT: [[TMP27:%.*]] = phi <4 x i8> [ [[TMP20]], [[PRED_LOAD_CONTINUE4]] ], [ [[TMP26]], [[PRED_LOAD_IF5]] ] diff --git a/llvm/test/Transforms/LoopVectorize/reduction-inloop-uf4.ll b/llvm/test/Transforms/LoopVectorize/reduction-inloop-uf4.ll --- a/llvm/test/Transforms/LoopVectorize/reduction-inloop-uf4.ll +++ b/llvm/test/Transforms/LoopVectorize/reduction-inloop-uf4.ll @@ -37,7 +37,7 @@ ; CHECK-NEXT: [[TMP15]] = add i32 [[TMP14]], [[VEC_PHI3]] ; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 16 ; CHECK-NEXT: [[TMP16:%.*]] = icmp eq i64 [[INDEX_NEXT]], 256 -; CHECK-NEXT: br i1 [[TMP16]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], [[LOOP0:!llvm.loop !.*]] +; CHECK-NEXT: br i1 [[TMP16]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP0:![0-9]+]] ; CHECK: middle.block: ; CHECK-NEXT: [[BIN_RDX:%.*]] = add i32 [[TMP11]], [[TMP9]] ; CHECK-NEXT: [[BIN_RDX7:%.*]] = add i32 [[TMP13]], [[BIN_RDX]] @@ -46,7 +46,7 @@ ; CHECK: scalar.ph: ; CHECK-NEXT: br label [[DOTLR_PH:%.*]] ; CHECK: .lr.ph: -; CHECK-NEXT: br i1 undef, label [[DOT_CRIT_EDGE]], label [[DOTLR_PH]], [[LOOP2:!llvm.loop !.*]] +; CHECK-NEXT: br i1 undef, label [[DOT_CRIT_EDGE]], label [[DOTLR_PH]], !llvm.loop [[LOOP2:![0-9]+]] ; CHECK: ._crit_edge: ; CHECK-NEXT: [[SUM_0_LCSSA:%.*]] = phi i32 [ undef, [[DOTLR_PH]] ], [ [[BIN_RDX8]], [[MIDDLE_BLOCK]] ] ; CHECK-NEXT: ret i32 [[SUM_0_LCSSA]] @@ -90,162 +90,162 @@ ; CHECK-NEXT: [[TMP1:%.*]] = icmp ult <4 x i64> [[STEP_ADD]], ; CHECK-NEXT: [[TMP2:%.*]] = icmp ult <4 x i64> [[STEP_ADD1]], ; CHECK-NEXT: [[TMP3:%.*]] = icmp ult <4 x i64> [[STEP_ADD2]], -; CHECK-NEXT: [[TMP4:%.*]] = extractelement <4 x i1> [[TMP0]], i32 0 +; CHECK-NEXT: [[TMP4:%.*]] = extractelement <4 x i1> [[TMP0]], i64 0 ; CHECK-NEXT: br i1 [[TMP4]], label [[PRED_LOAD_IF:%.*]], label [[PRED_LOAD_CONTINUE:%.*]] ; CHECK: pred.load.if: ; CHECK-NEXT: [[TMP5:%.*]] = getelementptr inbounds i32, i32* [[A:%.*]], i64 [[INDEX]] ; CHECK-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4 -; CHECK-NEXT: [[TMP7:%.*]] = insertelement <4 x i32> poison, i32 [[TMP6]], i32 0 +; CHECK-NEXT: [[TMP7:%.*]] = insertelement <4 x i32> poison, i32 [[TMP6]], i64 0 ; CHECK-NEXT: br label [[PRED_LOAD_CONTINUE]] ; CHECK: pred.load.continue: ; CHECK-NEXT: [[TMP8:%.*]] = phi <4 x i32> [ poison, [[VECTOR_BODY]] ], [ [[TMP7]], [[PRED_LOAD_IF]] ] -; CHECK-NEXT: [[TMP9:%.*]] = extractelement <4 x i1> [[TMP0]], i32 1 +; CHECK-NEXT: [[TMP9:%.*]] = extractelement <4 x i1> [[TMP0]], i64 1 ; CHECK-NEXT: br i1 [[TMP9]], label [[PRED_LOAD_IF7:%.*]], label [[PRED_LOAD_CONTINUE8:%.*]] ; CHECK: pred.load.if7: ; CHECK-NEXT: [[TMP10:%.*]] = or i64 [[INDEX]], 1 ; CHECK-NEXT: [[TMP11:%.*]] = getelementptr inbounds i32, i32* [[A]], i64 [[TMP10]] ; CHECK-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4 -; CHECK-NEXT: [[TMP13:%.*]] = insertelement <4 x i32> [[TMP8]], i32 [[TMP12]], i32 1 +; CHECK-NEXT: [[TMP13:%.*]] = insertelement <4 x i32> [[TMP8]], i32 [[TMP12]], i64 1 ; CHECK-NEXT: br label [[PRED_LOAD_CONTINUE8]] ; CHECK: pred.load.continue8: ; CHECK-NEXT: [[TMP14:%.*]] = phi <4 x i32> [ [[TMP8]], [[PRED_LOAD_CONTINUE]] ], [ [[TMP13]], [[PRED_LOAD_IF7]] ] -; CHECK-NEXT: [[TMP15:%.*]] = extractelement <4 x i1> [[TMP0]], i32 2 +; CHECK-NEXT: [[TMP15:%.*]] = extractelement <4 x i1> [[TMP0]], i64 2 ; CHECK-NEXT: br i1 [[TMP15]], label [[PRED_LOAD_IF9:%.*]], label [[PRED_LOAD_CONTINUE10:%.*]] ; CHECK: pred.load.if9: ; CHECK-NEXT: [[TMP16:%.*]] = or i64 [[INDEX]], 2 ; CHECK-NEXT: [[TMP17:%.*]] = getelementptr inbounds i32, i32* [[A]], i64 [[TMP16]] ; CHECK-NEXT: [[TMP18:%.*]] = load i32, i32* [[TMP17]], align 4 -; CHECK-NEXT: [[TMP19:%.*]] = insertelement <4 x i32> [[TMP14]], i32 [[TMP18]], i32 2 +; CHECK-NEXT: [[TMP19:%.*]] = insertelement <4 x i32> [[TMP14]], i32 [[TMP18]], i64 2 ; CHECK-NEXT: br label [[PRED_LOAD_CONTINUE10]] ; CHECK: pred.load.continue10: ; CHECK-NEXT: [[TMP20:%.*]] = phi <4 x i32> [ [[TMP14]], [[PRED_LOAD_CONTINUE8]] ], [ [[TMP19]], [[PRED_LOAD_IF9]] ] -; CHECK-NEXT: [[TMP21:%.*]] = extractelement <4 x i1> [[TMP0]], i32 3 +; CHECK-NEXT: [[TMP21:%.*]] = extractelement <4 x i1> [[TMP0]], i64 3 ; CHECK-NEXT: br i1 [[TMP21]], label [[PRED_LOAD_IF11:%.*]], label [[PRED_LOAD_CONTINUE12:%.*]] ; CHECK: pred.load.if11: ; CHECK-NEXT: [[TMP22:%.*]] = or i64 [[INDEX]], 3 ; CHECK-NEXT: [[TMP23:%.*]] = getelementptr inbounds i32, i32* [[A]], i64 [[TMP22]] ; CHECK-NEXT: [[TMP24:%.*]] = load i32, i32* [[TMP23]], align 4 -; CHECK-NEXT: [[TMP25:%.*]] = insertelement <4 x i32> [[TMP20]], i32 [[TMP24]], i32 3 +; CHECK-NEXT: [[TMP25:%.*]] = insertelement <4 x i32> [[TMP20]], i32 [[TMP24]], i64 3 ; CHECK-NEXT: br label [[PRED_LOAD_CONTINUE12]] ; CHECK: pred.load.continue12: ; CHECK-NEXT: [[TMP26:%.*]] = phi <4 x i32> [ [[TMP20]], [[PRED_LOAD_CONTINUE10]] ], [ [[TMP25]], [[PRED_LOAD_IF11]] ] -; CHECK-NEXT: [[TMP27:%.*]] = extractelement <4 x i1> [[TMP1]], i32 0 +; CHECK-NEXT: [[TMP27:%.*]] = extractelement <4 x i1> [[TMP1]], i64 0 ; CHECK-NEXT: br i1 [[TMP27]], label [[PRED_LOAD_IF13:%.*]], label [[PRED_LOAD_CONTINUE14:%.*]] ; CHECK: pred.load.if13: ; CHECK-NEXT: [[TMP28:%.*]] = or i64 [[INDEX]], 4 ; CHECK-NEXT: [[TMP29:%.*]] = getelementptr inbounds i32, i32* [[A]], i64 [[TMP28]] ; CHECK-NEXT: [[TMP30:%.*]] = load i32, i32* [[TMP29]], align 4 -; CHECK-NEXT: [[TMP31:%.*]] = insertelement <4 x i32> poison, i32 [[TMP30]], i32 0 +; CHECK-NEXT: [[TMP31:%.*]] = insertelement <4 x i32> poison, i32 [[TMP30]], i64 0 ; CHECK-NEXT: br label [[PRED_LOAD_CONTINUE14]] ; CHECK: pred.load.continue14: ; CHECK-NEXT: [[TMP32:%.*]] = phi <4 x i32> [ poison, [[PRED_LOAD_CONTINUE12]] ], [ [[TMP31]], [[PRED_LOAD_IF13]] ] -; CHECK-NEXT: [[TMP33:%.*]] = extractelement <4 x i1> [[TMP1]], i32 1 +; CHECK-NEXT: [[TMP33:%.*]] = extractelement <4 x i1> [[TMP1]], i64 1 ; CHECK-NEXT: br i1 [[TMP33]], label [[PRED_LOAD_IF15:%.*]], label [[PRED_LOAD_CONTINUE16:%.*]] ; CHECK: pred.load.if15: ; CHECK-NEXT: [[TMP34:%.*]] = or i64 [[INDEX]], 5 ; CHECK-NEXT: [[TMP35:%.*]] = getelementptr inbounds i32, i32* [[A]], i64 [[TMP34]] ; CHECK-NEXT: [[TMP36:%.*]] = load i32, i32* [[TMP35]], align 4 -; CHECK-NEXT: [[TMP37:%.*]] = insertelement <4 x i32> [[TMP32]], i32 [[TMP36]], i32 1 +; CHECK-NEXT: [[TMP37:%.*]] = insertelement <4 x i32> [[TMP32]], i32 [[TMP36]], i64 1 ; CHECK-NEXT: br label [[PRED_LOAD_CONTINUE16]] ; CHECK: pred.load.continue16: ; CHECK-NEXT: [[TMP38:%.*]] = phi <4 x i32> [ [[TMP32]], [[PRED_LOAD_CONTINUE14]] ], [ [[TMP37]], [[PRED_LOAD_IF15]] ] -; CHECK-NEXT: [[TMP39:%.*]] = extractelement <4 x i1> [[TMP1]], i32 2 +; CHECK-NEXT: [[TMP39:%.*]] = extractelement <4 x i1> [[TMP1]], i64 2 ; CHECK-NEXT: br i1 [[TMP39]], label [[PRED_LOAD_IF17:%.*]], label [[PRED_LOAD_CONTINUE18:%.*]] ; CHECK: pred.load.if17: ; CHECK-NEXT: [[TMP40:%.*]] = or i64 [[INDEX]], 6 ; CHECK-NEXT: [[TMP41:%.*]] = getelementptr inbounds i32, i32* [[A]], i64 [[TMP40]] ; CHECK-NEXT: [[TMP42:%.*]] = load i32, i32* [[TMP41]], align 4 -; CHECK-NEXT: [[TMP43:%.*]] = insertelement <4 x i32> [[TMP38]], i32 [[TMP42]], i32 2 +; CHECK-NEXT: [[TMP43:%.*]] = insertelement <4 x i32> [[TMP38]], i32 [[TMP42]], i64 2 ; CHECK-NEXT: br label [[PRED_LOAD_CONTINUE18]] ; CHECK: pred.load.continue18: ; CHECK-NEXT: [[TMP44:%.*]] = phi <4 x i32> [ [[TMP38]], [[PRED_LOAD_CONTINUE16]] ], [ [[TMP43]], [[PRED_LOAD_IF17]] ] -; CHECK-NEXT: [[TMP45:%.*]] = extractelement <4 x i1> [[TMP1]], i32 3 +; CHECK-NEXT: [[TMP45:%.*]] = extractelement <4 x i1> [[TMP1]], i64 3 ; CHECK-NEXT: br i1 [[TMP45]], label [[PRED_LOAD_IF19:%.*]], label [[PRED_LOAD_CONTINUE20:%.*]] ; CHECK: pred.load.if19: ; CHECK-NEXT: [[TMP46:%.*]] = or i64 [[INDEX]], 7 ; CHECK-NEXT: [[TMP47:%.*]] = getelementptr inbounds i32, i32* [[A]], i64 [[TMP46]] ; CHECK-NEXT: [[TMP48:%.*]] = load i32, i32* [[TMP47]], align 4 -; CHECK-NEXT: [[TMP49:%.*]] = insertelement <4 x i32> [[TMP44]], i32 [[TMP48]], i32 3 +; CHECK-NEXT: [[TMP49:%.*]] = insertelement <4 x i32> [[TMP44]], i32 [[TMP48]], i64 3 ; CHECK-NEXT: br label [[PRED_LOAD_CONTINUE20]] ; CHECK: pred.load.continue20: ; CHECK-NEXT: [[TMP50:%.*]] = phi <4 x i32> [ [[TMP44]], [[PRED_LOAD_CONTINUE18]] ], [ [[TMP49]], [[PRED_LOAD_IF19]] ] -; CHECK-NEXT: [[TMP51:%.*]] = extractelement <4 x i1> [[TMP2]], i32 0 +; CHECK-NEXT: [[TMP51:%.*]] = extractelement <4 x i1> [[TMP2]], i64 0 ; CHECK-NEXT: br i1 [[TMP51]], label [[PRED_LOAD_IF21:%.*]], label [[PRED_LOAD_CONTINUE22:%.*]] ; CHECK: pred.load.if21: ; CHECK-NEXT: [[TMP52:%.*]] = or i64 [[INDEX]], 8 ; CHECK-NEXT: [[TMP53:%.*]] = getelementptr inbounds i32, i32* [[A]], i64 [[TMP52]] ; CHECK-NEXT: [[TMP54:%.*]] = load i32, i32* [[TMP53]], align 4 -; CHECK-NEXT: [[TMP55:%.*]] = insertelement <4 x i32> poison, i32 [[TMP54]], i32 0 +; CHECK-NEXT: [[TMP55:%.*]] = insertelement <4 x i32> poison, i32 [[TMP54]], i64 0 ; CHECK-NEXT: br label [[PRED_LOAD_CONTINUE22]] ; CHECK: pred.load.continue22: ; CHECK-NEXT: [[TMP56:%.*]] = phi <4 x i32> [ poison, [[PRED_LOAD_CONTINUE20]] ], [ [[TMP55]], [[PRED_LOAD_IF21]] ] -; CHECK-NEXT: [[TMP57:%.*]] = extractelement <4 x i1> [[TMP2]], i32 1 +; CHECK-NEXT: [[TMP57:%.*]] = extractelement <4 x i1> [[TMP2]], i64 1 ; CHECK-NEXT: br i1 [[TMP57]], label [[PRED_LOAD_IF23:%.*]], label [[PRED_LOAD_CONTINUE24:%.*]] ; CHECK: pred.load.if23: ; CHECK-NEXT: [[TMP58:%.*]] = or i64 [[INDEX]], 9 ; CHECK-NEXT: [[TMP59:%.*]] = getelementptr inbounds i32, i32* [[A]], i64 [[TMP58]] ; CHECK-NEXT: [[TMP60:%.*]] = load i32, i32* [[TMP59]], align 4 -; CHECK-NEXT: [[TMP61:%.*]] = insertelement <4 x i32> [[TMP56]], i32 [[TMP60]], i32 1 +; CHECK-NEXT: [[TMP61:%.*]] = insertelement <4 x i32> [[TMP56]], i32 [[TMP60]], i64 1 ; CHECK-NEXT: br label [[PRED_LOAD_CONTINUE24]] ; CHECK: pred.load.continue24: ; CHECK-NEXT: [[TMP62:%.*]] = phi <4 x i32> [ [[TMP56]], [[PRED_LOAD_CONTINUE22]] ], [ [[TMP61]], [[PRED_LOAD_IF23]] ] -; CHECK-NEXT: [[TMP63:%.*]] = extractelement <4 x i1> [[TMP2]], i32 2 +; CHECK-NEXT: [[TMP63:%.*]] = extractelement <4 x i1> [[TMP2]], i64 2 ; CHECK-NEXT: br i1 [[TMP63]], label [[PRED_LOAD_IF25:%.*]], label [[PRED_LOAD_CONTINUE26:%.*]] ; CHECK: pred.load.if25: ; CHECK-NEXT: [[TMP64:%.*]] = or i64 [[INDEX]], 10 ; CHECK-NEXT: [[TMP65:%.*]] = getelementptr inbounds i32, i32* [[A]], i64 [[TMP64]] ; CHECK-NEXT: [[TMP66:%.*]] = load i32, i32* [[TMP65]], align 4 -; CHECK-NEXT: [[TMP67:%.*]] = insertelement <4 x i32> [[TMP62]], i32 [[TMP66]], i32 2 +; CHECK-NEXT: [[TMP67:%.*]] = insertelement <4 x i32> [[TMP62]], i32 [[TMP66]], i64 2 ; CHECK-NEXT: br label [[PRED_LOAD_CONTINUE26]] ; CHECK: pred.load.continue26: ; CHECK-NEXT: [[TMP68:%.*]] = phi <4 x i32> [ [[TMP62]], [[PRED_LOAD_CONTINUE24]] ], [ [[TMP67]], [[PRED_LOAD_IF25]] ] -; CHECK-NEXT: [[TMP69:%.*]] = extractelement <4 x i1> [[TMP2]], i32 3 +; CHECK-NEXT: [[TMP69:%.*]] = extractelement <4 x i1> [[TMP2]], i64 3 ; CHECK-NEXT: br i1 [[TMP69]], label [[PRED_LOAD_IF27:%.*]], label [[PRED_LOAD_CONTINUE28:%.*]] ; CHECK: pred.load.if27: ; CHECK-NEXT: [[TMP70:%.*]] = or i64 [[INDEX]], 11 ; CHECK-NEXT: [[TMP71:%.*]] = getelementptr inbounds i32, i32* [[A]], i64 [[TMP70]] ; CHECK-NEXT: [[TMP72:%.*]] = load i32, i32* [[TMP71]], align 4 -; CHECK-NEXT: [[TMP73:%.*]] = insertelement <4 x i32> [[TMP68]], i32 [[TMP72]], i32 3 +; CHECK-NEXT: [[TMP73:%.*]] = insertelement <4 x i32> [[TMP68]], i32 [[TMP72]], i64 3 ; CHECK-NEXT: br label [[PRED_LOAD_CONTINUE28]] ; CHECK: pred.load.continue28: ; CHECK-NEXT: [[TMP74:%.*]] = phi <4 x i32> [ [[TMP68]], [[PRED_LOAD_CONTINUE26]] ], [ [[TMP73]], [[PRED_LOAD_IF27]] ] -; CHECK-NEXT: [[TMP75:%.*]] = extractelement <4 x i1> [[TMP3]], i32 0 +; CHECK-NEXT: [[TMP75:%.*]] = extractelement <4 x i1> [[TMP3]], i64 0 ; CHECK-NEXT: br i1 [[TMP75]], label [[PRED_LOAD_IF29:%.*]], label [[PRED_LOAD_CONTINUE30:%.*]] ; CHECK: pred.load.if29: ; CHECK-NEXT: [[TMP76:%.*]] = or i64 [[INDEX]], 12 ; CHECK-NEXT: [[TMP77:%.*]] = getelementptr inbounds i32, i32* [[A]], i64 [[TMP76]] ; CHECK-NEXT: [[TMP78:%.*]] = load i32, i32* [[TMP77]], align 4 -; CHECK-NEXT: [[TMP79:%.*]] = insertelement <4 x i32> poison, i32 [[TMP78]], i32 0 +; CHECK-NEXT: [[TMP79:%.*]] = insertelement <4 x i32> poison, i32 [[TMP78]], i64 0 ; CHECK-NEXT: br label [[PRED_LOAD_CONTINUE30]] ; CHECK: pred.load.continue30: ; CHECK-NEXT: [[TMP80:%.*]] = phi <4 x i32> [ poison, [[PRED_LOAD_CONTINUE28]] ], [ [[TMP79]], [[PRED_LOAD_IF29]] ] -; CHECK-NEXT: [[TMP81:%.*]] = extractelement <4 x i1> [[TMP3]], i32 1 +; CHECK-NEXT: [[TMP81:%.*]] = extractelement <4 x i1> [[TMP3]], i64 1 ; CHECK-NEXT: br i1 [[TMP81]], label [[PRED_LOAD_IF31:%.*]], label [[PRED_LOAD_CONTINUE32:%.*]] ; CHECK: pred.load.if31: ; CHECK-NEXT: [[TMP82:%.*]] = or i64 [[INDEX]], 13 ; CHECK-NEXT: [[TMP83:%.*]] = getelementptr inbounds i32, i32* [[A]], i64 [[TMP82]] ; CHECK-NEXT: [[TMP84:%.*]] = load i32, i32* [[TMP83]], align 4 -; CHECK-NEXT: [[TMP85:%.*]] = insertelement <4 x i32> [[TMP80]], i32 [[TMP84]], i32 1 +; CHECK-NEXT: [[TMP85:%.*]] = insertelement <4 x i32> [[TMP80]], i32 [[TMP84]], i64 1 ; CHECK-NEXT: br label [[PRED_LOAD_CONTINUE32]] ; CHECK: pred.load.continue32: ; CHECK-NEXT: [[TMP86:%.*]] = phi <4 x i32> [ [[TMP80]], [[PRED_LOAD_CONTINUE30]] ], [ [[TMP85]], [[PRED_LOAD_IF31]] ] -; CHECK-NEXT: [[TMP87:%.*]] = extractelement <4 x i1> [[TMP3]], i32 2 +; CHECK-NEXT: [[TMP87:%.*]] = extractelement <4 x i1> [[TMP3]], i64 2 ; CHECK-NEXT: br i1 [[TMP87]], label [[PRED_LOAD_IF33:%.*]], label [[PRED_LOAD_CONTINUE34:%.*]] ; CHECK: pred.load.if33: ; CHECK-NEXT: [[TMP88:%.*]] = or i64 [[INDEX]], 14 ; CHECK-NEXT: [[TMP89:%.*]] = getelementptr inbounds i32, i32* [[A]], i64 [[TMP88]] ; CHECK-NEXT: [[TMP90:%.*]] = load i32, i32* [[TMP89]], align 4 -; CHECK-NEXT: [[TMP91:%.*]] = insertelement <4 x i32> [[TMP86]], i32 [[TMP90]], i32 2 +; CHECK-NEXT: [[TMP91:%.*]] = insertelement <4 x i32> [[TMP86]], i32 [[TMP90]], i64 2 ; CHECK-NEXT: br label [[PRED_LOAD_CONTINUE34]] ; CHECK: pred.load.continue34: ; CHECK-NEXT: [[TMP92:%.*]] = phi <4 x i32> [ [[TMP86]], [[PRED_LOAD_CONTINUE32]] ], [ [[TMP91]], [[PRED_LOAD_IF33]] ] -; CHECK-NEXT: [[TMP93:%.*]] = extractelement <4 x i1> [[TMP3]], i32 3 +; CHECK-NEXT: [[TMP93:%.*]] = extractelement <4 x i1> [[TMP3]], i64 3 ; CHECK-NEXT: br i1 [[TMP93]], label [[PRED_LOAD_IF35:%.*]], label [[PRED_LOAD_CONTINUE36]] ; CHECK: pred.load.if35: ; CHECK-NEXT: [[TMP94:%.*]] = or i64 [[INDEX]], 15 ; CHECK-NEXT: [[TMP95:%.*]] = getelementptr inbounds i32, i32* [[A]], i64 [[TMP94]] ; CHECK-NEXT: [[TMP96:%.*]] = load i32, i32* [[TMP95]], align 4 -; CHECK-NEXT: [[TMP97:%.*]] = insertelement <4 x i32> [[TMP92]], i32 [[TMP96]], i32 3 +; CHECK-NEXT: [[TMP97:%.*]] = insertelement <4 x i32> [[TMP92]], i32 [[TMP96]], i64 3 ; CHECK-NEXT: br label [[PRED_LOAD_CONTINUE36]] ; CHECK: pred.load.continue36: ; CHECK-NEXT: [[TMP98:%.*]] = phi <4 x i32> [ [[TMP92]], [[PRED_LOAD_CONTINUE34]] ], [ [[TMP97]], [[PRED_LOAD_IF35]] ] @@ -264,7 +264,7 @@ ; CHECK-NEXT: [[INDEX_NEXT]] = add i64 [[INDEX]], 16 ; CHECK-NEXT: [[VEC_IND_NEXT]] = add <4 x i64> [[VEC_IND]], ; CHECK-NEXT: [[TMP111:%.*]] = icmp eq i64 [[INDEX_NEXT]], 272 -; CHECK-NEXT: br i1 [[TMP111]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], [[LOOP4:!llvm.loop !.*]] +; CHECK-NEXT: br i1 [[TMP111]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP4:![0-9]+]] ; CHECK: middle.block: ; CHECK-NEXT: [[BIN_RDX:%.*]] = add i32 [[TMP104]], [[TMP101]] ; CHECK-NEXT: [[BIN_RDX37:%.*]] = add i32 [[TMP107]], [[BIN_RDX]] @@ -273,7 +273,7 @@ ; CHECK: scalar.ph: ; CHECK-NEXT: br label [[DOTLR_PH:%.*]] ; CHECK: .lr.ph: -; CHECK-NEXT: br i1 undef, label [[DOT_CRIT_EDGE]], label [[DOTLR_PH]], [[LOOP5:!llvm.loop !.*]] +; CHECK-NEXT: br i1 undef, label [[DOT_CRIT_EDGE]], label [[DOTLR_PH]], !llvm.loop [[LOOP5:![0-9]+]] ; CHECK: ._crit_edge: ; CHECK-NEXT: [[SUM_0_LCSSA:%.*]] = phi i32 [ undef, [[DOTLR_PH]] ], [ [[BIN_RDX38]], [[MIDDLE_BLOCK]] ] ; CHECK-NEXT: ret i32 [[SUM_0_LCSSA]] diff --git a/llvm/test/Transforms/LoopVectorize/reduction-inloop.ll b/llvm/test/Transforms/LoopVectorize/reduction-inloop.ll --- a/llvm/test/Transforms/LoopVectorize/reduction-inloop.ll +++ b/llvm/test/Transforms/LoopVectorize/reduction-inloop.ll @@ -798,7 +798,7 @@ ; CHECK-NEXT: entry: ; CHECK-NEXT: br i1 false, label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]] ; CHECK: vector.ph: -; CHECK-NEXT: [[TMP0:%.*]] = insertelement <4 x float> , float [[S:%.*]], i32 0 +; CHECK-NEXT: [[TMP0:%.*]] = insertelement <4 x float> , float [[S:%.*]], i64 0 ; CHECK-NEXT: br label [[VECTOR_BODY:%.*]] ; CHECK: vector.body: ; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ] @@ -1136,6 +1136,7 @@ ; CHECK: for.end: ; CHECK-NEXT: [[MULADD_LCSSA:%.*]] = phi float [ [[MULADD]], [[FOR_BODY]] ], [ [[TMP6]], [[MIDDLE_BLOCK]] ] ; CHECK-NEXT: ret float [[MULADD_LCSSA]] +; entry: br label %for.body diff --git a/llvm/test/Transforms/LoopVectorize/scalable-inductions.ll b/llvm/test/Transforms/LoopVectorize/scalable-inductions.ll --- a/llvm/test/Transforms/LoopVectorize/scalable-inductions.ll +++ b/llvm/test/Transforms/LoopVectorize/scalable-inductions.ll @@ -23,12 +23,12 @@ ; CHECK: vector.body: ; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ] ; CHECK-NEXT: [[TMP4:%.*]] = call @llvm.experimental.stepvector.nxv2i64() -; CHECK-NEXT: [[DOTSPLATINSERT2:%.*]] = insertelement poison, i64 [[INDEX]], i32 0 +; CHECK-NEXT: [[DOTSPLATINSERT2:%.*]] = insertelement poison, i64 [[INDEX]], i64 0 ; CHECK-NEXT: [[DOTSPLAT3:%.*]] = shufflevector [[DOTSPLATINSERT2]], poison, zeroinitializer ; CHECK-NEXT: [[TMP5:%.*]] = add [[DOTSPLAT3]], [[TMP4]] ; CHECK-NEXT: [[TMP6:%.*]] = call i64 @llvm.vscale.i64() ; CHECK-NEXT: [[TMP7:%.*]] = shl i64 [[TMP6]], 1 -; CHECK-NEXT: [[DOTSPLATINSERT4:%.*]] = insertelement poison, i64 [[TMP7]], i32 0 +; CHECK-NEXT: [[DOTSPLATINSERT4:%.*]] = insertelement poison, i64 [[TMP7]], i64 0 ; CHECK-NEXT: [[DOTSPLAT5:%.*]] = shufflevector [[DOTSPLATINSERT4]], poison, zeroinitializer ; CHECK-NEXT: [[TMP8:%.*]] = add [[DOTSPLAT5]], [[TMP4]] ; CHECK-NEXT: [[TMP9:%.*]] = add [[DOTSPLAT3]], [[TMP8]] @@ -113,11 +113,11 @@ ; CHECK: vector.body: ; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ] ; CHECK-NEXT: [[TMP4:%.*]] = call @llvm.experimental.stepvector.nxv1i64() -; CHECK-NEXT: [[DOTSPLATINSERT2:%.*]] = insertelement poison, i64 [[INDEX]], i32 0 +; CHECK-NEXT: [[DOTSPLATINSERT2:%.*]] = insertelement poison, i64 [[INDEX]], i64 0 ; CHECK-NEXT: [[DOTSPLAT3:%.*]] = shufflevector [[DOTSPLATINSERT2]], poison, zeroinitializer ; CHECK-NEXT: [[TMP5:%.*]] = add [[DOTSPLAT3]], [[TMP4]] ; CHECK-NEXT: [[TMP6:%.*]] = call i64 @llvm.vscale.i64() -; CHECK-NEXT: [[DOTSPLATINSERT4:%.*]] = insertelement poison, i64 [[TMP6]], i32 0 +; CHECK-NEXT: [[DOTSPLATINSERT4:%.*]] = insertelement poison, i64 [[TMP6]], i64 0 ; CHECK-NEXT: [[DOTSPLAT5:%.*]] = shufflevector [[DOTSPLATINSERT4]], poison, zeroinitializer ; CHECK-NEXT: [[TMP7:%.*]] = add [[DOTSPLAT5]], [[TMP4]] ; CHECK-NEXT: [[TMP8:%.*]] = add [[DOTSPLAT3]], [[TMP7]] @@ -209,7 +209,7 @@ ; CHECK-NEXT: [[TMP5:%.*]] = shl [[TMP4]], shufflevector ( insertelement ( poison, i32 1, i32 0), poison, zeroinitializer) ; CHECK-NEXT: [[TMP6:%.*]] = call i32 @llvm.vscale.i32() ; CHECK-NEXT: [[TMP7:%.*]] = shl i32 [[TMP6]], 3 -; CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[TMP7]], i32 0 +; CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[TMP7]], i64 0 ; CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer ; CHECK-NEXT: br label [[VECTOR_BODY:%.*]] ; CHECK: vector.body: @@ -292,7 +292,7 @@ ; CHECK-NEXT: [[TMP9:%.*]] = shl i32 [[TMP8]], 2 ; CHECK-NEXT: [[TMP10:%.*]] = uitofp i32 [[TMP9]] to float ; CHECK-NEXT: [[TMP11:%.*]] = fmul float [[TMP10]], 2.000000e+00 -; CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[TMP11]], i32 0 +; CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[TMP11]], i64 0 ; CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer ; CHECK-NEXT: br label [[VECTOR_BODY:%.*]] ; CHECK: vector.body: diff --git a/llvm/test/Transforms/LoopVectorize/vector-geps.ll b/llvm/test/Transforms/LoopVectorize/vector-geps.ll --- a/llvm/test/Transforms/LoopVectorize/vector-geps.ll +++ b/llvm/test/Transforms/LoopVectorize/vector-geps.ll @@ -70,7 +70,7 @@ ; CHECK: vector.body: ; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ] ; CHECK-NEXT: [[TMP0:%.*]] = getelementptr inbounds i32, i32* [[B:%.*]], i64 1 -; CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <4 x i32*> poison, i32* [[TMP0]], i32 0 +; CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <4 x i32*> poison, i32* [[TMP0]], i64 0 ; CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector <4 x i32*> [[DOTSPLATINSERT]], <4 x i32*> poison, <4 x i32> zeroinitializer ; CHECK-NEXT: [[TMP1:%.*]] = getelementptr inbounds i32*, i32** [[A:%.*]], i64 [[INDEX]] ; CHECK-NEXT: [[TMP2:%.*]] = bitcast i32** [[TMP1]] to <4 x i32*>* diff --git a/llvm/test/Transforms/PhaseOrdering/AArch64/hoisting-sinking-required-for-vectorization.ll b/llvm/test/Transforms/PhaseOrdering/AArch64/hoisting-sinking-required-for-vectorization.ll --- a/llvm/test/Transforms/PhaseOrdering/AArch64/hoisting-sinking-required-for-vectorization.ll +++ b/llvm/test/Transforms/PhaseOrdering/AArch64/hoisting-sinking-required-for-vectorization.ll @@ -154,7 +154,7 @@ ; CHECK-NEXT: [[CONFLICT_RDX:%.*]] = or i1 [[FOUND_CONFLICT]], [[FOUND_CONFLICT13]] ; CHECK-NEXT: br i1 [[CONFLICT_RDX]], label [[LOOP_BODY:%.*]], label [[VECTOR_PH:%.*]] ; CHECK: vector.ph: -; CHECK-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <4 x float> poison, float [[X:%.*]], i32 0 +; CHECK-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <4 x float> poison, float [[X:%.*]], i64 0 ; CHECK-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector <4 x float> [[BROADCAST_SPLATINSERT]], <4 x float> poison, <4 x i32> zeroinitializer ; CHECK-NEXT: br label [[VECTOR_BODY:%.*]] ; CHECK: vector.body: diff --git a/llvm/test/Transforms/PhaseOrdering/AArch64/peel-multiple-unreachable-exits-for-vectorization.ll b/llvm/test/Transforms/PhaseOrdering/AArch64/peel-multiple-unreachable-exits-for-vectorization.ll --- a/llvm/test/Transforms/PhaseOrdering/AArch64/peel-multiple-unreachable-exits-for-vectorization.ll +++ b/llvm/test/Transforms/PhaseOrdering/AArch64/peel-multiple-unreachable-exits-for-vectorization.ll @@ -42,7 +42,7 @@ ; CHECK-NEXT: [[TMP3:%.*]] = select i1 [[TMP2]], i64 4, i64 [[N_MOD_VF]] ; CHECK-NEXT: [[N_VEC:%.*]] = sub i64 [[TMP1]], [[TMP3]] ; CHECK-NEXT: [[IND_END:%.*]] = add i64 [[N_VEC]], 1 -; CHECK-NEXT: [[TMP4:%.*]] = insertelement <2 x i64> , i64 [[SUM_NEXT_PEEL]], i32 0 +; CHECK-NEXT: [[TMP4:%.*]] = insertelement <2 x i64> , i64 [[SUM_NEXT_PEEL]], i64 0 ; CHECK-NEXT: br label [[VECTOR_BODY:%.*]] ; CHECK: vector.body: ; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ] @@ -167,7 +167,7 @@ ; CHECK-NEXT: [[TMP3:%.*]] = select i1 [[TMP2]], i64 4, i64 [[N_MOD_VF]] ; CHECK-NEXT: [[N_VEC:%.*]] = sub i64 [[TMP1]], [[TMP3]] ; CHECK-NEXT: [[IND_END:%.*]] = add i64 [[N_VEC]], 1 -; CHECK-NEXT: [[TMP4:%.*]] = insertelement <2 x i64> , i64 [[SUM_NEXT_PEEL]], i32 0 +; CHECK-NEXT: [[TMP4:%.*]] = insertelement <2 x i64> , i64 [[SUM_NEXT_PEEL]], i64 0 ; CHECK-NEXT: br label [[VECTOR_BODY:%.*]] ; CHECK: vector.body: ; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ] diff --git a/llvm/test/Transforms/PhaseOrdering/ARM/mve-floatreduce.ll b/llvm/test/Transforms/PhaseOrdering/ARM/mve-floatreduce.ll --- a/llvm/test/Transforms/PhaseOrdering/ARM/mve-floatreduce.ll +++ b/llvm/test/Transforms/PhaseOrdering/ARM/mve-floatreduce.ll @@ -14,8 +14,8 @@ ; CHECK-NEXT: [[TMP3:%.*]] = shufflevector <4 x i32> [[TMP2]], <4 x i32> poison, <4 x i32> ; CHECK-NEXT: [[TMP4:%.*]] = bitcast <4 x i32> [[TMP3]] to <8 x half> ; CHECK-NEXT: [[TMP5:%.*]] = fadd fast <8 x half> [[TMP1]], [[TMP4]] -; CHECK-NEXT: [[TMP6:%.*]] = extractelement <8 x half> [[TMP5]], i32 0 -; CHECK-NEXT: [[TMP7:%.*]] = extractelement <8 x half> [[TMP5]], i32 4 +; CHECK-NEXT: [[TMP6:%.*]] = extractelement <8 x half> [[TMP5]], i64 0 +; CHECK-NEXT: [[TMP7:%.*]] = extractelement <8 x half> [[TMP5]], i64 4 ; CHECK-NEXT: [[ADD:%.*]] = fadd fast half [[TMP6]], [[TMP7]] ; CHECK-NEXT: ret half [[ADD]] ; @@ -35,12 +35,12 @@ define arm_aapcs_vfpcc float @vecAddAcrossF32Mve(<4 x float> %in) { ; CHECK-LABEL: @vecAddAcrossF32Mve( ; CHECK-NEXT: entry: -; CHECK-NEXT: [[TMP0:%.*]] = extractelement <4 x float> [[IN:%.*]], i32 0 -; CHECK-NEXT: [[TMP1:%.*]] = extractelement <4 x float> [[IN]], i32 1 +; CHECK-NEXT: [[TMP0:%.*]] = extractelement <4 x float> [[IN:%.*]], i64 0 +; CHECK-NEXT: [[TMP1:%.*]] = extractelement <4 x float> [[IN]], i64 1 ; CHECK-NEXT: [[ADD:%.*]] = fadd fast float [[TMP0]], [[TMP1]] -; CHECK-NEXT: [[TMP2:%.*]] = extractelement <4 x float> [[IN]], i32 2 +; CHECK-NEXT: [[TMP2:%.*]] = extractelement <4 x float> [[IN]], i64 2 ; CHECK-NEXT: [[ADD1:%.*]] = fadd fast float [[ADD]], [[TMP2]] -; CHECK-NEXT: [[TMP3:%.*]] = extractelement <4 x float> [[IN]], i32 3 +; CHECK-NEXT: [[TMP3:%.*]] = extractelement <4 x float> [[IN]], i64 3 ; CHECK-NEXT: [[ADD2:%.*]] = fadd fast float [[ADD1]], [[TMP3]] ; CHECK-NEXT: ret float [[ADD2]] ; diff --git a/llvm/test/Transforms/PhaseOrdering/X86/vdiv-nounroll.ll b/llvm/test/Transforms/PhaseOrdering/X86/vdiv-nounroll.ll --- a/llvm/test/Transforms/PhaseOrdering/X86/vdiv-nounroll.ll +++ b/llvm/test/Transforms/PhaseOrdering/X86/vdiv-nounroll.ll @@ -17,7 +17,7 @@ define void @vdiv(float* %a, float %b) #0 { ; CHECK-LABEL: @vdiv( ; CHECK-NEXT: entry: -; CHECK-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <4 x float> poison, float [[B:%.*]], i32 0 +; CHECK-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <4 x float> poison, float [[B:%.*]], i64 0 ; CHECK-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector <4 x float> [[BROADCAST_SPLATINSERT]], <4 x float> poison, <4 x i32> zeroinitializer ; CHECK-NEXT: [[TMP0:%.*]] = fdiv fast <4 x float> , [[BROADCAST_SPLAT]] ; CHECK-NEXT: br label [[VECTOR_BODY:%.*]] diff --git a/llvm/test/Transforms/PhaseOrdering/X86/vdiv.ll b/llvm/test/Transforms/PhaseOrdering/X86/vdiv.ll --- a/llvm/test/Transforms/PhaseOrdering/X86/vdiv.ll +++ b/llvm/test/Transforms/PhaseOrdering/X86/vdiv.ll @@ -29,13 +29,13 @@ ; CHECK-NEXT: br i1 [[FOUND_CONFLICT]], label [[FOR_BODY_PREHEADER18]], label [[VECTOR_PH:%.*]] ; CHECK: vector.ph: ; CHECK-NEXT: [[N_VEC:%.*]] = and i64 [[WIDE_TRIP_COUNT]], 4294967280 -; CHECK-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <4 x double> poison, double [[A:%.*]], i32 0 +; CHECK-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <4 x double> poison, double [[A:%.*]], i64 0 ; CHECK-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector <4 x double> [[BROADCAST_SPLATINSERT]], <4 x double> poison, <4 x i32> zeroinitializer -; CHECK-NEXT: [[BROADCAST_SPLATINSERT12:%.*]] = insertelement <4 x double> poison, double [[A]], i32 0 +; CHECK-NEXT: [[BROADCAST_SPLATINSERT12:%.*]] = insertelement <4 x double> poison, double [[A]], i64 0 ; CHECK-NEXT: [[BROADCAST_SPLAT13:%.*]] = shufflevector <4 x double> [[BROADCAST_SPLATINSERT12]], <4 x double> poison, <4 x i32> zeroinitializer -; CHECK-NEXT: [[BROADCAST_SPLATINSERT14:%.*]] = insertelement <4 x double> poison, double [[A]], i32 0 +; CHECK-NEXT: [[BROADCAST_SPLATINSERT14:%.*]] = insertelement <4 x double> poison, double [[A]], i64 0 ; CHECK-NEXT: [[BROADCAST_SPLAT15:%.*]] = shufflevector <4 x double> [[BROADCAST_SPLATINSERT14]], <4 x double> poison, <4 x i32> zeroinitializer -; CHECK-NEXT: [[BROADCAST_SPLATINSERT16:%.*]] = insertelement <4 x double> poison, double [[A]], i32 0 +; CHECK-NEXT: [[BROADCAST_SPLATINSERT16:%.*]] = insertelement <4 x double> poison, double [[A]], i64 0 ; CHECK-NEXT: [[BROADCAST_SPLAT17:%.*]] = shufflevector <4 x double> [[BROADCAST_SPLATINSERT16]], <4 x double> poison, <4 x i32> zeroinitializer ; CHECK-NEXT: [[TMP0:%.*]] = fdiv fast <4 x double> , [[BROADCAST_SPLAT]] ; CHECK-NEXT: [[TMP1:%.*]] = fdiv fast <4 x double> , [[BROADCAST_SPLAT13]] diff --git a/llvm/test/Transforms/PhaseOrdering/X86/vector-reductions-logical.ll b/llvm/test/Transforms/PhaseOrdering/X86/vector-reductions-logical.ll --- a/llvm/test/Transforms/PhaseOrdering/X86/vector-reductions-logical.ll +++ b/llvm/test/Transforms/PhaseOrdering/X86/vector-reductions-logical.ll @@ -18,7 +18,7 @@ ; CHECK-NEXT: [[TMP5:%.*]] = icmp eq i4 [[TMP4]], 0 ; CHECK-NEXT: [[SHIFT:%.*]] = shufflevector <4 x float> [[T_FR]], <4 x float> poison, <4 x i32> ; CHECK-NEXT: [[TMP6:%.*]] = fadd <4 x float> [[SHIFT]], [[T_FR]] -; CHECK-NEXT: [[ADD:%.*]] = extractelement <4 x float> [[TMP6]], i32 0 +; CHECK-NEXT: [[ADD:%.*]] = extractelement <4 x float> [[TMP6]], i64 0 ; CHECK-NEXT: [[SPEC_SELECT:%.*]] = select i1 [[TMP5]], float 0.000000e+00, float [[ADD]] ; CHECK-NEXT: br label [[RETURN]] ; CHECK: return: @@ -90,10 +90,10 @@ define float @test_merge_anyof_v4sf(<4 x float> %t) { ; CHECK-LABEL: @test_merge_anyof_v4sf( ; CHECK-NEXT: entry: -; CHECK-NEXT: [[TMP0:%.*]] = extractelement <4 x float> [[T:%.*]], i32 3 -; CHECK-NEXT: [[TMP1:%.*]] = extractelement <4 x float> [[T]], i32 2 -; CHECK-NEXT: [[TMP2:%.*]] = extractelement <4 x float> [[T]], i32 1 -; CHECK-NEXT: [[TMP3:%.*]] = extractelement <4 x float> [[T]], i32 0 +; CHECK-NEXT: [[TMP0:%.*]] = extractelement <4 x float> [[T:%.*]], i64 3 +; CHECK-NEXT: [[TMP1:%.*]] = extractelement <4 x float> [[T]], i64 2 +; CHECK-NEXT: [[TMP2:%.*]] = extractelement <4 x float> [[T]], i64 1 +; CHECK-NEXT: [[TMP3:%.*]] = extractelement <4 x float> [[T]], i64 0 ; CHECK-NEXT: [[T_FR:%.*]] = freeze <4 x float> [[T]] ; CHECK-NEXT: [[TMP4:%.*]] = fcmp olt <4 x float> [[T_FR]], zeroinitializer ; CHECK-NEXT: [[TMP5:%.*]] = bitcast <4 x i1> [[TMP4]] to i4 @@ -186,7 +186,7 @@ ; CHECK-NEXT: [[TMP5:%.*]] = icmp eq i4 [[TMP4]], 0 ; CHECK-NEXT: [[SHIFT:%.*]] = shufflevector <4 x float> [[T_FR]], <4 x float> poison, <4 x i32> ; CHECK-NEXT: [[TMP6:%.*]] = fadd <4 x float> [[SHIFT]], [[T_FR]] -; CHECK-NEXT: [[ADD:%.*]] = extractelement <4 x float> [[TMP6]], i32 0 +; CHECK-NEXT: [[ADD:%.*]] = extractelement <4 x float> [[TMP6]], i64 0 ; CHECK-NEXT: [[SPEC_SELECT:%.*]] = select i1 [[TMP5]], float 0.000000e+00, float [[ADD]] ; CHECK-NEXT: br label [[RETURN]] ; CHECK: return: @@ -272,7 +272,7 @@ ; CHECK-NEXT: [[DOTNOT7:%.*]] = icmp eq i4 [[TMP3]], 0 ; CHECK-NEXT: [[SHIFT:%.*]] = shufflevector <4 x float> [[T_FR]], <4 x float> poison, <4 x i32> ; CHECK-NEXT: [[TMP4:%.*]] = fadd <4 x float> [[SHIFT]], [[T_FR]] -; CHECK-NEXT: [[ADD:%.*]] = extractelement <4 x float> [[TMP4]], i32 0 +; CHECK-NEXT: [[ADD:%.*]] = extractelement <4 x float> [[TMP4]], i64 0 ; CHECK-NEXT: [[SPEC_SELECT:%.*]] = select i1 [[DOTNOT7]], float [[ADD]], float 0.000000e+00 ; CHECK-NEXT: br label [[RETURN]] ; CHECK: return: @@ -357,7 +357,7 @@ ; CHECK-NEXT: [[OR_COND:%.*]] = or i1 [[TMP2]], [[TMP5]] ; CHECK-NEXT: [[SHIFT:%.*]] = shufflevector <4 x i32> [[T_FR]], <4 x i32> poison, <4 x i32> ; CHECK-NEXT: [[TMP6:%.*]] = add nsw <4 x i32> [[T_FR]], [[SHIFT]] -; CHECK-NEXT: [[ADD:%.*]] = extractelement <4 x i32> [[TMP6]], i32 0 +; CHECK-NEXT: [[ADD:%.*]] = extractelement <4 x i32> [[TMP6]], i64 0 ; CHECK-NEXT: [[CONV:%.*]] = sitofp i32 [[ADD]] to float ; CHECK-NEXT: [[RETVAL_0:%.*]] = select i1 [[OR_COND]], float 0.000000e+00, float [[CONV]] ; CHECK-NEXT: ret float [[RETVAL_0]] @@ -425,17 +425,17 @@ ; CHECK-NEXT: [[TMP1:%.*]] = bitcast <4 x i1> [[TMP0]] to i4 ; CHECK-NEXT: [[TMP2:%.*]] = icmp ne i4 [[TMP1]], 0 ; CHECK-NEXT: [[TMP3:%.*]] = icmp sgt <4 x i32> [[T_FR]], -; CHECK-NEXT: [[TMP4:%.*]] = extractelement <4 x i1> [[TMP3]], i32 0 +; CHECK-NEXT: [[TMP4:%.*]] = extractelement <4 x i1> [[TMP3]], i64 0 ; CHECK-NEXT: [[OR_COND3:%.*]] = or i1 [[TMP2]], [[TMP4]] -; CHECK-NEXT: [[TMP5:%.*]] = extractelement <4 x i1> [[TMP3]], i32 1 +; CHECK-NEXT: [[TMP5:%.*]] = extractelement <4 x i1> [[TMP3]], i64 1 ; CHECK-NEXT: [[OR_COND4:%.*]] = or i1 [[OR_COND3]], [[TMP5]] -; CHECK-NEXT: [[TMP6:%.*]] = extractelement <4 x i1> [[TMP3]], i32 2 +; CHECK-NEXT: [[TMP6:%.*]] = extractelement <4 x i1> [[TMP3]], i64 2 ; CHECK-NEXT: [[OR_COND5:%.*]] = or i1 [[OR_COND4]], [[TMP6]] -; CHECK-NEXT: [[TMP7:%.*]] = extractelement <4 x i1> [[TMP3]], i32 3 +; CHECK-NEXT: [[TMP7:%.*]] = extractelement <4 x i1> [[TMP3]], i64 3 ; CHECK-NEXT: [[OR_COND6:%.*]] = or i1 [[OR_COND5]], [[TMP7]] ; CHECK-NEXT: [[SHIFT:%.*]] = shufflevector <4 x i32> [[T_FR]], <4 x i32> poison, <4 x i32> ; CHECK-NEXT: [[TMP8:%.*]] = add nsw <4 x i32> [[SHIFT]], [[T_FR]] -; CHECK-NEXT: [[ADD:%.*]] = extractelement <4 x i32> [[TMP8]], i32 0 +; CHECK-NEXT: [[ADD:%.*]] = extractelement <4 x i32> [[TMP8]], i64 0 ; CHECK-NEXT: [[CONV:%.*]] = sitofp i32 [[ADD]] to float ; CHECK-NEXT: [[RETVAL_0:%.*]] = select i1 [[OR_COND6]], float 0.000000e+00, float [[CONV]] ; CHECK-NEXT: ret float [[RETVAL_0]] @@ -509,7 +509,7 @@ ; CHECK-NEXT: [[TMP5:%.*]] = icmp eq i4 [[TMP4]], 0 ; CHECK-NEXT: [[SHIFT:%.*]] = shufflevector <4 x i32> [[T_FR]], <4 x i32> poison, <4 x i32> ; CHECK-NEXT: [[TMP6:%.*]] = add nsw <4 x i32> [[T_FR]], [[SHIFT]] -; CHECK-NEXT: [[ADD:%.*]] = extractelement <4 x i32> [[TMP6]], i32 0 +; CHECK-NEXT: [[ADD:%.*]] = extractelement <4 x i32> [[TMP6]], i64 0 ; CHECK-NEXT: [[SPEC_SELECT:%.*]] = select i1 [[TMP5]], i32 0, i32 [[ADD]] ; CHECK-NEXT: br label [[RETURN]] ; CHECK: return: @@ -587,7 +587,7 @@ ; CHECK-NEXT: [[DOTNOT7:%.*]] = icmp eq i4 [[TMP3]], 0 ; CHECK-NEXT: [[SHIFT:%.*]] = shufflevector <4 x i32> [[T_FR]], <4 x i32> poison, <4 x i32> ; CHECK-NEXT: [[TMP4:%.*]] = add nuw nsw <4 x i32> [[SHIFT]], [[T_FR]] -; CHECK-NEXT: [[ADD:%.*]] = extractelement <4 x i32> [[TMP4]], i32 0 +; CHECK-NEXT: [[ADD:%.*]] = extractelement <4 x i32> [[TMP4]], i64 0 ; CHECK-NEXT: [[SPEC_SELECT:%.*]] = select i1 [[DOTNOT7]], i32 [[ADD]], i32 0 ; CHECK-NEXT: br label [[RETURN]] ; CHECK: return: diff --git a/llvm/test/Transforms/PhaseOrdering/X86/vector-reductions.ll b/llvm/test/Transforms/PhaseOrdering/X86/vector-reductions.ll --- a/llvm/test/Transforms/PhaseOrdering/X86/vector-reductions.ll +++ b/llvm/test/Transforms/PhaseOrdering/X86/vector-reductions.ll @@ -280,24 +280,24 @@ ; CHECK-NEXT: entry: ; CHECK-NEXT: [[FNEG:%.*]] = fneg double [[B:%.*]] ; CHECK-NEXT: [[MUL:%.*]] = fmul double [[A:%.*]], 2.000000e+00 -; CHECK-NEXT: [[TMP0:%.*]] = insertelement <2 x double> poison, double [[C:%.*]], i32 1 -; CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x double> [[TMP0]], double [[FNEG]], i32 0 -; CHECK-NEXT: [[TMP2:%.*]] = insertelement <2 x double> poison, double [[C]], i32 0 -; CHECK-NEXT: [[TMP3:%.*]] = insertelement <2 x double> [[TMP2]], double [[B]], i32 1 +; CHECK-NEXT: [[TMP0:%.*]] = insertelement <2 x double> poison, double [[C:%.*]], i64 1 +; CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x double> [[TMP0]], double [[FNEG]], i64 0 +; CHECK-NEXT: [[TMP2:%.*]] = insertelement <2 x double> poison, double [[C]], i64 0 +; CHECK-NEXT: [[TMP3:%.*]] = insertelement <2 x double> [[TMP2]], double [[B]], i64 1 ; CHECK-NEXT: [[TMP4:%.*]] = fsub <2 x double> [[TMP1]], [[TMP3]] -; CHECK-NEXT: [[TMP5:%.*]] = insertelement <2 x double> poison, double [[MUL]], i32 0 +; CHECK-NEXT: [[TMP5:%.*]] = insertelement <2 x double> poison, double [[MUL]], i64 0 ; CHECK-NEXT: [[TMP6:%.*]] = shufflevector <2 x double> [[TMP5]], <2 x double> poison, <2 x i32> zeroinitializer ; CHECK-NEXT: [[TMP7:%.*]] = fdiv <2 x double> [[TMP4]], [[TMP6]] -; CHECK-NEXT: [[TMP8:%.*]] = extractelement <2 x double> [[TMP7]], i32 1 +; CHECK-NEXT: [[TMP8:%.*]] = extractelement <2 x double> [[TMP7]], i64 1 ; CHECK-NEXT: [[CMP:%.*]] = fcmp olt double [[TMP8]], 0x3EB0C6F7A0B5ED8D -; CHECK-NEXT: [[TMP9:%.*]] = extractelement <2 x double> [[TMP7]], i32 0 +; CHECK-NEXT: [[TMP9:%.*]] = extractelement <2 x double> [[TMP7]], i64 0 ; CHECK-NEXT: [[CMP4:%.*]] = fcmp olt double [[TMP9]], 0x3EB0C6F7A0B5ED8D ; CHECK-NEXT: [[OR_COND:%.*]] = select i1 [[CMP]], i1 [[CMP4]], i1 false ; CHECK-NEXT: br i1 [[OR_COND]], label [[CLEANUP:%.*]], label [[LOR_LHS_FALSE:%.*]] ; CHECK: lor.lhs.false: ; CHECK-NEXT: [[TMP10:%.*]] = fcmp ule <2 x double> [[TMP7]], -; CHECK-NEXT: [[TMP11:%.*]] = extractelement <2 x i1> [[TMP10]], i32 0 -; CHECK-NEXT: [[TMP12:%.*]] = extractelement <2 x i1> [[TMP10]], i32 1 +; CHECK-NEXT: [[TMP11:%.*]] = extractelement <2 x i1> [[TMP10]], i64 0 +; CHECK-NEXT: [[TMP12:%.*]] = extractelement <2 x i1> [[TMP10]], i64 1 ; CHECK-NEXT: [[OR_COND1:%.*]] = select i1 [[TMP12]], i1 true, i1 [[TMP11]] ; CHECK-NEXT: br label [[CLEANUP]] ; CHECK: cleanup: diff --git a/llvm/test/Transforms/SLPVectorizer/AArch64/gather-cost.ll b/llvm/test/Transforms/SLPVectorizer/AArch64/gather-cost.ll --- a/llvm/test/Transforms/SLPVectorizer/AArch64/gather-cost.ll +++ b/llvm/test/Transforms/SLPVectorizer/AArch64/gather-cost.ll @@ -16,10 +16,10 @@ define internal i32 @gather_multiple_use(i32 %a, i32 %b, i32 %c, i32 %d) { ; CHECK-LABEL: @gather_multiple_use( -; CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x i32> poison, i32 [[C:%.*]], i32 0 -; CHECK-NEXT: [[TMP2:%.*]] = insertelement <4 x i32> [[TMP1]], i32 [[A:%.*]], i32 1 -; CHECK-NEXT: [[TMP3:%.*]] = insertelement <4 x i32> [[TMP2]], i32 [[B:%.*]], i32 2 -; CHECK-NEXT: [[TMP4:%.*]] = insertelement <4 x i32> [[TMP3]], i32 [[D:%.*]], i32 3 +; CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x i32> poison, i32 [[C:%.*]], i64 0 +; CHECK-NEXT: [[TMP2:%.*]] = insertelement <4 x i32> [[TMP1]], i32 [[A:%.*]], i64 1 +; CHECK-NEXT: [[TMP3:%.*]] = insertelement <4 x i32> [[TMP2]], i32 [[B:%.*]], i64 2 +; CHECK-NEXT: [[TMP4:%.*]] = insertelement <4 x i32> [[TMP3]], i32 [[D:%.*]], i64 3 ; CHECK-NEXT: [[TMP5:%.*]] = lshr <4 x i32> [[TMP4]], ; CHECK-NEXT: [[TMP6:%.*]] = and <4 x i32> [[TMP5]], ; CHECK-NEXT: [[TMP7:%.*]] = mul nuw <4 x i32> [[TMP6]], diff --git a/llvm/test/Transforms/SLPVectorizer/AArch64/gather-reduce.ll b/llvm/test/Transforms/SLPVectorizer/AArch64/gather-reduce.ll --- a/llvm/test/Transforms/SLPVectorizer/AArch64/gather-reduce.ll +++ b/llvm/test/Transforms/SLPVectorizer/AArch64/gather-reduce.ll @@ -43,50 +43,50 @@ ; GENERIC-NEXT: [[TMP4:%.*]] = load <8 x i16>, <8 x i16>* [[TMP3]], align 2 ; GENERIC-NEXT: [[TMP5:%.*]] = zext <8 x i16> [[TMP4]] to <8 x i32> ; GENERIC-NEXT: [[TMP6:%.*]] = sub nsw <8 x i32> [[TMP2]], [[TMP5]] -; GENERIC-NEXT: [[TMP7:%.*]] = extractelement <8 x i32> [[TMP6]], i32 0 +; GENERIC-NEXT: [[TMP7:%.*]] = extractelement <8 x i32> [[TMP6]], i64 0 ; GENERIC-NEXT: [[TMP8:%.*]] = sext i32 [[TMP7]] to i64 ; GENERIC-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i16, i16* [[G:%.*]], i64 [[TMP8]] ; GENERIC-NEXT: [[TMP9:%.*]] = load i16, i16* [[ARRAYIDX]], align 2 ; GENERIC-NEXT: [[CONV3:%.*]] = zext i16 [[TMP9]] to i32 ; GENERIC-NEXT: [[ADD:%.*]] = add nsw i32 [[SUM_0102]], [[CONV3]] -; GENERIC-NEXT: [[TMP10:%.*]] = extractelement <8 x i32> [[TMP6]], i32 1 +; GENERIC-NEXT: [[TMP10:%.*]] = extractelement <8 x i32> [[TMP6]], i64 1 ; GENERIC-NEXT: [[TMP11:%.*]] = sext i32 [[TMP10]] to i64 ; GENERIC-NEXT: [[ARRAYIDX10:%.*]] = getelementptr inbounds i16, i16* [[G]], i64 [[TMP11]] ; GENERIC-NEXT: [[TMP12:%.*]] = load i16, i16* [[ARRAYIDX10]], align 2 ; GENERIC-NEXT: [[CONV11:%.*]] = zext i16 [[TMP12]] to i32 ; GENERIC-NEXT: [[ADD12:%.*]] = add nsw i32 [[ADD]], [[CONV11]] -; GENERIC-NEXT: [[TMP13:%.*]] = extractelement <8 x i32> [[TMP6]], i32 2 +; GENERIC-NEXT: [[TMP13:%.*]] = extractelement <8 x i32> [[TMP6]], i64 2 ; GENERIC-NEXT: [[TMP14:%.*]] = sext i32 [[TMP13]] to i64 ; GENERIC-NEXT: [[ARRAYIDX19:%.*]] = getelementptr inbounds i16, i16* [[G]], i64 [[TMP14]] ; GENERIC-NEXT: [[TMP15:%.*]] = load i16, i16* [[ARRAYIDX19]], align 2 ; GENERIC-NEXT: [[CONV20:%.*]] = zext i16 [[TMP15]] to i32 ; GENERIC-NEXT: [[ADD21:%.*]] = add nsw i32 [[ADD12]], [[CONV20]] -; GENERIC-NEXT: [[TMP16:%.*]] = extractelement <8 x i32> [[TMP6]], i32 3 +; GENERIC-NEXT: [[TMP16:%.*]] = extractelement <8 x i32> [[TMP6]], i64 3 ; GENERIC-NEXT: [[TMP17:%.*]] = sext i32 [[TMP16]] to i64 ; GENERIC-NEXT: [[ARRAYIDX28:%.*]] = getelementptr inbounds i16, i16* [[G]], i64 [[TMP17]] ; GENERIC-NEXT: [[TMP18:%.*]] = load i16, i16* [[ARRAYIDX28]], align 2 ; GENERIC-NEXT: [[CONV29:%.*]] = zext i16 [[TMP18]] to i32 ; GENERIC-NEXT: [[ADD30:%.*]] = add nsw i32 [[ADD21]], [[CONV29]] -; GENERIC-NEXT: [[TMP19:%.*]] = extractelement <8 x i32> [[TMP6]], i32 4 +; GENERIC-NEXT: [[TMP19:%.*]] = extractelement <8 x i32> [[TMP6]], i64 4 ; GENERIC-NEXT: [[TMP20:%.*]] = sext i32 [[TMP19]] to i64 ; GENERIC-NEXT: [[ARRAYIDX37:%.*]] = getelementptr inbounds i16, i16* [[G]], i64 [[TMP20]] ; GENERIC-NEXT: [[TMP21:%.*]] = load i16, i16* [[ARRAYIDX37]], align 2 ; GENERIC-NEXT: [[CONV38:%.*]] = zext i16 [[TMP21]] to i32 ; GENERIC-NEXT: [[ADD39:%.*]] = add nsw i32 [[ADD30]], [[CONV38]] -; GENERIC-NEXT: [[TMP22:%.*]] = extractelement <8 x i32> [[TMP6]], i32 5 +; GENERIC-NEXT: [[TMP22:%.*]] = extractelement <8 x i32> [[TMP6]], i64 5 ; GENERIC-NEXT: [[TMP23:%.*]] = sext i32 [[TMP22]] to i64 ; GENERIC-NEXT: [[ARRAYIDX46:%.*]] = getelementptr inbounds i16, i16* [[G]], i64 [[TMP23]] ; GENERIC-NEXT: [[TMP24:%.*]] = load i16, i16* [[ARRAYIDX46]], align 2 ; GENERIC-NEXT: [[CONV47:%.*]] = zext i16 [[TMP24]] to i32 ; GENERIC-NEXT: [[ADD48:%.*]] = add nsw i32 [[ADD39]], [[CONV47]] -; GENERIC-NEXT: [[TMP25:%.*]] = extractelement <8 x i32> [[TMP6]], i32 6 +; GENERIC-NEXT: [[TMP25:%.*]] = extractelement <8 x i32> [[TMP6]], i64 6 ; GENERIC-NEXT: [[TMP26:%.*]] = sext i32 [[TMP25]] to i64 ; GENERIC-NEXT: [[ARRAYIDX55:%.*]] = getelementptr inbounds i16, i16* [[G]], i64 [[TMP26]] ; GENERIC-NEXT: [[TMP27:%.*]] = load i16, i16* [[ARRAYIDX55]], align 2 ; GENERIC-NEXT: [[CONV56:%.*]] = zext i16 [[TMP27]] to i32 ; GENERIC-NEXT: [[ADD57:%.*]] = add nsw i32 [[ADD48]], [[CONV56]] ; GENERIC-NEXT: [[INCDEC_PTR58]] = getelementptr inbounds i16, i16* [[A_ADDR_0101]], i64 8 -; GENERIC-NEXT: [[TMP28:%.*]] = extractelement <8 x i32> [[TMP6]], i32 7 +; GENERIC-NEXT: [[TMP28:%.*]] = extractelement <8 x i32> [[TMP6]], i64 7 ; GENERIC-NEXT: [[TMP29:%.*]] = sext i32 [[TMP28]] to i64 ; GENERIC-NEXT: [[ARRAYIDX64:%.*]] = getelementptr inbounds i16, i16* [[G]], i64 [[TMP29]] ; GENERIC-NEXT: [[TMP30:%.*]] = load i16, i16* [[ARRAYIDX64]], align 2 @@ -118,50 +118,50 @@ ; KRYO-NEXT: [[TMP4:%.*]] = load <8 x i16>, <8 x i16>* [[TMP3]], align 2 ; KRYO-NEXT: [[TMP5:%.*]] = zext <8 x i16> [[TMP4]] to <8 x i32> ; KRYO-NEXT: [[TMP6:%.*]] = sub nsw <8 x i32> [[TMP2]], [[TMP5]] -; KRYO-NEXT: [[TMP7:%.*]] = extractelement <8 x i32> [[TMP6]], i32 0 +; KRYO-NEXT: [[TMP7:%.*]] = extractelement <8 x i32> [[TMP6]], i64 0 ; KRYO-NEXT: [[TMP8:%.*]] = sext i32 [[TMP7]] to i64 ; KRYO-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i16, i16* [[G:%.*]], i64 [[TMP8]] ; KRYO-NEXT: [[TMP9:%.*]] = load i16, i16* [[ARRAYIDX]], align 2 ; KRYO-NEXT: [[CONV3:%.*]] = zext i16 [[TMP9]] to i32 ; KRYO-NEXT: [[ADD:%.*]] = add nsw i32 [[SUM_0102]], [[CONV3]] -; KRYO-NEXT: [[TMP10:%.*]] = extractelement <8 x i32> [[TMP6]], i32 1 +; KRYO-NEXT: [[TMP10:%.*]] = extractelement <8 x i32> [[TMP6]], i64 1 ; KRYO-NEXT: [[TMP11:%.*]] = sext i32 [[TMP10]] to i64 ; KRYO-NEXT: [[ARRAYIDX10:%.*]] = getelementptr inbounds i16, i16* [[G]], i64 [[TMP11]] ; KRYO-NEXT: [[TMP12:%.*]] = load i16, i16* [[ARRAYIDX10]], align 2 ; KRYO-NEXT: [[CONV11:%.*]] = zext i16 [[TMP12]] to i32 ; KRYO-NEXT: [[ADD12:%.*]] = add nsw i32 [[ADD]], [[CONV11]] -; KRYO-NEXT: [[TMP13:%.*]] = extractelement <8 x i32> [[TMP6]], i32 2 +; KRYO-NEXT: [[TMP13:%.*]] = extractelement <8 x i32> [[TMP6]], i64 2 ; KRYO-NEXT: [[TMP14:%.*]] = sext i32 [[TMP13]] to i64 ; KRYO-NEXT: [[ARRAYIDX19:%.*]] = getelementptr inbounds i16, i16* [[G]], i64 [[TMP14]] ; KRYO-NEXT: [[TMP15:%.*]] = load i16, i16* [[ARRAYIDX19]], align 2 ; KRYO-NEXT: [[CONV20:%.*]] = zext i16 [[TMP15]] to i32 ; KRYO-NEXT: [[ADD21:%.*]] = add nsw i32 [[ADD12]], [[CONV20]] -; KRYO-NEXT: [[TMP16:%.*]] = extractelement <8 x i32> [[TMP6]], i32 3 +; KRYO-NEXT: [[TMP16:%.*]] = extractelement <8 x i32> [[TMP6]], i64 3 ; KRYO-NEXT: [[TMP17:%.*]] = sext i32 [[TMP16]] to i64 ; KRYO-NEXT: [[ARRAYIDX28:%.*]] = getelementptr inbounds i16, i16* [[G]], i64 [[TMP17]] ; KRYO-NEXT: [[TMP18:%.*]] = load i16, i16* [[ARRAYIDX28]], align 2 ; KRYO-NEXT: [[CONV29:%.*]] = zext i16 [[TMP18]] to i32 ; KRYO-NEXT: [[ADD30:%.*]] = add nsw i32 [[ADD21]], [[CONV29]] -; KRYO-NEXT: [[TMP19:%.*]] = extractelement <8 x i32> [[TMP6]], i32 4 +; KRYO-NEXT: [[TMP19:%.*]] = extractelement <8 x i32> [[TMP6]], i64 4 ; KRYO-NEXT: [[TMP20:%.*]] = sext i32 [[TMP19]] to i64 ; KRYO-NEXT: [[ARRAYIDX37:%.*]] = getelementptr inbounds i16, i16* [[G]], i64 [[TMP20]] ; KRYO-NEXT: [[TMP21:%.*]] = load i16, i16* [[ARRAYIDX37]], align 2 ; KRYO-NEXT: [[CONV38:%.*]] = zext i16 [[TMP21]] to i32 ; KRYO-NEXT: [[ADD39:%.*]] = add nsw i32 [[ADD30]], [[CONV38]] -; KRYO-NEXT: [[TMP22:%.*]] = extractelement <8 x i32> [[TMP6]], i32 5 +; KRYO-NEXT: [[TMP22:%.*]] = extractelement <8 x i32> [[TMP6]], i64 5 ; KRYO-NEXT: [[TMP23:%.*]] = sext i32 [[TMP22]] to i64 ; KRYO-NEXT: [[ARRAYIDX46:%.*]] = getelementptr inbounds i16, i16* [[G]], i64 [[TMP23]] ; KRYO-NEXT: [[TMP24:%.*]] = load i16, i16* [[ARRAYIDX46]], align 2 ; KRYO-NEXT: [[CONV47:%.*]] = zext i16 [[TMP24]] to i32 ; KRYO-NEXT: [[ADD48:%.*]] = add nsw i32 [[ADD39]], [[CONV47]] -; KRYO-NEXT: [[TMP25:%.*]] = extractelement <8 x i32> [[TMP6]], i32 6 +; KRYO-NEXT: [[TMP25:%.*]] = extractelement <8 x i32> [[TMP6]], i64 6 ; KRYO-NEXT: [[TMP26:%.*]] = sext i32 [[TMP25]] to i64 ; KRYO-NEXT: [[ARRAYIDX55:%.*]] = getelementptr inbounds i16, i16* [[G]], i64 [[TMP26]] ; KRYO-NEXT: [[TMP27:%.*]] = load i16, i16* [[ARRAYIDX55]], align 2 ; KRYO-NEXT: [[CONV56:%.*]] = zext i16 [[TMP27]] to i32 ; KRYO-NEXT: [[ADD57:%.*]] = add nsw i32 [[ADD48]], [[CONV56]] ; KRYO-NEXT: [[INCDEC_PTR58]] = getelementptr inbounds i16, i16* [[A_ADDR_0101]], i64 8 -; KRYO-NEXT: [[TMP28:%.*]] = extractelement <8 x i32> [[TMP6]], i32 7 +; KRYO-NEXT: [[TMP28:%.*]] = extractelement <8 x i32> [[TMP6]], i64 7 ; KRYO-NEXT: [[TMP29:%.*]] = sext i32 [[TMP28]] to i64 ; KRYO-NEXT: [[ARRAYIDX64:%.*]] = getelementptr inbounds i16, i16* [[G]], i64 [[TMP29]] ; KRYO-NEXT: [[TMP30:%.*]] = load i16, i16* [[ARRAYIDX64]], align 2 @@ -304,50 +304,50 @@ ; GENERIC-NEXT: [[TMP4:%.*]] = load <8 x i16>, <8 x i16>* [[TMP3]], align 2 ; GENERIC-NEXT: [[TMP5:%.*]] = zext <8 x i16> [[TMP4]] to <8 x i32> ; GENERIC-NEXT: [[TMP6:%.*]] = sub nsw <8 x i32> [[TMP2]], [[TMP5]] -; GENERIC-NEXT: [[TMP7:%.*]] = extractelement <8 x i32> [[TMP6]], i32 0 +; GENERIC-NEXT: [[TMP7:%.*]] = extractelement <8 x i32> [[TMP6]], i64 0 ; GENERIC-NEXT: [[TMP8:%.*]] = sext i32 [[TMP7]] to i64 ; GENERIC-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i16, i16* [[G:%.*]], i64 [[TMP8]] ; GENERIC-NEXT: [[TMP9:%.*]] = load i16, i16* [[ARRAYIDX]], align 2 ; GENERIC-NEXT: [[CONV3:%.*]] = zext i16 [[TMP9]] to i32 ; GENERIC-NEXT: [[ADD:%.*]] = add nsw i32 [[SUM_0102]], [[CONV3]] -; GENERIC-NEXT: [[TMP10:%.*]] = extractelement <8 x i32> [[TMP6]], i32 1 +; GENERIC-NEXT: [[TMP10:%.*]] = extractelement <8 x i32> [[TMP6]], i64 1 ; GENERIC-NEXT: [[TMP11:%.*]] = sext i32 [[TMP10]] to i64 ; GENERIC-NEXT: [[ARRAYIDX10:%.*]] = getelementptr inbounds i16, i16* [[G]], i64 [[TMP11]] ; GENERIC-NEXT: [[TMP12:%.*]] = load i16, i16* [[ARRAYIDX10]], align 2 ; GENERIC-NEXT: [[CONV11:%.*]] = zext i16 [[TMP12]] to i32 ; GENERIC-NEXT: [[ADD12:%.*]] = add nsw i32 [[ADD]], [[CONV11]] -; GENERIC-NEXT: [[TMP13:%.*]] = extractelement <8 x i32> [[TMP6]], i32 2 +; GENERIC-NEXT: [[TMP13:%.*]] = extractelement <8 x i32> [[TMP6]], i64 2 ; GENERIC-NEXT: [[TMP14:%.*]] = sext i32 [[TMP13]] to i64 ; GENERIC-NEXT: [[ARRAYIDX19:%.*]] = getelementptr inbounds i16, i16* [[G]], i64 [[TMP14]] ; GENERIC-NEXT: [[TMP15:%.*]] = load i16, i16* [[ARRAYIDX19]], align 2 ; GENERIC-NEXT: [[CONV20:%.*]] = zext i16 [[TMP15]] to i32 ; GENERIC-NEXT: [[ADD21:%.*]] = add nsw i32 [[ADD12]], [[CONV20]] -; GENERIC-NEXT: [[TMP16:%.*]] = extractelement <8 x i32> [[TMP6]], i32 3 +; GENERIC-NEXT: [[TMP16:%.*]] = extractelement <8 x i32> [[TMP6]], i64 3 ; GENERIC-NEXT: [[TMP17:%.*]] = sext i32 [[TMP16]] to i64 ; GENERIC-NEXT: [[ARRAYIDX28:%.*]] = getelementptr inbounds i16, i16* [[G]], i64 [[TMP17]] ; GENERIC-NEXT: [[TMP18:%.*]] = load i16, i16* [[ARRAYIDX28]], align 2 ; GENERIC-NEXT: [[CONV29:%.*]] = zext i16 [[TMP18]] to i32 ; GENERIC-NEXT: [[ADD30:%.*]] = add nsw i32 [[ADD21]], [[CONV29]] -; GENERIC-NEXT: [[TMP19:%.*]] = extractelement <8 x i32> [[TMP6]], i32 4 +; GENERIC-NEXT: [[TMP19:%.*]] = extractelement <8 x i32> [[TMP6]], i64 4 ; GENERIC-NEXT: [[TMP20:%.*]] = sext i32 [[TMP19]] to i64 ; GENERIC-NEXT: [[ARRAYIDX37:%.*]] = getelementptr inbounds i16, i16* [[G]], i64 [[TMP20]] ; GENERIC-NEXT: [[TMP21:%.*]] = load i16, i16* [[ARRAYIDX37]], align 2 ; GENERIC-NEXT: [[CONV38:%.*]] = zext i16 [[TMP21]] to i32 ; GENERIC-NEXT: [[ADD39:%.*]] = add nsw i32 [[ADD30]], [[CONV38]] -; GENERIC-NEXT: [[TMP22:%.*]] = extractelement <8 x i32> [[TMP6]], i32 5 +; GENERIC-NEXT: [[TMP22:%.*]] = extractelement <8 x i32> [[TMP6]], i64 5 ; GENERIC-NEXT: [[TMP23:%.*]] = sext i32 [[TMP22]] to i64 ; GENERIC-NEXT: [[ARRAYIDX46:%.*]] = getelementptr inbounds i16, i16* [[G]], i64 [[TMP23]] ; GENERIC-NEXT: [[TMP24:%.*]] = load i16, i16* [[ARRAYIDX46]], align 2 ; GENERIC-NEXT: [[CONV47:%.*]] = zext i16 [[TMP24]] to i32 ; GENERIC-NEXT: [[ADD48:%.*]] = add nsw i32 [[ADD39]], [[CONV47]] -; GENERIC-NEXT: [[TMP25:%.*]] = extractelement <8 x i32> [[TMP6]], i32 6 +; GENERIC-NEXT: [[TMP25:%.*]] = extractelement <8 x i32> [[TMP6]], i64 6 ; GENERIC-NEXT: [[TMP26:%.*]] = sext i32 [[TMP25]] to i64 ; GENERIC-NEXT: [[ARRAYIDX55:%.*]] = getelementptr inbounds i16, i16* [[G]], i64 [[TMP26]] ; GENERIC-NEXT: [[TMP27:%.*]] = load i16, i16* [[ARRAYIDX55]], align 2 ; GENERIC-NEXT: [[CONV56:%.*]] = zext i16 [[TMP27]] to i32 ; GENERIC-NEXT: [[ADD57:%.*]] = add nsw i32 [[ADD48]], [[CONV56]] ; GENERIC-NEXT: [[INCDEC_PTR58]] = getelementptr inbounds i16, i16* [[A_ADDR_0101]], i64 8 -; GENERIC-NEXT: [[TMP28:%.*]] = extractelement <8 x i32> [[TMP6]], i32 7 +; GENERIC-NEXT: [[TMP28:%.*]] = extractelement <8 x i32> [[TMP6]], i64 7 ; GENERIC-NEXT: [[TMP29:%.*]] = sext i32 [[TMP28]] to i64 ; GENERIC-NEXT: [[ARRAYIDX64:%.*]] = getelementptr inbounds i16, i16* [[G]], i64 [[TMP29]] ; GENERIC-NEXT: [[TMP30:%.*]] = load i16, i16* [[ARRAYIDX64]], align 2 @@ -379,50 +379,50 @@ ; KRYO-NEXT: [[TMP4:%.*]] = load <8 x i16>, <8 x i16>* [[TMP3]], align 2 ; KRYO-NEXT: [[TMP5:%.*]] = zext <8 x i16> [[TMP4]] to <8 x i32> ; KRYO-NEXT: [[TMP6:%.*]] = sub nsw <8 x i32> [[TMP2]], [[TMP5]] -; KRYO-NEXT: [[TMP7:%.*]] = extractelement <8 x i32> [[TMP6]], i32 0 +; KRYO-NEXT: [[TMP7:%.*]] = extractelement <8 x i32> [[TMP6]], i64 0 ; KRYO-NEXT: [[TMP8:%.*]] = sext i32 [[TMP7]] to i64 ; KRYO-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i16, i16* [[G:%.*]], i64 [[TMP8]] ; KRYO-NEXT: [[TMP9:%.*]] = load i16, i16* [[ARRAYIDX]], align 2 ; KRYO-NEXT: [[CONV3:%.*]] = zext i16 [[TMP9]] to i32 ; KRYO-NEXT: [[ADD:%.*]] = add nsw i32 [[SUM_0102]], [[CONV3]] -; KRYO-NEXT: [[TMP10:%.*]] = extractelement <8 x i32> [[TMP6]], i32 1 +; KRYO-NEXT: [[TMP10:%.*]] = extractelement <8 x i32> [[TMP6]], i64 1 ; KRYO-NEXT: [[TMP11:%.*]] = sext i32 [[TMP10]] to i64 ; KRYO-NEXT: [[ARRAYIDX10:%.*]] = getelementptr inbounds i16, i16* [[G]], i64 [[TMP11]] ; KRYO-NEXT: [[TMP12:%.*]] = load i16, i16* [[ARRAYIDX10]], align 2 ; KRYO-NEXT: [[CONV11:%.*]] = zext i16 [[TMP12]] to i32 ; KRYO-NEXT: [[ADD12:%.*]] = add nsw i32 [[ADD]], [[CONV11]] -; KRYO-NEXT: [[TMP13:%.*]] = extractelement <8 x i32> [[TMP6]], i32 2 +; KRYO-NEXT: [[TMP13:%.*]] = extractelement <8 x i32> [[TMP6]], i64 2 ; KRYO-NEXT: [[TMP14:%.*]] = sext i32 [[TMP13]] to i64 ; KRYO-NEXT: [[ARRAYIDX19:%.*]] = getelementptr inbounds i16, i16* [[G]], i64 [[TMP14]] ; KRYO-NEXT: [[TMP15:%.*]] = load i16, i16* [[ARRAYIDX19]], align 2 ; KRYO-NEXT: [[CONV20:%.*]] = zext i16 [[TMP15]] to i32 ; KRYO-NEXT: [[ADD21:%.*]] = add nsw i32 [[ADD12]], [[CONV20]] -; KRYO-NEXT: [[TMP16:%.*]] = extractelement <8 x i32> [[TMP6]], i32 3 +; KRYO-NEXT: [[TMP16:%.*]] = extractelement <8 x i32> [[TMP6]], i64 3 ; KRYO-NEXT: [[TMP17:%.*]] = sext i32 [[TMP16]] to i64 ; KRYO-NEXT: [[ARRAYIDX28:%.*]] = getelementptr inbounds i16, i16* [[G]], i64 [[TMP17]] ; KRYO-NEXT: [[TMP18:%.*]] = load i16, i16* [[ARRAYIDX28]], align 2 ; KRYO-NEXT: [[CONV29:%.*]] = zext i16 [[TMP18]] to i32 ; KRYO-NEXT: [[ADD30:%.*]] = add nsw i32 [[ADD21]], [[CONV29]] -; KRYO-NEXT: [[TMP19:%.*]] = extractelement <8 x i32> [[TMP6]], i32 4 +; KRYO-NEXT: [[TMP19:%.*]] = extractelement <8 x i32> [[TMP6]], i64 4 ; KRYO-NEXT: [[TMP20:%.*]] = sext i32 [[TMP19]] to i64 ; KRYO-NEXT: [[ARRAYIDX37:%.*]] = getelementptr inbounds i16, i16* [[G]], i64 [[TMP20]] ; KRYO-NEXT: [[TMP21:%.*]] = load i16, i16* [[ARRAYIDX37]], align 2 ; KRYO-NEXT: [[CONV38:%.*]] = zext i16 [[TMP21]] to i32 ; KRYO-NEXT: [[ADD39:%.*]] = add nsw i32 [[ADD30]], [[CONV38]] -; KRYO-NEXT: [[TMP22:%.*]] = extractelement <8 x i32> [[TMP6]], i32 5 +; KRYO-NEXT: [[TMP22:%.*]] = extractelement <8 x i32> [[TMP6]], i64 5 ; KRYO-NEXT: [[TMP23:%.*]] = sext i32 [[TMP22]] to i64 ; KRYO-NEXT: [[ARRAYIDX46:%.*]] = getelementptr inbounds i16, i16* [[G]], i64 [[TMP23]] ; KRYO-NEXT: [[TMP24:%.*]] = load i16, i16* [[ARRAYIDX46]], align 2 ; KRYO-NEXT: [[CONV47:%.*]] = zext i16 [[TMP24]] to i32 ; KRYO-NEXT: [[ADD48:%.*]] = add nsw i32 [[ADD39]], [[CONV47]] -; KRYO-NEXT: [[TMP25:%.*]] = extractelement <8 x i32> [[TMP6]], i32 6 +; KRYO-NEXT: [[TMP25:%.*]] = extractelement <8 x i32> [[TMP6]], i64 6 ; KRYO-NEXT: [[TMP26:%.*]] = sext i32 [[TMP25]] to i64 ; KRYO-NEXT: [[ARRAYIDX55:%.*]] = getelementptr inbounds i16, i16* [[G]], i64 [[TMP26]] ; KRYO-NEXT: [[TMP27:%.*]] = load i16, i16* [[ARRAYIDX55]], align 2 ; KRYO-NEXT: [[CONV56:%.*]] = zext i16 [[TMP27]] to i32 ; KRYO-NEXT: [[ADD57:%.*]] = add nsw i32 [[ADD48]], [[CONV56]] ; KRYO-NEXT: [[INCDEC_PTR58]] = getelementptr inbounds i16, i16* [[A_ADDR_0101]], i64 8 -; KRYO-NEXT: [[TMP28:%.*]] = extractelement <8 x i32> [[TMP6]], i32 7 +; KRYO-NEXT: [[TMP28:%.*]] = extractelement <8 x i32> [[TMP6]], i64 7 ; KRYO-NEXT: [[TMP29:%.*]] = sext i32 [[TMP28]] to i64 ; KRYO-NEXT: [[ARRAYIDX64:%.*]] = getelementptr inbounds i16, i16* [[G]], i64 [[TMP29]] ; KRYO-NEXT: [[TMP30:%.*]] = load i16, i16* [[ARRAYIDX64]], align 2 diff --git a/llvm/test/Transforms/SLPVectorizer/AArch64/getelementptr.ll b/llvm/test/Transforms/SLPVectorizer/AArch64/getelementptr.ll --- a/llvm/test/Transforms/SLPVectorizer/AArch64/getelementptr.ll +++ b/llvm/test/Transforms/SLPVectorizer/AArch64/getelementptr.ll @@ -50,9 +50,9 @@ ; CHECK-NEXT: [[CMP31:%.*]] = icmp sgt i32 [[N:%.*]], 0 ; CHECK-NEXT: br i1 [[CMP31]], label [[FOR_BODY_PREHEADER:%.*]], label [[FOR_COND_CLEANUP:%.*]] ; CHECK: for.body.preheader: -; CHECK-NEXT: [[TMP0:%.*]] = insertelement <2 x i32> , i32 [[X:%.*]], i32 1 -; CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x i32> poison, i32 [[Y:%.*]], i32 0 -; CHECK-NEXT: [[TMP2:%.*]] = insertelement <2 x i32> [[TMP1]], i32 [[Z:%.*]], i32 1 +; CHECK-NEXT: [[TMP0:%.*]] = insertelement <2 x i32> , i32 [[X:%.*]], i64 1 +; CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x i32> poison, i32 [[Y:%.*]], i64 0 +; CHECK-NEXT: [[TMP2:%.*]] = insertelement <2 x i32> [[TMP1]], i32 [[Z:%.*]], i64 1 ; CHECK-NEXT: br label [[FOR_BODY:%.*]] ; CHECK: for.cond.cleanup.loopexit: ; CHECK-NEXT: br label [[FOR_COND_CLEANUP]] @@ -63,26 +63,26 @@ ; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i32 [ 0, [[FOR_BODY_PREHEADER]] ], [ [[INDVARS_IV_NEXT:%.*]], [[FOR_BODY]] ] ; CHECK-NEXT: [[SUM_032:%.*]] = phi i32 [ 0, [[FOR_BODY_PREHEADER]] ], [ [[ADD16]], [[FOR_BODY]] ] ; CHECK-NEXT: [[T4:%.*]] = shl nuw nsw i32 [[INDVARS_IV]], 1 -; CHECK-NEXT: [[TMP3:%.*]] = insertelement <2 x i32> poison, i32 [[T4]], i32 0 +; CHECK-NEXT: [[TMP3:%.*]] = insertelement <2 x i32> poison, i32 [[T4]], i64 0 ; CHECK-NEXT: [[TMP4:%.*]] = shufflevector <2 x i32> [[TMP3]], <2 x i32> poison, <2 x i32> zeroinitializer ; CHECK-NEXT: [[TMP5:%.*]] = add nsw <2 x i32> [[TMP4]], [[TMP0]] -; CHECK-NEXT: [[TMP6:%.*]] = extractelement <2 x i32> [[TMP5]], i32 0 +; CHECK-NEXT: [[TMP6:%.*]] = extractelement <2 x i32> [[TMP5]], i64 0 ; CHECK-NEXT: [[TMP7:%.*]] = zext i32 [[TMP6]] to i64 ; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[G:%.*]], i64 [[TMP7]] ; CHECK-NEXT: [[T6:%.*]] = load i32, i32* [[ARRAYIDX]], align 4 ; CHECK-NEXT: [[ADD1:%.*]] = add nsw i32 [[T6]], [[SUM_032]] -; CHECK-NEXT: [[TMP8:%.*]] = extractelement <2 x i32> [[TMP5]], i32 1 +; CHECK-NEXT: [[TMP8:%.*]] = extractelement <2 x i32> [[TMP5]], i64 1 ; CHECK-NEXT: [[TMP9:%.*]] = sext i32 [[TMP8]] to i64 ; CHECK-NEXT: [[ARRAYIDX5:%.*]] = getelementptr inbounds i32, i32* [[G]], i64 [[TMP9]] ; CHECK-NEXT: [[T8:%.*]] = load i32, i32* [[ARRAYIDX5]], align 4 ; CHECK-NEXT: [[ADD6:%.*]] = add nsw i32 [[ADD1]], [[T8]] ; CHECK-NEXT: [[TMP10:%.*]] = add nsw <2 x i32> [[TMP4]], [[TMP2]] -; CHECK-NEXT: [[TMP11:%.*]] = extractelement <2 x i32> [[TMP10]], i32 0 +; CHECK-NEXT: [[TMP11:%.*]] = extractelement <2 x i32> [[TMP10]], i64 0 ; CHECK-NEXT: [[TMP12:%.*]] = sext i32 [[TMP11]] to i64 ; CHECK-NEXT: [[ARRAYIDX10:%.*]] = getelementptr inbounds i32, i32* [[G]], i64 [[TMP12]] ; CHECK-NEXT: [[T10:%.*]] = load i32, i32* [[ARRAYIDX10]], align 4 ; CHECK-NEXT: [[ADD11:%.*]] = add nsw i32 [[ADD6]], [[T10]] -; CHECK-NEXT: [[TMP13:%.*]] = extractelement <2 x i32> [[TMP10]], i32 1 +; CHECK-NEXT: [[TMP13:%.*]] = extractelement <2 x i32> [[TMP10]], i64 1 ; CHECK-NEXT: [[TMP14:%.*]] = sext i32 [[TMP13]] to i64 ; CHECK-NEXT: [[ARRAYIDX15:%.*]] = getelementptr inbounds i32, i32* [[G]], i64 [[TMP14]] ; CHECK-NEXT: [[T12:%.*]] = load i32, i32* [[ARRAYIDX15]], align 4 @@ -147,8 +147,8 @@ ; CHECK-NEXT: [[CMP31:%.*]] = icmp sgt i32 [[N:%.*]], 0 ; CHECK-NEXT: br i1 [[CMP31]], label [[FOR_BODY_PREHEADER:%.*]], label [[FOR_COND_CLEANUP:%.*]] ; CHECK: for.body.preheader: -; CHECK-NEXT: [[TMP0:%.*]] = insertelement <2 x i32> poison, i32 [[Y:%.*]], i32 0 -; CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x i32> [[TMP0]], i32 [[Z:%.*]], i32 1 +; CHECK-NEXT: [[TMP0:%.*]] = insertelement <2 x i32> poison, i32 [[Y:%.*]], i64 0 +; CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x i32> [[TMP0]], i32 [[Z:%.*]], i64 1 ; CHECK-NEXT: br label [[FOR_BODY:%.*]] ; CHECK: for.cond.cleanup.loopexit: ; CHECK-NEXT: br label [[FOR_COND_CLEANUP]] @@ -168,15 +168,15 @@ ; CHECK-NEXT: [[ARRAYIDX5:%.*]] = getelementptr inbounds i32, i32* [[G]], i64 [[TMP3]] ; CHECK-NEXT: [[T8:%.*]] = load i32, i32* [[ARRAYIDX5]], align 4 ; CHECK-NEXT: [[ADD6:%.*]] = add nsw i32 [[ADD1]], [[T8]] -; CHECK-NEXT: [[TMP4:%.*]] = insertelement <2 x i32> poison, i32 [[T4]], i32 0 +; CHECK-NEXT: [[TMP4:%.*]] = insertelement <2 x i32> poison, i32 [[T4]], i64 0 ; CHECK-NEXT: [[TMP5:%.*]] = shufflevector <2 x i32> [[TMP4]], <2 x i32> poison, <2 x i32> zeroinitializer ; CHECK-NEXT: [[TMP6:%.*]] = add nsw <2 x i32> [[TMP5]], [[TMP1]] -; CHECK-NEXT: [[TMP7:%.*]] = extractelement <2 x i32> [[TMP6]], i32 0 +; CHECK-NEXT: [[TMP7:%.*]] = extractelement <2 x i32> [[TMP6]], i64 0 ; CHECK-NEXT: [[TMP8:%.*]] = sext i32 [[TMP7]] to i64 ; CHECK-NEXT: [[ARRAYIDX10:%.*]] = getelementptr inbounds i32, i32* [[G]], i64 [[TMP8]] ; CHECK-NEXT: [[T10:%.*]] = load i32, i32* [[ARRAYIDX10]], align 4 ; CHECK-NEXT: [[ADD11:%.*]] = add nsw i32 [[ADD6]], [[T10]] -; CHECK-NEXT: [[TMP9:%.*]] = extractelement <2 x i32> [[TMP6]], i32 1 +; CHECK-NEXT: [[TMP9:%.*]] = extractelement <2 x i32> [[TMP6]], i64 1 ; CHECK-NEXT: [[TMP10:%.*]] = sext i32 [[TMP9]] to i64 ; CHECK-NEXT: [[ARRAYIDX15:%.*]] = getelementptr inbounds i32, i32* [[G]], i64 [[TMP10]] ; CHECK-NEXT: [[T12:%.*]] = load i32, i32* [[ARRAYIDX15]], align 4 @@ -241,35 +241,35 @@ ; CHECK-NEXT: [[TMP5:%.*]] = load <8 x i16>, <8 x i16>* [[TMP4]], align 2 ; CHECK-NEXT: [[TMP6:%.*]] = zext <8 x i16> [[TMP5]] to <8 x i32> ; CHECK-NEXT: [[TMP7:%.*]] = sub nsw <8 x i32> [[TMP3]], [[TMP6]] -; CHECK-NEXT: [[TMP8:%.*]] = extractelement <8 x i32> [[TMP7]], i32 0 +; CHECK-NEXT: [[TMP8:%.*]] = extractelement <8 x i32> [[TMP7]], i64 0 ; CHECK-NEXT: [[TMP9:%.*]] = sext i32 [[TMP8]] to i64 ; CHECK-NEXT: [[T60:%.*]] = getelementptr inbounds i32, i32* [[P_0]], i64 [[TMP9]] ; CHECK-NEXT: [[L_1:%.*]] = load i32, i32* [[T60]], align 4 -; CHECK-NEXT: [[TMP10:%.*]] = extractelement <8 x i32> [[TMP7]], i32 1 +; CHECK-NEXT: [[TMP10:%.*]] = extractelement <8 x i32> [[TMP7]], i64 1 ; CHECK-NEXT: [[TMP11:%.*]] = sext i32 [[TMP10]] to i64 ; CHECK-NEXT: [[T71:%.*]] = getelementptr inbounds i32, i32* [[P_0]], i64 [[TMP11]] ; CHECK-NEXT: [[L_2:%.*]] = load i32, i32* [[T71]], align 4 -; CHECK-NEXT: [[TMP12:%.*]] = extractelement <8 x i32> [[TMP7]], i32 2 +; CHECK-NEXT: [[TMP12:%.*]] = extractelement <8 x i32> [[TMP7]], i64 2 ; CHECK-NEXT: [[TMP13:%.*]] = sext i32 [[TMP12]] to i64 ; CHECK-NEXT: [[T82:%.*]] = getelementptr inbounds i32, i32* [[P_0]], i64 [[TMP13]] ; CHECK-NEXT: [[L_3:%.*]] = load i32, i32* [[T82]], align 4 -; CHECK-NEXT: [[TMP14:%.*]] = extractelement <8 x i32> [[TMP7]], i32 3 +; CHECK-NEXT: [[TMP14:%.*]] = extractelement <8 x i32> [[TMP7]], i64 3 ; CHECK-NEXT: [[TMP15:%.*]] = sext i32 [[TMP14]] to i64 ; CHECK-NEXT: [[T93:%.*]] = getelementptr inbounds i32, i32* [[P_0]], i64 [[TMP15]] ; CHECK-NEXT: [[L_4:%.*]] = load i32, i32* [[T93]], align 4 -; CHECK-NEXT: [[TMP16:%.*]] = extractelement <8 x i32> [[TMP7]], i32 4 +; CHECK-NEXT: [[TMP16:%.*]] = extractelement <8 x i32> [[TMP7]], i64 4 ; CHECK-NEXT: [[TMP17:%.*]] = sext i32 [[TMP16]] to i64 ; CHECK-NEXT: [[T104:%.*]] = getelementptr inbounds i32, i32* [[P_0]], i64 [[TMP17]] ; CHECK-NEXT: [[L_5:%.*]] = load i32, i32* [[T104]], align 4 -; CHECK-NEXT: [[TMP18:%.*]] = extractelement <8 x i32> [[TMP7]], i32 5 +; CHECK-NEXT: [[TMP18:%.*]] = extractelement <8 x i32> [[TMP7]], i64 5 ; CHECK-NEXT: [[TMP19:%.*]] = sext i32 [[TMP18]] to i64 ; CHECK-NEXT: [[T115:%.*]] = getelementptr inbounds i32, i32* [[P_0]], i64 [[TMP19]] ; CHECK-NEXT: [[L_6:%.*]] = load i32, i32* [[T115]], align 4 -; CHECK-NEXT: [[TMP20:%.*]] = extractelement <8 x i32> [[TMP7]], i32 6 +; CHECK-NEXT: [[TMP20:%.*]] = extractelement <8 x i32> [[TMP7]], i64 6 ; CHECK-NEXT: [[TMP21:%.*]] = sext i32 [[TMP20]] to i64 ; CHECK-NEXT: [[T126:%.*]] = getelementptr inbounds i32, i32* [[P_0]], i64 [[TMP21]] ; CHECK-NEXT: [[L_7:%.*]] = load i32, i32* [[T126]], align 4 -; CHECK-NEXT: [[TMP22:%.*]] = extractelement <8 x i32> [[TMP7]], i32 7 +; CHECK-NEXT: [[TMP22:%.*]] = extractelement <8 x i32> [[TMP7]], i64 7 ; CHECK-NEXT: [[TMP23:%.*]] = sext i32 [[TMP22]] to i64 ; CHECK-NEXT: [[T137:%.*]] = getelementptr inbounds i32, i32* [[P_0]], i64 [[TMP23]] ; CHECK-NEXT: [[L_8:%.*]] = load i32, i32* [[T137]], align 4 diff --git a/llvm/test/Transforms/SLPVectorizer/AArch64/transpose-inseltpoison.ll b/llvm/test/Transforms/SLPVectorizer/AArch64/transpose-inseltpoison.ll --- a/llvm/test/Transforms/SLPVectorizer/AArch64/transpose-inseltpoison.ll +++ b/llvm/test/Transforms/SLPVectorizer/AArch64/transpose-inseltpoison.ll @@ -129,15 +129,15 @@ define <4 x i32> @build_vec_v4i32_reuse_1(<2 x i32> %v0, <2 x i32> %v1) { ; CHECK-LABEL: @build_vec_v4i32_reuse_1( -; CHECK-NEXT: [[TMP1:%.*]] = extractelement <2 x i32> [[V1:%.*]], i32 1 -; CHECK-NEXT: [[TMP2:%.*]] = extractelement <2 x i32> [[V1]], i32 0 -; CHECK-NEXT: [[TMP3:%.*]] = extractelement <2 x i32> [[V0:%.*]], i32 1 -; CHECK-NEXT: [[TMP4:%.*]] = extractelement <2 x i32> [[V0]], i32 0 +; CHECK-NEXT: [[TMP1:%.*]] = extractelement <2 x i32> [[V1:%.*]], i64 1 +; CHECK-NEXT: [[TMP2:%.*]] = extractelement <2 x i32> [[V1]], i64 0 +; CHECK-NEXT: [[TMP3:%.*]] = extractelement <2 x i32> [[V0:%.*]], i64 1 +; CHECK-NEXT: [[TMP4:%.*]] = extractelement <2 x i32> [[V0]], i64 0 ; CHECK-NEXT: [[TMP0_0:%.*]] = add i32 [[TMP4]], [[TMP2]] ; CHECK-NEXT: [[TMP0_1:%.*]] = add i32 [[TMP3]], [[TMP1]] ; CHECK-NEXT: [[TMP5:%.*]] = xor <2 x i32> [[V0]], [[V1]] -; CHECK-NEXT: [[TMP6:%.*]] = insertelement <2 x i32> poison, i32 [[TMP0_0]], i32 0 -; CHECK-NEXT: [[TMP7:%.*]] = insertelement <2 x i32> poison, i32 [[TMP0_1]], i32 0 +; CHECK-NEXT: [[TMP6:%.*]] = insertelement <2 x i32> poison, i32 [[TMP0_0]], i64 0 +; CHECK-NEXT: [[TMP7:%.*]] = insertelement <2 x i32> poison, i32 [[TMP0_1]], i64 0 ; CHECK-NEXT: [[TMP8:%.*]] = sub <2 x i32> [[TMP6]], [[TMP7]] ; CHECK-NEXT: [[TMP9:%.*]] = shufflevector <2 x i32> [[TMP5]], <2 x i32> undef, <2 x i32> ; CHECK-NEXT: [[TMP10:%.*]] = sub <2 x i32> [[TMP5]], [[TMP9]] @@ -167,10 +167,10 @@ define <4 x i32> @build_vec_v4i32_3_binops(<2 x i32> %v0, <2 x i32> %v1) { ; CHECK-LABEL: @build_vec_v4i32_3_binops( -; CHECK-NEXT: [[V0_0:%.*]] = extractelement <2 x i32> [[V0:%.*]], i32 0 -; CHECK-NEXT: [[V0_1:%.*]] = extractelement <2 x i32> [[V0]], i32 1 -; CHECK-NEXT: [[V1_0:%.*]] = extractelement <2 x i32> [[V1:%.*]], i32 0 -; CHECK-NEXT: [[V1_1:%.*]] = extractelement <2 x i32> [[V1]], i32 1 +; CHECK-NEXT: [[V0_0:%.*]] = extractelement <2 x i32> [[V0:%.*]], i64 0 +; CHECK-NEXT: [[V0_1:%.*]] = extractelement <2 x i32> [[V0]], i64 1 +; CHECK-NEXT: [[V1_0:%.*]] = extractelement <2 x i32> [[V1:%.*]], i64 0 +; CHECK-NEXT: [[V1_1:%.*]] = extractelement <2 x i32> [[V1]], i64 1 ; CHECK-NEXT: [[TMP0_0:%.*]] = add i32 [[V0_0]], [[V1_0]] ; CHECK-NEXT: [[TMP0_1:%.*]] = add i32 [[V0_1]], [[V1_1]] ; CHECK-NEXT: [[TMP1_0:%.*]] = mul i32 [[V0_0]], [[V1_0]] @@ -182,8 +182,8 @@ ; CHECK-NEXT: [[TMP2_0:%.*]] = add i32 [[TMP0_0]], [[TMP0_1]] ; CHECK-NEXT: [[TMP2_1:%.*]] = add i32 [[TMP1_0]], [[TMP1_1]] ; CHECK-NEXT: [[TMP5:%.*]] = add <2 x i32> [[TMP2]], [[TMP4]] -; CHECK-NEXT: [[TMP3_0:%.*]] = insertelement <4 x i32> poison, i32 [[TMP2_0]], i32 0 -; CHECK-NEXT: [[TMP3_1:%.*]] = insertelement <4 x i32> [[TMP3_0]], i32 [[TMP2_1]], i32 1 +; CHECK-NEXT: [[TMP3_0:%.*]] = insertelement <4 x i32> poison, i32 [[TMP2_0]], i64 0 +; CHECK-NEXT: [[TMP3_1:%.*]] = insertelement <4 x i32> [[TMP3_0]], i32 [[TMP2_1]], i64 1 ; CHECK-NEXT: [[TMP6:%.*]] = shufflevector <2 x i32> [[TMP5]], <2 x i32> poison, <4 x i32> ; CHECK-NEXT: [[TMP3_31:%.*]] = shufflevector <4 x i32> [[TMP3_1]], <4 x i32> [[TMP6]], <4 x i32> ; CHECK-NEXT: ret <4 x i32> [[TMP3_31]] diff --git a/llvm/test/Transforms/SLPVectorizer/AArch64/transpose.ll b/llvm/test/Transforms/SLPVectorizer/AArch64/transpose.ll --- a/llvm/test/Transforms/SLPVectorizer/AArch64/transpose.ll +++ b/llvm/test/Transforms/SLPVectorizer/AArch64/transpose.ll @@ -129,15 +129,15 @@ define <4 x i32> @build_vec_v4i32_reuse_1(<2 x i32> %v0, <2 x i32> %v1) { ; CHECK-LABEL: @build_vec_v4i32_reuse_1( -; CHECK-NEXT: [[TMP1:%.*]] = extractelement <2 x i32> [[V1:%.*]], i32 1 -; CHECK-NEXT: [[TMP2:%.*]] = extractelement <2 x i32> [[V1]], i32 0 -; CHECK-NEXT: [[TMP3:%.*]] = extractelement <2 x i32> [[V0:%.*]], i32 1 -; CHECK-NEXT: [[TMP4:%.*]] = extractelement <2 x i32> [[V0]], i32 0 +; CHECK-NEXT: [[TMP1:%.*]] = extractelement <2 x i32> [[V1:%.*]], i64 1 +; CHECK-NEXT: [[TMP2:%.*]] = extractelement <2 x i32> [[V1]], i64 0 +; CHECK-NEXT: [[TMP3:%.*]] = extractelement <2 x i32> [[V0:%.*]], i64 1 +; CHECK-NEXT: [[TMP4:%.*]] = extractelement <2 x i32> [[V0]], i64 0 ; CHECK-NEXT: [[TMP0_0:%.*]] = add i32 [[TMP4]], [[TMP2]] ; CHECK-NEXT: [[TMP0_1:%.*]] = add i32 [[TMP3]], [[TMP1]] ; CHECK-NEXT: [[TMP5:%.*]] = xor <2 x i32> [[V0]], [[V1]] -; CHECK-NEXT: [[TMP6:%.*]] = insertelement <2 x i32> poison, i32 [[TMP0_0]], i32 0 -; CHECK-NEXT: [[TMP7:%.*]] = insertelement <2 x i32> poison, i32 [[TMP0_1]], i32 0 +; CHECK-NEXT: [[TMP6:%.*]] = insertelement <2 x i32> poison, i32 [[TMP0_0]], i64 0 +; CHECK-NEXT: [[TMP7:%.*]] = insertelement <2 x i32> poison, i32 [[TMP0_1]], i64 0 ; CHECK-NEXT: [[TMP8:%.*]] = sub <2 x i32> [[TMP6]], [[TMP7]] ; CHECK-NEXT: [[TMP9:%.*]] = shufflevector <2 x i32> [[TMP5]], <2 x i32> undef, <2 x i32> ; CHECK-NEXT: [[TMP10:%.*]] = sub <2 x i32> [[TMP5]], [[TMP9]] @@ -167,10 +167,10 @@ define <4 x i32> @build_vec_v4i32_3_binops(<2 x i32> %v0, <2 x i32> %v1) { ; CHECK-LABEL: @build_vec_v4i32_3_binops( -; CHECK-NEXT: [[V0_0:%.*]] = extractelement <2 x i32> [[V0:%.*]], i32 0 -; CHECK-NEXT: [[V0_1:%.*]] = extractelement <2 x i32> [[V0]], i32 1 -; CHECK-NEXT: [[V1_0:%.*]] = extractelement <2 x i32> [[V1:%.*]], i32 0 -; CHECK-NEXT: [[V1_1:%.*]] = extractelement <2 x i32> [[V1]], i32 1 +; CHECK-NEXT: [[V0_0:%.*]] = extractelement <2 x i32> [[V0:%.*]], i64 0 +; CHECK-NEXT: [[V0_1:%.*]] = extractelement <2 x i32> [[V0]], i64 1 +; CHECK-NEXT: [[V1_0:%.*]] = extractelement <2 x i32> [[V1:%.*]], i64 0 +; CHECK-NEXT: [[V1_1:%.*]] = extractelement <2 x i32> [[V1]], i64 1 ; CHECK-NEXT: [[TMP0_0:%.*]] = add i32 [[V0_0]], [[V1_0]] ; CHECK-NEXT: [[TMP0_1:%.*]] = add i32 [[V0_1]], [[V1_1]] ; CHECK-NEXT: [[TMP1_0:%.*]] = mul i32 [[V0_0]], [[V1_0]] @@ -182,8 +182,8 @@ ; CHECK-NEXT: [[TMP2_0:%.*]] = add i32 [[TMP0_0]], [[TMP0_1]] ; CHECK-NEXT: [[TMP2_1:%.*]] = add i32 [[TMP1_0]], [[TMP1_1]] ; CHECK-NEXT: [[TMP5:%.*]] = add <2 x i32> [[TMP2]], [[TMP4]] -; CHECK-NEXT: [[TMP3_0:%.*]] = insertelement <4 x i32> undef, i32 [[TMP2_0]], i32 0 -; CHECK-NEXT: [[TMP3_1:%.*]] = insertelement <4 x i32> [[TMP3_0]], i32 [[TMP2_1]], i32 1 +; CHECK-NEXT: [[TMP3_0:%.*]] = insertelement <4 x i32> undef, i32 [[TMP2_0]], i64 0 +; CHECK-NEXT: [[TMP3_1:%.*]] = insertelement <4 x i32> [[TMP3_0]], i32 [[TMP2_1]], i64 1 ; CHECK-NEXT: [[TMP6:%.*]] = shufflevector <2 x i32> [[TMP5]], <2 x i32> poison, <4 x i32> ; CHECK-NEXT: [[TMP3_31:%.*]] = shufflevector <4 x i32> [[TMP3_1]], <4 x i32> [[TMP6]], <4 x i32> ; CHECK-NEXT: ret <4 x i32> [[TMP3_31]] diff --git a/llvm/test/Transforms/SLPVectorizer/WebAssembly/no-vectorize-rotate.ll b/llvm/test/Transforms/SLPVectorizer/WebAssembly/no-vectorize-rotate.ll --- a/llvm/test/Transforms/SLPVectorizer/WebAssembly/no-vectorize-rotate.ll +++ b/llvm/test/Transforms/SLPVectorizer/WebAssembly/no-vectorize-rotate.ll @@ -9,13 +9,13 @@ define void @foo(<2 x i64> %x, <4 x i32> %y, i64* %out) #0 { ; CHECK-LABEL: @foo( -; CHECK-NEXT: [[A:%.*]] = extractelement <2 x i64> [[X:%.*]], i32 0 -; CHECK-NEXT: [[B:%.*]] = extractelement <4 x i32> [[Y:%.*]], i32 2 +; CHECK-NEXT: [[A:%.*]] = extractelement <2 x i64> [[X:%.*]], i64 0 +; CHECK-NEXT: [[B:%.*]] = extractelement <4 x i32> [[Y:%.*]], i64 2 ; CHECK-NEXT: [[CONV6:%.*]] = zext i32 [[B]] to i64 ; CHECK-NEXT: [[C:%.*]] = tail call i64 @llvm.fshl.i64(i64 [[A]], i64 [[A]], i64 [[CONV6]]) ; CHECK-NEXT: store i64 [[C]], i64* [[OUT:%.*]], align 8 -; CHECK-NEXT: [[D:%.*]] = extractelement <2 x i64> [[X]], i32 1 -; CHECK-NEXT: [[E:%.*]] = extractelement <4 x i32> [[Y]], i32 3 +; CHECK-NEXT: [[D:%.*]] = extractelement <2 x i64> [[X]], i64 1 +; CHECK-NEXT: [[E:%.*]] = extractelement <4 x i32> [[Y]], i64 3 ; CHECK-NEXT: [[CONV17:%.*]] = zext i32 [[E]] to i64 ; CHECK-NEXT: [[F:%.*]] = tail call i64 @llvm.fshl.i64(i64 [[D]], i64 [[D]], i64 [[CONV17]]) ; CHECK-NEXT: [[ARRAYIDX2:%.*]] = getelementptr inbounds i64, i64* [[OUT]], i32 1 diff --git a/llvm/test/Transforms/SLPVectorizer/X86/alternate-calls-inseltpoison.ll b/llvm/test/Transforms/SLPVectorizer/X86/alternate-calls-inseltpoison.ll --- a/llvm/test/Transforms/SLPVectorizer/X86/alternate-calls-inseltpoison.ll +++ b/llvm/test/Transforms/SLPVectorizer/X86/alternate-calls-inseltpoison.ll @@ -8,8 +8,8 @@ define <8 x float> @ceil_floor(<8 x float> %a) { ; SSE-LABEL: @ceil_floor( -; SSE-NEXT: [[A0:%.*]] = extractelement <8 x float> [[A:%.*]], i32 0 -; SSE-NEXT: [[A3:%.*]] = extractelement <8 x float> [[A]], i32 3 +; SSE-NEXT: [[A0:%.*]] = extractelement <8 x float> [[A:%.*]], i64 0 +; SSE-NEXT: [[A3:%.*]] = extractelement <8 x float> [[A]], i64 3 ; SSE-NEXT: [[AB0:%.*]] = call float @llvm.ceil.f32(float [[A0]]) ; SSE-NEXT: [[TMP1:%.*]] = shufflevector <8 x float> [[A]], <8 x float> undef, <2 x i32> ; SSE-NEXT: [[TMP2:%.*]] = call <2 x float> @llvm.floor.v2f32(<2 x float> [[TMP1]]) @@ -18,10 +18,10 @@ ; SSE-NEXT: [[TMP4:%.*]] = call <2 x float> @llvm.ceil.v2f32(<2 x float> [[TMP3]]) ; SSE-NEXT: [[TMP5:%.*]] = shufflevector <8 x float> [[A]], <8 x float> undef, <2 x i32> ; SSE-NEXT: [[TMP6:%.*]] = call <2 x float> @llvm.floor.v2f32(<2 x float> [[TMP5]]) -; SSE-NEXT: [[R0:%.*]] = insertelement <8 x float> poison, float [[AB0]], i32 0 +; SSE-NEXT: [[R0:%.*]] = insertelement <8 x float> poison, float [[AB0]], i64 0 ; SSE-NEXT: [[TMP7:%.*]] = shufflevector <2 x float> [[TMP2]], <2 x float> poison, <8 x i32> ; SSE-NEXT: [[R23:%.*]] = shufflevector <8 x float> [[R0]], <8 x float> [[TMP7]], <8 x i32> -; SSE-NEXT: [[R3:%.*]] = insertelement <8 x float> [[R23]], float [[AB3]], i32 3 +; SSE-NEXT: [[R3:%.*]] = insertelement <8 x float> [[R23]], float [[AB3]], i64 3 ; SSE-NEXT: [[TMP8:%.*]] = shufflevector <2 x float> [[TMP4]], <2 x float> poison, <8 x i32> ; SSE-NEXT: [[R52:%.*]] = shufflevector <8 x float> [[R3]], <8 x float> [[TMP8]], <8 x i32> ; SSE-NEXT: [[TMP9:%.*]] = shufflevector <2 x float> [[TMP6]], <2 x float> poison, <8 x i32> @@ -29,8 +29,8 @@ ; SSE-NEXT: ret <8 x float> [[R71]] ; ; SLM-LABEL: @ceil_floor( -; SLM-NEXT: [[A0:%.*]] = extractelement <8 x float> [[A:%.*]], i32 0 -; SLM-NEXT: [[A3:%.*]] = extractelement <8 x float> [[A]], i32 3 +; SLM-NEXT: [[A0:%.*]] = extractelement <8 x float> [[A:%.*]], i64 0 +; SLM-NEXT: [[A3:%.*]] = extractelement <8 x float> [[A]], i64 3 ; SLM-NEXT: [[AB0:%.*]] = call float @llvm.ceil.f32(float [[A0]]) ; SLM-NEXT: [[TMP1:%.*]] = shufflevector <8 x float> [[A]], <8 x float> undef, <2 x i32> ; SLM-NEXT: [[TMP2:%.*]] = call <2 x float> @llvm.floor.v2f32(<2 x float> [[TMP1]]) @@ -39,10 +39,10 @@ ; SLM-NEXT: [[TMP4:%.*]] = call <2 x float> @llvm.ceil.v2f32(<2 x float> [[TMP3]]) ; SLM-NEXT: [[TMP5:%.*]] = shufflevector <8 x float> [[A]], <8 x float> undef, <2 x i32> ; SLM-NEXT: [[TMP6:%.*]] = call <2 x float> @llvm.floor.v2f32(<2 x float> [[TMP5]]) -; SLM-NEXT: [[R0:%.*]] = insertelement <8 x float> poison, float [[AB0]], i32 0 +; SLM-NEXT: [[R0:%.*]] = insertelement <8 x float> poison, float [[AB0]], i64 0 ; SLM-NEXT: [[TMP7:%.*]] = shufflevector <2 x float> [[TMP2]], <2 x float> poison, <8 x i32> ; SLM-NEXT: [[R23:%.*]] = shufflevector <8 x float> [[R0]], <8 x float> [[TMP7]], <8 x i32> -; SLM-NEXT: [[R3:%.*]] = insertelement <8 x float> [[R23]], float [[AB3]], i32 3 +; SLM-NEXT: [[R3:%.*]] = insertelement <8 x float> [[R23]], float [[AB3]], i64 3 ; SLM-NEXT: [[TMP8:%.*]] = shufflevector <2 x float> [[TMP4]], <2 x float> poison, <8 x i32> ; SLM-NEXT: [[R52:%.*]] = shufflevector <8 x float> [[R3]], <8 x float> [[TMP8]], <8 x i32> ; SLM-NEXT: [[TMP9:%.*]] = shufflevector <2 x float> [[TMP6]], <2 x float> poison, <8 x i32> @@ -50,8 +50,8 @@ ; SLM-NEXT: ret <8 x float> [[R71]] ; ; AVX-LABEL: @ceil_floor( -; AVX-NEXT: [[A0:%.*]] = extractelement <8 x float> [[A:%.*]], i32 0 -; AVX-NEXT: [[A3:%.*]] = extractelement <8 x float> [[A]], i32 3 +; AVX-NEXT: [[A0:%.*]] = extractelement <8 x float> [[A:%.*]], i64 0 +; AVX-NEXT: [[A3:%.*]] = extractelement <8 x float> [[A]], i64 3 ; AVX-NEXT: [[AB0:%.*]] = call float @llvm.ceil.f32(float [[A0]]) ; AVX-NEXT: [[TMP1:%.*]] = shufflevector <8 x float> [[A]], <8 x float> undef, <2 x i32> ; AVX-NEXT: [[TMP2:%.*]] = call <2 x float> @llvm.floor.v2f32(<2 x float> [[TMP1]]) @@ -60,10 +60,10 @@ ; AVX-NEXT: [[TMP4:%.*]] = call <2 x float> @llvm.ceil.v2f32(<2 x float> [[TMP3]]) ; AVX-NEXT: [[TMP5:%.*]] = shufflevector <8 x float> [[A]], <8 x float> undef, <2 x i32> ; AVX-NEXT: [[TMP6:%.*]] = call <2 x float> @llvm.floor.v2f32(<2 x float> [[TMP5]]) -; AVX-NEXT: [[R0:%.*]] = insertelement <8 x float> poison, float [[AB0]], i32 0 +; AVX-NEXT: [[R0:%.*]] = insertelement <8 x float> poison, float [[AB0]], i64 0 ; AVX-NEXT: [[TMP7:%.*]] = shufflevector <2 x float> [[TMP2]], <2 x float> poison, <8 x i32> ; AVX-NEXT: [[R23:%.*]] = shufflevector <8 x float> [[R0]], <8 x float> [[TMP7]], <8 x i32> -; AVX-NEXT: [[R3:%.*]] = insertelement <8 x float> [[R23]], float [[AB3]], i32 3 +; AVX-NEXT: [[R3:%.*]] = insertelement <8 x float> [[R23]], float [[AB3]], i64 3 ; AVX-NEXT: [[TMP8:%.*]] = shufflevector <2 x float> [[TMP4]], <2 x float> poison, <8 x i32> ; AVX-NEXT: [[R52:%.*]] = shufflevector <8 x float> [[R3]], <8 x float> [[TMP8]], <8 x i32> ; AVX-NEXT: [[TMP9:%.*]] = shufflevector <2 x float> [[TMP6]], <2 x float> poison, <8 x i32> diff --git a/llvm/test/Transforms/SLPVectorizer/X86/alternate-calls.ll b/llvm/test/Transforms/SLPVectorizer/X86/alternate-calls.ll --- a/llvm/test/Transforms/SLPVectorizer/X86/alternate-calls.ll +++ b/llvm/test/Transforms/SLPVectorizer/X86/alternate-calls.ll @@ -8,8 +8,8 @@ define <8 x float> @ceil_floor(<8 x float> %a) { ; SSE-LABEL: @ceil_floor( -; SSE-NEXT: [[A0:%.*]] = extractelement <8 x float> [[A:%.*]], i32 0 -; SSE-NEXT: [[A3:%.*]] = extractelement <8 x float> [[A]], i32 3 +; SSE-NEXT: [[A0:%.*]] = extractelement <8 x float> [[A:%.*]], i64 0 +; SSE-NEXT: [[A3:%.*]] = extractelement <8 x float> [[A]], i64 3 ; SSE-NEXT: [[AB0:%.*]] = call float @llvm.ceil.f32(float [[A0]]) ; SSE-NEXT: [[TMP1:%.*]] = shufflevector <8 x float> [[A]], <8 x float> undef, <2 x i32> ; SSE-NEXT: [[TMP2:%.*]] = call <2 x float> @llvm.floor.v2f32(<2 x float> [[TMP1]]) @@ -18,10 +18,10 @@ ; SSE-NEXT: [[TMP4:%.*]] = call <2 x float> @llvm.ceil.v2f32(<2 x float> [[TMP3]]) ; SSE-NEXT: [[TMP5:%.*]] = shufflevector <8 x float> [[A]], <8 x float> undef, <2 x i32> ; SSE-NEXT: [[TMP6:%.*]] = call <2 x float> @llvm.floor.v2f32(<2 x float> [[TMP5]]) -; SSE-NEXT: [[R0:%.*]] = insertelement <8 x float> undef, float [[AB0]], i32 0 +; SSE-NEXT: [[R0:%.*]] = insertelement <8 x float> undef, float [[AB0]], i64 0 ; SSE-NEXT: [[TMP7:%.*]] = shufflevector <2 x float> [[TMP2]], <2 x float> poison, <8 x i32> ; SSE-NEXT: [[R23:%.*]] = shufflevector <8 x float> [[R0]], <8 x float> [[TMP7]], <8 x i32> -; SSE-NEXT: [[R3:%.*]] = insertelement <8 x float> [[R23]], float [[AB3]], i32 3 +; SSE-NEXT: [[R3:%.*]] = insertelement <8 x float> [[R23]], float [[AB3]], i64 3 ; SSE-NEXT: [[TMP8:%.*]] = shufflevector <2 x float> [[TMP4]], <2 x float> poison, <8 x i32> ; SSE-NEXT: [[R52:%.*]] = shufflevector <8 x float> [[R3]], <8 x float> [[TMP8]], <8 x i32> ; SSE-NEXT: [[TMP9:%.*]] = shufflevector <2 x float> [[TMP6]], <2 x float> poison, <8 x i32> @@ -29,8 +29,8 @@ ; SSE-NEXT: ret <8 x float> [[R71]] ; ; SLM-LABEL: @ceil_floor( -; SLM-NEXT: [[A0:%.*]] = extractelement <8 x float> [[A:%.*]], i32 0 -; SLM-NEXT: [[A3:%.*]] = extractelement <8 x float> [[A]], i32 3 +; SLM-NEXT: [[A0:%.*]] = extractelement <8 x float> [[A:%.*]], i64 0 +; SLM-NEXT: [[A3:%.*]] = extractelement <8 x float> [[A]], i64 3 ; SLM-NEXT: [[AB0:%.*]] = call float @llvm.ceil.f32(float [[A0]]) ; SLM-NEXT: [[TMP1:%.*]] = shufflevector <8 x float> [[A]], <8 x float> undef, <2 x i32> ; SLM-NEXT: [[TMP2:%.*]] = call <2 x float> @llvm.floor.v2f32(<2 x float> [[TMP1]]) @@ -39,10 +39,10 @@ ; SLM-NEXT: [[TMP4:%.*]] = call <2 x float> @llvm.ceil.v2f32(<2 x float> [[TMP3]]) ; SLM-NEXT: [[TMP5:%.*]] = shufflevector <8 x float> [[A]], <8 x float> undef, <2 x i32> ; SLM-NEXT: [[TMP6:%.*]] = call <2 x float> @llvm.floor.v2f32(<2 x float> [[TMP5]]) -; SLM-NEXT: [[R0:%.*]] = insertelement <8 x float> undef, float [[AB0]], i32 0 +; SLM-NEXT: [[R0:%.*]] = insertelement <8 x float> undef, float [[AB0]], i64 0 ; SLM-NEXT: [[TMP7:%.*]] = shufflevector <2 x float> [[TMP2]], <2 x float> poison, <8 x i32> ; SLM-NEXT: [[R23:%.*]] = shufflevector <8 x float> [[R0]], <8 x float> [[TMP7]], <8 x i32> -; SLM-NEXT: [[R3:%.*]] = insertelement <8 x float> [[R23]], float [[AB3]], i32 3 +; SLM-NEXT: [[R3:%.*]] = insertelement <8 x float> [[R23]], float [[AB3]], i64 3 ; SLM-NEXT: [[TMP8:%.*]] = shufflevector <2 x float> [[TMP4]], <2 x float> poison, <8 x i32> ; SLM-NEXT: [[R52:%.*]] = shufflevector <8 x float> [[R3]], <8 x float> [[TMP8]], <8 x i32> ; SLM-NEXT: [[TMP9:%.*]] = shufflevector <2 x float> [[TMP6]], <2 x float> poison, <8 x i32> @@ -50,8 +50,8 @@ ; SLM-NEXT: ret <8 x float> [[R71]] ; ; AVX-LABEL: @ceil_floor( -; AVX-NEXT: [[A0:%.*]] = extractelement <8 x float> [[A:%.*]], i32 0 -; AVX-NEXT: [[A3:%.*]] = extractelement <8 x float> [[A]], i32 3 +; AVX-NEXT: [[A0:%.*]] = extractelement <8 x float> [[A:%.*]], i64 0 +; AVX-NEXT: [[A3:%.*]] = extractelement <8 x float> [[A]], i64 3 ; AVX-NEXT: [[AB0:%.*]] = call float @llvm.ceil.f32(float [[A0]]) ; AVX-NEXT: [[TMP1:%.*]] = shufflevector <8 x float> [[A]], <8 x float> undef, <2 x i32> ; AVX-NEXT: [[TMP2:%.*]] = call <2 x float> @llvm.floor.v2f32(<2 x float> [[TMP1]]) @@ -60,10 +60,10 @@ ; AVX-NEXT: [[TMP4:%.*]] = call <2 x float> @llvm.ceil.v2f32(<2 x float> [[TMP3]]) ; AVX-NEXT: [[TMP5:%.*]] = shufflevector <8 x float> [[A]], <8 x float> undef, <2 x i32> ; AVX-NEXT: [[TMP6:%.*]] = call <2 x float> @llvm.floor.v2f32(<2 x float> [[TMP5]]) -; AVX-NEXT: [[R0:%.*]] = insertelement <8 x float> undef, float [[AB0]], i32 0 +; AVX-NEXT: [[R0:%.*]] = insertelement <8 x float> undef, float [[AB0]], i64 0 ; AVX-NEXT: [[TMP7:%.*]] = shufflevector <2 x float> [[TMP2]], <2 x float> poison, <8 x i32> ; AVX-NEXT: [[R23:%.*]] = shufflevector <8 x float> [[R0]], <8 x float> [[TMP7]], <8 x i32> -; AVX-NEXT: [[R3:%.*]] = insertelement <8 x float> [[R23]], float [[AB3]], i32 3 +; AVX-NEXT: [[R3:%.*]] = insertelement <8 x float> [[R23]], float [[AB3]], i64 3 ; AVX-NEXT: [[TMP8:%.*]] = shufflevector <2 x float> [[TMP4]], <2 x float> poison, <8 x i32> ; AVX-NEXT: [[R52:%.*]] = shufflevector <8 x float> [[R3]], <8 x float> [[TMP8]], <8 x i32> ; AVX-NEXT: [[TMP9:%.*]] = shufflevector <2 x float> [[TMP6]], <2 x float> poison, <8 x i32> diff --git a/llvm/test/Transforms/SLPVectorizer/X86/alternate-fp-inseltpoison.ll b/llvm/test/Transforms/SLPVectorizer/X86/alternate-fp-inseltpoison.ll --- a/llvm/test/Transforms/SLPVectorizer/X86/alternate-fp-inseltpoison.ll +++ b/llvm/test/Transforms/SLPVectorizer/X86/alternate-fp-inseltpoison.ll @@ -96,14 +96,14 @@ ; SSE-NEXT: ret <4 x float> [[TMP1]] ; ; SLM-LABEL: @fmul_fdiv_v4f32_const( -; SLM-NEXT: [[A2:%.*]] = extractelement <4 x float> [[A:%.*]], i32 2 -; SLM-NEXT: [[A3:%.*]] = extractelement <4 x float> [[A]], i32 3 +; SLM-NEXT: [[A2:%.*]] = extractelement <4 x float> [[A:%.*]], i64 2 +; SLM-NEXT: [[A3:%.*]] = extractelement <4 x float> [[A]], i64 3 ; SLM-NEXT: [[TMP1:%.*]] = shufflevector <4 x float> [[A]], <4 x float> undef, <2 x i32> ; SLM-NEXT: [[TMP2:%.*]] = fmul <2 x float> [[TMP1]], ; SLM-NEXT: [[AB3:%.*]] = fmul float [[A3]], 2.000000e+00 -; SLM-NEXT: [[R11:%.*]] = shufflevector <2 x float> [[TMP2]], <2 x float> poison, <4 x i32> -; SLM-NEXT: [[R2:%.*]] = insertelement <4 x float> [[R11]], float [[A2]], i32 2 -; SLM-NEXT: [[R3:%.*]] = insertelement <4 x float> [[R2]], float [[AB3]], i32 3 +; SLM-NEXT: [[TMP3:%.*]] = shufflevector <2 x float> [[TMP2]], <2 x float> poison, <4 x i32> +; SLM-NEXT: [[R2:%.*]] = insertelement <4 x float> [[TMP3]], float [[A2]], i64 2 +; SLM-NEXT: [[R3:%.*]] = insertelement <4 x float> [[R2]], float [[AB3]], i64 3 ; SLM-NEXT: ret <4 x float> [[R3]] ; ; AVX-LABEL: @fmul_fdiv_v4f32_const( diff --git a/llvm/test/Transforms/SLPVectorizer/X86/alternate-fp.ll b/llvm/test/Transforms/SLPVectorizer/X86/alternate-fp.ll --- a/llvm/test/Transforms/SLPVectorizer/X86/alternate-fp.ll +++ b/llvm/test/Transforms/SLPVectorizer/X86/alternate-fp.ll @@ -96,14 +96,14 @@ ; SSE-NEXT: ret <4 x float> [[TMP1]] ; ; SLM-LABEL: @fmul_fdiv_v4f32_const( -; SLM-NEXT: [[A2:%.*]] = extractelement <4 x float> [[A:%.*]], i32 2 -; SLM-NEXT: [[A3:%.*]] = extractelement <4 x float> [[A]], i32 3 +; SLM-NEXT: [[A2:%.*]] = extractelement <4 x float> [[A:%.*]], i64 2 +; SLM-NEXT: [[A3:%.*]] = extractelement <4 x float> [[A]], i64 3 ; SLM-NEXT: [[TMP1:%.*]] = shufflevector <4 x float> [[A]], <4 x float> undef, <2 x i32> ; SLM-NEXT: [[TMP2:%.*]] = fmul <2 x float> [[TMP1]], ; SLM-NEXT: [[AB3:%.*]] = fmul float [[A3]], 2.000000e+00 -; SLM-NEXT: [[R11:%.*]] = shufflevector <2 x float> [[TMP2]], <2 x float> poison, <4 x i32> -; SLM-NEXT: [[R2:%.*]] = insertelement <4 x float> [[R11]], float [[A2]], i32 2 -; SLM-NEXT: [[R3:%.*]] = insertelement <4 x float> [[R2]], float [[AB3]], i32 3 +; SLM-NEXT: [[TMP3:%.*]] = shufflevector <2 x float> [[TMP2]], <2 x float> poison, <4 x i32> +; SLM-NEXT: [[R2:%.*]] = insertelement <4 x float> [[TMP3]], float [[A2]], i64 2 +; SLM-NEXT: [[R3:%.*]] = insertelement <4 x float> [[R2]], float [[AB3]], i64 3 ; SLM-NEXT: ret <4 x float> [[R3]] ; ; AVX-LABEL: @fmul_fdiv_v4f32_const( diff --git a/llvm/test/Transforms/SLPVectorizer/X86/alternate-int-inseltpoison.ll b/llvm/test/Transforms/SLPVectorizer/X86/alternate-int-inseltpoison.ll --- a/llvm/test/Transforms/SLPVectorizer/X86/alternate-int-inseltpoison.ll +++ b/llvm/test/Transforms/SLPVectorizer/X86/alternate-int-inseltpoison.ll @@ -371,98 +371,98 @@ define <8 x i32> @sdiv_v8i32_undefs(<8 x i32> %a) { ; SSE-LABEL: @sdiv_v8i32_undefs( -; SSE-NEXT: [[A1:%.*]] = extractelement <8 x i32> [[A:%.*]], i32 1 -; SSE-NEXT: [[A2:%.*]] = extractelement <8 x i32> [[A]], i32 2 -; SSE-NEXT: [[A3:%.*]] = extractelement <8 x i32> [[A]], i32 3 -; SSE-NEXT: [[A5:%.*]] = extractelement <8 x i32> [[A]], i32 5 -; SSE-NEXT: [[A6:%.*]] = extractelement <8 x i32> [[A]], i32 6 -; SSE-NEXT: [[A7:%.*]] = extractelement <8 x i32> [[A]], i32 7 +; SSE-NEXT: [[A1:%.*]] = extractelement <8 x i32> [[A:%.*]], i64 1 +; SSE-NEXT: [[A2:%.*]] = extractelement <8 x i32> [[A]], i64 2 +; SSE-NEXT: [[A3:%.*]] = extractelement <8 x i32> [[A]], i64 3 +; SSE-NEXT: [[A5:%.*]] = extractelement <8 x i32> [[A]], i64 5 +; SSE-NEXT: [[A6:%.*]] = extractelement <8 x i32> [[A]], i64 6 +; SSE-NEXT: [[A7:%.*]] = extractelement <8 x i32> [[A]], i64 7 ; SSE-NEXT: [[AB1:%.*]] = sdiv i32 [[A1]], 4 ; SSE-NEXT: [[AB2:%.*]] = sdiv i32 [[A2]], 8 ; SSE-NEXT: [[AB3:%.*]] = sdiv i32 [[A3]], 16 ; SSE-NEXT: [[AB5:%.*]] = sdiv i32 [[A5]], 4 ; SSE-NEXT: [[AB6:%.*]] = sdiv i32 [[A6]], 8 ; SSE-NEXT: [[AB7:%.*]] = sdiv i32 [[A7]], 16 -; SSE-NEXT: [[R1:%.*]] = insertelement <8 x i32> poison, i32 [[AB1]], i32 1 -; SSE-NEXT: [[R2:%.*]] = insertelement <8 x i32> [[R1]], i32 [[AB2]], i32 2 -; SSE-NEXT: [[R3:%.*]] = insertelement <8 x i32> [[R2]], i32 [[AB3]], i32 3 -; SSE-NEXT: [[R5:%.*]] = insertelement <8 x i32> [[R3]], i32 [[AB5]], i32 5 -; SSE-NEXT: [[R6:%.*]] = insertelement <8 x i32> [[R5]], i32 [[AB6]], i32 6 -; SSE-NEXT: [[R7:%.*]] = insertelement <8 x i32> [[R6]], i32 [[AB7]], i32 7 +; SSE-NEXT: [[R1:%.*]] = insertelement <8 x i32> poison, i32 [[AB1]], i64 1 +; SSE-NEXT: [[R2:%.*]] = insertelement <8 x i32> [[R1]], i32 [[AB2]], i64 2 +; SSE-NEXT: [[R3:%.*]] = insertelement <8 x i32> [[R2]], i32 [[AB3]], i64 3 +; SSE-NEXT: [[R5:%.*]] = insertelement <8 x i32> [[R3]], i32 [[AB5]], i64 5 +; SSE-NEXT: [[R6:%.*]] = insertelement <8 x i32> [[R5]], i32 [[AB6]], i64 6 +; SSE-NEXT: [[R7:%.*]] = insertelement <8 x i32> [[R6]], i32 [[AB7]], i64 7 ; SSE-NEXT: ret <8 x i32> [[R7]] ; ; SLM-LABEL: @sdiv_v8i32_undefs( -; SLM-NEXT: [[A1:%.*]] = extractelement <8 x i32> [[A:%.*]], i32 1 -; SLM-NEXT: [[A2:%.*]] = extractelement <8 x i32> [[A]], i32 2 -; SLM-NEXT: [[A3:%.*]] = extractelement <8 x i32> [[A]], i32 3 -; SLM-NEXT: [[A5:%.*]] = extractelement <8 x i32> [[A]], i32 5 -; SLM-NEXT: [[A6:%.*]] = extractelement <8 x i32> [[A]], i32 6 -; SLM-NEXT: [[A7:%.*]] = extractelement <8 x i32> [[A]], i32 7 +; SLM-NEXT: [[A1:%.*]] = extractelement <8 x i32> [[A:%.*]], i64 1 +; SLM-NEXT: [[A2:%.*]] = extractelement <8 x i32> [[A]], i64 2 +; SLM-NEXT: [[A3:%.*]] = extractelement <8 x i32> [[A]], i64 3 +; SLM-NEXT: [[A5:%.*]] = extractelement <8 x i32> [[A]], i64 5 +; SLM-NEXT: [[A6:%.*]] = extractelement <8 x i32> [[A]], i64 6 +; SLM-NEXT: [[A7:%.*]] = extractelement <8 x i32> [[A]], i64 7 ; SLM-NEXT: [[AB1:%.*]] = sdiv i32 [[A1]], 4 ; SLM-NEXT: [[AB2:%.*]] = sdiv i32 [[A2]], 8 ; SLM-NEXT: [[AB3:%.*]] = sdiv i32 [[A3]], 16 ; SLM-NEXT: [[AB5:%.*]] = sdiv i32 [[A5]], 4 ; SLM-NEXT: [[AB6:%.*]] = sdiv i32 [[A6]], 8 ; SLM-NEXT: [[AB7:%.*]] = sdiv i32 [[A7]], 16 -; SLM-NEXT: [[R1:%.*]] = insertelement <8 x i32> poison, i32 [[AB1]], i32 1 -; SLM-NEXT: [[R2:%.*]] = insertelement <8 x i32> [[R1]], i32 [[AB2]], i32 2 -; SLM-NEXT: [[R3:%.*]] = insertelement <8 x i32> [[R2]], i32 [[AB3]], i32 3 -; SLM-NEXT: [[R5:%.*]] = insertelement <8 x i32> [[R3]], i32 [[AB5]], i32 5 -; SLM-NEXT: [[R6:%.*]] = insertelement <8 x i32> [[R5]], i32 [[AB6]], i32 6 -; SLM-NEXT: [[R7:%.*]] = insertelement <8 x i32> [[R6]], i32 [[AB7]], i32 7 +; SLM-NEXT: [[R1:%.*]] = insertelement <8 x i32> poison, i32 [[AB1]], i64 1 +; SLM-NEXT: [[R2:%.*]] = insertelement <8 x i32> [[R1]], i32 [[AB2]], i64 2 +; SLM-NEXT: [[R3:%.*]] = insertelement <8 x i32> [[R2]], i32 [[AB3]], i64 3 +; SLM-NEXT: [[R5:%.*]] = insertelement <8 x i32> [[R3]], i32 [[AB5]], i64 5 +; SLM-NEXT: [[R6:%.*]] = insertelement <8 x i32> [[R5]], i32 [[AB6]], i64 6 +; SLM-NEXT: [[R7:%.*]] = insertelement <8 x i32> [[R6]], i32 [[AB7]], i64 7 ; SLM-NEXT: ret <8 x i32> [[R7]] ; ; AVX1-LABEL: @sdiv_v8i32_undefs( -; AVX1-NEXT: [[A1:%.*]] = extractelement <8 x i32> [[A:%.*]], i32 1 -; AVX1-NEXT: [[A2:%.*]] = extractelement <8 x i32> [[A]], i32 2 -; AVX1-NEXT: [[A3:%.*]] = extractelement <8 x i32> [[A]], i32 3 -; AVX1-NEXT: [[A5:%.*]] = extractelement <8 x i32> [[A]], i32 5 -; AVX1-NEXT: [[A6:%.*]] = extractelement <8 x i32> [[A]], i32 6 -; AVX1-NEXT: [[A7:%.*]] = extractelement <8 x i32> [[A]], i32 7 +; AVX1-NEXT: [[A1:%.*]] = extractelement <8 x i32> [[A:%.*]], i64 1 +; AVX1-NEXT: [[A2:%.*]] = extractelement <8 x i32> [[A]], i64 2 +; AVX1-NEXT: [[A3:%.*]] = extractelement <8 x i32> [[A]], i64 3 +; AVX1-NEXT: [[A5:%.*]] = extractelement <8 x i32> [[A]], i64 5 +; AVX1-NEXT: [[A6:%.*]] = extractelement <8 x i32> [[A]], i64 6 +; AVX1-NEXT: [[A7:%.*]] = extractelement <8 x i32> [[A]], i64 7 ; AVX1-NEXT: [[AB1:%.*]] = sdiv i32 [[A1]], 4 ; AVX1-NEXT: [[AB2:%.*]] = sdiv i32 [[A2]], 8 ; AVX1-NEXT: [[AB3:%.*]] = sdiv i32 [[A3]], 16 ; AVX1-NEXT: [[AB5:%.*]] = sdiv i32 [[A5]], 4 ; AVX1-NEXT: [[AB6:%.*]] = sdiv i32 [[A6]], 8 ; AVX1-NEXT: [[AB7:%.*]] = sdiv i32 [[A7]], 16 -; AVX1-NEXT: [[R1:%.*]] = insertelement <8 x i32> poison, i32 [[AB1]], i32 1 -; AVX1-NEXT: [[R2:%.*]] = insertelement <8 x i32> [[R1]], i32 [[AB2]], i32 2 -; AVX1-NEXT: [[R3:%.*]] = insertelement <8 x i32> [[R2]], i32 [[AB3]], i32 3 -; AVX1-NEXT: [[R5:%.*]] = insertelement <8 x i32> [[R3]], i32 [[AB5]], i32 5 -; AVX1-NEXT: [[R6:%.*]] = insertelement <8 x i32> [[R5]], i32 [[AB6]], i32 6 -; AVX1-NEXT: [[R7:%.*]] = insertelement <8 x i32> [[R6]], i32 [[AB7]], i32 7 +; AVX1-NEXT: [[R1:%.*]] = insertelement <8 x i32> poison, i32 [[AB1]], i64 1 +; AVX1-NEXT: [[R2:%.*]] = insertelement <8 x i32> [[R1]], i32 [[AB2]], i64 2 +; AVX1-NEXT: [[R3:%.*]] = insertelement <8 x i32> [[R2]], i32 [[AB3]], i64 3 +; AVX1-NEXT: [[R5:%.*]] = insertelement <8 x i32> [[R3]], i32 [[AB5]], i64 5 +; AVX1-NEXT: [[R6:%.*]] = insertelement <8 x i32> [[R5]], i32 [[AB6]], i64 6 +; AVX1-NEXT: [[R7:%.*]] = insertelement <8 x i32> [[R6]], i32 [[AB7]], i64 7 ; AVX1-NEXT: ret <8 x i32> [[R7]] ; ; AVX2-LABEL: @sdiv_v8i32_undefs( -; AVX2-NEXT: [[A1:%.*]] = extractelement <8 x i32> [[A:%.*]], i32 1 -; AVX2-NEXT: [[A5:%.*]] = extractelement <8 x i32> [[A]], i32 5 +; AVX2-NEXT: [[A1:%.*]] = extractelement <8 x i32> [[A:%.*]], i64 1 +; AVX2-NEXT: [[A5:%.*]] = extractelement <8 x i32> [[A]], i64 5 ; AVX2-NEXT: [[AB1:%.*]] = sdiv i32 [[A1]], 4 ; AVX2-NEXT: [[TMP1:%.*]] = shufflevector <8 x i32> [[A]], <8 x i32> undef, <2 x i32> ; AVX2-NEXT: [[TMP2:%.*]] = sdiv <2 x i32> [[TMP1]], ; AVX2-NEXT: [[AB5:%.*]] = sdiv i32 [[A5]], 4 ; AVX2-NEXT: [[TMP3:%.*]] = shufflevector <8 x i32> [[A]], <8 x i32> undef, <2 x i32> ; AVX2-NEXT: [[TMP4:%.*]] = sdiv <2 x i32> [[TMP3]], -; AVX2-NEXT: [[R1:%.*]] = insertelement <8 x i32> poison, i32 [[AB1]], i32 1 +; AVX2-NEXT: [[R1:%.*]] = insertelement <8 x i32> poison, i32 [[AB1]], i64 1 ; AVX2-NEXT: [[TMP5:%.*]] = shufflevector <2 x i32> [[TMP2]], <2 x i32> poison, <8 x i32> ; AVX2-NEXT: [[R32:%.*]] = shufflevector <8 x i32> [[R1]], <8 x i32> [[TMP5]], <8 x i32> -; AVX2-NEXT: [[R5:%.*]] = insertelement <8 x i32> [[R32]], i32 [[AB5]], i32 5 +; AVX2-NEXT: [[R5:%.*]] = insertelement <8 x i32> [[R32]], i32 [[AB5]], i64 5 ; AVX2-NEXT: [[TMP6:%.*]] = shufflevector <2 x i32> [[TMP4]], <2 x i32> poison, <8 x i32> ; AVX2-NEXT: [[R71:%.*]] = shufflevector <8 x i32> [[R5]], <8 x i32> [[TMP6]], <8 x i32> ; AVX2-NEXT: ret <8 x i32> [[R71]] ; ; AVX512-LABEL: @sdiv_v8i32_undefs( -; AVX512-NEXT: [[A1:%.*]] = extractelement <8 x i32> [[A:%.*]], i32 1 -; AVX512-NEXT: [[A5:%.*]] = extractelement <8 x i32> [[A]], i32 5 +; AVX512-NEXT: [[A1:%.*]] = extractelement <8 x i32> [[A:%.*]], i64 1 +; AVX512-NEXT: [[A5:%.*]] = extractelement <8 x i32> [[A]], i64 5 ; AVX512-NEXT: [[AB1:%.*]] = sdiv i32 [[A1]], 4 ; AVX512-NEXT: [[TMP1:%.*]] = shufflevector <8 x i32> [[A]], <8 x i32> undef, <2 x i32> ; AVX512-NEXT: [[TMP2:%.*]] = sdiv <2 x i32> [[TMP1]], ; AVX512-NEXT: [[AB5:%.*]] = sdiv i32 [[A5]], 4 ; AVX512-NEXT: [[TMP3:%.*]] = shufflevector <8 x i32> [[A]], <8 x i32> undef, <2 x i32> ; AVX512-NEXT: [[TMP4:%.*]] = sdiv <2 x i32> [[TMP3]], -; AVX512-NEXT: [[R1:%.*]] = insertelement <8 x i32> poison, i32 [[AB1]], i32 1 +; AVX512-NEXT: [[R1:%.*]] = insertelement <8 x i32> poison, i32 [[AB1]], i64 1 ; AVX512-NEXT: [[TMP5:%.*]] = shufflevector <2 x i32> [[TMP2]], <2 x i32> poison, <8 x i32> ; AVX512-NEXT: [[R32:%.*]] = shufflevector <8 x i32> [[R1]], <8 x i32> [[TMP5]], <8 x i32> -; AVX512-NEXT: [[R5:%.*]] = insertelement <8 x i32> [[R32]], i32 [[AB5]], i32 5 +; AVX512-NEXT: [[R5:%.*]] = insertelement <8 x i32> [[R32]], i32 [[AB5]], i64 5 ; AVX512-NEXT: [[TMP6:%.*]] = shufflevector <2 x i32> [[TMP4]], <2 x i32> poison, <8 x i32> ; AVX512-NEXT: [[R71:%.*]] = shufflevector <8 x i32> [[R5]], <8 x i32> [[TMP6]], <8 x i32> ; AVX512-NEXT: ret <8 x i32> [[R71]] @@ -496,7 +496,7 @@ define <8 x i32> @add_sub_v8i32_splat(<8 x i32> %a, i32 %b) { ; CHECK-LABEL: @add_sub_v8i32_splat( -; CHECK-NEXT: [[TMP1:%.*]] = insertelement <8 x i32> poison, i32 [[B:%.*]], i32 0 +; CHECK-NEXT: [[TMP1:%.*]] = insertelement <8 x i32> poison, i32 [[B:%.*]], i64 0 ; CHECK-NEXT: [[SHUFFLE:%.*]] = shufflevector <8 x i32> [[TMP1]], <8 x i32> poison, <8 x i32> zeroinitializer ; CHECK-NEXT: [[TMP2:%.*]] = add <8 x i32> [[SHUFFLE]], [[A:%.*]] ; CHECK-NEXT: [[TMP3:%.*]] = sub <8 x i32> [[SHUFFLE]], [[A]] diff --git a/llvm/test/Transforms/SLPVectorizer/X86/alternate-int.ll b/llvm/test/Transforms/SLPVectorizer/X86/alternate-int.ll --- a/llvm/test/Transforms/SLPVectorizer/X86/alternate-int.ll +++ b/llvm/test/Transforms/SLPVectorizer/X86/alternate-int.ll @@ -371,98 +371,98 @@ define <8 x i32> @sdiv_v8i32_undefs(<8 x i32> %a) { ; SSE-LABEL: @sdiv_v8i32_undefs( -; SSE-NEXT: [[A1:%.*]] = extractelement <8 x i32> [[A:%.*]], i32 1 -; SSE-NEXT: [[A2:%.*]] = extractelement <8 x i32> [[A]], i32 2 -; SSE-NEXT: [[A3:%.*]] = extractelement <8 x i32> [[A]], i32 3 -; SSE-NEXT: [[A5:%.*]] = extractelement <8 x i32> [[A]], i32 5 -; SSE-NEXT: [[A6:%.*]] = extractelement <8 x i32> [[A]], i32 6 -; SSE-NEXT: [[A7:%.*]] = extractelement <8 x i32> [[A]], i32 7 +; SSE-NEXT: [[A1:%.*]] = extractelement <8 x i32> [[A:%.*]], i64 1 +; SSE-NEXT: [[A2:%.*]] = extractelement <8 x i32> [[A]], i64 2 +; SSE-NEXT: [[A3:%.*]] = extractelement <8 x i32> [[A]], i64 3 +; SSE-NEXT: [[A5:%.*]] = extractelement <8 x i32> [[A]], i64 5 +; SSE-NEXT: [[A6:%.*]] = extractelement <8 x i32> [[A]], i64 6 +; SSE-NEXT: [[A7:%.*]] = extractelement <8 x i32> [[A]], i64 7 ; SSE-NEXT: [[AB1:%.*]] = sdiv i32 [[A1]], 4 ; SSE-NEXT: [[AB2:%.*]] = sdiv i32 [[A2]], 8 ; SSE-NEXT: [[AB3:%.*]] = sdiv i32 [[A3]], 16 ; SSE-NEXT: [[AB5:%.*]] = sdiv i32 [[A5]], 4 ; SSE-NEXT: [[AB6:%.*]] = sdiv i32 [[A6]], 8 ; SSE-NEXT: [[AB7:%.*]] = sdiv i32 [[A7]], 16 -; SSE-NEXT: [[R1:%.*]] = insertelement <8 x i32> , i32 [[AB1]], i32 1 -; SSE-NEXT: [[R2:%.*]] = insertelement <8 x i32> [[R1]], i32 [[AB2]], i32 2 -; SSE-NEXT: [[R3:%.*]] = insertelement <8 x i32> [[R2]], i32 [[AB3]], i32 3 -; SSE-NEXT: [[R5:%.*]] = insertelement <8 x i32> [[R3]], i32 [[AB5]], i32 5 -; SSE-NEXT: [[R6:%.*]] = insertelement <8 x i32> [[R5]], i32 [[AB6]], i32 6 -; SSE-NEXT: [[R7:%.*]] = insertelement <8 x i32> [[R6]], i32 [[AB7]], i32 7 +; SSE-NEXT: [[R1:%.*]] = insertelement <8 x i32> , i32 [[AB1]], i64 1 +; SSE-NEXT: [[R2:%.*]] = insertelement <8 x i32> [[R1]], i32 [[AB2]], i64 2 +; SSE-NEXT: [[R3:%.*]] = insertelement <8 x i32> [[R2]], i32 [[AB3]], i64 3 +; SSE-NEXT: [[R5:%.*]] = insertelement <8 x i32> [[R3]], i32 [[AB5]], i64 5 +; SSE-NEXT: [[R6:%.*]] = insertelement <8 x i32> [[R5]], i32 [[AB6]], i64 6 +; SSE-NEXT: [[R7:%.*]] = insertelement <8 x i32> [[R6]], i32 [[AB7]], i64 7 ; SSE-NEXT: ret <8 x i32> [[R7]] ; ; SLM-LABEL: @sdiv_v8i32_undefs( -; SLM-NEXT: [[A1:%.*]] = extractelement <8 x i32> [[A:%.*]], i32 1 -; SLM-NEXT: [[A2:%.*]] = extractelement <8 x i32> [[A]], i32 2 -; SLM-NEXT: [[A3:%.*]] = extractelement <8 x i32> [[A]], i32 3 -; SLM-NEXT: [[A5:%.*]] = extractelement <8 x i32> [[A]], i32 5 -; SLM-NEXT: [[A6:%.*]] = extractelement <8 x i32> [[A]], i32 6 -; SLM-NEXT: [[A7:%.*]] = extractelement <8 x i32> [[A]], i32 7 +; SLM-NEXT: [[A1:%.*]] = extractelement <8 x i32> [[A:%.*]], i64 1 +; SLM-NEXT: [[A2:%.*]] = extractelement <8 x i32> [[A]], i64 2 +; SLM-NEXT: [[A3:%.*]] = extractelement <8 x i32> [[A]], i64 3 +; SLM-NEXT: [[A5:%.*]] = extractelement <8 x i32> [[A]], i64 5 +; SLM-NEXT: [[A6:%.*]] = extractelement <8 x i32> [[A]], i64 6 +; SLM-NEXT: [[A7:%.*]] = extractelement <8 x i32> [[A]], i64 7 ; SLM-NEXT: [[AB1:%.*]] = sdiv i32 [[A1]], 4 ; SLM-NEXT: [[AB2:%.*]] = sdiv i32 [[A2]], 8 ; SLM-NEXT: [[AB3:%.*]] = sdiv i32 [[A3]], 16 ; SLM-NEXT: [[AB5:%.*]] = sdiv i32 [[A5]], 4 ; SLM-NEXT: [[AB6:%.*]] = sdiv i32 [[A6]], 8 ; SLM-NEXT: [[AB7:%.*]] = sdiv i32 [[A7]], 16 -; SLM-NEXT: [[R1:%.*]] = insertelement <8 x i32> , i32 [[AB1]], i32 1 -; SLM-NEXT: [[R2:%.*]] = insertelement <8 x i32> [[R1]], i32 [[AB2]], i32 2 -; SLM-NEXT: [[R3:%.*]] = insertelement <8 x i32> [[R2]], i32 [[AB3]], i32 3 -; SLM-NEXT: [[R5:%.*]] = insertelement <8 x i32> [[R3]], i32 [[AB5]], i32 5 -; SLM-NEXT: [[R6:%.*]] = insertelement <8 x i32> [[R5]], i32 [[AB6]], i32 6 -; SLM-NEXT: [[R7:%.*]] = insertelement <8 x i32> [[R6]], i32 [[AB7]], i32 7 +; SLM-NEXT: [[R1:%.*]] = insertelement <8 x i32> , i32 [[AB1]], i64 1 +; SLM-NEXT: [[R2:%.*]] = insertelement <8 x i32> [[R1]], i32 [[AB2]], i64 2 +; SLM-NEXT: [[R3:%.*]] = insertelement <8 x i32> [[R2]], i32 [[AB3]], i64 3 +; SLM-NEXT: [[R5:%.*]] = insertelement <8 x i32> [[R3]], i32 [[AB5]], i64 5 +; SLM-NEXT: [[R6:%.*]] = insertelement <8 x i32> [[R5]], i32 [[AB6]], i64 6 +; SLM-NEXT: [[R7:%.*]] = insertelement <8 x i32> [[R6]], i32 [[AB7]], i64 7 ; SLM-NEXT: ret <8 x i32> [[R7]] ; ; AVX1-LABEL: @sdiv_v8i32_undefs( -; AVX1-NEXT: [[A1:%.*]] = extractelement <8 x i32> [[A:%.*]], i32 1 -; AVX1-NEXT: [[A2:%.*]] = extractelement <8 x i32> [[A]], i32 2 -; AVX1-NEXT: [[A3:%.*]] = extractelement <8 x i32> [[A]], i32 3 -; AVX1-NEXT: [[A5:%.*]] = extractelement <8 x i32> [[A]], i32 5 -; AVX1-NEXT: [[A6:%.*]] = extractelement <8 x i32> [[A]], i32 6 -; AVX1-NEXT: [[A7:%.*]] = extractelement <8 x i32> [[A]], i32 7 +; AVX1-NEXT: [[A1:%.*]] = extractelement <8 x i32> [[A:%.*]], i64 1 +; AVX1-NEXT: [[A2:%.*]] = extractelement <8 x i32> [[A]], i64 2 +; AVX1-NEXT: [[A3:%.*]] = extractelement <8 x i32> [[A]], i64 3 +; AVX1-NEXT: [[A5:%.*]] = extractelement <8 x i32> [[A]], i64 5 +; AVX1-NEXT: [[A6:%.*]] = extractelement <8 x i32> [[A]], i64 6 +; AVX1-NEXT: [[A7:%.*]] = extractelement <8 x i32> [[A]], i64 7 ; AVX1-NEXT: [[AB1:%.*]] = sdiv i32 [[A1]], 4 ; AVX1-NEXT: [[AB2:%.*]] = sdiv i32 [[A2]], 8 ; AVX1-NEXT: [[AB3:%.*]] = sdiv i32 [[A3]], 16 ; AVX1-NEXT: [[AB5:%.*]] = sdiv i32 [[A5]], 4 ; AVX1-NEXT: [[AB6:%.*]] = sdiv i32 [[A6]], 8 ; AVX1-NEXT: [[AB7:%.*]] = sdiv i32 [[A7]], 16 -; AVX1-NEXT: [[R1:%.*]] = insertelement <8 x i32> , i32 [[AB1]], i32 1 -; AVX1-NEXT: [[R2:%.*]] = insertelement <8 x i32> [[R1]], i32 [[AB2]], i32 2 -; AVX1-NEXT: [[R3:%.*]] = insertelement <8 x i32> [[R2]], i32 [[AB3]], i32 3 -; AVX1-NEXT: [[R5:%.*]] = insertelement <8 x i32> [[R3]], i32 [[AB5]], i32 5 -; AVX1-NEXT: [[R6:%.*]] = insertelement <8 x i32> [[R5]], i32 [[AB6]], i32 6 -; AVX1-NEXT: [[R7:%.*]] = insertelement <8 x i32> [[R6]], i32 [[AB7]], i32 7 +; AVX1-NEXT: [[R1:%.*]] = insertelement <8 x i32> , i32 [[AB1]], i64 1 +; AVX1-NEXT: [[R2:%.*]] = insertelement <8 x i32> [[R1]], i32 [[AB2]], i64 2 +; AVX1-NEXT: [[R3:%.*]] = insertelement <8 x i32> [[R2]], i32 [[AB3]], i64 3 +; AVX1-NEXT: [[R5:%.*]] = insertelement <8 x i32> [[R3]], i32 [[AB5]], i64 5 +; AVX1-NEXT: [[R6:%.*]] = insertelement <8 x i32> [[R5]], i32 [[AB6]], i64 6 +; AVX1-NEXT: [[R7:%.*]] = insertelement <8 x i32> [[R6]], i32 [[AB7]], i64 7 ; AVX1-NEXT: ret <8 x i32> [[R7]] ; ; AVX2-LABEL: @sdiv_v8i32_undefs( -; AVX2-NEXT: [[A1:%.*]] = extractelement <8 x i32> [[A:%.*]], i32 1 -; AVX2-NEXT: [[A5:%.*]] = extractelement <8 x i32> [[A]], i32 5 +; AVX2-NEXT: [[A1:%.*]] = extractelement <8 x i32> [[A:%.*]], i64 1 +; AVX2-NEXT: [[A5:%.*]] = extractelement <8 x i32> [[A]], i64 5 ; AVX2-NEXT: [[AB1:%.*]] = sdiv i32 [[A1]], 4 ; AVX2-NEXT: [[TMP1:%.*]] = shufflevector <8 x i32> [[A]], <8 x i32> undef, <2 x i32> ; AVX2-NEXT: [[TMP2:%.*]] = sdiv <2 x i32> [[TMP1]], ; AVX2-NEXT: [[AB5:%.*]] = sdiv i32 [[A5]], 4 ; AVX2-NEXT: [[TMP3:%.*]] = shufflevector <8 x i32> [[A]], <8 x i32> undef, <2 x i32> ; AVX2-NEXT: [[TMP4:%.*]] = sdiv <2 x i32> [[TMP3]], -; AVX2-NEXT: [[R1:%.*]] = insertelement <8 x i32> , i32 [[AB1]], i32 1 +; AVX2-NEXT: [[R1:%.*]] = insertelement <8 x i32> , i32 [[AB1]], i64 1 ; AVX2-NEXT: [[TMP5:%.*]] = shufflevector <2 x i32> [[TMP2]], <2 x i32> poison, <8 x i32> ; AVX2-NEXT: [[R32:%.*]] = shufflevector <8 x i32> [[R1]], <8 x i32> [[TMP5]], <8 x i32> -; AVX2-NEXT: [[R5:%.*]] = insertelement <8 x i32> [[R32]], i32 [[AB5]], i32 5 +; AVX2-NEXT: [[R5:%.*]] = insertelement <8 x i32> [[R32]], i32 [[AB5]], i64 5 ; AVX2-NEXT: [[TMP6:%.*]] = shufflevector <2 x i32> [[TMP4]], <2 x i32> poison, <8 x i32> ; AVX2-NEXT: [[R71:%.*]] = shufflevector <8 x i32> [[R5]], <8 x i32> [[TMP6]], <8 x i32> ; AVX2-NEXT: ret <8 x i32> [[R71]] ; ; AVX512-LABEL: @sdiv_v8i32_undefs( -; AVX512-NEXT: [[A1:%.*]] = extractelement <8 x i32> [[A:%.*]], i32 1 -; AVX512-NEXT: [[A5:%.*]] = extractelement <8 x i32> [[A]], i32 5 +; AVX512-NEXT: [[A1:%.*]] = extractelement <8 x i32> [[A:%.*]], i64 1 +; AVX512-NEXT: [[A5:%.*]] = extractelement <8 x i32> [[A]], i64 5 ; AVX512-NEXT: [[AB1:%.*]] = sdiv i32 [[A1]], 4 ; AVX512-NEXT: [[TMP1:%.*]] = shufflevector <8 x i32> [[A]], <8 x i32> undef, <2 x i32> ; AVX512-NEXT: [[TMP2:%.*]] = sdiv <2 x i32> [[TMP1]], ; AVX512-NEXT: [[AB5:%.*]] = sdiv i32 [[A5]], 4 ; AVX512-NEXT: [[TMP3:%.*]] = shufflevector <8 x i32> [[A]], <8 x i32> undef, <2 x i32> ; AVX512-NEXT: [[TMP4:%.*]] = sdiv <2 x i32> [[TMP3]], -; AVX512-NEXT: [[R1:%.*]] = insertelement <8 x i32> , i32 [[AB1]], i32 1 +; AVX512-NEXT: [[R1:%.*]] = insertelement <8 x i32> , i32 [[AB1]], i64 1 ; AVX512-NEXT: [[TMP5:%.*]] = shufflevector <2 x i32> [[TMP2]], <2 x i32> poison, <8 x i32> ; AVX512-NEXT: [[R32:%.*]] = shufflevector <8 x i32> [[R1]], <8 x i32> [[TMP5]], <8 x i32> -; AVX512-NEXT: [[R5:%.*]] = insertelement <8 x i32> [[R32]], i32 [[AB5]], i32 5 +; AVX512-NEXT: [[R5:%.*]] = insertelement <8 x i32> [[R32]], i32 [[AB5]], i64 5 ; AVX512-NEXT: [[TMP6:%.*]] = shufflevector <2 x i32> [[TMP4]], <2 x i32> poison, <8 x i32> ; AVX512-NEXT: [[R71:%.*]] = shufflevector <8 x i32> [[R5]], <8 x i32> [[TMP6]], <8 x i32> ; AVX512-NEXT: ret <8 x i32> [[R71]] @@ -496,7 +496,7 @@ define <8 x i32> @add_sub_v8i32_splat(<8 x i32> %a, i32 %b) { ; CHECK-LABEL: @add_sub_v8i32_splat( -; CHECK-NEXT: [[TMP1:%.*]] = insertelement <8 x i32> poison, i32 [[B:%.*]], i32 0 +; CHECK-NEXT: [[TMP1:%.*]] = insertelement <8 x i32> poison, i32 [[B:%.*]], i64 0 ; CHECK-NEXT: [[SHUFFLE:%.*]] = shufflevector <8 x i32> [[TMP1]], <8 x i32> poison, <8 x i32> zeroinitializer ; CHECK-NEXT: [[TMP2:%.*]] = add <8 x i32> [[SHUFFLE]], [[A:%.*]] ; CHECK-NEXT: [[TMP3:%.*]] = sub <8 x i32> [[SHUFFLE]], [[A]] diff --git a/llvm/test/Transforms/SLPVectorizer/X86/blending-shuffle-inseltpoison.ll b/llvm/test/Transforms/SLPVectorizer/X86/blending-shuffle-inseltpoison.ll --- a/llvm/test/Transforms/SLPVectorizer/X86/blending-shuffle-inseltpoison.ll +++ b/llvm/test/Transforms/SLPVectorizer/X86/blending-shuffle-inseltpoison.ll @@ -81,10 +81,10 @@ define i8 @j(<4 x i8> %x, <4 x i8> %y) { ; CHECK-LABEL: @j( -; CHECK-NEXT: [[X0:%.*]] = extractelement <4 x i8> [[X:%.*]], i32 0 -; CHECK-NEXT: [[X3:%.*]] = extractelement <4 x i8> [[X]], i32 3 -; CHECK-NEXT: [[Y1:%.*]] = extractelement <4 x i8> [[Y:%.*]], i32 1 -; CHECK-NEXT: [[Y2:%.*]] = extractelement <4 x i8> [[Y]], i32 2 +; CHECK-NEXT: [[X0:%.*]] = extractelement <4 x i8> [[X:%.*]], i64 0 +; CHECK-NEXT: [[X3:%.*]] = extractelement <4 x i8> [[X]], i64 3 +; CHECK-NEXT: [[Y1:%.*]] = extractelement <4 x i8> [[Y:%.*]], i64 1 +; CHECK-NEXT: [[Y2:%.*]] = extractelement <4 x i8> [[Y]], i64 2 ; CHECK-NEXT: [[X0X0:%.*]] = mul i8 [[X0]], [[X0]] ; CHECK-NEXT: [[X3X3:%.*]] = mul i8 [[X3]], [[X3]] ; CHECK-NEXT: [[Y1Y1:%.*]] = mul i8 [[Y1]], [[Y1]] @@ -110,10 +110,10 @@ define i8 @k(<4 x i8> %x) { ; CHECK-LABEL: @k( -; CHECK-NEXT: [[X0:%.*]] = extractelement <4 x i8> [[X:%.*]], i32 0 -; CHECK-NEXT: [[X3:%.*]] = extractelement <4 x i8> [[X]], i32 3 -; CHECK-NEXT: [[X1:%.*]] = extractelement <4 x i8> [[X]], i32 1 -; CHECK-NEXT: [[X2:%.*]] = extractelement <4 x i8> [[X]], i32 2 +; CHECK-NEXT: [[X0:%.*]] = extractelement <4 x i8> [[X:%.*]], i64 0 +; CHECK-NEXT: [[X3:%.*]] = extractelement <4 x i8> [[X]], i64 3 +; CHECK-NEXT: [[X1:%.*]] = extractelement <4 x i8> [[X]], i64 1 +; CHECK-NEXT: [[X2:%.*]] = extractelement <4 x i8> [[X]], i64 2 ; CHECK-NEXT: [[X0X0:%.*]] = mul i8 [[X0]], [[X0]] ; CHECK-NEXT: [[X3X3:%.*]] = mul i8 [[X3]], [[X3]] ; CHECK-NEXT: [[X1X1:%.*]] = mul i8 [[X1]], [[X1]] @@ -141,10 +141,10 @@ ; CHECK-LABEL: @k_bb( ; CHECK-NEXT: br label [[BB1:%.*]] ; CHECK: bb1: -; CHECK-NEXT: [[X0:%.*]] = extractelement <4 x i8> [[X:%.*]], i32 0 -; CHECK-NEXT: [[X3:%.*]] = extractelement <4 x i8> [[X]], i32 3 -; CHECK-NEXT: [[X1:%.*]] = extractelement <4 x i8> [[X]], i32 1 -; CHECK-NEXT: [[X2:%.*]] = extractelement <4 x i8> [[X]], i32 2 +; CHECK-NEXT: [[X0:%.*]] = extractelement <4 x i8> [[X:%.*]], i64 0 +; CHECK-NEXT: [[X3:%.*]] = extractelement <4 x i8> [[X]], i64 3 +; CHECK-NEXT: [[X1:%.*]] = extractelement <4 x i8> [[X]], i64 1 +; CHECK-NEXT: [[X2:%.*]] = extractelement <4 x i8> [[X]], i64 2 ; CHECK-NEXT: [[X0X0:%.*]] = mul i8 [[X0]], [[X0]] ; CHECK-NEXT: [[X3X3:%.*]] = mul i8 [[X3]], [[X3]] ; CHECK-NEXT: [[X1X1:%.*]] = mul i8 [[X1]], [[X1]] diff --git a/llvm/test/Transforms/SLPVectorizer/X86/blending-shuffle.ll b/llvm/test/Transforms/SLPVectorizer/X86/blending-shuffle.ll --- a/llvm/test/Transforms/SLPVectorizer/X86/blending-shuffle.ll +++ b/llvm/test/Transforms/SLPVectorizer/X86/blending-shuffle.ll @@ -81,10 +81,10 @@ define i8 @j(<4 x i8> %x, <4 x i8> %y) { ; CHECK-LABEL: @j( -; CHECK-NEXT: [[X0:%.*]] = extractelement <4 x i8> [[X:%.*]], i32 0 -; CHECK-NEXT: [[X3:%.*]] = extractelement <4 x i8> [[X]], i32 3 -; CHECK-NEXT: [[Y1:%.*]] = extractelement <4 x i8> [[Y:%.*]], i32 1 -; CHECK-NEXT: [[Y2:%.*]] = extractelement <4 x i8> [[Y]], i32 2 +; CHECK-NEXT: [[X0:%.*]] = extractelement <4 x i8> [[X:%.*]], i64 0 +; CHECK-NEXT: [[X3:%.*]] = extractelement <4 x i8> [[X]], i64 3 +; CHECK-NEXT: [[Y1:%.*]] = extractelement <4 x i8> [[Y:%.*]], i64 1 +; CHECK-NEXT: [[Y2:%.*]] = extractelement <4 x i8> [[Y]], i64 2 ; CHECK-NEXT: [[X0X0:%.*]] = mul i8 [[X0]], [[X0]] ; CHECK-NEXT: [[X3X3:%.*]] = mul i8 [[X3]], [[X3]] ; CHECK-NEXT: [[Y1Y1:%.*]] = mul i8 [[Y1]], [[Y1]] @@ -110,10 +110,10 @@ define i8 @k(<4 x i8> %x) { ; CHECK-LABEL: @k( -; CHECK-NEXT: [[X0:%.*]] = extractelement <4 x i8> [[X:%.*]], i32 0 -; CHECK-NEXT: [[X3:%.*]] = extractelement <4 x i8> [[X]], i32 3 -; CHECK-NEXT: [[X1:%.*]] = extractelement <4 x i8> [[X]], i32 1 -; CHECK-NEXT: [[X2:%.*]] = extractelement <4 x i8> [[X]], i32 2 +; CHECK-NEXT: [[X0:%.*]] = extractelement <4 x i8> [[X:%.*]], i64 0 +; CHECK-NEXT: [[X3:%.*]] = extractelement <4 x i8> [[X]], i64 3 +; CHECK-NEXT: [[X1:%.*]] = extractelement <4 x i8> [[X]], i64 1 +; CHECK-NEXT: [[X2:%.*]] = extractelement <4 x i8> [[X]], i64 2 ; CHECK-NEXT: [[X0X0:%.*]] = mul i8 [[X0]], [[X0]] ; CHECK-NEXT: [[X3X3:%.*]] = mul i8 [[X3]], [[X3]] ; CHECK-NEXT: [[X1X1:%.*]] = mul i8 [[X1]], [[X1]] @@ -141,10 +141,10 @@ ; CHECK-LABEL: @k_bb( ; CHECK-NEXT: br label [[BB1:%.*]] ; CHECK: bb1: -; CHECK-NEXT: [[X0:%.*]] = extractelement <4 x i8> [[X:%.*]], i32 0 -; CHECK-NEXT: [[X3:%.*]] = extractelement <4 x i8> [[X]], i32 3 -; CHECK-NEXT: [[X1:%.*]] = extractelement <4 x i8> [[X]], i32 1 -; CHECK-NEXT: [[X2:%.*]] = extractelement <4 x i8> [[X]], i32 2 +; CHECK-NEXT: [[X0:%.*]] = extractelement <4 x i8> [[X:%.*]], i64 0 +; CHECK-NEXT: [[X3:%.*]] = extractelement <4 x i8> [[X]], i64 3 +; CHECK-NEXT: [[X1:%.*]] = extractelement <4 x i8> [[X]], i64 1 +; CHECK-NEXT: [[X2:%.*]] = extractelement <4 x i8> [[X]], i64 2 ; CHECK-NEXT: [[X0X0:%.*]] = mul i8 [[X0]], [[X0]] ; CHECK-NEXT: [[X3X3:%.*]] = mul i8 [[X3]], [[X3]] ; CHECK-NEXT: [[X1X1:%.*]] = mul i8 [[X1]], [[X1]] diff --git a/llvm/test/Transforms/SLPVectorizer/X86/cmp_commute-inseltpoison.ll b/llvm/test/Transforms/SLPVectorizer/X86/cmp_commute-inseltpoison.ll --- a/llvm/test/Transforms/SLPVectorizer/X86/cmp_commute-inseltpoison.ll +++ b/llvm/test/Transforms/SLPVectorizer/X86/cmp_commute-inseltpoison.ll @@ -245,8 +245,8 @@ ; SSE-NEXT: [[TMP3:%.*]] = shufflevector <4 x float> [[A:%.*]], <4 x float> undef, <2 x i32> ; SSE-NEXT: [[TMP4:%.*]] = fcmp uno <2 x float> [[TMP2]], [[TMP3]] ; SSE-NEXT: [[TMP5:%.*]] = shufflevector <4 x float> [[A]], <4 x float> undef, <2 x i32> -; SSE-NEXT: [[TMP6:%.*]] = insertelement <2 x float> poison, float [[B3]], i32 0 -; SSE-NEXT: [[TMP7:%.*]] = insertelement <2 x float> [[TMP6]], float [[B0]], i32 1 +; SSE-NEXT: [[TMP6:%.*]] = insertelement <2 x float> poison, float [[B3]], i64 0 +; SSE-NEXT: [[TMP7:%.*]] = insertelement <2 x float> [[TMP6]], float [[B0]], i64 1 ; SSE-NEXT: [[TMP8:%.*]] = fcmp ord <2 x float> [[TMP5]], [[TMP7]] ; SSE-NEXT: [[TMP9:%.*]] = shufflevector <2 x i1> [[TMP8]], <2 x i1> poison, <4 x i32> ; SSE-NEXT: [[D0:%.*]] = shufflevector <2 x i1> [[TMP8]], <2 x i1> undef, <4 x i32> @@ -257,8 +257,8 @@ ; SSE-NEXT: ret <4 x i32> [[R]] ; ; AVX-LABEL: @fcmp_ord_uno_v4i32( -; AVX-NEXT: [[A0:%.*]] = extractelement <4 x float> [[A:%.*]], i32 0 -; AVX-NEXT: [[A3:%.*]] = extractelement <4 x float> [[A]], i32 3 +; AVX-NEXT: [[A0:%.*]] = extractelement <4 x float> [[A:%.*]], i64 0 +; AVX-NEXT: [[A3:%.*]] = extractelement <4 x float> [[A]], i64 3 ; AVX-NEXT: [[P1:%.*]] = getelementptr inbounds float, float* [[B:%.*]], i64 1 ; AVX-NEXT: [[P3:%.*]] = getelementptr inbounds float, float* [[B]], i64 3 ; AVX-NEXT: [[B0:%.*]] = load float, float* [[B]], align 4 @@ -269,10 +269,10 @@ ; AVX-NEXT: [[TMP3:%.*]] = shufflevector <4 x float> [[A]], <4 x float> undef, <2 x i32> ; AVX-NEXT: [[TMP4:%.*]] = fcmp uno <2 x float> [[TMP2]], [[TMP3]] ; AVX-NEXT: [[C3:%.*]] = fcmp ord float [[A3]], [[B3]] -; AVX-NEXT: [[D0:%.*]] = insertelement <4 x i1> poison, i1 [[C0]], i32 0 +; AVX-NEXT: [[D0:%.*]] = insertelement <4 x i1> poison, i1 [[C0]], i64 0 ; AVX-NEXT: [[TMP5:%.*]] = shufflevector <2 x i1> [[TMP4]], <2 x i1> poison, <4 x i32> ; AVX-NEXT: [[D21:%.*]] = shufflevector <4 x i1> [[D0]], <4 x i1> [[TMP5]], <4 x i32> -; AVX-NEXT: [[D3:%.*]] = insertelement <4 x i1> [[D21]], i1 [[C3]], i32 3 +; AVX-NEXT: [[D3:%.*]] = insertelement <4 x i1> [[D21]], i1 [[C3]], i64 3 ; AVX-NEXT: [[R:%.*]] = sext <4 x i1> [[D3]] to <4 x i32> ; AVX-NEXT: ret <4 x i32> [[R]] ; diff --git a/llvm/test/Transforms/SLPVectorizer/X86/cmp_commute.ll b/llvm/test/Transforms/SLPVectorizer/X86/cmp_commute.ll --- a/llvm/test/Transforms/SLPVectorizer/X86/cmp_commute.ll +++ b/llvm/test/Transforms/SLPVectorizer/X86/cmp_commute.ll @@ -245,8 +245,8 @@ ; SSE-NEXT: [[TMP3:%.*]] = shufflevector <4 x float> [[A:%.*]], <4 x float> undef, <2 x i32> ; SSE-NEXT: [[TMP4:%.*]] = fcmp uno <2 x float> [[TMP2]], [[TMP3]] ; SSE-NEXT: [[TMP5:%.*]] = shufflevector <4 x float> [[A]], <4 x float> undef, <2 x i32> -; SSE-NEXT: [[TMP6:%.*]] = insertelement <2 x float> poison, float [[B3]], i32 0 -; SSE-NEXT: [[TMP7:%.*]] = insertelement <2 x float> [[TMP6]], float [[B0]], i32 1 +; SSE-NEXT: [[TMP6:%.*]] = insertelement <2 x float> poison, float [[B3]], i64 0 +; SSE-NEXT: [[TMP7:%.*]] = insertelement <2 x float> [[TMP6]], float [[B0]], i64 1 ; SSE-NEXT: [[TMP8:%.*]] = fcmp ord <2 x float> [[TMP5]], [[TMP7]] ; SSE-NEXT: [[TMP9:%.*]] = shufflevector <2 x i1> [[TMP8]], <2 x i1> poison, <4 x i32> ; SSE-NEXT: [[D0:%.*]] = shufflevector <2 x i1> [[TMP8]], <2 x i1> undef, <4 x i32> @@ -257,8 +257,8 @@ ; SSE-NEXT: ret <4 x i32> [[R]] ; ; AVX-LABEL: @fcmp_ord_uno_v4i32( -; AVX-NEXT: [[A0:%.*]] = extractelement <4 x float> [[A:%.*]], i32 0 -; AVX-NEXT: [[A3:%.*]] = extractelement <4 x float> [[A]], i32 3 +; AVX-NEXT: [[A0:%.*]] = extractelement <4 x float> [[A:%.*]], i64 0 +; AVX-NEXT: [[A3:%.*]] = extractelement <4 x float> [[A]], i64 3 ; AVX-NEXT: [[P1:%.*]] = getelementptr inbounds float, float* [[B:%.*]], i64 1 ; AVX-NEXT: [[P3:%.*]] = getelementptr inbounds float, float* [[B]], i64 3 ; AVX-NEXT: [[B0:%.*]] = load float, float* [[B]], align 4 @@ -269,10 +269,10 @@ ; AVX-NEXT: [[TMP3:%.*]] = shufflevector <4 x float> [[A]], <4 x float> undef, <2 x i32> ; AVX-NEXT: [[TMP4:%.*]] = fcmp uno <2 x float> [[TMP2]], [[TMP3]] ; AVX-NEXT: [[C3:%.*]] = fcmp ord float [[A3]], [[B3]] -; AVX-NEXT: [[D0:%.*]] = insertelement <4 x i1> undef, i1 [[C0]], i32 0 +; AVX-NEXT: [[D0:%.*]] = insertelement <4 x i1> undef, i1 [[C0]], i64 0 ; AVX-NEXT: [[TMP5:%.*]] = shufflevector <2 x i1> [[TMP4]], <2 x i1> poison, <4 x i32> ; AVX-NEXT: [[D21:%.*]] = shufflevector <4 x i1> [[D0]], <4 x i1> [[TMP5]], <4 x i32> -; AVX-NEXT: [[D3:%.*]] = insertelement <4 x i1> [[D21]], i1 [[C3]], i32 3 +; AVX-NEXT: [[D3:%.*]] = insertelement <4 x i1> [[D21]], i1 [[C3]], i64 3 ; AVX-NEXT: [[R:%.*]] = sext <4 x i1> [[D3]] to <4 x i32> ; AVX-NEXT: ret <4 x i32> [[R]] ; diff --git a/llvm/test/Transforms/SLPVectorizer/X86/minimum-sizes.ll b/llvm/test/Transforms/SLPVectorizer/X86/minimum-sizes.ll --- a/llvm/test/Transforms/SLPVectorizer/X86/minimum-sizes.ll +++ b/llvm/test/Transforms/SLPVectorizer/X86/minimum-sizes.ll @@ -15,13 +15,13 @@ define i8 @PR31243_zext(i8 %v0, i8 %v1, i8 %v2, i8 %v3, i8* %ptr) { ; CHECK-LABEL: @PR31243_zext( ; CHECK-NEXT: entry: -; CHECK-NEXT: [[TMP0:%.*]] = insertelement <2 x i8> poison, i8 [[V0:%.*]], i32 0 -; CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x i8> [[TMP0]], i8 [[V1:%.*]], i32 1 +; CHECK-NEXT: [[TMP0:%.*]] = insertelement <2 x i8> poison, i8 [[V0:%.*]], i64 0 +; CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x i8> [[TMP0]], i8 [[V1:%.*]], i64 1 ; CHECK-NEXT: [[TMP2:%.*]] = or <2 x i8> [[TMP1]], -; CHECK-NEXT: [[TMP3:%.*]] = extractelement <2 x i8> [[TMP2]], i32 0 +; CHECK-NEXT: [[TMP3:%.*]] = extractelement <2 x i8> [[TMP2]], i64 0 ; CHECK-NEXT: [[TMP4:%.*]] = zext i8 [[TMP3]] to i64 ; CHECK-NEXT: [[TMP_4:%.*]] = getelementptr inbounds i8, i8* [[PTR:%.*]], i64 [[TMP4]] -; CHECK-NEXT: [[TMP5:%.*]] = extractelement <2 x i8> [[TMP2]], i32 1 +; CHECK-NEXT: [[TMP5:%.*]] = extractelement <2 x i8> [[TMP2]], i64 1 ; CHECK-NEXT: [[TMP6:%.*]] = zext i8 [[TMP5]] to i64 ; CHECK-NEXT: [[TMP_5:%.*]] = getelementptr inbounds i8, i8* [[PTR]], i64 [[TMP6]] ; CHECK-NEXT: [[TMP_6:%.*]] = load i8, i8* [[TMP_4]], align 1 @@ -71,14 +71,14 @@ ; ; AVX-LABEL: @PR31243_sext( ; AVX-NEXT: entry: -; AVX-NEXT: [[TMP0:%.*]] = insertelement <2 x i8> poison, i8 [[V0:%.*]], i32 0 -; AVX-NEXT: [[TMP1:%.*]] = insertelement <2 x i8> [[TMP0]], i8 [[V1:%.*]], i32 1 +; AVX-NEXT: [[TMP0:%.*]] = insertelement <2 x i8> poison, i8 [[V0:%.*]], i64 0 +; AVX-NEXT: [[TMP1:%.*]] = insertelement <2 x i8> [[TMP0]], i8 [[V1:%.*]], i64 1 ; AVX-NEXT: [[TMP2:%.*]] = or <2 x i8> [[TMP1]], ; AVX-NEXT: [[TMP3:%.*]] = sext <2 x i8> [[TMP2]] to <2 x i16> -; AVX-NEXT: [[TMP4:%.*]] = extractelement <2 x i16> [[TMP3]], i32 0 +; AVX-NEXT: [[TMP4:%.*]] = extractelement <2 x i16> [[TMP3]], i64 0 ; AVX-NEXT: [[TMP5:%.*]] = sext i16 [[TMP4]] to i64 ; AVX-NEXT: [[TMP4:%.*]] = getelementptr inbounds i8, i8* [[PTR:%.*]], i64 [[TMP5]] -; AVX-NEXT: [[TMP6:%.*]] = extractelement <2 x i16> [[TMP3]], i32 1 +; AVX-NEXT: [[TMP6:%.*]] = extractelement <2 x i16> [[TMP3]], i64 1 ; AVX-NEXT: [[TMP7:%.*]] = sext i16 [[TMP6]] to i64 ; AVX-NEXT: [[TMP5:%.*]] = getelementptr inbounds i8, i8* [[PTR]], i64 [[TMP7]] ; AVX-NEXT: [[TMP6:%.*]] = load i8, i8* [[TMP4]], align 1 diff --git a/llvm/test/Transforms/SLPVectorizer/X86/operandorder.ll b/llvm/test/Transforms/SLPVectorizer/X86/operandorder.ll --- a/llvm/test/Transforms/SLPVectorizer/X86/operandorder.ll +++ b/llvm/test/Transforms/SLPVectorizer/X86/operandorder.ll @@ -10,8 +10,8 @@ ; CHECK-LABEL: @shuffle_operands1( ; CHECK-NEXT: [[TMP1:%.*]] = bitcast double* [[FROM:%.*]] to <2 x double>* ; CHECK-NEXT: [[TMP2:%.*]] = load <2 x double>, <2 x double>* [[TMP1]], align 4 -; CHECK-NEXT: [[TMP3:%.*]] = insertelement <2 x double> poison, double [[V1:%.*]], i32 0 -; CHECK-NEXT: [[TMP4:%.*]] = insertelement <2 x double> [[TMP3]], double [[V2:%.*]], i32 1 +; CHECK-NEXT: [[TMP3:%.*]] = insertelement <2 x double> poison, double [[V1:%.*]], i64 0 +; CHECK-NEXT: [[TMP4:%.*]] = insertelement <2 x double> [[TMP3]], double [[V2:%.*]], i64 1 ; CHECK-NEXT: [[TMP5:%.*]] = fadd <2 x double> [[TMP2]], [[TMP4]] ; CHECK-NEXT: [[TMP6:%.*]] = bitcast double* [[TO:%.*]] to <2 x double>* ; CHECK-NEXT: store <2 x double> [[TMP5]], <2 x double>* [[TMP6]], align 4 @@ -36,7 +36,7 @@ ; CHECK-NEXT: [[P:%.*]] = phi double [ 1.000000e+00, [[LP]] ], [ 0.000000e+00, [[ENTRY:%.*]] ] ; CHECK-NEXT: [[TMP0:%.*]] = bitcast double* [[FROM:%.*]] to <2 x double>* ; CHECK-NEXT: [[TMP1:%.*]] = load <2 x double>, <2 x double>* [[TMP0]], align 4 -; CHECK-NEXT: [[TMP2:%.*]] = insertelement <2 x double> poison, double [[P]], i32 0 +; CHECK-NEXT: [[TMP2:%.*]] = insertelement <2 x double> poison, double [[P]], i64 0 ; CHECK-NEXT: [[TMP3:%.*]] = shufflevector <2 x double> [[TMP2]], <2 x double> [[TMP1]], <2 x i32> ; CHECK-NEXT: [[TMP4:%.*]] = fadd <2 x double> [[TMP1]], [[TMP3]] ; CHECK-NEXT: [[TMP5:%.*]] = bitcast double* [[TO:%.*]] to <2 x double>* @@ -72,7 +72,7 @@ ; CHECK-NEXT: [[P:%.*]] = phi double [ 1.000000e+00, [[LP]] ], [ 0.000000e+00, [[ENTRY:%.*]] ] ; CHECK-NEXT: [[TMP0:%.*]] = bitcast double* [[FROM:%.*]] to <2 x double>* ; CHECK-NEXT: [[TMP1:%.*]] = load <2 x double>, <2 x double>* [[TMP0]], align 4 -; CHECK-NEXT: [[TMP2:%.*]] = insertelement <2 x double> poison, double [[P]], i32 0 +; CHECK-NEXT: [[TMP2:%.*]] = insertelement <2 x double> poison, double [[P]], i64 0 ; CHECK-NEXT: [[TMP3:%.*]] = shufflevector <2 x double> [[TMP2]], <2 x double> [[TMP1]], <2 x i32> ; CHECK-NEXT: [[TMP4:%.*]] = fadd <2 x double> [[TMP3]], [[TMP1]] ; CHECK-NEXT: [[TMP5:%.*]] = bitcast double* [[TO:%.*]] to <2 x double>* @@ -108,7 +108,7 @@ ; CHECK-NEXT: [[P:%.*]] = phi double [ 1.000000e+00, [[LP]] ], [ 0.000000e+00, [[ENTRY:%.*]] ] ; CHECK-NEXT: [[TMP0:%.*]] = bitcast double* [[FROM:%.*]] to <2 x double>* ; CHECK-NEXT: [[TMP1:%.*]] = load <2 x double>, <2 x double>* [[TMP0]], align 4 -; CHECK-NEXT: [[TMP2:%.*]] = insertelement <2 x double> poison, double [[P]], i32 0 +; CHECK-NEXT: [[TMP2:%.*]] = insertelement <2 x double> poison, double [[P]], i64 0 ; CHECK-NEXT: [[TMP3:%.*]] = shufflevector <2 x double> [[TMP2]], <2 x double> [[TMP1]], <2 x i32> ; CHECK-NEXT: [[TMP4:%.*]] = fadd <2 x double> [[TMP3]], [[TMP1]] ; CHECK-NEXT: [[TMP5:%.*]] = bitcast double* [[TO:%.*]] to <2 x double>* @@ -145,9 +145,9 @@ ; CHECK-NEXT: [[FROM_1:%.*]] = getelementptr double, double* [[FROM:%.*]], i32 1 ; CHECK-NEXT: [[V0_1:%.*]] = load double, double* [[FROM]], align 4 ; CHECK-NEXT: [[V0_2:%.*]] = load double, double* [[FROM_1]], align 4 -; CHECK-NEXT: [[TMP0:%.*]] = insertelement <2 x double> poison, double [[V0_2]], i32 0 -; CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x double> [[TMP0]], double [[P]], i32 1 -; CHECK-NEXT: [[TMP2:%.*]] = insertelement <2 x double> poison, double [[V0_1]], i32 0 +; CHECK-NEXT: [[TMP0:%.*]] = insertelement <2 x double> poison, double [[V0_2]], i64 0 +; CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x double> [[TMP0]], double [[P]], i64 1 +; CHECK-NEXT: [[TMP2:%.*]] = insertelement <2 x double> poison, double [[V0_1]], i64 0 ; CHECK-NEXT: [[TMP3:%.*]] = shufflevector <2 x double> [[TMP2]], <2 x double> poison, <2 x i32> zeroinitializer ; CHECK-NEXT: [[TMP4:%.*]] = fadd <2 x double> [[TMP1]], [[TMP3]] ; CHECK-NEXT: [[TMP5:%.*]] = bitcast double* [[TO:%.*]] to <2 x double>* @@ -183,7 +183,7 @@ ; CHECK-NEXT: [[P:%.*]] = phi double [ 1.000000e+00, [[LP]] ], [ 0.000000e+00, [[ENTRY:%.*]] ] ; CHECK-NEXT: [[TMP0:%.*]] = bitcast double* [[FROM:%.*]] to <2 x double>* ; CHECK-NEXT: [[TMP1:%.*]] = load <2 x double>, <2 x double>* [[TMP0]], align 4 -; CHECK-NEXT: [[TMP2:%.*]] = insertelement <2 x double> [[TMP1]], double [[P]], i32 1 +; CHECK-NEXT: [[TMP2:%.*]] = insertelement <2 x double> [[TMP1]], double [[P]], i64 1 ; CHECK-NEXT: [[TMP3:%.*]] = shufflevector <2 x double> [[TMP1]], <2 x double> poison, <2 x i32> ; CHECK-NEXT: [[TMP4:%.*]] = fadd <2 x double> [[TMP2]], [[TMP3]] ; CHECK-NEXT: [[TMP5:%.*]] = bitcast double* [[TO:%.*]] to <2 x double>* @@ -221,10 +221,10 @@ ; CHECK-NEXT: [[FROM_1:%.*]] = getelementptr double, double* [[FROM:%.*]], i32 1 ; CHECK-NEXT: [[V0_1:%.*]] = load double, double* [[FROM]], align 4 ; CHECK-NEXT: [[V0_2:%.*]] = load double, double* [[FROM_1]], align 4 -; CHECK-NEXT: [[TMP0:%.*]] = insertelement <2 x double> poison, double [[V0_1]], i32 0 +; CHECK-NEXT: [[TMP0:%.*]] = insertelement <2 x double> poison, double [[V0_1]], i64 0 ; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <2 x double> [[TMP0]], <2 x double> poison, <2 x i32> zeroinitializer -; CHECK-NEXT: [[TMP2:%.*]] = insertelement <2 x double> poison, double [[V0_2]], i32 0 -; CHECK-NEXT: [[TMP3:%.*]] = insertelement <2 x double> [[TMP2]], double [[P]], i32 1 +; CHECK-NEXT: [[TMP2:%.*]] = insertelement <2 x double> poison, double [[V0_2]], i64 0 +; CHECK-NEXT: [[TMP3:%.*]] = insertelement <2 x double> [[TMP2]], double [[P]], i64 1 ; CHECK-NEXT: [[TMP4:%.*]] = fadd <2 x double> [[TMP1]], [[TMP3]] ; CHECK-NEXT: [[TMP5:%.*]] = bitcast double* [[TO:%.*]] to <2 x double>* ; CHECK-NEXT: store <2 x double> [[TMP4]], <2 x double>* [[TMP5]], align 4 @@ -276,7 +276,7 @@ ; CHECK-NEXT: [[ARRAYIDX31:%.*]] = getelementptr inbounds [32000 x float], [32000 x float]* @a, i32 0, i32 [[TMP6]] ; CHECK-NEXT: [[TMP7:%.*]] = bitcast float* [[ARRAYIDX]] to <4 x float>* ; CHECK-NEXT: [[TMP8:%.*]] = load <4 x float>, <4 x float>* [[TMP7]], align 4 -; CHECK-NEXT: [[TMP9:%.*]] = insertelement <4 x float> poison, float [[TMP1]], i32 0 +; CHECK-NEXT: [[TMP9:%.*]] = insertelement <4 x float> poison, float [[TMP1]], i64 0 ; CHECK-NEXT: [[TMP10:%.*]] = shufflevector <4 x float> [[TMP9]], <4 x float> [[TMP8]], <4 x i32> ; CHECK-NEXT: [[TMP11:%.*]] = fmul <4 x float> [[TMP8]], [[TMP10]] ; CHECK-NEXT: [[TMP12:%.*]] = bitcast float* [[ARRAYIDX5]] to <4 x float>* @@ -285,7 +285,7 @@ ; CHECK-NEXT: [[TMP13:%.*]] = trunc i64 [[INDVARS_IV_NEXT]] to i32 ; CHECK-NEXT: [[ARRAYIDX41:%.*]] = getelementptr inbounds [32000 x float], [32000 x float]* @a, i32 0, i32 [[TMP13]] ; CHECK-NEXT: [[TMP14]] = load float, float* [[ARRAYIDX41]], align 4 -; CHECK-NEXT: [[TMP15:%.*]] = extractelement <4 x float> [[TMP8]], i32 3 +; CHECK-NEXT: [[TMP15:%.*]] = extractelement <4 x float> [[TMP8]], i64 3 ; CHECK-NEXT: [[MUL45:%.*]] = fmul float [[TMP14]], [[TMP15]] ; CHECK-NEXT: store float [[MUL45]], float* [[ARRAYIDX31]], align 4 ; CHECK-NEXT: [[TMP16:%.*]] = trunc i64 [[INDVARS_IV_NEXT]] to i32 diff --git a/llvm/test/Transforms/SLPVectorizer/X86/pr40522.ll b/llvm/test/Transforms/SLPVectorizer/X86/pr40522.ll --- a/llvm/test/Transforms/SLPVectorizer/X86/pr40522.ll +++ b/llvm/test/Transforms/SLPVectorizer/X86/pr40522.ll @@ -4,10 +4,10 @@ define void @test1(float %a, float %b, float %c, float %d, i32* nocapture %p) { ; CHECK-LABEL: @test1( ; CHECK-NEXT: entry: -; CHECK-NEXT: [[TMP0:%.*]] = insertelement <4 x float> poison, float [[A:%.*]], i32 0 -; CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x float> [[TMP0]], float [[B:%.*]], i32 1 -; CHECK-NEXT: [[TMP2:%.*]] = insertelement <4 x float> [[TMP1]], float [[C:%.*]], i32 2 -; CHECK-NEXT: [[TMP3:%.*]] = insertelement <4 x float> [[TMP2]], float [[D:%.*]], i32 3 +; CHECK-NEXT: [[TMP0:%.*]] = insertelement <4 x float> poison, float [[A:%.*]], i64 0 +; CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x float> [[TMP0]], float [[B:%.*]], i64 1 +; CHECK-NEXT: [[TMP2:%.*]] = insertelement <4 x float> [[TMP1]], float [[C:%.*]], i64 2 +; CHECK-NEXT: [[TMP3:%.*]] = insertelement <4 x float> [[TMP2]], float [[D:%.*]], i64 3 ; CHECK-NEXT: [[TMP4:%.*]] = fptosi <4 x float> [[TMP3]] to <4 x i32> ; CHECK-NEXT: [[TMP5:%.*]] = bitcast i32* [[P:%.*]] to <4 x i32>* ; CHECK-NEXT: store <4 x i32> [[TMP4]], <4 x i32>* [[TMP5]], align 4, !tbaa [[TBAA0:![0-9]+]] @@ -31,10 +31,10 @@ define void @test1_vec(float %a, float %b, float %c, float %d, <4 x i32>* nocapture %p) { ; CHECK-LABEL: @test1_vec( ; CHECK-NEXT: entry: -; CHECK-NEXT: [[TMP0:%.*]] = insertelement <4 x float> poison, float [[A:%.*]], i32 0 -; CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x float> [[TMP0]], float [[B:%.*]], i32 1 -; CHECK-NEXT: [[TMP2:%.*]] = insertelement <4 x float> [[TMP1]], float [[C:%.*]], i32 2 -; CHECK-NEXT: [[TMP3:%.*]] = insertelement <4 x float> [[TMP2]], float [[D:%.*]], i32 3 +; CHECK-NEXT: [[TMP0:%.*]] = insertelement <4 x float> poison, float [[A:%.*]], i64 0 +; CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x float> [[TMP0]], float [[B:%.*]], i64 1 +; CHECK-NEXT: [[TMP2:%.*]] = insertelement <4 x float> [[TMP1]], float [[C:%.*]], i64 2 +; CHECK-NEXT: [[TMP3:%.*]] = insertelement <4 x float> [[TMP2]], float [[D:%.*]], i64 3 ; CHECK-NEXT: [[TMP4:%.*]] = fptosi <4 x float> [[TMP3]] to <4 x i32> ; CHECK-NEXT: store <4 x i32> [[TMP4]], <4 x i32>* [[P:%.*]], align 16, !tbaa [[TBAA0]] ; CHECK-NEXT: ret void @@ -55,10 +55,10 @@ define void @test2(i32 %a, i32 %b, i32 %c, i32 %d, i32* nocapture %p) { ; CHECK-LABEL: @test2( ; CHECK-NEXT: entry: -; CHECK-NEXT: [[TMP0:%.*]] = insertelement <4 x i32> poison, i32 [[A:%.*]], i32 0 -; CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x i32> [[TMP0]], i32 [[B:%.*]], i32 1 -; CHECK-NEXT: [[TMP2:%.*]] = insertelement <4 x i32> [[TMP1]], i32 [[C:%.*]], i32 2 -; CHECK-NEXT: [[TMP3:%.*]] = insertelement <4 x i32> [[TMP2]], i32 [[D:%.*]], i32 3 +; CHECK-NEXT: [[TMP0:%.*]] = insertelement <4 x i32> poison, i32 [[A:%.*]], i64 0 +; CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x i32> [[TMP0]], i32 [[B:%.*]], i64 1 +; CHECK-NEXT: [[TMP2:%.*]] = insertelement <4 x i32> [[TMP1]], i32 [[C:%.*]], i64 2 +; CHECK-NEXT: [[TMP3:%.*]] = insertelement <4 x i32> [[TMP2]], i32 [[D:%.*]], i64 3 ; CHECK-NEXT: [[TMP4:%.*]] = add nsw <4 x i32> [[TMP3]], ; CHECK-NEXT: [[TMP5:%.*]] = bitcast i32* [[P:%.*]] to <4 x i32>* ; CHECK-NEXT: store <4 x i32> [[TMP4]], <4 x i32>* [[TMP5]], align 4, !tbaa [[TBAA0]] @@ -81,10 +81,10 @@ define void @test2_vec(i32 %0, i32 %1, i32 %2, i32 %3, <4 x i32>* nocapture %4) { ; CHECK-LABEL: @test2_vec( -; CHECK-NEXT: [[TMP6:%.*]] = insertelement <4 x i32> poison, i32 [[TMP0:%.*]], i32 0 -; CHECK-NEXT: [[TMP7:%.*]] = insertelement <4 x i32> [[TMP6]], i32 [[TMP1:%.*]], i32 1 -; CHECK-NEXT: [[TMP8:%.*]] = insertelement <4 x i32> [[TMP7]], i32 [[TMP2:%.*]], i32 2 -; CHECK-NEXT: [[TMP9:%.*]] = insertelement <4 x i32> [[TMP8]], i32 [[TMP3:%.*]], i32 3 +; CHECK-NEXT: [[TMP6:%.*]] = insertelement <4 x i32> poison, i32 [[TMP0:%.*]], i64 0 +; CHECK-NEXT: [[TMP7:%.*]] = insertelement <4 x i32> [[TMP6]], i32 [[TMP1:%.*]], i64 1 +; CHECK-NEXT: [[TMP8:%.*]] = insertelement <4 x i32> [[TMP7]], i32 [[TMP2:%.*]], i64 2 +; CHECK-NEXT: [[TMP9:%.*]] = insertelement <4 x i32> [[TMP8]], i32 [[TMP3:%.*]], i64 3 ; CHECK-NEXT: [[TMP10:%.*]] = add nsw <4 x i32> [[TMP9]], ; CHECK-NEXT: store <4 x i32> [[TMP10]], <4 x i32>* [[TMP4:%.*]], align 16, !tbaa [[TBAA0]] ; CHECK-NEXT: ret void diff --git a/llvm/test/Transforms/SLPVectorizer/X86/pr46983.ll b/llvm/test/Transforms/SLPVectorizer/X86/pr46983.ll --- a/llvm/test/Transforms/SLPVectorizer/X86/pr46983.ll +++ b/llvm/test/Transforms/SLPVectorizer/X86/pr46983.ll @@ -9,14 +9,14 @@ ; CHECK-LABEL: @store_i32( ; CHECK-NEXT: [[TMP4:%.*]] = bitcast i32* [[TMP0:%.*]] to <4 x i32>* ; CHECK-NEXT: [[TMP5:%.*]] = load <4 x i32>, <4 x i32>* [[TMP4]], align 4, !tbaa [[TBAA0:![0-9]+]] -; CHECK-NEXT: [[TMP6:%.*]] = insertelement <4 x i32> poison, i32 [[TMP1:%.*]], i32 0 -; CHECK-NEXT: [[TMP7:%.*]] = shufflevector <4 x i32> [[TMP6]], <4 x i32> poison, <4 x i32> zeroinitializer -; CHECK-NEXT: [[TMP8:%.*]] = mul <4 x i32> [[TMP5]], [[TMP7]] -; CHECK-NEXT: [[TMP9:%.*]] = lshr <4 x i32> [[TMP8]], -; CHECK-NEXT: [[TMP10:%.*]] = icmp ult <4 x i32> [[TMP9]], -; CHECK-NEXT: [[TMP11:%.*]] = select <4 x i1> [[TMP10]], <4 x i32> [[TMP9]], <4 x i32> -; CHECK-NEXT: [[TMP12:%.*]] = bitcast i32* [[TMP0]] to <4 x i32>* -; CHECK-NEXT: store <4 x i32> [[TMP11]], <4 x i32>* [[TMP12]], align 4, !tbaa [[TBAA0]] +; CHECK-NEXT: [[TMP6:%.*]] = insertelement <4 x i32> poison, i32 [[TMP1:%.*]], i64 0 +; CHECK-NEXT: [[SHUFFLE:%.*]] = shufflevector <4 x i32> [[TMP6]], <4 x i32> poison, <4 x i32> zeroinitializer +; CHECK-NEXT: [[TMP7:%.*]] = mul <4 x i32> [[TMP5]], [[SHUFFLE]] +; CHECK-NEXT: [[TMP8:%.*]] = lshr <4 x i32> [[TMP7]], +; CHECK-NEXT: [[TMP9:%.*]] = icmp ult <4 x i32> [[TMP8]], +; CHECK-NEXT: [[TMP10:%.*]] = select <4 x i1> [[TMP9]], <4 x i32> [[TMP8]], <4 x i32> +; CHECK-NEXT: [[TMP11:%.*]] = bitcast i32* [[TMP0]] to <4 x i32>* +; CHECK-NEXT: store <4 x i32> [[TMP10]], <4 x i32>* [[TMP11]], align 4, !tbaa [[TBAA0]] ; CHECK-NEXT: ret void ; %4 = load i32, i32* %0, align 4, !tbaa !2 @@ -54,15 +54,15 @@ ; CHECK-NEXT: [[TMP4:%.*]] = bitcast i8* [[TMP0:%.*]] to <4 x i8>* ; CHECK-NEXT: [[TMP5:%.*]] = load <4 x i8>, <4 x i8>* [[TMP4]], align 1, !tbaa [[TBAA4:![0-9]+]] ; CHECK-NEXT: [[TMP6:%.*]] = zext <4 x i8> [[TMP5]] to <4 x i32> -; CHECK-NEXT: [[TMP7:%.*]] = insertelement <4 x i32> poison, i32 [[TMP1:%.*]], i32 0 -; CHECK-NEXT: [[TMP8:%.*]] = shufflevector <4 x i32> [[TMP7]], <4 x i32> poison, <4 x i32> zeroinitializer -; CHECK-NEXT: [[TMP9:%.*]] = mul <4 x i32> [[TMP8]], [[TMP6]] -; CHECK-NEXT: [[TMP10:%.*]] = lshr <4 x i32> [[TMP9]], -; CHECK-NEXT: [[TMP11:%.*]] = icmp ult <4 x i32> [[TMP10]], -; CHECK-NEXT: [[TMP12:%.*]] = select <4 x i1> [[TMP11]], <4 x i32> [[TMP10]], <4 x i32> -; CHECK-NEXT: [[TMP13:%.*]] = trunc <4 x i32> [[TMP12]] to <4 x i8> -; CHECK-NEXT: [[TMP14:%.*]] = bitcast i8* [[TMP0]] to <4 x i8>* -; CHECK-NEXT: store <4 x i8> [[TMP13]], <4 x i8>* [[TMP14]], align 1, !tbaa [[TBAA4]] +; CHECK-NEXT: [[TMP7:%.*]] = insertelement <4 x i32> poison, i32 [[TMP1:%.*]], i64 0 +; CHECK-NEXT: [[SHUFFLE:%.*]] = shufflevector <4 x i32> [[TMP7]], <4 x i32> poison, <4 x i32> zeroinitializer +; CHECK-NEXT: [[TMP8:%.*]] = mul <4 x i32> [[SHUFFLE]], [[TMP6]] +; CHECK-NEXT: [[TMP9:%.*]] = lshr <4 x i32> [[TMP8]], +; CHECK-NEXT: [[TMP10:%.*]] = icmp ult <4 x i32> [[TMP9]], +; CHECK-NEXT: [[TMP11:%.*]] = select <4 x i1> [[TMP10]], <4 x i32> [[TMP9]], <4 x i32> +; CHECK-NEXT: [[TMP12:%.*]] = trunc <4 x i32> [[TMP11]] to <4 x i8> +; CHECK-NEXT: [[TMP13:%.*]] = bitcast i8* [[TMP0]] to <4 x i8>* +; CHECK-NEXT: store <4 x i8> [[TMP12]], <4 x i8>* [[TMP13]], align 1, !tbaa [[TBAA4]] ; CHECK-NEXT: ret void ; %4 = load i8, i8* %0, align 1, !tbaa !6 @@ -147,16 +147,16 @@ ; AVX-NEXT: [[TMP4:%.*]] = zext i32 [[TMP1:%.*]] to i64 ; AVX-NEXT: [[TMP5:%.*]] = bitcast i64* [[TMP0:%.*]] to <4 x i64>* ; AVX-NEXT: [[TMP6:%.*]] = load <4 x i64>, <4 x i64>* [[TMP5]], align 8, !tbaa [[TBAA5:![0-9]+]] -; AVX-NEXT: [[TMP7:%.*]] = insertelement <4 x i64> poison, i64 [[TMP4]], i32 0 -; AVX-NEXT: [[TMP8:%.*]] = shufflevector <4 x i64> [[TMP7]], <4 x i64> poison, <4 x i32> zeroinitializer -; AVX-NEXT: [[TMP9:%.*]] = mul <4 x i64> [[TMP6]], [[TMP8]] -; AVX-NEXT: [[TMP10:%.*]] = lshr <4 x i64> [[TMP9]], -; AVX-NEXT: [[TMP11:%.*]] = trunc <4 x i64> [[TMP10]] to <4 x i32> -; AVX-NEXT: [[TMP12:%.*]] = icmp ult <4 x i32> [[TMP11]], -; AVX-NEXT: [[TMP13:%.*]] = and <4 x i64> [[TMP10]], -; AVX-NEXT: [[TMP14:%.*]] = select <4 x i1> [[TMP12]], <4 x i64> [[TMP13]], <4 x i64> -; AVX-NEXT: [[TMP15:%.*]] = bitcast i64* [[TMP0]] to <4 x i64>* -; AVX-NEXT: store <4 x i64> [[TMP14]], <4 x i64>* [[TMP15]], align 8, !tbaa [[TBAA5]] +; AVX-NEXT: [[TMP7:%.*]] = insertelement <4 x i64> poison, i64 [[TMP4]], i64 0 +; AVX-NEXT: [[SHUFFLE:%.*]] = shufflevector <4 x i64> [[TMP7]], <4 x i64> poison, <4 x i32> zeroinitializer +; AVX-NEXT: [[TMP8:%.*]] = mul <4 x i64> [[TMP6]], [[SHUFFLE]] +; AVX-NEXT: [[TMP9:%.*]] = lshr <4 x i64> [[TMP8]], +; AVX-NEXT: [[TMP10:%.*]] = trunc <4 x i64> [[TMP9]] to <4 x i32> +; AVX-NEXT: [[TMP11:%.*]] = icmp ult <4 x i32> [[TMP10]], +; AVX-NEXT: [[TMP12:%.*]] = and <4 x i64> [[TMP9]], +; AVX-NEXT: [[TMP13:%.*]] = select <4 x i1> [[TMP11]], <4 x i64> [[TMP12]], <4 x i64> +; AVX-NEXT: [[TMP14:%.*]] = bitcast i64* [[TMP0]] to <4 x i64>* +; AVX-NEXT: store <4 x i64> [[TMP13]], <4 x i64>* [[TMP14]], align 8, !tbaa [[TBAA5]] ; AVX-NEXT: ret void ; %4 = zext i32 %1 to i64 diff --git a/llvm/test/Transforms/SLPVectorizer/X86/pr47623.ll b/llvm/test/Transforms/SLPVectorizer/X86/pr47623.ll --- a/llvm/test/Transforms/SLPVectorizer/X86/pr47623.ll +++ b/llvm/test/Transforms/SLPVectorizer/X86/pr47623.ll @@ -26,8 +26,8 @@ ; AVX-LABEL: @foo( ; AVX-NEXT: [[TMP1:%.*]] = load i32, i32* getelementptr inbounds ([8 x i32], [8 x i32]* @b, i64 0, i64 0), align 16 ; AVX-NEXT: [[TMP2:%.*]] = load i32, i32* getelementptr inbounds ([8 x i32], [8 x i32]* @b, i64 0, i64 2), align 8 -; AVX-NEXT: [[TMP3:%.*]] = insertelement <8 x i32> poison, i32 [[TMP1]], i32 0 -; AVX-NEXT: [[TMP4:%.*]] = insertelement <8 x i32> [[TMP3]], i32 [[TMP2]], i32 1 +; AVX-NEXT: [[TMP3:%.*]] = insertelement <8 x i32> poison, i32 [[TMP1]], i64 0 +; AVX-NEXT: [[TMP4:%.*]] = insertelement <8 x i32> [[TMP3]], i32 [[TMP2]], i64 1 ; AVX-NEXT: [[SHUFFLE:%.*]] = shufflevector <8 x i32> [[TMP4]], <8 x i32> poison, <8 x i32> ; AVX-NEXT: store <8 x i32> [[SHUFFLE]], <8 x i32>* bitcast ([8 x i32]* @a to <8 x i32>*), align 16 ; AVX-NEXT: ret void diff --git a/llvm/test/Transforms/SLPVectorizer/X86/pr47629-inseltpoison.ll b/llvm/test/Transforms/SLPVectorizer/X86/pr47629-inseltpoison.ll --- a/llvm/test/Transforms/SLPVectorizer/X86/pr47629-inseltpoison.ll +++ b/llvm/test/Transforms/SLPVectorizer/X86/pr47629-inseltpoison.ll @@ -14,10 +14,10 @@ ; CHECK-NEXT: [[TMP7:%.*]] = getelementptr inbounds i32, i32* [[TMP1]], i64 4 ; CHECK-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4, !tbaa [[TBAA0]] ; CHECK-NEXT: [[TMP9:%.*]] = load i32, i32* [[TMP3]], align 4, !tbaa [[TBAA0]] -; CHECK-NEXT: [[TMP10:%.*]] = insertelement <4 x i32> poison, i32 [[TMP4]], i32 0 -; CHECK-NEXT: [[TMP11:%.*]] = insertelement <4 x i32> [[TMP10]], i32 [[TMP6]], i32 1 -; CHECK-NEXT: [[TMP12:%.*]] = insertelement <4 x i32> [[TMP11]], i32 [[TMP8]], i32 2 -; CHECK-NEXT: [[TMP13:%.*]] = insertelement <4 x i32> [[TMP12]], i32 [[TMP9]], i32 3 +; CHECK-NEXT: [[TMP10:%.*]] = insertelement <4 x i32> poison, i32 [[TMP4]], i64 0 +; CHECK-NEXT: [[TMP11:%.*]] = insertelement <4 x i32> [[TMP10]], i32 [[TMP6]], i64 1 +; CHECK-NEXT: [[TMP12:%.*]] = insertelement <4 x i32> [[TMP11]], i32 [[TMP8]], i64 2 +; CHECK-NEXT: [[TMP13:%.*]] = insertelement <4 x i32> [[TMP12]], i32 [[TMP9]], i64 3 ; CHECK-NEXT: [[TMP14:%.*]] = add nsw <4 x i32> [[TMP13]], ; CHECK-NEXT: [[TMP15:%.*]] = bitcast i32* [[TMP0:%.*]] to <4 x i32>* ; CHECK-NEXT: store <4 x i32> [[TMP14]], <4 x i32>* [[TMP15]], align 4, !tbaa [[TBAA0]] @@ -75,10 +75,10 @@ ; AVX-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4, !tbaa [[TBAA0]] ; AVX-NEXT: [[TMP9:%.*]] = getelementptr inbounds i32, i32* [[TMP1]], i64 5 ; AVX-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4, !tbaa [[TBAA0]] -; AVX-NEXT: [[TMP11:%.*]] = insertelement <4 x i32> poison, i32 [[TMP4]], i32 0 -; AVX-NEXT: [[TMP12:%.*]] = insertelement <4 x i32> [[TMP11]], i32 [[TMP6]], i32 1 -; AVX-NEXT: [[TMP13:%.*]] = insertelement <4 x i32> [[TMP12]], i32 [[TMP8]], i32 2 -; AVX-NEXT: [[TMP14:%.*]] = insertelement <4 x i32> [[TMP13]], i32 [[TMP10]], i32 3 +; AVX-NEXT: [[TMP11:%.*]] = insertelement <4 x i32> poison, i32 [[TMP4]], i64 0 +; AVX-NEXT: [[TMP12:%.*]] = insertelement <4 x i32> [[TMP11]], i32 [[TMP6]], i64 1 +; AVX-NEXT: [[TMP13:%.*]] = insertelement <4 x i32> [[TMP12]], i32 [[TMP8]], i64 2 +; AVX-NEXT: [[TMP14:%.*]] = insertelement <4 x i32> [[TMP13]], i32 [[TMP10]], i64 3 ; AVX-NEXT: [[TMP15:%.*]] = add nsw <4 x i32> [[TMP14]], ; AVX-NEXT: [[TMP16:%.*]] = bitcast i32* [[TMP0:%.*]] to <4 x i32>* ; AVX-NEXT: store <4 x i32> [[TMP15]], <4 x i32>* [[TMP16]], align 4, !tbaa [[TBAA0]] @@ -93,10 +93,10 @@ ; AVX2-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4, !tbaa [[TBAA0]] ; AVX2-NEXT: [[TMP9:%.*]] = getelementptr inbounds i32, i32* [[TMP1]], i64 5 ; AVX2-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4, !tbaa [[TBAA0]] -; AVX2-NEXT: [[TMP11:%.*]] = insertelement <4 x i32> poison, i32 [[TMP4]], i32 0 -; AVX2-NEXT: [[TMP12:%.*]] = insertelement <4 x i32> [[TMP11]], i32 [[TMP6]], i32 1 -; AVX2-NEXT: [[TMP13:%.*]] = insertelement <4 x i32> [[TMP12]], i32 [[TMP8]], i32 2 -; AVX2-NEXT: [[TMP14:%.*]] = insertelement <4 x i32> [[TMP13]], i32 [[TMP10]], i32 3 +; AVX2-NEXT: [[TMP11:%.*]] = insertelement <4 x i32> poison, i32 [[TMP4]], i64 0 +; AVX2-NEXT: [[TMP12:%.*]] = insertelement <4 x i32> [[TMP11]], i32 [[TMP6]], i64 1 +; AVX2-NEXT: [[TMP13:%.*]] = insertelement <4 x i32> [[TMP12]], i32 [[TMP8]], i64 2 +; AVX2-NEXT: [[TMP14:%.*]] = insertelement <4 x i32> [[TMP13]], i32 [[TMP10]], i64 3 ; AVX2-NEXT: [[TMP15:%.*]] = add nsw <4 x i32> [[TMP14]], ; AVX2-NEXT: [[TMP16:%.*]] = bitcast i32* [[TMP0:%.*]] to <4 x i32>* ; AVX2-NEXT: store <4 x i32> [[TMP15]], <4 x i32>* [[TMP16]], align 4, !tbaa [[TBAA0]] @@ -111,23 +111,23 @@ ; AVX512F-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4, !tbaa [[TBAA0]] ; AVX512F-NEXT: [[TMP9:%.*]] = getelementptr inbounds i32, i32* [[TMP1]], i64 5 ; AVX512F-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4, !tbaa [[TBAA0]] -; AVX512F-NEXT: [[TMP11:%.*]] = insertelement <4 x i32> poison, i32 [[TMP4]], i32 0 -; AVX512F-NEXT: [[TMP12:%.*]] = insertelement <4 x i32> [[TMP11]], i32 [[TMP6]], i32 1 -; AVX512F-NEXT: [[TMP13:%.*]] = insertelement <4 x i32> [[TMP12]], i32 [[TMP8]], i32 2 -; AVX512F-NEXT: [[TMP14:%.*]] = insertelement <4 x i32> [[TMP13]], i32 [[TMP10]], i32 3 +; AVX512F-NEXT: [[TMP11:%.*]] = insertelement <4 x i32> poison, i32 [[TMP4]], i64 0 +; AVX512F-NEXT: [[TMP12:%.*]] = insertelement <4 x i32> [[TMP11]], i32 [[TMP6]], i64 1 +; AVX512F-NEXT: [[TMP13:%.*]] = insertelement <4 x i32> [[TMP12]], i32 [[TMP8]], i64 2 +; AVX512F-NEXT: [[TMP14:%.*]] = insertelement <4 x i32> [[TMP13]], i32 [[TMP10]], i64 3 ; AVX512F-NEXT: [[TMP15:%.*]] = add nsw <4 x i32> [[TMP14]], ; AVX512F-NEXT: [[TMP16:%.*]] = bitcast i32* [[TMP0:%.*]] to <4 x i32>* ; AVX512F-NEXT: store <4 x i32> [[TMP15]], <4 x i32>* [[TMP16]], align 4, !tbaa [[TBAA0]] ; AVX512F-NEXT: ret void ; ; AVX512VL-LABEL: @gather_load_2( -; AVX512VL-NEXT: [[TMP3:%.*]] = insertelement <4 x i32*> poison, i32* [[TMP1:%.*]], i32 0 -; AVX512VL-NEXT: [[TMP4:%.*]] = shufflevector <4 x i32*> [[TMP3]], <4 x i32*> poison, <4 x i32> zeroinitializer -; AVX512VL-NEXT: [[TMP5:%.*]] = getelementptr i32, <4 x i32*> [[TMP4]], <4 x i64> -; AVX512VL-NEXT: [[TMP6:%.*]] = call <4 x i32> @llvm.masked.gather.v4i32.v4p0i32(<4 x i32*> [[TMP5]], i32 4, <4 x i1> , <4 x i32> undef), !tbaa [[TBAA0]] -; AVX512VL-NEXT: [[TMP7:%.*]] = add nsw <4 x i32> [[TMP6]], -; AVX512VL-NEXT: [[TMP8:%.*]] = bitcast i32* [[TMP0:%.*]] to <4 x i32>* -; AVX512VL-NEXT: store <4 x i32> [[TMP7]], <4 x i32>* [[TMP8]], align 4, !tbaa [[TBAA0]] +; AVX512VL-NEXT: [[TMP3:%.*]] = insertelement <4 x i32*> poison, i32* [[TMP1:%.*]], i64 0 +; AVX512VL-NEXT: [[SHUFFLE:%.*]] = shufflevector <4 x i32*> [[TMP3]], <4 x i32*> poison, <4 x i32> zeroinitializer +; AVX512VL-NEXT: [[TMP4:%.*]] = getelementptr i32, <4 x i32*> [[SHUFFLE]], <4 x i64> +; AVX512VL-NEXT: [[TMP5:%.*]] = call <4 x i32> @llvm.masked.gather.v4i32.v4p0i32(<4 x i32*> [[TMP4]], i32 4, <4 x i1> , <4 x i32> undef), !tbaa [[TBAA0]] +; AVX512VL-NEXT: [[TMP6:%.*]] = add nsw <4 x i32> [[TMP5]], +; AVX512VL-NEXT: [[TMP7:%.*]] = bitcast i32* [[TMP0:%.*]] to <4 x i32>* +; AVX512VL-NEXT: store <4 x i32> [[TMP6]], <4 x i32>* [[TMP7]], align 4, !tbaa [[TBAA0]] ; AVX512VL-NEXT: ret void ; %3 = getelementptr inbounds i32, i32* %1, i64 1 @@ -211,14 +211,14 @@ ; AVX-NEXT: [[TMP15:%.*]] = load i32, i32* [[TMP14]], align 4, !tbaa [[TBAA0]] ; AVX-NEXT: [[TMP16:%.*]] = getelementptr inbounds i32, i32* [[TMP1]], i64 21 ; AVX-NEXT: [[TMP17:%.*]] = load i32, i32* [[TMP16]], align 4, !tbaa [[TBAA0]] -; AVX-NEXT: [[TMP18:%.*]] = insertelement <8 x i32> poison, i32 [[TMP3]], i32 0 -; AVX-NEXT: [[TMP19:%.*]] = insertelement <8 x i32> [[TMP18]], i32 [[TMP5]], i32 1 -; AVX-NEXT: [[TMP20:%.*]] = insertelement <8 x i32> [[TMP19]], i32 [[TMP7]], i32 2 -; AVX-NEXT: [[TMP21:%.*]] = insertelement <8 x i32> [[TMP20]], i32 [[TMP9]], i32 3 -; AVX-NEXT: [[TMP22:%.*]] = insertelement <8 x i32> [[TMP21]], i32 [[TMP11]], i32 4 -; AVX-NEXT: [[TMP23:%.*]] = insertelement <8 x i32> [[TMP22]], i32 [[TMP13]], i32 5 -; AVX-NEXT: [[TMP24:%.*]] = insertelement <8 x i32> [[TMP23]], i32 [[TMP15]], i32 6 -; AVX-NEXT: [[TMP25:%.*]] = insertelement <8 x i32> [[TMP24]], i32 [[TMP17]], i32 7 +; AVX-NEXT: [[TMP18:%.*]] = insertelement <8 x i32> poison, i32 [[TMP3]], i64 0 +; AVX-NEXT: [[TMP19:%.*]] = insertelement <8 x i32> [[TMP18]], i32 [[TMP5]], i64 1 +; AVX-NEXT: [[TMP20:%.*]] = insertelement <8 x i32> [[TMP19]], i32 [[TMP7]], i64 2 +; AVX-NEXT: [[TMP21:%.*]] = insertelement <8 x i32> [[TMP20]], i32 [[TMP9]], i64 3 +; AVX-NEXT: [[TMP22:%.*]] = insertelement <8 x i32> [[TMP21]], i32 [[TMP11]], i64 4 +; AVX-NEXT: [[TMP23:%.*]] = insertelement <8 x i32> [[TMP22]], i32 [[TMP13]], i64 5 +; AVX-NEXT: [[TMP24:%.*]] = insertelement <8 x i32> [[TMP23]], i32 [[TMP15]], i64 6 +; AVX-NEXT: [[TMP25:%.*]] = insertelement <8 x i32> [[TMP24]], i32 [[TMP17]], i64 7 ; AVX-NEXT: [[TMP26:%.*]] = add <8 x i32> [[TMP25]], ; AVX-NEXT: [[TMP27:%.*]] = bitcast i32* [[TMP0:%.*]] to <8 x i32>* ; AVX-NEXT: store <8 x i32> [[TMP26]], <8 x i32>* [[TMP27]], align 4, !tbaa [[TBAA0]] @@ -240,14 +240,14 @@ ; AVX2-NEXT: [[TMP15:%.*]] = load i32, i32* [[TMP14]], align 4, !tbaa [[TBAA0]] ; AVX2-NEXT: [[TMP16:%.*]] = getelementptr inbounds i32, i32* [[TMP1]], i64 21 ; AVX2-NEXT: [[TMP17:%.*]] = load i32, i32* [[TMP16]], align 4, !tbaa [[TBAA0]] -; AVX2-NEXT: [[TMP18:%.*]] = insertelement <8 x i32> poison, i32 [[TMP3]], i32 0 -; AVX2-NEXT: [[TMP19:%.*]] = insertelement <8 x i32> [[TMP18]], i32 [[TMP5]], i32 1 -; AVX2-NEXT: [[TMP20:%.*]] = insertelement <8 x i32> [[TMP19]], i32 [[TMP7]], i32 2 -; AVX2-NEXT: [[TMP21:%.*]] = insertelement <8 x i32> [[TMP20]], i32 [[TMP9]], i32 3 -; AVX2-NEXT: [[TMP22:%.*]] = insertelement <8 x i32> [[TMP21]], i32 [[TMP11]], i32 4 -; AVX2-NEXT: [[TMP23:%.*]] = insertelement <8 x i32> [[TMP22]], i32 [[TMP13]], i32 5 -; AVX2-NEXT: [[TMP24:%.*]] = insertelement <8 x i32> [[TMP23]], i32 [[TMP15]], i32 6 -; AVX2-NEXT: [[TMP25:%.*]] = insertelement <8 x i32> [[TMP24]], i32 [[TMP17]], i32 7 +; AVX2-NEXT: [[TMP18:%.*]] = insertelement <8 x i32> poison, i32 [[TMP3]], i64 0 +; AVX2-NEXT: [[TMP19:%.*]] = insertelement <8 x i32> [[TMP18]], i32 [[TMP5]], i64 1 +; AVX2-NEXT: [[TMP20:%.*]] = insertelement <8 x i32> [[TMP19]], i32 [[TMP7]], i64 2 +; AVX2-NEXT: [[TMP21:%.*]] = insertelement <8 x i32> [[TMP20]], i32 [[TMP9]], i64 3 +; AVX2-NEXT: [[TMP22:%.*]] = insertelement <8 x i32> [[TMP21]], i32 [[TMP11]], i64 4 +; AVX2-NEXT: [[TMP23:%.*]] = insertelement <8 x i32> [[TMP22]], i32 [[TMP13]], i64 5 +; AVX2-NEXT: [[TMP24:%.*]] = insertelement <8 x i32> [[TMP23]], i32 [[TMP15]], i64 6 +; AVX2-NEXT: [[TMP25:%.*]] = insertelement <8 x i32> [[TMP24]], i32 [[TMP17]], i64 7 ; AVX2-NEXT: [[TMP26:%.*]] = add <8 x i32> [[TMP25]], ; AVX2-NEXT: [[TMP27:%.*]] = bitcast i32* [[TMP0:%.*]] to <8 x i32>* ; AVX2-NEXT: store <8 x i32> [[TMP26]], <8 x i32>* [[TMP27]], align 4, !tbaa [[TBAA0]] @@ -261,10 +261,10 @@ ; AVX512F-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4, !tbaa [[TBAA0]] ; AVX512F-NEXT: [[TMP8:%.*]] = getelementptr inbounds i32, i32* [[TMP1]], i64 15 ; AVX512F-NEXT: [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4, !tbaa [[TBAA0]] -; AVX512F-NEXT: [[TMP10:%.*]] = insertelement <4 x i32> poison, i32 [[TMP3]], i32 0 -; AVX512F-NEXT: [[TMP11:%.*]] = insertelement <4 x i32> [[TMP10]], i32 [[TMP5]], i32 1 -; AVX512F-NEXT: [[TMP12:%.*]] = insertelement <4 x i32> [[TMP11]], i32 [[TMP7]], i32 2 -; AVX512F-NEXT: [[TMP13:%.*]] = insertelement <4 x i32> [[TMP12]], i32 [[TMP9]], i32 3 +; AVX512F-NEXT: [[TMP10:%.*]] = insertelement <4 x i32> poison, i32 [[TMP3]], i64 0 +; AVX512F-NEXT: [[TMP11:%.*]] = insertelement <4 x i32> [[TMP10]], i32 [[TMP5]], i64 1 +; AVX512F-NEXT: [[TMP12:%.*]] = insertelement <4 x i32> [[TMP11]], i32 [[TMP7]], i64 2 +; AVX512F-NEXT: [[TMP13:%.*]] = insertelement <4 x i32> [[TMP12]], i32 [[TMP9]], i64 3 ; AVX512F-NEXT: [[TMP14:%.*]] = add <4 x i32> [[TMP13]], ; AVX512F-NEXT: [[TMP15:%.*]] = getelementptr inbounds i32, i32* [[TMP0:%.*]], i64 4 ; AVX512F-NEXT: [[TMP16:%.*]] = bitcast i32* [[TMP0]] to <4 x i32>* @@ -277,10 +277,10 @@ ; AVX512F-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4, !tbaa [[TBAA0]] ; AVX512F-NEXT: [[TMP23:%.*]] = getelementptr inbounds i32, i32* [[TMP1]], i64 21 ; AVX512F-NEXT: [[TMP24:%.*]] = load i32, i32* [[TMP23]], align 4, !tbaa [[TBAA0]] -; AVX512F-NEXT: [[TMP25:%.*]] = insertelement <4 x i32> poison, i32 [[TMP18]], i32 0 -; AVX512F-NEXT: [[TMP26:%.*]] = insertelement <4 x i32> [[TMP25]], i32 [[TMP20]], i32 1 -; AVX512F-NEXT: [[TMP27:%.*]] = insertelement <4 x i32> [[TMP26]], i32 [[TMP22]], i32 2 -; AVX512F-NEXT: [[TMP28:%.*]] = insertelement <4 x i32> [[TMP27]], i32 [[TMP24]], i32 3 +; AVX512F-NEXT: [[TMP25:%.*]] = insertelement <4 x i32> poison, i32 [[TMP18]], i64 0 +; AVX512F-NEXT: [[TMP26:%.*]] = insertelement <4 x i32> [[TMP25]], i32 [[TMP20]], i64 1 +; AVX512F-NEXT: [[TMP27:%.*]] = insertelement <4 x i32> [[TMP26]], i32 [[TMP22]], i64 2 +; AVX512F-NEXT: [[TMP28:%.*]] = insertelement <4 x i32> [[TMP27]], i32 [[TMP24]], i64 3 ; AVX512F-NEXT: [[TMP29:%.*]] = add <4 x i32> [[TMP28]], ; AVX512F-NEXT: [[TMP30:%.*]] = bitcast i32* [[TMP15]] to <4 x i32>* ; AVX512F-NEXT: store <4 x i32> [[TMP29]], <4 x i32>* [[TMP30]], align 4, !tbaa [[TBAA0]] @@ -291,28 +291,28 @@ ; AVX512VL-NEXT: [[TMP4:%.*]] = add i32 [[TMP3]], 1 ; AVX512VL-NEXT: [[TMP5:%.*]] = getelementptr inbounds i32, i32* [[TMP0:%.*]], i64 1 ; AVX512VL-NEXT: store i32 [[TMP4]], i32* [[TMP0]], align 4, !tbaa [[TBAA0]] -; AVX512VL-NEXT: [[TMP6:%.*]] = insertelement <4 x i32*> poison, i32* [[TMP1]], i32 0 -; AVX512VL-NEXT: [[TMP7:%.*]] = shufflevector <4 x i32*> [[TMP6]], <4 x i32*> poison, <4 x i32> zeroinitializer -; AVX512VL-NEXT: [[TMP8:%.*]] = getelementptr i32, <4 x i32*> [[TMP7]], <4 x i64> -; AVX512VL-NEXT: [[TMP9:%.*]] = call <4 x i32> @llvm.masked.gather.v4i32.v4p0i32(<4 x i32*> [[TMP8]], i32 4, <4 x i1> , <4 x i32> undef), !tbaa [[TBAA0]] -; AVX512VL-NEXT: [[TMP10:%.*]] = add <4 x i32> [[TMP9]], -; AVX512VL-NEXT: [[TMP11:%.*]] = getelementptr inbounds i32, i32* [[TMP0]], i64 5 -; AVX512VL-NEXT: [[TMP12:%.*]] = bitcast i32* [[TMP5]] to <4 x i32>* -; AVX512VL-NEXT: store <4 x i32> [[TMP10]], <4 x i32>* [[TMP12]], align 4, !tbaa [[TBAA0]] -; AVX512VL-NEXT: [[TMP13:%.*]] = getelementptr inbounds i32, i32* [[TMP1]], i64 9 -; AVX512VL-NEXT: [[TMP14:%.*]] = load i32, i32* [[TMP13]], align 4, !tbaa [[TBAA0]] -; AVX512VL-NEXT: [[TMP15:%.*]] = add i32 [[TMP14]], 2 -; AVX512VL-NEXT: [[TMP16:%.*]] = getelementptr inbounds i32, i32* [[TMP0]], i64 6 -; AVX512VL-NEXT: store i32 [[TMP15]], i32* [[TMP11]], align 4, !tbaa [[TBAA0]] -; AVX512VL-NEXT: [[TMP17:%.*]] = getelementptr inbounds i32, i32* [[TMP1]], i64 6 -; AVX512VL-NEXT: [[TMP18:%.*]] = load i32, i32* [[TMP17]], align 4, !tbaa [[TBAA0]] -; AVX512VL-NEXT: [[TMP19:%.*]] = add i32 [[TMP18]], 3 -; AVX512VL-NEXT: [[TMP20:%.*]] = getelementptr inbounds i32, i32* [[TMP0]], i64 7 -; AVX512VL-NEXT: store i32 [[TMP19]], i32* [[TMP16]], align 4, !tbaa [[TBAA0]] -; AVX512VL-NEXT: [[TMP21:%.*]] = getelementptr inbounds i32, i32* [[TMP1]], i64 21 -; AVX512VL-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4, !tbaa [[TBAA0]] -; AVX512VL-NEXT: [[TMP23:%.*]] = add i32 [[TMP22]], 4 -; AVX512VL-NEXT: store i32 [[TMP23]], i32* [[TMP20]], align 4, !tbaa [[TBAA0]] +; AVX512VL-NEXT: [[TMP6:%.*]] = insertelement <4 x i32*> poison, i32* [[TMP1]], i64 0 +; AVX512VL-NEXT: [[SHUFFLE:%.*]] = shufflevector <4 x i32*> [[TMP6]], <4 x i32*> poison, <4 x i32> zeroinitializer +; AVX512VL-NEXT: [[TMP7:%.*]] = getelementptr i32, <4 x i32*> [[SHUFFLE]], <4 x i64> +; AVX512VL-NEXT: [[TMP8:%.*]] = call <4 x i32> @llvm.masked.gather.v4i32.v4p0i32(<4 x i32*> [[TMP7]], i32 4, <4 x i1> , <4 x i32> undef), !tbaa [[TBAA0]] +; AVX512VL-NEXT: [[TMP9:%.*]] = add <4 x i32> [[TMP8]], +; AVX512VL-NEXT: [[TMP10:%.*]] = getelementptr inbounds i32, i32* [[TMP0]], i64 5 +; AVX512VL-NEXT: [[TMP11:%.*]] = bitcast i32* [[TMP5]] to <4 x i32>* +; AVX512VL-NEXT: store <4 x i32> [[TMP9]], <4 x i32>* [[TMP11]], align 4, !tbaa [[TBAA0]] +; AVX512VL-NEXT: [[TMP12:%.*]] = getelementptr inbounds i32, i32* [[TMP1]], i64 9 +; AVX512VL-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP12]], align 4, !tbaa [[TBAA0]] +; AVX512VL-NEXT: [[TMP14:%.*]] = add i32 [[TMP13]], 2 +; AVX512VL-NEXT: [[TMP15:%.*]] = getelementptr inbounds i32, i32* [[TMP0]], i64 6 +; AVX512VL-NEXT: store i32 [[TMP14]], i32* [[TMP10]], align 4, !tbaa [[TBAA0]] +; AVX512VL-NEXT: [[TMP16:%.*]] = getelementptr inbounds i32, i32* [[TMP1]], i64 6 +; AVX512VL-NEXT: [[TMP17:%.*]] = load i32, i32* [[TMP16]], align 4, !tbaa [[TBAA0]] +; AVX512VL-NEXT: [[TMP18:%.*]] = add i32 [[TMP17]], 3 +; AVX512VL-NEXT: [[TMP19:%.*]] = getelementptr inbounds i32, i32* [[TMP0]], i64 7 +; AVX512VL-NEXT: store i32 [[TMP18]], i32* [[TMP15]], align 4, !tbaa [[TBAA0]] +; AVX512VL-NEXT: [[TMP20:%.*]] = getelementptr inbounds i32, i32* [[TMP1]], i64 21 +; AVX512VL-NEXT: [[TMP21:%.*]] = load i32, i32* [[TMP20]], align 4, !tbaa [[TBAA0]] +; AVX512VL-NEXT: [[TMP22:%.*]] = add i32 [[TMP21]], 4 +; AVX512VL-NEXT: store i32 [[TMP22]], i32* [[TMP19]], align 4, !tbaa [[TBAA0]] ; AVX512VL-NEXT: ret void ; %3 = load i32, i32* %1, align 4, !tbaa !2 @@ -414,14 +414,14 @@ ; AVX-NEXT: [[T23:%.*]] = load i32, i32* [[T22]], align 4, !tbaa [[TBAA0]] ; AVX-NEXT: [[T27:%.*]] = load i32, i32* [[T26]], align 4, !tbaa [[TBAA0]] ; AVX-NEXT: [[T31:%.*]] = load i32, i32* [[T30]], align 4, !tbaa [[TBAA0]] -; AVX-NEXT: [[TMP1:%.*]] = insertelement <8 x i32> poison, i32 [[T3]], i32 0 -; AVX-NEXT: [[TMP2:%.*]] = insertelement <8 x i32> [[TMP1]], i32 [[T7]], i32 1 -; AVX-NEXT: [[TMP3:%.*]] = insertelement <8 x i32> [[TMP2]], i32 [[T11]], i32 2 -; AVX-NEXT: [[TMP4:%.*]] = insertelement <8 x i32> [[TMP3]], i32 [[T15]], i32 3 -; AVX-NEXT: [[TMP5:%.*]] = insertelement <8 x i32> [[TMP4]], i32 [[T19]], i32 4 -; AVX-NEXT: [[TMP6:%.*]] = insertelement <8 x i32> [[TMP5]], i32 [[T23]], i32 5 -; AVX-NEXT: [[TMP7:%.*]] = insertelement <8 x i32> [[TMP6]], i32 [[T27]], i32 6 -; AVX-NEXT: [[TMP8:%.*]] = insertelement <8 x i32> [[TMP7]], i32 [[T31]], i32 7 +; AVX-NEXT: [[TMP1:%.*]] = insertelement <8 x i32> poison, i32 [[T3]], i64 0 +; AVX-NEXT: [[TMP2:%.*]] = insertelement <8 x i32> [[TMP1]], i32 [[T7]], i64 1 +; AVX-NEXT: [[TMP3:%.*]] = insertelement <8 x i32> [[TMP2]], i32 [[T11]], i64 2 +; AVX-NEXT: [[TMP4:%.*]] = insertelement <8 x i32> [[TMP3]], i32 [[T15]], i64 3 +; AVX-NEXT: [[TMP5:%.*]] = insertelement <8 x i32> [[TMP4]], i32 [[T19]], i64 4 +; AVX-NEXT: [[TMP6:%.*]] = insertelement <8 x i32> [[TMP5]], i32 [[T23]], i64 5 +; AVX-NEXT: [[TMP7:%.*]] = insertelement <8 x i32> [[TMP6]], i32 [[T27]], i64 6 +; AVX-NEXT: [[TMP8:%.*]] = insertelement <8 x i32> [[TMP7]], i32 [[T31]], i64 7 ; AVX-NEXT: [[TMP9:%.*]] = add <8 x i32> [[TMP8]], ; AVX-NEXT: [[TMP10:%.*]] = bitcast i32* [[T0:%.*]] to <8 x i32>* ; AVX-NEXT: store <8 x i32> [[TMP9]], <8 x i32>* [[TMP10]], align 4, !tbaa [[TBAA0]] @@ -443,14 +443,14 @@ ; AVX2-NEXT: [[T23:%.*]] = load i32, i32* [[T22]], align 4, !tbaa [[TBAA0]] ; AVX2-NEXT: [[T27:%.*]] = load i32, i32* [[T26]], align 4, !tbaa [[TBAA0]] ; AVX2-NEXT: [[T31:%.*]] = load i32, i32* [[T30]], align 4, !tbaa [[TBAA0]] -; AVX2-NEXT: [[TMP1:%.*]] = insertelement <8 x i32> poison, i32 [[T3]], i32 0 -; AVX2-NEXT: [[TMP2:%.*]] = insertelement <8 x i32> [[TMP1]], i32 [[T7]], i32 1 -; AVX2-NEXT: [[TMP3:%.*]] = insertelement <8 x i32> [[TMP2]], i32 [[T11]], i32 2 -; AVX2-NEXT: [[TMP4:%.*]] = insertelement <8 x i32> [[TMP3]], i32 [[T15]], i32 3 -; AVX2-NEXT: [[TMP5:%.*]] = insertelement <8 x i32> [[TMP4]], i32 [[T19]], i32 4 -; AVX2-NEXT: [[TMP6:%.*]] = insertelement <8 x i32> [[TMP5]], i32 [[T23]], i32 5 -; AVX2-NEXT: [[TMP7:%.*]] = insertelement <8 x i32> [[TMP6]], i32 [[T27]], i32 6 -; AVX2-NEXT: [[TMP8:%.*]] = insertelement <8 x i32> [[TMP7]], i32 [[T31]], i32 7 +; AVX2-NEXT: [[TMP1:%.*]] = insertelement <8 x i32> poison, i32 [[T3]], i64 0 +; AVX2-NEXT: [[TMP2:%.*]] = insertelement <8 x i32> [[TMP1]], i32 [[T7]], i64 1 +; AVX2-NEXT: [[TMP3:%.*]] = insertelement <8 x i32> [[TMP2]], i32 [[T11]], i64 2 +; AVX2-NEXT: [[TMP4:%.*]] = insertelement <8 x i32> [[TMP3]], i32 [[T15]], i64 3 +; AVX2-NEXT: [[TMP5:%.*]] = insertelement <8 x i32> [[TMP4]], i32 [[T19]], i64 4 +; AVX2-NEXT: [[TMP6:%.*]] = insertelement <8 x i32> [[TMP5]], i32 [[T23]], i64 5 +; AVX2-NEXT: [[TMP7:%.*]] = insertelement <8 x i32> [[TMP6]], i32 [[T27]], i64 6 +; AVX2-NEXT: [[TMP8:%.*]] = insertelement <8 x i32> [[TMP7]], i32 [[T31]], i64 7 ; AVX2-NEXT: [[TMP9:%.*]] = add <8 x i32> [[TMP8]], ; AVX2-NEXT: [[TMP10:%.*]] = bitcast i32* [[T0:%.*]] to <8 x i32>* ; AVX2-NEXT: store <8 x i32> [[TMP9]], <8 x i32>* [[TMP10]], align 4, !tbaa [[TBAA0]] @@ -473,15 +473,15 @@ ; AVX512F-NEXT: [[T23:%.*]] = load i32, i32* [[T22]], align 4, !tbaa [[TBAA0]] ; AVX512F-NEXT: [[T27:%.*]] = load i32, i32* [[T26]], align 4, !tbaa [[TBAA0]] ; AVX512F-NEXT: [[T31:%.*]] = load i32, i32* [[T30]], align 4, !tbaa [[TBAA0]] -; AVX512F-NEXT: [[TMP1:%.*]] = insertelement <4 x i32> poison, i32 [[T3]], i32 0 -; AVX512F-NEXT: [[TMP2:%.*]] = insertelement <4 x i32> [[TMP1]], i32 [[T7]], i32 1 -; AVX512F-NEXT: [[TMP3:%.*]] = insertelement <4 x i32> [[TMP2]], i32 [[T11]], i32 2 -; AVX512F-NEXT: [[TMP4:%.*]] = insertelement <4 x i32> [[TMP3]], i32 [[T15]], i32 3 +; AVX512F-NEXT: [[TMP1:%.*]] = insertelement <4 x i32> poison, i32 [[T3]], i64 0 +; AVX512F-NEXT: [[TMP2:%.*]] = insertelement <4 x i32> [[TMP1]], i32 [[T7]], i64 1 +; AVX512F-NEXT: [[TMP3:%.*]] = insertelement <4 x i32> [[TMP2]], i32 [[T11]], i64 2 +; AVX512F-NEXT: [[TMP4:%.*]] = insertelement <4 x i32> [[TMP3]], i32 [[T15]], i64 3 ; AVX512F-NEXT: [[TMP5:%.*]] = add <4 x i32> [[TMP4]], -; AVX512F-NEXT: [[TMP6:%.*]] = insertelement <4 x i32> poison, i32 [[T19]], i32 0 -; AVX512F-NEXT: [[TMP7:%.*]] = insertelement <4 x i32> [[TMP6]], i32 [[T23]], i32 1 -; AVX512F-NEXT: [[TMP8:%.*]] = insertelement <4 x i32> [[TMP7]], i32 [[T27]], i32 2 -; AVX512F-NEXT: [[TMP9:%.*]] = insertelement <4 x i32> [[TMP8]], i32 [[T31]], i32 3 +; AVX512F-NEXT: [[TMP6:%.*]] = insertelement <4 x i32> poison, i32 [[T19]], i64 0 +; AVX512F-NEXT: [[TMP7:%.*]] = insertelement <4 x i32> [[TMP6]], i32 [[T23]], i64 1 +; AVX512F-NEXT: [[TMP8:%.*]] = insertelement <4 x i32> [[TMP7]], i32 [[T27]], i64 2 +; AVX512F-NEXT: [[TMP9:%.*]] = insertelement <4 x i32> [[TMP8]], i32 [[T31]], i64 3 ; AVX512F-NEXT: [[TMP10:%.*]] = add <4 x i32> [[TMP9]], ; AVX512F-NEXT: [[TMP11:%.*]] = bitcast i32* [[T0]] to <4 x i32>* ; AVX512F-NEXT: store <4 x i32> [[TMP5]], <4 x i32>* [[TMP11]], align 4, !tbaa [[TBAA0]] @@ -491,9 +491,9 @@ ; ; AVX512VL-LABEL: @gather_load_4( ; AVX512VL-NEXT: [[T5:%.*]] = getelementptr inbounds i32, i32* [[T0:%.*]], i64 1 -; AVX512VL-NEXT: [[TMP1:%.*]] = insertelement <4 x i32*> poison, i32* [[T1:%.*]], i32 0 -; AVX512VL-NEXT: [[TMP2:%.*]] = shufflevector <4 x i32*> [[TMP1]], <4 x i32*> poison, <4 x i32> zeroinitializer -; AVX512VL-NEXT: [[TMP3:%.*]] = getelementptr i32, <4 x i32*> [[TMP2]], <4 x i64> +; AVX512VL-NEXT: [[TMP1:%.*]] = insertelement <4 x i32*> poison, i32* [[T1:%.*]], i64 0 +; AVX512VL-NEXT: [[SHUFFLE:%.*]] = shufflevector <4 x i32*> [[TMP1]], <4 x i32*> poison, <4 x i32> zeroinitializer +; AVX512VL-NEXT: [[TMP2:%.*]] = getelementptr i32, <4 x i32*> [[SHUFFLE]], <4 x i64> ; AVX512VL-NEXT: [[T21:%.*]] = getelementptr inbounds i32, i32* [[T0]], i64 5 ; AVX512VL-NEXT: [[T22:%.*]] = getelementptr inbounds i32, i32* [[T1]], i64 9 ; AVX512VL-NEXT: [[T25:%.*]] = getelementptr inbounds i32, i32* [[T0]], i64 6 @@ -501,18 +501,18 @@ ; AVX512VL-NEXT: [[T29:%.*]] = getelementptr inbounds i32, i32* [[T0]], i64 7 ; AVX512VL-NEXT: [[T30:%.*]] = getelementptr inbounds i32, i32* [[T1]], i64 21 ; AVX512VL-NEXT: [[T3:%.*]] = load i32, i32* [[T1]], align 4, !tbaa [[TBAA0]] -; AVX512VL-NEXT: [[TMP4:%.*]] = call <4 x i32> @llvm.masked.gather.v4i32.v4p0i32(<4 x i32*> [[TMP3]], i32 4, <4 x i1> , <4 x i32> undef), !tbaa [[TBAA0]] +; AVX512VL-NEXT: [[TMP3:%.*]] = call <4 x i32> @llvm.masked.gather.v4i32.v4p0i32(<4 x i32*> [[TMP2]], i32 4, <4 x i1> , <4 x i32> undef), !tbaa [[TBAA0]] ; AVX512VL-NEXT: [[T23:%.*]] = load i32, i32* [[T22]], align 4, !tbaa [[TBAA0]] ; AVX512VL-NEXT: [[T27:%.*]] = load i32, i32* [[T26]], align 4, !tbaa [[TBAA0]] ; AVX512VL-NEXT: [[T31:%.*]] = load i32, i32* [[T30]], align 4, !tbaa [[TBAA0]] ; AVX512VL-NEXT: [[T4:%.*]] = add i32 [[T3]], 1 -; AVX512VL-NEXT: [[TMP5:%.*]] = add <4 x i32> [[TMP4]], +; AVX512VL-NEXT: [[TMP4:%.*]] = add <4 x i32> [[TMP3]], ; AVX512VL-NEXT: [[T24:%.*]] = add i32 [[T23]], 2 ; AVX512VL-NEXT: [[T28:%.*]] = add i32 [[T27]], 3 ; AVX512VL-NEXT: [[T32:%.*]] = add i32 [[T31]], 4 ; AVX512VL-NEXT: store i32 [[T4]], i32* [[T0]], align 4, !tbaa [[TBAA0]] -; AVX512VL-NEXT: [[TMP6:%.*]] = bitcast i32* [[T5]] to <4 x i32>* -; AVX512VL-NEXT: store <4 x i32> [[TMP5]], <4 x i32>* [[TMP6]], align 4, !tbaa [[TBAA0]] +; AVX512VL-NEXT: [[TMP5:%.*]] = bitcast i32* [[T5]] to <4 x i32>* +; AVX512VL-NEXT: store <4 x i32> [[TMP4]], <4 x i32>* [[TMP5]], align 4, !tbaa [[TBAA0]] ; AVX512VL-NEXT: store i32 [[T24]], i32* [[T21]], align 4, !tbaa [[TBAA0]] ; AVX512VL-NEXT: store i32 [[T28]], i32* [[T25]], align 4, !tbaa [[TBAA0]] ; AVX512VL-NEXT: store i32 [[T32]], i32* [[T29]], align 4, !tbaa [[TBAA0]] @@ -581,14 +581,14 @@ ; SSE-NEXT: [[TMP15:%.*]] = load float, float* [[TMP14]], align 4, !tbaa [[TBAA0]] ; SSE-NEXT: [[TMP16:%.*]] = getelementptr inbounds float, float* [[TMP1]], i64 44 ; SSE-NEXT: [[TMP17:%.*]] = load float, float* [[TMP16]], align 4, !tbaa [[TBAA0]] -; SSE-NEXT: [[TMP18:%.*]] = insertelement <4 x float> poison, float [[TMP3]], i32 0 -; SSE-NEXT: [[TMP19:%.*]] = insertelement <4 x float> [[TMP18]], float [[TMP7]], i32 1 -; SSE-NEXT: [[TMP20:%.*]] = insertelement <4 x float> [[TMP19]], float [[TMP11]], i32 2 -; SSE-NEXT: [[TMP21:%.*]] = insertelement <4 x float> [[TMP20]], float [[TMP15]], i32 3 -; SSE-NEXT: [[TMP22:%.*]] = insertelement <4 x float> poison, float [[TMP5]], i32 0 -; SSE-NEXT: [[TMP23:%.*]] = insertelement <4 x float> [[TMP22]], float [[TMP9]], i32 1 -; SSE-NEXT: [[TMP24:%.*]] = insertelement <4 x float> [[TMP23]], float [[TMP13]], i32 2 -; SSE-NEXT: [[TMP25:%.*]] = insertelement <4 x float> [[TMP24]], float [[TMP17]], i32 3 +; SSE-NEXT: [[TMP18:%.*]] = insertelement <4 x float> poison, float [[TMP3]], i64 0 +; SSE-NEXT: [[TMP19:%.*]] = insertelement <4 x float> [[TMP18]], float [[TMP7]], i64 1 +; SSE-NEXT: [[TMP20:%.*]] = insertelement <4 x float> [[TMP19]], float [[TMP11]], i64 2 +; SSE-NEXT: [[TMP21:%.*]] = insertelement <4 x float> [[TMP20]], float [[TMP15]], i64 3 +; SSE-NEXT: [[TMP22:%.*]] = insertelement <4 x float> poison, float [[TMP5]], i64 0 +; SSE-NEXT: [[TMP23:%.*]] = insertelement <4 x float> [[TMP22]], float [[TMP9]], i64 1 +; SSE-NEXT: [[TMP24:%.*]] = insertelement <4 x float> [[TMP23]], float [[TMP13]], i64 2 +; SSE-NEXT: [[TMP25:%.*]] = insertelement <4 x float> [[TMP24]], float [[TMP17]], i64 3 ; SSE-NEXT: [[TMP26:%.*]] = fdiv <4 x float> [[TMP21]], [[TMP25]] ; SSE-NEXT: [[TMP27:%.*]] = getelementptr inbounds float, float* [[TMP0:%.*]], i64 4 ; SSE-NEXT: [[TMP28:%.*]] = bitcast float* [[TMP0]] to <4 x float>* @@ -609,14 +609,14 @@ ; SSE-NEXT: [[TMP42:%.*]] = load float, float* [[TMP41]], align 4, !tbaa [[TBAA0]] ; SSE-NEXT: [[TMP43:%.*]] = getelementptr inbounds float, float* [[TMP1]], i64 23 ; SSE-NEXT: [[TMP44:%.*]] = load float, float* [[TMP43]], align 4, !tbaa [[TBAA0]] -; SSE-NEXT: [[TMP45:%.*]] = insertelement <4 x float> poison, float [[TMP30]], i32 0 -; SSE-NEXT: [[TMP46:%.*]] = insertelement <4 x float> [[TMP45]], float [[TMP34]], i32 1 -; SSE-NEXT: [[TMP47:%.*]] = insertelement <4 x float> [[TMP46]], float [[TMP38]], i32 2 -; SSE-NEXT: [[TMP48:%.*]] = insertelement <4 x float> [[TMP47]], float [[TMP42]], i32 3 -; SSE-NEXT: [[TMP49:%.*]] = insertelement <4 x float> poison, float [[TMP32]], i32 0 -; SSE-NEXT: [[TMP50:%.*]] = insertelement <4 x float> [[TMP49]], float [[TMP36]], i32 1 -; SSE-NEXT: [[TMP51:%.*]] = insertelement <4 x float> [[TMP50]], float [[TMP40]], i32 2 -; SSE-NEXT: [[TMP52:%.*]] = insertelement <4 x float> [[TMP51]], float [[TMP44]], i32 3 +; SSE-NEXT: [[TMP45:%.*]] = insertelement <4 x float> poison, float [[TMP30]], i64 0 +; SSE-NEXT: [[TMP46:%.*]] = insertelement <4 x float> [[TMP45]], float [[TMP34]], i64 1 +; SSE-NEXT: [[TMP47:%.*]] = insertelement <4 x float> [[TMP46]], float [[TMP38]], i64 2 +; SSE-NEXT: [[TMP48:%.*]] = insertelement <4 x float> [[TMP47]], float [[TMP42]], i64 3 +; SSE-NEXT: [[TMP49:%.*]] = insertelement <4 x float> poison, float [[TMP32]], i64 0 +; SSE-NEXT: [[TMP50:%.*]] = insertelement <4 x float> [[TMP49]], float [[TMP36]], i64 1 +; SSE-NEXT: [[TMP51:%.*]] = insertelement <4 x float> [[TMP50]], float [[TMP40]], i64 2 +; SSE-NEXT: [[TMP52:%.*]] = insertelement <4 x float> [[TMP51]], float [[TMP44]], i64 3 ; SSE-NEXT: [[TMP53:%.*]] = fdiv <4 x float> [[TMP48]], [[TMP52]] ; SSE-NEXT: [[TMP54:%.*]] = bitcast float* [[TMP27]] to <4 x float>* ; SSE-NEXT: store <4 x float> [[TMP53]], <4 x float>* [[TMP54]], align 4, !tbaa [[TBAA0]] @@ -654,22 +654,22 @@ ; AVX-NEXT: [[TMP31:%.*]] = load float, float* [[TMP30]], align 4, !tbaa [[TBAA0]] ; AVX-NEXT: [[TMP32:%.*]] = getelementptr inbounds float, float* [[TMP1]], i64 23 ; AVX-NEXT: [[TMP33:%.*]] = load float, float* [[TMP32]], align 4, !tbaa [[TBAA0]] -; AVX-NEXT: [[TMP34:%.*]] = insertelement <8 x float> poison, float [[TMP3]], i32 0 -; AVX-NEXT: [[TMP35:%.*]] = insertelement <8 x float> [[TMP34]], float [[TMP7]], i32 1 -; AVX-NEXT: [[TMP36:%.*]] = insertelement <8 x float> [[TMP35]], float [[TMP11]], i32 2 -; AVX-NEXT: [[TMP37:%.*]] = insertelement <8 x float> [[TMP36]], float [[TMP15]], i32 3 -; AVX-NEXT: [[TMP38:%.*]] = insertelement <8 x float> [[TMP37]], float [[TMP19]], i32 4 -; AVX-NEXT: [[TMP39:%.*]] = insertelement <8 x float> [[TMP38]], float [[TMP23]], i32 5 -; AVX-NEXT: [[TMP40:%.*]] = insertelement <8 x float> [[TMP39]], float [[TMP27]], i32 6 -; AVX-NEXT: [[TMP41:%.*]] = insertelement <8 x float> [[TMP40]], float [[TMP31]], i32 7 -; AVX-NEXT: [[TMP42:%.*]] = insertelement <8 x float> poison, float [[TMP5]], i32 0 -; AVX-NEXT: [[TMP43:%.*]] = insertelement <8 x float> [[TMP42]], float [[TMP9]], i32 1 -; AVX-NEXT: [[TMP44:%.*]] = insertelement <8 x float> [[TMP43]], float [[TMP13]], i32 2 -; AVX-NEXT: [[TMP45:%.*]] = insertelement <8 x float> [[TMP44]], float [[TMP17]], i32 3 -; AVX-NEXT: [[TMP46:%.*]] = insertelement <8 x float> [[TMP45]], float [[TMP21]], i32 4 -; AVX-NEXT: [[TMP47:%.*]] = insertelement <8 x float> [[TMP46]], float [[TMP25]], i32 5 -; AVX-NEXT: [[TMP48:%.*]] = insertelement <8 x float> [[TMP47]], float [[TMP29]], i32 6 -; AVX-NEXT: [[TMP49:%.*]] = insertelement <8 x float> [[TMP48]], float [[TMP33]], i32 7 +; AVX-NEXT: [[TMP34:%.*]] = insertelement <8 x float> poison, float [[TMP3]], i64 0 +; AVX-NEXT: [[TMP35:%.*]] = insertelement <8 x float> [[TMP34]], float [[TMP7]], i64 1 +; AVX-NEXT: [[TMP36:%.*]] = insertelement <8 x float> [[TMP35]], float [[TMP11]], i64 2 +; AVX-NEXT: [[TMP37:%.*]] = insertelement <8 x float> [[TMP36]], float [[TMP15]], i64 3 +; AVX-NEXT: [[TMP38:%.*]] = insertelement <8 x float> [[TMP37]], float [[TMP19]], i64 4 +; AVX-NEXT: [[TMP39:%.*]] = insertelement <8 x float> [[TMP38]], float [[TMP23]], i64 5 +; AVX-NEXT: [[TMP40:%.*]] = insertelement <8 x float> [[TMP39]], float [[TMP27]], i64 6 +; AVX-NEXT: [[TMP41:%.*]] = insertelement <8 x float> [[TMP40]], float [[TMP31]], i64 7 +; AVX-NEXT: [[TMP42:%.*]] = insertelement <8 x float> poison, float [[TMP5]], i64 0 +; AVX-NEXT: [[TMP43:%.*]] = insertelement <8 x float> [[TMP42]], float [[TMP9]], i64 1 +; AVX-NEXT: [[TMP44:%.*]] = insertelement <8 x float> [[TMP43]], float [[TMP13]], i64 2 +; AVX-NEXT: [[TMP45:%.*]] = insertelement <8 x float> [[TMP44]], float [[TMP17]], i64 3 +; AVX-NEXT: [[TMP46:%.*]] = insertelement <8 x float> [[TMP45]], float [[TMP21]], i64 4 +; AVX-NEXT: [[TMP47:%.*]] = insertelement <8 x float> [[TMP46]], float [[TMP25]], i64 5 +; AVX-NEXT: [[TMP48:%.*]] = insertelement <8 x float> [[TMP47]], float [[TMP29]], i64 6 +; AVX-NEXT: [[TMP49:%.*]] = insertelement <8 x float> [[TMP48]], float [[TMP33]], i64 7 ; AVX-NEXT: [[TMP50:%.*]] = fdiv <8 x float> [[TMP41]], [[TMP49]] ; AVX-NEXT: [[TMP51:%.*]] = bitcast float* [[TMP0:%.*]] to <8 x float>* ; AVX-NEXT: store <8 x float> [[TMP50]], <8 x float>* [[TMP51]], align 4, !tbaa [[TBAA0]] @@ -707,71 +707,71 @@ ; AVX2-NEXT: [[TMP31:%.*]] = load float, float* [[TMP30]], align 4, !tbaa [[TBAA0]] ; AVX2-NEXT: [[TMP32:%.*]] = getelementptr inbounds float, float* [[TMP1]], i64 23 ; AVX2-NEXT: [[TMP33:%.*]] = load float, float* [[TMP32]], align 4, !tbaa [[TBAA0]] -; AVX2-NEXT: [[TMP34:%.*]] = insertelement <8 x float> poison, float [[TMP3]], i32 0 -; AVX2-NEXT: [[TMP35:%.*]] = insertelement <8 x float> [[TMP34]], float [[TMP7]], i32 1 -; AVX2-NEXT: [[TMP36:%.*]] = insertelement <8 x float> [[TMP35]], float [[TMP11]], i32 2 -; AVX2-NEXT: [[TMP37:%.*]] = insertelement <8 x float> [[TMP36]], float [[TMP15]], i32 3 -; AVX2-NEXT: [[TMP38:%.*]] = insertelement <8 x float> [[TMP37]], float [[TMP19]], i32 4 -; AVX2-NEXT: [[TMP39:%.*]] = insertelement <8 x float> [[TMP38]], float [[TMP23]], i32 5 -; AVX2-NEXT: [[TMP40:%.*]] = insertelement <8 x float> [[TMP39]], float [[TMP27]], i32 6 -; AVX2-NEXT: [[TMP41:%.*]] = insertelement <8 x float> [[TMP40]], float [[TMP31]], i32 7 -; AVX2-NEXT: [[TMP42:%.*]] = insertelement <8 x float> poison, float [[TMP5]], i32 0 -; AVX2-NEXT: [[TMP43:%.*]] = insertelement <8 x float> [[TMP42]], float [[TMP9]], i32 1 -; AVX2-NEXT: [[TMP44:%.*]] = insertelement <8 x float> [[TMP43]], float [[TMP13]], i32 2 -; AVX2-NEXT: [[TMP45:%.*]] = insertelement <8 x float> [[TMP44]], float [[TMP17]], i32 3 -; AVX2-NEXT: [[TMP46:%.*]] = insertelement <8 x float> [[TMP45]], float [[TMP21]], i32 4 -; AVX2-NEXT: [[TMP47:%.*]] = insertelement <8 x float> [[TMP46]], float [[TMP25]], i32 5 -; AVX2-NEXT: [[TMP48:%.*]] = insertelement <8 x float> [[TMP47]], float [[TMP29]], i32 6 -; AVX2-NEXT: [[TMP49:%.*]] = insertelement <8 x float> [[TMP48]], float [[TMP33]], i32 7 +; AVX2-NEXT: [[TMP34:%.*]] = insertelement <8 x float> poison, float [[TMP3]], i64 0 +; AVX2-NEXT: [[TMP35:%.*]] = insertelement <8 x float> [[TMP34]], float [[TMP7]], i64 1 +; AVX2-NEXT: [[TMP36:%.*]] = insertelement <8 x float> [[TMP35]], float [[TMP11]], i64 2 +; AVX2-NEXT: [[TMP37:%.*]] = insertelement <8 x float> [[TMP36]], float [[TMP15]], i64 3 +; AVX2-NEXT: [[TMP38:%.*]] = insertelement <8 x float> [[TMP37]], float [[TMP19]], i64 4 +; AVX2-NEXT: [[TMP39:%.*]] = insertelement <8 x float> [[TMP38]], float [[TMP23]], i64 5 +; AVX2-NEXT: [[TMP40:%.*]] = insertelement <8 x float> [[TMP39]], float [[TMP27]], i64 6 +; AVX2-NEXT: [[TMP41:%.*]] = insertelement <8 x float> [[TMP40]], float [[TMP31]], i64 7 +; AVX2-NEXT: [[TMP42:%.*]] = insertelement <8 x float> poison, float [[TMP5]], i64 0 +; AVX2-NEXT: [[TMP43:%.*]] = insertelement <8 x float> [[TMP42]], float [[TMP9]], i64 1 +; AVX2-NEXT: [[TMP44:%.*]] = insertelement <8 x float> [[TMP43]], float [[TMP13]], i64 2 +; AVX2-NEXT: [[TMP45:%.*]] = insertelement <8 x float> [[TMP44]], float [[TMP17]], i64 3 +; AVX2-NEXT: [[TMP46:%.*]] = insertelement <8 x float> [[TMP45]], float [[TMP21]], i64 4 +; AVX2-NEXT: [[TMP47:%.*]] = insertelement <8 x float> [[TMP46]], float [[TMP25]], i64 5 +; AVX2-NEXT: [[TMP48:%.*]] = insertelement <8 x float> [[TMP47]], float [[TMP29]], i64 6 +; AVX2-NEXT: [[TMP49:%.*]] = insertelement <8 x float> [[TMP48]], float [[TMP33]], i64 7 ; AVX2-NEXT: [[TMP50:%.*]] = fdiv <8 x float> [[TMP41]], [[TMP49]] ; AVX2-NEXT: [[TMP51:%.*]] = bitcast float* [[TMP0:%.*]] to <8 x float>* ; AVX2-NEXT: store <8 x float> [[TMP50]], <8 x float>* [[TMP51]], align 4, !tbaa [[TBAA0]] ; AVX2-NEXT: ret void ; ; AVX512F-LABEL: @gather_load_div( -; AVX512F-NEXT: [[TMP3:%.*]] = insertelement <4 x float*> poison, float* [[TMP1:%.*]], i32 0 -; AVX512F-NEXT: [[TMP4:%.*]] = shufflevector <4 x float*> [[TMP3]], <4 x float*> poison, <4 x i32> zeroinitializer -; AVX512F-NEXT: [[TMP5:%.*]] = getelementptr float, <4 x float*> [[TMP4]], <4 x i64> -; AVX512F-NEXT: [[TMP6:%.*]] = insertelement <2 x float*> poison, float* [[TMP1]], i32 0 -; AVX512F-NEXT: [[TMP7:%.*]] = shufflevector <2 x float*> [[TMP6]], <2 x float*> poison, <2 x i32> zeroinitializer -; AVX512F-NEXT: [[TMP8:%.*]] = getelementptr float, <2 x float*> [[TMP7]], <2 x i64> -; AVX512F-NEXT: [[TMP9:%.*]] = getelementptr inbounds float, float* [[TMP1]], i64 20 -; AVX512F-NEXT: [[TMP10:%.*]] = insertelement <8 x float*> poison, float* [[TMP1]], i32 0 -; AVX512F-NEXT: [[TMP11:%.*]] = shufflevector <4 x float*> [[TMP5]], <4 x float*> poison, <8 x i32> -; AVX512F-NEXT: [[TMP12:%.*]] = shufflevector <8 x float*> [[TMP10]], <8 x float*> [[TMP11]], <8 x i32> -; AVX512F-NEXT: [[TMP13:%.*]] = shufflevector <2 x float*> [[TMP8]], <2 x float*> poison, <8 x i32> -; AVX512F-NEXT: [[TMP14:%.*]] = shufflevector <8 x float*> [[TMP12]], <8 x float*> [[TMP13]], <8 x i32> -; AVX512F-NEXT: [[TMP15:%.*]] = insertelement <8 x float*> [[TMP14]], float* [[TMP9]], i32 7 -; AVX512F-NEXT: [[TMP16:%.*]] = call <8 x float> @llvm.masked.gather.v8f32.v8p0f32(<8 x float*> [[TMP15]], i32 4, <8 x i1> , <8 x float> undef), !tbaa [[TBAA0]] -; AVX512F-NEXT: [[TMP17:%.*]] = shufflevector <8 x float*> [[TMP10]], <8 x float*> poison, <8 x i32> zeroinitializer -; AVX512F-NEXT: [[TMP18:%.*]] = getelementptr float, <8 x float*> [[TMP17]], <8 x i64> -; AVX512F-NEXT: [[TMP19:%.*]] = call <8 x float> @llvm.masked.gather.v8f32.v8p0f32(<8 x float*> [[TMP18]], i32 4, <8 x i1> , <8 x float> undef), !tbaa [[TBAA0]] -; AVX512F-NEXT: [[TMP20:%.*]] = fdiv <8 x float> [[TMP16]], [[TMP19]] -; AVX512F-NEXT: [[TMP21:%.*]] = bitcast float* [[TMP0:%.*]] to <8 x float>* -; AVX512F-NEXT: store <8 x float> [[TMP20]], <8 x float>* [[TMP21]], align 4, !tbaa [[TBAA0]] +; AVX512F-NEXT: [[TMP3:%.*]] = insertelement <4 x float*> poison, float* [[TMP1:%.*]], i64 0 +; AVX512F-NEXT: [[SHUFFLE1:%.*]] = shufflevector <4 x float*> [[TMP3]], <4 x float*> poison, <4 x i32> zeroinitializer +; AVX512F-NEXT: [[TMP4:%.*]] = getelementptr float, <4 x float*> [[SHUFFLE1]], <4 x i64> +; AVX512F-NEXT: [[TMP5:%.*]] = insertelement <2 x float*> poison, float* [[TMP1]], i64 0 +; AVX512F-NEXT: [[TMP6:%.*]] = shufflevector <2 x float*> [[TMP5]], <2 x float*> poison, <2 x i32> zeroinitializer +; AVX512F-NEXT: [[TMP7:%.*]] = getelementptr float, <2 x float*> [[TMP6]], <2 x i64> +; AVX512F-NEXT: [[TMP8:%.*]] = getelementptr inbounds float, float* [[TMP1]], i64 20 +; AVX512F-NEXT: [[TMP9:%.*]] = insertelement <8 x float*> poison, float* [[TMP1]], i64 0 +; AVX512F-NEXT: [[TMP10:%.*]] = shufflevector <4 x float*> [[TMP4]], <4 x float*> poison, <8 x i32> +; AVX512F-NEXT: [[TMP11:%.*]] = shufflevector <8 x float*> [[TMP9]], <8 x float*> [[TMP10]], <8 x i32> +; AVX512F-NEXT: [[TMP12:%.*]] = shufflevector <2 x float*> [[TMP7]], <2 x float*> poison, <8 x i32> +; AVX512F-NEXT: [[TMP13:%.*]] = shufflevector <8 x float*> [[TMP11]], <8 x float*> [[TMP12]], <8 x i32> +; AVX512F-NEXT: [[TMP14:%.*]] = insertelement <8 x float*> [[TMP13]], float* [[TMP8]], i64 7 +; AVX512F-NEXT: [[TMP15:%.*]] = call <8 x float> @llvm.masked.gather.v8f32.v8p0f32(<8 x float*> [[TMP14]], i32 4, <8 x i1> , <8 x float> undef), !tbaa [[TBAA0]] +; AVX512F-NEXT: [[SHUFFLE:%.*]] = shufflevector <8 x float*> [[TMP9]], <8 x float*> poison, <8 x i32> zeroinitializer +; AVX512F-NEXT: [[TMP16:%.*]] = getelementptr float, <8 x float*> [[SHUFFLE]], <8 x i64> +; AVX512F-NEXT: [[TMP17:%.*]] = call <8 x float> @llvm.masked.gather.v8f32.v8p0f32(<8 x float*> [[TMP16]], i32 4, <8 x i1> , <8 x float> undef), !tbaa [[TBAA0]] +; AVX512F-NEXT: [[TMP18:%.*]] = fdiv <8 x float> [[TMP15]], [[TMP17]] +; AVX512F-NEXT: [[TMP19:%.*]] = bitcast float* [[TMP0:%.*]] to <8 x float>* +; AVX512F-NEXT: store <8 x float> [[TMP18]], <8 x float>* [[TMP19]], align 4, !tbaa [[TBAA0]] ; AVX512F-NEXT: ret void ; ; AVX512VL-LABEL: @gather_load_div( -; AVX512VL-NEXT: [[TMP3:%.*]] = insertelement <4 x float*> poison, float* [[TMP1:%.*]], i32 0 -; AVX512VL-NEXT: [[TMP4:%.*]] = shufflevector <4 x float*> [[TMP3]], <4 x float*> poison, <4 x i32> zeroinitializer -; AVX512VL-NEXT: [[TMP5:%.*]] = getelementptr float, <4 x float*> [[TMP4]], <4 x i64> -; AVX512VL-NEXT: [[TMP6:%.*]] = insertelement <2 x float*> poison, float* [[TMP1]], i32 0 -; AVX512VL-NEXT: [[TMP7:%.*]] = shufflevector <2 x float*> [[TMP6]], <2 x float*> poison, <2 x i32> zeroinitializer -; AVX512VL-NEXT: [[TMP8:%.*]] = getelementptr float, <2 x float*> [[TMP7]], <2 x i64> -; AVX512VL-NEXT: [[TMP9:%.*]] = getelementptr inbounds float, float* [[TMP1]], i64 20 -; AVX512VL-NEXT: [[TMP10:%.*]] = insertelement <8 x float*> poison, float* [[TMP1]], i32 0 -; AVX512VL-NEXT: [[TMP11:%.*]] = shufflevector <4 x float*> [[TMP5]], <4 x float*> poison, <8 x i32> -; AVX512VL-NEXT: [[TMP12:%.*]] = shufflevector <8 x float*> [[TMP10]], <8 x float*> [[TMP11]], <8 x i32> -; AVX512VL-NEXT: [[TMP13:%.*]] = shufflevector <2 x float*> [[TMP8]], <2 x float*> poison, <8 x i32> -; AVX512VL-NEXT: [[TMP14:%.*]] = shufflevector <8 x float*> [[TMP12]], <8 x float*> [[TMP13]], <8 x i32> -; AVX512VL-NEXT: [[TMP15:%.*]] = insertelement <8 x float*> [[TMP14]], float* [[TMP9]], i32 7 -; AVX512VL-NEXT: [[TMP16:%.*]] = call <8 x float> @llvm.masked.gather.v8f32.v8p0f32(<8 x float*> [[TMP15]], i32 4, <8 x i1> , <8 x float> undef), !tbaa [[TBAA0]] -; AVX512VL-NEXT: [[TMP17:%.*]] = shufflevector <8 x float*> [[TMP10]], <8 x float*> poison, <8 x i32> zeroinitializer -; AVX512VL-NEXT: [[TMP18:%.*]] = getelementptr float, <8 x float*> [[TMP17]], <8 x i64> -; AVX512VL-NEXT: [[TMP19:%.*]] = call <8 x float> @llvm.masked.gather.v8f32.v8p0f32(<8 x float*> [[TMP18]], i32 4, <8 x i1> , <8 x float> undef), !tbaa [[TBAA0]] -; AVX512VL-NEXT: [[TMP20:%.*]] = fdiv <8 x float> [[TMP16]], [[TMP19]] -; AVX512VL-NEXT: [[TMP21:%.*]] = bitcast float* [[TMP0:%.*]] to <8 x float>* -; AVX512VL-NEXT: store <8 x float> [[TMP20]], <8 x float>* [[TMP21]], align 4, !tbaa [[TBAA0]] +; AVX512VL-NEXT: [[TMP3:%.*]] = insertelement <4 x float*> poison, float* [[TMP1:%.*]], i64 0 +; AVX512VL-NEXT: [[SHUFFLE1:%.*]] = shufflevector <4 x float*> [[TMP3]], <4 x float*> poison, <4 x i32> zeroinitializer +; AVX512VL-NEXT: [[TMP4:%.*]] = getelementptr float, <4 x float*> [[SHUFFLE1]], <4 x i64> +; AVX512VL-NEXT: [[TMP5:%.*]] = insertelement <2 x float*> poison, float* [[TMP1]], i64 0 +; AVX512VL-NEXT: [[TMP6:%.*]] = shufflevector <2 x float*> [[TMP5]], <2 x float*> poison, <2 x i32> zeroinitializer +; AVX512VL-NEXT: [[TMP7:%.*]] = getelementptr float, <2 x float*> [[TMP6]], <2 x i64> +; AVX512VL-NEXT: [[TMP8:%.*]] = getelementptr inbounds float, float* [[TMP1]], i64 20 +; AVX512VL-NEXT: [[TMP9:%.*]] = insertelement <8 x float*> poison, float* [[TMP1]], i64 0 +; AVX512VL-NEXT: [[TMP10:%.*]] = shufflevector <4 x float*> [[TMP4]], <4 x float*> poison, <8 x i32> +; AVX512VL-NEXT: [[TMP11:%.*]] = shufflevector <8 x float*> [[TMP9]], <8 x float*> [[TMP10]], <8 x i32> +; AVX512VL-NEXT: [[TMP12:%.*]] = shufflevector <2 x float*> [[TMP7]], <2 x float*> poison, <8 x i32> +; AVX512VL-NEXT: [[TMP13:%.*]] = shufflevector <8 x float*> [[TMP11]], <8 x float*> [[TMP12]], <8 x i32> +; AVX512VL-NEXT: [[TMP14:%.*]] = insertelement <8 x float*> [[TMP13]], float* [[TMP8]], i64 7 +; AVX512VL-NEXT: [[TMP15:%.*]] = call <8 x float> @llvm.masked.gather.v8f32.v8p0f32(<8 x float*> [[TMP14]], i32 4, <8 x i1> , <8 x float> undef), !tbaa [[TBAA0]] +; AVX512VL-NEXT: [[SHUFFLE:%.*]] = shufflevector <8 x float*> [[TMP9]], <8 x float*> poison, <8 x i32> zeroinitializer +; AVX512VL-NEXT: [[TMP16:%.*]] = getelementptr float, <8 x float*> [[SHUFFLE]], <8 x i64> +; AVX512VL-NEXT: [[TMP17:%.*]] = call <8 x float> @llvm.masked.gather.v8f32.v8p0f32(<8 x float*> [[TMP16]], i32 4, <8 x i1> , <8 x float> undef), !tbaa [[TBAA0]] +; AVX512VL-NEXT: [[TMP18:%.*]] = fdiv <8 x float> [[TMP15]], [[TMP17]] +; AVX512VL-NEXT: [[TMP19:%.*]] = bitcast float* [[TMP0:%.*]] to <8 x float>* +; AVX512VL-NEXT: store <8 x float> [[TMP18]], <8 x float>* [[TMP19]], align 4, !tbaa [[TBAA0]] ; AVX512VL-NEXT: ret void ; %3 = load float, float* %1, align 4, !tbaa !2 diff --git a/llvm/test/Transforms/SLPVectorizer/X86/pr47629.ll b/llvm/test/Transforms/SLPVectorizer/X86/pr47629.ll --- a/llvm/test/Transforms/SLPVectorizer/X86/pr47629.ll +++ b/llvm/test/Transforms/SLPVectorizer/X86/pr47629.ll @@ -14,10 +14,10 @@ ; CHECK-NEXT: [[TMP7:%.*]] = getelementptr inbounds i32, i32* [[TMP1]], i64 4 ; CHECK-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4, !tbaa [[TBAA0]] ; CHECK-NEXT: [[TMP9:%.*]] = load i32, i32* [[TMP3]], align 4, !tbaa [[TBAA0]] -; CHECK-NEXT: [[TMP10:%.*]] = insertelement <4 x i32> undef, i32 [[TMP4]], i32 0 -; CHECK-NEXT: [[TMP11:%.*]] = insertelement <4 x i32> [[TMP10]], i32 [[TMP6]], i32 1 -; CHECK-NEXT: [[TMP12:%.*]] = insertelement <4 x i32> [[TMP11]], i32 [[TMP8]], i32 2 -; CHECK-NEXT: [[TMP13:%.*]] = insertelement <4 x i32> [[TMP12]], i32 [[TMP9]], i32 3 +; CHECK-NEXT: [[TMP10:%.*]] = insertelement <4 x i32> undef, i32 [[TMP4]], i64 0 +; CHECK-NEXT: [[TMP11:%.*]] = insertelement <4 x i32> [[TMP10]], i32 [[TMP6]], i64 1 +; CHECK-NEXT: [[TMP12:%.*]] = insertelement <4 x i32> [[TMP11]], i32 [[TMP8]], i64 2 +; CHECK-NEXT: [[TMP13:%.*]] = insertelement <4 x i32> [[TMP12]], i32 [[TMP9]], i64 3 ; CHECK-NEXT: [[TMP14:%.*]] = add nsw <4 x i32> [[TMP13]], ; CHECK-NEXT: [[TMP15:%.*]] = bitcast i32* [[TMP0:%.*]] to <4 x i32>* ; CHECK-NEXT: store <4 x i32> [[TMP14]], <4 x i32>* [[TMP15]], align 4, !tbaa [[TBAA0]] @@ -75,10 +75,10 @@ ; AVX-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4, !tbaa [[TBAA0]] ; AVX-NEXT: [[TMP9:%.*]] = getelementptr inbounds i32, i32* [[TMP1]], i64 5 ; AVX-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4, !tbaa [[TBAA0]] -; AVX-NEXT: [[TMP11:%.*]] = insertelement <4 x i32> poison, i32 [[TMP4]], i32 0 -; AVX-NEXT: [[TMP12:%.*]] = insertelement <4 x i32> [[TMP11]], i32 [[TMP6]], i32 1 -; AVX-NEXT: [[TMP13:%.*]] = insertelement <4 x i32> [[TMP12]], i32 [[TMP8]], i32 2 -; AVX-NEXT: [[TMP14:%.*]] = insertelement <4 x i32> [[TMP13]], i32 [[TMP10]], i32 3 +; AVX-NEXT: [[TMP11:%.*]] = insertelement <4 x i32> poison, i32 [[TMP4]], i64 0 +; AVX-NEXT: [[TMP12:%.*]] = insertelement <4 x i32> [[TMP11]], i32 [[TMP6]], i64 1 +; AVX-NEXT: [[TMP13:%.*]] = insertelement <4 x i32> [[TMP12]], i32 [[TMP8]], i64 2 +; AVX-NEXT: [[TMP14:%.*]] = insertelement <4 x i32> [[TMP13]], i32 [[TMP10]], i64 3 ; AVX-NEXT: [[TMP15:%.*]] = add nsw <4 x i32> [[TMP14]], ; AVX-NEXT: [[TMP16:%.*]] = bitcast i32* [[TMP0:%.*]] to <4 x i32>* ; AVX-NEXT: store <4 x i32> [[TMP15]], <4 x i32>* [[TMP16]], align 4, !tbaa [[TBAA0]] @@ -93,10 +93,10 @@ ; AVX2-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4, !tbaa [[TBAA0]] ; AVX2-NEXT: [[TMP9:%.*]] = getelementptr inbounds i32, i32* [[TMP1]], i64 5 ; AVX2-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4, !tbaa [[TBAA0]] -; AVX2-NEXT: [[TMP11:%.*]] = insertelement <4 x i32> poison, i32 [[TMP4]], i32 0 -; AVX2-NEXT: [[TMP12:%.*]] = insertelement <4 x i32> [[TMP11]], i32 [[TMP6]], i32 1 -; AVX2-NEXT: [[TMP13:%.*]] = insertelement <4 x i32> [[TMP12]], i32 [[TMP8]], i32 2 -; AVX2-NEXT: [[TMP14:%.*]] = insertelement <4 x i32> [[TMP13]], i32 [[TMP10]], i32 3 +; AVX2-NEXT: [[TMP11:%.*]] = insertelement <4 x i32> poison, i32 [[TMP4]], i64 0 +; AVX2-NEXT: [[TMP12:%.*]] = insertelement <4 x i32> [[TMP11]], i32 [[TMP6]], i64 1 +; AVX2-NEXT: [[TMP13:%.*]] = insertelement <4 x i32> [[TMP12]], i32 [[TMP8]], i64 2 +; AVX2-NEXT: [[TMP14:%.*]] = insertelement <4 x i32> [[TMP13]], i32 [[TMP10]], i64 3 ; AVX2-NEXT: [[TMP15:%.*]] = add nsw <4 x i32> [[TMP14]], ; AVX2-NEXT: [[TMP16:%.*]] = bitcast i32* [[TMP0:%.*]] to <4 x i32>* ; AVX2-NEXT: store <4 x i32> [[TMP15]], <4 x i32>* [[TMP16]], align 4, !tbaa [[TBAA0]] @@ -111,23 +111,23 @@ ; AVX512F-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4, !tbaa [[TBAA0]] ; AVX512F-NEXT: [[TMP9:%.*]] = getelementptr inbounds i32, i32* [[TMP1]], i64 5 ; AVX512F-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4, !tbaa [[TBAA0]] -; AVX512F-NEXT: [[TMP11:%.*]] = insertelement <4 x i32> poison, i32 [[TMP4]], i32 0 -; AVX512F-NEXT: [[TMP12:%.*]] = insertelement <4 x i32> [[TMP11]], i32 [[TMP6]], i32 1 -; AVX512F-NEXT: [[TMP13:%.*]] = insertelement <4 x i32> [[TMP12]], i32 [[TMP8]], i32 2 -; AVX512F-NEXT: [[TMP14:%.*]] = insertelement <4 x i32> [[TMP13]], i32 [[TMP10]], i32 3 +; AVX512F-NEXT: [[TMP11:%.*]] = insertelement <4 x i32> poison, i32 [[TMP4]], i64 0 +; AVX512F-NEXT: [[TMP12:%.*]] = insertelement <4 x i32> [[TMP11]], i32 [[TMP6]], i64 1 +; AVX512F-NEXT: [[TMP13:%.*]] = insertelement <4 x i32> [[TMP12]], i32 [[TMP8]], i64 2 +; AVX512F-NEXT: [[TMP14:%.*]] = insertelement <4 x i32> [[TMP13]], i32 [[TMP10]], i64 3 ; AVX512F-NEXT: [[TMP15:%.*]] = add nsw <4 x i32> [[TMP14]], ; AVX512F-NEXT: [[TMP16:%.*]] = bitcast i32* [[TMP0:%.*]] to <4 x i32>* ; AVX512F-NEXT: store <4 x i32> [[TMP15]], <4 x i32>* [[TMP16]], align 4, !tbaa [[TBAA0]] ; AVX512F-NEXT: ret void ; ; AVX512VL-LABEL: @gather_load_2( -; AVX512VL-NEXT: [[TMP3:%.*]] = insertelement <4 x i32*> poison, i32* [[TMP1:%.*]], i32 0 -; AVX512VL-NEXT: [[TMP4:%.*]] = shufflevector <4 x i32*> [[TMP3]], <4 x i32*> poison, <4 x i32> zeroinitializer -; AVX512VL-NEXT: [[TMP5:%.*]] = getelementptr i32, <4 x i32*> [[TMP4]], <4 x i64> -; AVX512VL-NEXT: [[TMP6:%.*]] = call <4 x i32> @llvm.masked.gather.v4i32.v4p0i32(<4 x i32*> [[TMP5]], i32 4, <4 x i1> , <4 x i32> undef), !tbaa [[TBAA0]] -; AVX512VL-NEXT: [[TMP7:%.*]] = add nsw <4 x i32> [[TMP6]], -; AVX512VL-NEXT: [[TMP8:%.*]] = bitcast i32* [[TMP0:%.*]] to <4 x i32>* -; AVX512VL-NEXT: store <4 x i32> [[TMP7]], <4 x i32>* [[TMP8]], align 4, !tbaa [[TBAA0]] +; AVX512VL-NEXT: [[TMP3:%.*]] = insertelement <4 x i32*> poison, i32* [[TMP1:%.*]], i64 0 +; AVX512VL-NEXT: [[SHUFFLE:%.*]] = shufflevector <4 x i32*> [[TMP3]], <4 x i32*> poison, <4 x i32> zeroinitializer +; AVX512VL-NEXT: [[TMP4:%.*]] = getelementptr i32, <4 x i32*> [[SHUFFLE]], <4 x i64> +; AVX512VL-NEXT: [[TMP5:%.*]] = call <4 x i32> @llvm.masked.gather.v4i32.v4p0i32(<4 x i32*> [[TMP4]], i32 4, <4 x i1> , <4 x i32> undef), !tbaa [[TBAA0]] +; AVX512VL-NEXT: [[TMP6:%.*]] = add nsw <4 x i32> [[TMP5]], +; AVX512VL-NEXT: [[TMP7:%.*]] = bitcast i32* [[TMP0:%.*]] to <4 x i32>* +; AVX512VL-NEXT: store <4 x i32> [[TMP6]], <4 x i32>* [[TMP7]], align 4, !tbaa [[TBAA0]] ; AVX512VL-NEXT: ret void ; %3 = getelementptr inbounds i32, i32* %1, i64 1 @@ -211,14 +211,14 @@ ; AVX-NEXT: [[TMP15:%.*]] = load i32, i32* [[TMP14]], align 4, !tbaa [[TBAA0]] ; AVX-NEXT: [[TMP16:%.*]] = getelementptr inbounds i32, i32* [[TMP1]], i64 21 ; AVX-NEXT: [[TMP17:%.*]] = load i32, i32* [[TMP16]], align 4, !tbaa [[TBAA0]] -; AVX-NEXT: [[TMP18:%.*]] = insertelement <8 x i32> poison, i32 [[TMP3]], i32 0 -; AVX-NEXT: [[TMP19:%.*]] = insertelement <8 x i32> [[TMP18]], i32 [[TMP5]], i32 1 -; AVX-NEXT: [[TMP20:%.*]] = insertelement <8 x i32> [[TMP19]], i32 [[TMP7]], i32 2 -; AVX-NEXT: [[TMP21:%.*]] = insertelement <8 x i32> [[TMP20]], i32 [[TMP9]], i32 3 -; AVX-NEXT: [[TMP22:%.*]] = insertelement <8 x i32> [[TMP21]], i32 [[TMP11]], i32 4 -; AVX-NEXT: [[TMP23:%.*]] = insertelement <8 x i32> [[TMP22]], i32 [[TMP13]], i32 5 -; AVX-NEXT: [[TMP24:%.*]] = insertelement <8 x i32> [[TMP23]], i32 [[TMP15]], i32 6 -; AVX-NEXT: [[TMP25:%.*]] = insertelement <8 x i32> [[TMP24]], i32 [[TMP17]], i32 7 +; AVX-NEXT: [[TMP18:%.*]] = insertelement <8 x i32> poison, i32 [[TMP3]], i64 0 +; AVX-NEXT: [[TMP19:%.*]] = insertelement <8 x i32> [[TMP18]], i32 [[TMP5]], i64 1 +; AVX-NEXT: [[TMP20:%.*]] = insertelement <8 x i32> [[TMP19]], i32 [[TMP7]], i64 2 +; AVX-NEXT: [[TMP21:%.*]] = insertelement <8 x i32> [[TMP20]], i32 [[TMP9]], i64 3 +; AVX-NEXT: [[TMP22:%.*]] = insertelement <8 x i32> [[TMP21]], i32 [[TMP11]], i64 4 +; AVX-NEXT: [[TMP23:%.*]] = insertelement <8 x i32> [[TMP22]], i32 [[TMP13]], i64 5 +; AVX-NEXT: [[TMP24:%.*]] = insertelement <8 x i32> [[TMP23]], i32 [[TMP15]], i64 6 +; AVX-NEXT: [[TMP25:%.*]] = insertelement <8 x i32> [[TMP24]], i32 [[TMP17]], i64 7 ; AVX-NEXT: [[TMP26:%.*]] = add <8 x i32> [[TMP25]], ; AVX-NEXT: [[TMP27:%.*]] = bitcast i32* [[TMP0:%.*]] to <8 x i32>* ; AVX-NEXT: store <8 x i32> [[TMP26]], <8 x i32>* [[TMP27]], align 4, !tbaa [[TBAA0]] @@ -240,14 +240,14 @@ ; AVX2-NEXT: [[TMP15:%.*]] = load i32, i32* [[TMP14]], align 4, !tbaa [[TBAA0]] ; AVX2-NEXT: [[TMP16:%.*]] = getelementptr inbounds i32, i32* [[TMP1]], i64 21 ; AVX2-NEXT: [[TMP17:%.*]] = load i32, i32* [[TMP16]], align 4, !tbaa [[TBAA0]] -; AVX2-NEXT: [[TMP18:%.*]] = insertelement <8 x i32> poison, i32 [[TMP3]], i32 0 -; AVX2-NEXT: [[TMP19:%.*]] = insertelement <8 x i32> [[TMP18]], i32 [[TMP5]], i32 1 -; AVX2-NEXT: [[TMP20:%.*]] = insertelement <8 x i32> [[TMP19]], i32 [[TMP7]], i32 2 -; AVX2-NEXT: [[TMP21:%.*]] = insertelement <8 x i32> [[TMP20]], i32 [[TMP9]], i32 3 -; AVX2-NEXT: [[TMP22:%.*]] = insertelement <8 x i32> [[TMP21]], i32 [[TMP11]], i32 4 -; AVX2-NEXT: [[TMP23:%.*]] = insertelement <8 x i32> [[TMP22]], i32 [[TMP13]], i32 5 -; AVX2-NEXT: [[TMP24:%.*]] = insertelement <8 x i32> [[TMP23]], i32 [[TMP15]], i32 6 -; AVX2-NEXT: [[TMP25:%.*]] = insertelement <8 x i32> [[TMP24]], i32 [[TMP17]], i32 7 +; AVX2-NEXT: [[TMP18:%.*]] = insertelement <8 x i32> poison, i32 [[TMP3]], i64 0 +; AVX2-NEXT: [[TMP19:%.*]] = insertelement <8 x i32> [[TMP18]], i32 [[TMP5]], i64 1 +; AVX2-NEXT: [[TMP20:%.*]] = insertelement <8 x i32> [[TMP19]], i32 [[TMP7]], i64 2 +; AVX2-NEXT: [[TMP21:%.*]] = insertelement <8 x i32> [[TMP20]], i32 [[TMP9]], i64 3 +; AVX2-NEXT: [[TMP22:%.*]] = insertelement <8 x i32> [[TMP21]], i32 [[TMP11]], i64 4 +; AVX2-NEXT: [[TMP23:%.*]] = insertelement <8 x i32> [[TMP22]], i32 [[TMP13]], i64 5 +; AVX2-NEXT: [[TMP24:%.*]] = insertelement <8 x i32> [[TMP23]], i32 [[TMP15]], i64 6 +; AVX2-NEXT: [[TMP25:%.*]] = insertelement <8 x i32> [[TMP24]], i32 [[TMP17]], i64 7 ; AVX2-NEXT: [[TMP26:%.*]] = add <8 x i32> [[TMP25]], ; AVX2-NEXT: [[TMP27:%.*]] = bitcast i32* [[TMP0:%.*]] to <8 x i32>* ; AVX2-NEXT: store <8 x i32> [[TMP26]], <8 x i32>* [[TMP27]], align 4, !tbaa [[TBAA0]] @@ -261,10 +261,10 @@ ; AVX512F-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4, !tbaa [[TBAA0]] ; AVX512F-NEXT: [[TMP8:%.*]] = getelementptr inbounds i32, i32* [[TMP1]], i64 15 ; AVX512F-NEXT: [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4, !tbaa [[TBAA0]] -; AVX512F-NEXT: [[TMP10:%.*]] = insertelement <4 x i32> poison, i32 [[TMP3]], i32 0 -; AVX512F-NEXT: [[TMP11:%.*]] = insertelement <4 x i32> [[TMP10]], i32 [[TMP5]], i32 1 -; AVX512F-NEXT: [[TMP12:%.*]] = insertelement <4 x i32> [[TMP11]], i32 [[TMP7]], i32 2 -; AVX512F-NEXT: [[TMP13:%.*]] = insertelement <4 x i32> [[TMP12]], i32 [[TMP9]], i32 3 +; AVX512F-NEXT: [[TMP10:%.*]] = insertelement <4 x i32> poison, i32 [[TMP3]], i64 0 +; AVX512F-NEXT: [[TMP11:%.*]] = insertelement <4 x i32> [[TMP10]], i32 [[TMP5]], i64 1 +; AVX512F-NEXT: [[TMP12:%.*]] = insertelement <4 x i32> [[TMP11]], i32 [[TMP7]], i64 2 +; AVX512F-NEXT: [[TMP13:%.*]] = insertelement <4 x i32> [[TMP12]], i32 [[TMP9]], i64 3 ; AVX512F-NEXT: [[TMP14:%.*]] = add <4 x i32> [[TMP13]], ; AVX512F-NEXT: [[TMP15:%.*]] = getelementptr inbounds i32, i32* [[TMP0:%.*]], i64 4 ; AVX512F-NEXT: [[TMP16:%.*]] = bitcast i32* [[TMP0]] to <4 x i32>* @@ -277,10 +277,10 @@ ; AVX512F-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4, !tbaa [[TBAA0]] ; AVX512F-NEXT: [[TMP23:%.*]] = getelementptr inbounds i32, i32* [[TMP1]], i64 21 ; AVX512F-NEXT: [[TMP24:%.*]] = load i32, i32* [[TMP23]], align 4, !tbaa [[TBAA0]] -; AVX512F-NEXT: [[TMP25:%.*]] = insertelement <4 x i32> poison, i32 [[TMP18]], i32 0 -; AVX512F-NEXT: [[TMP26:%.*]] = insertelement <4 x i32> [[TMP25]], i32 [[TMP20]], i32 1 -; AVX512F-NEXT: [[TMP27:%.*]] = insertelement <4 x i32> [[TMP26]], i32 [[TMP22]], i32 2 -; AVX512F-NEXT: [[TMP28:%.*]] = insertelement <4 x i32> [[TMP27]], i32 [[TMP24]], i32 3 +; AVX512F-NEXT: [[TMP25:%.*]] = insertelement <4 x i32> poison, i32 [[TMP18]], i64 0 +; AVX512F-NEXT: [[TMP26:%.*]] = insertelement <4 x i32> [[TMP25]], i32 [[TMP20]], i64 1 +; AVX512F-NEXT: [[TMP27:%.*]] = insertelement <4 x i32> [[TMP26]], i32 [[TMP22]], i64 2 +; AVX512F-NEXT: [[TMP28:%.*]] = insertelement <4 x i32> [[TMP27]], i32 [[TMP24]], i64 3 ; AVX512F-NEXT: [[TMP29:%.*]] = add <4 x i32> [[TMP28]], ; AVX512F-NEXT: [[TMP30:%.*]] = bitcast i32* [[TMP15]] to <4 x i32>* ; AVX512F-NEXT: store <4 x i32> [[TMP29]], <4 x i32>* [[TMP30]], align 4, !tbaa [[TBAA0]] @@ -291,28 +291,28 @@ ; AVX512VL-NEXT: [[TMP4:%.*]] = add i32 [[TMP3]], 1 ; AVX512VL-NEXT: [[TMP5:%.*]] = getelementptr inbounds i32, i32* [[TMP0:%.*]], i64 1 ; AVX512VL-NEXT: store i32 [[TMP4]], i32* [[TMP0]], align 4, !tbaa [[TBAA0]] -; AVX512VL-NEXT: [[TMP6:%.*]] = insertelement <4 x i32*> poison, i32* [[TMP1]], i32 0 -; AVX512VL-NEXT: [[TMP7:%.*]] = shufflevector <4 x i32*> [[TMP6]], <4 x i32*> poison, <4 x i32> zeroinitializer -; AVX512VL-NEXT: [[TMP8:%.*]] = getelementptr i32, <4 x i32*> [[TMP7]], <4 x i64> -; AVX512VL-NEXT: [[TMP9:%.*]] = call <4 x i32> @llvm.masked.gather.v4i32.v4p0i32(<4 x i32*> [[TMP8]], i32 4, <4 x i1> , <4 x i32> undef), !tbaa [[TBAA0]] -; AVX512VL-NEXT: [[TMP10:%.*]] = add <4 x i32> [[TMP9]], -; AVX512VL-NEXT: [[TMP11:%.*]] = getelementptr inbounds i32, i32* [[TMP0]], i64 5 -; AVX512VL-NEXT: [[TMP12:%.*]] = bitcast i32* [[TMP5]] to <4 x i32>* -; AVX512VL-NEXT: store <4 x i32> [[TMP10]], <4 x i32>* [[TMP12]], align 4, !tbaa [[TBAA0]] -; AVX512VL-NEXT: [[TMP13:%.*]] = getelementptr inbounds i32, i32* [[TMP1]], i64 9 -; AVX512VL-NEXT: [[TMP14:%.*]] = load i32, i32* [[TMP13]], align 4, !tbaa [[TBAA0]] -; AVX512VL-NEXT: [[TMP15:%.*]] = add i32 [[TMP14]], 2 -; AVX512VL-NEXT: [[TMP16:%.*]] = getelementptr inbounds i32, i32* [[TMP0]], i64 6 -; AVX512VL-NEXT: store i32 [[TMP15]], i32* [[TMP11]], align 4, !tbaa [[TBAA0]] -; AVX512VL-NEXT: [[TMP17:%.*]] = getelementptr inbounds i32, i32* [[TMP1]], i64 6 -; AVX512VL-NEXT: [[TMP18:%.*]] = load i32, i32* [[TMP17]], align 4, !tbaa [[TBAA0]] -; AVX512VL-NEXT: [[TMP19:%.*]] = add i32 [[TMP18]], 3 -; AVX512VL-NEXT: [[TMP20:%.*]] = getelementptr inbounds i32, i32* [[TMP0]], i64 7 -; AVX512VL-NEXT: store i32 [[TMP19]], i32* [[TMP16]], align 4, !tbaa [[TBAA0]] -; AVX512VL-NEXT: [[TMP21:%.*]] = getelementptr inbounds i32, i32* [[TMP1]], i64 21 -; AVX512VL-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4, !tbaa [[TBAA0]] -; AVX512VL-NEXT: [[TMP23:%.*]] = add i32 [[TMP22]], 4 -; AVX512VL-NEXT: store i32 [[TMP23]], i32* [[TMP20]], align 4, !tbaa [[TBAA0]] +; AVX512VL-NEXT: [[TMP6:%.*]] = insertelement <4 x i32*> poison, i32* [[TMP1]], i64 0 +; AVX512VL-NEXT: [[SHUFFLE:%.*]] = shufflevector <4 x i32*> [[TMP6]], <4 x i32*> poison, <4 x i32> zeroinitializer +; AVX512VL-NEXT: [[TMP7:%.*]] = getelementptr i32, <4 x i32*> [[SHUFFLE]], <4 x i64> +; AVX512VL-NEXT: [[TMP8:%.*]] = call <4 x i32> @llvm.masked.gather.v4i32.v4p0i32(<4 x i32*> [[TMP7]], i32 4, <4 x i1> , <4 x i32> undef), !tbaa [[TBAA0]] +; AVX512VL-NEXT: [[TMP9:%.*]] = add <4 x i32> [[TMP8]], +; AVX512VL-NEXT: [[TMP10:%.*]] = getelementptr inbounds i32, i32* [[TMP0]], i64 5 +; AVX512VL-NEXT: [[TMP11:%.*]] = bitcast i32* [[TMP5]] to <4 x i32>* +; AVX512VL-NEXT: store <4 x i32> [[TMP9]], <4 x i32>* [[TMP11]], align 4, !tbaa [[TBAA0]] +; AVX512VL-NEXT: [[TMP12:%.*]] = getelementptr inbounds i32, i32* [[TMP1]], i64 9 +; AVX512VL-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP12]], align 4, !tbaa [[TBAA0]] +; AVX512VL-NEXT: [[TMP14:%.*]] = add i32 [[TMP13]], 2 +; AVX512VL-NEXT: [[TMP15:%.*]] = getelementptr inbounds i32, i32* [[TMP0]], i64 6 +; AVX512VL-NEXT: store i32 [[TMP14]], i32* [[TMP10]], align 4, !tbaa [[TBAA0]] +; AVX512VL-NEXT: [[TMP16:%.*]] = getelementptr inbounds i32, i32* [[TMP1]], i64 6 +; AVX512VL-NEXT: [[TMP17:%.*]] = load i32, i32* [[TMP16]], align 4, !tbaa [[TBAA0]] +; AVX512VL-NEXT: [[TMP18:%.*]] = add i32 [[TMP17]], 3 +; AVX512VL-NEXT: [[TMP19:%.*]] = getelementptr inbounds i32, i32* [[TMP0]], i64 7 +; AVX512VL-NEXT: store i32 [[TMP18]], i32* [[TMP15]], align 4, !tbaa [[TBAA0]] +; AVX512VL-NEXT: [[TMP20:%.*]] = getelementptr inbounds i32, i32* [[TMP1]], i64 21 +; AVX512VL-NEXT: [[TMP21:%.*]] = load i32, i32* [[TMP20]], align 4, !tbaa [[TBAA0]] +; AVX512VL-NEXT: [[TMP22:%.*]] = add i32 [[TMP21]], 4 +; AVX512VL-NEXT: store i32 [[TMP22]], i32* [[TMP19]], align 4, !tbaa [[TBAA0]] ; AVX512VL-NEXT: ret void ; %3 = load i32, i32* %1, align 4, !tbaa !2 @@ -414,14 +414,14 @@ ; AVX-NEXT: [[T23:%.*]] = load i32, i32* [[T22]], align 4, !tbaa [[TBAA0]] ; AVX-NEXT: [[T27:%.*]] = load i32, i32* [[T26]], align 4, !tbaa [[TBAA0]] ; AVX-NEXT: [[T31:%.*]] = load i32, i32* [[T30]], align 4, !tbaa [[TBAA0]] -; AVX-NEXT: [[TMP1:%.*]] = insertelement <8 x i32> poison, i32 [[T3]], i32 0 -; AVX-NEXT: [[TMP2:%.*]] = insertelement <8 x i32> [[TMP1]], i32 [[T7]], i32 1 -; AVX-NEXT: [[TMP3:%.*]] = insertelement <8 x i32> [[TMP2]], i32 [[T11]], i32 2 -; AVX-NEXT: [[TMP4:%.*]] = insertelement <8 x i32> [[TMP3]], i32 [[T15]], i32 3 -; AVX-NEXT: [[TMP5:%.*]] = insertelement <8 x i32> [[TMP4]], i32 [[T19]], i32 4 -; AVX-NEXT: [[TMP6:%.*]] = insertelement <8 x i32> [[TMP5]], i32 [[T23]], i32 5 -; AVX-NEXT: [[TMP7:%.*]] = insertelement <8 x i32> [[TMP6]], i32 [[T27]], i32 6 -; AVX-NEXT: [[TMP8:%.*]] = insertelement <8 x i32> [[TMP7]], i32 [[T31]], i32 7 +; AVX-NEXT: [[TMP1:%.*]] = insertelement <8 x i32> poison, i32 [[T3]], i64 0 +; AVX-NEXT: [[TMP2:%.*]] = insertelement <8 x i32> [[TMP1]], i32 [[T7]], i64 1 +; AVX-NEXT: [[TMP3:%.*]] = insertelement <8 x i32> [[TMP2]], i32 [[T11]], i64 2 +; AVX-NEXT: [[TMP4:%.*]] = insertelement <8 x i32> [[TMP3]], i32 [[T15]], i64 3 +; AVX-NEXT: [[TMP5:%.*]] = insertelement <8 x i32> [[TMP4]], i32 [[T19]], i64 4 +; AVX-NEXT: [[TMP6:%.*]] = insertelement <8 x i32> [[TMP5]], i32 [[T23]], i64 5 +; AVX-NEXT: [[TMP7:%.*]] = insertelement <8 x i32> [[TMP6]], i32 [[T27]], i64 6 +; AVX-NEXT: [[TMP8:%.*]] = insertelement <8 x i32> [[TMP7]], i32 [[T31]], i64 7 ; AVX-NEXT: [[TMP9:%.*]] = add <8 x i32> [[TMP8]], ; AVX-NEXT: [[TMP10:%.*]] = bitcast i32* [[T0:%.*]] to <8 x i32>* ; AVX-NEXT: store <8 x i32> [[TMP9]], <8 x i32>* [[TMP10]], align 4, !tbaa [[TBAA0]] @@ -443,14 +443,14 @@ ; AVX2-NEXT: [[T23:%.*]] = load i32, i32* [[T22]], align 4, !tbaa [[TBAA0]] ; AVX2-NEXT: [[T27:%.*]] = load i32, i32* [[T26]], align 4, !tbaa [[TBAA0]] ; AVX2-NEXT: [[T31:%.*]] = load i32, i32* [[T30]], align 4, !tbaa [[TBAA0]] -; AVX2-NEXT: [[TMP1:%.*]] = insertelement <8 x i32> poison, i32 [[T3]], i32 0 -; AVX2-NEXT: [[TMP2:%.*]] = insertelement <8 x i32> [[TMP1]], i32 [[T7]], i32 1 -; AVX2-NEXT: [[TMP3:%.*]] = insertelement <8 x i32> [[TMP2]], i32 [[T11]], i32 2 -; AVX2-NEXT: [[TMP4:%.*]] = insertelement <8 x i32> [[TMP3]], i32 [[T15]], i32 3 -; AVX2-NEXT: [[TMP5:%.*]] = insertelement <8 x i32> [[TMP4]], i32 [[T19]], i32 4 -; AVX2-NEXT: [[TMP6:%.*]] = insertelement <8 x i32> [[TMP5]], i32 [[T23]], i32 5 -; AVX2-NEXT: [[TMP7:%.*]] = insertelement <8 x i32> [[TMP6]], i32 [[T27]], i32 6 -; AVX2-NEXT: [[TMP8:%.*]] = insertelement <8 x i32> [[TMP7]], i32 [[T31]], i32 7 +; AVX2-NEXT: [[TMP1:%.*]] = insertelement <8 x i32> poison, i32 [[T3]], i64 0 +; AVX2-NEXT: [[TMP2:%.*]] = insertelement <8 x i32> [[TMP1]], i32 [[T7]], i64 1 +; AVX2-NEXT: [[TMP3:%.*]] = insertelement <8 x i32> [[TMP2]], i32 [[T11]], i64 2 +; AVX2-NEXT: [[TMP4:%.*]] = insertelement <8 x i32> [[TMP3]], i32 [[T15]], i64 3 +; AVX2-NEXT: [[TMP5:%.*]] = insertelement <8 x i32> [[TMP4]], i32 [[T19]], i64 4 +; AVX2-NEXT: [[TMP6:%.*]] = insertelement <8 x i32> [[TMP5]], i32 [[T23]], i64 5 +; AVX2-NEXT: [[TMP7:%.*]] = insertelement <8 x i32> [[TMP6]], i32 [[T27]], i64 6 +; AVX2-NEXT: [[TMP8:%.*]] = insertelement <8 x i32> [[TMP7]], i32 [[T31]], i64 7 ; AVX2-NEXT: [[TMP9:%.*]] = add <8 x i32> [[TMP8]], ; AVX2-NEXT: [[TMP10:%.*]] = bitcast i32* [[T0:%.*]] to <8 x i32>* ; AVX2-NEXT: store <8 x i32> [[TMP9]], <8 x i32>* [[TMP10]], align 4, !tbaa [[TBAA0]] @@ -473,15 +473,15 @@ ; AVX512F-NEXT: [[T23:%.*]] = load i32, i32* [[T22]], align 4, !tbaa [[TBAA0]] ; AVX512F-NEXT: [[T27:%.*]] = load i32, i32* [[T26]], align 4, !tbaa [[TBAA0]] ; AVX512F-NEXT: [[T31:%.*]] = load i32, i32* [[T30]], align 4, !tbaa [[TBAA0]] -; AVX512F-NEXT: [[TMP1:%.*]] = insertelement <4 x i32> poison, i32 [[T3]], i32 0 -; AVX512F-NEXT: [[TMP2:%.*]] = insertelement <4 x i32> [[TMP1]], i32 [[T7]], i32 1 -; AVX512F-NEXT: [[TMP3:%.*]] = insertelement <4 x i32> [[TMP2]], i32 [[T11]], i32 2 -; AVX512F-NEXT: [[TMP4:%.*]] = insertelement <4 x i32> [[TMP3]], i32 [[T15]], i32 3 +; AVX512F-NEXT: [[TMP1:%.*]] = insertelement <4 x i32> poison, i32 [[T3]], i64 0 +; AVX512F-NEXT: [[TMP2:%.*]] = insertelement <4 x i32> [[TMP1]], i32 [[T7]], i64 1 +; AVX512F-NEXT: [[TMP3:%.*]] = insertelement <4 x i32> [[TMP2]], i32 [[T11]], i64 2 +; AVX512F-NEXT: [[TMP4:%.*]] = insertelement <4 x i32> [[TMP3]], i32 [[T15]], i64 3 ; AVX512F-NEXT: [[TMP5:%.*]] = add <4 x i32> [[TMP4]], -; AVX512F-NEXT: [[TMP6:%.*]] = insertelement <4 x i32> poison, i32 [[T19]], i32 0 -; AVX512F-NEXT: [[TMP7:%.*]] = insertelement <4 x i32> [[TMP6]], i32 [[T23]], i32 1 -; AVX512F-NEXT: [[TMP8:%.*]] = insertelement <4 x i32> [[TMP7]], i32 [[T27]], i32 2 -; AVX512F-NEXT: [[TMP9:%.*]] = insertelement <4 x i32> [[TMP8]], i32 [[T31]], i32 3 +; AVX512F-NEXT: [[TMP6:%.*]] = insertelement <4 x i32> poison, i32 [[T19]], i64 0 +; AVX512F-NEXT: [[TMP7:%.*]] = insertelement <4 x i32> [[TMP6]], i32 [[T23]], i64 1 +; AVX512F-NEXT: [[TMP8:%.*]] = insertelement <4 x i32> [[TMP7]], i32 [[T27]], i64 2 +; AVX512F-NEXT: [[TMP9:%.*]] = insertelement <4 x i32> [[TMP8]], i32 [[T31]], i64 3 ; AVX512F-NEXT: [[TMP10:%.*]] = add <4 x i32> [[TMP9]], ; AVX512F-NEXT: [[TMP11:%.*]] = bitcast i32* [[T0]] to <4 x i32>* ; AVX512F-NEXT: store <4 x i32> [[TMP5]], <4 x i32>* [[TMP11]], align 4, !tbaa [[TBAA0]] @@ -491,9 +491,9 @@ ; ; AVX512VL-LABEL: @gather_load_4( ; AVX512VL-NEXT: [[T5:%.*]] = getelementptr inbounds i32, i32* [[T0:%.*]], i64 1 -; AVX512VL-NEXT: [[TMP1:%.*]] = insertelement <4 x i32*> poison, i32* [[T1:%.*]], i32 0 -; AVX512VL-NEXT: [[TMP2:%.*]] = shufflevector <4 x i32*> [[TMP1]], <4 x i32*> poison, <4 x i32> zeroinitializer -; AVX512VL-NEXT: [[TMP3:%.*]] = getelementptr i32, <4 x i32*> [[TMP2]], <4 x i64> +; AVX512VL-NEXT: [[TMP1:%.*]] = insertelement <4 x i32*> poison, i32* [[T1:%.*]], i64 0 +; AVX512VL-NEXT: [[SHUFFLE:%.*]] = shufflevector <4 x i32*> [[TMP1]], <4 x i32*> poison, <4 x i32> zeroinitializer +; AVX512VL-NEXT: [[TMP2:%.*]] = getelementptr i32, <4 x i32*> [[SHUFFLE]], <4 x i64> ; AVX512VL-NEXT: [[T21:%.*]] = getelementptr inbounds i32, i32* [[T0]], i64 5 ; AVX512VL-NEXT: [[T22:%.*]] = getelementptr inbounds i32, i32* [[T1]], i64 9 ; AVX512VL-NEXT: [[T25:%.*]] = getelementptr inbounds i32, i32* [[T0]], i64 6 @@ -501,18 +501,18 @@ ; AVX512VL-NEXT: [[T29:%.*]] = getelementptr inbounds i32, i32* [[T0]], i64 7 ; AVX512VL-NEXT: [[T30:%.*]] = getelementptr inbounds i32, i32* [[T1]], i64 21 ; AVX512VL-NEXT: [[T3:%.*]] = load i32, i32* [[T1]], align 4, !tbaa [[TBAA0]] -; AVX512VL-NEXT: [[TMP4:%.*]] = call <4 x i32> @llvm.masked.gather.v4i32.v4p0i32(<4 x i32*> [[TMP3]], i32 4, <4 x i1> , <4 x i32> undef), !tbaa [[TBAA0]] +; AVX512VL-NEXT: [[TMP3:%.*]] = call <4 x i32> @llvm.masked.gather.v4i32.v4p0i32(<4 x i32*> [[TMP2]], i32 4, <4 x i1> , <4 x i32> undef), !tbaa [[TBAA0]] ; AVX512VL-NEXT: [[T23:%.*]] = load i32, i32* [[T22]], align 4, !tbaa [[TBAA0]] ; AVX512VL-NEXT: [[T27:%.*]] = load i32, i32* [[T26]], align 4, !tbaa [[TBAA0]] ; AVX512VL-NEXT: [[T31:%.*]] = load i32, i32* [[T30]], align 4, !tbaa [[TBAA0]] ; AVX512VL-NEXT: [[T4:%.*]] = add i32 [[T3]], 1 -; AVX512VL-NEXT: [[TMP5:%.*]] = add <4 x i32> [[TMP4]], +; AVX512VL-NEXT: [[TMP4:%.*]] = add <4 x i32> [[TMP3]], ; AVX512VL-NEXT: [[T24:%.*]] = add i32 [[T23]], 2 ; AVX512VL-NEXT: [[T28:%.*]] = add i32 [[T27]], 3 ; AVX512VL-NEXT: [[T32:%.*]] = add i32 [[T31]], 4 ; AVX512VL-NEXT: store i32 [[T4]], i32* [[T0]], align 4, !tbaa [[TBAA0]] -; AVX512VL-NEXT: [[TMP6:%.*]] = bitcast i32* [[T5]] to <4 x i32>* -; AVX512VL-NEXT: store <4 x i32> [[TMP5]], <4 x i32>* [[TMP6]], align 4, !tbaa [[TBAA0]] +; AVX512VL-NEXT: [[TMP5:%.*]] = bitcast i32* [[T5]] to <4 x i32>* +; AVX512VL-NEXT: store <4 x i32> [[TMP4]], <4 x i32>* [[TMP5]], align 4, !tbaa [[TBAA0]] ; AVX512VL-NEXT: store i32 [[T24]], i32* [[T21]], align 4, !tbaa [[TBAA0]] ; AVX512VL-NEXT: store i32 [[T28]], i32* [[T25]], align 4, !tbaa [[TBAA0]] ; AVX512VL-NEXT: store i32 [[T32]], i32* [[T29]], align 4, !tbaa [[TBAA0]] @@ -581,14 +581,14 @@ ; SSE-NEXT: [[TMP15:%.*]] = load float, float* [[TMP14]], align 4, !tbaa [[TBAA0]] ; SSE-NEXT: [[TMP16:%.*]] = getelementptr inbounds float, float* [[TMP1]], i64 44 ; SSE-NEXT: [[TMP17:%.*]] = load float, float* [[TMP16]], align 4, !tbaa [[TBAA0]] -; SSE-NEXT: [[TMP18:%.*]] = insertelement <4 x float> poison, float [[TMP3]], i32 0 -; SSE-NEXT: [[TMP19:%.*]] = insertelement <4 x float> [[TMP18]], float [[TMP7]], i32 1 -; SSE-NEXT: [[TMP20:%.*]] = insertelement <4 x float> [[TMP19]], float [[TMP11]], i32 2 -; SSE-NEXT: [[TMP21:%.*]] = insertelement <4 x float> [[TMP20]], float [[TMP15]], i32 3 -; SSE-NEXT: [[TMP22:%.*]] = insertelement <4 x float> poison, float [[TMP5]], i32 0 -; SSE-NEXT: [[TMP23:%.*]] = insertelement <4 x float> [[TMP22]], float [[TMP9]], i32 1 -; SSE-NEXT: [[TMP24:%.*]] = insertelement <4 x float> [[TMP23]], float [[TMP13]], i32 2 -; SSE-NEXT: [[TMP25:%.*]] = insertelement <4 x float> [[TMP24]], float [[TMP17]], i32 3 +; SSE-NEXT: [[TMP18:%.*]] = insertelement <4 x float> poison, float [[TMP3]], i64 0 +; SSE-NEXT: [[TMP19:%.*]] = insertelement <4 x float> [[TMP18]], float [[TMP7]], i64 1 +; SSE-NEXT: [[TMP20:%.*]] = insertelement <4 x float> [[TMP19]], float [[TMP11]], i64 2 +; SSE-NEXT: [[TMP21:%.*]] = insertelement <4 x float> [[TMP20]], float [[TMP15]], i64 3 +; SSE-NEXT: [[TMP22:%.*]] = insertelement <4 x float> poison, float [[TMP5]], i64 0 +; SSE-NEXT: [[TMP23:%.*]] = insertelement <4 x float> [[TMP22]], float [[TMP9]], i64 1 +; SSE-NEXT: [[TMP24:%.*]] = insertelement <4 x float> [[TMP23]], float [[TMP13]], i64 2 +; SSE-NEXT: [[TMP25:%.*]] = insertelement <4 x float> [[TMP24]], float [[TMP17]], i64 3 ; SSE-NEXT: [[TMP26:%.*]] = fdiv <4 x float> [[TMP21]], [[TMP25]] ; SSE-NEXT: [[TMP27:%.*]] = getelementptr inbounds float, float* [[TMP0:%.*]], i64 4 ; SSE-NEXT: [[TMP28:%.*]] = bitcast float* [[TMP0]] to <4 x float>* @@ -609,14 +609,14 @@ ; SSE-NEXT: [[TMP42:%.*]] = load float, float* [[TMP41]], align 4, !tbaa [[TBAA0]] ; SSE-NEXT: [[TMP43:%.*]] = getelementptr inbounds float, float* [[TMP1]], i64 23 ; SSE-NEXT: [[TMP44:%.*]] = load float, float* [[TMP43]], align 4, !tbaa [[TBAA0]] -; SSE-NEXT: [[TMP45:%.*]] = insertelement <4 x float> poison, float [[TMP30]], i32 0 -; SSE-NEXT: [[TMP46:%.*]] = insertelement <4 x float> [[TMP45]], float [[TMP34]], i32 1 -; SSE-NEXT: [[TMP47:%.*]] = insertelement <4 x float> [[TMP46]], float [[TMP38]], i32 2 -; SSE-NEXT: [[TMP48:%.*]] = insertelement <4 x float> [[TMP47]], float [[TMP42]], i32 3 -; SSE-NEXT: [[TMP49:%.*]] = insertelement <4 x float> poison, float [[TMP32]], i32 0 -; SSE-NEXT: [[TMP50:%.*]] = insertelement <4 x float> [[TMP49]], float [[TMP36]], i32 1 -; SSE-NEXT: [[TMP51:%.*]] = insertelement <4 x float> [[TMP50]], float [[TMP40]], i32 2 -; SSE-NEXT: [[TMP52:%.*]] = insertelement <4 x float> [[TMP51]], float [[TMP44]], i32 3 +; SSE-NEXT: [[TMP45:%.*]] = insertelement <4 x float> poison, float [[TMP30]], i64 0 +; SSE-NEXT: [[TMP46:%.*]] = insertelement <4 x float> [[TMP45]], float [[TMP34]], i64 1 +; SSE-NEXT: [[TMP47:%.*]] = insertelement <4 x float> [[TMP46]], float [[TMP38]], i64 2 +; SSE-NEXT: [[TMP48:%.*]] = insertelement <4 x float> [[TMP47]], float [[TMP42]], i64 3 +; SSE-NEXT: [[TMP49:%.*]] = insertelement <4 x float> poison, float [[TMP32]], i64 0 +; SSE-NEXT: [[TMP50:%.*]] = insertelement <4 x float> [[TMP49]], float [[TMP36]], i64 1 +; SSE-NEXT: [[TMP51:%.*]] = insertelement <4 x float> [[TMP50]], float [[TMP40]], i64 2 +; SSE-NEXT: [[TMP52:%.*]] = insertelement <4 x float> [[TMP51]], float [[TMP44]], i64 3 ; SSE-NEXT: [[TMP53:%.*]] = fdiv <4 x float> [[TMP48]], [[TMP52]] ; SSE-NEXT: [[TMP54:%.*]] = bitcast float* [[TMP27]] to <4 x float>* ; SSE-NEXT: store <4 x float> [[TMP53]], <4 x float>* [[TMP54]], align 4, !tbaa [[TBAA0]] @@ -654,22 +654,22 @@ ; AVX-NEXT: [[TMP31:%.*]] = load float, float* [[TMP30]], align 4, !tbaa [[TBAA0]] ; AVX-NEXT: [[TMP32:%.*]] = getelementptr inbounds float, float* [[TMP1]], i64 23 ; AVX-NEXT: [[TMP33:%.*]] = load float, float* [[TMP32]], align 4, !tbaa [[TBAA0]] -; AVX-NEXT: [[TMP34:%.*]] = insertelement <8 x float> poison, float [[TMP3]], i32 0 -; AVX-NEXT: [[TMP35:%.*]] = insertelement <8 x float> [[TMP34]], float [[TMP7]], i32 1 -; AVX-NEXT: [[TMP36:%.*]] = insertelement <8 x float> [[TMP35]], float [[TMP11]], i32 2 -; AVX-NEXT: [[TMP37:%.*]] = insertelement <8 x float> [[TMP36]], float [[TMP15]], i32 3 -; AVX-NEXT: [[TMP38:%.*]] = insertelement <8 x float> [[TMP37]], float [[TMP19]], i32 4 -; AVX-NEXT: [[TMP39:%.*]] = insertelement <8 x float> [[TMP38]], float [[TMP23]], i32 5 -; AVX-NEXT: [[TMP40:%.*]] = insertelement <8 x float> [[TMP39]], float [[TMP27]], i32 6 -; AVX-NEXT: [[TMP41:%.*]] = insertelement <8 x float> [[TMP40]], float [[TMP31]], i32 7 -; AVX-NEXT: [[TMP42:%.*]] = insertelement <8 x float> poison, float [[TMP5]], i32 0 -; AVX-NEXT: [[TMP43:%.*]] = insertelement <8 x float> [[TMP42]], float [[TMP9]], i32 1 -; AVX-NEXT: [[TMP44:%.*]] = insertelement <8 x float> [[TMP43]], float [[TMP13]], i32 2 -; AVX-NEXT: [[TMP45:%.*]] = insertelement <8 x float> [[TMP44]], float [[TMP17]], i32 3 -; AVX-NEXT: [[TMP46:%.*]] = insertelement <8 x float> [[TMP45]], float [[TMP21]], i32 4 -; AVX-NEXT: [[TMP47:%.*]] = insertelement <8 x float> [[TMP46]], float [[TMP25]], i32 5 -; AVX-NEXT: [[TMP48:%.*]] = insertelement <8 x float> [[TMP47]], float [[TMP29]], i32 6 -; AVX-NEXT: [[TMP49:%.*]] = insertelement <8 x float> [[TMP48]], float [[TMP33]], i32 7 +; AVX-NEXT: [[TMP34:%.*]] = insertelement <8 x float> poison, float [[TMP3]], i64 0 +; AVX-NEXT: [[TMP35:%.*]] = insertelement <8 x float> [[TMP34]], float [[TMP7]], i64 1 +; AVX-NEXT: [[TMP36:%.*]] = insertelement <8 x float> [[TMP35]], float [[TMP11]], i64 2 +; AVX-NEXT: [[TMP37:%.*]] = insertelement <8 x float> [[TMP36]], float [[TMP15]], i64 3 +; AVX-NEXT: [[TMP38:%.*]] = insertelement <8 x float> [[TMP37]], float [[TMP19]], i64 4 +; AVX-NEXT: [[TMP39:%.*]] = insertelement <8 x float> [[TMP38]], float [[TMP23]], i64 5 +; AVX-NEXT: [[TMP40:%.*]] = insertelement <8 x float> [[TMP39]], float [[TMP27]], i64 6 +; AVX-NEXT: [[TMP41:%.*]] = insertelement <8 x float> [[TMP40]], float [[TMP31]], i64 7 +; AVX-NEXT: [[TMP42:%.*]] = insertelement <8 x float> poison, float [[TMP5]], i64 0 +; AVX-NEXT: [[TMP43:%.*]] = insertelement <8 x float> [[TMP42]], float [[TMP9]], i64 1 +; AVX-NEXT: [[TMP44:%.*]] = insertelement <8 x float> [[TMP43]], float [[TMP13]], i64 2 +; AVX-NEXT: [[TMP45:%.*]] = insertelement <8 x float> [[TMP44]], float [[TMP17]], i64 3 +; AVX-NEXT: [[TMP46:%.*]] = insertelement <8 x float> [[TMP45]], float [[TMP21]], i64 4 +; AVX-NEXT: [[TMP47:%.*]] = insertelement <8 x float> [[TMP46]], float [[TMP25]], i64 5 +; AVX-NEXT: [[TMP48:%.*]] = insertelement <8 x float> [[TMP47]], float [[TMP29]], i64 6 +; AVX-NEXT: [[TMP49:%.*]] = insertelement <8 x float> [[TMP48]], float [[TMP33]], i64 7 ; AVX-NEXT: [[TMP50:%.*]] = fdiv <8 x float> [[TMP41]], [[TMP49]] ; AVX-NEXT: [[TMP51:%.*]] = bitcast float* [[TMP0:%.*]] to <8 x float>* ; AVX-NEXT: store <8 x float> [[TMP50]], <8 x float>* [[TMP51]], align 4, !tbaa [[TBAA0]] @@ -707,71 +707,71 @@ ; AVX2-NEXT: [[TMP31:%.*]] = load float, float* [[TMP30]], align 4, !tbaa [[TBAA0]] ; AVX2-NEXT: [[TMP32:%.*]] = getelementptr inbounds float, float* [[TMP1]], i64 23 ; AVX2-NEXT: [[TMP33:%.*]] = load float, float* [[TMP32]], align 4, !tbaa [[TBAA0]] -; AVX2-NEXT: [[TMP34:%.*]] = insertelement <8 x float> poison, float [[TMP3]], i32 0 -; AVX2-NEXT: [[TMP35:%.*]] = insertelement <8 x float> [[TMP34]], float [[TMP7]], i32 1 -; AVX2-NEXT: [[TMP36:%.*]] = insertelement <8 x float> [[TMP35]], float [[TMP11]], i32 2 -; AVX2-NEXT: [[TMP37:%.*]] = insertelement <8 x float> [[TMP36]], float [[TMP15]], i32 3 -; AVX2-NEXT: [[TMP38:%.*]] = insertelement <8 x float> [[TMP37]], float [[TMP19]], i32 4 -; AVX2-NEXT: [[TMP39:%.*]] = insertelement <8 x float> [[TMP38]], float [[TMP23]], i32 5 -; AVX2-NEXT: [[TMP40:%.*]] = insertelement <8 x float> [[TMP39]], float [[TMP27]], i32 6 -; AVX2-NEXT: [[TMP41:%.*]] = insertelement <8 x float> [[TMP40]], float [[TMP31]], i32 7 -; AVX2-NEXT: [[TMP42:%.*]] = insertelement <8 x float> poison, float [[TMP5]], i32 0 -; AVX2-NEXT: [[TMP43:%.*]] = insertelement <8 x float> [[TMP42]], float [[TMP9]], i32 1 -; AVX2-NEXT: [[TMP44:%.*]] = insertelement <8 x float> [[TMP43]], float [[TMP13]], i32 2 -; AVX2-NEXT: [[TMP45:%.*]] = insertelement <8 x float> [[TMP44]], float [[TMP17]], i32 3 -; AVX2-NEXT: [[TMP46:%.*]] = insertelement <8 x float> [[TMP45]], float [[TMP21]], i32 4 -; AVX2-NEXT: [[TMP47:%.*]] = insertelement <8 x float> [[TMP46]], float [[TMP25]], i32 5 -; AVX2-NEXT: [[TMP48:%.*]] = insertelement <8 x float> [[TMP47]], float [[TMP29]], i32 6 -; AVX2-NEXT: [[TMP49:%.*]] = insertelement <8 x float> [[TMP48]], float [[TMP33]], i32 7 +; AVX2-NEXT: [[TMP34:%.*]] = insertelement <8 x float> poison, float [[TMP3]], i64 0 +; AVX2-NEXT: [[TMP35:%.*]] = insertelement <8 x float> [[TMP34]], float [[TMP7]], i64 1 +; AVX2-NEXT: [[TMP36:%.*]] = insertelement <8 x float> [[TMP35]], float [[TMP11]], i64 2 +; AVX2-NEXT: [[TMP37:%.*]] = insertelement <8 x float> [[TMP36]], float [[TMP15]], i64 3 +; AVX2-NEXT: [[TMP38:%.*]] = insertelement <8 x float> [[TMP37]], float [[TMP19]], i64 4 +; AVX2-NEXT: [[TMP39:%.*]] = insertelement <8 x float> [[TMP38]], float [[TMP23]], i64 5 +; AVX2-NEXT: [[TMP40:%.*]] = insertelement <8 x float> [[TMP39]], float [[TMP27]], i64 6 +; AVX2-NEXT: [[TMP41:%.*]] = insertelement <8 x float> [[TMP40]], float [[TMP31]], i64 7 +; AVX2-NEXT: [[TMP42:%.*]] = insertelement <8 x float> poison, float [[TMP5]], i64 0 +; AVX2-NEXT: [[TMP43:%.*]] = insertelement <8 x float> [[TMP42]], float [[TMP9]], i64 1 +; AVX2-NEXT: [[TMP44:%.*]] = insertelement <8 x float> [[TMP43]], float [[TMP13]], i64 2 +; AVX2-NEXT: [[TMP45:%.*]] = insertelement <8 x float> [[TMP44]], float [[TMP17]], i64 3 +; AVX2-NEXT: [[TMP46:%.*]] = insertelement <8 x float> [[TMP45]], float [[TMP21]], i64 4 +; AVX2-NEXT: [[TMP47:%.*]] = insertelement <8 x float> [[TMP46]], float [[TMP25]], i64 5 +; AVX2-NEXT: [[TMP48:%.*]] = insertelement <8 x float> [[TMP47]], float [[TMP29]], i64 6 +; AVX2-NEXT: [[TMP49:%.*]] = insertelement <8 x float> [[TMP48]], float [[TMP33]], i64 7 ; AVX2-NEXT: [[TMP50:%.*]] = fdiv <8 x float> [[TMP41]], [[TMP49]] ; AVX2-NEXT: [[TMP51:%.*]] = bitcast float* [[TMP0:%.*]] to <8 x float>* ; AVX2-NEXT: store <8 x float> [[TMP50]], <8 x float>* [[TMP51]], align 4, !tbaa [[TBAA0]] ; AVX2-NEXT: ret void ; ; AVX512F-LABEL: @gather_load_div( -; AVX512F-NEXT: [[TMP3:%.*]] = insertelement <4 x float*> poison, float* [[TMP1:%.*]], i32 0 -; AVX512F-NEXT: [[TMP4:%.*]] = shufflevector <4 x float*> [[TMP3]], <4 x float*> poison, <4 x i32> zeroinitializer -; AVX512F-NEXT: [[TMP5:%.*]] = getelementptr float, <4 x float*> [[TMP4]], <4 x i64> -; AVX512F-NEXT: [[TMP6:%.*]] = insertelement <2 x float*> poison, float* [[TMP1]], i32 0 -; AVX512F-NEXT: [[TMP7:%.*]] = shufflevector <2 x float*> [[TMP6]], <2 x float*> poison, <2 x i32> zeroinitializer -; AVX512F-NEXT: [[TMP8:%.*]] = getelementptr float, <2 x float*> [[TMP7]], <2 x i64> -; AVX512F-NEXT: [[TMP9:%.*]] = getelementptr inbounds float, float* [[TMP1]], i64 20 -; AVX512F-NEXT: [[TMP10:%.*]] = insertelement <8 x float*> poison, float* [[TMP1]], i32 0 -; AVX512F-NEXT: [[TMP11:%.*]] = shufflevector <4 x float*> [[TMP5]], <4 x float*> poison, <8 x i32> -; AVX512F-NEXT: [[TMP12:%.*]] = shufflevector <8 x float*> [[TMP10]], <8 x float*> [[TMP11]], <8 x i32> -; AVX512F-NEXT: [[TMP13:%.*]] = shufflevector <2 x float*> [[TMP8]], <2 x float*> poison, <8 x i32> -; AVX512F-NEXT: [[TMP14:%.*]] = shufflevector <8 x float*> [[TMP12]], <8 x float*> [[TMP13]], <8 x i32> -; AVX512F-NEXT: [[TMP15:%.*]] = insertelement <8 x float*> [[TMP14]], float* [[TMP9]], i32 7 -; AVX512F-NEXT: [[TMP16:%.*]] = call <8 x float> @llvm.masked.gather.v8f32.v8p0f32(<8 x float*> [[TMP15]], i32 4, <8 x i1> , <8 x float> undef), !tbaa [[TBAA0]] -; AVX512F-NEXT: [[TMP17:%.*]] = shufflevector <8 x float*> [[TMP10]], <8 x float*> poison, <8 x i32> zeroinitializer -; AVX512F-NEXT: [[TMP18:%.*]] = getelementptr float, <8 x float*> [[TMP17]], <8 x i64> -; AVX512F-NEXT: [[TMP19:%.*]] = call <8 x float> @llvm.masked.gather.v8f32.v8p0f32(<8 x float*> [[TMP18]], i32 4, <8 x i1> , <8 x float> undef), !tbaa [[TBAA0]] -; AVX512F-NEXT: [[TMP20:%.*]] = fdiv <8 x float> [[TMP16]], [[TMP19]] -; AVX512F-NEXT: [[TMP21:%.*]] = bitcast float* [[TMP0:%.*]] to <8 x float>* -; AVX512F-NEXT: store <8 x float> [[TMP20]], <8 x float>* [[TMP21]], align 4, !tbaa [[TBAA0]] +; AVX512F-NEXT: [[TMP3:%.*]] = insertelement <4 x float*> poison, float* [[TMP1:%.*]], i64 0 +; AVX512F-NEXT: [[SHUFFLE1:%.*]] = shufflevector <4 x float*> [[TMP3]], <4 x float*> poison, <4 x i32> zeroinitializer +; AVX512F-NEXT: [[TMP4:%.*]] = getelementptr float, <4 x float*> [[SHUFFLE1]], <4 x i64> +; AVX512F-NEXT: [[TMP5:%.*]] = insertelement <2 x float*> poison, float* [[TMP1]], i64 0 +; AVX512F-NEXT: [[TMP6:%.*]] = shufflevector <2 x float*> [[TMP5]], <2 x float*> poison, <2 x i32> zeroinitializer +; AVX512F-NEXT: [[TMP7:%.*]] = getelementptr float, <2 x float*> [[TMP6]], <2 x i64> +; AVX512F-NEXT: [[TMP8:%.*]] = getelementptr inbounds float, float* [[TMP1]], i64 20 +; AVX512F-NEXT: [[TMP9:%.*]] = insertelement <8 x float*> poison, float* [[TMP1]], i64 0 +; AVX512F-NEXT: [[TMP10:%.*]] = shufflevector <4 x float*> [[TMP4]], <4 x float*> poison, <8 x i32> +; AVX512F-NEXT: [[TMP11:%.*]] = shufflevector <8 x float*> [[TMP9]], <8 x float*> [[TMP10]], <8 x i32> +; AVX512F-NEXT: [[TMP12:%.*]] = shufflevector <2 x float*> [[TMP7]], <2 x float*> poison, <8 x i32> +; AVX512F-NEXT: [[TMP13:%.*]] = shufflevector <8 x float*> [[TMP11]], <8 x float*> [[TMP12]], <8 x i32> +; AVX512F-NEXT: [[TMP14:%.*]] = insertelement <8 x float*> [[TMP13]], float* [[TMP8]], i64 7 +; AVX512F-NEXT: [[TMP15:%.*]] = call <8 x float> @llvm.masked.gather.v8f32.v8p0f32(<8 x float*> [[TMP14]], i32 4, <8 x i1> , <8 x float> undef), !tbaa [[TBAA0]] +; AVX512F-NEXT: [[SHUFFLE:%.*]] = shufflevector <8 x float*> [[TMP9]], <8 x float*> poison, <8 x i32> zeroinitializer +; AVX512F-NEXT: [[TMP16:%.*]] = getelementptr float, <8 x float*> [[SHUFFLE]], <8 x i64> +; AVX512F-NEXT: [[TMP17:%.*]] = call <8 x float> @llvm.masked.gather.v8f32.v8p0f32(<8 x float*> [[TMP16]], i32 4, <8 x i1> , <8 x float> undef), !tbaa [[TBAA0]] +; AVX512F-NEXT: [[TMP18:%.*]] = fdiv <8 x float> [[TMP15]], [[TMP17]] +; AVX512F-NEXT: [[TMP19:%.*]] = bitcast float* [[TMP0:%.*]] to <8 x float>* +; AVX512F-NEXT: store <8 x float> [[TMP18]], <8 x float>* [[TMP19]], align 4, !tbaa [[TBAA0]] ; AVX512F-NEXT: ret void ; ; AVX512VL-LABEL: @gather_load_div( -; AVX512VL-NEXT: [[TMP3:%.*]] = insertelement <4 x float*> poison, float* [[TMP1:%.*]], i32 0 -; AVX512VL-NEXT: [[TMP4:%.*]] = shufflevector <4 x float*> [[TMP3]], <4 x float*> poison, <4 x i32> zeroinitializer -; AVX512VL-NEXT: [[TMP5:%.*]] = getelementptr float, <4 x float*> [[TMP4]], <4 x i64> -; AVX512VL-NEXT: [[TMP6:%.*]] = insertelement <2 x float*> poison, float* [[TMP1]], i32 0 -; AVX512VL-NEXT: [[TMP7:%.*]] = shufflevector <2 x float*> [[TMP6]], <2 x float*> poison, <2 x i32> zeroinitializer -; AVX512VL-NEXT: [[TMP8:%.*]] = getelementptr float, <2 x float*> [[TMP7]], <2 x i64> -; AVX512VL-NEXT: [[TMP9:%.*]] = getelementptr inbounds float, float* [[TMP1]], i64 20 -; AVX512VL-NEXT: [[TMP10:%.*]] = insertelement <8 x float*> poison, float* [[TMP1]], i32 0 -; AVX512VL-NEXT: [[TMP11:%.*]] = shufflevector <4 x float*> [[TMP5]], <4 x float*> poison, <8 x i32> -; AVX512VL-NEXT: [[TMP12:%.*]] = shufflevector <8 x float*> [[TMP10]], <8 x float*> [[TMP11]], <8 x i32> -; AVX512VL-NEXT: [[TMP13:%.*]] = shufflevector <2 x float*> [[TMP8]], <2 x float*> poison, <8 x i32> -; AVX512VL-NEXT: [[TMP14:%.*]] = shufflevector <8 x float*> [[TMP12]], <8 x float*> [[TMP13]], <8 x i32> -; AVX512VL-NEXT: [[TMP15:%.*]] = insertelement <8 x float*> [[TMP14]], float* [[TMP9]], i32 7 -; AVX512VL-NEXT: [[TMP16:%.*]] = call <8 x float> @llvm.masked.gather.v8f32.v8p0f32(<8 x float*> [[TMP15]], i32 4, <8 x i1> , <8 x float> undef), !tbaa [[TBAA0]] -; AVX512VL-NEXT: [[TMP17:%.*]] = shufflevector <8 x float*> [[TMP10]], <8 x float*> poison, <8 x i32> zeroinitializer -; AVX512VL-NEXT: [[TMP18:%.*]] = getelementptr float, <8 x float*> [[TMP17]], <8 x i64> -; AVX512VL-NEXT: [[TMP19:%.*]] = call <8 x float> @llvm.masked.gather.v8f32.v8p0f32(<8 x float*> [[TMP18]], i32 4, <8 x i1> , <8 x float> undef), !tbaa [[TBAA0]] -; AVX512VL-NEXT: [[TMP20:%.*]] = fdiv <8 x float> [[TMP16]], [[TMP19]] -; AVX512VL-NEXT: [[TMP21:%.*]] = bitcast float* [[TMP0:%.*]] to <8 x float>* -; AVX512VL-NEXT: store <8 x float> [[TMP20]], <8 x float>* [[TMP21]], align 4, !tbaa [[TBAA0]] +; AVX512VL-NEXT: [[TMP3:%.*]] = insertelement <4 x float*> poison, float* [[TMP1:%.*]], i64 0 +; AVX512VL-NEXT: [[SHUFFLE1:%.*]] = shufflevector <4 x float*> [[TMP3]], <4 x float*> poison, <4 x i32> zeroinitializer +; AVX512VL-NEXT: [[TMP4:%.*]] = getelementptr float, <4 x float*> [[SHUFFLE1]], <4 x i64> +; AVX512VL-NEXT: [[TMP5:%.*]] = insertelement <2 x float*> poison, float* [[TMP1]], i64 0 +; AVX512VL-NEXT: [[TMP6:%.*]] = shufflevector <2 x float*> [[TMP5]], <2 x float*> poison, <2 x i32> zeroinitializer +; AVX512VL-NEXT: [[TMP7:%.*]] = getelementptr float, <2 x float*> [[TMP6]], <2 x i64> +; AVX512VL-NEXT: [[TMP8:%.*]] = getelementptr inbounds float, float* [[TMP1]], i64 20 +; AVX512VL-NEXT: [[TMP9:%.*]] = insertelement <8 x float*> poison, float* [[TMP1]], i64 0 +; AVX512VL-NEXT: [[TMP10:%.*]] = shufflevector <4 x float*> [[TMP4]], <4 x float*> poison, <8 x i32> +; AVX512VL-NEXT: [[TMP11:%.*]] = shufflevector <8 x float*> [[TMP9]], <8 x float*> [[TMP10]], <8 x i32> +; AVX512VL-NEXT: [[TMP12:%.*]] = shufflevector <2 x float*> [[TMP7]], <2 x float*> poison, <8 x i32> +; AVX512VL-NEXT: [[TMP13:%.*]] = shufflevector <8 x float*> [[TMP11]], <8 x float*> [[TMP12]], <8 x i32> +; AVX512VL-NEXT: [[TMP14:%.*]] = insertelement <8 x float*> [[TMP13]], float* [[TMP8]], i64 7 +; AVX512VL-NEXT: [[TMP15:%.*]] = call <8 x float> @llvm.masked.gather.v8f32.v8p0f32(<8 x float*> [[TMP14]], i32 4, <8 x i1> , <8 x float> undef), !tbaa [[TBAA0]] +; AVX512VL-NEXT: [[SHUFFLE:%.*]] = shufflevector <8 x float*> [[TMP9]], <8 x float*> poison, <8 x i32> zeroinitializer +; AVX512VL-NEXT: [[TMP16:%.*]] = getelementptr float, <8 x float*> [[SHUFFLE]], <8 x i64> +; AVX512VL-NEXT: [[TMP17:%.*]] = call <8 x float> @llvm.masked.gather.v8f32.v8p0f32(<8 x float*> [[TMP16]], i32 4, <8 x i1> , <8 x float> undef), !tbaa [[TBAA0]] +; AVX512VL-NEXT: [[TMP18:%.*]] = fdiv <8 x float> [[TMP15]], [[TMP17]] +; AVX512VL-NEXT: [[TMP19:%.*]] = bitcast float* [[TMP0:%.*]] to <8 x float>* +; AVX512VL-NEXT: store <8 x float> [[TMP18]], <8 x float>* [[TMP19]], align 4, !tbaa [[TBAA0]] ; AVX512VL-NEXT: ret void ; ; AVX512-LABEL: @gather_load_div( diff --git a/llvm/test/Transforms/SLPVectorizer/X86/pr47642.ll b/llvm/test/Transforms/SLPVectorizer/X86/pr47642.ll --- a/llvm/test/Transforms/SLPVectorizer/X86/pr47642.ll +++ b/llvm/test/Transforms/SLPVectorizer/X86/pr47642.ll @@ -6,10 +6,10 @@ define <4 x i32> @foo(<4 x i32> %x, i32 %f) { ; CHECK-LABEL: @foo( -; CHECK-NEXT: [[VECINIT:%.*]] = insertelement <4 x i32> undef, i32 [[F:%.*]], i32 0 +; CHECK-NEXT: [[VECINIT:%.*]] = insertelement <4 x i32> undef, i32 [[F:%.*]], i64 0 ; CHECK-NEXT: [[ADD:%.*]] = add nsw i32 [[F]], 1 -; CHECK-NEXT: [[VECINIT1:%.*]] = insertelement <4 x i32> [[VECINIT]], i32 [[ADD]], i32 1 -; CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x i32> poison, i32 [[F]], i32 0 +; CHECK-NEXT: [[VECINIT1:%.*]] = insertelement <4 x i32> [[VECINIT]], i32 [[ADD]], i64 1 +; CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x i32> poison, i32 [[F]], i64 0 ; CHECK-NEXT: [[TMP2:%.*]] = shufflevector <2 x i32> [[TMP1]], <2 x i32> poison, <2 x i32> zeroinitializer ; CHECK-NEXT: [[TMP3:%.*]] = add nsw <2 x i32> [[TMP2]], ; CHECK-NEXT: [[TMP4:%.*]] = shufflevector <2 x i32> [[TMP3]], <2 x i32> poison, <4 x i32> @@ -28,7 +28,7 @@ define <4 x i32> @bar(<4 x i32> %x, i32 %f) { ; CHECK-LABEL: @bar( -; CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x i32> poison, i32 [[F:%.*]], i32 0 +; CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x i32> poison, i32 [[F:%.*]], i64 0 ; CHECK-NEXT: [[TMP2:%.*]] = shufflevector <2 x i32> [[TMP1]], <2 x i32> poison, <2 x i32> zeroinitializer ; CHECK-NEXT: [[TMP3:%.*]] = add nsw <2 x i32> [[TMP2]], ; CHECK-NEXT: [[SHUFFLE:%.*]] = shufflevector <2 x i32> [[TMP3]], <2 x i32> poison, <4 x i32> diff --git a/llvm/test/Transforms/SLPVectorizer/X86/pr49081.ll b/llvm/test/Transforms/SLPVectorizer/X86/pr49081.ll --- a/llvm/test/Transforms/SLPVectorizer/X86/pr49081.ll +++ b/llvm/test/Transforms/SLPVectorizer/X86/pr49081.ll @@ -4,9 +4,9 @@ define dso_local <4 x float> @foo(<4 x i32> %0) { ; CHECK-LABEL: @foo( -; CHECK-NEXT: [[TMP2:%.*]] = extractelement <4 x i32> [[TMP0:%.*]], i32 1 +; CHECK-NEXT: [[TMP2:%.*]] = extractelement <4 x i32> [[TMP0:%.*]], i64 1 ; CHECK-NEXT: [[TMP3:%.*]] = sitofp i32 [[TMP2]] to float -; CHECK-NEXT: [[TMP4:%.*]] = insertelement <4 x float> undef, float [[TMP3]], i32 0 +; CHECK-NEXT: [[TMP4:%.*]] = insertelement <4 x float> undef, float [[TMP3]], i64 0 ; CHECK-NEXT: [[TMP5:%.*]] = shufflevector <4 x float> [[TMP4]], <4 x float> poison, <4 x i32> ; CHECK-NEXT: [[TMP6:%.*]] = shufflevector <4 x i32> [[TMP0]], <4 x i32> undef, <2 x i32> ; CHECK-NEXT: [[TMP7:%.*]] = sitofp <2 x i32> [[TMP6]] to <2 x float>