diff --git a/llvm/lib/Target/AArch64/GISel/AArch64RegisterBankInfo.cpp b/llvm/lib/Target/AArch64/GISel/AArch64RegisterBankInfo.cpp
--- a/llvm/lib/Target/AArch64/GISel/AArch64RegisterBankInfo.cpp
+++ b/llvm/lib/Target/AArch64/GISel/AArch64RegisterBankInfo.cpp
@@ -430,6 +430,8 @@
   case TargetOpcode::G_INTRINSIC_ROUND:
   case TargetOpcode::G_FMAXNUM:
   case TargetOpcode::G_FMINNUM:
+  case TargetOpcode::G_FMAXIMUM:
+  case TargetOpcode::G_FMINIMUM:
     return true;
   }
   return false;
@@ -600,6 +602,8 @@
   case TargetOpcode::G_FSUB:
   case TargetOpcode::G_FMUL:
   case TargetOpcode::G_FDIV:
+  case TargetOpcode::G_FMAXIMUM:
+  case TargetOpcode::G_FMINIMUM:
     return getSameKindOfOperandsMapping(MI);
   case TargetOpcode::G_FPEXT: {
     LLT DstTy = MRI.getType(MI.getOperand(0).getReg());
diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/regbank-fmaximum.mir b/llvm/test/CodeGen/AArch64/GlobalISel/regbank-fmaximum.mir
new file mode 100644
--- /dev/null
+++ b/llvm/test/CodeGen/AArch64/GlobalISel/regbank-fmaximum.mir
@@ -0,0 +1,64 @@
+# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
+# RUN: llc -mtriple=aarch64 -run-pass=regbankselect -verify-machineinstrs %s -o - | FileCheck %s
+...
+---
+name:            direct
+alignment:       4
+legalized:       true
+body:             |
+  bb.0:
+    ; CHECK-LABEL: name: direct
+    ; CHECK: %a:fpr(s32) = COPY $s0
+    ; CHECK-NEXT: %b:fpr(s32) = COPY $s1
+    ; CHECK-NEXT: %needs_fpr:fpr(s32) = G_FMAXIMUM %a, %b
+    ; CHECK-NEXT: $s0 = COPY %needs_fpr(s32)
+    ; CHECK-NEXT: RET_ReallyLR implicit $s0
+    %a:_(s32) = COPY $s0
+    %b:_(s32) = COPY $s1
+    %needs_fpr:_(s32) = G_FMAXIMUM %a, %b
+    $s0 = COPY %needs_fpr(s32)
+    RET_ReallyLR implicit $s0
+
+...
+---
+name:            fed_by_load
+alignment:       4
+legalized:       true
+body:             |
+  bb.0:
+    ; CHECK-LABEL: name: fed_by_load
+    ; CHECK: %ptr_a:gpr(p0) = COPY $x0
+    ; CHECK-NEXT: %ptr_b:gpr(p0) = COPY $x1
+    ; CHECK-NEXT: %a:fpr(s32) = G_LOAD %ptr_a(p0) :: (load (s32))
+    ; CHECK-NEXT: %b:fpr(s32) = G_LOAD %ptr_a(p0) :: (load (s32))
+    ; CHECK-NEXT: %needs_fpr:fpr(s32) = G_FMAXIMUM %a, %b
+    ; CHECK-NEXT: $s0 = COPY %needs_fpr(s32)
+    ; CHECK-NEXT: RET_ReallyLR implicit $s0
+    %ptr_a:_(p0) = COPY $x0
+    %ptr_b:_(p0) = COPY $x1
+    %a:_(s32) = G_LOAD %ptr_a(p0) :: (load (s32))
+    %b:_(s32) = G_LOAD %ptr_a(p0) :: (load (s32))
+    %needs_fpr:_(s32) = G_FMAXIMUM %a, %b
+    $s0 = COPY %needs_fpr(s32)
+    RET_ReallyLR implicit $s0
+
+...
+---
+name:            create_copy
+alignment:       4
+legalized:       true
+body:             |
+  bb.0:
+    ; CHECK-LABEL: name: create_copy
+    ; CHECK: %a:gpr(s32) = COPY $w0
+    ; CHECK-NEXT: %b:gpr(s32) = COPY $w1
+    ; CHECK-NEXT: [[COPY:%[0-9]+]]:fpr(s32) = COPY %a(s32)
+    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:fpr(s32) = COPY %b(s32)
+    ; CHECK-NEXT: %needs_fpr:fpr(s32) = G_FMAXIMUM [[COPY]], [[COPY1]]
+    ; CHECK-NEXT: $s0 = COPY %needs_fpr(s32)
+    ; CHECK-NEXT: RET_ReallyLR implicit $s0
+    %a:_(s32) = COPY $w0
+    %b:_(s32) = COPY $w1
+    %needs_fpr:_(s32) = G_FMAXIMUM %a, %b
+    $s0 = COPY %needs_fpr(s32)
+    RET_ReallyLR implicit $s0
diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/regbank-fminimum.mir b/llvm/test/CodeGen/AArch64/GlobalISel/regbank-fminimum.mir
new file mode 100644
--- /dev/null
+++ b/llvm/test/CodeGen/AArch64/GlobalISel/regbank-fminimum.mir
@@ -0,0 +1,64 @@
+# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
+# RUN: llc -mtriple=aarch64 -run-pass=regbankselect -verify-machineinstrs %s -o - | FileCheck %s
+...
+---
+name:            direct
+alignment:       4
+legalized:       true
+body:             |
+  bb.0:
+    ; CHECK-LABEL: name: direct
+    ; CHECK: %a:fpr(s32) = COPY $s0
+    ; CHECK-NEXT: %b:fpr(s32) = COPY $s1
+    ; CHECK-NEXT: %needs_fpr:fpr(s32) = G_FMINIMUM %a, %b
+    ; CHECK-NEXT: $s0 = COPY %needs_fpr(s32)
+    ; CHECK-NEXT: RET_ReallyLR implicit $s0
+    %a:_(s32) = COPY $s0
+    %b:_(s32) = COPY $s1
+    %needs_fpr:_(s32) = G_FMINIMUM %a, %b
+    $s0 = COPY %needs_fpr(s32)
+    RET_ReallyLR implicit $s0
+
+...
+---
+name:            fed_by_load
+alignment:       4
+legalized:       true
+body:             |
+  bb.0:
+    ; CHECK-LABEL: name: fed_by_load
+    ; CHECK: %ptr_a:gpr(p0) = COPY $x0
+    ; CHECK-NEXT: %ptr_b:gpr(p0) = COPY $x1
+    ; CHECK-NEXT: %a:fpr(s32) = G_LOAD %ptr_a(p0) :: (load (s32))
+    ; CHECK-NEXT: %b:fpr(s32) = G_LOAD %ptr_a(p0) :: (load (s32))
+    ; CHECK-NEXT: %needs_fpr:fpr(s32) = G_FMINIMUM %a, %b
+    ; CHECK-NEXT: $s0 = COPY %needs_fpr(s32)
+    ; CHECK-NEXT: RET_ReallyLR implicit $s0
+    %ptr_a:_(p0) = COPY $x0
+    %ptr_b:_(p0) = COPY $x1
+    %a:_(s32) = G_LOAD %ptr_a(p0) :: (load (s32))
+    %b:_(s32) = G_LOAD %ptr_a(p0) :: (load (s32))
+    %needs_fpr:_(s32) = G_FMINIMUM %a, %b
+    $s0 = COPY %needs_fpr(s32)
+    RET_ReallyLR implicit $s0
+
+...
+---
+name:            create_copy
+alignment:       4
+legalized:       true
+body:             |
+  bb.0:
+    ; CHECK-LABEL: name: create_copy
+    ; CHECK: %a:gpr(s32) = COPY $w0
+    ; CHECK-NEXT: %b:gpr(s32) = COPY $w1
+    ; CHECK-NEXT: [[COPY:%[0-9]+]]:fpr(s32) = COPY %a(s32)
+    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:fpr(s32) = COPY %b(s32)
+    ; CHECK-NEXT: %needs_fpr:fpr(s32) = G_FMINIMUM [[COPY]], [[COPY1]]
+    ; CHECK-NEXT: $s0 = COPY %needs_fpr(s32)
+    ; CHECK-NEXT: RET_ReallyLR implicit $s0
+    %a:_(s32) = COPY $w0
+    %b:_(s32) = COPY $w1
+    %needs_fpr:_(s32) = G_FMINIMUM %a, %b
+    $s0 = COPY %needs_fpr(s32)
+    RET_ReallyLR implicit $s0