diff --git a/llvm/include/llvm/CodeGen/MachineFunction.h b/llvm/include/llvm/CodeGen/MachineFunction.h --- a/llvm/include/llvm/CodeGen/MachineFunction.h +++ b/llvm/include/llvm/CodeGen/MachineFunction.h @@ -767,12 +767,12 @@ /// getNumBlockIDs - Return the number of MBB ID's allocated. unsigned getNumBlockIDs() const { return (unsigned)MBBNumbering.size(); } - /// RenumberBlocks - This discards all of the MachineBasicBlock numbers and + /// renumberBlocks - This discards all of the MachineBasicBlock numbers and /// recomputes them. This guarantees that the MBB numbers are sequential, /// dense, and match the ordering of the blocks within the function. If a /// specific MachineBasicBlock is specified, only that block and those after /// it are renumbered. - void RenumberBlocks(MachineBasicBlock *MBBFrom = nullptr); + void renumberBlocks(MachineBasicBlock *MBBFrom = nullptr); /// print - Print out the MachineFunction in a format suitable for debugging /// to the specified stream. @@ -888,9 +888,9 @@ MBBNumbering[N] = nullptr; } - /// CreateMachineInstr - Allocate a new MachineInstr. Use this instead + /// createMachineInstr - Allocate a new MachineInstr. Use this instead /// of `new MachineInstr'. - MachineInstr *CreateMachineInstr(const MCInstrDesc &MCID, DebugLoc DL, + MachineInstr *createMachineInstr(const MCInstrDesc &MCID, DebugLoc DL, bool NoImplicit = false); /// Create a new MachineInstr which is a copy of \p Orig, identical in all @@ -900,25 +900,27 @@ /// Note: Clones a single instruction, not whole instruction bundles. /// Does not perform target specific adjustments; consider using /// TargetInstrInfo::duplicate() instead. - MachineInstr *CloneMachineInstr(const MachineInstr *Orig); + MachineInstr *cloneMachineInstr(const MachineInstr *Orig); /// Clones instruction or the whole instruction bundle \p Orig and insert /// into \p MBB before \p InsertBefore. /// /// Note: Does not perform target specific adjustments; consider using /// TargetInstrInfo::duplicate() intead. - MachineInstr &CloneMachineInstrBundle(MachineBasicBlock &MBB, - MachineBasicBlock::iterator InsertBefore, const MachineInstr &Orig); + MachineInstr & + cloneMachineInstrBundle(MachineBasicBlock &MBB, + MachineBasicBlock::iterator InsertBefore, + const MachineInstr &Orig); - /// DeleteMachineInstr - Delete the given MachineInstr. - void DeleteMachineInstr(MachineInstr *MI); + /// deleteMachineInstr - Delete the given MachineInstr. + void deleteMachineInstr(MachineInstr *MI); - /// CreateMachineBasicBlock - Allocate a new MachineBasicBlock. Use this + /// createMachineBasicBlock - Allocate a new MachineBasicBlock. Use this /// instead of `new MachineBasicBlock'. - MachineBasicBlock *CreateMachineBasicBlock(const BasicBlock *bb = nullptr); + MachineBasicBlock *createMachineBasicBlock(const BasicBlock *bb = nullptr); - /// DeleteMachineBasicBlock - Delete the given MachineBasicBlock. - void DeleteMachineBasicBlock(MachineBasicBlock *MBB); + /// deleteMachineBasicBlock - Delete the given MachineBasicBlock. + void deleteMachineBasicBlock(MachineBasicBlock *MBB); /// getMachineMemOperand - Allocate a new MachineMemOperand. /// MachineMemOperands are owned by the MachineFunction and need not be diff --git a/llvm/include/llvm/CodeGen/MachineInstr.h b/llvm/include/llvm/CodeGen/MachineInstr.h --- a/llvm/include/llvm/CodeGen/MachineInstr.h +++ b/llvm/include/llvm/CodeGen/MachineInstr.h @@ -280,7 +280,7 @@ public: MachineInstr(const MachineInstr &) = delete; MachineInstr &operator=(const MachineInstr &) = delete; - // Use MachineFunction::DeleteMachineInstr() instead. + // Use MachineFunction::deleteMachineInstr() instead. ~MachineInstr() = delete; const MachineBasicBlock* getParent() const { return Parent; } diff --git a/llvm/include/llvm/CodeGen/MachineInstrBuilder.h b/llvm/include/llvm/CodeGen/MachineInstrBuilder.h --- a/llvm/include/llvm/CodeGen/MachineInstrBuilder.h +++ b/llvm/include/llvm/CodeGen/MachineInstrBuilder.h @@ -327,15 +327,15 @@ /// Builder interface. Specify how to create the initial instruction itself. inline MachineInstrBuilder BuildMI(MachineFunction &MF, const DebugLoc &DL, const MCInstrDesc &MCID) { - return MachineInstrBuilder(MF, MF.CreateMachineInstr(MCID, DL)); + return MachineInstrBuilder(MF, MF.createMachineInstr(MCID, DL)); } /// This version of the builder sets up the first operand as a /// destination virtual register. inline MachineInstrBuilder BuildMI(MachineFunction &MF, const DebugLoc &DL, const MCInstrDesc &MCID, Register DestReg) { - return MachineInstrBuilder(MF, MF.CreateMachineInstr(MCID, DL)) - .addReg(DestReg, RegState::Define); + return MachineInstrBuilder(MF, MF.createMachineInstr(MCID, DL)) + .addReg(DestReg, RegState::Define); } /// This version of the builder inserts the newly-built instruction before @@ -346,7 +346,7 @@ const DebugLoc &DL, const MCInstrDesc &MCID, Register DestReg) { MachineFunction &MF = *BB.getParent(); - MachineInstr *MI = MF.CreateMachineInstr(MCID, DL); + MachineInstr *MI = MF.createMachineInstr(MCID, DL); BB.insert(I, MI); return MachineInstrBuilder(MF, MI).addReg(DestReg, RegState::Define); } @@ -362,7 +362,7 @@ const DebugLoc &DL, const MCInstrDesc &MCID, Register DestReg) { MachineFunction &MF = *BB.getParent(); - MachineInstr *MI = MF.CreateMachineInstr(MCID, DL); + MachineInstr *MI = MF.createMachineInstr(MCID, DL); BB.insert(I, MI); return MachineInstrBuilder(MF, MI).addReg(DestReg, RegState::Define); } @@ -391,7 +391,7 @@ const DebugLoc &DL, const MCInstrDesc &MCID) { MachineFunction &MF = *BB.getParent(); - MachineInstr *MI = MF.CreateMachineInstr(MCID, DL); + MachineInstr *MI = MF.createMachineInstr(MCID, DL); BB.insert(I, MI); return MachineInstrBuilder(MF, MI); } @@ -401,7 +401,7 @@ const DebugLoc &DL, const MCInstrDesc &MCID) { MachineFunction &MF = *BB.getParent(); - MachineInstr *MI = MF.CreateMachineInstr(MCID, DL); + MachineInstr *MI = MF.createMachineInstr(MCID, DL); BB.insert(I, MI); return MachineInstrBuilder(MF, MI); } diff --git a/llvm/lib/CodeGen/BasicBlockSections.cpp b/llvm/lib/CodeGen/BasicBlockSections.cpp --- a/llvm/lib/CodeGen/BasicBlockSections.cpp +++ b/llvm/lib/CodeGen/BasicBlockSections.cpp @@ -370,7 +370,7 @@ // useful during sorting, basic blocks in the same section will retain the // default order. This renumbering should also be done for basic block // labels to match the profiles with the correct blocks. - MF.RenumberBlocks(); + MF.renumberBlocks(); if (BBSectionsType == BasicBlockSection::Labels) { MF.setBBSectionsType(BBSectionsType); diff --git a/llvm/lib/CodeGen/BranchFolding.cpp b/llvm/lib/CodeGen/BranchFolding.cpp --- a/llvm/lib/CodeGen/BranchFolding.cpp +++ b/llvm/lib/CodeGen/BranchFolding.cpp @@ -395,7 +395,7 @@ // Create the fall-through block. MachineFunction::iterator MBBI = CurMBB.getIterator(); - MachineBasicBlock *NewMBB = MF.CreateMachineBasicBlock(BB); + MachineBasicBlock *NewMBB = MF.createMachineBasicBlock(BB); CurMBB.getParent()->insert(++MBBI, NewMBB); // Move all the successors of this block to the specified block. @@ -1194,7 +1194,7 @@ bool MadeChange = false; // Make sure blocks are numbered in order - MF.RenumberBlocks(); + MF.renumberBlocks(); // Renumbering blocks alters EH scope membership, recalculate it. EHScopeMembership = getEHScopeMembership(MF); diff --git a/llvm/lib/CodeGen/BranchRelaxation.cpp b/llvm/lib/CodeGen/BranchRelaxation.cpp --- a/llvm/lib/CodeGen/BranchRelaxation.cpp +++ b/llvm/lib/CodeGen/BranchRelaxation.cpp @@ -205,8 +205,7 @@ /// Insert a new empty basic block and insert it after \BB MachineBasicBlock *BranchRelaxation::createNewBlockAfter(MachineBasicBlock &BB) { // Create a new MBB for the code after the OrigBB. - MachineBasicBlock *NewBB = - MF->CreateMachineBasicBlock(BB.getBasicBlock()); + MachineBasicBlock *NewBB = MF->createMachineBasicBlock(BB.getBasicBlock()); MF->insert(++BB.getIterator(), NewBB); // Insert an entry into BlockInfo to align it properly with the block numbers. @@ -224,7 +223,7 @@ // Create a new MBB for the code after the OrigBB. MachineBasicBlock *NewBB = - MF->CreateMachineBasicBlock(OrigBB->getBasicBlock()); + MF->createMachineBasicBlock(OrigBB->getBasicBlock()); MF->insert(++OrigBB->getIterator(), NewBB); // Splice the instructions starting with MI over to NewBB. @@ -589,7 +588,7 @@ // Renumber all of the machine basic blocks in the function, guaranteeing that // the numbers agree with the position of the block in the function. - MF->RenumberBlocks(); + MF->renumberBlocks(); // Do the initial scan of the function, building up information about the // sizes of each block. diff --git a/llvm/lib/CodeGen/CodeGenCommonISel.cpp b/llvm/lib/CodeGen/CodeGenCommonISel.cpp --- a/llvm/lib/CodeGen/CodeGenCommonISel.cpp +++ b/llvm/lib/CodeGen/CodeGenCommonISel.cpp @@ -30,7 +30,7 @@ if (!SuccMBB) { MachineFunction *MF = ParentMBB->getParent(); MachineFunction::iterator BBI(ParentMBB); - SuccMBB = MF->CreateMachineBasicBlock(BB); + SuccMBB = MF->createMachineBasicBlock(BB); MF->insert(++BBI, SuccMBB); } // Add it as a successor of ParentMBB. diff --git a/llvm/lib/CodeGen/FixupStatepointCallerSaved.cpp b/llvm/lib/CodeGen/FixupStatepointCallerSaved.cpp --- a/llvm/lib/CodeGen/FixupStatepointCallerSaved.cpp +++ b/llvm/lib/CodeGen/FixupStatepointCallerSaved.cpp @@ -471,7 +471,7 @@ // with indirect memory location (frame index). MachineInstr *rewriteStatepoint() { MachineInstr *NewMI = - MF.CreateMachineInstr(TII.get(MI.getOpcode()), MI.getDebugLoc(), true); + MF.createMachineInstr(TII.get(MI.getOpcode()), MI.getDebugLoc(), true); MachineInstrBuilder MIB(MF, NewMI); unsigned NumOps = MI.getNumOperands(); diff --git a/llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp b/llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp --- a/llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp +++ b/llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp @@ -458,7 +458,7 @@ // Create TmpBB after CurBB. MachineFunction::iterator BBI(CurBB); MachineBasicBlock *TmpBB = - MF->CreateMachineBasicBlock(CurBB->getBasicBlock()); + MF->createMachineBasicBlock(CurBB->getBasicBlock()); CurBB->getParent()->insert(++BBI, TmpBB); if (Opc == Instruction::Or) { @@ -1202,7 +1202,7 @@ FallthroughUnreachable = isa( DefaultMBB->getBasicBlock()->getFirstNonPHIOrDbg()); } else { - Fallthrough = CurMF->CreateMachineBasicBlock(CurMBB->getBasicBlock()); + Fallthrough = CurMF->createMachineBasicBlock(CurMBB->getBasicBlock()); CurMF->insert(BBI, Fallthrough); } UnhandledProbs -= I->Prob; @@ -3360,7 +3360,7 @@ auto FinalizeOnReturn = make_scope_exit([this]() { finalizeFunction(); }); // Setup a separate basic-block for the arguments and constants - MachineBasicBlock *EntryBB = MF->CreateMachineBasicBlock(); + MachineBasicBlock *EntryBB = MF->createMachineBasicBlock(); MF->push_back(EntryBB); EntryBuilder->setMBB(*EntryBB); @@ -3375,7 +3375,7 @@ for (const BasicBlock &BB: F) { auto *&MBB = BBToMBB[&BB]; - MBB = MF->CreateMachineBasicBlock(&BB); + MBB = MF->createMachineBasicBlock(&BB); MF->push_back(MBB); if (BB.hasAddressTaken()) @@ -3502,7 +3502,7 @@ // Get rid of the now empty basic block. EntryBB->removeSuccessor(&NewEntryBB); MF->remove(EntryBB); - MF->DeleteMachineBasicBlock(EntryBB); + MF->deleteMachineBasicBlock(EntryBB); assert(&MF->front() == &NewEntryBB && "New entry wasn't next in the list of basic block!"); diff --git a/llvm/lib/CodeGen/GlobalISel/Localizer.cpp b/llvm/lib/CodeGen/GlobalISel/Localizer.cpp --- a/llvm/lib/CodeGen/GlobalISel/Localizer.cpp +++ b/llvm/lib/CodeGen/GlobalISel/Localizer.cpp @@ -120,7 +120,7 @@ auto NewVRegIt = MBBWithLocalDef.find(MBBAndReg); if (NewVRegIt == MBBWithLocalDef.end()) { // Create the localized instruction. - MachineInstr *LocalizedMI = MF.CloneMachineInstr(&MI); + MachineInstr *LocalizedMI = MF.cloneMachineInstr(&MI); LocalizedInstrs.insert(LocalizedMI); MachineInstr &UseMI = *MOUse.getParent(); if (MRI->hasOneUse(Reg) && !UseMI.isPHI()) diff --git a/llvm/lib/CodeGen/GlobalISel/RegBankSelect.cpp b/llvm/lib/CodeGen/GlobalISel/RegBankSelect.cpp --- a/llvm/lib/CodeGen/GlobalISel/RegBankSelect.cpp +++ b/llvm/lib/CodeGen/GlobalISel/RegBankSelect.cpp @@ -224,7 +224,7 @@ if (IsFirst) CurMI = MI; else - CurMI = MIRBuilder.getMF().CloneMachineInstr(MI); + CurMI = MIRBuilder.getMF().cloneMachineInstr(MI); InsertPt->insert(*CurMI); NewInstrs[Idx++] = CurMI; IsFirst = false; diff --git a/llvm/lib/CodeGen/IfConversion.cpp b/llvm/lib/CodeGen/IfConversion.cpp --- a/llvm/lib/CodeGen/IfConversion.cpp +++ b/llvm/lib/CodeGen/IfConversion.cpp @@ -475,7 +475,7 @@ } LLVM_DEBUG(dbgs() << "\n"); - MF.RenumberBlocks(); + MF.renumberBlocks(); BBAnalysis.resize(MF.getNumBlockIDs()); std::vector> Tokens; @@ -2186,7 +2186,7 @@ if (IgnoreBr && I.isBranch()) break; - MachineInstr *MI = MF.CloneMachineInstr(&I); + MachineInstr *MI = MF.cloneMachineInstr(&I); // Make a copy of the call site info. if (I.isCandidateForCallSiteEntry()) MF.copyCallSiteInfo(&I, MI); diff --git a/llvm/lib/CodeGen/MIRParser/MIParser.cpp b/llvm/lib/CodeGen/MIRParser/MIParser.cpp --- a/llvm/lib/CodeGen/MIRParser/MIParser.cpp +++ b/llvm/lib/CodeGen/MIRParser/MIParser.cpp @@ -731,7 +731,7 @@ "' is not defined in the function '" + MF.getName() + "'"); } - auto *MBB = MF.CreateMachineBasicBlock(BB); + auto *MBB = MF.createMachineBasicBlock(BB); MF.insert(MF.end(), MBB); bool WasInserted = MBBSlots.insert(std::make_pair(ID, MBB)).second; if (!WasInserted) @@ -1095,7 +1095,7 @@ } // TODO: Check for extraneous machine operands. - MI = MF.CreateMachineInstr(MCID, DebugLocation, /*NoImplicit=*/true); + MI = MF.createMachineInstr(MCID, DebugLocation, /*NoImplicit=*/true); MI->setFlags(Flags); for (const auto &Operand : Operands) MI->addOperand(MF, Operand.Operand); diff --git a/llvm/lib/CodeGen/MIRSampleProfile.cpp b/llvm/lib/CodeGen/MIRSampleProfile.cpp --- a/llvm/lib/CodeGen/MIRSampleProfile.cpp +++ b/llvm/lib/CodeGen/MIRSampleProfile.cpp @@ -306,7 +306,7 @@ &getAnalysis(), &getAnalysis(), MBFI, &getAnalysis().getORE()); - MF.RenumberBlocks(); + MF.renumberBlocks(); if (ViewBFIBefore && ViewBlockLayoutWithBFI != GVDT_None && (ViewBlockFreqFuncName.empty() || MF.getFunction().getName().equals(ViewBlockFreqFuncName))) { diff --git a/llvm/lib/CodeGen/MachineBasicBlock.cpp b/llvm/lib/CodeGen/MachineBasicBlock.cpp --- a/llvm/lib/CodeGen/MachineBasicBlock.cpp +++ b/llvm/lib/CodeGen/MachineBasicBlock.cpp @@ -193,7 +193,7 @@ void ilist_traits::deleteNode(MachineInstr *MI) { assert(!MI->getParent() && "MI is still in a block!"); - Parent->getParent()->DeleteMachineInstr(MI); + Parent->getParent()->deleteMachineInstr(MI); } MachineBasicBlock::iterator MachineBasicBlock::getFirstNonPHI() { @@ -990,7 +990,7 @@ LiveRegs.stepBackward(*I); } - MachineBasicBlock *SplitBB = MF->CreateMachineBasicBlock(getBasicBlock()); + MachineBasicBlock *SplitBB = MF->createMachineBasicBlock(getBasicBlock()); MF->insert(++MachineFunction::iterator(this), SplitBB); SplitBB->splice(SplitBB->begin(), this, SplitPoint, end()); @@ -1017,7 +1017,7 @@ MachineBasicBlock *PrevFallthrough = getNextNode(); DebugLoc DL; // FIXME: this is nowhere - MachineBasicBlock *NMBB = MF->CreateMachineBasicBlock(); + MachineBasicBlock *NMBB = MF->createMachineBasicBlock(); MF->insert(std::next(MachineFunction::iterator(this)), NMBB); LLVM_DEBUG(dbgs() << "Splitting critical edge: " << printMBBReference(*this) << " -- " << printMBBReference(*NMBB) << " -- " diff --git a/llvm/lib/CodeGen/MachineCombiner.cpp b/llvm/lib/CodeGen/MachineCombiner.cpp --- a/llvm/lib/CodeGen/MachineCombiner.cpp +++ b/llvm/lib/CodeGen/MachineCombiner.cpp @@ -693,7 +693,7 @@ // use for them. MachineFunction *MF = MBB->getParent(); for (auto *InstrPtr : InsInstrs) - MF->DeleteMachineInstr(InstrPtr); + MF->deleteMachineInstr(InstrPtr); } InstrIdxForVirtReg.clear(); } diff --git a/llvm/lib/CodeGen/MachineFunction.cpp b/llvm/lib/CodeGen/MachineFunction.cpp --- a/llvm/lib/CodeGen/MachineFunction.cpp +++ b/llvm/lib/CodeGen/MachineFunction.cpp @@ -128,7 +128,7 @@ MachineFunctionInfo::~MachineFunctionInfo() = default; void ilist_alloc_traits::deleteNode(MachineBasicBlock *MBB) { - MBB->getParent()->DeleteMachineBasicBlock(MBB); + MBB->getParent()->deleteMachineBasicBlock(MBB); } static inline unsigned getFnStackAlignment(const TargetSubtargetInfo *STI, @@ -295,7 +295,7 @@ /// This guarantees that the MBB numbers are sequential, dense, and match the /// ordering of the blocks within the function. If a specific MachineBasicBlock /// is specified, only that block and those after it are renumbered. -void MachineFunction::RenumberBlocks(MachineBasicBlock *MBB) { +void MachineFunction::renumberBlocks(MachineBasicBlock *MBB) { if (empty()) { MBBNumbering.clear(); return; } MachineFunction::iterator MBBI, E = end(); if (MBB == nullptr) @@ -349,7 +349,7 @@ } /// Allocate a new MachineInstr. Use this instead of `new MachineInstr'. -MachineInstr *MachineFunction::CreateMachineInstr(const MCInstrDesc &MCID, +MachineInstr *MachineFunction::createMachineInstr(const MCInstrDesc &MCID, DebugLoc DL, bool NoImplicit) { return new (InstructionRecycler.Allocate(Allocator)) @@ -358,18 +358,18 @@ /// Create a new MachineInstr which is a copy of the 'Orig' instruction, /// identical in all ways except the instruction has no parent, prev, or next. -MachineInstr * -MachineFunction::CloneMachineInstr(const MachineInstr *Orig) { +MachineInstr *MachineFunction::cloneMachineInstr(const MachineInstr *Orig) { return new (InstructionRecycler.Allocate(Allocator)) MachineInstr(*this, *Orig); } -MachineInstr &MachineFunction::CloneMachineInstrBundle(MachineBasicBlock &MBB, - MachineBasicBlock::iterator InsertBefore, const MachineInstr &Orig) { +MachineInstr &MachineFunction::cloneMachineInstrBundle( + MachineBasicBlock &MBB, MachineBasicBlock::iterator InsertBefore, + const MachineInstr &Orig) { MachineInstr *FirstClone = nullptr; MachineBasicBlock::const_instr_iterator I = Orig.getIterator(); while (true) { - MachineInstr *Cloned = CloneMachineInstr(&*I); + MachineInstr *Cloned = cloneMachineInstr(&*I); MBB.insert(InsertBefore, Cloned); if (FirstClone == nullptr) { FirstClone = Cloned; @@ -393,8 +393,7 @@ /// /// This function also serves as the MachineInstr destructor - the real /// ~MachineInstr() destructor must be empty. -void -MachineFunction::DeleteMachineInstr(MachineInstr *MI) { +void MachineFunction::deleteMachineInstr(MachineInstr *MI) { // Verify that a call site info is at valid state. This assertion should // be triggered during the implementation of support for the // call site info of a new architecture. If the assertion is triggered, @@ -415,14 +414,13 @@ /// Allocate a new MachineBasicBlock. Use this instead of /// `new MachineBasicBlock'. MachineBasicBlock * -MachineFunction::CreateMachineBasicBlock(const BasicBlock *bb) { +MachineFunction::createMachineBasicBlock(const BasicBlock *bb) { return new (BasicBlockRecycler.Allocate(Allocator)) MachineBasicBlock(*this, bb); } /// Delete the given MachineBasicBlock. -void -MachineFunction::DeleteMachineBasicBlock(MachineBasicBlock *MBB) { +void MachineFunction::deleteMachineBasicBlock(MachineBasicBlock *MBB) { assert(MBB->getParent() == this && "MBB parent mismatch!"); // Clean up any references to MBB in jump tables before deleting it. if (JumpTableInfo) diff --git a/llvm/lib/CodeGen/MachineFunctionSplitter.cpp b/llvm/lib/CodeGen/MachineFunctionSplitter.cpp --- a/llvm/lib/CodeGen/MachineFunctionSplitter.cpp +++ b/llvm/lib/CodeGen/MachineFunctionSplitter.cpp @@ -118,7 +118,7 @@ // sortBasicBlocksAndUpdateBranches uses the numeric identifier to sort // blocks. Preserving the order of blocks is essential to retaining decisions // made by prior passes such as MachineBlockPlacement. - MF.RenumberBlocks(); + MF.renumberBlocks(); MF.setBBSectionsType(BasicBlockSection::Preset); auto *MBFI = &getAnalysis(); auto *PSI = &getAnalysis().getPSI(); diff --git a/llvm/lib/CodeGen/MachineLoopUtils.cpp b/llvm/lib/CodeGen/MachineLoopUtils.cpp --- a/llvm/lib/CodeGen/MachineLoopUtils.cpp +++ b/llvm/lib/CodeGen/MachineLoopUtils.cpp @@ -36,7 +36,7 @@ if (Exit == Loop) Exit = *std::next(Loop->succ_begin()); - MachineBasicBlock *NewBB = MF.CreateMachineBasicBlock(Loop->getBasicBlock()); + MachineBasicBlock *NewBB = MF.createMachineBasicBlock(Loop->getBasicBlock()); if (Direction == LPD_Front) MF.insert(Loop->getIterator(), NewBB); else @@ -45,7 +45,7 @@ DenseMap Remaps; auto InsertPt = NewBB->end(); for (MachineInstr &MI : *Loop) { - MachineInstr *NewMI = MF.CloneMachineInstr(&MI); + MachineInstr *NewMI = MF.cloneMachineInstr(&MI); NewBB->insert(InsertPt, NewMI); for (MachineOperand &MO : NewMI->defs()) { Register OrigR = MO.getReg(); diff --git a/llvm/lib/CodeGen/MachineOutliner.cpp b/llvm/lib/CodeGen/MachineOutliner.cpp --- a/llvm/lib/CodeGen/MachineOutliner.cpp +++ b/llvm/lib/CodeGen/MachineOutliner.cpp @@ -629,7 +629,7 @@ MachineModuleInfo &MMI = getAnalysis().getMMI(); MachineFunction &MF = MMI.getOrCreateMachineFunction(*F); - MachineBasicBlock &MBB = *MF.CreateMachineBasicBlock(); + MachineBasicBlock &MBB = *MF.createMachineBasicBlock(); // Insert the new function into the module. MF.insert(MF.begin(), &MBB); @@ -641,7 +641,7 @@ ++I) { if (I->isDebugInstr()) continue; - MachineInstr *NewMI = MF.CloneMachineInstr(&*I); + MachineInstr *NewMI = MF.cloneMachineInstr(&*I); if (I->isCFIInstruction()) { unsigned CFIIndex = NewMI->getOperand(0).getCFIIndex(); MCCFIInstruction CFI = Instrs[CFIIndex]; diff --git a/llvm/lib/CodeGen/MachinePipeliner.cpp b/llvm/lib/CodeGen/MachinePipeliner.cpp --- a/llvm/lib/CodeGen/MachinePipeliner.cpp +++ b/llvm/lib/CodeGen/MachinePipeliner.cpp @@ -649,7 +649,7 @@ /// Clean up after the software pipeliner runs. void SwingSchedulerDAG::finishBlock() { for (auto &KV : NewMIs) - MF.DeleteMachineInstr(KV.second); + MF.deleteMachineInstr(KV.second); NewMIs.clear(); // Call the superclass. @@ -2188,10 +2188,10 @@ // the next iteration. int64_t LoadOffset = MI->getOperand(OffsetPosLd).getImm(); int64_t StoreOffset = PrevDef->getOperand(OffsetPos1).getImm(); - MachineInstr *NewMI = MF.CloneMachineInstr(MI); + MachineInstr *NewMI = MF.cloneMachineInstr(MI); NewMI->getOperand(OffsetPosLd).setImm(LoadOffset + StoreOffset); bool Disjoint = TII->areMemAccessesTriviallyDisjoint(*NewMI, *PrevDef); - MF.DeleteMachineInstr(NewMI); + MF.deleteMachineInstr(NewMI); if (!Disjoint) return false; @@ -2222,7 +2222,7 @@ int BaseStageNum = Schedule.stageScheduled(SU); int BaseCycleNum = Schedule.cycleScheduled(SU); if (BaseStageNum < DefStageNum) { - MachineInstr *NewMI = MF.CloneMachineInstr(MI); + MachineInstr *NewMI = MF.cloneMachineInstr(MI); int OffsetDiff = DefStageNum - BaseStageNum; if (DefCycleNum < BaseCycleNum) { NewMI->getOperand(BasePos).setReg(RegAndOffset.first); @@ -2836,7 +2836,7 @@ unsigned BasePos, OffsetPos; // Update the base register and adjust the offset. if (TII->getBaseAndOffsetPosition(*MI, BasePos, OffsetPos)) { - MachineInstr *NewMI = MF.CloneMachineInstr(MI); + MachineInstr *NewMI = MF.cloneMachineInstr(MI); NewMI->getOperand(BasePos).setReg(NewBaseReg); int64_t NewOffset = MI->getOperand(OffsetPos).getImm() - It->second.second; diff --git a/llvm/lib/CodeGen/MachineSink.cpp b/llvm/lib/CodeGen/MachineSink.cpp --- a/llvm/lib/CodeGen/MachineSink.cpp +++ b/llvm/lib/CodeGen/MachineSink.cpp @@ -1098,7 +1098,7 @@ // point. for (auto DbgValueToSink : DbgValuesToSink) { MachineInstr *DbgMI = DbgValueToSink.first; - MachineInstr *NewDbgMI = DbgMI->getMF()->CloneMachineInstr(DbgMI); + MachineInstr *NewDbgMI = DbgMI->getMF()->cloneMachineInstr(DbgMI); SuccToSinkTo.insert(InsertPos, NewDbgMI); bool PropagatedAllSunkOps = true; diff --git a/llvm/lib/CodeGen/ModuloSchedule.cpp b/llvm/lib/CodeGen/ModuloSchedule.cpp --- a/llvm/lib/CodeGen/ModuloSchedule.cpp +++ b/llvm/lib/CodeGen/ModuloSchedule.cpp @@ -106,7 +106,7 @@ assert(LoopInfo && "Must be able to analyze loop!"); // Create a new basic block for the kernel and add it to the CFG. - MachineBasicBlock *KernelBB = MF.CreateMachineBasicBlock(BB->getBasicBlock()); + MachineBasicBlock *KernelBB = MF.createMachineBasicBlock(BB->getBasicBlock()); unsigned MaxStageCount = Schedule.getNumStages() - 1; @@ -138,7 +138,7 @@ // Copy any terminator instructions to the new kernel, and update // names as needed. for (MachineInstr &MI : BB->terminators()) { - MachineInstr *NewMI = MF.CloneMachineInstr(&MI); + MachineInstr *NewMI = MF.cloneMachineInstr(&MI); updateInstruction(NewMI, false, MaxStageCount, 0, VRMap); KernelBB->push_back(NewMI); InstrMap[NewMI] = &MI; @@ -194,7 +194,7 @@ for (unsigned i = 0; i < LastStage; ++i) { // Create and insert the prolog basic block prior to the original loop // basic block. The original loop is removed later. - MachineBasicBlock *NewBB = MF.CreateMachineBasicBlock(BB->getBasicBlock()); + MachineBasicBlock *NewBB = MF.createMachineBasicBlock(BB->getBasicBlock()); PrologBBs.push_back(NewBB); MF.insert(BB->getIterator(), NewBB); NewBB->transferSuccessors(PredBB); @@ -268,7 +268,7 @@ // instructions from multiple stages/iterations. int EpilogStage = LastStage + 1; for (unsigned i = LastStage; i >= 1; --i, ++EpilogStage) { - MachineBasicBlock *NewBB = MF.CreateMachineBasicBlock(); + MachineBasicBlock *NewBB = MF.createMachineBasicBlock(); EpilogBBs.push_back(NewBB); MF.insert(BB->getIterator(), NewBB); @@ -960,7 +960,7 @@ MachineInstr *ModuloScheduleExpander::cloneInstr(MachineInstr *OldMI, unsigned CurStageNum, unsigned InstStageNum) { - MachineInstr *NewMI = MF.CloneMachineInstr(OldMI); + MachineInstr *NewMI = MF.cloneMachineInstr(OldMI); // Check for tied operands in inline asm instructions. This should be handled // elsewhere, but I'm not sure of the best solution. if (OldMI->isInlineAsm()) @@ -981,7 +981,7 @@ /// InstrChanges structure. MachineInstr *ModuloScheduleExpander::cloneAndChangeInstr( MachineInstr *OldMI, unsigned CurStageNum, unsigned InstStageNum) { - MachineInstr *NewMI = MF.CloneMachineInstr(OldMI); + MachineInstr *NewMI = MF.cloneMachineInstr(OldMI); auto It = InstrChanges.find(OldMI); if (It != InstrChanges.end()) { std::pair RegAndOffset = It->second; @@ -1645,7 +1645,7 @@ // Helper to clone Phi instructions into the destination block. We clone Phi // greedily to avoid combinatorial explosion of Phi instructions. auto clonePhi = [&](MachineInstr *Phi) { - MachineInstr *NewMI = MF.CloneMachineInstr(Phi); + MachineInstr *NewMI = MF.cloneMachineInstr(Phi); DestBB->insert(InsertPt, NewMI); Register OrigR = Phi->getOperand(0).getReg(); Register R = MRI.createVirtualRegister(MRI.getRegClass(OrigR)); @@ -1818,7 +1818,7 @@ if (Exit == BB) Exit = *std::next(BB->succ_begin()); - MachineBasicBlock *NewBB = MF.CreateMachineBasicBlock(BB->getBasicBlock()); + MachineBasicBlock *NewBB = MF.createMachineBasicBlock(BB->getBasicBlock()); MF.insert(std::next(BB->getIterator()), NewBB); // Clone all phis in BB into NewBB and rewrite. diff --git a/llvm/lib/CodeGen/PHIElimination.cpp b/llvm/lib/CodeGen/PHIElimination.cpp --- a/llvm/lib/CodeGen/PHIElimination.cpp +++ b/llvm/lib/CodeGen/PHIElimination.cpp @@ -213,7 +213,7 @@ for (auto &I : LoweredPHIs) { if (LIS) LIS->RemoveMachineInstrFromMaps(*I.first); - MF.DeleteMachineInstr(I.first); + MF.deleteMachineInstr(I.first); } // TODO: we should use the incremental DomTree updater here. @@ -626,7 +626,7 @@ if (reusedIncoming || !IncomingReg) { if (LIS) LIS->RemoveMachineInstrFromMaps(*MPhi); - MF.DeleteMachineInstr(MPhi); + MF.deleteMachineInstr(MPhi); } } diff --git a/llvm/lib/CodeGen/RegAllocFast.cpp b/llvm/lib/CodeGen/RegAllocFast.cpp --- a/llvm/lib/CodeGen/RegAllocFast.cpp +++ b/llvm/lib/CodeGen/RegAllocFast.cpp @@ -450,7 +450,7 @@ // is live out, but there is another use of the value after the // spill. This will allow LiveDebugValues to see the correct live out // value to propagate to the successors. - MachineInstr *ClonedDV = MBB->getParent()->CloneMachineInstr(NewDV); + MachineInstr *ClonedDV = MBB->getParent()->cloneMachineInstr(NewDV); MBB->insert(FirstTerm, ClonedDV); LLVM_DEBUG(dbgs() << "Cloning debug info due to live out spill\n"); } diff --git a/llvm/lib/CodeGen/SelectionDAG/FunctionLoweringInfo.cpp b/llvm/lib/CodeGen/SelectionDAG/FunctionLoweringInfo.cpp --- a/llvm/lib/CodeGen/SelectionDAG/FunctionLoweringInfo.cpp +++ b/llvm/lib/CodeGen/SelectionDAG/FunctionLoweringInfo.cpp @@ -265,7 +265,7 @@ assert(&*BB.begin() == PadInst && "WinEHPrepare failed to demote PHIs"); } - MachineBasicBlock *MBB = mf.CreateMachineBasicBlock(&BB); + MachineBasicBlock *MBB = mf.createMachineBasicBlock(&BB); MBBMap[&BB] = MBB; MF->push_back(MBB); diff --git a/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp --- a/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp +++ b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp @@ -2250,7 +2250,7 @@ // Create TmpBB after CurBB. MachineFunction::iterator BBI(CurBB); MachineFunction &MF = DAG.getMachineFunction(); - MachineBasicBlock *TmpBB = MF.CreateMachineBasicBlock(CurBB->getBasicBlock()); + MachineBasicBlock *TmpBB = MF.createMachineBasicBlock(CurBB->getBasicBlock()); CurBB->getParent()->insert(++BBI, TmpBB); if (Opc == Instruction::Or) { @@ -10751,7 +10751,7 @@ FallthroughUnreachable = isa( DefaultMBB->getBasicBlock()->getFirstNonPHIOrDbg()); } else { - Fallthrough = CurMF->CreateMachineBasicBlock(CurMBB->getBasicBlock()); + Fallthrough = CurMF->createMachineBasicBlock(CurMBB->getBasicBlock()); CurMF->insert(BBI, Fallthrough); // Put Cond in a virtual register to make it available from the new blocks. ExportFromCurrentBlock(Cond); @@ -10985,7 +10985,7 @@ (FirstLeft->High->getValue() + 1LL) == Pivot->getValue()) { LeftMBB = FirstLeft->MBB; } else { - LeftMBB = FuncInfo.MF->CreateMachineBasicBlock(W.MBB->getBasicBlock()); + LeftMBB = FuncInfo.MF->createMachineBasicBlock(W.MBB->getBasicBlock()); FuncInfo.MF->insert(BBI, LeftMBB); WorkList.push_back( {LeftMBB, FirstLeft, LastLeft, W.GE, Pivot, W.DefaultProb / 2}); @@ -11001,7 +11001,7 @@ W.LT && (FirstRight->High->getValue() + 1ULL) == W.LT->getValue()) { RightMBB = FirstRight->MBB; } else { - RightMBB = FuncInfo.MF->CreateMachineBasicBlock(W.MBB->getBasicBlock()); + RightMBB = FuncInfo.MF->createMachineBasicBlock(W.MBB->getBasicBlock()); FuncInfo.MF->insert(BBI, RightMBB); WorkList.push_back( {RightMBB, FirstRight, LastRight, Pivot, W.LT, W.DefaultProb / 2}); @@ -11069,7 +11069,7 @@ MachineFunction::iterator BBI(SwitchMBB); ++BBI; MachineBasicBlock *PeeledSwitchMBB = - FuncInfo.MF->CreateMachineBasicBlock(SwitchMBB->getBasicBlock()); + FuncInfo.MF->createMachineBasicBlock(SwitchMBB->getBasicBlock()); FuncInfo.MF->insert(BBI, PeeledSwitchMBB); ExportFromCurrentBlock(SI.getCondition()); diff --git a/llvm/lib/CodeGen/SwitchLoweringUtils.cpp b/llvm/lib/CodeGen/SwitchLoweringUtils.cpp --- a/llvm/lib/CodeGen/SwitchLoweringUtils.cpp +++ b/llvm/lib/CodeGen/SwitchLoweringUtils.cpp @@ -235,7 +235,7 @@ // Note: We create it here, but it's not inserted into the function yet. MachineFunction *CurMF = FuncInfo.MF; MachineBasicBlock *JumpTableMBB = - CurMF->CreateMachineBasicBlock(SI->getParent()); + CurMF->createMachineBasicBlock(SI->getParent()); // Add successors. Note: use table order for determinism. SmallPtrSet Done; @@ -448,7 +448,7 @@ for (auto &CB : CBV) { MachineBasicBlock *BitTestBB = - FuncInfo.MF->CreateMachineBasicBlock(SI->getParent()); + FuncInfo.MF->createMachineBasicBlock(SI->getParent()); BTI.push_back(BitTestCase(CB.Mask, BitTestBB, CB.BB, CB.ExtraProb)); } BitTestCases.emplace_back(std::move(LowBound), std::move(CmpRange), diff --git a/llvm/lib/CodeGen/TargetInstrInfo.cpp b/llvm/lib/CodeGen/TargetInstrInfo.cpp --- a/llvm/lib/CodeGen/TargetInstrInfo.cpp +++ b/llvm/lib/CodeGen/TargetInstrInfo.cpp @@ -219,7 +219,7 @@ if (NewMI) { // Create a new instruction. MachineFunction &MF = *MI.getMF(); - CommutedMI = MF.CloneMachineInstr(&MI); + CommutedMI = MF.cloneMachineInstr(&MI); } else { CommutedMI = &MI; } @@ -421,7 +421,7 @@ Register DestReg, unsigned SubIdx, const MachineInstr &Orig, const TargetRegisterInfo &TRI) const { - MachineInstr *MI = MBB.getParent()->CloneMachineInstr(&Orig); + MachineInstr *MI = MBB.getParent()->cloneMachineInstr(&Orig); MI->substituteRegister(MI->getOperand(0).getReg(), DestReg, SubIdx, TRI); MBB.insert(I, MI); } @@ -436,7 +436,7 @@ MachineBasicBlock::iterator InsertBefore, const MachineInstr &Orig) const { assert(!Orig.isNotDuplicable() && "Instruction cannot be duplicated"); MachineFunction &MF = *MBB.getParent(); - return MF.CloneMachineInstrBundle(MBB, InsertBefore, Orig); + return MF.cloneMachineInstrBundle(MBB, InsertBefore, Orig); } // If the COPY instruction in MI can be folded to a stack operation, return @@ -516,7 +516,7 @@ } MachineInstr *NewMI = - MF.CreateMachineInstr(TII.get(MI.getOpcode()), MI.getDebugLoc(), true); + MF.createMachineInstr(TII.get(MI.getOpcode()), MI.getDebugLoc(), true); MachineInstrBuilder MIB(MF, NewMI); // No need to fold return, the meta data, and function arguments diff --git a/llvm/lib/CodeGen/UnreachableBlockElim.cpp b/llvm/lib/CodeGen/UnreachableBlockElim.cpp --- a/llvm/lib/CodeGen/UnreachableBlockElim.cpp +++ b/llvm/lib/CodeGen/UnreachableBlockElim.cpp @@ -202,7 +202,7 @@ } } - F.RenumberBlocks(); + F.renumberBlocks(); return (!DeadBlocks.empty() || ModifiedPHI); } diff --git a/llvm/lib/Target/AArch64/AArch64ExpandPseudoInsts.cpp b/llvm/lib/Target/AArch64/AArch64ExpandPseudoInsts.cpp --- a/llvm/lib/Target/AArch64/AArch64ExpandPseudoInsts.cpp +++ b/llvm/lib/Target/AArch64/AArch64ExpandPseudoInsts.cpp @@ -197,9 +197,9 @@ Register NewReg = MI.getOperand(4).getReg(); MachineFunction *MF = MBB.getParent(); - auto LoadCmpBB = MF->CreateMachineBasicBlock(MBB.getBasicBlock()); - auto StoreBB = MF->CreateMachineBasicBlock(MBB.getBasicBlock()); - auto DoneBB = MF->CreateMachineBasicBlock(MBB.getBasicBlock()); + auto LoadCmpBB = MF->createMachineBasicBlock(MBB.getBasicBlock()); + auto StoreBB = MF->createMachineBasicBlock(MBB.getBasicBlock()); + auto DoneBB = MF->createMachineBasicBlock(MBB.getBasicBlock()); MF->insert(++MBB.getIterator(), LoadCmpBB); MF->insert(++LoadCmpBB->getIterator(), StoreBB); @@ -302,10 +302,10 @@ } MachineFunction *MF = MBB.getParent(); - auto LoadCmpBB = MF->CreateMachineBasicBlock(MBB.getBasicBlock()); - auto StoreBB = MF->CreateMachineBasicBlock(MBB.getBasicBlock()); - auto FailBB = MF->CreateMachineBasicBlock(MBB.getBasicBlock()); - auto DoneBB = MF->CreateMachineBasicBlock(MBB.getBasicBlock()); + auto LoadCmpBB = MF->createMachineBasicBlock(MBB.getBasicBlock()); + auto StoreBB = MF->createMachineBasicBlock(MBB.getBasicBlock()); + auto FailBB = MF->createMachineBasicBlock(MBB.getBasicBlock()); + auto DoneBB = MF->createMachineBasicBlock(MBB.getBasicBlock()); MF->insert(++MBB.getIterator(), LoadCmpBB); MF->insert(++LoadCmpBB->getIterator(), StoreBB); @@ -641,8 +641,8 @@ .addImm(Size); expandMOVImm(MBB, I, 64); - auto LoopBB = MF->CreateMachineBasicBlock(MBB.getBasicBlock()); - auto DoneBB = MF->CreateMachineBasicBlock(MBB.getBasicBlock()); + auto LoopBB = MF->createMachineBasicBlock(MBB.getBasicBlock()); + auto DoneBB = MF->createMachineBasicBlock(MBB.getBasicBlock()); MF->insert(++MBB.getIterator(), LoopBB); MF->insert(++LoopBB->getIterator(), DoneBB); @@ -939,7 +939,7 @@ } MachineFunction &MF = *MBB.getParent(); // Try to create new inst without implicit operands added. - MachineInstr *NewMI = MF.CreateMachineInstr( + MachineInstr *NewMI = MF.createMachineInstr( TII->get(Opcode), MI.getDebugLoc(), /*NoImplicit=*/true); MBB.insert(MBBI, NewMI); MachineInstrBuilder MIB1(MF, NewMI); diff --git a/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp b/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp --- a/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp +++ b/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp @@ -2266,8 +2266,8 @@ unsigned CondCode = MI.getOperand(3).getImm(); bool NZCVKilled = MI.getOperand(4).isKill(); - MachineBasicBlock *TrueBB = MF->CreateMachineBasicBlock(LLVM_BB); - MachineBasicBlock *EndBB = MF->CreateMachineBasicBlock(LLVM_BB); + MachineBasicBlock *TrueBB = MF->createMachineBasicBlock(LLVM_BB); + MachineBasicBlock *EndBB = MF->createMachineBasicBlock(LLVM_BB); MF->insert(It, TrueBB); MF->insert(It, EndBB); diff --git a/llvm/lib/Target/AArch64/AArch64LowerHomogeneousPrologEpilog.cpp b/llvm/lib/Target/AArch64/AArch64LowerHomogeneousPrologEpilog.cpp --- a/llvm/lib/Target/AArch64/AArch64LowerHomogeneousPrologEpilog.cpp +++ b/llvm/lib/Target/AArch64/AArch64LowerHomogeneousPrologEpilog.cpp @@ -187,7 +187,7 @@ Builder.CreateRetVoid(); // Insert the new block into the function. - MachineBasicBlock *MBB = MF.CreateMachineBasicBlock(); + MachineBasicBlock *MBB = MF.createMachineBasicBlock(); MF.insert(MF.begin(), MBB); return MF; diff --git a/llvm/lib/Target/AMDGPU/AMDGPUMachineCFGStructurizer.cpp b/llvm/lib/Target/AMDGPU/AMDGPUMachineCFGStructurizer.cpp --- a/llvm/lib/Target/AMDGPU/AMDGPUMachineCFGStructurizer.cpp +++ b/llvm/lib/Target/AMDGPU/AMDGPUMachineCFGStructurizer.cpp @@ -1698,7 +1698,7 @@ return &(*(--(Region->getEntry()->getParent()->end()))); } - MachineBasicBlock *LastMerge = MF->CreateMachineBasicBlock(); + MachineBasicBlock *LastMerge = MF->createMachineBasicBlock(); if (Exit == nullptr) { MachineFunction::iterator ExitIter = MF->end(); MF->insert(ExitIter, LastMerge); @@ -1791,7 +1791,7 @@ MachineBasicBlock *CodeBBEnd, MachineBasicBlock *SelectBB, unsigned IfReg, bool InheritPreds) { MachineFunction *MF = MergeBB->getParent(); - MachineBasicBlock *IfBB = MF->CreateMachineBasicBlock(); + MachineBasicBlock *IfBB = MF->createMachineBasicBlock(); if (InheritPreds) { for (MachineBasicBlock *Pred : CodeBBStart->predecessors()) @@ -2436,7 +2436,7 @@ auto MF = Exit->getParent(); auto Succ = MRTRegion->getSucc(); - auto NewExit = MF->CreateMachineBasicBlock(); + auto NewExit = MF->createMachineBasicBlock(); auto AfterExitIter = Exit->getIterator(); AfterExitIter++; MF->insert(AfterExitIter, NewExit); @@ -2474,7 +2474,7 @@ // Create the fall-through block. MachineBasicBlock *MBB = (*I).getParent(); MachineFunction *MF = MBB->getParent(); - MachineBasicBlock *SuccMBB = MF->CreateMachineBasicBlock(); + MachineBasicBlock *SuccMBB = MF->createMachineBasicBlock(); auto MBBIter = ++(MBB->getIterator()); MF->insert(MBBIter, SuccMBB); SuccMBB->transferSuccessorsAndUpdatePHIs(MBB); diff --git a/llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp b/llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp --- a/llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp +++ b/llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp @@ -746,9 +746,9 @@ // To insert the loop we need to split the block. Move everything before this // point to a new block, and insert a new empty block before this instruction. - MachineBasicBlock *LoopBB = MF->CreateMachineBasicBlock(); - MachineBasicBlock *RemainderBB = MF->CreateMachineBasicBlock(); - MachineBasicBlock *RestoreExecBB = MF->CreateMachineBasicBlock(); + MachineBasicBlock *LoopBB = MF->createMachineBasicBlock(); + MachineBasicBlock *RemainderBB = MF->createMachineBasicBlock(); + MachineBasicBlock *RestoreExecBB = MF->createMachineBasicBlock(); MachineFunction::iterator MBBI(MBB); ++MBBI; MF->insert(MBBI, LoopBB); diff --git a/llvm/lib/Target/AMDGPU/AMDILCFGStructurizer.cpp b/llvm/lib/Target/AMDGPU/AMDILCFGStructurizer.cpp --- a/llvm/lib/Target/AMDGPU/AMDILCFGStructurizer.cpp +++ b/llvm/lib/Target/AMDGPU/AMDILCFGStructurizer.cpp @@ -435,7 +435,7 @@ void AMDGPUCFGStructurizer::insertInstrEnd(MachineBasicBlock *MBB, int NewOpcode, const DebugLoc &DL) { MachineInstr *MI = - MBB->getParent()->CreateMachineInstr(TII->get(NewOpcode), DL); + MBB->getParent()->createMachineInstr(TII->get(NewOpcode), DL); MBB->push_back(MI); //assume the instruction doesn't take any reg operand ... SHOWNEWINSTR(MI); @@ -445,7 +445,7 @@ int NewOpcode, const DebugLoc &DL) { MachineInstr *MI = - MBB->getParent()->CreateMachineInstr(TII->get(NewOpcode), DL); + MBB->getParent()->createMachineInstr(TII->get(NewOpcode), DL); if (!MBB->empty()) MBB->insert(MBB->begin(), MI); else @@ -459,7 +459,7 @@ MachineInstr *OldMI = &(*I); MachineBasicBlock *MBB = OldMI->getParent(); MachineInstr *NewMBB = - MBB->getParent()->CreateMachineInstr(TII->get(NewOpcode), DebugLoc()); + MBB->getParent()->createMachineInstr(TII->get(NewOpcode), DebugLoc()); MBB->insert(I, NewMBB); //assume the instruction doesn't take any reg operand ... SHOWNEWINSTR(NewMBB); @@ -471,7 +471,7 @@ MachineInstr *OldMI = &(*I); MachineBasicBlock *MBB = OldMI->getParent(); MachineFunction *MF = MBB->getParent(); - MachineInstr *NewMI = MF->CreateMachineInstr(TII->get(NewOpcode), DL); + MachineInstr *NewMI = MF->createMachineInstr(TII->get(NewOpcode), DL); MBB->insert(I, NewMI); MachineInstrBuilder MIB(*MF, NewMI); MIB.addReg(OldMI->getOperand(1).getReg(), false); @@ -483,7 +483,7 @@ MachineBasicBlock *blk, MachineBasicBlock::iterator I, int NewOpcode, int RegNum, const DebugLoc &DL) { MachineFunction *MF = blk->getParent(); - MachineInstr *NewInstr = MF->CreateMachineInstr(TII->get(NewOpcode), DL); + MachineInstr *NewInstr = MF->createMachineInstr(TII->get(NewOpcode), DL); //insert before blk->insert(I, NewInstr); MachineInstrBuilder(*MF, NewInstr).addReg(RegNum, false); @@ -635,10 +635,10 @@ MachineBasicBlock *AMDGPUCFGStructurizer::clone(MachineBasicBlock *MBB) { MachineFunction *Func = MBB->getParent(); - MachineBasicBlock *NewMBB = Func->CreateMachineBasicBlock(); + MachineBasicBlock *NewMBB = Func->createMachineBasicBlock(); Func->push_back(NewMBB); //insert to function for (const MachineInstr &It : *MBB) - NewMBB->push_back(Func->CloneMachineInstr(&It)); + NewMBB->push_back(Func->cloneMachineInstr(&It)); return NewMBB; } @@ -1551,7 +1551,7 @@ if (!BranchMI || !isUncondBranch(BranchMI)) return nullptr; - MachineBasicBlock *DummyExitBlk = FuncRep->CreateMachineBasicBlock(); + MachineBasicBlock *DummyExitBlk = FuncRep->createMachineBasicBlock(); FuncRep->push_back(DummyExitBlk); //insert to function SHOWNEWBLK(DummyExitBlk, "DummyExitBlock to normalize infiniteLoop: "); LLVM_DEBUG(dbgs() << "Old branch instr: " << *BranchMI << "\n";); @@ -1591,7 +1591,7 @@ void AMDGPUCFGStructurizer::addDummyExitBlock( SmallVectorImpl &RetMBB) { - MachineBasicBlock *DummyExitBlk = FuncRep->CreateMachineBasicBlock(); + MachineBasicBlock *DummyExitBlk = FuncRep->createMachineBasicBlock(); FuncRep->push_back(DummyExitBlk); //insert to function insertInstrEnd(DummyExitBlk, R600::RETURN); diff --git a/llvm/lib/Target/AMDGPU/GCNDPPCombine.cpp b/llvm/lib/Target/AMDGPU/GCNDPPCombine.cpp --- a/llvm/lib/Target/AMDGPU/GCNDPPCombine.cpp +++ b/llvm/lib/Target/AMDGPU/GCNDPPCombine.cpp @@ -564,7 +564,7 @@ } else { assert(Use == Src1 && OrigMI.isCommutable()); // by check [1] auto *BB = OrigMI.getParent(); - auto *NewMI = BB->getParent()->CloneMachineInstr(&OrigMI); + auto *NewMI = BB->getParent()->cloneMachineInstr(&OrigMI); BB->insert(OrigMI, NewMI); if (TII->commuteInstruction(*NewMI)) { LLVM_DEBUG(dbgs() << " commuted: " << *NewMI); diff --git a/llvm/lib/Target/AMDGPU/SIISelLowering.cpp b/llvm/lib/Target/AMDGPU/SIISelLowering.cpp --- a/llvm/lib/Target/AMDGPU/SIISelLowering.cpp +++ b/llvm/lib/Target/AMDGPU/SIISelLowering.cpp @@ -3510,8 +3510,8 @@ // To insert the loop we need to split the block. Move everything after this // point to a new block, and insert a new empty block between the two. - MachineBasicBlock *LoopBB = MF->CreateMachineBasicBlock(); - MachineBasicBlock *RemainderBB = MF->CreateMachineBasicBlock(); + MachineBasicBlock *LoopBB = MF->createMachineBasicBlock(); + MachineBasicBlock *RemainderBB = MF->createMachineBasicBlock(); MachineFunction::iterator MBBI(MBB); ++MBBI; @@ -3731,7 +3731,7 @@ InitResultReg, DstReg, PhiReg, TmpExec, Offset, UseGPRIdxMode, SGPRIdxReg); - MachineBasicBlock* LandingPad = MF->CreateMachineBasicBlock(); + MachineBasicBlock *LandingPad = MF->createMachineBasicBlock(); MachineFunction::iterator MBBI(LoopBB); ++MBBI; MF->insert(MBBI, LandingPad); diff --git a/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp b/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp --- a/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp +++ b/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp @@ -5420,8 +5420,8 @@ // To insert the loop we need to split the block. Move everything after this // point to a new block, and insert a new empty block between the two. - MachineBasicBlock *LoopBB = MF.CreateMachineBasicBlock(); - MachineBasicBlock *RemainderBB = MF.CreateMachineBasicBlock(); + MachineBasicBlock *LoopBB = MF.createMachineBasicBlock(); + MachineBasicBlock *RemainderBB = MF.createMachineBasicBlock(); MachineFunction::iterator MBBI(MBB); ++MBBI; diff --git a/llvm/lib/Target/AMDGPU/SILateBranchLowering.cpp b/llvm/lib/Target/AMDGPU/SILateBranchLowering.cpp --- a/llvm/lib/Target/AMDGPU/SILateBranchLowering.cpp +++ b/llvm/lib/Target/AMDGPU/SILateBranchLowering.cpp @@ -168,7 +168,7 @@ // Lower any early exit branches first if (!EarlyTermInstrs.empty()) { - MachineBasicBlock *EarlyExitBlock = MF.CreateMachineBasicBlock(); + MachineBasicBlock *EarlyExitBlock = MF.createMachineBasicBlock(); DebugLoc DL; MF.insert(MF.end(), EarlyExitBlock); @@ -196,7 +196,7 @@ // If there are multiple returns to epilog then all will // become jumps to new empty end block. if (EpilogInstrs.size() > 1) { - EmptyMBBAtEnd = MF.CreateMachineBasicBlock(); + EmptyMBBAtEnd = MF.createMachineBasicBlock(); MF.insert(MF.end(), EmptyMBBAtEnd); } @@ -208,7 +208,7 @@ // SI_RETURN_TO_EPILOG is not the last instruction. // Jump to empty block at function end. if (!EmptyMBBAtEnd) { - EmptyMBBAtEnd = MF.CreateMachineBasicBlock(); + EmptyMBBAtEnd = MF.createMachineBasicBlock(); MF.insert(MF.end(), EmptyMBBAtEnd); } diff --git a/llvm/lib/Target/AMDGPU/SIPreEmitPeephole.cpp b/llvm/lib/Target/AMDGPU/SIPreEmitPeephole.cpp --- a/llvm/lib/Target/AMDGPU/SIPreEmitPeephole.cpp +++ b/llvm/lib/Target/AMDGPU/SIPreEmitPeephole.cpp @@ -343,7 +343,7 @@ TRI = &TII->getRegisterInfo(); bool Changed = false; - MF.RenumberBlocks(); + MF.renumberBlocks(); for (MachineBasicBlock &MBB : MF) { MachineBasicBlock::iterator TermI = MBB.getFirstTerminator(); diff --git a/llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp b/llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp --- a/llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp +++ b/llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp @@ -1809,7 +1809,7 @@ unsigned Opcode = Orig.getOpcode(); switch (Opcode) { default: { - MachineInstr *MI = MBB.getParent()->CloneMachineInstr(&Orig); + MachineInstr *MI = MBB.getParent()->cloneMachineInstr(&Orig); MI->substituteRegister(Orig.getOperand(0).getReg(), DestReg, SubIdx, TRI); MBB.insert(I, MI); break; diff --git a/llvm/lib/Target/ARM/ARMBlockPlacement.cpp b/llvm/lib/Target/ARM/ARMBlockPlacement.cpp --- a/llvm/lib/Target/ARM/ARMBlockPlacement.cpp +++ b/llvm/lib/Target/ARM/ARMBlockPlacement.cpp @@ -108,7 +108,7 @@ WLS->getOperand(2).setIsKill(false); // Create the new block - MachineBasicBlock *NewBlock = Preheader->getParent()->CreateMachineBasicBlock( + MachineBasicBlock *NewBlock = Preheader->getParent()->createMachineBasicBlock( Preheader->getBasicBlock()); Preheader->getParent()->insert(++Preheader->getIterator(), NewBlock); // Move the Br to it @@ -137,7 +137,7 @@ LivePhysRegs LiveRegs; computeAndAddLiveIns(LiveRegs, *NewBlock); - Preheader->getParent()->RenumberBlocks(); + Preheader->getParent()->renumberBlocks(); BBUtils->computeAllBlockSizes(); BBUtils->adjustBBOffsetsAfter(Preheader); @@ -219,7 +219,7 @@ MLI = &getAnalysis(); TII = static_cast(ST.getInstrInfo()); BBUtils = std::unique_ptr(new ARMBasicBlockUtils(MF)); - MF.RenumberBlocks(); + MF.renumberBlocks(); BBUtils->computeAllBlockSizes(); BBUtils->adjustBBOffsetsAfter(&MF.front()); bool Changed = false; @@ -293,7 +293,7 @@ if (BBNext && BB->isSuccessor(BBNext)) FixFallthrough(BB, BBNext); - F->RenumberBlocks(); + F->renumberBlocks(); BBUtils->computeAllBlockSizes(); BBUtils->adjustBBOffsetsAfter(BB); } diff --git a/llvm/lib/Target/ARM/ARMConstantIslandPass.cpp b/llvm/lib/Target/ARM/ARMConstantIslandPass.cpp --- a/llvm/lib/Target/ARM/ARMConstantIslandPass.cpp +++ b/llvm/lib/Target/ARM/ARMConstantIslandPass.cpp @@ -416,7 +416,7 @@ // Renumber all of the machine basic blocks in the function, guaranteeing that // the numbers agree with the position of the block in the function. - MF->RenumberBlocks(); + MF->renumberBlocks(); // Try to reorder and otherwise adjust the block layout to make good use // of the TB[BH] instructions. @@ -427,7 +427,7 @@ // Data is out of date, so clear it. It'll be re-computed later. T2JumpTables.clear(); // Blocks may have shifted around. Keep the numbering up to date. - MF->RenumberBlocks(); + MF->renumberBlocks(); } // Align any non-fallthrough blocks @@ -537,7 +537,7 @@ void ARMConstantIslands::doInitialConstPlacement(std::vector &CPEMIs) { // Create the basic block to hold the CPE's. - MachineBasicBlock *BB = MF->CreateMachineBasicBlock(); + MachineBasicBlock *BB = MF->createMachineBasicBlock(); MF->push_back(BB); // MachineConstantPool measures alignment in bytes. @@ -649,7 +649,7 @@ MI->getOperand(NumOps - (MI->isPredicable() ? 2 : 1)); unsigned JTI = JTOp.getIndex(); unsigned Size = JT[JTI].MBBs.size() * sizeof(uint32_t); - MachineBasicBlock *JumpTableBB = MF->CreateMachineBasicBlock(); + MachineBasicBlock *JumpTableBB = MF->createMachineBasicBlock(); MF->insert(std::next(MachineFunction::iterator(MBB)), JumpTableBB); MachineInstr *CPEMI = BuildMI(*JumpTableBB, JumpTableBB->begin(), DebugLoc(), TII->get(JTOpcode)) @@ -665,7 +665,7 @@ // If we did anything then we need to renumber the subsequent blocks. if (LastCorrectlyNumberedBB) - MF->RenumberBlocks(LastCorrectlyNumberedBB); + MF->renumberBlocks(LastCorrectlyNumberedBB); } /// BBHasFallthrough - Return true if the specified basic block can fallthrough @@ -959,7 +959,7 @@ /// and update the arrays that parallel this numbering. void ARMConstantIslands::updateForInsertedWaterBlock(MachineBasicBlock *NewBB) { // Renumber the MBB's to keep them consecutive. - NewBB->getParent()->RenumberBlocks(NewBB); + NewBB->getParent()->renumberBlocks(NewBB); // Insert an entry into BBInfo to align it properly with the (newly // renumbered) block numbers. @@ -986,7 +986,7 @@ // Create a new MBB for the code after the OrigBB. MachineBasicBlock *NewBB = - MF->CreateMachineBasicBlock(OrigBB->getBasicBlock()); + MF->createMachineBasicBlock(OrigBB->getBasicBlock()); MachineFunction::iterator MBBI = ++OrigBB->getIterator(); MF->insert(MBBI, NewBB); @@ -1021,7 +1021,7 @@ // Update internal data structures to account for the newly inserted MBB. // This is almost the same as updateForInsertedWaterBlock, except that // the Water goes after OrigBB, not NewBB. - MF->RenumberBlocks(NewBB); + MF->renumberBlocks(NewBB); // Insert an entry into BBInfo to align it properly with the (newly // renumbered) block numbers. @@ -1556,7 +1556,7 @@ unsigned ID = AFI->createPICLabelUId(); // Look for water where we can place this CPE. - MachineBasicBlock *NewIsland = MF->CreateMachineBasicBlock(); + MachineBasicBlock *NewIsland = MF->createMachineBasicBlock(); MachineBasicBlock *NewMBB; water_iterator IP; if (findAvailableWater(U, UserOffset, IP, CloserWater)) { @@ -2508,14 +2508,13 @@ OldPrior->updateTerminator(BB); BB->updateTerminator(OldNext != MF->end() ? &*OldNext : nullptr); // Update numbering to account for the block being moved. - MF->RenumberBlocks(); + MF->renumberBlocks(); ++NumJTMoved; return nullptr; } // Create a new MBB for the code after the jump BB. - MachineBasicBlock *NewBB = - MF->CreateMachineBasicBlock(JTBB->getBasicBlock()); + MachineBasicBlock *NewBB = MF->createMachineBasicBlock(JTBB->getBasicBlock()); MachineFunction::iterator MBBI = ++JTBB->getIterator(); MF->insert(MBBI, NewBB); @@ -2536,7 +2535,7 @@ .add(predOps(ARMCC::AL)); // Update internal data structures to account for the newly inserted MBB. - MF->RenumberBlocks(NewBB); + MF->renumberBlocks(NewBB); // Update the CFG. NewBB->addSuccessor(BB); diff --git a/llvm/lib/Target/ARM/ARMExpandPseudoInsts.cpp b/llvm/lib/Target/ARM/ARMExpandPseudoInsts.cpp --- a/llvm/lib/Target/ARM/ARMExpandPseudoInsts.cpp +++ b/llvm/lib/Target/ARM/ARMExpandPseudoInsts.cpp @@ -1198,8 +1198,8 @@ ClearBB = DoneBB = &MBB; } else { MachineFunction *MF = MBB.getParent(); - ClearBB = MF->CreateMachineBasicBlock(MBB.getBasicBlock()); - DoneBB = MF->CreateMachineBasicBlock(MBB.getBasicBlock()); + ClearBB = MF->createMachineBasicBlock(MBB.getBasicBlock()); + DoneBB = MF->createMachineBasicBlock(MBB.getBasicBlock()); MF->insert(++MBB.getIterator(), ClearBB); MF->insert(++ClearBB->getIterator(), DoneBB); @@ -1740,9 +1740,9 @@ } MachineFunction *MF = MBB.getParent(); - auto LoadCmpBB = MF->CreateMachineBasicBlock(MBB.getBasicBlock()); - auto StoreBB = MF->CreateMachineBasicBlock(MBB.getBasicBlock()); - auto DoneBB = MF->CreateMachineBasicBlock(MBB.getBasicBlock()); + auto LoadCmpBB = MF->createMachineBasicBlock(MBB.getBasicBlock()); + auto StoreBB = MF->createMachineBasicBlock(MBB.getBasicBlock()); + auto DoneBB = MF->createMachineBasicBlock(MBB.getBasicBlock()); MF->insert(++MBB.getIterator(), LoadCmpBB); MF->insert(++LoadCmpBB->getIterator(), StoreBB); @@ -1865,9 +1865,9 @@ Register DesiredHi = TRI->getSubReg(DesiredReg, ARM::gsub_1); MachineFunction *MF = MBB.getParent(); - auto LoadCmpBB = MF->CreateMachineBasicBlock(MBB.getBasicBlock()); - auto StoreBB = MF->CreateMachineBasicBlock(MBB.getBasicBlock()); - auto DoneBB = MF->CreateMachineBasicBlock(MBB.getBasicBlock()); + auto LoadCmpBB = MF->createMachineBasicBlock(MBB.getBasicBlock()); + auto StoreBB = MF->createMachineBasicBlock(MBB.getBasicBlock()); + auto DoneBB = MF->createMachineBasicBlock(MBB.getBasicBlock()); MF->insert(++MBB.getIterator(), LoadCmpBB); MF->insert(++LoadCmpBB->getIterator(), StoreBB); diff --git a/llvm/lib/Target/ARM/ARMFrameLowering.cpp b/llvm/lib/Target/ARM/ARMFrameLowering.cpp --- a/llvm/lib/Target/ARM/ARMFrameLowering.cpp +++ b/llvm/lib/Target/ARM/ARMFrameLowering.cpp @@ -2479,11 +2479,11 @@ unsigned ScratchReg1 = ARM::R5; uint64_t AlignedStackSize; - MachineBasicBlock *PrevStackMBB = MF.CreateMachineBasicBlock(); - MachineBasicBlock *PostStackMBB = MF.CreateMachineBasicBlock(); - MachineBasicBlock *AllocMBB = MF.CreateMachineBasicBlock(); - MachineBasicBlock *GetMBB = MF.CreateMachineBasicBlock(); - MachineBasicBlock *McrMBB = MF.CreateMachineBasicBlock(); + MachineBasicBlock *PrevStackMBB = MF.createMachineBasicBlock(); + MachineBasicBlock *PostStackMBB = MF.createMachineBasicBlock(); + MachineBasicBlock *AllocMBB = MF.createMachineBasicBlock(); + MachineBasicBlock *GetMBB = MF.createMachineBasicBlock(); + MachineBasicBlock *McrMBB = MF.createMachineBasicBlock(); // Grab everything that reaches PrologueMBB to update there liveness as well. SmallPtrSet BeforePrologueRegion; diff --git a/llvm/lib/Target/ARM/ARMISelLowering.cpp b/llvm/lib/Target/ARM/ARMISelLowering.cpp --- a/llvm/lib/Target/ARM/ARMISelLowering.cpp +++ b/llvm/lib/Target/ARM/ARMISelLowering.cpp @@ -10667,10 +10667,10 @@ // Create the MBBs for the dispatch code. // Shove the dispatch's address into the return slot in the function context. - MachineBasicBlock *DispatchBB = MF->CreateMachineBasicBlock(); + MachineBasicBlock *DispatchBB = MF->createMachineBasicBlock(); DispatchBB->setIsEHPad(); - MachineBasicBlock *TrapBB = MF->CreateMachineBasicBlock(); + MachineBasicBlock *TrapBB = MF->createMachineBasicBlock(); unsigned trap_opcode; if (Subtarget->isThumb()) trap_opcode = ARM::tTRAP; @@ -10680,7 +10680,7 @@ BuildMI(TrapBB, dl, TII->get(trap_opcode)); DispatchBB->addSuccessor(TrapBB); - MachineBasicBlock *DispContBB = MF->CreateMachineBasicBlock(); + MachineBasicBlock *DispContBB = MF->createMachineBasicBlock(); DispatchBB->addSuccessor(DispContBB); // Insert and MBBs. @@ -11250,8 +11250,8 @@ // epilogue to handle left-over bytes // [scratch, srcOut] = LDRB_POST(srcLoop, 1) // [destOut] = STRB_POST(scratch, destLoop, 1) - MachineBasicBlock *loopMBB = MF->CreateMachineBasicBlock(LLVM_BB); - MachineBasicBlock *exitMBB = MF->CreateMachineBasicBlock(LLVM_BB); + MachineBasicBlock *loopMBB = MF->createMachineBasicBlock(LLVM_BB); + MachineBasicBlock *exitMBB = MF->createMachineBasicBlock(LLVM_BB); MF->insert(It, loopMBB); MF->insert(It, exitMBB); @@ -11466,14 +11466,14 @@ MachineFunction *MF = MBB->getParent(); const TargetInstrInfo *TII = Subtarget->getInstrInfo(); - MachineBasicBlock *ContBB = MF->CreateMachineBasicBlock(); + MachineBasicBlock *ContBB = MF->createMachineBasicBlock(); MF->insert(++MBB->getIterator(), ContBB); ContBB->splice(ContBB->begin(), MBB, std::next(MachineBasicBlock::iterator(MI)), MBB->end()); ContBB->transferSuccessorsAndUpdatePHIs(MBB); MBB->addSuccessor(ContBB); - MachineBasicBlock *TrapBB = MF->CreateMachineBasicBlock(); + MachineBasicBlock *TrapBB = MF->createMachineBasicBlock(); BuildMI(TrapBB, DL, TII->get(ARM::t__brkdiv0)); MF->push_back(TrapBB); MBB->addSuccessor(TrapBB); @@ -11728,7 +11728,7 @@ // Allocate the required MBBs and add to parent function. MachineBasicBlock *TpEntry = BB; - MachineBasicBlock *TpLoopBody = MF->CreateMachineBasicBlock(); + MachineBasicBlock *TpLoopBody = MF->createMachineBasicBlock(); MachineBasicBlock *TpExit; MF->push_back(TpLoopBody); @@ -11852,8 +11852,8 @@ // fallthrough --> copy0MBB MachineBasicBlock *thisMBB = BB; MachineFunction *F = BB->getParent(); - MachineBasicBlock *copy0MBB = F->CreateMachineBasicBlock(LLVM_BB); - MachineBasicBlock *sinkMBB = F->CreateMachineBasicBlock(LLVM_BB); + MachineBasicBlock *copy0MBB = F->createMachineBasicBlock(LLVM_BB); + MachineBasicBlock *sinkMBB = F->createMachineBasicBlock(LLVM_BB); F->insert(It, copy0MBB); F->insert(It, sinkMBB); @@ -11977,8 +11977,8 @@ const BasicBlock *LLVM_BB = BB->getBasicBlock(); MachineFunction::iterator BBI = ++BB->getIterator(); MachineFunction *Fn = BB->getParent(); - MachineBasicBlock *RSBBB = Fn->CreateMachineBasicBlock(LLVM_BB); - MachineBasicBlock *SinkBB = Fn->CreateMachineBasicBlock(LLVM_BB); + MachineBasicBlock *RSBBB = Fn->createMachineBasicBlock(LLVM_BB); + MachineBasicBlock *SinkBB = Fn->createMachineBasicBlock(LLVM_BB); Fn->insert(BBI, RSBBB); Fn->insert(BBI, SinkBB); diff --git a/llvm/lib/Target/ARM/Thumb1FrameLowering.cpp b/llvm/lib/Target/ARM/Thumb1FrameLowering.cpp --- a/llvm/lib/Target/ARM/Thumb1FrameLowering.cpp +++ b/llvm/lib/Target/ARM/Thumb1FrameLowering.cpp @@ -1067,7 +1067,7 @@ if (NeedsPop) MBB.insert(MI, &*MIB); else - MF.DeleteMachineInstr(MIB); + MF.deleteMachineInstr(MIB); return true; } diff --git a/llvm/lib/Target/AVR/AVRISelLowering.cpp b/llvm/lib/Target/AVR/AVRISelLowering.cpp --- a/llvm/lib/Target/AVR/AVRISelLowering.cpp +++ b/llvm/lib/Target/AVR/AVRISelLowering.cpp @@ -1578,9 +1578,9 @@ ++I; // Create loop block. - MachineBasicBlock *LoopBB = F->CreateMachineBasicBlock(LLVM_BB); - MachineBasicBlock *CheckBB = F->CreateMachineBasicBlock(LLVM_BB); - MachineBasicBlock *RemBB = F->CreateMachineBasicBlock(LLVM_BB); + MachineBasicBlock *LoopBB = F->createMachineBasicBlock(LLVM_BB); + MachineBasicBlock *CheckBB = F->createMachineBasicBlock(LLVM_BB); + MachineBasicBlock *RemBB = F->createMachineBasicBlock(LLVM_BB); F->insert(I, LoopBB); F->insert(I, CheckBB); @@ -1722,8 +1722,8 @@ BuildMI(MBB, dl, TII.get(AVR::RJMPk)).addMBB(FallThrough); } - MachineBasicBlock *trueMBB = MF->CreateMachineBasicBlock(LLVM_BB); - MachineBasicBlock *falseMBB = MF->CreateMachineBasicBlock(LLVM_BB); + MachineBasicBlock *trueMBB = MF->createMachineBasicBlock(LLVM_BB); + MachineBasicBlock *falseMBB = MF->createMachineBasicBlock(LLVM_BB); MachineFunction::iterator I; for (I = MF->begin(); I != MF->end() && &(*I) != MBB; ++I) diff --git a/llvm/lib/Target/BPF/BPFISelLowering.cpp b/llvm/lib/Target/BPF/BPFISelLowering.cpp --- a/llvm/lib/Target/BPF/BPFISelLowering.cpp +++ b/llvm/lib/Target/BPF/BPFISelLowering.cpp @@ -758,8 +758,8 @@ // fallthrough --> Copy0MBB MachineBasicBlock *ThisMBB = BB; MachineFunction *F = BB->getParent(); - MachineBasicBlock *Copy0MBB = F->CreateMachineBasicBlock(LLVM_BB); - MachineBasicBlock *Copy1MBB = F->CreateMachineBasicBlock(LLVM_BB); + MachineBasicBlock *Copy0MBB = F->createMachineBasicBlock(LLVM_BB); + MachineBasicBlock *Copy1MBB = F->createMachineBasicBlock(LLVM_BB); F->insert(I, Copy0MBB); F->insert(I, Copy1MBB); diff --git a/llvm/lib/Target/Hexagon/HexagonHardwareLoops.cpp b/llvm/lib/Target/Hexagon/HexagonHardwareLoops.cpp --- a/llvm/lib/Target/Hexagon/HexagonHardwareLoops.cpp +++ b/llvm/lib/Target/Hexagon/HexagonHardwareLoops.cpp @@ -1879,7 +1879,7 @@ return nullptr; } - MachineBasicBlock *NewPH = MF->CreateMachineBasicBlock(); + MachineBasicBlock *NewPH = MF->createMachineBasicBlock(); MF->insert(Header->getIterator(), NewPH); if (Header->pred_size() > 2) { @@ -1893,7 +1893,7 @@ MachineInstr *PN = &*I; const MCInstrDesc &PD = TII->get(TargetOpcode::PHI); - MachineInstr *NewPN = MF->CreateMachineInstr(PD, DL); + MachineInstr *NewPN = MF->createMachineInstr(PD, DL); NewPH->insert(NewPH->end(), NewPN); Register PR = PN->getOperand(0).getReg(); diff --git a/llvm/lib/Target/Hexagon/HexagonHazardRecognizer.cpp b/llvm/lib/Target/Hexagon/HexagonHazardRecognizer.cpp --- a/llvm/lib/Target/Hexagon/HexagonHazardRecognizer.cpp +++ b/llvm/lib/Target/Hexagon/HexagonHazardRecognizer.cpp @@ -53,14 +53,13 @@ // The .new store version uses different resources so check if it // causes a hazard. MachineFunction *MF = MI->getParent()->getParent(); - MachineInstr *NewMI = - MF->CreateMachineInstr(TII->get(TII->getDotNewOp(*MI)), - MI->getDebugLoc()); + MachineInstr *NewMI = MF->createMachineInstr( + TII->get(TII->getDotNewOp(*MI)), MI->getDebugLoc()); if (Resources->canReserveResources(*NewMI)) RetVal = NoHazard; LLVM_DEBUG(dbgs() << "*** Try .new version? " << (RetVal == NoHazard) << "\n"); - MF->DeleteMachineInstr(NewMI); + MF->deleteMachineInstr(NewMI); } return RetVal; } @@ -124,12 +123,11 @@ // reserved at this point. assert(TII->mayBeNewStore(*MI) && "Expecting .new store"); MachineFunction *MF = MI->getParent()->getParent(); - MachineInstr *NewMI = - MF->CreateMachineInstr(TII->get(TII->getDotNewOp(*MI)), - MI->getDebugLoc()); + MachineInstr *NewMI = MF->createMachineInstr( + TII->get(TII->getDotNewOp(*MI)), MI->getDebugLoc()); assert(Resources->canReserveResources(*NewMI)); Resources->reserveResources(*NewMI); - MF->DeleteMachineInstr(NewMI); + MF->deleteMachineInstr(NewMI); } else Resources->reserveResources(*MI); diff --git a/llvm/lib/Target/Hexagon/HexagonVLIWPacketizer.cpp b/llvm/lib/Target/Hexagon/HexagonVLIWPacketizer.cpp --- a/llvm/lib/Target/Hexagon/HexagonVLIWPacketizer.cpp +++ b/llvm/lib/Target/Hexagon/HexagonVLIWPacketizer.cpp @@ -290,11 +290,11 @@ // Allocate resources (i.e. 4 bytes) for constant extender. If succeeded, // return true, otherwise, return false. bool HexagonPacketizerList::tryAllocateResourcesForConstExt(bool Reserve) { - auto *ExtMI = MF.CreateMachineInstr(HII->get(Hexagon::A4_ext), DebugLoc()); + auto *ExtMI = MF.createMachineInstr(HII->get(Hexagon::A4_ext), DebugLoc()); bool Avail = ResourceTracker->canReserveResources(*ExtMI); if (Reserve && Avail) ResourceTracker->reserveResources(*ExtMI); - MF.DeleteMachineInstr(ExtMI); + MF.deleteMachineInstr(ExtMI); return Avail; } @@ -888,9 +888,9 @@ // allocated. If not, bail out now. int NewOpcode = HII->getDotNewOp(MI); const MCInstrDesc &D = HII->get(NewOpcode); - MachineInstr *NewMI = MF.CreateMachineInstr(D, DebugLoc()); + MachineInstr *NewMI = MF.createMachineInstr(D, DebugLoc()); bool ResourcesAvailable = ResourceTracker->canReserveResources(*NewMI); - MF.DeleteMachineInstr(NewMI); + MF.deleteMachineInstr(NewMI); if (!ResourcesAvailable) return false; diff --git a/llvm/lib/Target/MSP430/MSP430BranchSelector.cpp b/llvm/lib/Target/MSP430/MSP430BranchSelector.cpp --- a/llvm/lib/Target/MSP430/MSP430BranchSelector.cpp +++ b/llvm/lib/Target/MSP430/MSP430BranchSelector.cpp @@ -81,7 +81,7 @@ unsigned MSP430BSel::measureFunction(OffsetVector &BlockOffsets, MachineBasicBlock *FromBB) { // Give the blocks of the function a dense, in-order, numbering. - MF->RenumberBlocks(FromBB); + MF->renumberBlocks(FromBB); MachineFunction::iterator Begin; if (FromBB == nullptr) { @@ -150,7 +150,7 @@ // Create a new basic block. MachineBasicBlock *NewBB = - MF->CreateMachineBasicBlock(MBB->getBasicBlock()); + MF->createMachineBasicBlock(MBB->getBasicBlock()); MF->insert(std::next(MBB), NewBB); // Splice the instructions following MI over to the NewBB. diff --git a/llvm/lib/Target/MSP430/MSP430ISelLowering.cpp b/llvm/lib/Target/MSP430/MSP430ISelLowering.cpp --- a/llvm/lib/Target/MSP430/MSP430ISelLowering.cpp +++ b/llvm/lib/Target/MSP430/MSP430ISelLowering.cpp @@ -1476,8 +1476,8 @@ MachineFunction::iterator I = ++BB->getIterator(); // Create loop block - MachineBasicBlock *LoopBB = F->CreateMachineBasicBlock(LLVM_BB); - MachineBasicBlock *RemBB = F->CreateMachineBasicBlock(LLVM_BB); + MachineBasicBlock *LoopBB = F->createMachineBasicBlock(LLVM_BB); + MachineBasicBlock *RemBB = F->createMachineBasicBlock(LLVM_BB); F->insert(I, LoopBB); F->insert(I, RemBB); @@ -1580,8 +1580,8 @@ // fallthrough --> copy0MBB MachineBasicBlock *thisMBB = BB; MachineFunction *F = BB->getParent(); - MachineBasicBlock *copy0MBB = F->CreateMachineBasicBlock(LLVM_BB); - MachineBasicBlock *copy1MBB = F->CreateMachineBasicBlock(LLVM_BB); + MachineBasicBlock *copy0MBB = F->createMachineBasicBlock(LLVM_BB); + MachineBasicBlock *copy1MBB = F->createMachineBasicBlock(LLVM_BB); F->insert(I, copy0MBB); F->insert(I, copy1MBB); // Update machine-CFG edges by transferring all successors of the current diff --git a/llvm/lib/Target/Mips/Mips16ISelLowering.cpp b/llvm/lib/Target/Mips/Mips16ISelLowering.cpp --- a/llvm/lib/Target/Mips/Mips16ISelLowering.cpp +++ b/llvm/lib/Target/Mips/Mips16ISelLowering.cpp @@ -526,8 +526,8 @@ // fallthrough --> copy0MBB MachineBasicBlock *thisMBB = BB; MachineFunction *F = BB->getParent(); - MachineBasicBlock *copy0MBB = F->CreateMachineBasicBlock(LLVM_BB); - MachineBasicBlock *sinkMBB = F->CreateMachineBasicBlock(LLVM_BB); + MachineBasicBlock *copy0MBB = F->createMachineBasicBlock(LLVM_BB); + MachineBasicBlock *sinkMBB = F->createMachineBasicBlock(LLVM_BB); F->insert(It, copy0MBB); F->insert(It, sinkMBB); @@ -589,8 +589,8 @@ // fallthrough --> copy0MBB MachineBasicBlock *thisMBB = BB; MachineFunction *F = BB->getParent(); - MachineBasicBlock *copy0MBB = F->CreateMachineBasicBlock(LLVM_BB); - MachineBasicBlock *sinkMBB = F->CreateMachineBasicBlock(LLVM_BB); + MachineBasicBlock *copy0MBB = F->createMachineBasicBlock(LLVM_BB); + MachineBasicBlock *sinkMBB = F->createMachineBasicBlock(LLVM_BB); F->insert(It, copy0MBB); F->insert(It, sinkMBB); @@ -655,8 +655,8 @@ // fallthrough --> copy0MBB MachineBasicBlock *thisMBB = BB; MachineFunction *F = BB->getParent(); - MachineBasicBlock *copy0MBB = F->CreateMachineBasicBlock(LLVM_BB); - MachineBasicBlock *sinkMBB = F->CreateMachineBasicBlock(LLVM_BB); + MachineBasicBlock *copy0MBB = F->createMachineBasicBlock(LLVM_BB); + MachineBasicBlock *sinkMBB = F->createMachineBasicBlock(LLVM_BB); F->insert(It, copy0MBB); F->insert(It, sinkMBB); diff --git a/llvm/lib/Target/Mips/MipsBranchExpansion.cpp b/llvm/lib/Target/Mips/MipsBranchExpansion.cpp --- a/llvm/lib/Target/Mips/MipsBranchExpansion.cpp +++ b/llvm/lib/Target/Mips/MipsBranchExpansion.cpp @@ -265,7 +265,7 @@ // Create a new MBB. Move instructions in MBB to the newly created MBB. MachineBasicBlock *NewMBB = - MFp->CreateMachineBasicBlock(MBB->getBasicBlock()); + MFp->createMachineBasicBlock(MBB->getBasicBlock()); // Insert NewMBB and fix control flow. MachineBasicBlock *Tgt = getTargetMBB(*FirstBr); @@ -286,7 +286,7 @@ for (auto &MBB : *MFp) splitMBB(&MBB); - MFp->RenumberBlocks(); + MFp->renumberBlocks(); MBBInfos.clear(); MBBInfos.resize(MFp->size()); @@ -411,13 +411,13 @@ DebugLoc DL = I.Br->getDebugLoc(); const BasicBlock *BB = MBB->getBasicBlock(); MachineFunction::iterator FallThroughMBB = ++MachineFunction::iterator(MBB); - MachineBasicBlock *LongBrMBB = MFp->CreateMachineBasicBlock(BB); + MachineBasicBlock *LongBrMBB = MFp->createMachineBasicBlock(BB); MFp->insert(FallThroughMBB, LongBrMBB); MBB->replaceSuccessor(TgtMBB, LongBrMBB); if (IsPIC) { - MachineBasicBlock *BalTgtMBB = MFp->CreateMachineBasicBlock(BB); + MachineBasicBlock *BalTgtMBB = MFp->createMachineBasicBlock(BB); MFp->insert(FallThroughMBB, BalTgtMBB); LongBrMBB->addSuccessor(BalTgtMBB); BalTgtMBB->addSuccessor(TgtMBB); @@ -834,7 +834,7 @@ EverMadeChange = MadeChange = true; } - MFp->RenumberBlocks(); + MFp->renumberBlocks(); } return EverMadeChange; diff --git a/llvm/lib/Target/Mips/MipsConstantIslandPass.cpp b/llvm/lib/Target/Mips/MipsConstantIslandPass.cpp --- a/llvm/lib/Target/Mips/MipsConstantIslandPass.cpp +++ b/llvm/lib/Target/Mips/MipsConstantIslandPass.cpp @@ -458,7 +458,7 @@ // Renumber all of the machine basic blocks in the function, guaranteeing that // the numbers agree with the position of the block in the function. - MF->RenumberBlocks(); + MF->renumberBlocks(); bool MadeChange = false; @@ -525,7 +525,7 @@ void MipsConstantIslands::doInitialPlacement(std::vector &CPEMIs) { // Create the basic block to hold the CPE's. - MachineBasicBlock *BB = MF->CreateMachineBasicBlock(); + MachineBasicBlock *BB = MF->createMachineBasicBlock(); MF->push_back(BB); // MachineConstantPool measures alignment in bytes. We measure in log2(bytes). @@ -821,7 +821,7 @@ void MipsConstantIslands::updateForInsertedWaterBlock (MachineBasicBlock *NewBB) { // Renumber the MBB's to keep them consecutive. - NewBB->getParent()->RenumberBlocks(NewBB); + NewBB->getParent()->renumberBlocks(NewBB); // Insert an entry into BBInfo to align it properly with the (newly // renumbered) block numbers. @@ -846,7 +846,7 @@ // Create a new MBB for the code after the OrigBB. MachineBasicBlock *NewBB = - MF->CreateMachineBasicBlock(OrigBB->getBasicBlock()); + MF->createMachineBasicBlock(OrigBB->getBasicBlock()); MachineFunction::iterator MBBI = ++OrigBB->getIterator(); MF->insert(MBBI, NewBB); @@ -869,7 +869,7 @@ // Update internal data structures to account for the newly inserted MBB. // This is almost the same as updateForInsertedWaterBlock, except that // the Water goes after OrigBB, not NewBB. - MF->RenumberBlocks(NewBB); + MF->renumberBlocks(NewBB); // Insert an entry into BBInfo to align it properly with the (newly // renumbered) block numbers. @@ -1316,7 +1316,7 @@ else if (result==2) return true; // Look for water where we can place this CPE. - MachineBasicBlock *NewIsland = MF->CreateMachineBasicBlock(); + MachineBasicBlock *NewIsland = MF->createMachineBasicBlock(); MachineBasicBlock *NewMBB; water_iterator IP; if (findAvailableWater(U, UserOffset, IP)) { diff --git a/llvm/lib/Target/Mips/MipsDelaySlotFiller.cpp b/llvm/lib/Target/Mips/MipsDelaySlotFiller.cpp --- a/llvm/lib/Target/Mips/MipsDelaySlotFiller.cpp +++ b/llvm/lib/Target/Mips/MipsDelaySlotFiller.cpp @@ -311,10 +311,10 @@ for (BB2BrMap::const_iterator I = BrMap.begin(); I != BrMap.end(); ++I) { if (I->second) { - MIBundleBuilder(I->second).append(MF->CloneMachineInstr(&*Filler)); + MIBundleBuilder(I->second).append(MF->cloneMachineInstr(&*Filler)); ++UsefulSlots; } else { - I->first->insert(I->first->end(), MF->CloneMachineInstr(&*Filler)); + I->first->insert(I->first->end(), MF->cloneMachineInstr(&*Filler)); } } } diff --git a/llvm/lib/Target/Mips/MipsExpandPseudo.cpp b/llvm/lib/Target/Mips/MipsExpandPseudo.cpp --- a/llvm/lib/Target/Mips/MipsExpandPseudo.cpp +++ b/llvm/lib/Target/Mips/MipsExpandPseudo.cpp @@ -111,10 +111,10 @@ // insert new blocks after the current block const BasicBlock *LLVM_BB = BB.getBasicBlock(); - MachineBasicBlock *loop1MBB = MF->CreateMachineBasicBlock(LLVM_BB); - MachineBasicBlock *loop2MBB = MF->CreateMachineBasicBlock(LLVM_BB); - MachineBasicBlock *sinkMBB = MF->CreateMachineBasicBlock(LLVM_BB); - MachineBasicBlock *exitMBB = MF->CreateMachineBasicBlock(LLVM_BB); + MachineBasicBlock *loop1MBB = MF->createMachineBasicBlock(LLVM_BB); + MachineBasicBlock *loop2MBB = MF->createMachineBasicBlock(LLVM_BB); + MachineBasicBlock *sinkMBB = MF->createMachineBasicBlock(LLVM_BB); + MachineBasicBlock *exitMBB = MF->createMachineBasicBlock(LLVM_BB); MachineFunction::iterator It = ++BB.getIterator(); MF->insert(It, loop1MBB); MF->insert(It, loop2MBB); @@ -248,9 +248,9 @@ // insert new blocks after the current block const BasicBlock *LLVM_BB = BB.getBasicBlock(); - MachineBasicBlock *loop1MBB = MF->CreateMachineBasicBlock(LLVM_BB); - MachineBasicBlock *loop2MBB = MF->CreateMachineBasicBlock(LLVM_BB); - MachineBasicBlock *exitMBB = MF->CreateMachineBasicBlock(LLVM_BB); + MachineBasicBlock *loop1MBB = MF->createMachineBasicBlock(LLVM_BB); + MachineBasicBlock *loop2MBB = MF->createMachineBasicBlock(LLVM_BB); + MachineBasicBlock *exitMBB = MF->createMachineBasicBlock(LLVM_BB); MachineFunction::iterator It = ++BB.getIterator(); MF->insert(It, loop1MBB); MF->insert(It, loop2MBB); @@ -418,9 +418,9 @@ Register StoreVal = I->getOperand(8).getReg(); const BasicBlock *LLVM_BB = BB.getBasicBlock(); - MachineBasicBlock *loopMBB = MF->CreateMachineBasicBlock(LLVM_BB); - MachineBasicBlock *sinkMBB = MF->CreateMachineBasicBlock(LLVM_BB); - MachineBasicBlock *exitMBB = MF->CreateMachineBasicBlock(LLVM_BB); + MachineBasicBlock *loopMBB = MF->createMachineBasicBlock(LLVM_BB); + MachineBasicBlock *sinkMBB = MF->createMachineBasicBlock(LLVM_BB); + MachineBasicBlock *exitMBB = MF->createMachineBasicBlock(LLVM_BB); MachineFunction::iterator It = ++BB.getIterator(); MF->insert(It, loopMBB); MF->insert(It, sinkMBB); @@ -712,8 +712,8 @@ } const BasicBlock *LLVM_BB = BB.getBasicBlock(); - MachineBasicBlock *loopMBB = MF->CreateMachineBasicBlock(LLVM_BB); - MachineBasicBlock *exitMBB = MF->CreateMachineBasicBlock(LLVM_BB); + MachineBasicBlock *loopMBB = MF->createMachineBasicBlock(LLVM_BB); + MachineBasicBlock *exitMBB = MF->createMachineBasicBlock(LLVM_BB); MachineFunction::iterator It = ++BB.getIterator(); MF->insert(It, loopMBB); MF->insert(It, exitMBB); @@ -900,7 +900,7 @@ Modified |= expandMBB(MBB); if (Modified) - MF.RenumberBlocks(); + MF.renumberBlocks(); return Modified; } diff --git a/llvm/lib/Target/Mips/MipsISelLowering.cpp b/llvm/lib/Target/Mips/MipsISelLowering.cpp --- a/llvm/lib/Target/Mips/MipsISelLowering.cpp +++ b/llvm/lib/Target/Mips/MipsISelLowering.cpp @@ -1755,7 +1755,7 @@ // insert new blocks after the current block const BasicBlock *LLVM_BB = BB->getBasicBlock(); - MachineBasicBlock *exitMBB = MF->CreateMachineBasicBlock(LLVM_BB); + MachineBasicBlock *exitMBB = MF->createMachineBasicBlock(LLVM_BB); MachineFunction::iterator It = ++BB->getIterator(); MF->insert(It, exitMBB); @@ -1939,7 +1939,7 @@ // insert new blocks after the current block const BasicBlock *LLVM_BB = BB->getBasicBlock(); - MachineBasicBlock *exitMBB = MF->CreateMachineBasicBlock(LLVM_BB); + MachineBasicBlock *exitMBB = MF->createMachineBasicBlock(LLVM_BB); MachineFunction::iterator It = ++BB->getIterator(); MF->insert(It, exitMBB); @@ -4602,8 +4602,8 @@ // fallthrough --> copy0MBB MachineBasicBlock *thisMBB = BB; MachineFunction *F = BB->getParent(); - MachineBasicBlock *copy0MBB = F->CreateMachineBasicBlock(LLVM_BB); - MachineBasicBlock *sinkMBB = F->CreateMachineBasicBlock(LLVM_BB); + MachineBasicBlock *copy0MBB = F->createMachineBasicBlock(LLVM_BB); + MachineBasicBlock *sinkMBB = F->createMachineBasicBlock(LLVM_BB); F->insert(It, copy0MBB); F->insert(It, sinkMBB); @@ -4679,8 +4679,8 @@ // fallthrough --> copy0MBB MachineBasicBlock *thisMBB = BB; MachineFunction *F = BB->getParent(); - MachineBasicBlock *copy0MBB = F->CreateMachineBasicBlock(LLVM_BB); - MachineBasicBlock *sinkMBB = F->CreateMachineBasicBlock(LLVM_BB); + MachineBasicBlock *copy0MBB = F->createMachineBasicBlock(LLVM_BB); + MachineBasicBlock *sinkMBB = F->createMachineBasicBlock(LLVM_BB); F->insert(It, copy0MBB); F->insert(It, sinkMBB); diff --git a/llvm/lib/Target/Mips/MipsSEISelLowering.cpp b/llvm/lib/Target/Mips/MipsSEISelLowering.cpp --- a/llvm/lib/Target/Mips/MipsSEISelLowering.cpp +++ b/llvm/lib/Target/Mips/MipsSEISelLowering.cpp @@ -3040,9 +3040,9 @@ const BasicBlock *LLVM_BB = BB->getBasicBlock(); MachineFunction::iterator It = std::next(MachineFunction::iterator(BB)); MachineFunction *F = BB->getParent(); - MachineBasicBlock *FBB = F->CreateMachineBasicBlock(LLVM_BB); - MachineBasicBlock *TBB = F->CreateMachineBasicBlock(LLVM_BB); - MachineBasicBlock *Sink = F->CreateMachineBasicBlock(LLVM_BB); + MachineBasicBlock *FBB = F->createMachineBasicBlock(LLVM_BB); + MachineBasicBlock *TBB = F->createMachineBasicBlock(LLVM_BB); + MachineBasicBlock *Sink = F->createMachineBasicBlock(LLVM_BB); F->insert(It, FBB); F->insert(It, TBB); F->insert(It, Sink); @@ -3109,9 +3109,9 @@ const BasicBlock *LLVM_BB = BB->getBasicBlock(); MachineFunction::iterator It = std::next(MachineFunction::iterator(BB)); MachineFunction *F = BB->getParent(); - MachineBasicBlock *FBB = F->CreateMachineBasicBlock(LLVM_BB); - MachineBasicBlock *TBB = F->CreateMachineBasicBlock(LLVM_BB); - MachineBasicBlock *Sink = F->CreateMachineBasicBlock(LLVM_BB); + MachineBasicBlock *FBB = F->createMachineBasicBlock(LLVM_BB); + MachineBasicBlock *TBB = F->createMachineBasicBlock(LLVM_BB); + MachineBasicBlock *Sink = F->createMachineBasicBlock(LLVM_BB); F->insert(It, FBB); F->insert(It, TBB); F->insert(It, Sink); diff --git a/llvm/lib/Target/PowerPC/PPCBranchSelector.cpp b/llvm/lib/Target/PowerPC/PPCBranchSelector.cpp --- a/llvm/lib/Target/PowerPC/PPCBranchSelector.cpp +++ b/llvm/lib/Target/PowerPC/PPCBranchSelector.cpp @@ -289,7 +289,7 @@ const PPCInstrInfo *TII = static_cast(Fn.getSubtarget().getInstrInfo()); // Give the blocks of the function a dense, in-order, numbering. - Fn.RenumberBlocks(); + Fn.renumberBlocks(); BlockSizes.resize(Fn.getNumBlockIDs()); FirstImpreciseBlock = -1; diff --git a/llvm/lib/Target/PowerPC/PPCEarlyReturn.cpp b/llvm/lib/Target/PowerPC/PPCEarlyReturn.cpp --- a/llvm/lib/Target/PowerPC/PPCEarlyReturn.cpp +++ b/llvm/lib/Target/PowerPC/PPCEarlyReturn.cpp @@ -76,7 +76,7 @@ if (J->getOperand(0).getMBB() == &ReturnMBB) { // This is an unconditional branch to the return. Replace the // branch with a blr. - MachineInstr *MI = ReturnMBB.getParent()->CloneMachineInstr(&*I); + MachineInstr *MI = ReturnMBB.getParent()->cloneMachineInstr(&*I); Pred->insert(J, MI); MachineBasicBlock::iterator K = J--; @@ -89,7 +89,7 @@ if (J->getOperand(2).getMBB() == &ReturnMBB) { // This is a conditional branch to the return. Replace the branch // with a bclr. - MachineInstr *MI = ReturnMBB.getParent()->CloneMachineInstr(&*I); + MachineInstr *MI = ReturnMBB.getParent()->cloneMachineInstr(&*I); MI->setDesc(TII->get(PPC::BCCLR)); MachineInstrBuilder(*ReturnMBB.getParent(), MI) .add(J->getOperand(0)) @@ -106,7 +106,7 @@ if (J->getOperand(1).getMBB() == &ReturnMBB) { // This is a conditional branch to the return. Replace the branch // with a bclr. - MachineInstr *MI = ReturnMBB.getParent()->CloneMachineInstr(&*I); + MachineInstr *MI = ReturnMBB.getParent()->cloneMachineInstr(&*I); MI->setDesc( TII->get(J->getOpcode() == PPC::BC ? PPC::BCLR : PPC::BCLRn)); MachineInstrBuilder(*ReturnMBB.getParent(), MI) diff --git a/llvm/lib/Target/PowerPC/PPCExpandAtomicPseudoInsts.cpp b/llvm/lib/Target/PowerPC/PPCExpandAtomicPseudoInsts.cpp --- a/llvm/lib/Target/PowerPC/PPCExpandAtomicPseudoInsts.cpp +++ b/llvm/lib/Target/PowerPC/PPCExpandAtomicPseudoInsts.cpp @@ -84,7 +84,7 @@ } } if (Changed) - MF.RenumberBlocks(); + MF.renumberBlocks(); return Changed; } @@ -126,8 +126,8 @@ const BasicBlock *BB = MBB.getBasicBlock(); // Create layout of control flow. MachineFunction::iterator MFI = ++MBB.getIterator(); - MachineBasicBlock *LoopMBB = MF->CreateMachineBasicBlock(BB); - MachineBasicBlock *ExitMBB = MF->CreateMachineBasicBlock(BB); + MachineBasicBlock *LoopMBB = MF->createMachineBasicBlock(BB); + MachineBasicBlock *ExitMBB = MF->createMachineBasicBlock(BB); MF->insert(MFI, LoopMBB); MF->insert(MFI, ExitMBB); ExitMBB->splice(ExitMBB->begin(), &MBB, std::next(MI.getIterator()), @@ -249,10 +249,10 @@ // exit: // .... MachineFunction::iterator MFI = ++MBB.getIterator(); - MachineBasicBlock *LoopCmpMBB = MF->CreateMachineBasicBlock(BB); - MachineBasicBlock *CmpSuccMBB = MF->CreateMachineBasicBlock(BB); - MachineBasicBlock *CmpFailMBB = MF->CreateMachineBasicBlock(BB); - MachineBasicBlock *ExitMBB = MF->CreateMachineBasicBlock(BB); + MachineBasicBlock *LoopCmpMBB = MF->createMachineBasicBlock(BB); + MachineBasicBlock *CmpSuccMBB = MF->createMachineBasicBlock(BB); + MachineBasicBlock *CmpFailMBB = MF->createMachineBasicBlock(BB); + MachineBasicBlock *ExitMBB = MF->createMachineBasicBlock(BB); MF->insert(MFI, LoopCmpMBB); MF->insert(MFI, CmpSuccMBB); MF->insert(MFI, CmpFailMBB); diff --git a/llvm/lib/Target/PowerPC/PPCExpandISEL.cpp b/llvm/lib/Target/PowerPC/PPCExpandISEL.cpp --- a/llvm/lib/Target/PowerPC/PPCExpandISEL.cpp +++ b/llvm/lib/Target/PowerPC/PPCExpandISEL.cpp @@ -340,7 +340,7 @@ // follow this ISEL. If the ISEL is the last instruction // in a block that can't fall through, we also need a block // to branch to. - ? MF->CreateMachineBasicBlock(LLVM_BB) + ? MF->createMachineBasicBlock(LLVM_BB) : nullptr; MachineFunction::iterator It = MBB->getIterator(); @@ -363,12 +363,12 @@ // its successor. // Note this need to be done *after* the above setting the Successor code. if (IsFalseBlockRequired) { - FalseBlock = MF->CreateMachineBasicBlock(LLVM_BB); + FalseBlock = MF->createMachineBasicBlock(LLVM_BB); MF->insert(It, FalseBlock); } if (IsTrueBlockRequired) { - TrueBlock = MF->CreateMachineBasicBlock(LLVM_BB); + TrueBlock = MF->createMachineBasicBlock(LLVM_BB); MF->insert(It, TrueBlock); } diff --git a/llvm/lib/Target/PowerPC/PPCFrameLowering.cpp b/llvm/lib/Target/PowerPC/PPCFrameLowering.cpp --- a/llvm/lib/Target/PowerPC/PPCFrameLowering.cpp +++ b/llvm/lib/Target/PowerPC/PPCFrameLowering.cpp @@ -1377,9 +1377,9 @@ // bb.2: // stdux , r1, $scratchreg MachineFunction::iterator MBBInsertPoint = std::next(MBB.getIterator()); - MachineBasicBlock *ProbeLoopBodyMBB = MF.CreateMachineBasicBlock(ProbedBB); + MachineBasicBlock *ProbeLoopBodyMBB = MF.createMachineBasicBlock(ProbedBB); MF.insert(MBBInsertPoint, ProbeLoopBodyMBB); - MachineBasicBlock *ProbeExitMBB = MF.CreateMachineBasicBlock(ProbedBB); + MachineBasicBlock *ProbeExitMBB = MF.createMachineBasicBlock(ProbedBB); MF.insert(MBBInsertPoint, ProbeExitMBB); // bb.2 { @@ -1504,9 +1504,9 @@ // Create MBBs of the loop. MachineFunction::iterator MBBInsertPoint = std::next(CurrentMBB->getIterator()); - MachineBasicBlock *LoopMBB = MF.CreateMachineBasicBlock(ProbedBB); + MachineBasicBlock *LoopMBB = MF.createMachineBasicBlock(ProbedBB); MF.insert(MBBInsertPoint, LoopMBB); - MachineBasicBlock *ExitMBB = MF.CreateMachineBasicBlock(ProbedBB); + MachineBasicBlock *ExitMBB = MF.createMachineBasicBlock(ProbedBB); MF.insert(MBBInsertPoint, ExitMBB); // Synthesize the loop body. allocateAndProbe(*LoopMBB, LoopMBB->end(), NegProbeSize, ScratchReg, diff --git a/llvm/lib/Target/PowerPC/PPCISelLowering.cpp b/llvm/lib/Target/PowerPC/PPCISelLowering.cpp --- a/llvm/lib/Target/PowerPC/PPCISelLowering.cpp +++ b/llvm/lib/Target/PowerPC/PPCISelLowering.cpp @@ -11299,10 +11299,10 @@ Register incr = MI.getOperand(3).getReg(); DebugLoc dl = MI.getDebugLoc(); - MachineBasicBlock *loopMBB = F->CreateMachineBasicBlock(LLVM_BB); + MachineBasicBlock *loopMBB = F->createMachineBasicBlock(LLVM_BB); MachineBasicBlock *loop2MBB = - CmpOpcode ? F->CreateMachineBasicBlock(LLVM_BB) : nullptr; - MachineBasicBlock *exitMBB = F->CreateMachineBasicBlock(LLVM_BB); + CmpOpcode ? F->createMachineBasicBlock(LLVM_BB) : nullptr; + MachineBasicBlock *exitMBB = F->createMachineBasicBlock(LLVM_BB); F->insert(It, loopMBB); if (CmpOpcode) F->insert(It, loop2MBB); @@ -11471,10 +11471,10 @@ Register ptrA = MI.getOperand(1).getReg(); Register ptrB = MI.getOperand(2).getReg(); - MachineBasicBlock *loopMBB = F->CreateMachineBasicBlock(LLVM_BB); + MachineBasicBlock *loopMBB = F->createMachineBasicBlock(LLVM_BB); MachineBasicBlock *loop2MBB = - CmpOpcode ? F->CreateMachineBasicBlock(LLVM_BB) : nullptr; - MachineBasicBlock *exitMBB = F->CreateMachineBasicBlock(LLVM_BB); + CmpOpcode ? F->createMachineBasicBlock(LLVM_BB) : nullptr; + MachineBasicBlock *exitMBB = F->createMachineBasicBlock(LLVM_BB); F->insert(It, loopMBB); if (CmpOpcode) F->insert(It, loop2MBB); @@ -11682,8 +11682,8 @@ // MachineBasicBlock *thisMBB = MBB; - MachineBasicBlock *mainMBB = MF->CreateMachineBasicBlock(BB); - MachineBasicBlock *sinkMBB = MF->CreateMachineBasicBlock(BB); + MachineBasicBlock *mainMBB = MF->createMachineBasicBlock(BB); + MachineBasicBlock *sinkMBB = MF->createMachineBasicBlock(BB); MF->insert(I, mainMBB); MF->insert(I, sinkMBB); @@ -11949,9 +11949,9 @@ // In TestMBB, test if sp is equal to final stack pointer, if so, jump to // TailMBB. In BlockMBB, update the sp atomically and jump back to TestMBB. // TailMBB is spliced via \p MI. - MachineBasicBlock *TestMBB = MF->CreateMachineBasicBlock(ProbedBB); - MachineBasicBlock *TailMBB = MF->CreateMachineBasicBlock(ProbedBB); - MachineBasicBlock *BlockMBB = MF->CreateMachineBasicBlock(ProbedBB); + MachineBasicBlock *TestMBB = MF->createMachineBasicBlock(ProbedBB); + MachineBasicBlock *TailMBB = MF->createMachineBasicBlock(ProbedBB); + MachineBasicBlock *BlockMBB = MF->createMachineBasicBlock(ProbedBB); MachineFunction::iterator MBBIter = ++MBB->getIterator(); MF->insert(MBBIter, TestMBB); @@ -12161,8 +12161,8 @@ // bCC copy1MBB // fallthrough --> copy0MBB MachineBasicBlock *thisMBB = BB; - MachineBasicBlock *copy0MBB = F->CreateMachineBasicBlock(LLVM_BB); - MachineBasicBlock *sinkMBB = F->CreateMachineBasicBlock(LLVM_BB); + MachineBasicBlock *copy0MBB = F->createMachineBasicBlock(LLVM_BB); + MachineBasicBlock *sinkMBB = F->createMachineBasicBlock(LLVM_BB); DebugLoc dl = MI.getDebugLoc(); F->insert(It, copy0MBB); F->insert(It, sinkMBB); @@ -12226,8 +12226,8 @@ // bne readLoop # branch if they're not equal // ... - MachineBasicBlock *readMBB = F->CreateMachineBasicBlock(LLVM_BB); - MachineBasicBlock *sinkMBB = F->CreateMachineBasicBlock(LLVM_BB); + MachineBasicBlock *readMBB = F->createMachineBasicBlock(LLVM_BB); + MachineBasicBlock *sinkMBB = F->createMachineBasicBlock(LLVM_BB); DebugLoc dl = MI.getDebugLoc(); F->insert(It, readMBB); F->insert(It, sinkMBB); @@ -12398,10 +12398,10 @@ Register newval = MI.getOperand(4).getReg(); DebugLoc dl = MI.getDebugLoc(); - MachineBasicBlock *loop1MBB = F->CreateMachineBasicBlock(LLVM_BB); - MachineBasicBlock *loop2MBB = F->CreateMachineBasicBlock(LLVM_BB); - MachineBasicBlock *midMBB = F->CreateMachineBasicBlock(LLVM_BB); - MachineBasicBlock *exitMBB = F->CreateMachineBasicBlock(LLVM_BB); + MachineBasicBlock *loop1MBB = F->createMachineBasicBlock(LLVM_BB); + MachineBasicBlock *loop2MBB = F->createMachineBasicBlock(LLVM_BB); + MachineBasicBlock *midMBB = F->createMachineBasicBlock(LLVM_BB); + MachineBasicBlock *exitMBB = F->createMachineBasicBlock(LLVM_BB); F->insert(It, loop1MBB); F->insert(It, loop2MBB); F->insert(It, midMBB); @@ -12477,10 +12477,10 @@ Register newval = MI.getOperand(4).getReg(); DebugLoc dl = MI.getDebugLoc(); - MachineBasicBlock *loop1MBB = F->CreateMachineBasicBlock(LLVM_BB); - MachineBasicBlock *loop2MBB = F->CreateMachineBasicBlock(LLVM_BB); - MachineBasicBlock *midMBB = F->CreateMachineBasicBlock(LLVM_BB); - MachineBasicBlock *exitMBB = F->CreateMachineBasicBlock(LLVM_BB); + MachineBasicBlock *loop1MBB = F->createMachineBasicBlock(LLVM_BB); + MachineBasicBlock *loop2MBB = F->createMachineBasicBlock(LLVM_BB); + MachineBasicBlock *midMBB = F->createMachineBasicBlock(LLVM_BB); + MachineBasicBlock *exitMBB = F->createMachineBasicBlock(LLVM_BB); F->insert(It, loop1MBB); F->insert(It, loop2MBB); F->insert(It, midMBB); diff --git a/llvm/lib/Target/PowerPC/PPCReduceCRLogicals.cpp b/llvm/lib/Target/PowerPC/PPCReduceCRLogicals.cpp --- a/llvm/lib/Target/PowerPC/PPCReduceCRLogicals.cpp +++ b/llvm/lib/Target/PowerPC/PPCReduceCRLogicals.cpp @@ -199,7 +199,7 @@ MachineBasicBlock::iterator InsertPoint = BSI.SplitBefore; const BasicBlock *LLVM_BB = ThisMBB->getBasicBlock(); MachineFunction::iterator It = ThisMBB->getIterator(); - MachineBasicBlock *NewMBB = MF->CreateMachineBasicBlock(LLVM_BB); + MachineBasicBlock *NewMBB = MF->createMachineBasicBlock(LLVM_BB); MF->insert(++It, NewMBB); // Move everything after SplitBefore into the new block. diff --git a/llvm/lib/Target/RISCV/RISCVExpandAtomicPseudoInsts.cpp b/llvm/lib/Target/RISCV/RISCVExpandAtomicPseudoInsts.cpp --- a/llvm/lib/Target/RISCV/RISCVExpandAtomicPseudoInsts.cpp +++ b/llvm/lib/Target/RISCV/RISCVExpandAtomicPseudoInsts.cpp @@ -346,8 +346,8 @@ DebugLoc DL = MI.getDebugLoc(); MachineFunction *MF = MBB.getParent(); - auto LoopMBB = MF->CreateMachineBasicBlock(MBB.getBasicBlock()); - auto DoneMBB = MF->CreateMachineBasicBlock(MBB.getBasicBlock()); + auto LoopMBB = MF->createMachineBasicBlock(MBB.getBasicBlock()); + auto DoneMBB = MF->createMachineBasicBlock(MBB.getBasicBlock()); // Insert new MBBs. MF->insert(++MBB.getIterator(), LoopMBB); @@ -398,10 +398,10 @@ MachineInstr &MI = *MBBI; DebugLoc DL = MI.getDebugLoc(); MachineFunction *MF = MBB.getParent(); - auto LoopHeadMBB = MF->CreateMachineBasicBlock(MBB.getBasicBlock()); - auto LoopIfBodyMBB = MF->CreateMachineBasicBlock(MBB.getBasicBlock()); - auto LoopTailMBB = MF->CreateMachineBasicBlock(MBB.getBasicBlock()); - auto DoneMBB = MF->CreateMachineBasicBlock(MBB.getBasicBlock()); + auto LoopHeadMBB = MF->createMachineBasicBlock(MBB.getBasicBlock()); + auto LoopIfBodyMBB = MF->createMachineBasicBlock(MBB.getBasicBlock()); + auto LoopTailMBB = MF->createMachineBasicBlock(MBB.getBasicBlock()); + auto DoneMBB = MF->createMachineBasicBlock(MBB.getBasicBlock()); // Insert new MBBs. MF->insert(++MBB.getIterator(), LoopHeadMBB); @@ -514,9 +514,9 @@ MachineInstr &MI = *MBBI; DebugLoc DL = MI.getDebugLoc(); MachineFunction *MF = MBB.getParent(); - auto LoopHeadMBB = MF->CreateMachineBasicBlock(MBB.getBasicBlock()); - auto LoopTailMBB = MF->CreateMachineBasicBlock(MBB.getBasicBlock()); - auto DoneMBB = MF->CreateMachineBasicBlock(MBB.getBasicBlock()); + auto LoopHeadMBB = MF->createMachineBasicBlock(MBB.getBasicBlock()); + auto LoopTailMBB = MF->createMachineBasicBlock(MBB.getBasicBlock()); + auto DoneMBB = MF->createMachineBasicBlock(MBB.getBasicBlock()); // Insert new MBBs. MF->insert(++MBB.getIterator(), LoopHeadMBB); diff --git a/llvm/lib/Target/RISCV/RISCVExpandPseudoInsts.cpp b/llvm/lib/Target/RISCV/RISCVExpandPseudoInsts.cpp --- a/llvm/lib/Target/RISCV/RISCVExpandPseudoInsts.cpp +++ b/llvm/lib/Target/RISCV/RISCVExpandPseudoInsts.cpp @@ -166,7 +166,7 @@ Register DestReg = MI.getOperand(0).getReg(); const MachineOperand &Symbol = MI.getOperand(1); - MachineBasicBlock *NewMBB = MF->CreateMachineBasicBlock(MBB.getBasicBlock()); + MachineBasicBlock *NewMBB = MF->createMachineBasicBlock(MBB.getBasicBlock()); // Tell AsmPrinter that we unconditionally want the symbol of this label to be // emitted. diff --git a/llvm/lib/Target/RISCV/RISCVISelLowering.cpp b/llvm/lib/Target/RISCV/RISCVISelLowering.cpp --- a/llvm/lib/Target/RISCV/RISCVISelLowering.cpp +++ b/llvm/lib/Target/RISCV/RISCVISelLowering.cpp @@ -7748,10 +7748,10 @@ const BasicBlock *LLVM_BB = BB->getBasicBlock(); MachineFunction::iterator It = ++BB->getIterator(); - MachineBasicBlock *LoopMBB = MF.CreateMachineBasicBlock(LLVM_BB); + MachineBasicBlock *LoopMBB = MF.createMachineBasicBlock(LLVM_BB); MF.insert(It, LoopMBB); - MachineBasicBlock *DoneMBB = MF.CreateMachineBasicBlock(LLVM_BB); + MachineBasicBlock *DoneMBB = MF.createMachineBasicBlock(LLVM_BB); MF.insert(It, DoneMBB); // Transfer the remainder of BB and its successor edges to DoneMBB. @@ -7940,8 +7940,8 @@ MachineBasicBlock *HeadMBB = BB; MachineFunction *F = BB->getParent(); - MachineBasicBlock *TailMBB = F->CreateMachineBasicBlock(LLVM_BB); - MachineBasicBlock *IfFalseMBB = F->CreateMachineBasicBlock(LLVM_BB); + MachineBasicBlock *TailMBB = F->createMachineBasicBlock(LLVM_BB); + MachineBasicBlock *IfFalseMBB = F->createMachineBasicBlock(LLVM_BB); F->insert(I, IfFalseMBB); F->insert(I, TailMBB); diff --git a/llvm/lib/Target/RISCV/RISCVInstrInfo.cpp b/llvm/lib/Target/RISCV/RISCVInstrInfo.cpp --- a/llvm/lib/Target/RISCV/RISCVInstrInfo.cpp +++ b/llvm/lib/Target/RISCV/RISCVInstrInfo.cpp @@ -1550,7 +1550,7 @@ unsigned OpIdx2) const { auto cloneIfNew = [NewMI](MachineInstr &MI) -> MachineInstr & { if (NewMI) - return *MI.getParent()->getParent()->CloneMachineInstr(&MI); + return *MI.getParent()->getParent()->cloneMachineInstr(&MI); return MI; }; diff --git a/llvm/lib/Target/Sparc/SparcISelLowering.cpp b/llvm/lib/Target/Sparc/SparcISelLowering.cpp --- a/llvm/lib/Target/Sparc/SparcISelLowering.cpp +++ b/llvm/lib/Target/Sparc/SparcISelLowering.cpp @@ -3157,8 +3157,8 @@ MachineBasicBlock *ThisMBB = BB; MachineFunction *F = BB->getParent(); - MachineBasicBlock *IfFalseMBB = F->CreateMachineBasicBlock(LLVM_BB); - MachineBasicBlock *SinkMBB = F->CreateMachineBasicBlock(LLVM_BB); + MachineBasicBlock *IfFalseMBB = F->createMachineBasicBlock(LLVM_BB); + MachineBasicBlock *SinkMBB = F->createMachineBasicBlock(LLVM_BB); F->insert(It, IfFalseMBB); F->insert(It, SinkMBB); diff --git a/llvm/lib/Target/SystemZ/SystemZInstrInfo.cpp b/llvm/lib/Target/SystemZ/SystemZInstrInfo.cpp --- a/llvm/lib/Target/SystemZ/SystemZInstrInfo.cpp +++ b/llvm/lib/Target/SystemZ/SystemZInstrInfo.cpp @@ -70,7 +70,7 @@ // Get two load or store instructions. Use the original instruction for one // of them (arbitrarily the second here) and create a clone for the other. - MachineInstr *EarlierMI = MF.CloneMachineInstr(&*MI); + MachineInstr *EarlierMI = MF.cloneMachineInstr(&*MI); MBB->insert(MI, EarlierMI); // Set up the two 64-bit registers and remember super reg and its flags. @@ -276,7 +276,7 @@ unsigned OpIdx2) const { auto cloneIfNew = [NewMI](MachineInstr &MI) -> MachineInstr & { if (NewMI) - return *MI.getParent()->getParent()->CloneMachineInstr(&MI); + return *MI.getParent()->getParent()->cloneMachineInstr(&MI); return MI; }; @@ -1889,7 +1889,7 @@ MachineBasicBlock *SystemZ::emitBlockAfter(MachineBasicBlock *MBB) { MachineFunction &MF = *MBB->getParent(); - MachineBasicBlock *NewMBB = MF.CreateMachineBasicBlock(MBB->getBasicBlock()); + MachineBasicBlock *NewMBB = MF.createMachineBasicBlock(MBB->getBasicBlock()); MF.insert(std::next(MachineFunction::iterator(MBB)), NewMBB); return NewMBB; } diff --git a/llvm/lib/Target/SystemZ/SystemZLongBranch.cpp b/llvm/lib/Target/SystemZ/SystemZLongBranch.cpp --- a/llvm/lib/Target/SystemZ/SystemZLongBranch.cpp +++ b/llvm/lib/Target/SystemZ/SystemZLongBranch.cpp @@ -280,7 +280,7 @@ // that no branches need relaxation. Return the size of the function under // this assumption. uint64_t SystemZLongBranch::initMBBInfo() { - MF->RenumberBlocks(); + MF->renumberBlocks(); unsigned NumBlocks = MF->size(); MBBs.clear(); diff --git a/llvm/lib/Target/SystemZ/SystemZPostRewrite.cpp b/llvm/lib/Target/SystemZ/SystemZPostRewrite.cpp --- a/llvm/lib/Target/SystemZ/SystemZPostRewrite.cpp +++ b/llvm/lib/Target/SystemZ/SystemZPostRewrite.cpp @@ -174,7 +174,7 @@ LiveRegs.stepBackward(*I); // Splice MBB at MI, moving the rest of the block into RestMBB. - MachineBasicBlock *RestMBB = MF.CreateMachineBasicBlock(BB); + MachineBasicBlock *RestMBB = MF.createMachineBasicBlock(BB); MF.insert(std::next(MachineFunction::iterator(MBB)), RestMBB); RestMBB->splice(RestMBB->begin(), &MBB, MI, MBB.end()); RestMBB->transferSuccessors(&MBB); @@ -182,7 +182,7 @@ RestMBB->addLiveIn(*I); // Create a new block MoveMBB to hold the move instruction. - MachineBasicBlock *MoveMBB = MF.CreateMachineBasicBlock(BB); + MachineBasicBlock *MoveMBB = MF.createMachineBasicBlock(BB); MF.insert(std::next(MachineFunction::iterator(MBB)), MoveMBB); MoveMBB->addLiveIn(SrcReg); for (auto I = LiveRegs.begin(); I != LiveRegs.end(); ++I) diff --git a/llvm/lib/Target/VE/VEISelLowering.cpp b/llvm/lib/Target/VE/VEISelLowering.cpp --- a/llvm/lib/Target/VE/VEISelLowering.cpp +++ b/llvm/lib/Target/VE/VEISelLowering.cpp @@ -1998,9 +1998,9 @@ // goto SinkMBB MachineBasicBlock *ThisMBB = MBB; - MachineBasicBlock *MainMBB = MF->CreateMachineBasicBlock(BB); - MachineBasicBlock *SinkMBB = MF->CreateMachineBasicBlock(BB); - MachineBasicBlock *RestoreMBB = MF->CreateMachineBasicBlock(BB); + MachineBasicBlock *MainMBB = MF->createMachineBasicBlock(BB); + MachineBasicBlock *SinkMBB = MF->createMachineBasicBlock(BB); + MachineBasicBlock *RestoreMBB = MF->createMachineBasicBlock(BB); MF->insert(I, MainMBB); MF->insert(I, SinkMBB); MF->push_back(RestoreMBB); @@ -2229,14 +2229,14 @@ // jmp %pc // Shove the dispatch's address into the return slot in the function context. - MachineBasicBlock *DispatchBB = MF->CreateMachineBasicBlock(); + MachineBasicBlock *DispatchBB = MF->createMachineBasicBlock(); DispatchBB->setIsEHPad(true); // Trap BB will causes trap like `assert(0)`. - MachineBasicBlock *TrapBB = MF->CreateMachineBasicBlock(); + MachineBasicBlock *TrapBB = MF->createMachineBasicBlock(); DispatchBB->addSuccessor(TrapBB); - MachineBasicBlock *DispContBB = MF->CreateMachineBasicBlock(); + MachineBasicBlock *DispContBB = MF->createMachineBasicBlock(); DispatchBB->addSuccessor(DispContBB); // Insert MBBs. diff --git a/llvm/lib/Target/VE/VEInstrInfo.cpp b/llvm/lib/Target/VE/VEInstrInfo.cpp --- a/llvm/lib/Target/VE/VEInstrInfo.cpp +++ b/llvm/lib/Target/VE/VEInstrInfo.cpp @@ -986,8 +986,8 @@ // Create new MBB MachineBasicBlock *BB = &MBB; const BasicBlock *LLVM_BB = BB->getBasicBlock(); - MachineBasicBlock *syscallMBB = MF.CreateMachineBasicBlock(LLVM_BB); - MachineBasicBlock *sinkMBB = MF.CreateMachineBasicBlock(LLVM_BB); + MachineBasicBlock *syscallMBB = MF.createMachineBasicBlock(LLVM_BB); + MachineBasicBlock *sinkMBB = MF.createMachineBasicBlock(LLVM_BB); MachineFunction::iterator It = ++(BB->getIterator()); MF.insert(It, syscallMBB); MF.insert(It, sinkMBB); diff --git a/llvm/lib/Target/WebAssembly/WebAssemblyCFGSort.cpp b/llvm/lib/Target/WebAssembly/WebAssemblyCFGSort.cpp --- a/llvm/lib/Target/WebAssembly/WebAssemblyCFGSort.cpp +++ b/llvm/lib/Target/WebAssembly/WebAssemblyCFGSort.cpp @@ -189,7 +189,7 @@ const MachineDominatorTree &MDT) { // Remember original layout ordering, so we can update terminators after // reordering to point to the original layout successor. - MF.RenumberBlocks(); + MF.renumberBlocks(); // Prepare for a topological sort: Record the number of predecessors each // block has, ignoring loop backedges. @@ -329,7 +329,7 @@ MBB = Next; } assert(Entries.empty() && "Active sort region list not finished"); - MF.RenumberBlocks(); + MF.renumberBlocks(); #ifndef NDEBUG SmallSetVector OnStack; diff --git a/llvm/lib/Target/WebAssembly/WebAssemblyCFGStackify.cpp b/llvm/lib/Target/WebAssembly/WebAssemblyCFGStackify.cpp --- a/llvm/lib/Target/WebAssembly/WebAssemblyCFGStackify.cpp +++ b/llvm/lib/Target/WebAssembly/WebAssemblyCFGStackify.cpp @@ -110,7 +110,7 @@ MachineBasicBlock *AppendixBB = nullptr; MachineBasicBlock *getAppendixBlock(MachineFunction &MF) { if (!AppendixBB) { - AppendixBB = MF.CreateMachineBasicBlock(); + AppendixBB = MF.createMachineBasicBlock(); // Give it a fake predecessor so that AsmPrinter prints its label. AppendixBB->addSuccessor(AppendixBB); MF.push_back(AppendixBB); @@ -127,7 +127,7 @@ MachineBasicBlock *FakeCallerBB = nullptr; MachineBasicBlock *getFakeCallerBlock(MachineFunction &MF) { if (!FakeCallerBB) - FakeCallerBB = MF.CreateMachineBasicBlock(); + FakeCallerBB = MF.createMachineBasicBlock(); return FakeCallerBB; } @@ -893,7 +893,7 @@ .addImm(int64_t(WebAssembly::BlockType::Void)); // Create a BB to insert the 'delegate' instruction. - MachineBasicBlock *DelegateBB = MF.CreateMachineBasicBlock(); + MachineBasicBlock *DelegateBB = MF.createMachineBasicBlock(); // If the destination of 'delegate' is not the caller, adds the destination to // the BB's successors. if (DelegateDest != FakeCallerBB) @@ -941,7 +941,7 @@ // post_bb: (new) // other_insts PreBB = EndBB; - PostBB = MF.CreateMachineBasicBlock(); + PostBB = MF.createMachineBasicBlock(); MF.insert(std::next(PreBB->getIterator()), PostBB); MF.insert(std::next(PreBB->getIterator()), DelegateBB); PostBB->splice(PostBB->end(), PreBB, SplitPos, PreBB->end()); @@ -962,7 +962,7 @@ // catch // ... assert(EndBB->isEHPad()); - PreBB = MF.CreateMachineBasicBlock(); + PreBB = MF.createMachineBasicBlock(); PostBB = EndBB; MF.insert(PostBB->getIterator(), PreBB); MF.insert(PostBB->getIterator(), DelegateBB); @@ -1455,7 +1455,7 @@ void WebAssemblyCFGStackify::recalculateScopeTops(MachineFunction &MF) { // Renumber BBs and recalculate ScopeTop info because new BBs might have been // created and inserted during fixing unwind mismatches. - MF.RenumberBlocks(); + MF.renumberBlocks(); ScopeTops.clear(); ScopeTops.resize(MF.getNumBlockIDs()); for (auto &MBB : reverse(MF)) { @@ -1741,7 +1741,7 @@ void WebAssemblyCFGStackify::cleanupFunctionData(MachineFunction &MF) { if (FakeCallerBB) - MF.DeleteMachineBasicBlock(FakeCallerBB); + MF.deleteMachineBasicBlock(FakeCallerBB); AppendixBB = FakeCallerBB = nullptr; } diff --git a/llvm/lib/Target/WebAssembly/WebAssemblyDebugValueManager.cpp b/llvm/lib/Target/WebAssembly/WebAssemblyDebugValueManager.cpp --- a/llvm/lib/Target/WebAssembly/WebAssemblyDebugValueManager.cpp +++ b/llvm/lib/Target/WebAssembly/WebAssemblyDebugValueManager.cpp @@ -54,7 +54,7 @@ MachineBasicBlock *MBB = Insert->getParent(); MachineFunction *MF = MBB->getParent(); for (MachineInstr *DBI : reverse(DbgValues)) { - MachineInstr *Clone = MF->CloneMachineInstr(DBI); + MachineInstr *Clone = MF->cloneMachineInstr(DBI); for (auto &MO : Clone->getDebugOperandsForReg(CurrentReg)) MO.setReg(NewReg); MBB->insert(Insert, Clone); diff --git a/llvm/lib/Target/WebAssembly/WebAssemblyFixBrTableDefaults.cpp b/llvm/lib/Target/WebAssembly/WebAssemblyFixBrTableDefaults.cpp --- a/llvm/lib/Target/WebAssembly/WebAssemblyFixBrTableDefaults.cpp +++ b/llvm/lib/Target/WebAssembly/WebAssemblyFixBrTableDefaults.cpp @@ -180,7 +180,7 @@ if (Changed) { // We rewrote part of the function; recompute relevant things. - MF.RenumberBlocks(); + MF.renumberBlocks(); return true; } diff --git a/llvm/lib/Target/WebAssembly/WebAssemblyFixIrreducibleControlFlow.cpp b/llvm/lib/Target/WebAssembly/WebAssemblyFixIrreducibleControlFlow.cpp --- a/llvm/lib/Target/WebAssembly/WebAssemblyFixIrreducibleControlFlow.cpp +++ b/llvm/lib/Target/WebAssembly/WebAssemblyFixIrreducibleControlFlow.cpp @@ -357,7 +357,7 @@ #endif // Create a dispatch block which will contain a jump table to the entries. - MachineBasicBlock *Dispatch = MF.CreateMachineBasicBlock(); + MachineBasicBlock *Dispatch = MF.createMachineBasicBlock(); MF.insert(MF.end(), Dispatch); Blocks.insert(Dispatch); @@ -442,7 +442,7 @@ continue; // This is a successor we need to rewrite. - MachineBasicBlock *Routing = MF.CreateMachineBasicBlock(); + MachineBasicBlock *Routing = MF.createMachineBasicBlock(); MF.insert(Pred->isLayoutSuccessor(Entry) ? MachineFunction::iterator(Entry) : MF.end(), @@ -506,7 +506,7 @@ if (LLVM_UNLIKELY(processRegion(&*MF.begin(), AllBlocks, MF))) { // We rewrote part of the function; recompute relevant things. MF.getRegInfo().invalidateLiveness(); - MF.RenumberBlocks(); + MF.renumberBlocks(); return true; } diff --git a/llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp b/llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp --- a/llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp +++ b/llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp @@ -453,9 +453,9 @@ const BasicBlock *LLVMBB = BB->getBasicBlock(); MachineFunction *F = BB->getParent(); - MachineBasicBlock *TrueMBB = F->CreateMachineBasicBlock(LLVMBB); - MachineBasicBlock *FalseMBB = F->CreateMachineBasicBlock(LLVMBB); - MachineBasicBlock *DoneMBB = F->CreateMachineBasicBlock(LLVMBB); + MachineBasicBlock *TrueMBB = F->createMachineBasicBlock(LLVMBB); + MachineBasicBlock *FalseMBB = F->createMachineBasicBlock(LLVMBB); + MachineBasicBlock *DoneMBB = F->createMachineBasicBlock(LLVMBB); MachineFunction::iterator It = ++BB->getIterator(); F->insert(It, FalseMBB); @@ -556,7 +556,7 @@ MachineFunction &MF = *BB->getParent(); const MCInstrDesc &MCID = TII.get(CallOp); - MachineInstrBuilder MIB(MF, MF.CreateMachineInstr(MCID, DL)); + MachineInstrBuilder MIB(MF, MF.createMachineInstr(MCID, DL)); // See if we must truncate the function pointer. // CALL_INDIRECT takes an i32, but in wasm64 we represent function pointers diff --git a/llvm/lib/Target/X86/X86CmovConversion.cpp b/llvm/lib/Target/X86/X86CmovConversion.cpp --- a/llvm/lib/Target/X86/X86CmovConversion.cpp +++ b/llvm/lib/Target/X86/X86CmovConversion.cpp @@ -668,8 +668,8 @@ MachineFunction *F = MBB->getParent(); const BasicBlock *BB = MBB->getBasicBlock(); - MachineBasicBlock *FalseMBB = F->CreateMachineBasicBlock(BB); - MachineBasicBlock *SinkMBB = F->CreateMachineBasicBlock(BB); + MachineBasicBlock *FalseMBB = F->createMachineBasicBlock(BB); + MachineBasicBlock *SinkMBB = F->createMachineBasicBlock(BB); F->insert(It, FalseMBB); F->insert(It, SinkMBB); diff --git a/llvm/lib/Target/X86/X86ExpandPseudo.cpp b/llvm/lib/Target/X86/X86ExpandPseudo.cpp --- a/llvm/lib/Target/X86/X86ExpandPseudo.cpp +++ b/llvm/lib/Target/X86/X86ExpandPseudo.cpp @@ -116,7 +116,7 @@ }; auto CreateMBB = [&]() { - auto *NewMBB = MF->CreateMachineBasicBlock(BB); + auto *NewMBB = MF->createMachineBasicBlock(BB); MBB->addSuccessor(NewMBB); if (!MBB->isLiveIn(X86::EFLAGS)) MBB->addLiveIn(X86::EFLAGS); @@ -635,8 +635,8 @@ // stores were performed. const BasicBlock *LLVMBlk = EntryBlk->getBasicBlock(); MachineFunction::iterator EntryBlkIter = ++EntryBlk->getIterator(); - MachineBasicBlock *GuardedRegsBlk = Func->CreateMachineBasicBlock(LLVMBlk); - MachineBasicBlock *TailBlk = Func->CreateMachineBasicBlock(LLVMBlk); + MachineBasicBlock *GuardedRegsBlk = Func->createMachineBasicBlock(LLVMBlk); + MachineBasicBlock *TailBlk = Func->createMachineBasicBlock(LLVMBlk); Func->insert(EntryBlkIter, GuardedRegsBlk); Func->insert(EntryBlkIter, TailBlk); diff --git a/llvm/lib/Target/X86/X86FlagsCopyLowering.cpp b/llvm/lib/Target/X86/X86FlagsCopyLowering.cpp --- a/llvm/lib/Target/X86/X86FlagsCopyLowering.cpp +++ b/llvm/lib/Target/X86/X86FlagsCopyLowering.cpp @@ -277,7 +277,7 @@ }) || MBB.getFallThrough() == &UnsplitSucc; - MachineBasicBlock &NewMBB = *MF.CreateMachineBasicBlock(); + MachineBasicBlock &NewMBB = *MF.createMachineBasicBlock(); // Insert the new block immediately after the current one. Any existing // fallthrough will be sunk into this new block anyways. diff --git a/llvm/lib/Target/X86/X86FloatingPoint.cpp b/llvm/lib/Target/X86/X86FloatingPoint.cpp --- a/llvm/lib/Target/X86/X86FloatingPoint.cpp +++ b/llvm/lib/Target/X86/X86FloatingPoint.cpp @@ -1442,7 +1442,7 @@ assert(UpdatedSlot < StackTop && Dest < 7); Stack[UpdatedSlot] = Dest; RegMap[Dest] = UpdatedSlot; - MBB->getParent()->DeleteMachineInstr(&MI); // Remove the old instruction + MBB->getParent()->deleteMachineInstr(&MI); // Remove the old instruction } /// handleCompareFP - Handle FUCOM and FUCOMI instructions, which have two FP diff --git a/llvm/lib/Target/X86/X86FrameLowering.cpp b/llvm/lib/Target/X86/X86FrameLowering.cpp --- a/llvm/lib/Target/X86/X86FrameLowering.cpp +++ b/llvm/lib/Target/X86/X86FrameLowering.cpp @@ -666,8 +666,8 @@ NumFrameLoopProbe++; const BasicBlock *LLVM_BB = MBB.getBasicBlock(); - MachineBasicBlock *testMBB = MF.CreateMachineBasicBlock(LLVM_BB); - MachineBasicBlock *tailMBB = MF.CreateMachineBasicBlock(LLVM_BB); + MachineBasicBlock *testMBB = MF.createMachineBasicBlock(LLVM_BB); + MachineBasicBlock *tailMBB = MF.createMachineBasicBlock(LLVM_BB); MachineFunction::iterator MBBIter = ++MBB.getIterator(); MF.insert(MBBIter, testMBB); @@ -776,9 +776,9 @@ // [rest of original MBB] // Set up the new basic blocks - MachineBasicBlock *RoundMBB = MF.CreateMachineBasicBlock(LLVM_BB); - MachineBasicBlock *LoopMBB = MF.CreateMachineBasicBlock(LLVM_BB); - MachineBasicBlock *ContinueMBB = MF.CreateMachineBasicBlock(LLVM_BB); + MachineBasicBlock *RoundMBB = MF.createMachineBasicBlock(LLVM_BB); + MachineBasicBlock *LoopMBB = MF.createMachineBasicBlock(LLVM_BB); + MachineBasicBlock *ContinueMBB = MF.createMachineBasicBlock(LLVM_BB); MachineFunction::iterator MBBIter = std::next(MBB.getIterator()); MF.insert(MBBIter, RoundMBB); @@ -1100,13 +1100,13 @@ { NumFrameLoopProbe++; MachineBasicBlock *entryMBB = - MF.CreateMachineBasicBlock(MBB.getBasicBlock()); + MF.createMachineBasicBlock(MBB.getBasicBlock()); MachineBasicBlock *headMBB = - MF.CreateMachineBasicBlock(MBB.getBasicBlock()); + MF.createMachineBasicBlock(MBB.getBasicBlock()); MachineBasicBlock *bodyMBB = - MF.CreateMachineBasicBlock(MBB.getBasicBlock()); + MF.createMachineBasicBlock(MBB.getBasicBlock()); MachineBasicBlock *footMBB = - MF.CreateMachineBasicBlock(MBB.getBasicBlock()); + MF.createMachineBasicBlock(MBB.getBasicBlock()); MachineFunction::iterator MBBIter = MBB.getIterator(); MF.insert(MBBIter, entryMBB); @@ -2807,8 +2807,8 @@ return; } - MachineBasicBlock *allocMBB = MF.CreateMachineBasicBlock(); - MachineBasicBlock *checkMBB = MF.CreateMachineBasicBlock(); + MachineBasicBlock *allocMBB = MF.createMachineBasicBlock(); + MachineBasicBlock *checkMBB = MF.createMachineBasicBlock(); X86MachineFunctionInfo *X86FI = MF.getInfo(); bool IsNested = false; @@ -3136,8 +3136,8 @@ // If the stack frame needed is larger than the guaranteed then runtime checks // and calls to "inc_stack_0" BIF should be inserted in the assembly prologue. if (MaxStack > Guaranteed) { - MachineBasicBlock *stackCheckMBB = MF.CreateMachineBasicBlock(); - MachineBasicBlock *incStackMBB = MF.CreateMachineBasicBlock(); + MachineBasicBlock *stackCheckMBB = MF.createMachineBasicBlock(); + MachineBasicBlock *incStackMBB = MF.createMachineBasicBlock(); for (const auto &LI : PrologueMBB.liveins()) { stackCheckMBB->addLiveIn(LI); diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp --- a/llvm/lib/Target/X86/X86ISelLowering.cpp +++ b/llvm/lib/Target/X86/X86ISelLowering.cpp @@ -33261,9 +33261,9 @@ MachineBasicBlock *thisMBB = MBB; MachineFunction *MF = MBB->getParent(); - MachineBasicBlock *mainMBB = MF->CreateMachineBasicBlock(BB); - MachineBasicBlock *fallMBB = MF->CreateMachineBasicBlock(BB); - MachineBasicBlock *sinkMBB = MF->CreateMachineBasicBlock(BB); + MachineBasicBlock *mainMBB = MF->createMachineBasicBlock(BB); + MachineBasicBlock *fallMBB = MF->createMachineBasicBlock(BB); + MachineBasicBlock *sinkMBB = MF->createMachineBasicBlock(BB); MF->insert(I, mainMBB); MF->insert(I, fallMBB); MF->insert(I, sinkMBB); @@ -33421,9 +33421,9 @@ OverflowDestReg = MRI.createVirtualRegister(AddrRegClass); const BasicBlock *LLVM_BB = MBB->getBasicBlock(); - overflowMBB = MF->CreateMachineBasicBlock(LLVM_BB); - offsetMBB = MF->CreateMachineBasicBlock(LLVM_BB); - endMBB = MF->CreateMachineBasicBlock(LLVM_BB); + overflowMBB = MF->createMachineBasicBlock(LLVM_BB); + offsetMBB = MF->createMachineBasicBlock(LLVM_BB); + endMBB = MF->createMachineBasicBlock(LLVM_BB); MachineFunction::iterator MBBIter = ++MBB->getIterator(); @@ -33790,9 +33790,9 @@ // EFLAGS is used by both, so mark it as live in the second. const BasicBlock *LLVM_BB = ThisMBB->getBasicBlock(); MachineFunction *F = ThisMBB->getParent(); - MachineBasicBlock *FirstInsertedMBB = F->CreateMachineBasicBlock(LLVM_BB); - MachineBasicBlock *SecondInsertedMBB = F->CreateMachineBasicBlock(LLVM_BB); - MachineBasicBlock *SinkMBB = F->CreateMachineBasicBlock(LLVM_BB); + MachineBasicBlock *FirstInsertedMBB = F->createMachineBasicBlock(LLVM_BB); + MachineBasicBlock *SecondInsertedMBB = F->createMachineBasicBlock(LLVM_BB); + MachineBasicBlock *SinkMBB = F->createMachineBasicBlock(LLVM_BB); MachineFunction::iterator It = ++ThisMBB->getIterator(); F->insert(It, FirstInsertedMBB); @@ -33951,8 +33951,8 @@ const BasicBlock *LLVM_BB = ThisMBB->getBasicBlock(); MachineFunction *F = ThisMBB->getParent(); - MachineBasicBlock *FalseMBB = F->CreateMachineBasicBlock(LLVM_BB); - MachineBasicBlock *SinkMBB = F->CreateMachineBasicBlock(LLVM_BB); + MachineBasicBlock *FalseMBB = F->createMachineBasicBlock(LLVM_BB); + MachineBasicBlock *SinkMBB = F->createMachineBasicBlock(LLVM_BB); MachineFunction::iterator It = ++ThisMBB->getIterator(); F->insert(It, FalseMBB); @@ -34028,9 +34028,9 @@ const unsigned ProbeSize = getStackProbeSize(*MF); MachineRegisterInfo &MRI = MF->getRegInfo(); - MachineBasicBlock *testMBB = MF->CreateMachineBasicBlock(LLVM_BB); - MachineBasicBlock *tailMBB = MF->CreateMachineBasicBlock(LLVM_BB); - MachineBasicBlock *blockMBB = MF->CreateMachineBasicBlock(LLVM_BB); + MachineBasicBlock *testMBB = MF->createMachineBasicBlock(LLVM_BB); + MachineBasicBlock *tailMBB = MF->createMachineBasicBlock(LLVM_BB); + MachineBasicBlock *blockMBB = MF->createMachineBasicBlock(LLVM_BB); MachineFunction::iterator MBBIter = ++MBB->getIterator(); MF->insert(MBBIter, testMBB); @@ -34142,9 +34142,9 @@ // [rest of original BB] // - MachineBasicBlock *mallocMBB = MF->CreateMachineBasicBlock(LLVM_BB); - MachineBasicBlock *bumpMBB = MF->CreateMachineBasicBlock(LLVM_BB); - MachineBasicBlock *continueMBB = MF->CreateMachineBasicBlock(LLVM_BB); + MachineBasicBlock *mallocMBB = MF->createMachineBasicBlock(LLVM_BB); + MachineBasicBlock *bumpMBB = MF->createMachineBasicBlock(LLVM_BB); + MachineBasicBlock *continueMBB = MF->createMachineBasicBlock(LLVM_BB); MachineRegisterInfo &MRI = MF->getRegInfo(); const TargetRegisterClass *AddrRegClass = @@ -34263,7 +34263,7 @@ // C++ EH creates a new target block to hold the restore code, and wires up // the new block to the return destination with a normal JMP_4. MachineBasicBlock *RestoreMBB = - MF->CreateMachineBasicBlock(BB->getBasicBlock()); + MF->createMachineBasicBlock(BB->getBasicBlock()); assert(BB->succ_size() == 1); MF->insert(std::next(BB->getIterator()), RestoreMBB); RestoreMBB->transferSuccessorsAndUpdatePHIs(BB); @@ -34609,9 +34609,9 @@ // v_restore = 1 MachineBasicBlock *thisMBB = MBB; - MachineBasicBlock *mainMBB = MF->CreateMachineBasicBlock(BB); - MachineBasicBlock *sinkMBB = MF->CreateMachineBasicBlock(BB); - MachineBasicBlock *restoreMBB = MF->CreateMachineBasicBlock(BB); + MachineBasicBlock *mainMBB = MF->createMachineBasicBlock(BB); + MachineBasicBlock *sinkMBB = MF->createMachineBasicBlock(BB); + MachineBasicBlock *restoreMBB = MF->createMachineBasicBlock(BB); MF->insert(I, mainMBB); MF->insert(I, sinkMBB); MF->push_back(restoreMBB); @@ -34760,12 +34760,12 @@ MachineFunction::iterator I = ++MBB->getIterator(); const BasicBlock *BB = MBB->getBasicBlock(); - MachineBasicBlock *checkSspMBB = MF->CreateMachineBasicBlock(BB); - MachineBasicBlock *fallMBB = MF->CreateMachineBasicBlock(BB); - MachineBasicBlock *fixShadowMBB = MF->CreateMachineBasicBlock(BB); - MachineBasicBlock *fixShadowLoopPrepareMBB = MF->CreateMachineBasicBlock(BB); - MachineBasicBlock *fixShadowLoopMBB = MF->CreateMachineBasicBlock(BB); - MachineBasicBlock *sinkMBB = MF->CreateMachineBasicBlock(BB); + MachineBasicBlock *checkSspMBB = MF->createMachineBasicBlock(BB); + MachineBasicBlock *fallMBB = MF->createMachineBasicBlock(BB); + MachineBasicBlock *fixShadowMBB = MF->createMachineBasicBlock(BB); + MachineBasicBlock *fixShadowLoopPrepareMBB = MF->createMachineBasicBlock(BB); + MachineBasicBlock *fixShadowLoopMBB = MF->createMachineBasicBlock(BB); + MachineBasicBlock *sinkMBB = MF->createMachineBasicBlock(BB); MF->insert(I, checkSspMBB); MF->insert(I, fallMBB); MF->insert(I, fixShadowMBB); @@ -35086,14 +35086,14 @@ // Create the MBBs for the dispatch code. // Shove the dispatch's address into the return slot in the function context. - MachineBasicBlock *DispatchBB = MF->CreateMachineBasicBlock(); + MachineBasicBlock *DispatchBB = MF->createMachineBasicBlock(); DispatchBB->setIsEHPad(true); - MachineBasicBlock *TrapBB = MF->CreateMachineBasicBlock(); + MachineBasicBlock *TrapBB = MF->createMachineBasicBlock(); BuildMI(TrapBB, DL, TII->get(X86::TRAP)); DispatchBB->addSuccessor(TrapBB); - MachineBasicBlock *DispContBB = MF->CreateMachineBasicBlock(); + MachineBasicBlock *DispContBB = MF->createMachineBasicBlock(); DispatchBB->addSuccessor(DispContBB); // Insert MBBs. diff --git a/llvm/lib/Target/X86/X86IndirectThunks.cpp b/llvm/lib/Target/X86/X86IndirectThunks.cpp --- a/llvm/lib/Target/X86/X86IndirectThunks.cpp +++ b/llvm/lib/Target/X86/X86IndirectThunks.cpp @@ -204,9 +204,9 @@ Entry->clear(); MachineBasicBlock *CaptureSpec = - MF.CreateMachineBasicBlock(Entry->getBasicBlock()); + MF.createMachineBasicBlock(Entry->getBasicBlock()); MachineBasicBlock *CallTarget = - MF.CreateMachineBasicBlock(Entry->getBasicBlock()); + MF.createMachineBasicBlock(Entry->getBasicBlock()); MCSymbol *TargetSym = MF.getContext().createTempSymbol(); MF.push_back(CaptureSpec); MF.push_back(CallTarget); diff --git a/llvm/lib/Target/X86/X86InsertPrefetch.cpp b/llvm/lib/Target/X86/X86InsertPrefetch.cpp --- a/llvm/lib/Target/X86/X86InsertPrefetch.cpp +++ b/llvm/lib/Target/X86/X86InsertPrefetch.cpp @@ -211,7 +211,7 @@ int64_t Delta = PrefInfo.Delta; const MCInstrDesc &Desc = TII->get(PFetchInstrID); MachineInstr *PFetch = - MF.CreateMachineInstr(Desc, Current->getDebugLoc(), true); + MF.createMachineInstr(Desc, Current->getDebugLoc(), true); MachineInstrBuilder MIB(MF, PFetch); static_assert(X86::AddrBaseReg == 0 && X86::AddrScaleAmt == 1 && diff --git a/llvm/lib/Target/X86/X86InstrInfo.cpp b/llvm/lib/Target/X86/X86InstrInfo.cpp --- a/llvm/lib/Target/X86/X86InstrInfo.cpp +++ b/llvm/lib/Target/X86/X86InstrInfo.cpp @@ -1153,7 +1153,7 @@ .add(Orig.getOperand(0)) .addImm(Value); } else { - MachineInstr *MI = MBB.getParent()->CloneMachineInstr(&Orig); + MachineInstr *MI = MBB.getParent()->cloneMachineInstr(&Orig); MBB.insert(I, MI); } @@ -2084,7 +2084,7 @@ unsigned OpIdx2) const { auto cloneIfNew = [NewMI](MachineInstr &MI) -> MachineInstr & { if (NewMI) - return *MI.getParent()->getParent()->CloneMachineInstr(&MI); + return *MI.getParent()->getParent()->cloneMachineInstr(&MI); return MI; }; @@ -5665,7 +5665,7 @@ // Create the base instruction with the memory operand as the first part. // Omit the implicit operands, something BuildMI can't do. MachineInstr *NewMI = - MF.CreateMachineInstr(TII.get(Opcode), MI.getDebugLoc(), true); + MF.createMachineInstr(TII.get(Opcode), MI.getDebugLoc(), true); MachineInstrBuilder MIB(MF, NewMI); addOperands(MIB, MOs); @@ -5693,7 +5693,7 @@ int PtrOffset = 0) { // Omit the implicit operands, something BuildMI can't do. MachineInstr *NewMI = - MF.CreateMachineInstr(TII.get(Opcode), MI.getDebugLoc(), true); + MF.createMachineInstr(TII.get(Opcode), MI.getDebugLoc(), true); MachineInstrBuilder MIB(MF, NewMI); for (unsigned i = 0, e = MI.getNumOperands(); i != e; ++i) { @@ -6697,7 +6697,7 @@ } // Emit the data processing instruction. - MachineInstr *DataMI = MF.CreateMachineInstr(MCID, MI.getDebugLoc(), true); + MachineInstr *DataMI = MF.createMachineInstr(MCID, MI.getDebugLoc(), true); MachineInstrBuilder MIB(MF, DataMI); if (FoldedStore) diff --git a/llvm/lib/Target/X86/X86SpeculativeLoadHardening.cpp b/llvm/lib/Target/X86/X86SpeculativeLoadHardening.cpp --- a/llvm/lib/Target/X86/X86SpeculativeLoadHardening.cpp +++ b/llvm/lib/Target/X86/X86SpeculativeLoadHardening.cpp @@ -229,7 +229,7 @@ MachineFunction &MF = *MBB.getParent(); - MachineBasicBlock &NewMBB = *MF.CreateMachineBasicBlock(); + MachineBasicBlock &NewMBB = *MF.createMachineBasicBlock(); // We have to insert the new block immediately after the current one as we // don't know what layout-successor relationships the successor has and we diff --git a/llvm/lib/Target/XCore/XCoreISelLowering.cpp b/llvm/lib/Target/XCore/XCoreISelLowering.cpp --- a/llvm/lib/Target/XCore/XCoreISelLowering.cpp +++ b/llvm/lib/Target/XCore/XCoreISelLowering.cpp @@ -1542,8 +1542,8 @@ // fallthrough --> copy0MBB MachineBasicBlock *thisMBB = BB; MachineFunction *F = BB->getParent(); - MachineBasicBlock *copy0MBB = F->CreateMachineBasicBlock(LLVM_BB); - MachineBasicBlock *sinkMBB = F->CreateMachineBasicBlock(LLVM_BB); + MachineBasicBlock *copy0MBB = F->createMachineBasicBlock(LLVM_BB); + MachineBasicBlock *sinkMBB = F->createMachineBasicBlock(LLVM_BB); F->insert(It, copy0MBB); F->insert(It, sinkMBB); diff --git a/llvm/tools/llvm-exegesis/lib/Assembler.cpp b/llvm/tools/llvm-exegesis/lib/Assembler.cpp --- a/llvm/tools/llvm-exegesis/lib/Assembler.cpp +++ b/llvm/tools/llvm-exegesis/lib/Assembler.cpp @@ -143,7 +143,7 @@ RegistersSetUp(std::move(RegistersSetUp)) {} BasicBlockFiller FunctionFiller::addBasicBlock() { - MachineBasicBlock *MBB = MF.CreateMachineBasicBlock(); + MachineBasicBlock *MBB = MF.createMachineBasicBlock(); MF.push_back(MBB); return BasicBlockFiller(MF, MBB, MCII); } diff --git a/llvm/tools/llvm-reduce/ReducerWorkItem.cpp b/llvm/tools/llvm-reduce/ReducerWorkItem.cpp --- a/llvm/tools/llvm-reduce/ReducerWorkItem.cpp +++ b/llvm/tools/llvm-reduce/ReducerWorkItem.cpp @@ -48,7 +48,7 @@ // Clone blocks. for (auto &SrcMBB : *SrcMF) - Src2DstMBB[&SrcMBB] = DstMF->CreateMachineBasicBlock(); + Src2DstMBB[&SrcMBB] = DstMF->createMachineBasicBlock(); // Link blocks. for (auto &SrcMBB : *SrcMF) { auto *DstMBB = Src2DstMBB[&SrcMBB]; @@ -68,7 +68,7 @@ for (auto &SrcMI : SrcMBB) { const auto &MCID = DstMF->getSubtarget().getInstrInfo()->get(SrcMI.getOpcode()); - auto *DstMI = DstMF->CreateMachineInstr(MCID, SrcMI.getDebugLoc(), + auto *DstMI = DstMF->createMachineInstr(MCID, SrcMI.getDebugLoc(), /*NoImplicit=*/true); DstMBB->push_back(DstMI); for (auto &SrcMO : SrcMI.operands()) { diff --git a/llvm/unittests/CodeGen/GlobalISel/LegalizerHelperTest.cpp b/llvm/unittests/CodeGen/GlobalISel/LegalizerHelperTest.cpp --- a/llvm/unittests/CodeGen/GlobalISel/LegalizerHelperTest.cpp +++ b/llvm/unittests/CodeGen/GlobalISel/LegalizerHelperTest.cpp @@ -1461,8 +1461,8 @@ LegalizerHelper Helper(*MF, LI, Observer, B); B.setMBB(*EntryMBB); - MachineBasicBlock *MidMBB = MF->CreateMachineBasicBlock(); - MachineBasicBlock *EndMBB = MF->CreateMachineBasicBlock(); + MachineBasicBlock *MidMBB = MF->createMachineBasicBlock(); + MachineBasicBlock *EndMBB = MF->createMachineBasicBlock(); MF->insert(MF->end(), MidMBB); MF->insert(MF->end(), EndMBB); diff --git a/llvm/unittests/CodeGen/InstrRefLDVTest.cpp b/llvm/unittests/CodeGen/InstrRefLDVTest.cpp --- a/llvm/unittests/CodeGen/InstrRefLDVTest.cpp +++ b/llvm/unittests/CodeGen/InstrRefLDVTest.cpp @@ -222,9 +222,9 @@ auto *BB0 = BasicBlock::Create(Ctx, "entry", &F); IRBuilder<> IRB(BB0); IRB.CreateRetVoid(); - MBB0 = MF->CreateMachineBasicBlock(BB0); + MBB0 = MF->createMachineBasicBlock(BB0); MF->insert(MF->end(), MBB0); - MF->RenumberBlocks(); + MF->renumberBlocks(); setupLDVObj(&*MF); } @@ -245,19 +245,19 @@ IRB1.CreateBr(BB2); IRB2.CreateBr(BB3); IRB3.CreateRetVoid(); - MBB0 = MF->CreateMachineBasicBlock(BB0); + MBB0 = MF->createMachineBasicBlock(BB0); MF->insert(MF->end(), MBB0); - MBB1 = MF->CreateMachineBasicBlock(BB1); + MBB1 = MF->createMachineBasicBlock(BB1); MF->insert(MF->end(), MBB1); - MBB2 = MF->CreateMachineBasicBlock(BB2); + MBB2 = MF->createMachineBasicBlock(BB2); MF->insert(MF->end(), MBB2); - MBB3 = MF->CreateMachineBasicBlock(BB3); + MBB3 = MF->createMachineBasicBlock(BB3); MF->insert(MF->end(), MBB3); MBB0->addSuccessor(MBB1); MBB0->addSuccessor(MBB2); MBB1->addSuccessor(MBB3); MBB2->addSuccessor(MBB3); - MF->RenumberBlocks(); + MF->renumberBlocks(); setupLDVObj(&*MF); } @@ -278,16 +278,16 @@ IRB0.CreateBr(BB1); IRB1.CreateBr(BB2); IRB2.CreateRetVoid(); - MBB0 = MF->CreateMachineBasicBlock(BB0); + MBB0 = MF->createMachineBasicBlock(BB0); MF->insert(MF->end(), MBB0); - MBB1 = MF->CreateMachineBasicBlock(BB1); + MBB1 = MF->createMachineBasicBlock(BB1); MF->insert(MF->end(), MBB1); - MBB2 = MF->CreateMachineBasicBlock(BB2); + MBB2 = MF->createMachineBasicBlock(BB2); MF->insert(MF->end(), MBB2); MBB0->addSuccessor(MBB1); MBB1->addSuccessor(MBB2); MBB1->addSuccessor(MBB1); - MF->RenumberBlocks(); + MF->renumberBlocks(); setupLDVObj(&*MF); } @@ -316,15 +316,15 @@ IRB2.CreateBr(BB3); IRB3.CreateBr(BB4); IRB4.CreateRetVoid(); - MBB0 = MF->CreateMachineBasicBlock(BB0); + MBB0 = MF->createMachineBasicBlock(BB0); MF->insert(MF->end(), MBB0); - MBB1 = MF->CreateMachineBasicBlock(BB1); + MBB1 = MF->createMachineBasicBlock(BB1); MF->insert(MF->end(), MBB1); - MBB2 = MF->CreateMachineBasicBlock(BB2); + MBB2 = MF->createMachineBasicBlock(BB2); MF->insert(MF->end(), MBB2); - MBB3 = MF->CreateMachineBasicBlock(BB3); + MBB3 = MF->createMachineBasicBlock(BB3); MF->insert(MF->end(), MBB3); - MBB4 = MF->CreateMachineBasicBlock(BB4); + MBB4 = MF->createMachineBasicBlock(BB4); MF->insert(MF->end(), MBB4); MBB0->addSuccessor(MBB1); MBB1->addSuccessor(MBB2); @@ -332,7 +332,7 @@ MBB2->addSuccessor(MBB3); MBB3->addSuccessor(MBB1); MBB3->addSuccessor(MBB4); - MF->RenumberBlocks(); + MF->renumberBlocks(); setupLDVObj(&*MF); } @@ -360,15 +360,15 @@ IRB2.CreateBr(BB3); IRB3.CreateBr(BB4); IRB4.CreateRetVoid(); - MBB0 = MF->CreateMachineBasicBlock(BB0); + MBB0 = MF->createMachineBasicBlock(BB0); MF->insert(MF->end(), MBB0); - MBB1 = MF->CreateMachineBasicBlock(BB1); + MBB1 = MF->createMachineBasicBlock(BB1); MF->insert(MF->end(), MBB1); - MBB2 = MF->CreateMachineBasicBlock(BB2); + MBB2 = MF->createMachineBasicBlock(BB2); MF->insert(MF->end(), MBB2); - MBB3 = MF->CreateMachineBasicBlock(BB3); + MBB3 = MF->createMachineBasicBlock(BB3); MF->insert(MF->end(), MBB3); - MBB4 = MF->CreateMachineBasicBlock(BB4); + MBB4 = MF->createMachineBasicBlock(BB4); MF->insert(MF->end(), MBB4); MBB0->addSuccessor(MBB1); MBB0->addSuccessor(MBB2); @@ -377,7 +377,7 @@ MBB3->addSuccessor(MBB1); MBB3->addSuccessor(MBB2); MBB3->addSuccessor(MBB4); - MF->RenumberBlocks(); + MF->renumberBlocks(); setupLDVObj(&*MF); } @@ -409,15 +409,15 @@ IRB2.CreateBr(BB3); IRB3.CreateBr(BB4); IRB4.CreateRetVoid(); - MBB0 = MF->CreateMachineBasicBlock(BB0); + MBB0 = MF->createMachineBasicBlock(BB0); MF->insert(MF->end(), MBB0); - MBB1 = MF->CreateMachineBasicBlock(BB1); + MBB1 = MF->createMachineBasicBlock(BB1); MF->insert(MF->end(), MBB1); - MBB2 = MF->CreateMachineBasicBlock(BB2); + MBB2 = MF->createMachineBasicBlock(BB2); MF->insert(MF->end(), MBB2); - MBB3 = MF->CreateMachineBasicBlock(BB3); + MBB3 = MF->createMachineBasicBlock(BB3); MF->insert(MF->end(), MBB3); - MBB4 = MF->CreateMachineBasicBlock(BB4); + MBB4 = MF->createMachineBasicBlock(BB4); MF->insert(MF->end(), MBB4); MBB0->addSuccessor(MBB1); MBB1->addSuccessor(MBB1); @@ -428,7 +428,7 @@ MBB3->addSuccessor(MBB2); MBB3->addSuccessor(MBB3); MBB3->addSuccessor(MBB4); - MF->RenumberBlocks(); + MF->renumberBlocks(); setupLDVObj(&*MF); } diff --git a/llvm/unittests/CodeGen/LexicalScopesTest.cpp b/llvm/unittests/CodeGen/LexicalScopesTest.cpp --- a/llvm/unittests/CodeGen/LexicalScopesTest.cpp +++ b/llvm/unittests/CodeGen/LexicalScopesTest.cpp @@ -82,13 +82,13 @@ IRB2.CreateBr(BB3); IRB3.CreateBr(BB4); IRB4.CreateRetVoid(); - MBB1 = MF->CreateMachineBasicBlock(BB1); + MBB1 = MF->createMachineBasicBlock(BB1); MF->insert(MF->end(), MBB1); - MBB2 = MF->CreateMachineBasicBlock(BB2); + MBB2 = MF->createMachineBasicBlock(BB2); MF->insert(MF->end(), MBB2); - MBB3 = MF->CreateMachineBasicBlock(BB3); + MBB3 = MF->createMachineBasicBlock(BB3); MF->insert(MF->end(), MBB3); - MBB4 = MF->CreateMachineBasicBlock(BB4); + MBB4 = MF->createMachineBasicBlock(BB4); MF->insert(MF->end(), MBB4); MBB1->addSuccessor(MBB2); MBB1->addSuccessor(MBB3); diff --git a/llvm/unittests/CodeGen/MachineInstrTest.cpp b/llvm/unittests/CodeGen/MachineInstrTest.cpp --- a/llvm/unittests/CodeGen/MachineInstrTest.cpp +++ b/llvm/unittests/CodeGen/MachineInstrTest.cpp @@ -61,11 +61,11 @@ unsigned VirtualDef2 = -43; unsigned VirtualUse = -44; - auto MI1 = MF->CreateMachineInstr(MCID, DebugLoc()); + auto MI1 = MF->createMachineInstr(MCID, DebugLoc()); MI1->addOperand(*MF, MachineOperand::CreateReg(VirtualDef1, /*isDef*/ true)); MI1->addOperand(*MF, MachineOperand::CreateReg(VirtualUse, /*isDef*/ false)); - auto MI2 = MF->CreateMachineInstr(MCID, DebugLoc()); + auto MI2 = MF->createMachineInstr(MCID, DebugLoc()); MI2->addOperand(*MF, MachineOperand::CreateReg(VirtualDef2, /*isDef*/ true)); MI2->addOperand(*MF, MachineOperand::CreateReg(VirtualUse, /*isDef*/ false)); @@ -81,11 +81,11 @@ // sentinel register. unsigned SentinelReg = 0; - auto MI3 = MF->CreateMachineInstr(MCID, DebugLoc()); + auto MI3 = MF->createMachineInstr(MCID, DebugLoc()); MI3->addOperand(*MF, MachineOperand::CreateReg(VirtualDef1, /*isDef*/ true)); MI3->addOperand(*MF, MachineOperand::CreateReg(SentinelReg, /*isDef*/ true)); - auto MI4 = MF->CreateMachineInstr(MCID, DebugLoc()); + auto MI4 = MF->createMachineInstr(MCID, DebugLoc()); MI4->addOperand(*MF, MachineOperand::CreateReg(VirtualDef2, /*isDef*/ true)); MI4->addOperand(*MF, MachineOperand::CreateReg(SentinelReg, /*isDef*/ false)); @@ -136,37 +136,37 @@ unsigned SentinelReg = 0; unsigned PhysicalReg = 45; - auto VD1VU = MF->CreateMachineInstr(MCID, DebugLoc()); + auto VD1VU = MF->createMachineInstr(MCID, DebugLoc()); VD1VU->addOperand(*MF, MachineOperand::CreateReg(VirtualDef1, /*isDef*/ true)); VD1VU->addOperand(*MF, MachineOperand::CreateReg(VirtualReg, /*isDef*/ false)); - auto VD2VU = MF->CreateMachineInstr(MCID, DebugLoc()); + auto VD2VU = MF->createMachineInstr(MCID, DebugLoc()); VD2VU->addOperand(*MF, MachineOperand::CreateReg(VirtualDef2, /*isDef*/ true)); VD2VU->addOperand(*MF, MachineOperand::CreateReg(VirtualReg, /*isDef*/ false)); - auto VD1SU = MF->CreateMachineInstr(MCID, DebugLoc()); + auto VD1SU = MF->createMachineInstr(MCID, DebugLoc()); VD1SU->addOperand(*MF, MachineOperand::CreateReg(VirtualDef1, /*isDef*/ true)); VD1SU->addOperand(*MF, MachineOperand::CreateReg(SentinelReg, /*isDef*/ false)); - auto VD1SD = MF->CreateMachineInstr(MCID, DebugLoc()); + auto VD1SD = MF->createMachineInstr(MCID, DebugLoc()); VD1SD->addOperand(*MF, MachineOperand::CreateReg(VirtualDef1, /*isDef*/ true)); VD1SD->addOperand(*MF, MachineOperand::CreateReg(SentinelReg, /*isDef*/ true)); - auto VD2PU = MF->CreateMachineInstr(MCID, DebugLoc()); + auto VD2PU = MF->createMachineInstr(MCID, DebugLoc()); VD2PU->addOperand(*MF, MachineOperand::CreateReg(VirtualDef2, /*isDef*/ true)); VD2PU->addOperand(*MF, MachineOperand::CreateReg(PhysicalReg, /*isDef*/ false)); - auto VD2PD = MF->CreateMachineInstr(MCID, DebugLoc()); + auto VD2PD = MF->createMachineInstr(MCID, DebugLoc()); VD2PD->addOperand(*MF, MachineOperand::CreateReg(VirtualDef2, /*isDef*/ true)); VD2PD->addOperand(*MF, @@ -207,7 +207,7 @@ DISubprogram::SPFlagZero, nullptr); DILocation *DIL = DILocation::get(Ctx, 1, 5, DIS); DebugLoc DL(DIL); - MachineInstr *MI = MF->CreateMachineInstr(MCID, DL); + MachineInstr *MI = MF->createMachineInstr(MCID, DL); MI->addOperand(*MF, MachineOperand::CreateReg(0, /*isDef*/ true)); std::string str; @@ -224,7 +224,7 @@ LLVMContext Ctx; Module Mod("Module", Ctx); auto MF = createMachineFunction(Ctx, Mod); - auto MBB = MF->CreateMachineBasicBlock(); + auto MBB = MF->createMachineBasicBlock(); MCInstrDesc MCID = {0, 0, 0, 0, 0, 0, 0, nullptr, nullptr, nullptr}; @@ -232,7 +232,7 @@ MachineInstrSpan MIS(MII, MBB); ASSERT_TRUE(MIS.empty()); - auto MI = MF->CreateMachineInstr(MCID, DebugLoc()); + auto MI = MF->createMachineInstr(MCID, DebugLoc()); MBB->insert(MII, MI); ASSERT_TRUE(std::distance(MIS.begin(), MII) == 1); } @@ -241,7 +241,7 @@ LLVMContext Ctx; Module Mod("Module", Ctx); auto MF = createMachineFunction(Ctx, Mod); - auto MBB = MF->CreateMachineBasicBlock(); + auto MBB = MF->createMachineBasicBlock(); MCInstrDesc MCID = {0, 0, 0, 0, 0, 0, 0, nullptr, nullptr, nullptr}; @@ -249,7 +249,7 @@ MachineInstrSpan MIS(MII, MBB); ASSERT_TRUE(MIS.empty()); - auto MI = MF->CreateMachineInstr(MCID, DebugLoc()); + auto MI = MF->createMachineInstr(MCID, DebugLoc()); MBB->insert(MII, MI); ASSERT_TRUE(std::distance(MIS.begin(), MII) == 1); } @@ -260,7 +260,7 @@ auto MF = createMachineFunction(Ctx, Mod); MCInstrDesc MCID = {0, 0, 0, 0, 0, 0, 0, nullptr, nullptr, nullptr}; - auto MI = MF->CreateMachineInstr(MCID, DebugLoc()); + auto MI = MF->createMachineInstr(MCID, DebugLoc()); auto MAI = MCAsmInfo(); auto MC = createMCContext(&MAI); auto MMO = MF->getMachineMemOperand(MachinePointerInfo(), @@ -307,7 +307,7 @@ auto MF = createMachineFunction(Ctx, Mod); MCInstrDesc MCID = {0, 0, 0, 0, 0, 0, 0, nullptr, nullptr, nullptr}; - auto MI = MF->CreateMachineInstr(MCID, DebugLoc()); + auto MI = MF->createMachineInstr(MCID, DebugLoc()); auto MAI = MCAsmInfo(); auto MC = createMCContext(&MAI); auto MMO = MF->getMachineMemOperand(MachinePointerInfo(), @@ -344,7 +344,7 @@ auto MF = createMachineFunction(Ctx, Mod); MCInstrDesc MCID = {0, 0, 0, 0, 0, 0, 0, nullptr, nullptr, nullptr}; - auto MI = MF->CreateMachineInstr(MCID, DebugLoc()); + auto MI = MF->createMachineInstr(MCID, DebugLoc()); auto MAI = MCAsmInfo(); auto MC = createMCContext(&MAI); auto MMO = MF->getMachineMemOperand(MachinePointerInfo(), @@ -401,7 +401,7 @@ 0, nullptr, nullptr, nullptr}; - auto *MI = MF->CreateMachineInstr(MCID, DebugLoc()); + auto *MI = MF->createMachineInstr(MCID, DebugLoc()); MI->addOperand(*MF, MachineOperand::CreateReg(0, /*isDef*/ false)); MI->addOperand(*MF, MachineOperand::CreateImm(0)); diff --git a/llvm/unittests/Target/AMDGPU/ExecMayBeModifiedBeforeAnyUse.cpp b/llvm/unittests/Target/AMDGPU/ExecMayBeModifiedBeforeAnyUse.cpp --- a/llvm/unittests/Target/AMDGPU/ExecMayBeModifiedBeforeAnyUse.cpp +++ b/llvm/unittests/Target/AMDGPU/ExecMayBeModifiedBeforeAnyUse.cpp @@ -41,7 +41,7 @@ MachineModuleInfo MMI(TM.get()); auto MF = std::make_unique(*F, *TM, ST, 42, MMI); - auto *BB = MF->CreateMachineBasicBlock(); + auto *BB = MF->createMachineBasicBlock(); MF->push_back(BB); auto E = BB->end();