Index: llvm/CODE_OWNERS.TXT
===================================================================
--- llvm/CODE_OWNERS.TXT
+++ llvm/CODE_OWNERS.TXT
@@ -248,3 +248,7 @@
N: Zi Xuan Wu (Zeson)
E: zixuan.wu@linux.alibaba.com
D: C-SKY backend (lib/Target/CSKY/*)
+
+N: Ilia Diachkov
+E: iliya.diyachkov@intel.com
+D: SPIR-V backend (lib/Target/SPIRV/*)
Index: llvm/docs/CompilerWriterInfo.rst
===================================================================
--- llvm/docs/CompilerWriterInfo.rst
+++ llvm/docs/CompilerWriterInfo.rst
@@ -193,6 +193,11 @@
* `CUDA Documentation <http://docs.nvidia.com/cuda/index.html>`_ includes the PTX
ISA and Driver API documentation
+SPIR-V
+======
+
+* `SPIR-V documentation <https://www.khronos.org/registry/SPIR-V/>`_
+
Miscellaneous Resources
=======================
Index: llvm/lib/Target/SPIRV/CMakeLists.txt
===================================================================
--- /dev/null
+++ llvm/lib/Target/SPIRV/CMakeLists.txt
@@ -0,0 +1,17 @@
+add_llvm_component_group(SPIRV)
+
+add_llvm_target(SPIRVCodeGen
+ SPIRVTargetMachine.cpp
+
+ LINK_COMPONENTS
+ CodeGen
+ Core
+ SPIRVInfo
+ Support
+ Target
+
+ ADD_TO_COMPONENT
+ SPIRV
+ )
+
+add_subdirectory(TargetInfo)
Index: llvm/lib/Target/SPIRV/SPIRVTargetMachine.h
===================================================================
--- /dev/null
+++ llvm/lib/Target/SPIRV/SPIRVTargetMachine.h
@@ -0,0 +1,37 @@
+//===-- SPIRVTargetMachine.h - Define TargetMachine for SPIR-V -*- C++ -*--===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===----------------------------------------------------------------------===//
+//
+// This file declares the SPIR-V specific subclass of TargetMachine.
+//
+//===----------------------------------------------------------------------===//
+
+#ifndef LLVM_LIB_TARGET_SPIRV_SPIRVTARGETMACHINE_H
+#define LLVM_LIB_TARGET_SPIRV_SPIRVTARGETMACHINE_H
+
+#include "llvm/IR/DataLayout.h"
+#include "llvm/Target/TargetMachine.h"
+
+namespace llvm {
+class SPIRVTargetMachine : public LLVMTargetMachine {
+ std::unique_ptr<TargetLoweringObjectFile> TLOF;
+
+public:
+ SPIRVTargetMachine(const Target &T, const Triple &TT, StringRef CPU,
+ StringRef FS, const TargetOptions &Options,
+ Optional<Reloc::Model> RM, Optional<CodeModel::Model> CM,
+ CodeGenOpt::Level OL, bool JIT);
+
+ TargetPassConfig *createPassConfig(PassManagerBase &PM) override;
+
+ TargetLoweringObjectFile *getObjFileLowering() const override {
+ return TLOF.get();
+ }
+};
+} // namespace llvm
+
+#endif
Index: llvm/lib/Target/SPIRV/SPIRVTargetMachine.cpp
===================================================================
--- /dev/null
+++ llvm/lib/Target/SPIRV/SPIRVTargetMachine.cpp
@@ -0,0 +1,72 @@
+//===- SPIRVTargetMachine.cpp - Define TargetMachine for SPIR-V -*- C++ -*-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===----------------------------------------------------------------------===//
+//
+// Implements the info about SPIR-V target spec.
+//
+//===----------------------------------------------------------------------===//
+
+#include "SPIRVTargetMachine.h"
+#include "TargetInfo/SPIRVTargetInfo.h"
+#include "llvm/CodeGen/TargetLoweringObjectFileImpl.h"
+#include "llvm/CodeGen/TargetPassConfig.h"
+#include "llvm/MC/TargetRegistry.h"
+
+using namespace llvm;
+
+extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeSPIRVTarget() {
+ // Register the target.
+ RegisterTargetMachine<SPIRVTargetMachine> X(getTheSPIRV32Target());
+ RegisterTargetMachine<SPIRVTargetMachine> Y(getTheSPIRV64Target());
+}
+
+static std::string computeDataLayout(const Triple &TT) {
+ std::string DataLayout = "e-m:e";
+
+ const auto Arch = TT.getArch();
+ if (Arch == Triple::spirv32)
+ DataLayout += "-p:32:32";
+ else if (Arch == Triple::spirv64)
+ DataLayout += "-p:64:64";
+ return DataLayout;
+}
+
+static Reloc::Model getEffectiveRelocModel(Optional<Reloc::Model> RM) {
+ if (!RM.hasValue())
+ return Reloc::PIC_;
+ return *RM;
+}
+
+SPIRVTargetMachine::SPIRVTargetMachine(const Target &T, const Triple &TT,
+ StringRef CPU, StringRef FS,
+ const TargetOptions &Options,
+ Optional<Reloc::Model> RM,
+ Optional<CodeModel::Model> CM,
+ CodeGenOpt::Level OL, bool JIT)
+ : LLVMTargetMachine(T, computeDataLayout(TT), TT, CPU, FS, Options,
+ getEffectiveRelocModel(RM),
+ getEffectiveCodeModel(CM, CodeModel::Small), OL),
+ TLOF(std::make_unique<TargetLoweringObjectFileELF>()) {
+ initAsmInfo();
+}
+
+namespace {
+// SPIR-V Code Generator Pass Configuration Options.
+class SPIRVPassConfig : public TargetPassConfig {
+public:
+ SPIRVPassConfig(SPIRVTargetMachine &TM, PassManagerBase &PM)
+ : TargetPassConfig(TM, PM) {}
+
+ SPIRVTargetMachine &getSPIRVTargetMachine() const {
+ return getTM<SPIRVTargetMachine>();
+ }
+};
+} // namespace
+
+TargetPassConfig *SPIRVTargetMachine::createPassConfig(PassManagerBase &PM) {
+ return new SPIRVPassConfig(*this, PM);
+}
Index: llvm/lib/Target/SPIRV/TargetInfo/CMakeLists.txt
===================================================================
--- /dev/null
+++ llvm/lib/Target/SPIRV/TargetInfo/CMakeLists.txt
@@ -0,0 +1,10 @@
+add_llvm_component_library(LLVMSPIRVInfo
+ SPIRVTargetInfo.cpp
+
+ LINK_COMPONENTS
+ MC
+ Support
+
+ ADD_TO_COMPONENT
+ SPIRV
+ )
Index: llvm/lib/Target/SPIRV/TargetInfo/SPIRVTargetInfo.h
===================================================================
--- /dev/null
+++ llvm/lib/Target/SPIRV/TargetInfo/SPIRVTargetInfo.h
@@ -0,0 +1,21 @@
+//===-- SPIRVTargetInfo.h - SPIRV Target Implementation ---------*- C++ -*-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===----------------------------------------------------------------------===//
+
+#ifndef LLVM_LIB_TARGET_SPIRV_TARGETINFO_SPIRVTARGETINFO_H
+#define LLVM_LIB_TARGET_SPIRV_TARGETINFO_SPIRVTARGETINFO_H
+
+namespace llvm {
+
+class Target;
+
+Target &getTheSPIRV32Target();
+Target &getTheSPIRV64Target();
+
+} // namespace llvm
+
+#endif // LLVM_LIB_TARGET_SPIRV_TARGETINFO_SPIRVTARGETINFO_H
Index: llvm/lib/Target/SPIRV/TargetInfo/SPIRVTargetInfo.cpp
===================================================================
--- /dev/null
+++ llvm/lib/Target/SPIRV/TargetInfo/SPIRVTargetInfo.cpp
@@ -0,0 +1,33 @@
+//===-- SPIRVTargetInfo.cpp - SPIR-V Target Implementation ----*- C++ -*---===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===----------------------------------------------------------------------===//
+
+#include "TargetInfo/SPIRVTargetInfo.h"
+#include "llvm/MC/TargetRegistry.h"
+
+using namespace llvm;
+
+Target &llvm::getTheSPIRV32Target() {
+ static Target TheSPIRV32Target;
+ return TheSPIRV32Target;
+}
+Target &llvm::getTheSPIRV64Target() {
+ static Target TheSPIRV64Target;
+ return TheSPIRV64Target;
+}
+
+extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeSPIRVTargetInfo() {
+ RegisterTarget<Triple::spirv32> X(getTheSPIRV32Target(), "spirv32",
+ "SPIR-V 32-bit", "SPIRV");
+ RegisterTarget<Triple::spirv64> Y(getTheSPIRV64Target(), "spirv64",
+ "SPIR-V 64-bit", "SPIRV");
+}
+
+// FIXME: Temporary stub - this function must be defined for linking
+// to succeed and will be called unconditionally by llc, so must be a no-op.
+// Remove once this function is properly implemented.
+extern "C" void LLVMInitializeSPIRVTargetMC() {}