Index: llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp
===================================================================
--- llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp
+++ llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp
@@ -275,6 +275,15 @@
   return MCDisassembler::Success;
 }
 
+static DecodeStatus decodeVTypeI(MCInst &Inst, uint64_t Imm, int64_t Address,
+                                 const void *Decoder) {
+  // The encoding LMUL=4 is reserved and could be used for something
+  // completely different in the future.
+  if ((Imm & 7) == 4)
+    return MCDisassembler::Fail;
+  return decodeUImmOperand<11>(Inst, Imm, Address, Decoder);
+}
+
 template <unsigned N>
 static DecodeStatus decodeUImmNonZeroOperand(MCInst &Inst, uint64_t Imm,
                                              int64_t Address,
Index: llvm/lib/Target/RISCV/RISCVInstrInfoV.td
===================================================================
--- llvm/lib/Target/RISCV/RISCVInstrInfoV.td
+++ llvm/lib/Target/RISCV/RISCVInstrInfoV.td
@@ -28,7 +28,7 @@
 def VTypeIOp : Operand<XLenVT> {
   let ParserMatchClass = VTypeIAsmOperand;
   let PrintMethod = "printVTypeI";
-  let DecoderMethod = "decodeUImmOperand<11>";
+  let DecoderMethod = "decodeVTypeI";
 }
 
 def VMaskAsmOperand : AsmOperandClass {
Index: llvm/test/tools/llvm-objdump/RISCV/vsetvli.s
===================================================================
--- /dev/null
+++ llvm/test/tools/llvm-objdump/RISCV/vsetvli.s
@@ -0,0 +1,16 @@
+# RUN: llvm-mc -filetype=obj -triple=riscv64 %s \
+# RUN:     | llvm-objdump -D --mattr=+experimental-v - | FileCheck %s
+
+# CHECK:      vsetvli a1, a0, e64, m1, tu, mu
+# CHECK-NEXT: <unknown>
+# CHECK-NEXT: vsetvli a1, a0, e64, mf8, tu, mu
+# CHECK-NEXT: vsetivli a1, 16, e8, m4, tu, mu
+# CHECK-NEXT: <unknown>
+# CHECK-NEXT: vsetivli a1, 16, e8, mf4, tu, mu
+
+.word 0x018575d7
+.word 0x01c575d7
+.word 0x01d575d7
+.word 0xc02875d7
+.word 0xc04875d7
+.word 0xc06875d7