Index: llvm/test/DebugInfo/X86/pr34545.ll
===================================================================
--- llvm/test/DebugInfo/X86/pr34545.ll
+++ llvm/test/DebugInfo/X86/pr34545.ll
@@ -1,12 +1,15 @@
-; RUN: llc -O1 -filetype=asm -mtriple x86_64-unknown-linux-gnu -mcpu=x86-64 -o - %s -stop-after=livedebugvars -experimental-debug-variable-locations=false | FileCheck %s
+; RUN: llc -O1 -filetype=asm -mtriple x86_64-unknown-linux-gnu -mcpu=x86-64 -o - %s -stop-after=livedebugvars -experimental-debug-variable-locations=true | FileCheck %s
 
-; CHECK: $eax = MOV32rm
+; CHECK: $eax = MOV32rm {{.*}} debug-instr-number 1
+; CHECK: DBG_INSTR_REF 1, 0
 ; CHECK: DBG_VALUE $eax
-; CHECK: $eax = SHL32rCL killed renamable $eax
+; CHECK: $eax = SHL32rCL killed renamable $eax, {{.*}} debug-instr-number 2
+; CHECK: DBG_INSTR_REF 2, 0
 ; CHECK: DBG_VALUE $eax
 ; CHECK: DBG_VALUE $rsp, 0, !{{[0-9]+}}, !DIExpression(DW_OP_constu, 4, DW_OP_minus)
 ; CHECK: DBG_VALUE $eax
-; CHECK: $eax = SHL32rCL killed renamable $eax
+; CHECK: $eax = SHL32rCL killed renamable $eax, {{.*}} debug-instr-number 3
+; CHECK: DBG_INSTR_REF 3, 0
 ; CHECK: DBG_VALUE $eax
 ; CHECK: RET64 $eax
 
@@ -28,7 +31,7 @@
   %shl2 = shl i32 %shl, %2
   tail call void @llvm.dbg.value(metadata i32 %shl2, metadata !18, metadata !DIExpression()), !dbg !20
   store i32 %shl2, i32* @var
-  ret i32 %shl2
+  ret i32 %shl2, !dbg !20
 }
 
 declare void @llvm.dbg.value(metadata, metadata, metadata)
Index: llvm/test/DebugInfo/X86/pr40427.ll
===================================================================
--- llvm/test/DebugInfo/X86/pr40427.ll
+++ llvm/test/DebugInfo/X86/pr40427.ll
@@ -1,4 +1,4 @@
-; RUN: llc -start-after=codegenprepare -stop-before=finalize-isel -o - < %s -experimental-debug-variable-locations=false | FileCheck %s
+; RUN: llc -start-after=codegenprepare -stop-before=finalize-isel -o - < %s -experimental-debug-variable-locations=true | FileCheck %s
 ; Test for correct placement of DBG_VALUE, which in PR40427 is placed before
 ; the load instruction it refers to. The circumstance replicated here is where
 ; two instructions in a row, trunc and add, begin with no-op Copy{To,From}Reg
@@ -19,9 +19,9 @@
 falseb:
   br label %block
 block:
-; CHECK:      [[PHIREG:%[0-9]+]]:gr64 = PHI %6, %bb.2, %4, %bb.1
-; CHECK-NEXT: [[LOADR:%[0-9]+]]:gr16 = MOV16rm %0
-; CHECK-NEXT: DBG_VALUE [[LOADR]], $noreg, ![[DBGVAR]]
+; CHECK:      PHI %6, %bb.2, %4, %bb.1
+; CHECK-NEXT: MOV16rm %0, {{.*}} debug-instr-number 1
+; CHECK-NEXT: DBG_INSTR_REF 1, 0, ![[DBGVAR]]
 ; CHECK-NEXT: %{{[0-9]+}}:gr32 = IMPLICIT_DEF
   %foo = phi i64 *[%bees, %trueb], [%more, %falseb]
   %forks = bitcast i64 *%foo to i32 *
Index: llvm/test/DebugInfo/X86/sdag-dangling-dbgvalue.ll
===================================================================
--- llvm/test/DebugInfo/X86/sdag-dangling-dbgvalue.ll
+++ llvm/test/DebugInfo/X86/sdag-dangling-dbgvalue.ll
@@ -1,4 +1,4 @@
-; RUN: llc %s -stop-before finalize-isel -o - -experimental-debug-variable-locations=false | FileCheck %s
+; RUN: llc %s -stop-before finalize-isel -o - -experimental-debug-variable-locations=true | FileCheck %s
 
 ;--------------------------------------------------------------------
 ; This test case is basically generated from the following C code.
@@ -66,8 +66,8 @@
 define i32 @test1() local_unnamed_addr #0 !dbg !17 {
 ; CHECK-LABEL: bb.0.entry1
 ; CHECK-NEXT:    DBG_VALUE 0, $noreg, ![[BAR1]], !DIExpression()
-; CHECK-NEXT:    [[REG1:%[0-9]+]]:gr64 =
-; CHECK-NEXT:    DBG_VALUE [[REG1]], $noreg, ![[FOO1]], !DIExpression()
+; CHECK-NEXT:    LEA64r {{.*}} debug-instr-number 1
+; CHECK-NEXT:    DBG_INSTR_REF 1, 0, ![[FOO1]], !DIExpression()
 entry1:
   call void @llvm.dbg.value(metadata %struct.SS* @S, metadata !20, metadata !DIExpression()), !dbg !23
   call void @llvm.dbg.value(metadata %struct.SS* null, metadata !22, metadata !DIExpression()), !dbg !24
@@ -77,9 +77,9 @@
 ; Verify that the def comes before the for foo2 and bar2.
 define i32 @test2() local_unnamed_addr #0 !dbg !26 {
 ; CHECK-LABEL: bb.0.entry2
-; CHECK-NEXT:    [[REG2:%[0-9]+]]:gr64 =
-; CHECK-NEXT:    DBG_VALUE [[REG2]], $noreg, ![[FOO2]], !DIExpression()
-; CHECK-NEXT:    DBG_VALUE [[REG2]], $noreg, ![[BAR2]], !DIExpression()
+; CHECK-NEXT:    LEA64r {{.*}} debug-instr-number 1
+; CHECK-NEXT:    DBG_INSTR_REF 1, 0, ![[FOO2]], !DIExpression()
+; CHECK-NEXT:    DBG_INSTR_REF 1, 0, ![[BAR2]], !DIExpression()
 entry2:
   call void @llvm.dbg.value(metadata %struct.SS* @S, metadata !28, metadata !DIExpression()), !dbg !30
   call void @llvm.dbg.value(metadata %struct.SS* @S, metadata !29, metadata !DIExpression()), !dbg !31
@@ -89,9 +89,9 @@
 ; Verify that the def comes before the for foo3 and bar3.
 define i32 @test3() local_unnamed_addr #0 !dbg !33 {
 ; CHECK-LABEL: bb.0.entry3
-; CHECK-NEXT:    [[REG3:%[0-9]+]]:gr64 =
-; CHECK-NEXT:    DBG_VALUE [[REG3]], $noreg, ![[BAR3]], !DIExpression()
-; CHECK-NEXT:    DBG_VALUE [[REG3]], $noreg, ![[FOO3]], !DIExpression()
+; CHECK-NEXT:    LEA64r {{.*}} debug-instr-number 1
+; CHECK-NEXT:    DBG_INSTR_REF 1, 0, ![[BAR3]], !DIExpression()
+; CHECK-NEXT:    DBG_INSTR_REF 1, 0, ![[FOO3]], !DIExpression()
 entry3:
   call void @llvm.dbg.value(metadata %struct.SS* @S, metadata !36, metadata !DIExpression()), !dbg !38
   call void @llvm.dbg.value(metadata %struct.SS* @S, metadata !35, metadata !DIExpression()), !dbg !37
@@ -103,8 +103,8 @@
 ; CHECK-LABEL: bb.0.entry4
 ; CHECK-NEXT:    DBG_VALUE $noreg, $noreg, ![[FOO4]], !DIExpression()
 ; CHECK-NEXT:    DBG_VALUE 0, $noreg, ![[FOO4]], !DIExpression()
-; CHECK-NEXT:    [[REG4:%[0-9]+]]:gr64 =
-; CHECK-NEXT:    DBG_VALUE [[REG4]], $noreg, ![[BAR4]], !DIExpression()
+; CHECK-NEXT:    LEA64r {{.*}} debug-instr-number 1
+; CHECK-NEXT:    DBG_INSTR_REF 1, 0, ![[BAR4]], !DIExpression()
 entry4:
   call void @llvm.dbg.value(metadata %struct.SS* @S, metadata !42, metadata !DIExpression()), !dbg !44
   call void @llvm.dbg.value(metadata %struct.SS* @S, metadata !43, metadata !DIExpression()), !dbg !45
@@ -117,9 +117,9 @@
 ; CHECK-LABEL: bb.0.entry5:
 ; CHECK-NEXT:    DBG_VALUE $noreg, $noreg, ![[FOO5]], !DIExpression()
 ; CHECK-NEXT:    DBG_VALUE 0, $noreg, ![[FOO5]], !DIExpression()
-; CHECK-NEXT:    [[REG5:%[0-9]+]]:gr64 =
-; CHECK-NEXT:    DBG_VALUE [[REG5]], $noreg, ![[BAR5]], !DIExpression()
-; CHECK-NOT:     DBG_VALUE [[REG5]], $noreg, ![[FOO5]], !DIExpression()
+; CHECK-NEXT:    LEA64r {{.*}} debug-instr-number 1
+; CHECK-NEXT:    DBG_INSTR_REF 1, 0, ![[BAR5]], !DIExpression()
+; CHECK-NOT:     DBG_{{.*}} ![[FOO5]], !DIExpression()
 ; CHECK:         RET
 entry5:
   call void @llvm.dbg.value(metadata %struct.SS* @S, metadata !49, metadata !DIExpression()), !dbg !51
Index: llvm/test/DebugInfo/X86/sdag-dbgvalue-phi-use-1.ll
===================================================================
--- llvm/test/DebugInfo/X86/sdag-dbgvalue-phi-use-1.ll
+++ llvm/test/DebugInfo/X86/sdag-dbgvalue-phi-use-1.ll
@@ -1,4 +1,4 @@
-; RUN: llc -start-after=codegenprepare -stop-before finalize-isel -o - %s -experimental-debug-variable-locations=false | FileCheck %s
+; RUN: llc -start-after=codegenprepare -stop-before finalize-isel -o - %s -experimental-debug-variable-locations=true | FileCheck %s
 
 ; This test case was generated from the following debug.c program,
 ; using: clang debug.c -g -O1 -S -o dbg_value_phi_isel1.ll -emit-llvm
@@ -48,8 +48,8 @@
 
 for.cond.cleanup:                                 ; preds = %for.body, %entry
 ; CHECK-LABEL: bb.{{.*}}.for.cond.cleanup:
-; CHECK:      [[REG1:%[0-9]+]]:gr32 = PHI
-; CHECK-NEXT: DBG_VALUE [[REG1]]
+; CHECK:      PHI {{.*}} debug-instr-number 7
+; CHECK-NEXT: DBG_INSTR_REF 7, 0
   %x.0.lcssa = phi i32 [ 9, %entry ], [ %add, %for.body ]
   call void @llvm.dbg.value(metadata i32 %x.0.lcssa, metadata !15, metadata !DIExpression()), !dbg !26
   %2 = bitcast [80 x i32]* %arr to i8*, !dbg !37
@@ -60,12 +60,12 @@
 
 for.body:                                         ; preds = %for.body.lr.ph, %for.body
 ; CHECK-LABEL: bb.{{.*}}.for.body:
-; CHECK:      [[REG2:%[0-9]+]]:gr32 = PHI
-; CHECK-NEXT: [[REG3:%[0-9]+]]:gr32 = PHI
-; CHECK-NEXT: [[REG4:%[0-9]+]]:gr32 = PHI
-; CHECK-NEXT: DBG_VALUE [[REG2]]
-; CHECK-NEXT: DBG_VALUE [[REG3]]
-; CHECK-NEXT: DBG_VALUE [[REG4]]
+; CHECK:      PHI {{.*}} debug-instr-number 3
+; CHECK-NEXT: PHI {{.*}} debug-instr-number 4
+; CHECK-NEXT: PHI {{.*}} debug-instr-number 5
+; CHECK-NEXT: DBG_INSTR_REF 3, 0
+; CHECK-NEXT: DBG_INSTR_REF 4, 0
+; CHECK-NEXT: DBG_INSTR_REF 5, 0
   %u.023 = phi i32 [ 0, %for.body.lr.ph ], [ %inc, %for.body ]
   %y.022 = phi i32 [ 13, %for.body.lr.ph ], [ %mul, %for.body ]
   %x.021 = phi i32 [ 9, %for.body.lr.ph ], [ %add, %for.body ]
Index: llvm/test/DebugInfo/X86/sdag-dbgvalue-phi-use-2.ll
===================================================================
--- llvm/test/DebugInfo/X86/sdag-dbgvalue-phi-use-2.ll
+++ llvm/test/DebugInfo/X86/sdag-dbgvalue-phi-use-2.ll
@@ -1,4 +1,4 @@
-; RUN: llc -start-after=codegenprepare -stop-before finalize-isel -o - %s -experimental-debug-variable-locations=false | FileCheck %s
+; RUN: llc -start-after=codegenprepare -stop-before finalize-isel -o - %s -experimental-debug-variable-locations=true | FileCheck %s
 
 ; This test case is a modified version of dbg_value_phi_isel1.ll
 ; where the llvm.dbg.value nodes in for.body has been moved.
@@ -27,8 +27,8 @@
 
 for.cond.cleanup:                                 ; preds = %for.body, %entry
 ; CHECK-LABEL: bb.{{.*}}.for.cond.cleanup:
-; CHECK:      [[REG1:%[0-9]+]]:gr32 = PHI
-; CHECK-NEXT: DBG_VALUE [[REG1]]
+; CHECK:      PHI {{.*}} debug-instr-number 7
+; CHECK-NEXT: DBG_INSTR_REF 7, 0
   %x.0.lcssa = phi i32 [ 9, %entry ], [ %add, %for.body ]
   call void @llvm.dbg.value(metadata i32 %x.0.lcssa, metadata !15, metadata !DIExpression()), !dbg !26
   %2 = bitcast [80 x i32]* %arr to i8*, !dbg !37
@@ -39,22 +39,22 @@
 
 for.body:                                         ; preds = %for.body.lr.ph, %for.body
 ; CHECK-LABEL: bb.{{.*}}.for.body:
-; CHECK:      [[REG2:%[0-9]+]]:gr32 = PHI
-; CHECK-NEXT: [[REG3:%[0-9]+]]:gr32 = PHI
-; CHECK-NEXT: [[REG4:%[0-9]+]]:gr32 = PHI
-; CHECK-NEXT: DBG_VALUE [[REG3]], $noreg, !16
+; CHECK:      PHI {{.*}} debug-instr-number 4
+; CHECK-NEXT: PHI {{.*}} debug-instr-number 3
+; CHECK-NEXT: PHI {{.*}} debug-instr-number 6
+; CHECK-NEXT: DBG_INSTR_REF 3, 0, !16
 ; CHECK-NEXT: DBG_VALUE 555, $noreg, !17
-; CHECK-NEXT: [[ADDREG:%[0-9]+]]:gr32 = nuw nsw ADD32rr
-; CHECK-NEXT: DBG_VALUE [[REG2]], $noreg, !17
-; CHECK:      [[MULREG:%[0-9]+]]:gr32 = LEA64_32r
+; CHECK-NEXT: nuw nsw ADD32rr {{.*}} debug-instr-number 5
+; CHECK-NEXT: DBG_INSTR_REF 4, 0, !17
+; CHECK:      LEA64_32r {{.*}} debug-instr-number 1
 ; CHECK-NEXT: DBG_VALUE 777, $noreg, !17
-; XXX: The following DBG_VALUE should have stayed below the INC32r
-; CHECK-NEXT: DBG_VALUE [[MULREG]], $noreg, !16
-; CHECK-NEXT: [[INCREG:%[0-9]+]]:gr32 = nuw nsw INC32r
-; CHECK-NEXT: DBG_VALUE [[INCREG]], $noreg, !17
-; CHECK-NEXT: DBG_VALUE [[ADDREG]], $noreg, !15
+; XXX: The following DBG_INSTR_REF should have stayed below the INC32r
+; CHECK-NEXT: DBG_INSTR_REF 1, 0, !16
+; CHECK-NEXT: nuw nsw INC32r {{.*}} debug-instr-number 2
+; CHECK-NEXT: DBG_INSTR_REF 2, 0, !17
+; CHECK-NEXT: DBG_INSTR_REF 5, 0, !15
 ; CHECK-NEXT: implicit-def $eflags,
-; CHECK-NEXT: DBG_VALUE [[REG4]]
+; CHECK-NEXT: DBG_INSTR_REF 6, 0
   %u.023 = phi i32 [ 0, %for.body.lr.ph ], [ %inc, %for.body ]
   %y.022 = phi i32 [ 13, %for.body.lr.ph ], [ %mul, %for.body ]
   %x.021 = phi i32 [ 9, %for.body.lr.ph ], [ %add, %for.body ]
Index: llvm/test/DebugInfo/X86/sdag-dbgvalue-phi-use-3.ll
===================================================================
--- llvm/test/DebugInfo/X86/sdag-dbgvalue-phi-use-3.ll
+++ llvm/test/DebugInfo/X86/sdag-dbgvalue-phi-use-3.ll
@@ -1,4 +1,4 @@
-; RUN: llc -start-after=codegenprepare -stop-before finalize-isel -o - %s -experimental-debug-variable-locations=false | FileCheck %s
+; RUN: llc -start-after=codegenprepare -stop-before finalize-isel -o - %s -experimental-debug-variable-locations=true | FileCheck %s
 
 ; This test case was generated from the following phi-split.c program,
 ; using: clang phi-split.c -g -O1 -S -o - --target=i386 -emit-llvm
@@ -59,18 +59,18 @@
 
 for.body:                                         ; preds = %for.body.lr.ph, %for.body
 ; CHECK-LABEL: bb.{{.*}}.for.body:
-; CHECK:      [[REG2:%[0-9]+]]:gr32 = PHI
-; CHECK-NEXT: [[REG3:%[0-9]+]]:gr32 = PHI
-; CHECK-NEXT: [[REG4:%[0-9]+]]:gr32 = PHI
-; CHECK-NEXT: [[REG5:%[0-9]+]]:gr32_nosp = PHI
-; CHECK-NEXT: [[REG6:%[0-9]+]]:gr32 = PHI
-; CHECK-NEXT: [[REG7:%[0-9]+]]:gr32 = PHI
-; CHECK-NEXT: DBG_VALUE [[REG2]], $noreg, !19, !DIExpression(DW_OP_LLVM_fragment, 0, 32)
-; CHECK-NEXT: DBG_VALUE [[REG3]], $noreg, !19, !DIExpression(DW_OP_LLVM_fragment, 32, 32)
-; CHECK-NEXT: DBG_VALUE [[REG4]], $noreg, !18, !DIExpression(DW_OP_LLVM_fragment, 0, 32)
-; CHECK-NEXT: DBG_VALUE [[REG5]], $noreg, !18, !DIExpression(DW_OP_LLVM_fragment, 32, 32)
-; CHECK-NEXT: DBG_VALUE [[REG6]], $noreg, !17, !DIExpression(DW_OP_LLVM_fragment, 0, 32)
-; CHECK-NEXT: DBG_VALUE [[REG7]], $noreg, !17, !DIExpression(DW_OP_LLVM_fragment, 32, 32)
+; CHECK:      [[REG2:%[0-9]+]]:gr32 = PHI {{.*}} debug-instr-number 5
+; CHECK-NEXT: [[REG3:%[0-9]+]]:gr32 = PHI {{.*}} debug-instr-number 6
+; CHECK-NEXT: [[REG4:%[0-9]+]]:gr32 = PHI {{.*}} debug-instr-number 7
+; CHECK-NEXT: [[REG5:%[0-9]+]]:gr32_nosp = PHI {{.*}} debug-instr-number 8
+; CHECK-NEXT: [[REG6:%[0-9]+]]:gr32 = PHI {{.*}} debug-instr-number 9
+; CHECK-NEXT: [[REG7:%[0-9]+]]:gr32 = PHI {{.*}} debug-instr-number 10
+; CHECK-NEXT: DBG_INSTR_REF 5, 0, !19, !DIExpression(DW_OP_LLVM_fragment, 0, 32)
+; CHECK-NEXT: DBG_INSTR_REF 6, 0, !19, !DIExpression(DW_OP_LLVM_fragment, 32, 32)
+; CHECK-NEXT: DBG_INSTR_REF 7, 0, !18, !DIExpression(DW_OP_LLVM_fragment, 0, 32)
+; CHECK-NEXT: DBG_INSTR_REF 8, 0, !18, !DIExpression(DW_OP_LLVM_fragment, 32, 32)
+; CHECK-NEXT: DBG_INSTR_REF 9, 0, !17, !DIExpression(DW_OP_LLVM_fragment, 0, 32)
+; CHECK-NEXT: DBG_INSTR_REF 10, 0, !17, !DIExpression(DW_OP_LLVM_fragment, 32, 32)
   %u.023 = phi i64 [ 0, %for.body.lr.ph ], [ %inc, %for.body ]
   %y.022 = phi i64 [ 13, %for.body.lr.ph ], [ %mul, %for.body ]
   %x.021 = phi i64 [ 9, %for.body.lr.ph ], [ %add, %for.body ]
Index: llvm/test/DebugInfo/X86/sdag-dbgvalue-phi-use-4.ll
===================================================================
--- llvm/test/DebugInfo/X86/sdag-dbgvalue-phi-use-4.ll
+++ llvm/test/DebugInfo/X86/sdag-dbgvalue-phi-use-4.ll
@@ -1,4 +1,4 @@
-; RUN: llc -start-after=codegenprepare -stop-before finalize-isel -o - %s -experimental-debug-variable-locations=false | FileCheck %s
+; RUN: llc -start-after=codegenprepare -stop-before finalize-isel -o - %s -experimental-debug-variable-locations=true | FileCheck %s
 
 ; This is a reproducer based on the test case from PR37321.
 
@@ -8,15 +8,15 @@
 ; fragment with just a few DBG_VALUE instructions).
 
 ; CHECK-LABEL: bb.{{.*}}.if.end36:
-; CHECK:      [[REG1:%[0-9]+]]:gr32 = PHI
-; CHECK-NEXT: [[REG2:%[0-9]+]]:gr32 = PHI
-; CHECK-NEXT: [[REG3:%[0-9]+]]:gr32 = PHI
-; CHECK-NEXT: DBG_VALUE [[REG1]], $noreg, !13, !DIExpression(DW_OP_LLVM_fragment, 0, 32)
-; CHECK-NEXT: DBG_VALUE [[REG2]], $noreg, !13, !DIExpression(DW_OP_LLVM_fragment, 32, 32)
-; CHECK-NEXT: DBG_VALUE [[REG3]], $noreg, !13, !DIExpression(DW_OP_LLVM_fragment, 64, 16)
-; CHECK-NEXT: DBG_VALUE [[REG1]], $noreg, !12, !DIExpression(DW_OP_LLVM_fragment, 10, 32)
-; CHECK-NEXT: DBG_VALUE [[REG2]], $noreg, !12, !DIExpression(DW_OP_LLVM_fragment, 42, 13)
-; CHECK-NOT:  DBG_VALUE
+; CHECK:      [[REG1:%[0-9]+]]:gr32 = PHI {{.*}} debug-instr-number 1
+; CHECK-NEXT: [[REG2:%[0-9]+]]:gr32 = PHI {{.*}} debug-instr-number 2
+; CHECK-NEXT: [[REG3:%[0-9]+]]:gr32 = PHI {{.*}} debug-instr-number 3
+; CHECK-NEXT: DBG_INSTR_REF 1, 0, !13, !DIExpression(DW_OP_LLVM_fragment, 0, 32)
+; CHECK-NEXT: DBG_INSTR_REF 2, 0, !13, !DIExpression(DW_OP_LLVM_fragment, 32, 32)
+; CHECK-NEXT: DBG_INSTR_REF 3, 0, !13, !DIExpression(DW_OP_LLVM_fragment, 64, 16)
+; CHECK-NEXT: DBG_INSTR_REF 1, 0, !12, !DIExpression(DW_OP_LLVM_fragment, 10, 32)
+; CHECK-NEXT: DBG_INSTR_REF 2, 0, !12, !DIExpression(DW_OP_LLVM_fragment, 42, 13)
+; CHECK-NOT:  DBG_
 
 target datalayout = "e-m:x-p:32:32-i64:64-f80:32-n8:16:32-a:0:32-S32"
 target triple = "i686-w64-windows-gnu"
Index: llvm/test/DebugInfo/X86/sdag-dbgvalue-ssareg.ll
===================================================================
--- llvm/test/DebugInfo/X86/sdag-dbgvalue-ssareg.ll
+++ llvm/test/DebugInfo/X86/sdag-dbgvalue-ssareg.ll
@@ -1,4 +1,4 @@
-; RUN: llc -start-after=codegenprepare -stop-before finalize-isel -o - %s -experimental-debug-variable-locations=false | FileCheck %s
+; RUN: llc -start-after=codegenprepare -stop-before finalize-isel -o - %s -experimental-debug-variable-locations=true | FileCheck %s
 
 ; Test that dbg.values of an SSA variable that's not used in a basic block,
 ; is converted to a DBG_VALUE in that same basic block. We know that %1 is
@@ -13,6 +13,8 @@
 ; Function Attrs: nounwind uwtable
 define dso_local i32 @main(i32 %arg0, i32 %arg1) local_unnamed_addr !dbg !11 {
 entry:
+; CHECK-LABEL: bb.0.entry:
+; CHECK: ADD32ri8 {{.*}} debug-instr-number 1
   %0 = add i32 %arg0, 42, !dbg !26
   %1 = add i32 %arg1, 101, !dbg !26
   %cmp = icmp eq i32 %1, 0
@@ -23,7 +25,7 @@
   %2 = mul i32 %0, %arg1, !dbg !26
 ; CHECK: IMUL32rr
   call void @llvm.dbg.value(metadata i32 %1, metadata !16, metadata !DIExpression()), !dbg !27
-; CHECK-NEXT: DBG_VALUE
+; CHECK-NEXT: DBG_INSTR_REF 1, 0
   br label %exit, !dbg !26
 
 ; CHECK-LABEL: bb.{{.*}}.exit
Index: llvm/test/DebugInfo/X86/sdag-ir-salvage.ll
===================================================================
--- llvm/test/DebugInfo/X86/sdag-ir-salvage.ll
+++ llvm/test/DebugInfo/X86/sdag-ir-salvage.ll
@@ -1,11 +1,13 @@
-; RUN: llc -mtriple=x86_64-unknown-unknown -start-after=codegenprepare -stop-before finalize-isel %s -o -  -experimental-debug-variable-locations=false | FileCheck %s
+; RUN: llc -mtriple=x86_64-unknown-unknown -start-after=codegenprepare -stop-before finalize-isel %s -o -  -experimental-debug-variable-locations=true | FileCheck %s
 
 ; Test that the dbg.value for %baz, which doesn't exist in the 'next' bb,
 ; can be salvaged back to the underlying argument vreg.
 
 ; CHECK:       ![[AAAVAR:.*]] = !DILocalVariable(name: "aaa",
+; CHECK-LABEL: bb.0.entry:
+; CHECK:       DBG_PHI $rdi, 1
 ; CHECK-LABEL: bb.1.next:
-; CHECK:       DBG_VALUE %{{[0-9]+}}, $noreg, ![[AAAVAR]]
+; CHECK:       DBG_INSTR_REF 1, 0, ![[AAAVAR]]
 
 target datalayout = "e-m:o-i64:64-f80:128-n8:16:32:64-S128"
 target triple = "x86_64-linux-gnu"
Index: llvm/test/DebugInfo/X86/sdag-salvage-add.ll
===================================================================
--- llvm/test/DebugInfo/X86/sdag-salvage-add.ll
+++ llvm/test/DebugInfo/X86/sdag-salvage-add.ll
@@ -1,4 +1,4 @@
-; RUN: llc -mtriple=x86_64-unknown-unknown -stop-before livedebugvalues %s -o - -experimental-debug-variable-locations=false \
+; RUN: llc -mtriple=x86_64-unknown-unknown -stop-before livedebugvalues %s -o - -experimental-debug-variable-locations=true \
 ; RUN:   | FileCheck %s
 ;
 ; Generated at -O1 from:
@@ -20,13 +20,15 @@
 ; }
 ;
 ; The debug info is attached to the ADD 4096 operation, which doesn't survive
-; instruction selection as it is folded into the load.
+; instruction selection as it is folded into the load. As a result, we should
+; refer to s4 and myVar with complex expressions.
 ;
 ; CHECK:   ![[S4:.*]] = !DILocalVariable(name: "s4", 
 ; CHECK:   ![[MYVAR:.*]] = !DILocalVariable(name: "myVar", 
-; CHECK:      DBG_VALUE $rax, $noreg, ![[MYVAR]],
+; CHECK:   $rax = MOV64rm {{.*}} debug-instr-number 2,
+; CHECK-NEXT: DBG_INSTR_REF 2, 0, ![[S4]],
 ; CHECK-SAME:           !DIExpression(DW_OP_plus_uconst, 4096, DW_OP_stack_value)
-; CHECK-NEXT: DBG_VALUE $rax, $noreg, ![[S4]],
+; CHECK:      DBG_INSTR_REF 2, 0, ![[MYVAR]],
 ; CHECK-SAME:           !DIExpression(DW_OP_plus_uconst, 4096, DW_OP_stack_value)
 ; CHECK-NEXT: $rdi = MOV64rm killed renamable $rax, 1, $noreg, 4096, $noreg,
 
Index: llvm/test/DebugInfo/X86/sdag-transfer-dbgvalue.ll
===================================================================
--- llvm/test/DebugInfo/X86/sdag-transfer-dbgvalue.ll
+++ llvm/test/DebugInfo/X86/sdag-transfer-dbgvalue.ll
@@ -1,4 +1,4 @@
-; RUN: llc -start-after=codegenprepare -stop-before finalize-isel -o - %s -experimental-debug-variable-locations=false | FileCheck %s
+; RUN: llc -start-after=codegenprepare -stop-before finalize-isel -o - %s -experimental-debug-variable-locations=true | FileCheck %s
 
 ; This tests that transferDbgValues() changes order of SDDbgValue transferred
 ; to another node and debug info for 'ADD32ri' appears *after* the instruction.
@@ -17,8 +17,8 @@
 target triple = "x86_64-unknown-linux-gnu"
 
 ; CHECK-LABEL: bb.0.entry:
-; CHECK:       %[[REG:[0-9]+]]:gr32 = ADD32ri %1, 512
-; CHECK-NEXT:  DBG_VALUE %[[REG]]
+; CHECK:       ADD32ri %1, 512, {{.*}}, debug-instr-number 1
+; CHECK-NEXT:  DBG_INSTR_REF 1, 0
 
 ; Function Attrs: nofree norecurse nounwind uwtable writeonly
 define dso_local i32 @foo(i32 %a, i32* nocapture %b) local_unnamed_addr !dbg !7 {