diff --git a/mlir/lib/Dialect/GPU/CMakeLists.txt b/mlir/lib/Dialect/GPU/CMakeLists.txt --- a/mlir/lib/Dialect/GPU/CMakeLists.txt +++ b/mlir/lib/Dialect/GPU/CMakeLists.txt @@ -13,6 +13,7 @@ AMDGPUCodeGen AMDGPUDesc AMDGPUInfo + target ) endif() diff --git a/mlir/lib/Dialect/GPU/Transforms/SerializeToHsaco.cpp b/mlir/lib/Dialect/GPU/Transforms/SerializeToHsaco.cpp --- a/mlir/lib/Dialect/GPU/Transforms/SerializeToHsaco.cpp +++ b/mlir/lib/Dialect/GPU/Transforms/SerializeToHsaco.cpp @@ -48,8 +48,7 @@ class SerializeToHsacoPass : public PassWrapper { public: - SerializeToHsacoPass(); - + SerializeToHsacoPass(StringRef triple, StringRef arch, StringRef features); StringRef getArgument() const override { return "gpu-to-hsaco"; } StringRef getDescription() const override { return "Lower GPU kernel function to HSACO binary annotations"; @@ -132,12 +131,11 @@ option = getValue(); } -SerializeToHsacoPass::SerializeToHsacoPass() { - maybeSetOption(this->triple, [] { return "amdgcn-amd-amdhsa"; }); - maybeSetOption(this->chip, [] { - static auto chip = getDefaultChip(); - return chip; - }); +SerializeToHsacoPass::SerializeToHsacoPass(StringRef triple, StringRef arch, + StringRef features) { + maybeSetOption(this->triple, [&triple] { return triple.str(); }); + maybeSetOption(this->chip, [&arch] { return arch.str(); }); + maybeSetOption(this->features, [&features] { return features.str(); }); } void SerializeToHsacoPass::getDependentDialects( @@ -281,7 +279,8 @@ LLVMInitializeAMDGPUTargetInfo(); LLVMInitializeAMDGPUTargetMC(); - return std::make_unique(); + return std::make_unique("amdgcn-amd-amdhsa", "", + ""); }); } #else // MLIR_GPU_TO_HSACO_PASS_ENABLE diff --git a/mlir/test/Integration/GPU/ROCM/gpu-to-hsaco.mlir b/mlir/test/Integration/GPU/ROCM/gpu-to-hsaco.mlir --- a/mlir/test/Integration/GPU/ROCM/gpu-to-hsaco.mlir +++ b/mlir/test/Integration/GPU/ROCM/gpu-to-hsaco.mlir @@ -1,6 +1,6 @@ // RUN: mlir-opt %s \ // RUN: -gpu-kernel-outlining \ -// RUN: -pass-pipeline='gpu.module(strip-debuginfo,convert-gpu-to-rocdl,gpu-to-hsaco)' \ +// RUN: -pass-pipeline='gpu.module(strip-debuginfo,convert-gpu-to-rocdl,gpu-to-hsaco{chip=%chip})' \ // RUN: -gpu-to-llvm \ // RUN: | mlir-cpu-runner \ // RUN: --shared-libs=%linalg_test_lib_dir/libmlir_rocm_runtime%shlibext \ diff --git a/mlir/test/Integration/GPU/ROCM/lit.local.cfg b/mlir/test/Integration/GPU/ROCM/lit.local.cfg --- a/mlir/test/Integration/GPU/ROCM/lit.local.cfg +++ b/mlir/test/Integration/GPU/ROCM/lit.local.cfg @@ -1,2 +1,23 @@ +import subprocess + if not config.enable_rocm_runner: config.unsupported = True + +# Need to specify the chip sub-option to the gpu-to-hsaco pass, and also check +# that we have a gpu at all. Use rocm_agent_enumerator to find the chip and +# use %chip to insert it, and if no chip is found, mark the test unsupported. +# Even though the tests here use mlir-cpu-runner, they still call mgpu +# functions. +config.chip = 'gfx000' +if config.rocm_path: + try: + p = subprocess.run([config.rocm_path + "/bin/rocm_agent_enumerator"], + check=True, stdout=subprocess.PIPE) + agents = [x for x in p.stdout.split() if x != b'gfx000'] + if agents: + config.chip = agents[0].decode('utf-8') + else: + config.unsupported = True + except subprocess.CalledProcessError: + config.unsupported = True +config.substitutions.append(('%chip', config.chip)) diff --git a/mlir/test/Integration/GPU/ROCM/two-modules.mlir b/mlir/test/Integration/GPU/ROCM/two-modules.mlir --- a/mlir/test/Integration/GPU/ROCM/two-modules.mlir +++ b/mlir/test/Integration/GPU/ROCM/two-modules.mlir @@ -1,6 +1,6 @@ // RUN: mlir-opt %s \ // RUN: -gpu-kernel-outlining \ -// RUN: -pass-pipeline='gpu.module(strip-debuginfo,convert-gpu-to-rocdl,gpu-to-hsaco)' \ +// RUN: -pass-pipeline='gpu.module(strip-debuginfo,convert-gpu-to-rocdl,gpu-to-hsaco{chip=%chip})' \ // RUN: -gpu-to-llvm \ // RUN: | mlir-cpu-runner \ // RUN: --shared-libs=%linalg_test_lib_dir/libmlir_rocm_runtime%shlibext \ diff --git a/mlir/test/Integration/GPU/ROCM/vecadd.mlir b/mlir/test/Integration/GPU/ROCM/vecadd.mlir --- a/mlir/test/Integration/GPU/ROCM/vecadd.mlir +++ b/mlir/test/Integration/GPU/ROCM/vecadd.mlir @@ -1,7 +1,7 @@ // RUN: mlir-opt %s \ // RUN: -convert-scf-to-std \ // RUN: -gpu-kernel-outlining \ -// RUN: -pass-pipeline='gpu.module(strip-debuginfo,convert-gpu-to-rocdl,gpu-to-hsaco)' \ +// RUN: -pass-pipeline='gpu.module(strip-debuginfo,convert-gpu-to-rocdl,gpu-to-hsaco{chip=%chip})' \ // RUN: -gpu-to-llvm \ // RUN: | mlir-cpu-runner \ // RUN: --shared-libs=%linalg_test_lib_dir/libmlir_rocm_runtime%shlibext \ diff --git a/mlir/test/Integration/GPU/ROCM/vector-transferops.mlir b/mlir/test/Integration/GPU/ROCM/vector-transferops.mlir --- a/mlir/test/Integration/GPU/ROCM/vector-transferops.mlir +++ b/mlir/test/Integration/GPU/ROCM/vector-transferops.mlir @@ -1,7 +1,7 @@ // RUN: mlir-opt %s \ // RUN: -convert-scf-to-std \ // RUN: -gpu-kernel-outlining \ -// RUN: -pass-pipeline='gpu.module(strip-debuginfo,convert-gpu-to-rocdl,gpu-to-hsaco)' \ +// RUN: -pass-pipeline='gpu.module(strip-debuginfo,convert-gpu-to-rocdl,gpu-to-hsaco{chip=%chip})' \ // RUN: -gpu-to-llvm \ // RUN: | mlir-cpu-runner \ // RUN: --shared-libs=%linalg_test_lib_dir/libmlir_rocm_runtime%shlibext \ diff --git a/mlir/test/lit.site.cfg.py.in b/mlir/test/lit.site.cfg.py.in --- a/mlir/test/lit.site.cfg.py.in +++ b/mlir/test/lit.site.cfg.py.in @@ -42,6 +42,7 @@ config.enable_cuda_runner = @MLIR_ENABLE_CUDA_RUNNER@ config.run_rocm_tests = @MLIR_ENABLE_ROCM_CONVERSIONS@ config.enable_rocm_runner = @MLIR_ENABLE_ROCM_RUNNER@ +config.rocm_path = "@ROCM_PATH@" config.spirv_wrapper_library_dir = "@MLIR_SPIRV_WRAPPER_LIBRARY_DIR@" config.enable_spirv_cpu_runner = @MLIR_ENABLE_SPIRV_CPU_RUNNER@ config.vulkan_wrapper_library_dir = "@MLIR_VULKAN_WRAPPER_LIBRARY_DIR@"