diff --git a/llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp b/llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp
--- a/llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp
+++ b/llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp
@@ -4095,12 +4095,12 @@
   // be found here:
   // https://software.intel.com/security-software-guidance/insights/deep-dive-load-value-injection#specialinstructions
   switch (Inst.getOpcode()) {
-  case X86::RETW:
-  case X86::RETL:
-  case X86::RETQ:
-  case X86::RETIL:
-  case X86::RETIQ:
-  case X86::RETIW: {
+  case X86::RET16:
+  case X86::RET32:
+  case X86::RET64:
+  case X86::RETI16:
+  case X86::RETI32:
+  case X86::RETI64: {
     MCInst ShlInst, FenceInst;
     bool Parse32 = is32BitMode() || Code16GCC;
     unsigned Basereg =
diff --git a/llvm/lib/Target/X86/X86ExpandPseudo.cpp b/llvm/lib/Target/X86/X86ExpandPseudo.cpp
--- a/llvm/lib/Target/X86/X86ExpandPseudo.cpp
+++ b/llvm/lib/Target/X86/X86ExpandPseudo.cpp
@@ -394,10 +394,10 @@
     MachineInstrBuilder MIB;
     if (StackAdj == 0) {
       MIB = BuildMI(MBB, MBBI, DL,
-                    TII->get(STI->is64Bit() ? X86::RETQ : X86::RETL));
+                    TII->get(STI->is64Bit() ? X86::RET64 : X86::RET32));
     } else if (isUInt<16>(StackAdj)) {
       MIB = BuildMI(MBB, MBBI, DL,
-                    TII->get(STI->is64Bit() ? X86::RETIQ : X86::RETIL))
+                    TII->get(STI->is64Bit() ? X86::RETI64 : X86::RETI32))
                 .addImm(StackAdj);
     } else {
       assert(!STI->is64Bit() &&
@@ -407,7 +407,7 @@
       BuildMI(MBB, MBBI, DL, TII->get(X86::POP32r)).addReg(X86::ECX, RegState::Define);
       X86FL->emitSPUpdate(MBB, MBBI, DL, StackAdj, /*InEpilogue=*/true);
       BuildMI(MBB, MBBI, DL, TII->get(X86::PUSH32r)).addReg(X86::ECX);
-      MIB = BuildMI(MBB, MBBI, DL, TII->get(X86::RETL));
+      MIB = BuildMI(MBB, MBBI, DL, TII->get(X86::RET32));
     }
     for (unsigned I = 1, E = MBBI->getNumOperands(); I != E; ++I)
       MIB.add(MBBI->getOperand(I));
diff --git a/llvm/lib/Target/X86/X86FastISel.cpp b/llvm/lib/Target/X86/X86FastISel.cpp
--- a/llvm/lib/Target/X86/X86FastISel.cpp
+++ b/llvm/lib/Target/X86/X86FastISel.cpp
@@ -1304,11 +1304,11 @@
   MachineInstrBuilder MIB;
   if (X86MFInfo->getBytesToPopOnReturn()) {
     MIB = BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc,
-                  TII.get(Subtarget->is64Bit() ? X86::RETIQ : X86::RETIL))
+                  TII.get(Subtarget->is64Bit() ? X86::RETI64 : X86::RETI32))
               .addImm(X86MFInfo->getBytesToPopOnReturn());
   } else {
     MIB = BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc,
-                  TII.get(Subtarget->is64Bit() ? X86::RETQ : X86::RETL));
+                  TII.get(Subtarget->is64Bit() ? X86::RET64 : X86::RET32));
   }
   for (unsigned i = 0, e = RetRegs.size(); i != e; ++i)
     MIB.addReg(RetRegs[i], RegState::Implicit);
diff --git a/llvm/lib/Target/X86/X86IndirectThunks.cpp b/llvm/lib/Target/X86/X86IndirectThunks.cpp
--- a/llvm/lib/Target/X86/X86IndirectThunks.cpp
+++ b/llvm/lib/Target/X86/X86IndirectThunks.cpp
@@ -212,7 +212,7 @@
   MF.push_back(CallTarget);
 
   const unsigned CallOpc = Is64Bit ? X86::CALL64pcrel32 : X86::CALLpcrel32;
-  const unsigned RetOpc = Is64Bit ? X86::RETQ : X86::RETL;
+  const unsigned RetOpc = Is64Bit ? X86::RET64 : X86::RET32;
 
   Entry->addLiveIn(ThunkReg);
   BuildMI(Entry, DebugLoc(), TII->get(CallOpc)).addSym(TargetSym);
diff --git a/llvm/lib/Target/X86/X86InstrControl.td b/llvm/lib/Target/X86/X86InstrControl.td
--- a/llvm/lib/Target/X86/X86InstrControl.td
+++ b/llvm/lib/Target/X86/X86InstrControl.td
@@ -20,30 +20,30 @@
 // ST1 arguments when returning values on the x87 stack.
 let isTerminator = 1, isReturn = 1, isBarrier = 1,
     hasCtrlDep = 1, FPForm = SpecialFP, SchedRW = [WriteJumpLd] in {
-  def RETL   : I   <0xC3, RawFrm, (outs), (ins variable_ops),
+  def RET32  : I   <0xC3, RawFrm, (outs), (ins variable_ops),
                     "ret{l}", []>, OpSize32, Requires<[Not64BitMode]>;
-  def RETQ   : I   <0xC3, RawFrm, (outs), (ins variable_ops),
+  def RET64  : I   <0xC3, RawFrm, (outs), (ins variable_ops),
                     "ret{q}", []>, OpSize32, Requires<[In64BitMode]>;
-  def RETW   : I   <0xC3, RawFrm, (outs), (ins),
+  def RET16  : I   <0xC3, RawFrm, (outs), (ins),
                     "ret{w}", []>, OpSize16;
-  def RETIL  : Ii16<0xC2, RawFrm, (outs), (ins i16imm:$amt, variable_ops),
+  def RETI32 : Ii16<0xC2, RawFrm, (outs), (ins i16imm:$amt, variable_ops),
                     "ret{l}\t$amt", []>, OpSize32, Requires<[Not64BitMode]>;
-  def RETIQ  : Ii16<0xC2, RawFrm, (outs), (ins i16imm:$amt, variable_ops),
+  def RETI64 : Ii16<0xC2, RawFrm, (outs), (ins i16imm:$amt, variable_ops),
                     "ret{q}\t$amt", []>, OpSize32, Requires<[In64BitMode]>;
-  def RETIW  : Ii16<0xC2, RawFrm, (outs), (ins i16imm:$amt),
+  def RETI16 : Ii16<0xC2, RawFrm, (outs), (ins i16imm:$amt),
                     "ret{w}\t$amt", []>, OpSize16;
-  def LRETL  : I   <0xCB, RawFrm, (outs), (ins),
+  def LRET32 : I   <0xCB, RawFrm, (outs), (ins),
                     "{l}ret{l|f}", []>, OpSize32;
-  def LRETQ  : RI  <0xCB, RawFrm, (outs), (ins),
+  def LRET64 : RI  <0xCB, RawFrm, (outs), (ins),
                     "{l}ret{|f}q", []>, Requires<[In64BitMode]>;
-  def LRETW  : I   <0xCB, RawFrm, (outs), (ins),
+  def LRET16 : I   <0xCB, RawFrm, (outs), (ins),
                     "{l}ret{w|f}", []>, OpSize16;
-  def LRETIL : Ii16<0xCA, RawFrm, (outs), (ins i16imm:$amt),
-                    "{l}ret{l|f}\t$amt", []>, OpSize32;
-  def LRETIQ : RIi16<0xCA, RawFrm, (outs), (ins i16imm:$amt),
-                    "{l}ret{|f}q\t$amt", []>, Requires<[In64BitMode]>;
-  def LRETIW : Ii16<0xCA, RawFrm, (outs), (ins i16imm:$amt),
-                    "{l}ret{w|f}\t$amt", []>, OpSize16;
+  def LRETI32 : Ii16<0xCA, RawFrm, (outs), (ins i16imm:$amt),
+                     "{l}ret{l|f}\t$amt", []>, OpSize32;
+  def LRETI64 : RIi16<0xCA, RawFrm, (outs), (ins i16imm:$amt),
+                      "{l}ret{|f}q\t$amt", []>, Requires<[In64BitMode]>;
+  def LRETI16 : Ii16<0xCA, RawFrm, (outs), (ins i16imm:$amt),
+                     "{l}ret{w|f}\t$amt", []>, OpSize16;
 
   // The machine return from interrupt instruction, but sometimes we need to
   // perform a post-epilogue stack adjustment. Codegen emits the pseudo form
diff --git a/llvm/lib/Target/X86/X86InstrInfo.cpp b/llvm/lib/Target/X86/X86InstrInfo.cpp
--- a/llvm/lib/Target/X86/X86InstrInfo.cpp
+++ b/llvm/lib/Target/X86/X86InstrInfo.cpp
@@ -82,7 +82,7 @@
                       (STI.isTarget64BitLP64() ? X86::ADJCALLSTACKUP64
                                                : X86::ADJCALLSTACKUP32),
                       X86::CATCHRET,
-                      (STI.is64Bit() ? X86::RETQ : X86::RETL)),
+                      (STI.is64Bit() ? X86::RET64 : X86::RET32)),
       Subtarget(STI), RI(STI.getTargetTriple()) {
 }
 
@@ -9363,7 +9363,7 @@
 
   // We're a normal call, so our sequence doesn't have a return instruction.
   // Add it in.
-  MachineInstr *retq = BuildMI(MF, DebugLoc(), get(X86::RETQ));
+  MachineInstr *retq = BuildMI(MF, DebugLoc(), get(X86::RET64));
   MBB.insert(MBB.end(), retq);
 }
 
diff --git a/llvm/lib/Target/X86/X86LoadValueInjectionRetHardening.cpp b/llvm/lib/Target/X86/X86LoadValueInjectionRetHardening.cpp
--- a/llvm/lib/Target/X86/X86LoadValueInjectionRetHardening.cpp
+++ b/llvm/lib/Target/X86/X86LoadValueInjectionRetHardening.cpp
@@ -76,7 +76,7 @@
   bool Modified = false;
   for (auto &MBB : MF) {
     for (auto MBBI = MBB.begin(); MBBI != MBB.end(); ++MBBI) {
-      if (MBBI->getOpcode() != X86::RETQ)
+      if (MBBI->getOpcode() != X86::RET64)
         continue;
 
       unsigned ClobberReg = TRI->findDeadCallerSavedReg(MBB, MBBI);
diff --git a/llvm/lib/Target/X86/X86MCInstLower.cpp b/llvm/lib/Target/X86/X86MCInstLower.cpp
--- a/llvm/lib/Target/X86/X86MCInstLower.cpp
+++ b/llvm/lib/Target/X86/X86MCInstLower.cpp
@@ -421,7 +421,7 @@
 }
 
 static unsigned getRetOpcode(const X86Subtarget &Subtarget) {
-  return Subtarget.is64Bit() ? X86::RETQ : X86::RETL;
+  return Subtarget.is64Bit() ? X86::RET64 : X86::RET32;
 }
 
 Optional<MCOperand>
diff --git a/llvm/lib/Target/X86/X86RegisterInfo.cpp b/llvm/lib/Target/X86/X86RegisterInfo.cpp
--- a/llvm/lib/Target/X86/X86RegisterInfo.cpp
+++ b/llvm/lib/Target/X86/X86RegisterInfo.cpp
@@ -816,10 +816,10 @@
     return 0;
   case TargetOpcode::PATCHABLE_RET:
   case X86::RET:
-  case X86::RETL:
-  case X86::RETQ:
-  case X86::RETIL:
-  case X86::RETIQ:
+  case X86::RET32:
+  case X86::RET64:
+  case X86::RETI32:
+  case X86::RETI64:
   case X86::TCRETURNdi:
   case X86::TCRETURNri:
   case X86::TCRETURNmi:
diff --git a/llvm/lib/Target/X86/X86SchedBroadwell.td b/llvm/lib/Target/X86/X86SchedBroadwell.td
--- a/llvm/lib/Target/X86/X86SchedBroadwell.td
+++ b/llvm/lib/Target/X86/X86SchedBroadwell.td
@@ -1110,7 +1110,7 @@
   let NumMicroOps = 3;
   let ResourceCycles = [1,1,1];
 }
-def: InstRW<[BWWriteResGroup84], (instrs LRETQ, RETQ)>;
+def: InstRW<[BWWriteResGroup84], (instrs LRET64, RET64)>;
 
 def BWWriteResGroup87 : SchedWriteRes<[BWPort4,BWPort23,BWPort237,BWPort06]> {
   let Latency = 7;
diff --git a/llvm/lib/Target/X86/X86SchedHaswell.td b/llvm/lib/Target/X86/X86SchedHaswell.td
--- a/llvm/lib/Target/X86/X86SchedHaswell.td
+++ b/llvm/lib/Target/X86/X86SchedHaswell.td
@@ -710,7 +710,7 @@
   let NumMicroOps = 4;
   let ResourceCycles = [1, 2, 1];
 }
-def : InstRW<[HWWriteRETI], (instregex "RETI(L|Q|W)", "LRETI(L|Q|W)")>;
+def : InstRW<[HWWriteRETI], (instregex "RETI(16|32|64)", "LRETI(16|32|64)")>;
 
 // BOUND.
 // r,m.
@@ -1188,7 +1188,7 @@
   let NumMicroOps = 3;
   let ResourceCycles = [1,1,1];
 }
-def: InstRW<[HWWriteResGroup41], (instrs LRETQ, RETL, RETQ)>;
+def: InstRW<[HWWriteResGroup41], (instrs LRET64, RET32, RET64)>;
 
 def HWWriteResGroup44 : SchedWriteRes<[HWPort4,HWPort6,HWPort237,HWPort0156]> {
   let Latency = 3;
diff --git a/llvm/lib/Target/X86/X86SchedIceLake.td b/llvm/lib/Target/X86/X86SchedIceLake.td
--- a/llvm/lib/Target/X86/X86SchedIceLake.td
+++ b/llvm/lib/Target/X86/X86SchedIceLake.td
@@ -1444,7 +1444,7 @@
   let NumMicroOps = 3;
   let ResourceCycles = [1,1,1];
 }
-def: InstRW<[ICXWriteResGroup104], (instrs LRETQ, RETQ)>;
+def: InstRW<[ICXWriteResGroup104], (instrs LRET64, RET64)>;
 
 def ICXWriteResGroup106 : SchedWriteRes<[ICXPort4,ICXPort5,ICXPort237]> {
   let Latency = 7;
diff --git a/llvm/lib/Target/X86/X86SchedSandyBridge.td b/llvm/lib/Target/X86/X86SchedSandyBridge.td
--- a/llvm/lib/Target/X86/X86SchedSandyBridge.td
+++ b/llvm/lib/Target/X86/X86SchedSandyBridge.td
@@ -606,7 +606,7 @@
 def: InstRW<[SBWriteResGroup2], (instrs FDECSTP, FINCSTP, FFREE, FFREEP, FNOP,
                                         LD_Frr, ST_Frr, ST_FPrr)>;
 def: InstRW<[SBWriteResGroup2], (instrs LOOP, LOOPE, LOOPNE)>; // FIXME: This seems wrong compared to other Intel CPUs.
-def: InstRW<[SBWriteResGroup2], (instrs RETQ)>;
+def: InstRW<[SBWriteResGroup2], (instrs RET64)>;
 
 def SBWriteResGroup4 : SchedWriteRes<[SBPort05]> {
   let Latency = 1;
diff --git a/llvm/lib/Target/X86/X86SchedSkylakeClient.td b/llvm/lib/Target/X86/X86SchedSkylakeClient.td
--- a/llvm/lib/Target/X86/X86SchedSkylakeClient.td
+++ b/llvm/lib/Target/X86/X86SchedSkylakeClient.td
@@ -1175,7 +1175,7 @@
   let NumMicroOps = 3;
   let ResourceCycles = [1,1,1];
 }
-def: InstRW<[SKLWriteResGroup98], (instrs LRETQ, RETQ)>;
+def: InstRW<[SKLWriteResGroup98], (instrs LRET64, RET64)>;
 
 def SKLWriteResGroup100 : SchedWriteRes<[SKLPort4,SKLPort23,SKLPort237,SKLPort06]> {
   let Latency = 7;
diff --git a/llvm/lib/Target/X86/X86SchedSkylakeServer.td b/llvm/lib/Target/X86/X86SchedSkylakeServer.td
--- a/llvm/lib/Target/X86/X86SchedSkylakeServer.td
+++ b/llvm/lib/Target/X86/X86SchedSkylakeServer.td
@@ -1436,7 +1436,7 @@
   let NumMicroOps = 3;
   let ResourceCycles = [1,1,1];
 }
-def: InstRW<[SKXWriteResGroup104], (instrs LRETQ, RETQ)>;
+def: InstRW<[SKXWriteResGroup104], (instrs LRET64, RET64)>;
 
 def SKXWriteResGroup106 : SchedWriteRes<[SKXPort4,SKXPort5,SKXPort237]> {
   let Latency = 7;
diff --git a/llvm/lib/Target/X86/X86ScheduleAtom.td b/llvm/lib/Target/X86/X86ScheduleAtom.td
--- a/llvm/lib/Target/X86/X86ScheduleAtom.td
+++ b/llvm/lib/Target/X86/X86ScheduleAtom.td
@@ -540,7 +540,7 @@
                                        PUSH16rmr, PUSH32rmr, PUSH64rmr,
                                        PUSH16i8, PUSH32i8, PUSH64i8, PUSH64i32,
                                        XCH_F)>;
-def : InstRW<[AtomWrite0_1_1], (instregex "RETI(L|Q|W)$",
+def : InstRW<[AtomWrite0_1_1], (instregex "RETI(16|32|64)$",
                                           "IRET(16|32|64)?")>;
 
 def AtomWrite0_1_5 : SchedWriteRes<[AtomPort0, AtomPort1]> {
@@ -819,8 +819,8 @@
   let Latency = 79;
   let ResourceCycles = [79];
 }
-def : InstRW<[AtomWrite01_79], (instregex "RET(L|Q|W)?$",
-                                          "LRETI?(L|Q|W)")>;
+def : InstRW<[AtomWrite01_79], (instregex "RET(16|32|64)?$",
+                                          "LRETI?(16|32|64)")>;
 
 def AtomWrite01_92 : SchedWriteRes<[AtomPort01]> {
   let Latency = 92;
diff --git a/llvm/lib/Target/X86/X86ScheduleZnver1.td b/llvm/lib/Target/X86/X86ScheduleZnver1.td
--- a/llvm/lib/Target/X86/X86ScheduleZnver1.td
+++ b/llvm/lib/Target/X86/X86ScheduleZnver1.td
@@ -697,7 +697,7 @@
 def ZnWriteRET : SchedWriteRes<[ZnALU03]> {
   let NumMicroOps = 2;
 }
-def : InstRW<[ZnWriteRET], (instregex "RET(L|Q|W)", "LRET(L|Q|W)",
+def : InstRW<[ZnWriteRET], (instregex "RET(16|32|64)", "LRET(16|32|64)",
                             "IRET(16|32|64)")>;
 
 //-- Logic instructions --//
diff --git a/llvm/lib/Target/X86/X86ScheduleZnver2.td b/llvm/lib/Target/X86/X86ScheduleZnver2.td
--- a/llvm/lib/Target/X86/X86ScheduleZnver2.td
+++ b/llvm/lib/Target/X86/X86ScheduleZnver2.td
@@ -697,7 +697,7 @@
 def Zn2WriteRET : SchedWriteRes<[Zn2ALU03]> {
   let NumMicroOps = 2;
 }
-def : InstRW<[Zn2WriteRET], (instregex "RET(L|Q|W)", "LRET(L|Q|W)",
+def : InstRW<[Zn2WriteRET], (instregex "RET(16|32|64)", "LRET(16|32|64)",
                             "IRET(16|32|64)")>;
 
 //-- Logic instructions --//
diff --git a/llvm/test/CodeGen/Generic/MIRDebugify/check-line-and-variables.mir b/llvm/test/CodeGen/Generic/MIRDebugify/check-line-and-variables.mir
--- a/llvm/test/CodeGen/Generic/MIRDebugify/check-line-and-variables.mir
+++ b/llvm/test/CodeGen/Generic/MIRDebugify/check-line-and-variables.mir
@@ -62,7 +62,7 @@
     MOV32mr $noreg, 1, $noreg, @ga, $noreg, killed %8 :: (store (s32) into @ga)
     %5:gr32 = MOV32rm %stack.2.c, 1, $noreg, 0, $noreg :: (load (s32) from %ir.c)
     $eax = COPY %5
-    RETQ implicit $eax
+    RET64 implicit $eax
 
     ;CHECK:      WARNING: Missing line 9
     ;CHECK-NEXT: Machine IR debug info check: FAIL
diff --git a/llvm/test/CodeGen/MIR/X86/auto-successor.mir b/llvm/test/CodeGen/MIR/X86/auto-successor.mir
--- a/llvm/test/CodeGen/MIR/X86/auto-successor.mir
+++ b/llvm/test/CodeGen/MIR/X86/auto-successor.mir
@@ -12,7 +12,7 @@
 # CHECK-NOT: successors
 # CHECK: JCC_1 %bb.1, 4, implicit undef $eflags
 # CHECK: bb.3:
-# CHECK: RETQ undef $eax
+# CHECK: RET64 undef $eax
 name: func0
 body: |
   bb.0:
@@ -28,7 +28,7 @@
     JCC_1 %bb.4, 4, implicit undef $eflags   ; condjump+fallthrough to same block
 
   bb.4:
-    RETQ undef $eax
+    RET64 undef $eax
 ...
 ---
 # Some cases that need explicit successors:
@@ -56,6 +56,6 @@
 
   bb.3:
     ; CHECK: bb.3:
-    ; CHECK: RETQ undef $eax
-    RETQ undef $eax
+    ; CHECK: RET64 undef $eax
+    RET64 undef $eax
 ...
diff --git a/llvm/test/CodeGen/MIR/X86/basic-block-liveins.mir b/llvm/test/CodeGen/MIR/X86/basic-block-liveins.mir
--- a/llvm/test/CodeGen/MIR/X86/basic-block-liveins.mir
+++ b/llvm/test/CodeGen/MIR/X86/basic-block-liveins.mir
@@ -31,7 +31,7 @@
     liveins: $edi, $esi
 
     $eax = LEA64_32r killed $rdi, 1, killed $rsi, 0, _
-    RETQ $eax
+    RET64 $eax
 ...
 ---
 name: test2
@@ -47,7 +47,7 @@
     liveins: $esi
 
     $eax = LEA64_32r killed $rdi, 1, killed $rsi, 0, _
-    RETQ $eax
+    RET64 $eax
 ...
 ---
 name: test3
@@ -61,5 +61,5 @@
     liveins:
 
     $eax = MOV32r0 implicit-def dead $eflags
-    RETQ killed $eax
+    RET64 killed $eax
 ...
diff --git a/llvm/test/CodeGen/MIR/X86/basic-block-not-at-start-of-line-error.mir b/llvm/test/CodeGen/MIR/X86/basic-block-not-at-start-of-line-error.mir
--- a/llvm/test/CodeGen/MIR/X86/basic-block-not-at-start-of-line-error.mir
+++ b/llvm/test/CodeGen/MIR/X86/basic-block-not-at-start-of-line-error.mir
@@ -31,11 +31,11 @@
   ; CHECK: [[@LINE+1]]:8: basic block definition should be located at the start of the line
   less bb.1:
     $eax = MOV32r0 implicit-def dead $eflags
-    RETQ killed $eax
+    RET64 killed $eax
 
   bb.2.exit:
     liveins: $edi
 
     $eax = COPY killed $edi
-    RETQ killed $eax
+    RET64 killed $eax
 ...
diff --git a/llvm/test/CodeGen/MIR/X86/block-address-operands.mir b/llvm/test/CodeGen/MIR/X86/block-address-operands.mir
--- a/llvm/test/CodeGen/MIR/X86/block-address-operands.mir
+++ b/llvm/test/CodeGen/MIR/X86/block-address-operands.mir
@@ -63,7 +63,7 @@
     JMP64m $rip, 1, _, @addr, _
 
   bb.1.block (address-taken):
-    RETQ
+    RET64
 ...
 ---
 name:            test2
@@ -77,7 +77,7 @@
     JMP64m $rip, 1, _, @addr, _
 
   bb.1 (address-taken):
-    RETQ
+    RET64
 ...
 ---
 name:            slot_in_other_function
@@ -89,7 +89,7 @@
   ; CHECK: $rax = LEA64r $rip, 1, $noreg, blockaddress(@test3, %ir-block.0), $noreg
     $rax = LEA64r $rip, 1, _, blockaddress(@test3, %ir-block.0), _
     MOV64mr killed $rdi, 1, _, 0, _, killed $rax
-    RETQ
+    RET64
 ...
 ---
 name:            test3
@@ -104,7 +104,7 @@
     JMP64m $rip, 1, _, @addr, _
 
   bb.1 (address-taken):
-    RETQ
+    RET64
 ...
 ---
 name:            test4
@@ -117,5 +117,5 @@
     JMP64m $rip, 1, _, @addr, _
 
   bb.1.block (address-taken):
-    RETQ
+    RET64
 ...
diff --git a/llvm/test/CodeGen/MIR/X86/branch-probabilities.mir b/llvm/test/CodeGen/MIR/X86/branch-probabilities.mir
--- a/llvm/test/CodeGen/MIR/X86/branch-probabilities.mir
+++ b/llvm/test/CodeGen/MIR/X86/branch-probabilities.mir
@@ -14,5 +14,5 @@
     NOOP
 
   bb.2:
-    RETQ undef $eax
+    RET64 undef $eax
 ...
diff --git a/llvm/test/CodeGen/MIR/X86/callee-saved-info.mir b/llvm/test/CodeGen/MIR/X86/callee-saved-info.mir
--- a/llvm/test/CodeGen/MIR/X86/callee-saved-info.mir
+++ b/llvm/test/CodeGen/MIR/X86/callee-saved-info.mir
@@ -39,7 +39,7 @@
     liveins: $edi
 
     $eax = COPY killed $edi
-    RETQ killed $eax
+    RET64 killed $eax
 ...
 ---
 name:            func
@@ -92,5 +92,5 @@
     $eax = MOV32r0 implicit-def dead $eflags
     $rsp = ADD64ri8 $rsp, 16, implicit-def dead $eflags
     $rbx = POP64r implicit-def $rsp, implicit $rsp
-    RETQ $eax
+    RET64 $eax
 ...
diff --git a/llvm/test/CodeGen/MIR/X86/cfi-def-cfa-offset.mir b/llvm/test/CodeGen/MIR/X86/cfi-def-cfa-offset.mir
--- a/llvm/test/CodeGen/MIR/X86/cfi-def-cfa-offset.mir
+++ b/llvm/test/CodeGen/MIR/X86/cfi-def-cfa-offset.mir
@@ -24,6 +24,6 @@
     ; CHECK: CFI_INSTRUCTION def_cfa_offset 4048
     CFI_INSTRUCTION def_cfa_offset 4048
     $rsp = ADD64ri32 $rsp, 4040, implicit-def dead $eflags
-    RETQ
+    RET64
 ...
 
diff --git a/llvm/test/CodeGen/MIR/X86/cfi-offset.mir b/llvm/test/CodeGen/MIR/X86/cfi-offset.mir
--- a/llvm/test/CodeGen/MIR/X86/cfi-offset.mir
+++ b/llvm/test/CodeGen/MIR/X86/cfi-offset.mir
@@ -42,6 +42,6 @@
     CALL64pcrel32 @foo, csr_64, implicit $rsp, implicit $edi, implicit-def $rsp
     $eax = LEA64_32r killed $rbx, 1, $rbx, 0, _
     $rbx = POP64r implicit-def $rsp, implicit $rsp
-    RETQ $eax
+    RET64 $eax
 ...
 
diff --git a/llvm/test/CodeGen/MIR/X86/constant-pool-item-redefinition-error.mir b/llvm/test/CodeGen/MIR/X86/constant-pool-item-redefinition-error.mir
--- a/llvm/test/CodeGen/MIR/X86/constant-pool-item-redefinition-error.mir
+++ b/llvm/test/CodeGen/MIR/X86/constant-pool-item-redefinition-error.mir
@@ -20,6 +20,6 @@
 body: |
   bb.0.entry:
     %xmm0 = ADDSDrm killed %xmm0, %rip, 1, _, %const.0, _
-    RETQ %xmm0
+    RET64 %xmm0
 ...
 
diff --git a/llvm/test/CodeGen/MIR/X86/constant-pool.mir b/llvm/test/CodeGen/MIR/X86/constant-pool.mir
--- a/llvm/test/CodeGen/MIR/X86/constant-pool.mir
+++ b/llvm/test/CodeGen/MIR/X86/constant-pool.mir
@@ -67,7 +67,7 @@
     $xmm1 = ADDSSrm killed $xmm1, $rip, 1, _, %const.1, _, implicit $mxcsr
     $xmm1 = CVTSS2SDrr killed $xmm1, implicit $mxcsr
     $xmm0 = MULSDrr killed $xmm0, killed $xmm1, implicit $mxcsr
-    RETQ $xmm0
+    RET64 $xmm0
 ...
 ---
 # Verify that alignment can be inferred:
@@ -93,7 +93,7 @@
     $xmm1 = ADDSSrm killed $xmm1, $rip, 1, _, %const.1, _, implicit $mxcsr
     $xmm1 = CVTSS2SDrr killed $xmm1, implicit $mxcsr
     $xmm0 = MULSDrr killed $xmm0, killed $xmm1, implicit $mxcsr
-    RETQ $xmm0
+    RET64 $xmm0
 ...
 ---
 # Verify that the non-standard alignments are respected:
@@ -123,7 +123,7 @@
     $xmm1 = ADDSSrm killed $xmm1, $rip, 1, _, %const.1, _, implicit $mxcsr
     $xmm1 = CVTSS2SDrr killed $xmm1, implicit $mxcsr
     $xmm0 = MULSDrr killed $xmm0, killed $xmm1, implicit $mxcsr
-    RETQ $xmm0
+    RET64 $xmm0
 ...
 ---
 # CHECK:  name:  test4
@@ -141,5 +141,5 @@
     $xmm1 = ADDSSrm killed $xmm1, $rip, 1, _, %const.0 + 8, _, implicit $mxcsr
     $xmm1 = CVTSS2SDrr killed $xmm1, implicit $mxcsr
     $xmm0 = MULSDrr killed $xmm0, killed $xmm1, implicit $mxcsr
-    RETQ $xmm0
+    RET64 $xmm0
 ...
diff --git a/llvm/test/CodeGen/MIR/X86/constant-value-error.mir b/llvm/test/CodeGen/MIR/X86/constant-value-error.mir
--- a/llvm/test/CodeGen/MIR/X86/constant-value-error.mir
+++ b/llvm/test/CodeGen/MIR/X86/constant-value-error.mir
@@ -20,6 +20,6 @@
 body: |
   bb.0.entry:
     %xmm0 = ADDSDrm killed %xmm0, %rip, 1, _, %const.0, _
-    RETQ %xmm0
+    RET64 %xmm0
 ...
 
diff --git a/llvm/test/CodeGen/MIR/X86/dbg-value-list.mir b/llvm/test/CodeGen/MIR/X86/dbg-value-list.mir
--- a/llvm/test/CodeGen/MIR/X86/dbg-value-list.mir
+++ b/llvm/test/CodeGen/MIR/X86/dbg-value-list.mir
@@ -58,7 +58,7 @@
     DBG_VALUE $esi, $noreg, !13, !DIExpression(), debug-location !15
     DBG_VALUE $eax, $noreg, !12, !DIExpression(), debug-location !15
     renamable $eax = nsw IMUL32rr killed renamable $eax, killed renamable $esi, implicit-def dead $eflags, debug-location !16
-    RETQ $eax, debug-location !17
+    RET64 $eax, debug-location !17
 
 ...
 
diff --git a/llvm/test/CodeGen/MIR/X86/dead-register-flag.mir b/llvm/test/CodeGen/MIR/X86/dead-register-flag.mir
--- a/llvm/test/CodeGen/MIR/X86/dead-register-flag.mir
+++ b/llvm/test/CodeGen/MIR/X86/dead-register-flag.mir
@@ -20,5 +20,5 @@
   bb.0.body:
     ; CHECK: $eax = IMUL32rri8 $edi, 11, implicit-def dead $eflags
     $eax = IMUL32rri8 $edi, 11, implicit-def dead $eflags
-    RETQ $eax
+    RET64 $eax
 ...
diff --git a/llvm/test/CodeGen/MIR/X86/def-register-already-tied-error.mir b/llvm/test/CodeGen/MIR/X86/def-register-already-tied-error.mir
--- a/llvm/test/CodeGen/MIR/X86/def-register-already-tied-error.mir
+++ b/llvm/test/CodeGen/MIR/X86/def-register-already-tied-error.mir
@@ -20,5 +20,5 @@
   ; CHECK: [[@LINE+1]]:83: the tied-def operand #3 is already tied with another register operand
     INLINEASM &"$foo", 1, 2818058, def $rdi, 2147483657, killed $rdi(tied-def 3), killed $rdi(tied-def 3)
     $rax = COPY killed $rdi
-    RETQ killed $rax
+    RET64 killed $rax
 ...
diff --git a/llvm/test/CodeGen/MIR/X86/duplicate-memory-operand-flag.mir b/llvm/test/CodeGen/MIR/X86/duplicate-memory-operand-flag.mir
--- a/llvm/test/CodeGen/MIR/X86/duplicate-memory-operand-flag.mir
+++ b/llvm/test/CodeGen/MIR/X86/duplicate-memory-operand-flag.mir
@@ -23,5 +23,5 @@
     $eax = MOV32rm $rdi, 1, _, 0, _ :: (volatile volatile load (s32) from %ir.x)
     $eax = INC32r killed $eax, implicit-def dead $eflags
     MOV32mr killed $rdi, 1, _, 0, _, $eax :: (volatile store (s32) into %ir.x)
-    RETQ $eax
+    RET64 $eax
 ...
diff --git a/llvm/test/CodeGen/MIR/X86/duplicate-register-flag-error.mir b/llvm/test/CodeGen/MIR/X86/duplicate-register-flag-error.mir
--- a/llvm/test/CodeGen/MIR/X86/duplicate-register-flag-error.mir
+++ b/llvm/test/CodeGen/MIR/X86/duplicate-register-flag-error.mir
@@ -27,9 +27,9 @@
 
   bb.1.less:
     $eax = MOV32r0 implicit-def $eflags
-    RETQ $eax
+    RET64 $eax
 
   bb.2.exit:
     $eax = COPY $edi
-    RETQ $eax
+    RET64 $eax
 ...
diff --git a/llvm/test/CodeGen/MIR/X86/early-clobber-register-flag.mir b/llvm/test/CodeGen/MIR/X86/early-clobber-register-flag.mir
--- a/llvm/test/CodeGen/MIR/X86/early-clobber-register-flag.mir
+++ b/llvm/test/CodeGen/MIR/X86/early-clobber-register-flag.mir
@@ -40,5 +40,5 @@
     $edi = COPY killed $ecx
     CALL64pcrel32 @foo, csr_64, implicit $rsp, implicit $edi, implicit-def $rsp
     $rax = POP64r implicit-def $rsp, implicit $rsp
-    RETQ
+    RET64
 ...
diff --git a/llvm/test/CodeGen/MIR/X86/expected-align-in-memory-operand.mir b/llvm/test/CodeGen/MIR/X86/expected-align-in-memory-operand.mir
--- a/llvm/test/CodeGen/MIR/X86/expected-align-in-memory-operand.mir
+++ b/llvm/test/CodeGen/MIR/X86/expected-align-in-memory-operand.mir
@@ -26,5 +26,5 @@
     $xmm1 = MOVSSrr killed $xmm1, killed $xmm2
     MOVAPSmr $rdi, 1, _, 0, _, killed $xmm0 :: (store (s128) into %ir.vec, align 32)
     MOVAPSmr killed $rdi, 1, _, 16, _, killed $xmm1 :: (store (s128) into %ir.vec + 16, basealign 32)
-    RETQ
+    RET64
 ...
diff --git a/llvm/test/CodeGen/MIR/X86/expected-alignment-after-align-in-memory-operand.mir b/llvm/test/CodeGen/MIR/X86/expected-alignment-after-align-in-memory-operand.mir
--- a/llvm/test/CodeGen/MIR/X86/expected-alignment-after-align-in-memory-operand.mir
+++ b/llvm/test/CodeGen/MIR/X86/expected-alignment-after-align-in-memory-operand.mir
@@ -26,5 +26,5 @@
     $xmm1 = MOVSSrr killed $xmm1, killed $xmm2
     MOVAPSmr $rdi, 1, _, 0, _, killed $xmm0 :: (store (s128) into %ir.vec, align 32)
     MOVAPSmr killed $rdi, 1, _, 16, _, killed $xmm1 :: (store (s128) into %ir.vec + 16, basealign 32)
-    RETQ
+    RET64
 ...
diff --git a/llvm/test/CodeGen/MIR/X86/expected-basic-block-at-start-of-body.mir b/llvm/test/CodeGen/MIR/X86/expected-basic-block-at-start-of-body.mir
--- a/llvm/test/CodeGen/MIR/X86/expected-basic-block-at-start-of-body.mir
+++ b/llvm/test/CodeGen/MIR/X86/expected-basic-block-at-start-of-body.mir
@@ -30,11 +30,11 @@
 
   bb.1.less:
     $eax = MOV32r0 implicit-def dead $eflags
-    RETQ killed $eax
+    RET64 killed $eax
 
   bb.2.exit:
     liveins: $edi
 
     $eax = COPY killed $edi
-    RETQ killed $eax
+    RET64 killed $eax
 ...
diff --git a/llvm/test/CodeGen/MIR/X86/expected-block-reference-in-blockaddress.mir b/llvm/test/CodeGen/MIR/X86/expected-block-reference-in-blockaddress.mir
--- a/llvm/test/CodeGen/MIR/X86/expected-block-reference-in-blockaddress.mir
+++ b/llvm/test/CodeGen/MIR/X86/expected-block-reference-in-blockaddress.mir
@@ -26,5 +26,5 @@
     JMP64m $rip, 1, _, @addr, _
 
   bb.1.block (address-taken):
-    RETQ
+    RET64
 ...
diff --git a/llvm/test/CodeGen/MIR/X86/expected-comma-after-cfi-register.mir b/llvm/test/CodeGen/MIR/X86/expected-comma-after-cfi-register.mir
--- a/llvm/test/CodeGen/MIR/X86/expected-comma-after-cfi-register.mir
+++ b/llvm/test/CodeGen/MIR/X86/expected-comma-after-cfi-register.mir
@@ -38,5 +38,5 @@
     CALL64pcrel32 @foo, csr_64, implicit $rsp, implicit $edi, implicit-def $rsp
     $eax = LEA64_32r killed $rbx, 1, $rbx, 0, _
     $rbx = POP64r implicit-def $rsp, implicit $rsp
-    RETQ $eax
+    RET64 $eax
 ...
diff --git a/llvm/test/CodeGen/MIR/X86/expected-comma-after-memory-operand.mir b/llvm/test/CodeGen/MIR/X86/expected-comma-after-memory-operand.mir
--- a/llvm/test/CodeGen/MIR/X86/expected-comma-after-memory-operand.mir
+++ b/llvm/test/CodeGen/MIR/X86/expected-comma-after-memory-operand.mir
@@ -21,5 +21,5 @@
     liveins: $rdi
   ; CHECK: [[@LINE+1]]:91: expected ',' before the next machine memory operand
     INC32m killed $rdi, 1, _, 0, _, implicit-def dead $eflags :: (store (s32) into %ir.a) (load (s32) from %ir.a)
-    RETQ
+    RET64
 ...
diff --git a/llvm/test/CodeGen/MIR/X86/expected-different-implicit-operand.mir b/llvm/test/CodeGen/MIR/X86/expected-different-implicit-operand.mir
--- a/llvm/test/CodeGen/MIR/X86/expected-different-implicit-operand.mir
+++ b/llvm/test/CodeGen/MIR/X86/expected-different-implicit-operand.mir
@@ -30,5 +30,5 @@
     $eax = MOV32r0 implicit-def $eflags
 
   bb.2.exit:
-    RETQ $eax
+    RET64 $eax
 ...
diff --git a/llvm/test/CodeGen/MIR/X86/expected-different-implicit-register-flag.mir b/llvm/test/CodeGen/MIR/X86/expected-different-implicit-register-flag.mir
--- a/llvm/test/CodeGen/MIR/X86/expected-different-implicit-register-flag.mir
+++ b/llvm/test/CodeGen/MIR/X86/expected-different-implicit-register-flag.mir
@@ -30,5 +30,5 @@
     $eax = MOV32r0 implicit-def $eflags
 
   bb.2.exit:
-    RETQ $eax
+    RET64 $eax
 ...
diff --git a/llvm/test/CodeGen/MIR/X86/expected-function-reference-after-blockaddress.mir b/llvm/test/CodeGen/MIR/X86/expected-function-reference-after-blockaddress.mir
--- a/llvm/test/CodeGen/MIR/X86/expected-function-reference-after-blockaddress.mir
+++ b/llvm/test/CodeGen/MIR/X86/expected-function-reference-after-blockaddress.mir
@@ -26,5 +26,5 @@
     JMP64m $rip, 1, _, @addr, _
 
   bb.1.block (address-taken):
-    RETQ
+    RET64
 ...
diff --git a/llvm/test/CodeGen/MIR/X86/expected-global-value-after-blockaddress.mir b/llvm/test/CodeGen/MIR/X86/expected-global-value-after-blockaddress.mir
--- a/llvm/test/CodeGen/MIR/X86/expected-global-value-after-blockaddress.mir
+++ b/llvm/test/CodeGen/MIR/X86/expected-global-value-after-blockaddress.mir
@@ -26,5 +26,5 @@
     JMP64m $rip, 1, _, @addr, _
 
   bb.1.block (address-taken):
-    RETQ
+    RET64
 ...
diff --git a/llvm/test/CodeGen/MIR/X86/expected-integer-after-offset-sign.mir b/llvm/test/CodeGen/MIR/X86/expected-integer-after-offset-sign.mir
--- a/llvm/test/CodeGen/MIR/X86/expected-integer-after-offset-sign.mir
+++ b/llvm/test/CodeGen/MIR/X86/expected-integer-after-offset-sign.mir
@@ -20,5 +20,5 @@
     $rax = MOV64rm $rip, 1, _, @G + , _
     $eax = MOV32rm $rax, 1, _, 0, _
     $eax = INC32r $eax, implicit-def $eflags
-    RETQ $eax
+    RET64 $eax
 ...
diff --git a/llvm/test/CodeGen/MIR/X86/expected-integer-after-tied-def.mir b/llvm/test/CodeGen/MIR/X86/expected-integer-after-tied-def.mir
--- a/llvm/test/CodeGen/MIR/X86/expected-integer-after-tied-def.mir
+++ b/llvm/test/CodeGen/MIR/X86/expected-integer-after-tied-def.mir
@@ -20,5 +20,5 @@
   ; CHECK: [[@LINE+1]]:78: expected tied-def or low-level type after '('
     INLINEASM &"$foo", 1, 2818058, def $rdi, 2147483657, killed $rdi(tied-def)
     $rax = COPY killed $rdi
-    RETQ killed $rax
+    RET64 killed $rax
 ...
diff --git a/llvm/test/CodeGen/MIR/X86/expected-integer-in-successor-weight.mir b/llvm/test/CodeGen/MIR/X86/expected-integer-in-successor-weight.mir
--- a/llvm/test/CodeGen/MIR/X86/expected-integer-in-successor-weight.mir
+++ b/llvm/test/CodeGen/MIR/X86/expected-integer-in-successor-weight.mir
@@ -28,11 +28,11 @@
 
   bb.1.less:
     $eax = MOV32r0 implicit-def dead $eflags
-    RETQ killed $eax
+    RET64 killed $eax
 
   bb.2.exit:
     liveins: $edi
 
     $eax = COPY killed $edi
-    RETQ killed $eax
+    RET64 killed $eax
 ...
diff --git a/llvm/test/CodeGen/MIR/X86/expected-load-or-store-in-memory-operand.mir b/llvm/test/CodeGen/MIR/X86/expected-load-or-store-in-memory-operand.mir
--- a/llvm/test/CodeGen/MIR/X86/expected-load-or-store-in-memory-operand.mir
+++ b/llvm/test/CodeGen/MIR/X86/expected-load-or-store-in-memory-operand.mir
@@ -19,5 +19,5 @@
     liveins: $rdi
   ; CHECK: [[@LINE+1]]:48: expected 'load' or 'store' memory operation
     $eax = MOV32rm killed $rdi, 1, _, 0, _ :: (4 from %ir.a)
-    RETQ $eax
+    RET64 $eax
 ...
diff --git a/llvm/test/CodeGen/MIR/X86/expected-machine-operand.mir b/llvm/test/CodeGen/MIR/X86/expected-machine-operand.mir
--- a/llvm/test/CodeGen/MIR/X86/expected-machine-operand.mir
+++ b/llvm/test/CodeGen/MIR/X86/expected-machine-operand.mir
@@ -14,6 +14,6 @@
   bb.0.entry:
     ; CHECK: [[@LINE+1]]:20: expected a machine operand
     $eax = XOR32rr =
-    RETQ $eax
+    RET64 $eax
 ...
 
diff --git a/llvm/test/CodeGen/MIR/X86/expected-metadata-node-after-debug-location.mir b/llvm/test/CodeGen/MIR/X86/expected-metadata-node-after-debug-location.mir
--- a/llvm/test/CodeGen/MIR/X86/expected-metadata-node-after-debug-location.mir
+++ b/llvm/test/CodeGen/MIR/X86/expected-metadata-node-after-debug-location.mir
@@ -53,5 +53,5 @@
     DBG_VALUE _, 0, !12, !13, debug-location 14
     MOV32mr $stack.x.addr, 1, _, 0, _, %0
     $eax = COPY %0
-    RETQ $eax
+    RET64 $eax
 ...
diff --git a/llvm/test/CodeGen/MIR/X86/expected-metadata-node-after-exclaim.mir b/llvm/test/CodeGen/MIR/X86/expected-metadata-node-after-exclaim.mir
--- a/llvm/test/CodeGen/MIR/X86/expected-metadata-node-after-exclaim.mir
+++ b/llvm/test/CodeGen/MIR/X86/expected-metadata-node-after-exclaim.mir
@@ -53,5 +53,5 @@
     DBG_VALUE _, 0, !12, ! _
     MOV32mr %stack.0.x.addr, 1, _, 0, _, %0
     $eax = COPY %0
-    RETQ $eax
+    RET64 $eax
 ...
diff --git a/llvm/test/CodeGen/MIR/X86/expected-metadata-node-in-stack-object.mir b/llvm/test/CodeGen/MIR/X86/expected-metadata-node-in-stack-object.mir
--- a/llvm/test/CodeGen/MIR/X86/expected-metadata-node-in-stack-object.mir
+++ b/llvm/test/CodeGen/MIR/X86/expected-metadata-node-in-stack-object.mir
@@ -22,5 +22,5 @@
 
     MOV32mr $rsp, 1, _, -4, _, $edi :: (store (s32) into %ir.xa)
     $eax = COPY killed $edi
-    RETQ killed $eax
+    RET64 killed $eax
 ...
diff --git a/llvm/test/CodeGen/MIR/X86/expected-named-register-in-allocation-hint.mir b/llvm/test/CodeGen/MIR/X86/expected-named-register-in-allocation-hint.mir
--- a/llvm/test/CodeGen/MIR/X86/expected-named-register-in-allocation-hint.mir
+++ b/llvm/test/CodeGen/MIR/X86/expected-named-register-in-allocation-hint.mir
@@ -26,5 +26,5 @@
     %2 = COPY $edi
     %2 = IMUL32rr %2, %1, implicit-def dead $eflags
     $eax = COPY %2
-    RETQ killed $eax
+    RET64 killed $eax
 ...
diff --git a/llvm/test/CodeGen/MIR/X86/expected-named-register-in-callee-saved-register.mir b/llvm/test/CodeGen/MIR/X86/expected-named-register-in-callee-saved-register.mir
--- a/llvm/test/CodeGen/MIR/X86/expected-named-register-in-callee-saved-register.mir
+++ b/llvm/test/CodeGen/MIR/X86/expected-named-register-in-callee-saved-register.mir
@@ -37,7 +37,7 @@
     liveins: $edi
 
     $eax = COPY killed $edi
-    RETQ killed $eax
+    RET64 killed $eax
 ...
 ---
 name:            func
@@ -84,5 +84,5 @@
     $eax = MOV32r0 implicit-def dead $eflags
     $rsp = ADD64ri8 $rsp, 16, implicit-def dead $eflags
     $rbx = POP64r implicit-def $rsp, implicit $rsp
-    RETQ $eax
+    RET64 $eax
 ...
diff --git a/llvm/test/CodeGen/MIR/X86/expected-named-register-in-functions-livein.mir b/llvm/test/CodeGen/MIR/X86/expected-named-register-in-functions-livein.mir
--- a/llvm/test/CodeGen/MIR/X86/expected-named-register-in-functions-livein.mir
+++ b/llvm/test/CodeGen/MIR/X86/expected-named-register-in-functions-livein.mir
@@ -22,5 +22,5 @@
 
     %0 = COPY %edi
     %eax = COPY %0
-    RETQ %eax
+    RET64 %eax
 ...
diff --git a/llvm/test/CodeGen/MIR/X86/expected-named-register-livein.mir b/llvm/test/CodeGen/MIR/X86/expected-named-register-livein.mir
--- a/llvm/test/CodeGen/MIR/X86/expected-named-register-livein.mir
+++ b/llvm/test/CodeGen/MIR/X86/expected-named-register-livein.mir
@@ -16,5 +16,5 @@
     liveins: %0
 
     $eax = COPY $edi
-    RETQ $eax
+    RET64 $eax
 ...
diff --git a/llvm/test/CodeGen/MIR/X86/expected-newline-at-end-of-list.mir b/llvm/test/CodeGen/MIR/X86/expected-newline-at-end-of-list.mir
--- a/llvm/test/CodeGen/MIR/X86/expected-newline-at-end-of-list.mir
+++ b/llvm/test/CodeGen/MIR/X86/expected-newline-at-end-of-list.mir
@@ -31,11 +31,11 @@
 
   bb.1.less:
     $eax = MOV32r0 implicit-def dead $eflags
-    RETQ killed $eax
+    RET64 killed $eax
 
   bb.2.exit:
     liveins: $edi
 
     $eax = COPY killed $edi
-    RETQ killed $eax
+    RET64 killed $eax
 ...
diff --git a/llvm/test/CodeGen/MIR/X86/expected-number-after-bb.mir b/llvm/test/CodeGen/MIR/X86/expected-number-after-bb.mir
--- a/llvm/test/CodeGen/MIR/X86/expected-number-after-bb.mir
+++ b/llvm/test/CodeGen/MIR/X86/expected-number-after-bb.mir
@@ -29,5 +29,5 @@
     $eax = MOV32r0 implicit-def $eflags
 
   bb.2.nah:
-    RETQ $eax
+    RET64 $eax
 ...
diff --git a/llvm/test/CodeGen/MIR/X86/expected-offset-after-cfi-operand.mir b/llvm/test/CodeGen/MIR/X86/expected-offset-after-cfi-operand.mir
--- a/llvm/test/CodeGen/MIR/X86/expected-offset-after-cfi-operand.mir
+++ b/llvm/test/CodeGen/MIR/X86/expected-offset-after-cfi-operand.mir
@@ -22,6 +22,6 @@
     ; CHECK: [[@LINE+1]]:36: expected a cfi offset
     CFI_INSTRUCTION def_cfa_offset _
     $rsp = ADD64ri32 $rsp, 4040, implicit-def dead $eflags
-    RETQ
+    RET64
 ...
 
diff --git a/llvm/test/CodeGen/MIR/X86/expected-pointer-value-in-memory-operand.mir b/llvm/test/CodeGen/MIR/X86/expected-pointer-value-in-memory-operand.mir
--- a/llvm/test/CodeGen/MIR/X86/expected-pointer-value-in-memory-operand.mir
+++ b/llvm/test/CodeGen/MIR/X86/expected-pointer-value-in-memory-operand.mir
@@ -19,6 +19,6 @@
     liveins: $rdi
   ; CHECK: [[@LINE+1]]:64: expected a pointer IR value
     $eax = MOV32rm killed $rdi, 1, _, 0, _ :: (load (s32) from %ir.b)
-    RETQ $eax
+    RET64 $eax
 ...
 
diff --git a/llvm/test/CodeGen/MIR/X86/expected-positive-alignment-after-align.mir b/llvm/test/CodeGen/MIR/X86/expected-positive-alignment-after-align.mir
--- a/llvm/test/CodeGen/MIR/X86/expected-positive-alignment-after-align.mir
+++ b/llvm/test/CodeGen/MIR/X86/expected-positive-alignment-after-align.mir
@@ -26,5 +26,5 @@
     $xmm1 = MOVSSrr killed $xmm1, killed $xmm2
     MOVAPSmr $rdi, 1, _, 0, _, killed $xmm0 :: (store (s128) into %ir.vec, align 32)
     MOVAPSmr killed $rdi, 1, _, 16, _, killed $xmm1 :: (store (s128) into %ir.vec + 16, basealign 32)
-    RETQ
+    RET64
 ...
diff --git a/llvm/test/CodeGen/MIR/X86/expected-register-after-cfi-operand.mir b/llvm/test/CodeGen/MIR/X86/expected-register-after-cfi-operand.mir
--- a/llvm/test/CodeGen/MIR/X86/expected-register-after-cfi-operand.mir
+++ b/llvm/test/CodeGen/MIR/X86/expected-register-after-cfi-operand.mir
@@ -38,5 +38,5 @@
     CALL64pcrel32 @foo, csr_64, implicit $rsp, implicit $edi, implicit-def $rsp
     $eax = LEA64_32r killed $rbx, 1, $rbx, 0, _
     $rbx = POP64r implicit-def $rsp, implicit $rsp
-    RETQ $eax
+    RET64 $eax
 ...
diff --git a/llvm/test/CodeGen/MIR/X86/expected-register-after-flags.mir b/llvm/test/CodeGen/MIR/X86/expected-register-after-flags.mir
--- a/llvm/test/CodeGen/MIR/X86/expected-register-after-flags.mir
+++ b/llvm/test/CodeGen/MIR/X86/expected-register-after-flags.mir
@@ -16,5 +16,5 @@
   bb.0.entry:
     ; CHECK: [[@LINE+1]]:33: expected a register after register flags
     $eax = MOV32r0 implicit-def 2
-    RETQ $eax
+    RET64 $eax
 ...
diff --git a/llvm/test/CodeGen/MIR/X86/expected-size-integer-after-memory-operation.mir b/llvm/test/CodeGen/MIR/X86/expected-size-integer-after-memory-operation.mir
--- a/llvm/test/CodeGen/MIR/X86/expected-size-integer-after-memory-operation.mir
+++ b/llvm/test/CodeGen/MIR/X86/expected-size-integer-after-memory-operation.mir
@@ -19,6 +19,6 @@
     liveins: $rdi
   ; CHECK: [[@LINE+1]]:53: expected an atomic scope, ordering or a size specification
     $eax = MOV32rm killed $rdi, 1, _, 0, _ :: (load from %ir.a)
-    RETQ $eax
+    RET64 $eax
 ...
 
diff --git a/llvm/test/CodeGen/MIR/X86/expected-size-integer-after-memory-operation2.mir b/llvm/test/CodeGen/MIR/X86/expected-size-integer-after-memory-operation2.mir
--- a/llvm/test/CodeGen/MIR/X86/expected-size-integer-after-memory-operation2.mir
+++ b/llvm/test/CodeGen/MIR/X86/expected-size-integer-after-memory-operation2.mir
@@ -19,6 +19,6 @@
     liveins: $rdi
   ; CHECK: [[@LINE+1]]:53: expected memory LLT, the size integer literal or 'unknown-size' after memory operation
     $eax = MOV32rm killed $rdi, 1, _, 0, _ :: (load . from %ir.a)
-    RETQ $eax
+    RET64 $eax
 ...
 
diff --git a/llvm/test/CodeGen/MIR/X86/expected-stack-object.mir b/llvm/test/CodeGen/MIR/X86/expected-stack-object.mir
--- a/llvm/test/CodeGen/MIR/X86/expected-stack-object.mir
+++ b/llvm/test/CodeGen/MIR/X86/expected-stack-object.mir
@@ -63,5 +63,5 @@
     CMP64rm killed $rbx, $rsp, 1, _, 24, _, implicit-def $eflags
     $rsp = ADD64ri8 $rsp, 32, implicit-def dead $eflags
     $rbx = POP64r implicit-def $rsp, implicit $rsp
-    RETQ $eax
+    RET64 $eax
 ...
diff --git a/llvm/test/CodeGen/MIR/X86/expected-subregister-after-colon.mir b/llvm/test/CodeGen/MIR/X86/expected-subregister-after-colon.mir
--- a/llvm/test/CodeGen/MIR/X86/expected-subregister-after-colon.mir
+++ b/llvm/test/CodeGen/MIR/X86/expected-subregister-after-colon.mir
@@ -22,5 +22,5 @@
     %1 = COPY %0 . 42
     %2 = AND8ri %1, 1, implicit-def $eflags
     $al = COPY %2
-    RETQ $al
+    RET64 $al
 ...
diff --git a/llvm/test/CodeGen/MIR/X86/expected-target-flag-name.mir b/llvm/test/CodeGen/MIR/X86/expected-target-flag-name.mir
--- a/llvm/test/CodeGen/MIR/X86/expected-target-flag-name.mir
+++ b/llvm/test/CodeGen/MIR/X86/expected-target-flag-name.mir
@@ -20,5 +20,5 @@
     $rax = MOV64rm $rip, 1, _, target-flags( ) @G, _
     $eax = MOV32rm killed $rax, 1, _, 0, _
     $eax = INC32r killed $eax, implicit-def dead $eflags
-    RETQ $eax
+    RET64 $eax
 ...
diff --git a/llvm/test/CodeGen/MIR/X86/expected-tied-def-after-lparen.mir b/llvm/test/CodeGen/MIR/X86/expected-tied-def-after-lparen.mir
--- a/llvm/test/CodeGen/MIR/X86/expected-tied-def-after-lparen.mir
+++ b/llvm/test/CodeGen/MIR/X86/expected-tied-def-after-lparen.mir
@@ -20,5 +20,5 @@
   ; CHECK: [[@LINE+1]]:70: expected tied-def or low-level type after '('
     INLINEASM &"$foo", 1, 2818058, def $rdi, 2147483657, killed $rdi(3)
     $rax = COPY killed $rdi
-    RETQ killed $rax
+    RET64 killed $rax
 ...
diff --git a/llvm/test/CodeGen/MIR/X86/expected-value-in-memory-operand.mir b/llvm/test/CodeGen/MIR/X86/expected-value-in-memory-operand.mir
--- a/llvm/test/CodeGen/MIR/X86/expected-value-in-memory-operand.mir
+++ b/llvm/test/CodeGen/MIR/X86/expected-value-in-memory-operand.mir
@@ -19,6 +19,6 @@
     liveins: $rdi
   ; CHECK: [[@LINE+1]]:64: expected an IR value reference
     $eax = MOV32rm killed $rdi, 1, _, 0, _ :: (load (s32) from a)
-    RETQ $eax
+    RET64 $eax
 ...
 
diff --git a/llvm/test/CodeGen/MIR/X86/expected-virtual-register-in-functions-livein.mir b/llvm/test/CodeGen/MIR/X86/expected-virtual-register-in-functions-livein.mir
--- a/llvm/test/CodeGen/MIR/X86/expected-virtual-register-in-functions-livein.mir
+++ b/llvm/test/CodeGen/MIR/X86/expected-virtual-register-in-functions-livein.mir
@@ -22,5 +22,5 @@
 
     %0 = COPY $edi
     $eax = COPY %0
-    RETQ $eax
+    RET64 $eax
 ...
diff --git a/llvm/test/CodeGen/MIR/X86/external-symbol-operands.mir b/llvm/test/CodeGen/MIR/X86/external-symbol-operands.mir
--- a/llvm/test/CodeGen/MIR/X86/external-symbol-operands.mir
+++ b/llvm/test/CodeGen/MIR/X86/external-symbol-operands.mir
@@ -46,7 +46,7 @@
     liveins: $eax
 
     $rsp = ADD64ri32 $rsp, 520, implicit-def $eflags
-    RETQ $eax
+    RET64 $eax
 
   bb.2.entry:
     ; CHECK:      CALL64pcrel32 &__stack_chk_fail,
diff --git a/llvm/test/CodeGen/MIR/X86/fixed-stack-memory-operands.mir b/llvm/test/CodeGen/MIR/X86/fixed-stack-memory-operands.mir
--- a/llvm/test/CodeGen/MIR/X86/fixed-stack-memory-operands.mir
+++ b/llvm/test/CodeGen/MIR/X86/fixed-stack-memory-operands.mir
@@ -35,5 +35,5 @@
     $eax = MOV32rm $esp, 1, _, 8, _ :: (load (s32) from %fixed-stack.0, align 16)
     MOV32mr $esp, 1, _, 0, _, $eax :: (store (s32) into %ir.b)
     $edx = POP32r implicit-def $esp, implicit $esp
-    RETL $eax
+    RET32 $eax
 ...
diff --git a/llvm/test/CodeGen/MIR/X86/fixed-stack-object-redefinition-error.mir b/llvm/test/CodeGen/MIR/X86/fixed-stack-object-redefinition-error.mir
--- a/llvm/test/CodeGen/MIR/X86/fixed-stack-object-redefinition-error.mir
+++ b/llvm/test/CodeGen/MIR/X86/fixed-stack-object-redefinition-error.mir
@@ -24,5 +24,5 @@
   bb.0.entry:
     $eax = MOV32rm $esp, 1, _, 4, _
     $eax = ADD32rm killed $eax, $esp, 1, _, 8, _, implicit-def dead $eflags
-    RETL $eax
+    RET32 $eax
 ...
diff --git a/llvm/test/CodeGen/MIR/X86/fixed-stack-objects.mir b/llvm/test/CodeGen/MIR/X86/fixed-stack-objects.mir
--- a/llvm/test/CodeGen/MIR/X86/fixed-stack-objects.mir
+++ b/llvm/test/CodeGen/MIR/X86/fixed-stack-objects.mir
@@ -30,5 +30,5 @@
   bb.0.entry:
     $eax = MOV32rm $esp, 1, _, 8, _
     MOV32mr $esp, 1, _, 0, _, $eax
-    RETL $eax
+    RET32 $eax
 ...
diff --git a/llvm/test/CodeGen/MIR/X86/frame-info-save-restore-points.mir b/llvm/test/CodeGen/MIR/X86/frame-info-save-restore-points.mir
--- a/llvm/test/CodeGen/MIR/X86/frame-info-save-restore-points.mir
+++ b/llvm/test/CodeGen/MIR/X86/frame-info-save-restore-points.mir
@@ -69,5 +69,5 @@
   bb.3.false:
     liveins: $eax
 
-    RETQ $eax
+    RET64 $eax
 ...
diff --git a/llvm/test/CodeGen/MIR/X86/frame-info-stack-references.mir b/llvm/test/CodeGen/MIR/X86/frame-info-stack-references.mir
--- a/llvm/test/CodeGen/MIR/X86/frame-info-stack-references.mir
+++ b/llvm/test/CodeGen/MIR/X86/frame-info-stack-references.mir
@@ -72,7 +72,7 @@
 
     $rsp = ADD64ri8 $rsp, 32, implicit-def dead $eflags
     $rbx = POP64r implicit-def $rsp, implicit $rsp
-    RETQ $eax
+    RET64 $eax
 
   bb.2.entry:
     CALL64pcrel32 &__stack_chk_fail, csr_64, implicit $rsp, implicit-def $rsp
diff --git a/llvm/test/CodeGen/MIR/X86/frame-setup-instruction-flag.mir b/llvm/test/CodeGen/MIR/X86/frame-setup-instruction-flag.mir
--- a/llvm/test/CodeGen/MIR/X86/frame-setup-instruction-flag.mir
+++ b/llvm/test/CodeGen/MIR/X86/frame-setup-instruction-flag.mir
@@ -21,7 +21,7 @@
 body: |
   bb.0.body:
     $eax = IMUL32rri8 $edi, 11, implicit-def $eflags
-    RETQ $eax
+    RET64 $eax
 ...
 ---
 name:            foo
@@ -36,5 +36,5 @@
     $rdx = frame-setup frame-destroy POP64r implicit-def $rsp, implicit $rsp
     ; CHECK: $rdx = frame-setup frame-destroy POP64r
     $rdx = frame-destroy frame-setup POP64r implicit-def $rsp, implicit $rsp
-    RETQ $eax
+    RET64 $eax
 ...
diff --git a/llvm/test/CodeGen/MIR/X86/function-liveins.mir b/llvm/test/CodeGen/MIR/X86/function-liveins.mir
--- a/llvm/test/CodeGen/MIR/X86/function-liveins.mir
+++ b/llvm/test/CodeGen/MIR/X86/function-liveins.mir
@@ -32,5 +32,5 @@
     %0 = COPY $edi
     %2 = ADD32rr %0, %1, implicit-def dead $eflags
     $eax = COPY %2
-    RETQ $eax
+    RET64 $eax
 ...
diff --git a/llvm/test/CodeGen/MIR/X86/global-value-operands.mir b/llvm/test/CodeGen/MIR/X86/global-value-operands.mir
--- a/llvm/test/CodeGen/MIR/X86/global-value-operands.mir
+++ b/llvm/test/CodeGen/MIR/X86/global-value-operands.mir
@@ -68,7 +68,7 @@
     $rax = MOV64rm $rip, 1, _, @G, _
     $eax = MOV32rm $rax, 1, _, 0, _
     $eax = INC32r $eax, implicit-def $eflags
-    RETQ $eax
+    RET64 $eax
 ...
 ---
 # CHECK: name: inc2
@@ -79,7 +79,7 @@
     $rax = MOV64rm $rip, 1, _, @0, _
     $eax = MOV32rm $rax, 1, _, 0, _
     $eax = INC32r $eax, implicit-def $eflags
-    RETQ $eax
+    RET64 $eax
 ...
 ---
 name:            test
@@ -97,7 +97,7 @@
     $eax = MOV32rm killed $rax, 1, _, 0, _
     $rcx = MOV64rm $rip, 1, _, @$.-B, _
     MOV32mr killed $rcx, 1, _, 0, _, $eax
-    RETQ $eax
+    RET64 $eax
 ...
 ---
 name:            test2
@@ -106,7 +106,7 @@
     ; CHECK: , @"\01Hello@$%09 \\ World,",
     $rax = MOV64rm $rip, 1, _, @"\01Hello@$%09 \\ World,", _
     $eax = MOV32rm killed $rax, 1, _, 0, _
-    RETQ $eax
+    RET64 $eax
 ...
 ---
 # CHECK: name: test3
@@ -125,7 +125,7 @@
     $eax = MOV32rm killed $rax, 1, _, 0, _
     $rcx = MOV64rm $rip, 1, _, @$.-B - 8, _
     MOV32mr killed $rcx, 1, _, 0, _, $eax
-    RETQ $eax
+    RET64 $eax
 ...
 ---
 # CHECK: name: tf
@@ -136,5 +136,5 @@
     $rax = MOV64rm $rip, 1, _, target-flags(x86-gotpcrel) @G, _
     $eax = MOV32rm $rax, 1, _, 0, _
     $eax = INC32r $eax, implicit-def $eflags
-    RETQ $eax
+    RET64 $eax
 ...
diff --git a/llvm/test/CodeGen/MIR/X86/immediate-operands.mir b/llvm/test/CodeGen/MIR/X86/immediate-operands.mir
--- a/llvm/test/CodeGen/MIR/X86/immediate-operands.mir
+++ b/llvm/test/CodeGen/MIR/X86/immediate-operands.mir
@@ -20,9 +20,9 @@
 body: |
   bb.0.entry:
     ; CHECK:      $eax = MOV32ri 42
-    ; CHECK-NEXT: RETQ $eax
+    ; CHECK-NEXT: RET64 $eax
     $eax = MOV32ri 42
-    RETQ $eax
+    RET64 $eax
 ...
 ---
 # CHECK: name: bar
@@ -30,7 +30,7 @@
 body: |
   bb.0.entry:
     ; CHECK:      $eax = MOV32ri -11
-    ; CHECK-NEXT: RETQ $eax
+    ; CHECK-NEXT: RET64 $eax
     $eax = MOV32ri -11
-    RETQ $eax
+    RET64 $eax
 ...
diff --git a/llvm/test/CodeGen/MIR/X86/implicit-register-flag.mir b/llvm/test/CodeGen/MIR/X86/implicit-register-flag.mir
--- a/llvm/test/CodeGen/MIR/X86/implicit-register-flag.mir
+++ b/llvm/test/CodeGen/MIR/X86/implicit-register-flag.mir
@@ -40,11 +40,11 @@
   bb.1.less:
     ; CHECK: $eax = MOV32r0 implicit-def $eflags
     $eax = MOV32r0 implicit-def $eflags
-    RETQ $eax
+    RET64 $eax
 
   bb.2.exit:
     $eax = COPY $edi
-    RETQ $eax
+    RET64 $eax
 ...
 ---
 name:            implicit_subregister1
@@ -55,7 +55,7 @@
   ; CHECK-LABEL: name: implicit_subregister1
   ; CHECK: dead $eax = XOR32rr undef $eax, undef $eax, implicit-def dead $eflags, implicit-def $al
     dead $eax = XOR32rr undef $eax, undef $eax, implicit-def dead $eflags, implicit-def $al
-    RETQ killed $al
+    RET64 killed $al
 ...
 ---
 name:            implicit_subregister2
@@ -64,5 +64,5 @@
   ; CHECK-LABEL: name: implicit_subregister2
   ; CHECK: dead $r15 = XOR64rr undef $r15, undef $r15, implicit-def dead $eflags, implicit-def $r15w
     dead $r15 = XOR64rr undef $r15, undef $r15, implicit-def dead $eflags, implicit-def $r15w
-    RETQ killed $r15w
+    RET64 killed $r15w
 ...
diff --git a/llvm/test/CodeGen/MIR/X86/inline-asm-registers.mir b/llvm/test/CodeGen/MIR/X86/inline-asm-registers.mir
--- a/llvm/test/CodeGen/MIR/X86/inline-asm-registers.mir
+++ b/llvm/test/CodeGen/MIR/X86/inline-asm-registers.mir
@@ -31,7 +31,7 @@
   ; CHECK: INLINEASM &foo, 0 /* attdialect */, 4390922 /* regdef:GR64 */, def $rsi, 4390922 /* regdef:GR64 */, def dead $rdi,
     INLINEASM &foo, 0, 4390922, def $rsi, 4390922, def dead $rdi, 2147549193, killed $rdi, 2147483657, killed $rsi, 12, implicit-def dead early-clobber $eflags
     $rax = MOV64rr killed $rsi
-    RETQ killed $rax
+    RET64 killed $rax
 ...
 ---
 name:            test2
@@ -48,5 +48,5 @@
   ; CHECK: INLINEASM &foo, 0 /* attdialect */, 4390922 /* regdef:GR64 */, def $rsi, 4390922 /* regdef:GR64 */, def dead $rdi, 2147549193 /* reguse tiedto:$1 */, killed $rdi(tied-def 5), 2147483657 /* reguse tiedto:$0 */, killed $rsi(tied-def 3), 12 /* clobber */, implicit-def dead early-clobber $eflags
     INLINEASM &foo, 0, 4390922, def $rsi, 4390922, def dead $rdi, 2147549193, killed $rdi(tied-def 5), 2147483657, killed $rsi(tied-def 3), 12, implicit-def dead early-clobber $eflags
     $rax = MOV64rr killed $rsi
-    RETQ killed $rax
+    RET64 killed $rax
 ...
diff --git a/llvm/test/CodeGen/MIR/X86/instr-symbols-and-mcsymbol-operands.mir b/llvm/test/CodeGen/MIR/X86/instr-symbols-and-mcsymbol-operands.mir
--- a/llvm/test/CodeGen/MIR/X86/instr-symbols-and-mcsymbol-operands.mir
+++ b/llvm/test/CodeGen/MIR/X86/instr-symbols-and-mcsymbol-operands.mir
@@ -77,6 +77,6 @@
     %7:gr64 = ADD64rr killed %4, killed %5, implicit-def $eflags
     %8:gr64 = ADD64rr killed %6, killed %7, implicit-def $eflags
     $rax = COPY %8
-    RETQ implicit $rax
+    RET64 implicit $rax
 
 ...
diff --git a/llvm/test/CodeGen/MIR/X86/instructions-debug-location.mir b/llvm/test/CodeGen/MIR/X86/instructions-debug-location.mir
--- a/llvm/test/CodeGen/MIR/X86/instructions-debug-location.mir
+++ b/llvm/test/CodeGen/MIR/X86/instructions-debug-location.mir
@@ -75,7 +75,7 @@
     ; CHECK: DBG_VALUE $noreg, 0, !11, !DIExpression(), debug-location !12
     ; CHECK: DBG_VALUE $noreg, 0, !11, !DIExpression(), debug-location !12
     ; CHECK: $eax = COPY %0, debug-location !13
-    ; CHECK: RETQ $eax, debug-location !13
+    ; CHECK: RET64 $eax, debug-location !13
     %0 = COPY $edi
     DBG_VALUE _, 0, !12, !DIExpression(), debug-location !13
     ; Test whether debug-use is still recognized for compatibility with old
@@ -83,7 +83,7 @@
     DBG_VALUE debug-use _, 0, !12, !DIExpression(), debug-location !13
     MOV32mr %stack.0.x.addr, 1, _, 0, _, %0
     $eax = COPY %0, debug-location !14
-    RETQ $eax, debug-location !14
+    RET64 $eax, debug-location !14
 ...
 ---
 name:            test_typed_immediates
@@ -107,7 +107,7 @@
     DBG_VALUE _, i128 123492148938512984928424384934328985928, !12, !DIExpression(), debug-location !13
     MOV32mr %stack.0.x.addr, 1, _, 0, _, %0
     $eax = COPY %0
-    RETQ $eax
+    RET64 $eax
 ...
 ---
 name:            test_mir_created
@@ -135,5 +135,5 @@
     MOV32mr %stack.0.x.addr, 1, _, 0, _, %0, debug-location !DILocation(line: 4, scope: !15, inlinedAt: !16)
     MOV32mr %stack.0.x.addr, 1, _, 0, _, %0, debug-location !DILocation(line: 5, scope: !15, inlinedAt: !DILocation(line: 4, scope: !15))
     $eax = COPY %0
-    RETQ $eax
+    RET64 $eax
 ...
diff --git a/llvm/test/CodeGen/MIR/X86/invalid-constant-pool-item.mir b/llvm/test/CodeGen/MIR/X86/invalid-constant-pool-item.mir
--- a/llvm/test/CodeGen/MIR/X86/invalid-constant-pool-item.mir
+++ b/llvm/test/CodeGen/MIR/X86/invalid-constant-pool-item.mir
@@ -20,6 +20,6 @@
   bb.0.entry:
     ; CHECK: [[@LINE+1]]:47: use of undefined constant '%const.10'
     $xmm0 = ADDSDrm killed $xmm0, $rip, 1, _, %const.10, _
-    RETQ $xmm0
+    RET64 $xmm0
 ...
 
diff --git a/llvm/test/CodeGen/MIR/X86/invalid-target-flag-name.mir b/llvm/test/CodeGen/MIR/X86/invalid-target-flag-name.mir
--- a/llvm/test/CodeGen/MIR/X86/invalid-target-flag-name.mir
+++ b/llvm/test/CodeGen/MIR/X86/invalid-target-flag-name.mir
@@ -20,5 +20,5 @@
     $rax = MOV64rm $rip, 1, _, target-flags(x86-test) @G, _
     $eax = MOV32rm killed $rax, 1, _, 0, _
     $eax = INC32r killed $eax, implicit-def dead $eflags
-    RETQ $eax
+    RET64 $eax
 ...
diff --git a/llvm/test/CodeGen/MIR/X86/invalid-tied-def-index-error.mir b/llvm/test/CodeGen/MIR/X86/invalid-tied-def-index-error.mir
--- a/llvm/test/CodeGen/MIR/X86/invalid-tied-def-index-error.mir
+++ b/llvm/test/CodeGen/MIR/X86/invalid-tied-def-index-error.mir
@@ -20,5 +20,5 @@
   ; CHECK: [[@LINE+1]]:58: use of invalid tied-def operand index '300'; instruction has only 6 operands
     INLINEASM &"$foo", 1, 2818058, def $rdi, 2147483657, killed $rdi(tied-def 300)
     $rax = COPY killed $rdi
-    RETQ killed $rax
+    RET64 killed $rax
 ...
diff --git a/llvm/test/CodeGen/MIR/X86/jump-table-info.mir b/llvm/test/CodeGen/MIR/X86/jump-table-info.mir
--- a/llvm/test/CodeGen/MIR/X86/jump-table-info.mir
+++ b/llvm/test/CodeGen/MIR/X86/jump-table-info.mir
@@ -86,23 +86,23 @@
 
   bb.2.def:
     $eax = MOV32r0 implicit-def $eflags
-    RETQ $eax
+    RET64 $eax
 
   bb.3.lbl1:
     $eax = MOV32ri 1
-    RETQ $eax
+    RET64 $eax
 
   bb.4.lbl2:
     $eax = MOV32ri 2
-    RETQ $eax
+    RET64 $eax
 
   bb.5.lbl3:
     $eax = MOV32ri 4
-    RETQ $eax
+    RET64 $eax
 
   bb.6.lbl4:
     $eax = MOV32ri 8
-    RETQ $eax
+    RET64 $eax
 ...
 ---
 name:            test_jumptable2
@@ -130,21 +130,21 @@
 
   bb.2.def:
     $eax = MOV32r0 implicit-def $eflags
-    RETQ $eax
+    RET64 $eax
 
   bb.3.lbl1:
     $eax = MOV32ri 1
-    RETQ $eax
+    RET64 $eax
 
   bb.4.lbl2:
     $eax = MOV32ri 2
-    RETQ $eax
+    RET64 $eax
 
   bb.5.lbl3:
     $eax = MOV32ri 4
-    RETQ $eax
+    RET64 $eax
 
   bb.6.lbl4:
     $eax = MOV32ri 8
-    RETQ $eax
+    RET64 $eax
 ...
diff --git a/llvm/test/CodeGen/MIR/X86/jump-table-redefinition-error.mir b/llvm/test/CodeGen/MIR/X86/jump-table-redefinition-error.mir
--- a/llvm/test/CodeGen/MIR/X86/jump-table-redefinition-error.mir
+++ b/llvm/test/CodeGen/MIR/X86/jump-table-redefinition-error.mir
@@ -56,21 +56,21 @@
 
   bb.2.def:
     $eax = MOV32r0 implicit-def $eflags
-    RETQ $eax
+    RET64 $eax
 
   bb.3.lbl1:
     $eax = MOV32ri 1
-    RETQ $eax
+    RET64 $eax
 
   bb.4.lbl2:
     $eax = MOV32ri 2
-    RETQ $eax
+    RET64 $eax
 
   bb.5.lbl3:
     $eax = MOV32ri 4
-    RETQ $eax
+    RET64 $eax
 
   bb.6.lbl4:
     $eax = MOV32ri 8
-    RETQ $eax
+    RET64 $eax
 ...
diff --git a/llvm/test/CodeGen/MIR/X86/killed-register-flag.mir b/llvm/test/CodeGen/MIR/X86/killed-register-flag.mir
--- a/llvm/test/CodeGen/MIR/X86/killed-register-flag.mir
+++ b/llvm/test/CodeGen/MIR/X86/killed-register-flag.mir
@@ -28,13 +28,13 @@
 
   bb.1.less:
     ; CHECK:      $eax = MOV32r0
-    ; CHECK-NEXT: RETQ killed $eax
+    ; CHECK-NEXT: RET64 killed $eax
     $eax = MOV32r0 implicit-def $eflags
-    RETQ killed $eax
+    RET64 killed $eax
 
   bb.2.exit:
     ; CHECK:      $eax = COPY killed $edi
-    ; CHECK-NEXT: RETQ killed $eax
+    ; CHECK-NEXT: RET64 killed $eax
     $eax = COPY killed $edi
-    RETQ killed $eax
+    RET64 killed $eax
 ...
diff --git a/llvm/test/CodeGen/MIR/X86/large-cfi-offset-number-error.mir b/llvm/test/CodeGen/MIR/X86/large-cfi-offset-number-error.mir
--- a/llvm/test/CodeGen/MIR/X86/large-cfi-offset-number-error.mir
+++ b/llvm/test/CodeGen/MIR/X86/large-cfi-offset-number-error.mir
@@ -22,6 +22,6 @@
     ; CHECK: [[@LINE+1]]:36: expected a 32 bit integer (the cfi offset is too large)
     CFI_INSTRUCTION def_cfa_offset 123456789123456
     $rsp = ADD64ri32 $rsp, 4040, implicit-def dead $eflags
-    RETQ
+    RET64
 ...
 
diff --git a/llvm/test/CodeGen/MIR/X86/large-immediate-operand-error.mir b/llvm/test/CodeGen/MIR/X86/large-immediate-operand-error.mir
--- a/llvm/test/CodeGen/MIR/X86/large-immediate-operand-error.mir
+++ b/llvm/test/CodeGen/MIR/X86/large-immediate-operand-error.mir
@@ -14,5 +14,5 @@
   bb.0.entry:
   ; CHECK: [[@LINE+1]]:20: integer literal is too large to be an immediate operand
     $eax = MOV32ri 12346127502983478823754212949184914
-    RETQ $eax
+    RET64 $eax
 ...
diff --git a/llvm/test/CodeGen/MIR/X86/large-index-number-error.mir b/llvm/test/CodeGen/MIR/X86/large-index-number-error.mir
--- a/llvm/test/CodeGen/MIR/X86/large-index-number-error.mir
+++ b/llvm/test/CodeGen/MIR/X86/large-index-number-error.mir
@@ -29,5 +29,5 @@
     $eax = MOV32r0 implicit-def $eflags
 
   bb.2:
-    RETQ $eax
+    RET64 $eax
 ...
diff --git a/llvm/test/CodeGen/MIR/X86/large-offset-number-error.mir b/llvm/test/CodeGen/MIR/X86/large-offset-number-error.mir
--- a/llvm/test/CodeGen/MIR/X86/large-offset-number-error.mir
+++ b/llvm/test/CodeGen/MIR/X86/large-offset-number-error.mir
@@ -20,5 +20,5 @@
     $rax = MOV64rm $rip, 1, _, @G + 123456789123456789123456789, _
     $eax = MOV32rm $rax, 1, _, 0, _
     $eax = INC32r $eax implicit-def $eflags
-    RETQ $eax
+    RET64 $eax
 ...
diff --git a/llvm/test/CodeGen/MIR/X86/large-size-in-memory-operand-error.mir b/llvm/test/CodeGen/MIR/X86/large-size-in-memory-operand-error.mir
--- a/llvm/test/CodeGen/MIR/X86/large-size-in-memory-operand-error.mir
+++ b/llvm/test/CodeGen/MIR/X86/large-size-in-memory-operand-error.mir
@@ -19,6 +19,6 @@
     liveins: $rdi
   ; CHECK: [[@LINE+1]]:53: expected 64-bit integer (too large)
     $eax = MOV32rm killed $rdi, 1, _, 0, _ :: (load 12345678912345678924218574857 from %ir.a)
-    RETQ $eax
+    RET64 $eax
 ...
 
diff --git a/llvm/test/CodeGen/MIR/X86/liveout-register-mask.mir b/llvm/test/CodeGen/MIR/X86/liveout-register-mask.mir
--- a/llvm/test/CodeGen/MIR/X86/liveout-register-mask.mir
+++ b/llvm/test/CodeGen/MIR/X86/liveout-register-mask.mir
@@ -38,5 +38,5 @@
   ; CHECK: PATCHPOINT 5, 5, 0, 2, 0, $rdi, $rsi, csr_64, liveout($esp, $rsp, $sp, $spl),
     PATCHPOINT 5, 5, 0, 2, 0, $rdi, $rsi, csr_64, liveout($esp, $rsp, $sp, $spl), implicit-def dead early-clobber $r11, implicit-def $rsp, implicit-def dead $rax
     $rbp = POP64r implicit-def $rsp, implicit $rsp
-    RETQ
+    RET64
 ...
diff --git a/llvm/test/CodeGen/MIR/X86/load-with-max-alignment.mir b/llvm/test/CodeGen/MIR/X86/load-with-max-alignment.mir
--- a/llvm/test/CodeGen/MIR/X86/load-with-max-alignment.mir
+++ b/llvm/test/CodeGen/MIR/X86/load-with-max-alignment.mir
@@ -21,7 +21,7 @@
     liveins: $rdi
 
     renamable $eax = MOV32rm killed renamable $rdi, 1, $noreg, 0, $noreg :: (load (s32) from unknown-address, align 4294967296)
-    RETQ $eax
+    RET64 $eax
 
 ...
 ---
@@ -39,6 +39,6 @@
     liveins: $rdi
 
     renamable $eax = MOV32rm killed renamable $rdi, 1, $noreg, 0, $noreg :: (load (s32) from unknown-address + 4, basealign 4294967296)
-    RETQ $eax
+    RET64 $eax
 
 ...
diff --git a/llvm/test/CodeGen/MIR/X86/machine-basic-block-operands.mir b/llvm/test/CodeGen/MIR/X86/machine-basic-block-operands.mir
--- a/llvm/test/CodeGen/MIR/X86/machine-basic-block-operands.mir
+++ b/llvm/test/CodeGen/MIR/X86/machine-basic-block-operands.mir
@@ -49,7 +49,7 @@
     $eax = MOV32r0 implicit-def $eflags
 
   bb.2.exit:
-    RETQ $eax
+    RET64 $eax
 ...
 ---
 # CHECK: name: bar
@@ -69,5 +69,5 @@
     $eax = MOV32r0 implicit-def $eflags
 
   bb.3:
-    RETQ $eax
+    RET64 $eax
 ...
diff --git a/llvm/test/CodeGen/MIR/X86/machine-instructions.mir b/llvm/test/CodeGen/MIR/X86/machine-instructions.mir
--- a/llvm/test/CodeGen/MIR/X86/machine-instructions.mir
+++ b/llvm/test/CodeGen/MIR/X86/machine-instructions.mir
@@ -17,7 +17,7 @@
 body: |
   bb.0.entry:
     ; CHECK:      MOV32rr
-    ; CHECK-NEXT: RETQ
+    ; CHECK-NEXT: RET64
     $eax = MOV32rr $eax
-     RETQ $eax
+     RET64 $eax
 ...
diff --git a/llvm/test/CodeGen/MIR/X86/machine-verifier.mir b/llvm/test/CodeGen/MIR/X86/machine-verifier.mir
--- a/llvm/test/CodeGen/MIR/X86/machine-verifier.mir
+++ b/llvm/test/CodeGen/MIR/X86/machine-verifier.mir
@@ -19,5 +19,5 @@
    ; CHECK: instruction: COPY
    ; CHECK: 2 operands expected, but 0 given.
     COPY
-    RETQ
+    RET64
 ...
diff --git a/llvm/test/CodeGen/MIR/X86/memory-operands.mir b/llvm/test/CodeGen/MIR/X86/memory-operands.mir
--- a/llvm/test/CodeGen/MIR/X86/memory-operands.mir
+++ b/llvm/test/CodeGen/MIR/X86/memory-operands.mir
@@ -205,7 +205,7 @@
   ; CHECK-NEXT: MOV32mi killed $rdi, 1, $noreg, 0, $noreg, 42 :: (store (s32) into %ir.a)
     $eax = MOV32rm $rdi, 1, _, 0, _ :: (load (s32) from %ir.a)
     MOV32mi killed $rdi, 1, _, 0, _, 42 :: (store (s32) into %ir.a)
-    RETQ $eax
+    RET64 $eax
 ...
 ---
 name:            test2
@@ -217,7 +217,7 @@
     liveins: $rdi
   ; CHECK: INC32m killed $rdi, 1, $noreg, 0, $noreg, implicit-def dead $eflags :: (store (s32) into %ir."a value"), (load (s32) from %ir."a value")
     INC32m killed $rdi, 1, _, 0, _, implicit-def dead $eflags :: (store (s32) into %ir."a value"), (load (s32) from %ir."a value")
-    RETQ
+    RET64
 ...
 ---
 name:            test3
@@ -238,7 +238,7 @@
     $eax = MOV32rm killed $rdi, 1, _, 0, _ :: (load (s32) from %ir.0)
     $eax = INC32r killed $eax, implicit-def dead $eflags
     MOV32mr $rsp, 1, _, -4, _, killed $eax :: (store (s32) into %ir.1)
-    RETQ
+    RET64
 ...
 ---
 name:            volatile_inc
@@ -254,7 +254,7 @@
     $eax = MOV32rm $rdi, 1, _, 0, _ :: (volatile load (s32) from %ir.x)
     $eax = INC32r killed $eax, implicit-def dead $eflags
     MOV32mr killed $rdi, 1, _, 0, _, $eax :: (volatile store (s32) into %ir.x)
-    RETQ $eax
+    RET64 $eax
 ...
 ---
 name:            non_temporal_store
@@ -268,7 +268,7 @@
   ; CHECK: name: non_temporal_store
   ; CHECK: MOVNTImr killed $rdi, 1, $noreg, 0, $noreg, killed $esi :: (non-temporal store (s32) into %ir.a)
     MOVNTImr killed $rdi, 1, _, 0, _, killed $esi :: (non-temporal store (s32) into %ir.a)
-    RETQ
+    RET64
 ...
 ---
 name:            invariant_load
@@ -281,7 +281,7 @@
   ; CHECK: name: invariant_load
   ; CHECK: $eax = MOV32rm killed $rdi, 1, $noreg, 0, $noreg :: (invariant load (s32) from %ir.x)
     $eax = MOV32rm killed $rdi, 1, _, 0, _ :: (invariant load (s32) from %ir.x)
-    RETQ $eax
+    RET64 $eax
 ...
 ---
 name:            memory_offset
@@ -302,7 +302,7 @@
     $xmm1 = MOVSSrr killed $xmm1, killed $xmm2
     MOVAPSmr $rdi, 1, _, 0, _, killed $xmm0 :: (store (s128) into %ir.vec)
     MOVAPSmr killed $rdi, 1, _, 16, _, killed $xmm1 :: (store (s128) into %ir.vec + 16)
-    RETQ
+    RET64
 ...
 ---
 name:            memory_alignment
@@ -331,7 +331,7 @@
     MOVAPSmr $rdi, 1, _, 16, _, killed $xmm1 :: (store (s128) into %ir.vec + 16, basealign 64)
     MOVAPSmr $rdi, 1, _, 32, _, killed $xmm2 :: (store (s128) into %ir.vec + 32, align 32, basealign 64)
     MOVAPSmr killed $rdi, 1, _, 48, _, killed $xmm3 :: (store (s128) into %ir.vec + 48, basealign 64)
-    RETQ
+    RET64
 ...
 ---
 name:            constant_pool_psv
@@ -349,7 +349,7 @@
   ; CHECK-NEXT: $xmm0 = ADDSDrm killed $xmm0, $rip, 1, $noreg, %const.0, $noreg, implicit $mxcsr :: (load (s64) from constant-pool + 8)
     $xmm0 = ADDSDrm killed $xmm0, $rip, 1, _, %const.0, _, implicit $mxcsr :: (load (s64) from constant-pool)
     $xmm0 = ADDSDrm killed $xmm0, $rip, 1, _, %const.0, _, implicit $mxcsr :: (load (s64) from constant-pool + 8)
-    RETQ $xmm0
+    RET64 $xmm0
 ...
 ---
 name:            stack_psv
@@ -372,7 +372,7 @@
     ST_FP80m $rsp, 1, _, 0, _, implicit-def dead $fpsw, implicit $fpcw :: (store (s80) into stack, align 16)
     CALL64pcrel32 &cosl, csr_64, implicit $rsp, implicit-def $rsp, implicit-def $fp0
     $rsp = ADD64ri8 $rsp, 24, implicit-def dead $eflags
-    RETQ
+    RET64
 ...
 ---
 name:            got_psv
@@ -384,7 +384,7 @@
     $rax = MOV64rm $rip, 1, _, @G, _ :: (load (s64) from got)
     $eax = MOV32rm killed $rax, 1, _, 0, _
     $eax = INC32r killed $eax, implicit-def dead $eflags
-    RETQ $eax
+    RET64 $eax
 ...
 ---
 name:            global_value
@@ -399,7 +399,7 @@
     $rcx = MOV64rm $rip, 1, _, @0, _
     $ecx = MOV32rm killed $rcx, 1, _, 0, _, implicit-def $rcx :: (load (s32) from @0)
     $eax = LEA64_32r killed $rax, 1, killed $rcx, 1, _
-    RETQ $eax
+    RET64 $eax
 ...
 ---
 name:            jumptable_psv
@@ -433,23 +433,23 @@
 
   bb.2.def:
     $eax = MOV32r0 implicit-def dead $eflags
-    RETQ $eax
+    RET64 $eax
 
   bb.3.lbl1:
     $eax = MOV32ri 1
-    RETQ $eax
+    RET64 $eax
 
   bb.4.lbl2:
     $eax = MOV32ri 2
-    RETQ $eax
+    RET64 $eax
 
   bb.5.lbl3:
     $eax = MOV32ri 4
-    RETQ $eax
+    RET64 $eax
 
   bb.6.lbl4:
     $eax = MOV32ri 8
-    RETQ $eax
+    RET64 $eax
 ...
 ---
 name:            tbaa_metadata
@@ -462,7 +462,7 @@
   ; CHECK-NEXT: $eax = MOV32rm killed $rax, 1, $noreg, 0, $noreg :: (load (s32) from %ir.total_len2, !tbaa !6)
     $eax = MOV32rm killed $rax, 1, _, 0, _, implicit-def $rax :: (load (s32) from @a, !tbaa !2)
     $eax = MOV32rm killed $rax, 1, _, 0, _ :: (load (s32) from %ir.total_len2, !tbaa !6)
-    RETQ $eax
+    RET64 $eax
 ...
 ---
 name:            aa_scope
@@ -480,7 +480,7 @@
     MOVSSmr $rdi, 1, _, 20, _, killed $xmm0 :: (store (s32) into %ir.arrayidx.i, !noalias !9)
     $xmm0 = MOVSSrm_alt killed $rsi, 1, _, 0, _ :: (load (s32) from %ir.c)
     MOVSSmr killed $rdi, 1, _, 28, _, killed $xmm0 :: (store (s32) into %ir.arrayidx)
-    RETQ
+    RET64
 ...
 ---
 name:            range_metadata
@@ -493,7 +493,7 @@
   ; CHECK-LABEL: name: range_metadata
   ; CHECK: $al = MOV8rm killed $rdi, 1, $noreg, 0, $noreg :: (load (s8) from %ir.x, !range !11)
     $al = MOV8rm killed $rdi, 1, _, 0, _ :: (load (s8) from %ir.x, !range !11)
-    RETQ $al
+    RET64 $al
 ...
 ---
 name:            gep_value
@@ -508,7 +508,7 @@
   ; CHECK-LABEL: gep_value
   ; CHECK: MOV32mr killed $rax, 1, $noreg, 0, $noreg, $edi, implicit killed $rdi :: (store (s32) into `i32* getelementptr inbounds ([50 x %st], [50 x %st]* @values, i64 0, i64 0, i32 0)`, align 16)
     MOV32mr killed $rax, 1, _, 0, _, $edi, implicit killed $rdi :: (store (s32) into `i32* getelementptr inbounds ([50 x %st], [50 x %st]* @values, i64 0, i64 0, i32 0)`, align 16)
-    RETQ
+    RET64
 ...
 ---
 name:            undef_value
@@ -518,7 +518,7 @@
   ; CHECK-LABEL: name: undef_value
   ; CHECK: $rax = MOV64rm undef $rax, 1, $noreg, 0, $noreg :: (load (s64) from `i8** undef`)
     $rax = MOV64rm undef $rax, 1, _, 0, _ :: (load (s64) from `i8** undef`)
-    RETQ $rax
+    RET64 $rax
 ...
 ---
 # Test memory operand without associated value.
@@ -529,7 +529,7 @@
 body: |
   bb.0:
     $rax = MOV64rm undef $rax, 1, _, 0, _ :: (load (s64))
-    RETQ $rax
+    RET64 $rax
 ...
 ---
 # Test parsing of stack references in machine memory operands.
@@ -542,7 +542,7 @@
 body: |
   bb.0:
     $rax = MOV64rm $rsp, 1, _, 0, _ :: (load (s64) from %stack.0)
-    RETQ $rax
+    RET64 $rax
 ...
 ---
 # Test parsing of unknown size in machine memory operands without alignment.
@@ -555,7 +555,7 @@
 body: |
   bb.0:
     $rax = MOV64rm $rsp, 1, _, 0, _ :: (load unknown-size from %stack.0)
-    RETQ $rax
+    RET64 $rax
 ...
 ---
 # Test parsing of unknown size in machine memory operands with alignment.
@@ -568,5 +568,5 @@
 body: |
   bb.0:
     $rax = MOV64rm $rsp, 1, _, 0, _ :: (load unknown-size from %stack.0, align 4)
-    RETQ $rax
+    RET64 $rax
 ...
diff --git a/llvm/test/CodeGen/MIR/X86/metadata-operands.mir b/llvm/test/CodeGen/MIR/X86/metadata-operands.mir
--- a/llvm/test/CodeGen/MIR/X86/metadata-operands.mir
+++ b/llvm/test/CodeGen/MIR/X86/metadata-operands.mir
@@ -56,5 +56,5 @@
     DBG_VALUE _, 0, !12, !DIExpression(), debug-location !13
     MOV32mr %stack.0.x.addr, 1, _, 0, _, %0
     $eax = COPY %0
-    RETQ $eax
+    RET64 $eax
 ...
diff --git a/llvm/test/CodeGen/MIR/X86/missing-closing-quote.mir b/llvm/test/CodeGen/MIR/X86/missing-closing-quote.mir
--- a/llvm/test/CodeGen/MIR/X86/missing-closing-quote.mir
+++ b/llvm/test/CodeGen/MIR/X86/missing-closing-quote.mir
@@ -18,5 +18,5 @@
     ; CHECK: [[@LINE+1]]:48: end of machine instruction reached before the closing '"'
     $rax = MOV64rm $rip, 1, _, @"quoted name, _
     $eax = MOV32rm killed $rax, 1, _, 0, _
-    RETQ $eax
+    RET64 $eax
 ...
diff --git a/llvm/test/CodeGen/MIR/X86/missing-comma.mir b/llvm/test/CodeGen/MIR/X86/missing-comma.mir
--- a/llvm/test/CodeGen/MIR/X86/missing-comma.mir
+++ b/llvm/test/CodeGen/MIR/X86/missing-comma.mir
@@ -14,6 +14,6 @@
   bb.0.entry:
     ; CHECK: [[@LINE+1]]:25: expected ',' before the next machine operand
     $eax = XOR32rr $eax $eflags
-    RETQ $eax
+    RET64 $eax
 ...
 
diff --git a/llvm/test/CodeGen/MIR/X86/missing-implicit-operand.mir b/llvm/test/CodeGen/MIR/X86/missing-implicit-operand.mir
--- a/llvm/test/CodeGen/MIR/X86/missing-implicit-operand.mir
+++ b/llvm/test/CodeGen/MIR/X86/missing-implicit-operand.mir
@@ -34,5 +34,5 @@
     $eax = MOV32r0 implicit-def $eflags
 
   bb.2.exit:
-    RETQ $eax
+    RET64 $eax
 ...
diff --git a/llvm/test/CodeGen/MIR/X86/named-registers.mir b/llvm/test/CodeGen/MIR/X86/named-registers.mir
--- a/llvm/test/CodeGen/MIR/X86/named-registers.mir
+++ b/llvm/test/CodeGen/MIR/X86/named-registers.mir
@@ -15,7 +15,7 @@
 body: |
   bb.0.entry:
     ; CHECK:      $eax = MOV32r0
-    ; CHECK-NEXT: RETQ $eax
+    ; CHECK-NEXT: RET64 $eax
     $eax = MOV32r0 implicit-def $eflags
-    RETQ $eax
+    RET64 $eax
 ...
diff --git a/llvm/test/CodeGen/MIR/X86/newline-handling.mir b/llvm/test/CodeGen/MIR/X86/newline-handling.mir
--- a/llvm/test/CodeGen/MIR/X86/newline-handling.mir
+++ b/llvm/test/CodeGen/MIR/X86/newline-handling.mir
@@ -42,12 +42,12 @@
 
 # CHECK:      bb.1.less:
 # CHECK-NEXT: $eax = MOV32r0 implicit-def dead $eflags
-# CHECK-NEXT: RETQ killed $eax
+# CHECK-NEXT: RET64 killed $eax
 
 # CHECK:      bb.2.exit:
 # CHECK-NEXT: liveins: $edi
 # CHECK:      $eax = COPY killed $edi
-# CHECK-NEXT: RETQ killed $eax
+# CHECK-NEXT: RET64 killed $eax
 body: |
   bb.0.entry:
     successors: %bb.1, %bb.2
@@ -62,13 +62,13 @@
 
 
     $eax = MOV32r0 implicit-def dead $eflags
-    RETQ killed $eax
+    RET64 killed $eax
   bb.2.exit:
 
 
     liveins: $edi
     $eax = COPY killed $edi
-    RETQ killed $eax
+    RET64 killed $eax
 
 ...
 ---
@@ -86,12 +86,12 @@
 
 # CHECK:      bb.1.less:
 # CHECK-NEXT: $eax = MOV32r0 implicit-def dead $eflags
-# CHECK-NEXT: RETQ killed $eax
+# CHECK-NEXT: RET64 killed $eax
 
 # CHECK:      bb.2.exit:
 # CHECK-NEXT: liveins: $edi
 # CHECK:      $eax = COPY killed $edi
-# CHECK-NEXT: RETQ killed $eax
+# CHECK-NEXT: RET64 killed $eax
 body: |
 
   bb.0.entry:
@@ -100,10 +100,10 @@
     CMP32ri8 $edi, 10, implicit-def $eflags
     JCC_1 %bb.2, 15, implicit killed $eflags
   bb.1.less:  $eax = MOV32r0 implicit-def dead $eflags
-              RETQ killed $eax
+              RET64 killed $eax
 
   bb.2.exit:  liveins: $edi
     $eax = COPY killed $edi
-    RETQ killed $eax
+    RET64 killed $eax
 
 ...
diff --git a/llvm/test/CodeGen/MIR/X86/null-register-operands.mir b/llvm/test/CodeGen/MIR/X86/null-register-operands.mir
--- a/llvm/test/CodeGen/MIR/X86/null-register-operands.mir
+++ b/llvm/test/CodeGen/MIR/X86/null-register-operands.mir
@@ -16,7 +16,7 @@
 body: |
   bb.0.entry:
     ; CHECK:      $eax = MOV32rm $rdi, 1, $noreg, 0, $noreg
-    ; CHECK-NEXT: RETQ $eax
+    ; CHECK-NEXT: RET64 $eax
     $eax = MOV32rm $rdi, 1, _, 0, $noreg
-    RETQ $eax
+    RET64 $eax
 ...
diff --git a/llvm/test/CodeGen/MIR/X86/register-mask-operands.mir b/llvm/test/CodeGen/MIR/X86/register-mask-operands.mir
--- a/llvm/test/CodeGen/MIR/X86/register-mask-operands.mir
+++ b/llvm/test/CodeGen/MIR/X86/register-mask-operands.mir
@@ -23,7 +23,7 @@
 body: |
   bb.0.body:
     $eax = IMUL32rri8 $edi, 11, implicit-def $eflags
-    RETQ $eax
+    RET64 $eax
 ...
 ---
 # CHECK: name: foo
@@ -35,5 +35,5 @@
     PUSH64r $rax, implicit-def $rsp, implicit $rsp
     CALL64pcrel32 @compute, csr_64, implicit $rsp, implicit $edi, implicit-def $rsp, implicit-def $eax
     $rdx = POP64r implicit-def $rsp, implicit $rsp
-    RETQ $eax
+    RET64 $eax
 ...
diff --git a/llvm/test/CodeGen/MIR/X86/register-operands-target-flag-error.mir b/llvm/test/CodeGen/MIR/X86/register-operands-target-flag-error.mir
--- a/llvm/test/CodeGen/MIR/X86/register-operands-target-flag-error.mir
+++ b/llvm/test/CodeGen/MIR/X86/register-operands-target-flag-error.mir
@@ -20,5 +20,5 @@
     $rax = MOV64rm target-flags(x86-got) $rip, 1, _, @G, _
     $eax = MOV32rm killed $rax, 1, _, 0, _
     $eax = INC32r killed $eax, implicit-def dead $eflags
-    RETQ $eax
+    RET64 $eax
 ...
diff --git a/llvm/test/CodeGen/MIR/X86/renamable-register-flag.mir b/llvm/test/CodeGen/MIR/X86/renamable-register-flag.mir
--- a/llvm/test/CodeGen/MIR/X86/renamable-register-flag.mir
+++ b/llvm/test/CodeGen/MIR/X86/renamable-register-flag.mir
@@ -12,5 +12,5 @@
   bb.0:
     ; CHECK: renamable $eax = IMUL32rri8 $edi, 11, implicit-def dead $eflags
     renamable $eax = IMUL32rri8 $edi, 11, implicit-def dead $eflags
-    RETQ $eax
+    RET64 $eax
 ...
diff --git a/llvm/test/CodeGen/MIR/X86/roundtrip.mir b/llvm/test/CodeGen/MIR/X86/roundtrip.mir
--- a/llvm/test/CodeGen/MIR/X86/roundtrip.mir
+++ b/llvm/test/CodeGen/MIR/X86/roundtrip.mir
@@ -9,12 +9,12 @@
 # CHECK:     %0:gr32 = MOV32r0 implicit-def $eflags
 # CHECK:     dead %1:gr32 = COPY %0
 # CHECK:     MOV32mr undef $rcx, 1, $noreg, 0, $noreg, killed %0 :: (volatile store (s32))
-# CHECK:     RETQ undef $eax
+# CHECK:     RET64 undef $eax
 name: func0
 body: |
   bb.0:
     %0 : gr32 = MOV32r0 implicit-def $eflags
     dead %1 : gr32 = COPY %0
     MOV32mr undef $rcx, 1, _, 0, _, killed %0 :: (volatile store (s32))
-    RETQ undef $eax
+    RET64 undef $eax
 ...
diff --git a/llvm/test/CodeGen/MIR/X86/simple-register-allocation-hints.mir b/llvm/test/CodeGen/MIR/X86/simple-register-allocation-hints.mir
--- a/llvm/test/CodeGen/MIR/X86/simple-register-allocation-hints.mir
+++ b/llvm/test/CodeGen/MIR/X86/simple-register-allocation-hints.mir
@@ -30,5 +30,5 @@
     %2 = COPY $edi
     %2 = IMUL32rr %2, %1, implicit-def dead $eflags
     $eax = COPY %2
-    RETQ killed $eax
+    RET64 killed $eax
 ...
diff --git a/llvm/test/CodeGen/MIR/X86/spill-slot-fixed-stack-object-aliased.mir b/llvm/test/CodeGen/MIR/X86/spill-slot-fixed-stack-object-aliased.mir
--- a/llvm/test/CodeGen/MIR/X86/spill-slot-fixed-stack-object-aliased.mir
+++ b/llvm/test/CodeGen/MIR/X86/spill-slot-fixed-stack-object-aliased.mir
@@ -26,5 +26,5 @@
   bb.0.entry:
     MOV32mr %rsp, 1, _, -4, _, %edi
     %eax = COPY %edi
-    RETQ %eax
+    RET64 %eax
 ...
diff --git a/llvm/test/CodeGen/MIR/X86/spill-slot-fixed-stack-object-immutable.mir b/llvm/test/CodeGen/MIR/X86/spill-slot-fixed-stack-object-immutable.mir
--- a/llvm/test/CodeGen/MIR/X86/spill-slot-fixed-stack-object-immutable.mir
+++ b/llvm/test/CodeGen/MIR/X86/spill-slot-fixed-stack-object-immutable.mir
@@ -26,5 +26,5 @@
   bb.0.entry:
     MOV32mr %rsp, 1, _, -4, _, %edi
     %eax = COPY %edi
-    RETQ %eax
+    RET64 %eax
 ...
diff --git a/llvm/test/CodeGen/MIR/X86/spill-slot-fixed-stack-objects.mir b/llvm/test/CodeGen/MIR/X86/spill-slot-fixed-stack-objects.mir
--- a/llvm/test/CodeGen/MIR/X86/spill-slot-fixed-stack-objects.mir
+++ b/llvm/test/CodeGen/MIR/X86/spill-slot-fixed-stack-objects.mir
@@ -30,5 +30,5 @@
   bb.0.entry:
     MOV32mr $rsp, 1, _, -4, _, $edi
     $eax = COPY $edi
-    RETQ $eax
+    RET64 $eax
 ...
diff --git a/llvm/test/CodeGen/MIR/X86/stack-object-invalid-name.mir b/llvm/test/CodeGen/MIR/X86/stack-object-invalid-name.mir
--- a/llvm/test/CodeGen/MIR/X86/stack-object-invalid-name.mir
+++ b/llvm/test/CodeGen/MIR/X86/stack-object-invalid-name.mir
@@ -24,5 +24,5 @@
   bb.0.entry:
     MOV32mr $rsp, 1, _, -4, _, $edi
     $eax = MOV32rm $rsp, 1, _, -4, _
-    RETQ $eax
+    RET64 $eax
 ...
diff --git a/llvm/test/CodeGen/MIR/X86/stack-object-operand-name-mismatch-error.mir b/llvm/test/CodeGen/MIR/X86/stack-object-operand-name-mismatch-error.mir
--- a/llvm/test/CodeGen/MIR/X86/stack-object-operand-name-mismatch-error.mir
+++ b/llvm/test/CodeGen/MIR/X86/stack-object-operand-name-mismatch-error.mir
@@ -28,5 +28,5 @@
     ; CHECK: [[@LINE+1]]:13: the name of the stack object '%stack.0' isn't 'x'
     MOV32mr %stack.0.x, 1, _, 0, _, %0
     $eax = COPY %0
-    RETQ $eax
+    RET64 $eax
 ...
diff --git a/llvm/test/CodeGen/MIR/X86/stack-object-operands.mir b/llvm/test/CodeGen/MIR/X86/stack-object-operands.mir
--- a/llvm/test/CodeGen/MIR/X86/stack-object-operands.mir
+++ b/llvm/test/CodeGen/MIR/X86/stack-object-operands.mir
@@ -37,11 +37,11 @@
     ; CHECK: MOV32mi %stack.1, 1, $noreg, 0, $noreg, 2
     ; CHECK: [[MOV32rm1:%[0-9]+]]:gr32 = MOV32rm %stack.0.b, 1, $noreg, 0, $noreg
     ; CHECK: $eax = COPY [[MOV32rm1]]
-    ; CHECK: RETL $eax
+    ; CHECK: RET32 $eax
     %0 = MOV32rm %fixed-stack.0, 1, _, 0, _
     MOV32mr %stack.0.b, 1, _, 0, _, %0
     MOV32mi %stack.1, 1, _, 0, _, 2
     %1 = MOV32rm %stack.0, 1, _, 0, _
     $eax = COPY %1
-    RETL $eax
+    RET32 $eax
 ...
diff --git a/llvm/test/CodeGen/MIR/X86/stack-object-redefinition-error.mir b/llvm/test/CodeGen/MIR/X86/stack-object-redefinition-error.mir
--- a/llvm/test/CodeGen/MIR/X86/stack-object-redefinition-error.mir
+++ b/llvm/test/CodeGen/MIR/X86/stack-object-redefinition-error.mir
@@ -33,5 +33,5 @@
     MOV32mr $rsp, 1, _, -4, _, killed $edi
     MOV64mi32 $rsp, 1, _, -16, _, 2
     $eax = MOV32rm $rsp, 1, _, -4, _
-    RETQ $eax
+    RET64 $eax
 ...
diff --git a/llvm/test/CodeGen/MIR/X86/stack-objects.mir b/llvm/test/CodeGen/MIR/X86/stack-objects.mir
--- a/llvm/test/CodeGen/MIR/X86/stack-objects.mir
+++ b/llvm/test/CodeGen/MIR/X86/stack-objects.mir
@@ -39,5 +39,5 @@
     MOV32mr $rsp, 1, _, -4, _, $edi
     MOV64mi32 $rsp, 1, _, -16, _, 2
     $eax = MOV32rm $rsp, 1, _, -4, _
-    RETQ $eax
+    RET64 $eax
 ...
diff --git a/llvm/test/CodeGen/MIR/X86/standalone-register-error.mir b/llvm/test/CodeGen/MIR/X86/standalone-register-error.mir
--- a/llvm/test/CodeGen/MIR/X86/standalone-register-error.mir
+++ b/llvm/test/CodeGen/MIR/X86/standalone-register-error.mir
@@ -19,5 +19,5 @@
 
     %0 = COPY $edi
     $eax = COPY %0
-    RETQ $eax
+    RET64 $eax
 ...
diff --git a/llvm/test/CodeGen/MIR/X86/subregister-index-operands.mir b/llvm/test/CodeGen/MIR/X86/subregister-index-operands.mir
--- a/llvm/test/CodeGen/MIR/X86/subregister-index-operands.mir
+++ b/llvm/test/CodeGen/MIR/X86/subregister-index-operands.mir
@@ -25,10 +25,10 @@
     ; CHECK: [[INSERT_SUBREG:%[0-9]+]]:gr32 = INSERT_SUBREG $edi, $al, %subreg.sub_8bit
     ; CHECK: [[EXTRACT_SUBREG:%[0-9]+]]:gr8 = EXTRACT_SUBREG $eax, %subreg.sub_8bit_hi
     ; CHECK: $ax = REG_SEQUENCE [[EXTRACT_SUBREG]], %subreg.sub_8bit, [[EXTRACT_SUBREG]], %subreg.sub_8bit_hi
-    ; CHECK: RETQ $ax
+    ; CHECK: RET64 $ax
     %0 = INSERT_SUBREG $edi, $al, %subreg.sub_8bit
     %1 = EXTRACT_SUBREG $eax, %subreg.sub_8bit_hi
     $ax = REG_SEQUENCE %1, %subreg.sub_8bit, %1, %subreg.sub_8bit_hi
-    RETQ $ax
+    RET64 $ax
 ...
 
diff --git a/llvm/test/CodeGen/MIR/X86/subregister-operands.mir b/llvm/test/CodeGen/MIR/X86/subregister-operands.mir
--- a/llvm/test/CodeGen/MIR/X86/subregister-operands.mir
+++ b/llvm/test/CodeGen/MIR/X86/subregister-operands.mir
@@ -27,11 +27,11 @@
     ; CHECK: [[COPY1:%[0-9]+]]:gr8 = COPY [[COPY]].sub_8bit
     ; CHECK: [[AND8ri:%[0-9]+]]:gr8 = AND8ri [[COPY1]], 1, implicit-def $eflags
     ; CHECK: $al = COPY [[AND8ri]]
-    ; CHECK: RETQ $al
+    ; CHECK: RET64 $al
     %0 = COPY $edi
     %1 = COPY %0.sub_8bit
     %2 = AND8ri %1, 1, implicit-def $eflags
     $al = COPY %2
-    RETQ $al
+    RET64 $al
 ...
 
diff --git a/llvm/test/CodeGen/MIR/X86/successor-basic-blocks-weights.mir b/llvm/test/CodeGen/MIR/X86/successor-basic-blocks-weights.mir
--- a/llvm/test/CodeGen/MIR/X86/successor-basic-blocks-weights.mir
+++ b/llvm/test/CodeGen/MIR/X86/successor-basic-blocks-weights.mir
@@ -32,11 +32,11 @@
 
   bb.1.less:
     $eax = MOV32r0 implicit-def dead $eflags
-    RETQ killed $eax
+    RET64 killed $eax
 
   bb.2.exit:
     liveins: $edi
 
     $eax = COPY killed $edi
-    RETQ killed $eax
+    RET64 killed $eax
 ...
diff --git a/llvm/test/CodeGen/MIR/X86/successor-basic-blocks.mir b/llvm/test/CodeGen/MIR/X86/successor-basic-blocks.mir
--- a/llvm/test/CodeGen/MIR/X86/successor-basic-blocks.mir
+++ b/llvm/test/CodeGen/MIR/X86/successor-basic-blocks.mir
@@ -42,13 +42,13 @@
 
   bb.1.less:
     $eax = MOV32r0 implicit-def dead $eflags
-    RETQ killed $eax
+    RET64 killed $eax
 
   bb.2.exit:
     liveins: $edi
 
     $eax = COPY killed $edi
-    RETQ killed $eax
+    RET64 killed $eax
 ...
 ---
 name:            bar
@@ -72,11 +72,11 @@
   bb.1:
     successors:
     $eax = MOV32r0 implicit-def dead $eflags
-    RETQ killed $eax
+    RET64 killed $eax
 
   bb.2:
     liveins: $edi
 
     $eax = COPY killed $edi
-    RETQ killed $eax
+    RET64 killed $eax
 ...
diff --git a/llvm/test/CodeGen/MIR/X86/tied-def-operand-invalid.mir b/llvm/test/CodeGen/MIR/X86/tied-def-operand-invalid.mir
--- a/llvm/test/CodeGen/MIR/X86/tied-def-operand-invalid.mir
+++ b/llvm/test/CodeGen/MIR/X86/tied-def-operand-invalid.mir
@@ -20,5 +20,5 @@
   ; CHECK: [[@LINE+1]]:58: use of invalid tied-def operand index '0'; the operand #0 isn't a defined register
     INLINEASM &"$foo", 1, 2818058, def $rdi, 2147483657, killed $rdi(tied-def 0)
     $rax = COPY killed $rdi
-    RETQ killed $rax
+    RET64 killed $rax
 ...
diff --git a/llvm/test/CodeGen/MIR/X86/tied-physical-regs-match.mir b/llvm/test/CodeGen/MIR/X86/tied-physical-regs-match.mir
--- a/llvm/test/CodeGen/MIR/X86/tied-physical-regs-match.mir
+++ b/llvm/test/CodeGen/MIR/X86/tied-physical-regs-match.mir
@@ -18,5 +18,5 @@
 
     ; CHECK: Tied physical registers must match.
     $rbx = AND64rm killed $rdx, killed $rdi, 1, _, 0, _, implicit-def dead $eflags
-    RETQ $rbx
+    RET64 $rbx
 ...
diff --git a/llvm/test/CodeGen/MIR/X86/undef-register-flag.mir b/llvm/test/CodeGen/MIR/X86/undef-register-flag.mir
--- a/llvm/test/CodeGen/MIR/X86/undef-register-flag.mir
+++ b/llvm/test/CodeGen/MIR/X86/undef-register-flag.mir
@@ -24,7 +24,7 @@
 body: |
   bb.0.body:
     $eax = IMUL32rri8 $edi, 11, implicit-def $eflags
-    RETQ $eax
+    RET64 $eax
 ...
 ---
 name:            foo
@@ -34,5 +34,5 @@
     PUSH64r undef $rax, implicit-def $rsp, implicit $rsp
     CALL64pcrel32 @compute, csr_64, implicit $rsp, implicit $edi, implicit-def $rsp, implicit-def $eax
     $rdx = POP64r implicit-def $rsp, implicit $rsp
-    RETQ $eax
+    RET64 $eax
 ...
diff --git a/llvm/test/CodeGen/MIR/X86/undefined-fixed-stack-object.mir b/llvm/test/CodeGen/MIR/X86/undefined-fixed-stack-object.mir
--- a/llvm/test/CodeGen/MIR/X86/undefined-fixed-stack-object.mir
+++ b/llvm/test/CodeGen/MIR/X86/undefined-fixed-stack-object.mir
@@ -33,5 +33,5 @@
     MOV32mi %stack.1, 1, _, 0, _, 2
     %1 = MOV32rm %stack.0, 1, _, 0, _
     $eax = COPY %1
-    RETL $eax
+    RET32 $eax
 ...
diff --git a/llvm/test/CodeGen/MIR/X86/undefined-global-value.mir b/llvm/test/CodeGen/MIR/X86/undefined-global-value.mir
--- a/llvm/test/CodeGen/MIR/X86/undefined-global-value.mir
+++ b/llvm/test/CodeGen/MIR/X86/undefined-global-value.mir
@@ -22,5 +22,5 @@
     $rax = MOV64rm $rip, 1, _, @2, _
     $eax = MOV32rm $rax, 1, _, 0, _
     $eax = INC32r $eax
-    RETQ $eax
+    RET64 $eax
 ...
diff --git a/llvm/test/CodeGen/MIR/X86/undefined-ir-block-in-blockaddress.mir b/llvm/test/CodeGen/MIR/X86/undefined-ir-block-in-blockaddress.mir
--- a/llvm/test/CodeGen/MIR/X86/undefined-ir-block-in-blockaddress.mir
+++ b/llvm/test/CodeGen/MIR/X86/undefined-ir-block-in-blockaddress.mir
@@ -26,5 +26,5 @@
     JMP64m $rip, 1, _, @addr, _
 
   bb.1.block (address-taken):
-    RETQ
+    RET64
 ...
diff --git a/llvm/test/CodeGen/MIR/X86/undefined-ir-block-slot-in-blockaddress.mir b/llvm/test/CodeGen/MIR/X86/undefined-ir-block-slot-in-blockaddress.mir
--- a/llvm/test/CodeGen/MIR/X86/undefined-ir-block-slot-in-blockaddress.mir
+++ b/llvm/test/CodeGen/MIR/X86/undefined-ir-block-slot-in-blockaddress.mir
@@ -25,5 +25,5 @@
     JMP64m $rip, 1, _, @addr, _
 
   bb.1 (address-taken):
-    RETQ
+    RET64
 ...
diff --git a/llvm/test/CodeGen/MIR/X86/undefined-jump-table-id.mir b/llvm/test/CodeGen/MIR/X86/undefined-jump-table-id.mir
--- a/llvm/test/CodeGen/MIR/X86/undefined-jump-table-id.mir
+++ b/llvm/test/CodeGen/MIR/X86/undefined-jump-table-id.mir
@@ -53,21 +53,21 @@
 
   bb.2.def:
     $eax = MOV32r0 implicit-def $eflags
-    RETQ $eax
+    RET64 $eax
 
   bb.3.lbl1:
     $eax = MOV32ri 1
-    RETQ $eax
+    RET64 $eax
 
   bb.4.lbl2:
     $eax = MOV32ri 2
-    RETQ $eax
+    RET64 $eax
 
   bb.5.lbl3:
     $eax = MOV32ri 4
-    RETQ $eax
+    RET64 $eax
 
   bb.6.lbl4:
     $eax = MOV32ri 8
-    RETQ $eax
+    RET64 $eax
 ...
diff --git a/llvm/test/CodeGen/MIR/X86/undefined-named-global-value.mir b/llvm/test/CodeGen/MIR/X86/undefined-named-global-value.mir
--- a/llvm/test/CodeGen/MIR/X86/undefined-named-global-value.mir
+++ b/llvm/test/CodeGen/MIR/X86/undefined-named-global-value.mir
@@ -22,5 +22,5 @@
     $rax = MOV64rm $rip, 1, _, @GG, _
     $eax = MOV32rm $rax, 1, _, 0, _
     $eax = INC32r $eax
-    RETQ $eax
+    RET64 $eax
 ...
diff --git a/llvm/test/CodeGen/MIR/X86/undefined-register-class.mir b/llvm/test/CodeGen/MIR/X86/undefined-register-class.mir
--- a/llvm/test/CodeGen/MIR/X86/undefined-register-class.mir
+++ b/llvm/test/CodeGen/MIR/X86/undefined-register-class.mir
@@ -18,6 +18,6 @@
   - {id: 0, class: 'gr3200'}
 body: |
   bb.0.entry:
-    RETQ %eax
+    RET64 %eax
 ...
 
diff --git a/llvm/test/CodeGen/MIR/X86/undefined-stack-object.mir b/llvm/test/CodeGen/MIR/X86/undefined-stack-object.mir
--- a/llvm/test/CodeGen/MIR/X86/undefined-stack-object.mir
+++ b/llvm/test/CodeGen/MIR/X86/undefined-stack-object.mir
@@ -25,5 +25,5 @@
     ; CHECK: [[@LINE+1]]:13: use of undefined stack object '%stack.2'
     MOV32mr %stack.2, 1, _, 0, _, %0
     $eax = COPY %0
-    RETQ $eax
+    RET64 $eax
 ...
diff --git a/llvm/test/CodeGen/MIR/X86/undefined-value-in-memory-operand.mir b/llvm/test/CodeGen/MIR/X86/undefined-value-in-memory-operand.mir
--- a/llvm/test/CodeGen/MIR/X86/undefined-value-in-memory-operand.mir
+++ b/llvm/test/CodeGen/MIR/X86/undefined-value-in-memory-operand.mir
@@ -19,6 +19,6 @@
     liveins: $rdi
   ; CHECK: [[@LINE+1]]:64: use of undefined IR value '%ir.c'
     $eax = MOV32rm killed $rdi, 1, _, 0, _ :: (load (s32) from %ir.c)
-    RETQ $eax
+    RET64 $eax
 ...
 
diff --git a/llvm/test/CodeGen/MIR/X86/undefined-virtual-register.mir b/llvm/test/CodeGen/MIR/X86/undefined-virtual-register.mir
--- a/llvm/test/CodeGen/MIR/X86/undefined-virtual-register.mir
+++ b/llvm/test/CodeGen/MIR/X86/undefined-virtual-register.mir
@@ -20,6 +20,6 @@
     %0 = COPY $edi
     ; CHECK: Cannot determine class/bank of virtual register 1 in function 'test'
     $eax = COPY %1
-    RETQ $eax
+    RET64 $eax
 ...
 
diff --git a/llvm/test/CodeGen/MIR/X86/unknown-machine-basic-block.mir b/llvm/test/CodeGen/MIR/X86/unknown-machine-basic-block.mir
--- a/llvm/test/CodeGen/MIR/X86/unknown-machine-basic-block.mir
+++ b/llvm/test/CodeGen/MIR/X86/unknown-machine-basic-block.mir
@@ -32,5 +32,5 @@
     $eax = MOV32r0 implicit-def $eflags
 
   bb.2:
-    RETQ $eax
+    RET64 $eax
 ...
diff --git a/llvm/test/CodeGen/MIR/X86/unknown-metadata-keyword.mir b/llvm/test/CodeGen/MIR/X86/unknown-metadata-keyword.mir
--- a/llvm/test/CodeGen/MIR/X86/unknown-metadata-keyword.mir
+++ b/llvm/test/CodeGen/MIR/X86/unknown-metadata-keyword.mir
@@ -21,5 +21,5 @@
     $eax = MOV32rm $rdi, 1, _, 0, _ :: (load (s32) from %ir.x, !tba !0)
     $eax = INC32r killed $eax, implicit-def dead $eflags
     MOV32mr killed $rdi, 1, _, 0, _, $eax :: (store (s32) into %ir.x)
-    RETQ $eax
+    RET64 $eax
 ...
diff --git a/llvm/test/CodeGen/MIR/X86/unknown-metadata-node.mir b/llvm/test/CodeGen/MIR/X86/unknown-metadata-node.mir
--- a/llvm/test/CodeGen/MIR/X86/unknown-metadata-node.mir
+++ b/llvm/test/CodeGen/MIR/X86/unknown-metadata-node.mir
@@ -53,5 +53,5 @@
     DBG_VALUE _, 0, !42, !13
     MOV32mr %stack.0.x.addr, 1, _, 0, _, %0
     $eax = COPY %0
-    RETQ $eax
+    RET64 $eax
 ...
diff --git a/llvm/test/CodeGen/MIR/X86/unknown-named-machine-basic-block.mir b/llvm/test/CodeGen/MIR/X86/unknown-named-machine-basic-block.mir
--- a/llvm/test/CodeGen/MIR/X86/unknown-named-machine-basic-block.mir
+++ b/llvm/test/CodeGen/MIR/X86/unknown-named-machine-basic-block.mir
@@ -31,5 +31,5 @@
     $eax = MOV32r0 implicit-def $eflags
 
   bb.2.exit:
-    RETQ $eax
+    RET64 $eax
 ...
diff --git a/llvm/test/CodeGen/MIR/X86/unknown-register.mir b/llvm/test/CodeGen/MIR/X86/unknown-register.mir
--- a/llvm/test/CodeGen/MIR/X86/unknown-register.mir
+++ b/llvm/test/CodeGen/MIR/X86/unknown-register.mir
@@ -16,5 +16,5 @@
   bb.0.entry:
     ; CHECK: [[@LINE+1]]:5: unknown register name 'xax'
     $xax = MOV32r0
-    RETQ $xax
+    RET64 $xax
 ...
diff --git a/llvm/test/CodeGen/MIR/X86/unknown-subregister-index-op.mir b/llvm/test/CodeGen/MIR/X86/unknown-subregister-index-op.mir
--- a/llvm/test/CodeGen/MIR/X86/unknown-subregister-index-op.mir
+++ b/llvm/test/CodeGen/MIR/X86/unknown-subregister-index-op.mir
@@ -21,5 +21,5 @@
   bb.0.entry:
     ; CHECK: [[@LINE+1]]:35: unknown subregister index 'bit8'
     %0 = INSERT_SUBREG $edi, $al, %subreg.bit8
-    RETQ %0
+    RET64 %0
 ...
diff --git a/llvm/test/CodeGen/MIR/X86/unknown-subregister-index.mir b/llvm/test/CodeGen/MIR/X86/unknown-subregister-index.mir
--- a/llvm/test/CodeGen/MIR/X86/unknown-subregister-index.mir
+++ b/llvm/test/CodeGen/MIR/X86/unknown-subregister-index.mir
@@ -24,5 +24,5 @@
     %1 = COPY %0.bit8
     %2 = AND8ri %1, 1, implicit-def $eflags
     $al = COPY %2
-    RETQ $al
+    RET64 $al
 ...
diff --git a/llvm/test/CodeGen/MIR/X86/unrecognized-character.mir b/llvm/test/CodeGen/MIR/X86/unrecognized-character.mir
--- a/llvm/test/CodeGen/MIR/X86/unrecognized-character.mir
+++ b/llvm/test/CodeGen/MIR/X86/unrecognized-character.mir
@@ -13,5 +13,5 @@
 body: |
   bb.0.entry:
     ; CHECK: [[@LINE+1]]:5: unexpected character '\'
-    \ RETQ
+    \ RET64
 ...
diff --git a/llvm/test/CodeGen/MIR/X86/variable-sized-stack-object-size-error.mir b/llvm/test/CodeGen/MIR/X86/variable-sized-stack-object-size-error.mir
--- a/llvm/test/CodeGen/MIR/X86/variable-sized-stack-object-size-error.mir
+++ b/llvm/test/CodeGen/MIR/X86/variable-sized-stack-object-size-error.mir
@@ -30,5 +30,5 @@
     MOV32mr %rsp, 1, _, -4, _, %edi
     MOV64mi32 %rsp, 1, _, -16, _, 2
     %eax = MOV32rm %rsp, 1, _, -4, _
-    RETQ %eax
+    RET64 %eax
 ...
diff --git a/llvm/test/CodeGen/MIR/X86/variable-sized-stack-objects.mir b/llvm/test/CodeGen/MIR/X86/variable-sized-stack-objects.mir
--- a/llvm/test/CodeGen/MIR/X86/variable-sized-stack-objects.mir
+++ b/llvm/test/CodeGen/MIR/X86/variable-sized-stack-objects.mir
@@ -40,5 +40,5 @@
     MOV32mr $rsp, 1, _, -4, _, $edi
     MOV64mi32 $rsp, 1, _, -16, _, 2
     $eax = MOV32rm $rsp, 1, _, -4, _
-    RETQ $eax
+    RET64 $eax
 ...
diff --git a/llvm/test/CodeGen/MIR/X86/virtual-register-redefinition-error.mir b/llvm/test/CodeGen/MIR/X86/virtual-register-redefinition-error.mir
--- a/llvm/test/CodeGen/MIR/X86/virtual-register-redefinition-error.mir
+++ b/llvm/test/CodeGen/MIR/X86/virtual-register-redefinition-error.mir
@@ -21,6 +21,6 @@
 
     %0 = COPY %edi
     %eax = COPY %0
-    RETQ %eax
+    RET64 %eax
 ...
 
diff --git a/llvm/test/CodeGen/MIR/X86/virtual-registers.mir b/llvm/test/CodeGen/MIR/X86/virtual-registers.mir
--- a/llvm/test/CodeGen/MIR/X86/virtual-registers.mir
+++ b/llvm/test/CodeGen/MIR/X86/virtual-registers.mir
@@ -56,11 +56,11 @@
     ; CHECK-NEXT: $eax = COPY %2
     %2 = MOV32r0 implicit-def $eflags
     $eax = COPY %2
-    RETQ $eax
+    RET64 $eax
 
   bb.2.exit:
     $eax = COPY %0
-    RETQ $eax
+    RET64 $eax
 ...
 ---
 name:            foo
@@ -90,10 +90,10 @@
     ; CHECK-NEXT: $eax = COPY %2
     %10 = MOV32r0 implicit-def $eflags
     $eax = COPY %10
-    RETQ $eax
+    RET64 $eax
 
   bb.2.exit:
     ; CHECK: $eax = COPY %0
     $eax = COPY %2
-    RETQ $eax
+    RET64 $eax
 ...
diff --git a/llvm/test/CodeGen/X86/basic-block-sections-mir-parse.mir b/llvm/test/CodeGen/X86/basic-block-sections-mir-parse.mir
--- a/llvm/test/CodeGen/X86/basic-block-sections-mir-parse.mir
+++ b/llvm/test/CodeGen/X86/basic-block-sections-mir-parse.mir
@@ -118,7 +118,7 @@
     renamable $eax = MOV32rm $rbp, 1, $noreg, -8, $noreg :: (load (s32) from %ir.2)
     $rbp = frame-destroy POP64r implicit-def $rsp, implicit $rsp
     CFI_INSTRUCTION def_cfa $rsp, 8
-    RETQ implicit $eax
+    RET64 implicit $eax
 
 ...
 
diff --git a/llvm/test/CodeGen/X86/block-placement.mir b/llvm/test/CodeGen/X86/block-placement.mir
--- a/llvm/test/CodeGen/X86/block-placement.mir
+++ b/llvm/test/CodeGen/X86/block-placement.mir
@@ -73,7 +73,7 @@
     liveins: $rdi, $eax
   
     $rcx = POP64r implicit-def $rsp, implicit $rsp
-    RETQ $eax
+    RET64 $eax
 
   bb.2.null:
     liveins: $rdi
diff --git a/llvm/test/CodeGen/X86/bug47278.mir b/llvm/test/CodeGen/X86/bug47278.mir
--- a/llvm/test/CodeGen/X86/bug47278.mir
+++ b/llvm/test/CodeGen/X86/bug47278.mir
@@ -24,7 +24,7 @@
     ; CHECK: $cl = IMPLICIT_DEF
     ; CHECK: renamable $eax = COPY renamable $edx
     ; CHECK: dead renamable $eax = SHRD32rrCL renamable $eax, killed renamable $edx, implicit-def dead $eflags, implicit killed $cl
-    ; CHECK: RETL
+    ; CHECK: RET32
     %0:gr32 = IMPLICIT_DEF
     %1:gr32 = MOVZX32rm8 %0, 1, $noreg, 0, $noreg :: (load (s8) from `i168* undef` + 20, align 4, basealign 16)
     %2:gr32 = MOV32rm %0, 1, $noreg, 0, $noreg :: (load (s32) from `i168* undef` + 12, basealign 16)
@@ -40,6 +40,6 @@
     $cl = IMPLICIT_DEF
     %8:gr32 = COPY %1
     %8:gr32 = SHRD32rrCL %8, %1, implicit-def dead $eflags, implicit $cl
-    RETL
+    RET32
 
 ...
diff --git a/llvm/test/CodeGen/X86/dbg-changes-codegen-branch-folding2.mir b/llvm/test/CodeGen/X86/dbg-changes-codegen-branch-folding2.mir
--- a/llvm/test/CodeGen/X86/dbg-changes-codegen-branch-folding2.mir
+++ b/llvm/test/CodeGen/X86/dbg-changes-codegen-branch-folding2.mir
@@ -109,7 +109,7 @@
   
   bb.3.for.cond.cleanup:
     liveins: $rdi, $xmm3, $xmm4, $xmm5, $xmm6, $xmm7, $xmm9, $xmm13, $xmm14
-    RETQ
+    RET64
   
   bb.4.for.body:
     successors: %bb.1, %bb.5
diff --git a/llvm/test/CodeGen/X86/dbg-value-superreg-copy.mir b/llvm/test/CodeGen/X86/dbg-value-superreg-copy.mir
--- a/llvm/test/CodeGen/X86/dbg-value-superreg-copy.mir
+++ b/llvm/test/CodeGen/X86/dbg-value-superreg-copy.mir
@@ -44,7 +44,7 @@
   bb.2:
     $ax = COPY %1
     $dx = COPY %2
-    RETQ killed $ax, killed $dx
+    RET64 killed $ax, killed $dx
 ...
 
 # This test case was created as a reproducer for a bug when we got incorrect
diff --git a/llvm/test/CodeGen/X86/evex-to-vex-compress.mir b/llvm/test/CodeGen/X86/evex-to-vex-compress.mir
--- a/llvm/test/CodeGen/X86/evex-to-vex-compress.mir
+++ b/llvm/test/CodeGen/X86/evex-to-vex-compress.mir
@@ -914,7 +914,7 @@
   ; CHECK: $ymm0 = VPERM2I128rr                $ymm0, $ymm1, 32
   $ymm0 = VSHUFI64X2Z256rri                    $ymm0, $ymm1, 228
 
-  RETQ
+  RET64
 ...
 ---
   # CHECK-LABEL: name: evex_z128_to_vex_test
@@ -1800,7 +1800,7 @@
   ; CHECK: $xmm0 = VROUNDPSr                   $xmm0, 15, implicit $mxcsr
   $xmm0 = VRNDSCALEPSZ128rri                   $xmm0, 15, implicit $mxcsr
 
-  RETQ
+  RET64
 ...
 ---
   # CHECK-LABEL: name: evex_scalar_to_vex_test
@@ -2371,7 +2371,7 @@
   ; CHECK: $xmm0 = VROUNDSSr_Int               $xmm0, $xmm1, 15, implicit $mxcsr
   $xmm0 = VRNDSCALESSZr_Int                    $xmm0, $xmm1, 15, implicit $mxcsr
 
-  RETQ
+  RET64
 ...
 ---
   # CHECK-LABEL: name: evex_z256_to_evex_test
@@ -3285,7 +3285,7 @@
   ; CHECK: $ymm16 = VSHUFI64X2Z256rri          $ymm16, $ymm1, 228
   $ymm16 = VSHUFI64X2Z256rri                   $ymm16, $ymm1, 228
 
-  RETQ
+  RET64
 ...                                            
 ---                                            
   # CHECK-LABEL: name: evex_z128_to_evex_test
@@ -4179,7 +4179,7 @@
   ; CHECK: $xmm0 = VRNDSCALEPSZ128rri          $xmm0, 31, implicit $mxcsr
   $xmm0 = VRNDSCALEPSZ128rri                   $xmm0, 31, implicit $mxcsr
     
-  RETQ
+  RET64
 ...
 ---
   # CHECK-LABEL: name: evex_scalar_to_evex_test
@@ -4761,5 +4761,5 @@
   ; CHECK: $xmm0 = VRNDSCALESSZr_Int           $xmm0, $xmm1, 31, implicit $mxcsr
   $xmm0 = VRNDSCALESSZr_Int                    $xmm0, $xmm1, 31, implicit $mxcsr
   
-  RETQ
+  RET64
 ...
diff --git a/llvm/test/CodeGen/X86/expand-call-rvmarker.mir b/llvm/test/CodeGen/X86/expand-call-rvmarker.mir
--- a/llvm/test/CodeGen/X86/expand-call-rvmarker.mir
+++ b/llvm/test/CodeGen/X86/expand-call-rvmarker.mir
@@ -34,7 +34,7 @@
 # CHECK-NEXT:   $rdi = MOV64rr $rax
 # CHECK-NEXT:   CALL64pcrel32 @objc_retainAutoreleasedReturnValue, csr_64, implicit $rsp, implicit $ssp, implicit-def $rax
 # CHECK-NEXT:   $rcx = frame-destroy POP64r implicit-def $rsp, implicit $rsp
-# CHECK-NEXT:   RETQ
+# CHECK-NEXT:   RET64
 #
 
 name:            test_objc_retainAutoreleaseReturnedValue
@@ -66,7 +66,7 @@
 # CHECK-NEXT:   $rdi = MOV64rr $rax
 # CHECK-NEXT:   CALL64pcrel32 @objc_unsafeClaimAutoreleasedReturnValue, csr_64, implicit $rsp, implicit $ssp, implicit-def $rax
 # CHECK-NEXT:   $rcx = frame-destroy POP64r implicit-def $rsp, implicit $rsp
-# CHECK-NEXT:   RETQ
+# CHECK-NEXT:   RET64
 #
 name:            test_objc_unsafeClaimAutoreleasedReturnValue
 alignment:       16
@@ -99,7 +99,7 @@
 # CHECK-NEXT:   $rdi = MOV64rr $rax
 # CHECK-NEXT:   CALL64pcrel32 @objc_retainAutoreleasedReturnValue, csr_64, implicit $rsp, implicit $ssp, implicit-def dead $rax
 # CHECK-NEXT:   $rax = frame-destroy POP64r implicit-def $rsp, implicit $rsp
-# CHECK-NEXT:   RETQ
+# CHECK-NEXT:   RET64
 #
 name:            test_objc_unsafeClaimAutoreleasedReturnValue_2_args
 alignment:       16
@@ -133,7 +133,7 @@
 # CHECK-NEXT:   $rdi = MOV64rr $rax
 # CHECK-NEXT:   CALL64pcrel32 @objc_retainAutoreleasedReturnValue, csr_64, implicit $rsp, implicit $ssp, implicit-def dead $rax
 # CHECK-NEXT:   $rax = frame-destroy POP64r implicit-def $rsp, implicit $rsp
-# CHECK-NEXT:   RETQ
+# CHECK-NEXT:   RET64
 #
 name:            test_ret_void
 alignment:       16
diff --git a/llvm/test/CodeGen/X86/expand-vr64-gr64-copy.mir b/llvm/test/CodeGen/X86/expand-vr64-gr64-copy.mir
--- a/llvm/test/CodeGen/X86/expand-vr64-gr64-copy.mir
+++ b/llvm/test/CodeGen/X86/expand-vr64-gr64-copy.mir
@@ -32,5 +32,5 @@
     MMX_MOVQ64mr $rsp, 1, $noreg, -16, $noreg, killed $mm0
     $xmm0 = MOVQI2PQIrm $rsp, 1, $noreg, -16, $noreg
     $xmm0 = PSHUFDri killed $xmm0, -44
-    RETQ $xmm0
+    RET64 $xmm0
 ...
diff --git a/llvm/test/CodeGen/X86/fast-regalloc-live-out-debug-values.mir b/llvm/test/CodeGen/X86/fast-regalloc-live-out-debug-values.mir
--- a/llvm/test/CodeGen/X86/fast-regalloc-live-out-debug-values.mir
+++ b/llvm/test/CodeGen/X86/fast-regalloc-live-out-debug-values.mir
@@ -181,7 +181,7 @@
   ; CHECK:   $rbx = frame-destroy POP64r implicit-def $rsp, implicit $rsp, debug-location !45
   ; CHECK:   $rbp = frame-destroy POP64r implicit-def $rsp, implicit $rsp, debug-location !45
   ; CHECK:   CFI_INSTRUCTION def_cfa $rsp, 8, debug-location !45
-  ; CHECK:   RETQ implicit killed $eax, debug-location !45
+  ; CHECK:   RET64 implicit killed $eax, debug-location !45
   bb.0.entry:
     liveins: $edi
 
@@ -217,6 +217,6 @@
     %7:gr64_nosp = IMPLICIT_DEF
     %8:gr32 = MOV32rm %3, 4, %7, 0, $noreg, debug-location !44 :: (load (s32) from %ir.arrayidx3)
     $eax = COPY %8, debug-location !45
-    RETQ implicit $eax, debug-location !45
+    RET64 implicit $eax, debug-location !45
 
 ...
diff --git a/llvm/test/CodeGen/X86/fixup-bw-copy.mir b/llvm/test/CodeGen/X86/fixup-bw-copy.mir
--- a/llvm/test/CodeGen/X86/fixup-bw-copy.mir
+++ b/llvm/test/CodeGen/X86/fixup-bw-copy.mir
@@ -47,7 +47,7 @@
 
     ; CHECK: $eax = MOV32rr undef $edi, implicit $dil
     $al = MOV8rr killed $dil
-    RETQ killed $al
+    RET64 killed $al
 
 ...
 
@@ -62,7 +62,7 @@
 
     ; CHECK: $eax = MOV32rr undef $edi, implicit $dil
     $al = MOV8rr $dil, implicit $edi
-    RETQ killed $al
+    RET64 killed $al
 
 ...
 
@@ -77,7 +77,7 @@
 
     ; CHECK: $eax = MOV32rr undef $edi, implicit $dil, implicit-def $rax
     $al = MOV8rr $dil, implicit-def $rax
-    RETQ killed $al
+    RET64 killed $al
 
 ...
 
@@ -92,7 +92,7 @@
 
     ; CHECK: $eax = MOV32rr undef $edi, implicit $dil
     $al = MOV8rr $dil, implicit-def $eax
-    RETQ killed $al
+    RET64 killed $al
 
 ...
 
@@ -107,7 +107,7 @@
 
     ; CHECK: $eax = MOV32rr undef $edi, implicit $dil
     $al = MOV8rr $dil, implicit-def $ax
-    RETQ killed $al
+    RET64 killed $al
 
 ...
 
@@ -122,7 +122,7 @@
 
     ; CHECK: $eax = MOV32rr undef $edi, implicit $di
     $ax = MOV16rr $di, implicit-def $eax
-    RETQ killed $ax
+    RET64 killed $ax
 
 ...
 
@@ -137,6 +137,6 @@
 
     ; CHECK: $eax = MOV32rr undef $edi, implicit $di, implicit-def $rax
     $ax = MOV16rr $di, implicit-def $rax
-    RETQ killed $ax
+    RET64 killed $ax
 
 ...
diff --git a/llvm/test/CodeGen/X86/fixup-bw-inst.mir b/llvm/test/CodeGen/X86/fixup-bw-inst.mir
--- a/llvm/test/CodeGen/X86/fixup-bw-inst.mir
+++ b/llvm/test/CodeGen/X86/fixup-bw-inst.mir
@@ -55,7 +55,7 @@
     $ax = MOV16rm killed $rax, 1, $noreg, 0, $noreg
     ; CHECK: $eax = MOVZX32rm16 killed $rax
 
-    RETQ $ax
+    RET64 $ax
 
 ...
 ---
@@ -76,7 +76,7 @@
   bb.1:
     liveins: $rcx
 
-    RETQ $cl
+    RET64 $cl
 
 ...
 ---
@@ -105,12 +105,12 @@
     $ax = MOV16rm killed $rdi, 1, $noreg, 0, $noreg, implicit-def $eax :: (load (s16) from %ir.p)
     ; CHECK: $eax = MOVZX32rm16 killed $rdi, 1, $noreg, 0, $noreg, implicit-def $eax :: (load (s16) from %ir.p)
     $ax = KILL $ax, implicit killed $eax
-    RETQ $ax
+    RET64 $ax
 
   bb.1:
     $eax = XOR32rr undef $eax, undef $eax, implicit-def dead $eflags
     $ax = KILL $ax, implicit killed $eax
-    RETQ $ax
+    RET64 $ax
 
 ...
 ---
@@ -130,7 +130,7 @@
     ; CHECK: $r9b = MOV8rr undef $r10b, implicit-def $r9d, implicit killed $r9d, implicit-def $eflags
 
     $ax = OR16rr undef $ax, $r9w, implicit-def $eflags
-    RETQ $ax
+    RET64 $ax
 
 ...
 ---
@@ -147,6 +147,6 @@
     $cl = MOV8rr $bl, implicit-def $cx, implicit killed $ch, implicit-def $eflags
     ; CHECK: $cl = MOV8rr $bl, implicit-def $cx, implicit killed $ch, implicit-def $eflags
 
-    RETQ $cx
+    RET64 $cx
 
 ...
diff --git a/llvm/test/CodeGen/X86/implicit-null-checks.mir b/llvm/test/CodeGen/X86/implicit-null-checks.mir
--- a/llvm/test/CodeGen/X86/implicit-null-checks.mir
+++ b/llvm/test/CodeGen/X86/implicit-null-checks.mir
@@ -427,15 +427,15 @@
 
   bb.2.ret_200:
     $eax = MOV32ri 200
-    RETQ $eax
+    RET64 $eax
 
   bb.3.is_null:
     $eax = MOV32ri 42
-    RETQ $eax
+    RET64 $eax
 
   bb.4.ret_100:
     $eax = MOV32ri 100
-    RETQ $eax
+    RET64 $eax
 
 ...
 ---
@@ -474,11 +474,11 @@
   bb.3.is_null:
     liveins: $eax, $ah, $al, $ax, $bh, $bl, $bp, $bpl, $bx, $eax, $ebp, $ebx, $rax, $rbp, $rbx, $r12, $r13, $r14, $r15, $r12b, $r13b, $r14b, $r15b, $r12d, $r13d, $r14d, $r15d, $r12w, $r13w, $r14w, $r15w
 
-    RETQ $eax
+    RET64 $eax
 
   bb.4.ret_100:
     $eax = MOV32ri 100
-    RETQ $eax
+    RET64 $eax
 
 ...
 ---
@@ -511,15 +511,15 @@
 
   bb.2.ret_200:
     $eax = MOV32ri 200
-    RETQ $eax
+    RET64 $eax
 
   bb.3.is_null:
     $eax = MOV32ri 42
-    RETQ $eax
+    RET64 $eax
 
   bb.4.ret_100:
     $eax = MOV32ri 100
-    RETQ $eax
+    RET64 $eax
 
 ...
 ---
@@ -551,15 +551,15 @@
 
   bb.2.ret_200:
     $eax = MOV32ri 200
-    RETQ $eax
+    RET64 $eax
 
   bb.3.is_null:
     $eax = MOV32ri 42
-    RETQ $eax
+    RET64 $eax
 
   bb.4.ret_100:
     $eax = MOV32ri 100
-    RETQ $eax
+    RET64 $eax
 
 ...
 ---
@@ -592,15 +592,15 @@
 
   bb.2.ret_200:
     $eax = MOV32ri 200
-    RETQ $eax
+    RET64 $eax
 
   bb.3.is_null:
     $eax = MOV32ri 42
-    RETQ $eax
+    RET64 $eax
 
   bb.4.ret_100:
     $eax = MOV32ri 100
-    RETQ $eax
+    RET64 $eax
 
 ...
 ---
@@ -635,12 +635,12 @@
     CALL64pcrel32 @f, csr_64, implicit $rsp, implicit-def $rsp
     $eax = MOV32rm killed $rbx, 1, $noreg, 0, $noreg :: (load (s32) from %ir.ptr)
     $rbx = POP64r implicit-def $rsp, implicit $rsp
-    RETQ $eax
+    RET64 $eax
 
   bb.2.leave:
     $eax = XOR32rr undef $eax, undef $eax, implicit-def dead $eflags
     $rbx = POP64r implicit-def $rsp, implicit $rsp
-    RETQ $eax
+    RET64 $eax
 
 ...
 ---
@@ -673,11 +673,11 @@
     $esi = MOV32ri 3076
     $eax = BEXTR32rm killed $rdi, 1, $noreg, 0, $noreg, killed $esi, implicit-def dead $eflags :: (load (s32) from %ir.ptr)
     $eax = ADD32rm killed $eax, killed $rcx, 1, $noreg, 0, $noreg, implicit-def dead $eflags :: (load (s32) from %ir.val)
-    RETQ $eax
+    RET64 $eax
 
   bb.2.is_null:
     $eax = XOR32rr undef $eax, undef $eax, implicit-def dead $eflags
-    RETQ $eax
+    RET64 $eax
 
 ...
 ---
@@ -706,11 +706,11 @@
     $rcx = MOV64rm killed $rsi, 1, $noreg, 0, $noreg
     $rcx = AND64rm killed $rcx, $rdi, 1, $noreg, 0, $noreg, implicit-def dead $eflags
     $rax = MOV64rm killed $rdi, 1, $noreg, 0, $noreg
-    RETQ $eax
+    RET64 $eax
 
   bb.2.is_null:
     $eax = XOR32rr undef $eax, undef $eax, implicit-def dead $eflags
-    RETQ $eax
+    RET64 $eax
 
 ...
 ---
@@ -737,11 +737,11 @@
     $rsi = ADD64rr $rsi, $rdi, implicit-def dead $eflags
     $eax = MOV32rm killed $rdi, 1, $noreg, 0, $noreg, implicit-def $rax :: (load (s32) from %ir.x)
     $eax = LEA64_32r killed $rax, 1, killed $rsi, 4, $noreg
-    RETQ $eax
+    RET64 $eax
   
   bb.1.is_null:
     $eax = MOV32ri 42
-    RETQ $eax
+    RET64 $eax
 
 ...
 ---
@@ -769,11 +769,11 @@
     $rsi = ADD64rr $rsi, $rdi, implicit-def dead $eflags
     $esi = AND32rm killed $esi, $rdi, 1, $noreg, 0, $noreg, implicit-def dead $eflags
     $eax = MOV32rr $esi
-    RETQ $eax
+    RET64 $eax
   
   bb.1.is_null:
     $eax = MOV32ri 42
-    RETQ $eax
+    RET64 $eax
 
 ...
 ---
@@ -800,10 +800,10 @@
     liveins: $rdi, $rsi
 
     MOV64mr killed $rdi, 1, $noreg, 0, $noreg, killed $rsi
-    RETQ
+    RET64
 
   bb.2.is_null:
-    RETQ
+    RET64
 
 ...
 ---
@@ -830,10 +830,10 @@
     liveins: $rdi, $rsi
 
     MOV64mr killed $rdi, 1, $noreg, 16, $noreg, killed $rsi
-    RETQ
+    RET64
 
   bb.2.is_null:
-    RETQ
+    RET64
 
 ...
 ---
@@ -863,10 +863,10 @@
 
     $esi = ADD32rr killed $esi, killed $esi, implicit-def dead $eflags
     MOV32mr killed $rdi, 1, $noreg, 16, $noreg, killed $esi
-    RETQ
+    RET64
 
   bb.2.is_null:
-    RETQ
+    RET64
 
 ...
 ---
@@ -895,13 +895,13 @@
     $esi = ADD32rr $esi, $esi, implicit-def dead $eflags
     MOV32mr killed $rdi, 1, $noreg, 0, $noreg, $esi
     $eax = MOV32rr killed $esi
-    RETQ $eax
+    RET64 $eax
 
   bb.2.is_null:
     liveins: $rsi
     
     $eax = MOV32rr killed $esi
-    RETQ $eax
+    RET64 $eax
 
 ...
 ---
@@ -928,10 +928,10 @@
     liveins: $rdi, $rsi
 
     MOV32mr killed $rdi, 1, $noreg, 0, $noreg, killed $esi :: (volatile store (s32) into %ir.ptr)
-    RETQ
+    RET64
 
   bb.2.is_null:
-    RETQ
+    RET64
 
 ...
 ---
@@ -960,10 +960,10 @@
     $esi = ADD32rr killed $esi, killed $esi, implicit-def dead $eflags
     $esi = ADD32ri killed $esi, 15, implicit-def dead $eflags
     MOV32mr killed $rdi, 1, $noreg, 16, $noreg, killed $esi
-    RETQ
+    RET64
 
   bb.2.is_null:
-    RETQ
+    RET64
 
 ...
 ---
@@ -991,10 +991,10 @@
 
     $rdi = ADD64rr killed $rdi, killed $rdi, implicit-def dead $eflags
     MOV32mr killed $rdi, 1, $noreg, 16, $noreg, killed $esi
-    RETQ
+    RET64
 
   bb.2.is_null:
-    RETQ
+    RET64
 
 ...
 ---
@@ -1022,11 +1022,11 @@
 
     $rax = MOV64rr $rdi
     MOV32mr killed $rdi, 1, $noreg, 16, $noreg, killed $esi
-    RETQ $eax
+    RET64 $eax
 
   bb.2.is_null:
     $rax = XOR64rr undef $rax, undef $rax, implicit-def dead $eflags
-    RETQ $eax
+    RET64 $eax
 
 ...
 ---
@@ -1063,12 +1063,12 @@
     MOV32mi $rbx, 1, $noreg, 0, $noreg, 20
     $rax = MOV64rr killed $rbx
     $rbx = POP64r implicit-def $rsp, implicit $rsp
-    RETQ $eax
+    RET64 $eax
 
   bb.2.is_null:
     $eax = XOR32rr undef $eax, undef $eax, implicit-def dead $eflags
     $rbx = POP64r implicit-def $rsp, implicit $rsp
-    RETQ $eax
+    RET64 $eax
 
 ...
 ---
@@ -1097,11 +1097,11 @@
     $eax = MOV32rr $esi
     $esi = ADD32ri killed $esi, 15, implicit-def dead $eflags
     MOV32mr killed $rdi, 1, $noreg, 0, $noreg, killed $esi
-    RETQ $eax
+    RET64 $eax
 
   bb.2.is_null:
     $eax = XOR32rr undef $eax, undef $eax, implicit-def dead $eflags
-    RETQ $eax
+    RET64 $eax
 
 ...
 ---
@@ -1129,11 +1129,11 @@
 
     MOV32mi killed $rsi, 1, $noreg, 0, $noreg, 2
     $eax = MOV32rm killed $rdi, 1, $noreg, 0, $noreg 
-    RETQ $eax
+    RET64 $eax
 
   bb.2.is_null:
     $eax = XOR32rr undef $eax, undef $eax, implicit-def dead $eflags
-    RETQ $eax
+    RET64 $eax
 
 ...
 ---
@@ -1161,11 +1161,11 @@
 
     $eax = MOV32rm killed $rsi, 1, $noreg, 0, $noreg 
     MOV32mi killed $rdi, 1, $noreg, 0, $noreg, 2
-    RETQ $eax
+    RET64 $eax
 
   bb.2.is_null:
     $eax = XOR32rr undef $eax, undef $eax, implicit-def dead $eflags
-    RETQ $eax
+    RET64 $eax
 
 ...
 ---
@@ -1193,10 +1193,10 @@
 
     MOV32mi killed $rsi, 1, $noreg, 0, $noreg, 3 
     MOV32mi killed $rdi, 1, $noreg, 0, $noreg, 2
-    RETQ
+    RET64
 
   bb.2.is_null:
-    RETQ
+    RET64
 
 ...
 ---
@@ -1224,10 +1224,10 @@
 
     $esi = ADD32rr $esi, $esi, implicit-def dead $eflags
     ADD32mr killed $rdi, 1, $noreg, 0, $noreg, killed $esi, implicit-def dead $eflags
-    RETQ
+    RET64
 
   bb.2.is_null:
-    RETQ
+    RET64
 
 ...
 ---
@@ -1255,11 +1255,11 @@
 
     MOV32mi killed $rsi, 1, $noreg, 0, $noreg, 3 :: (store (s32) into %ir.ptr2)
     $eax = MOV32rm killed $rdi, 1, $noreg, 0, $noreg :: (load (s32) from %ir.ptr)
-    RETQ $eax
+    RET64 $eax
 
   bb.2.is_null:
     $eax = XOR32rr undef $eax, undef $eax, implicit-def dead $eflags
-    RETQ $eax
+    RET64 $eax
 
 ...
 ---
@@ -1287,11 +1287,11 @@
 
     MOV32mi killed $rsi, 1, $noreg, 0, $noreg, 3 :: (store (s32) into %ir.ptr2)
     $eax = MOV32rm killed $rdi, 1, $noreg, 0, $noreg :: (load (s32) from %ir.ptr)
-    RETQ $eax
+    RET64 $eax
 
   bb.2.is_null:
     $eax = XOR32rr undef $eax, undef $eax, implicit-def dead $eflags
-    RETQ $eax
+    RET64 $eax
 
 ...
 ---
@@ -1325,11 +1325,11 @@
     MOV64mr $rsp, 1, $noreg, 0, $noreg, $rdi :: (store (s64) into %stack.0)
     $edi = MOV32rm $rdi, 1, $noreg, 8, $noreg :: (load (s32) from %ir.ptr)
     $eax = MOV32rr $edi
-    RETQ $eax
+    RET64 $eax
 
   bb.2.is_null:
     $eax = XOR32rr undef $eax, undef $eax, implicit-def dead $eflags
-    RETQ $eax
+    RET64 $eax
 
 ...
 ---
@@ -1354,10 +1354,10 @@
   
     $rcx = MOV64ri -9223372036854775808
     $eax = MOV32rm killed $rdi, 2, $rcx, 0, $noreg, implicit-def $rax
-    RETQ $eax
+    RET64 $eax
   
   bb.1.is_null:
     $eax = MOV32ri 42
-    RETQ $eax
+    RET64 $eax
 
 ...
diff --git a/llvm/test/CodeGen/X86/implicit-null-chk-reg-rewrite.mir b/llvm/test/CodeGen/X86/implicit-null-chk-reg-rewrite.mir
--- a/llvm/test/CodeGen/X86/implicit-null-chk-reg-rewrite.mir
+++ b/llvm/test/CodeGen/X86/implicit-null-chk-reg-rewrite.mir
@@ -41,9 +41,9 @@
     liveins: $rdi, $rsi
     
     $rax = MOV64rm renamable $rdi, 1, $noreg, 4, $noreg
-    RETQ $eax
+    RET64 $eax
 
   bb.2.is_null:
     $eax = MOV32ri 200
-    RETQ $eax
+    RET64 $eax
 ...
diff --git a/llvm/test/CodeGen/X86/instr-symbols.mir b/llvm/test/CodeGen/X86/instr-symbols.mir
--- a/llvm/test/CodeGen/X86/instr-symbols.mir
+++ b/llvm/test/CodeGen/X86/instr-symbols.mir
@@ -69,6 +69,6 @@
     %7:gr64 = ADD64rr killed %4, killed %5, implicit-def $eflags
     %8:gr64 = ADD64rr killed %6, killed %7, implicit-def $eflags
     $rax = COPY %8
-    RETQ implicit $rax
+    RET64 implicit $rax
 
 ...
diff --git a/llvm/test/CodeGen/X86/invalid-liveness.mir b/llvm/test/CodeGen/X86/invalid-liveness.mir
--- a/llvm/test/CodeGen/X86/invalid-liveness.mir
+++ b/llvm/test/CodeGen/X86/invalid-liveness.mir
@@ -25,5 +25,5 @@
 
   bb.3:
     $eax = COPY %0
-    RETQ $eax
+    RET64 $eax
 ...
diff --git a/llvm/test/CodeGen/X86/leaFixup32.mir b/llvm/test/CodeGen/X86/leaFixup32.mir
--- a/llvm/test/CodeGen/X86/leaFixup32.mir
+++ b/llvm/test/CodeGen/X86/leaFixup32.mir
@@ -110,9 +110,9 @@
     ; CHECK: liveins: $eax, $ebp
     ; CHECK: $eax = ADD32rr $eax, $ebp, implicit-def $eflags
     ; CHECK: $eax = ADD32ri8 $eax, -5, implicit-def $eflags
-    ; CHECK: RETQ $eax
+    ; CHECK: RET64 $eax
     $eax = LEA32r killed $eax, 1, killed $ebp, -5, $noreg
-    RETQ $eax
+    RET64 $eax
 
 ...
 ---
@@ -148,9 +148,9 @@
     ; CHECK: liveins: $eax, $ebp
     ; CHECK: $ebp = ADD32rr $ebp, $eax, implicit-def $eflags
     ; CHECK: $ebp = ADD32ri8 $ebp, -5, implicit-def $eflags
-    ; CHECK: RETQ $ebp
+    ; CHECK: RET64 $ebp
     $ebp = LEA32r killed $ebp, 1, killed $eax, -5, $noreg
-    RETQ $ebp
+    RET64 $ebp
 
 ...
 ---
@@ -185,9 +185,9 @@
     ; CHECK-LABEL: name: test1add_ebp_32
     ; CHECK: liveins: $eax, $ebp
     ; CHECK: $ebp = ADD32rr $ebp, $eax, implicit-def $eflags
-    ; CHECK: RETQ $ebp
+    ; CHECK: RET64 $ebp
     $ebp = LEA32r killed $ebp, 1, killed $eax, 0, $noreg
-    RETQ $ebp
+    RET64 $ebp
 
 ...
 ---
@@ -224,9 +224,9 @@
     ; CHECK: liveins: $eax, $ebp, $esi
     ; CHECK: $ebx = LEA32r killed $eax, 1, killed $ebp, 0, $noreg
     ; CHECK: $ebx = ADD32ri8 $ebx, -5, implicit-def $eflags
-    ; CHECK: RETQ $ebx
+    ; CHECK: RET64 $ebx
     $ebx = LEA32r killed $eax, 1, killed $ebp, -5, $noreg
-    RETQ $ebx
+    RET64 $ebx
 
 ...
 ---
@@ -263,9 +263,9 @@
     ; CHECK: liveins: $eax, $ebp
     ; CHECK: $ebx = LEA32r killed $eax, 1, killed $ebp, 0, $noreg
     ; CHECK: $ebx = ADD32ri8 $ebx, -5, implicit-def $eflags
-    ; CHECK: RETQ $ebx
+    ; CHECK: RET64 $ebx
     $ebx = LEA32r killed $ebp, 1, killed $eax, -5, $noreg
-    RETQ $ebx
+    RET64 $ebx
 
 ...
 ---
@@ -301,9 +301,9 @@
     ; CHECK-LABEL: name: test1lea_ebp_32
     ; CHECK: liveins: $eax, $ebp
     ; CHECK: $ebx = LEA32r killed $eax, 1, killed $ebp, 0, $noreg
-    ; CHECK: RETQ $ebx
+    ; CHECK: RET64 $ebx
     $ebx = LEA32r killed $ebp, 1, killed $eax, 0, $noreg
-    RETQ $ebx
+    RET64 $ebx
 
 ...
 ---
@@ -339,9 +339,9 @@
     ; CHECK: liveins: $eax, $ebp
     ; CHECK: $eax = ADD32rr $eax, $ebp, implicit-def $eflags
     ; CHECK: $eax = ADD32ri $eax, 129, implicit-def $eflags
-    ; CHECK: RETQ $eax
+    ; CHECK: RET64 $eax
     $eax = LEA32r killed $eax, 1, killed $ebp, 129, $noreg
-    RETQ $eax
+    RET64 $eax
 
 ...
 ---
@@ -378,9 +378,9 @@
     ; CHECK: liveins: $eax, $ebp, $ebx
     ; CHECK: $ebx = MOV32rr $ebp
     ; CHECK: $ebx = ADD32rr $ebx, $ebp, implicit-def $eflags
-    ; CHECK: RETQ $ebx
+    ; CHECK: RET64 $ebx
     $ebx = LEA32r killed $ebp, 1, $ebp, 0, $noreg
-    RETQ $ebx
+    RET64 $ebx
 
 ...
 ---
@@ -416,9 +416,9 @@
     ; CHECK: liveins: $eax, $ebp, $ebx
     ; CHECK: $ebx = LEA32r $noreg, 1, $ebp, 5, $noreg
     ; CHECK: $ebx = ADD32rr $ebx, $ebp, implicit-def $eflags
-    ; CHECK: RETQ $ebx
+    ; CHECK: RET64 $ebx
     $ebx = LEA32r $ebp, 1, $ebp, 5, $noreg
-    RETQ $ebx
+    RET64 $ebx
 
 ...
 ---
@@ -454,9 +454,9 @@
     ; CHECK: liveins: $eax, $ebp, $ebx
     ; CHECK: $ebx = LEA32r $noreg, 4, $ebp, 5, $noreg
     ; CHECK: $ebx = ADD32rr $ebx, $ebp, implicit-def $eflags
-    ; CHECK: RETQ $ebx
+    ; CHECK: RET64 $ebx
     $ebx = LEA32r $ebp, 4, $ebp, 5, $noreg
-    RETQ $ebx
+    RET64 $ebx
 
 ...
 ---
@@ -491,9 +491,9 @@
     ; CHECK-LABEL: name: test_skip_opt_32
     ; CHECK: liveins: $eax, $ebp, $ebx
     ; CHECK: $ebp = LEA32r killed $ebp, 4, killed $ebp, 0, $noreg
-    ; CHECK: RETQ $ebp
+    ; CHECK: RET64 $ebp
     $ebp = LEA32r killed $ebp, 4, killed $ebp, 0, $noreg
-    RETQ $ebp
+    RET64 $ebp
 
 ...
 ---
@@ -529,23 +529,23 @@
   ; CHECK:   CMP32rr $eax, killed $ebx, implicit-def $eflags
   ; CHECK:   $ebx = LEA32r killed $eax, 4, killed $eax, 5, $noreg
   ; CHECK:   JCC_1 %bb.1, 4, implicit $eflags
-  ; CHECK:   RETQ $ebx
+  ; CHECK:   RET64 $ebx
   ; CHECK: bb.1:
   ; CHECK:   liveins: $eax, $ebp, $ebx
   ; CHECK:   $ebp = LEA32r killed $ebx, 4, killed $ebx, 0, $noreg
   ; CHECK:   $ebp = ADD32ri8 $ebp, 5, implicit-def $eflags
-  ; CHECK:   RETQ $ebp
+  ; CHECK:   RET64 $ebp
   bb.0 (%ir-block.0):
     liveins: $eax, $ebp, $ebx
 
     CMP32rr   $eax, killed $ebx, implicit-def $eflags
     $ebx = LEA32r killed $eax, 4, killed $eax, 5, $noreg
     JCC_1 %bb.1, 4, implicit $eflags
-    RETQ $ebx
+    RET64 $ebx
   bb.1:
     liveins: $eax, $ebp, $ebx
     $ebp = LEA32r killed $ebx, 4, killed $ebx, 5, $noreg
-    RETQ $ebp
+    RET64 $ebp
 
 ...
 
diff --git a/llvm/test/CodeGen/X86/leaFixup64.mir b/llvm/test/CodeGen/X86/leaFixup64.mir
--- a/llvm/test/CodeGen/X86/leaFixup64.mir
+++ b/llvm/test/CodeGen/X86/leaFixup64.mir
@@ -187,9 +187,9 @@
     ; CHECK: liveins: $rax, $rbp
     ; CHECK: $eax = ADD32rr $eax, $ebp, implicit-def $eflags, implicit $rax, implicit $rbp
     ; CHECK: $eax = ADD32ri8 $eax, -5, implicit-def $eflags
-    ; CHECK: RETQ $eax
+    ; CHECK: RET64 $eax
     $eax = LEA64_32r killed $rax, 1, killed $rbp, -5, $noreg
-    RETQ $eax
+    RET64 $eax
 
 ...
 ---
@@ -225,9 +225,9 @@
     ; CHECK: liveins: $rax, $rbp
     ; CHECK: $ebp = ADD32rr $ebp, $eax, implicit-def $eflags, implicit $rbp, implicit $rax
     ; CHECK: $ebp = ADD32ri8 $ebp, -5, implicit-def $eflags
-    ; CHECK: RETQ $ebp
+    ; CHECK: RET64 $ebp
     $ebp = LEA64_32r killed $rbp, 1, killed $rax, -5, $noreg
-    RETQ $ebp
+    RET64 $ebp
 
 ...
 ---
@@ -262,9 +262,9 @@
     ; CHECK-LABEL: name: test1lea_rbp_64_32_1
     ; CHECK: liveins: $rax, $rbp
     ; CHECK: $ebp = ADD32rr $ebp, $eax, implicit-def $eflags, implicit $rbp, implicit $rax
-    ; CHECK: RETQ $ebp
+    ; CHECK: RET64 $ebp
     $ebp = LEA64_32r killed $rbp, 1, killed $rax, 0, $noreg
-    RETQ $ebp
+    RET64 $ebp
 
 ...
 ---
@@ -300,9 +300,9 @@
     ; CHECK: liveins: $rax, $rbp
     ; CHECK: $rax = ADD64rr $rax, $rbp, implicit-def $eflags
     ; CHECK: $rax = ADD64ri8 $rax, -5, implicit-def $eflags
-    ; CHECK: RETQ $eax
+    ; CHECK: RET64 $eax
     $rax = LEA64r killed $rax, 1, killed $rbp, -5, $noreg
-    RETQ $eax
+    RET64 $eax
 
 ...
 ---
@@ -338,9 +338,9 @@
     ; CHECK: liveins: $rax, $rbp
     ; CHECK: $rbp = ADD64rr $rbp, $rax, implicit-def $eflags
     ; CHECK: $rbp = ADD64ri8 $rbp, -5, implicit-def $eflags
-    ; CHECK: RETQ $ebp
+    ; CHECK: RET64 $ebp
     $rbp = LEA64r killed $rbp, 1, killed $rax, -5, $noreg
-    RETQ $ebp
+    RET64 $ebp
 
 ...
 ---
@@ -375,9 +375,9 @@
     ; CHECK-LABEL: name: test1add_rbp_64
     ; CHECK: liveins: $rax, $rbp
     ; CHECK: $rbp = ADD64rr $rbp, $rax, implicit-def $eflags
-    ; CHECK: RETQ $ebp
+    ; CHECK: RET64 $ebp
     $rbp = LEA64r killed $rbp, 1, killed $rax, 0, $noreg
-    RETQ $ebp
+    RET64 $ebp
 
 ...
 ---
@@ -414,9 +414,9 @@
     ; CHECK: liveins: $rax, $rbp
     ; CHECK: $ebx = LEA64_32r killed $rax, 1, killed $rbp, 0, $noreg
     ; CHECK: $ebx = ADD32ri8 $ebx, -5, implicit-def $eflags
-    ; CHECK: RETQ $ebx
+    ; CHECK: RET64 $ebx
     $ebx = LEA64_32r killed $rax, 1, killed $rbp, -5, $noreg
-    RETQ $ebx
+    RET64 $ebx
 
 ...
 ---
@@ -453,9 +453,9 @@
     ; CHECK: liveins: $rax, $rbp
     ; CHECK: $ebx = LEA64_32r killed $rax, 1, killed $rbp, 0, $noreg
     ; CHECK: $ebx = ADD32ri8 $ebx, -5, implicit-def $eflags
-    ; CHECK: RETQ $ebx
+    ; CHECK: RET64 $ebx
     $ebx = LEA64_32r killed $rbp, 1, killed $rax, -5, $noreg
-    RETQ $ebx
+    RET64 $ebx
 
 ...
 ---
@@ -491,9 +491,9 @@
     ; CHECK-LABEL: name: test1lea_rbp_64_32
     ; CHECK: liveins: $rax, $rbp
     ; CHECK: $ebx = LEA64_32r killed $rax, 1, killed $rbp, 0, $noreg
-    ; CHECK: RETQ $ebx
+    ; CHECK: RET64 $ebx
     $ebx = LEA64_32r killed $rbp, 1, killed $rax, 0, $noreg
-    RETQ $ebx
+    RET64 $ebx
 
 ...
 ---
@@ -530,9 +530,9 @@
     ; CHECK: liveins: $rax, $rbp
     ; CHECK: $rbx = LEA64r killed $rax, 1, killed $rbp, 0, $noreg
     ; CHECK: $rbx = ADD64ri8 $rbx, -5, implicit-def $eflags
-    ; CHECK: RETQ $ebx
+    ; CHECK: RET64 $ebx
     $rbx = LEA64r killed $rax, 1, killed $rbp, -5, $noreg
-    RETQ $ebx
+    RET64 $ebx
 
 ...
 ---
@@ -569,9 +569,9 @@
     ; CHECK: liveins: $rax, $rbp
     ; CHECK: $rbx = LEA64r killed $rax, 1, killed $rbp, 0, $noreg
     ; CHECK: $rbx = ADD64ri8 $rbx, -5, implicit-def $eflags
-    ; CHECK: RETQ $ebx
+    ; CHECK: RET64 $ebx
     $rbx = LEA64r killed $rbp, 1, killed $rax, -5, $noreg
-    RETQ $ebx
+    RET64 $ebx
 
 ...
 ---
@@ -607,9 +607,9 @@
     ; CHECK-LABEL: name: test1lea_rbp_64
     ; CHECK: liveins: $rax, $rbp
     ; CHECK: $rbx = LEA64r killed $rax, 1, killed $rbp, 0, $noreg
-    ; CHECK: RETQ $ebx
+    ; CHECK: RET64 $ebx
     $rbx = LEA64r killed $rbp, 1, killed $rax, 0, $noreg
-    RETQ $ebx
+    RET64 $ebx
 
 ...
 ---
@@ -646,11 +646,11 @@
     ; CHECK: $r13 = KILL $rdi, implicit-def $r13
     ; CHECK: $r12 = LEA64r $noreg, 2, killed $r13, 5, $noreg
     ; CHECK: $r12 = ADD64rr $r12, killed $rbp, implicit-def $eflags
-    ; CHECK: RETQ $r12
+    ; CHECK: RET64 $r12
     $rbp = KILL $rbp, implicit-def $rbp
     $r13 = KILL $rdi, implicit-def $r13
     $r12 = LEA64r killed $rbp, 2, killed $r13, 5, $noreg
-    RETQ $r12
+    RET64 $r12
 
 ...
 ---
@@ -686,9 +686,9 @@
     ; CHECK: liveins: $rax, $rbp
     ; CHECK: $eax = ADD32rr $eax, $ebp, implicit-def $eflags, implicit $rax, implicit $rbp
     ; CHECK: $eax = ADD32ri $eax, 129, implicit-def $eflags
-    ; CHECK: RETQ $eax
+    ; CHECK: RET64 $eax
     $eax = LEA64_32r killed $rax, 1, killed $rbp, 129, $noreg
-    RETQ $eax
+    RET64 $eax
 
 ...
 ---
@@ -723,9 +723,9 @@
     ; CHECK-LABEL: name: test1mov1add_rbp_64_32
     ; CHECK: liveins: $rax, $rbp, $rbx
     ; CHECK: $ebx = LEA64_32r killed $rbp, 1, killed $rbp, 0, $noreg
-    ; CHECK: RETQ $ebx
+    ; CHECK: RET64 $ebx
     $ebx = LEA64_32r killed $rbp, 1, killed $rbp, 0, $noreg
-    RETQ $ebx
+    RET64 $ebx
 
 ...
 ---
@@ -760,9 +760,9 @@
     ; CHECK-LABEL: name: testleaadd_rbp_index_64_32
     ; CHECK: liveins: $rax, $rbp, $rbx
     ; CHECK: $ebx = LEA64_32r killed $rbp, 1, killed $rbp, 5, $noreg
-    ; CHECK: RETQ $ebx
+    ; CHECK: RET64 $ebx
     $ebx = LEA64_32r killed $rbp, 1, killed $rbp, 5, $noreg
-    RETQ $ebx
+    RET64 $ebx
 
 ...
 ---
@@ -797,9 +797,9 @@
     ; CHECK-LABEL: name: testleaadd_rbp_index2_64_32
     ; CHECK: liveins: $eax, $ebp, $ebx
     ; CHECK: $ebx = LEA64_32r killed $rbp, 4, killed $rbp, 5, $noreg
-    ; CHECK: RETQ $ebx
+    ; CHECK: RET64 $ebx
     $ebx = LEA64_32r killed $rbp, 4, killed $rbp, 5, $noreg
-    RETQ $ebx
+    RET64 $ebx
 
 ...
 ---
@@ -835,9 +835,9 @@
     ; CHECK: liveins: $rax, $rbp
     ; CHECK: $rax = ADD64rr $rax, $rbp, implicit-def $eflags
     ; CHECK: $rax = ADD64ri32 $rax, 129, implicit-def $eflags
-    ; CHECK: RETQ $eax
+    ; CHECK: RET64 $eax
     $rax = LEA64r killed $rax, 1, killed $rbp, 129, $noreg
-    RETQ $eax
+    RET64 $eax
 
 ...
 ---
@@ -873,9 +873,9 @@
     ; CHECK: liveins: $rax, $rbp, $rbx
     ; CHECK: $rbx = MOV64rr $rbp
     ; CHECK: $rbx = ADD64rr $rbx, $rbp, implicit-def $eflags
-    ; CHECK: RETQ $ebx
+    ; CHECK: RET64 $ebx
     $rbx = LEA64r killed $rbp, 1, $rbp, 0, $noreg
-    RETQ $ebx
+    RET64 $ebx
 
 ...
 ---
@@ -911,9 +911,9 @@
     ; CHECK: liveins: $rax, $rbp, $rbx
     ; CHECK: $rbx = LEA64r $noreg, 1, $rbp, 5, $noreg
     ; CHECK: $rbx = ADD64rr $rbx, $rbp, implicit-def $eflags
-    ; CHECK: RETQ $ebx
+    ; CHECK: RET64 $ebx
     $rbx = LEA64r $rbp, 1, $rbp, 5, $noreg
-    RETQ $ebx
+    RET64 $ebx
 
 ...
 ---
@@ -949,9 +949,9 @@
     ; CHECK: liveins: $rax, $rbp, $rbx
     ; CHECK: $rbx = LEA64r $noreg, 4, $rbp, 5, $noreg
     ; CHECK: $rbx = ADD64rr $rbx, $rbp, implicit-def $eflags
-    ; CHECK: RETQ $ebx
+    ; CHECK: RET64 $ebx
     $rbx = LEA64r $rbp, 4,  $rbp, 5, $noreg
-    RETQ $ebx
+    RET64 $ebx
 
 ...
 ---
@@ -986,9 +986,9 @@
     ; CHECK-LABEL: name: test_skip_opt_64
     ; CHECK: liveins: $rax, $rbp, $rbx
     ; CHECK: $rbp = LEA64r killed $rbp, 4, killed $rbp, 0, $noreg
-    ; CHECK: RETQ $ebp
+    ; CHECK: RET64 $ebp
     $rbp = LEA64r killed $rbp, 4, killed $rbp, 0, $noreg
-    RETQ $ebp
+    RET64 $ebp
 
 ...
 ---
@@ -1024,23 +1024,23 @@
   ; CHECK:   CMP64rr $rax, killed $rbx, implicit-def $eflags
   ; CHECK:   $rbx = LEA64r killed $rax, 4, killed $rax, 5, $noreg
   ; CHECK:   JCC_1 %bb.1, 4, implicit $eflags
-  ; CHECK:   RETQ $ebx
+  ; CHECK:   RET64 $ebx
   ; CHECK: bb.1:
   ; CHECK:   liveins: $rax, $rbp, $rbx
   ; CHECK:   $rbp = LEA64r killed $rbx, 4, killed $rbx, 0, $noreg
   ; CHECK:   $rbp = ADD64ri8 $rbp, 5, implicit-def $eflags
-  ; CHECK:   RETQ $ebp
+  ; CHECK:   RET64 $ebp
   bb.0 (%ir-block.0):
     liveins: $rax, $rbp, $rbx
 
     CMP64rr   $rax, killed $rbx, implicit-def $eflags
     $rbx = LEA64r killed $rax, 4, killed $rax, 5, $noreg
     JCC_1 %bb.1, 4, implicit $eflags
-    RETQ $ebx
+    RET64 $ebx
   bb.1:
     liveins: $rax, $rbp, $rbx
     $rbp = LEA64r killed $rbx, 4, killed $rbx, 5, $noreg
-    RETQ $ebp
+    RET64 $ebp
 
 ...
 ---
@@ -1075,9 +1075,9 @@
     ; CHECK-LABEL: name: test_skip_opt_64_32
     ; CHECK: liveins: $rax, $rbp, $rbx
     ; CHECK: $ebp = LEA64_32r killed $rbp, 4, killed $rbp, 0, $noreg
-    ; CHECK: RETQ $ebp
+    ; CHECK: RET64 $ebp
     $ebp = LEA64_32r killed $rbp, 4, killed $rbp, 0, $noreg
-    RETQ $ebp
+    RET64 $ebp
 
 ...
 ---
@@ -1113,23 +1113,23 @@
   ; CHECK:   CMP64rr $rax, killed $rbx, implicit-def $eflags
   ; CHECK:   $ebx = LEA64_32r killed $rax, 4, killed $rax, 5, $noreg
   ; CHECK:   JCC_1 %bb.1, 4, implicit $eflags
-  ; CHECK:   RETQ $ebx
+  ; CHECK:   RET64 $ebx
   ; CHECK: bb.1:
   ; CHECK:   liveins: $rax, $rbp, $rbx
   ; CHECK:   $ebp = LEA64_32r killed $rbx, 4, killed $rbx, 0, $noreg
   ; CHECK:   $ebp = ADD32ri8 $ebp, 5, implicit-def $eflags
-  ; CHECK:   RETQ $ebp
+  ; CHECK:   RET64 $ebp
   bb.0 (%ir-block.0):
     liveins: $rax, $rbp, $rbx
 
     CMP64rr   $rax, killed $rbx, implicit-def $eflags
     $ebx = LEA64_32r killed $rax, 4, killed $rax, 5, $noreg
     JCC_1 %bb.1, 4, implicit $eflags
-    RETQ $ebx
+    RET64 $ebx
   bb.1:
     liveins: $rax, $rbp, $rbx
     $ebp = LEA64_32r killed $rbx, 4, killed $rbx, 5, $noreg
-    RETQ $ebp
+    RET64 $ebp
 
 ...
 ---
@@ -1173,7 +1173,7 @@
     ; CHECK: NOOP
     ; CHECK: NOOP
     ; CHECK: NOOP
-    ; CHECK: RETQ $ebp
+    ; CHECK: RET64 $ebp
     DBG_VALUE 0, $noreg
     NOOP
     NOOP
@@ -1184,7 +1184,7 @@
     NOOP
     NOOP
     NOOP
-    RETQ $ebp
+    RET64 $ebp
 
 ...
 ...
diff --git a/llvm/test/CodeGen/X86/machine-copy-dbgvalue.mir b/llvm/test/CodeGen/X86/machine-copy-dbgvalue.mir
--- a/llvm/test/CodeGen/X86/machine-copy-dbgvalue.mir
+++ b/llvm/test/CodeGen/X86/machine-copy-dbgvalue.mir
@@ -8,7 +8,7 @@
 # CHECK-NEXT: $rax = MOV64ri 31
 # CHECK-NEXT: DBG_VALUE $rax
 # CHECK-NEXT: DBG_VALUE_LIST 0, !DIExpression(DW_OP_LLVM_arg, 0, DW_OP_LLVM_arg, 1, DW_OP_constu, 4, DW_OP_mul, DW_OP_plus, DW_OP_stack_value), $rax, 0, 0
-# CHECK-NEXT: RETQ implicit killed $rax
+# CHECK-NEXT: RET64 implicit killed $rax
 name: foo
 body: |
   bb.0:
@@ -16,5 +16,5 @@
     DBG_VALUE $rcx, 0, 0, 0, 0
     DBG_VALUE_LIST 0, !DIExpression(DW_OP_LLVM_arg, 0, DW_OP_LLVM_arg, 1, DW_OP_constu, 4, DW_OP_mul, DW_OP_plus, DW_OP_stack_value), $rcx, 0, 0
     $rax = COPY killed renamable $rcx
-    RETQ implicit killed $rax
+    RET64 implicit killed $rax
 ...
diff --git a/llvm/test/CodeGen/X86/machine-outliner-cfi-tail-some.mir b/llvm/test/CodeGen/X86/machine-outliner-cfi-tail-some.mir
--- a/llvm/test/CodeGen/X86/machine-outliner-cfi-tail-some.mir
+++ b/llvm/test/CodeGen/X86/machine-outliner-cfi-tail-some.mir
@@ -39,7 +39,7 @@
     $edx = MOV32ri 2
     $edi = MOV32ri 3
     $eax = MOV32ri 4
-    RETQ
+    RET64
 ...
 ---
 name:            bar
@@ -63,7 +63,7 @@
     $edx = MOV32ri 2
     $edi = MOV32ri 3
     $eax = MOV32ri 4
-    RETQ
+    RET64
 ...
 ---
 name:            baz
@@ -87,4 +87,4 @@
     $edx = MOV32ri 2
     $edi = MOV32ri 3
     $eax = MOV32ri 4
-    RETQ
+    RET64
diff --git a/llvm/test/CodeGen/X86/machine-outliner-cfi-tail.mir b/llvm/test/CodeGen/X86/machine-outliner-cfi-tail.mir
--- a/llvm/test/CodeGen/X86/machine-outliner-cfi-tail.mir
+++ b/llvm/test/CodeGen/X86/machine-outliner-cfi-tail.mir
@@ -30,7 +30,7 @@
     $edx = MOV32ri 2
     $edi = MOV32ri 3
     $eax = MOV32ri 4
-    RETQ
+    RET64
 ...
 ---
 name:            bar
@@ -52,7 +52,7 @@
     $edx = MOV32ri 2
     $edi = MOV32ri 3
     $eax = MOV32ri 4
-    RETQ
+    RET64
 ...
 ---
 name:            baz
@@ -74,4 +74,4 @@
     $edx = MOV32ri 2
     $edi = MOV32ri 3
     $eax = MOV32ri 4
-    RETQ
+    RET64
diff --git a/llvm/test/CodeGen/X86/optimize-compare.mir b/llvm/test/CodeGen/X86/optimize-compare.mir
--- a/llvm/test/CodeGen/X86/optimize-compare.mir
+++ b/llvm/test/CodeGen/X86/optimize-compare.mir
@@ -619,7 +619,7 @@
   ; CHECK-NEXT:   JMP_1 %bb.3
   ; CHECK-NEXT: {{  $}}
   ; CHECK-NEXT: bb.3:
-  ; CHECK-NEXT:   RETQ
+  ; CHECK-NEXT:   RET64
   bb.0:
     %0:gr32 = COPY $eax
     CMP32ri %0, 20, implicit-def $eflags
@@ -636,7 +636,7 @@
     JMP_1 %bb.3
 
   bb.3:
-    RETQ
+    RET64
 ...
 ---
 name: opt_adjusted_imm_multiple_blocks_noopt
@@ -663,7 +663,7 @@
   ; CHECK-NEXT:   $al = SETCCr 4, implicit $eflags
   ; CHECK-NEXT: {{  $}}
   ; CHECK-NEXT: bb.3:
-  ; CHECK-NEXT:   RETQ
+  ; CHECK-NEXT:   RET64
   bb.0:
     %0:gr32 = COPY $eax
     CMP32ri %0, 20, implicit-def $eflags
@@ -681,5 +681,5 @@
     $al = SETCCr 4, implicit $eflags
 
   bb.3:
-    RETQ
+    RET64
 ...
diff --git a/llvm/test/CodeGen/X86/patchpoint-verifiable.mir b/llvm/test/CodeGen/X86/patchpoint-verifiable.mir
--- a/llvm/test/CodeGen/X86/patchpoint-verifiable.mir
+++ b/llvm/test/CodeGen/X86/patchpoint-verifiable.mir
@@ -38,5 +38,5 @@
   ; CHECK: PATCHPOINT 5, 5, 0, 2, 0, $rdi, $rsi, csr_64, implicit-def dead early-clobber $r11, implicit-def $rsp, implicit-def dead $rax
     PATCHPOINT 5, 5, 0, 2, 0, $rdi, $rsi, csr_64, implicit-def dead early-clobber $r11, implicit-def $rsp, implicit-def dead $rax
     $rbp = POP64r implicit-def $rsp, implicit $rsp
-    RETQ
+    RET64
 ...
diff --git a/llvm/test/CodeGen/X86/phielim-undef.mir b/llvm/test/CodeGen/X86/phielim-undef.mir
--- a/llvm/test/CodeGen/X86/phielim-undef.mir
+++ b/llvm/test/CodeGen/X86/phielim-undef.mir
@@ -52,7 +52,7 @@
   ; CHECK-NEXT:   JMP_1 %bb.2
   ; CHECK-NEXT: {{  $}}
   ; CHECK-NEXT: bb.5:
-  ; CHECK-NEXT:   RETQ
+  ; CHECK-NEXT:   RET64
   ; CHECK-NEXT: {{  $}}
   ; CHECK-NEXT: bb.6:
   bb.0:
@@ -91,7 +91,7 @@
     JMP_1 %bb.2
 
   bb.6:
-    RETQ
+    RET64
 
   bb.7:
 ...
diff --git a/llvm/test/CodeGen/X86/post-ra-sched-with-debug.mir b/llvm/test/CodeGen/X86/post-ra-sched-with-debug.mir
--- a/llvm/test/CodeGen/X86/post-ra-sched-with-debug.mir
+++ b/llvm/test/CodeGen/X86/post-ra-sched-with-debug.mir
@@ -330,6 +330,6 @@
     $rbx = POP64r implicit-def $rsp, implicit $rsp
     $r14 = POP64r implicit-def $rsp, implicit $rsp
     $rbp = POP64r implicit-def $rsp, implicit $rsp
-    RETQ
+    RET64
 
 ...
diff --git a/llvm/test/CodeGen/X86/prologue-epilogue-remarks.mir b/llvm/test/CodeGen/X86/prologue-epilogue-remarks.mir
--- a/llvm/test/CodeGen/X86/prologue-epilogue-remarks.mir
+++ b/llvm/test/CodeGen/X86/prologue-epilogue-remarks.mir
@@ -23,7 +23,7 @@
 constants:
 body:             |
   bb.0:
-    RETQ
+    RET64
 
 ...
 ---
@@ -41,7 +41,7 @@
 constants:
 body:             |
   bb.0:
-    RETQ
+    RET64
 
 ...
 ---
@@ -59,6 +59,6 @@
 constants:
 body:             |
   bb.0:
-    RETQ
+    RET64
 
 ...
diff --git a/llvm/test/CodeGen/X86/scavenger.mir b/llvm/test/CodeGen/X86/scavenger.mir
--- a/llvm/test/CodeGen/X86/scavenger.mir
+++ b/llvm/test/CodeGen/X86/scavenger.mir
@@ -36,7 +36,7 @@
     ; CHECK: NOOP implicit killed [[REG1]]
     NOOP implicit %2
     NOOP implicit %1
-    RETQ $eax
+    RET64 $eax
 ...
 ---
 # CHECK-LABEL: name: func3
diff --git a/llvm/test/CodeGen/X86/tail-merge-after-mbp.mir b/llvm/test/CodeGen/X86/tail-merge-after-mbp.mir
--- a/llvm/test/CodeGen/X86/tail-merge-after-mbp.mir
+++ b/llvm/test/CodeGen/X86/tail-merge-after-mbp.mir
@@ -24,7 +24,7 @@
   ; CHECK: bb.4:
   ; CHECK:   $ebp = XOR32rr undef $ebp, undef $ebp, implicit-def dead $eflags
   ; CHECK:   dead $eax = XOR32rr undef $eax, undef $eax, implicit-def dead $eflags, implicit-def $al
-  ; CHECK:   RETQ $eax
+  ; CHECK:   RET64 $eax
   ; CHECK: bb.6:
   ; CHECK:   successors: %bb.1(0x30000000), %bb.7(0x50000000)
   ; CHECK:   $rax = MOV64rm $r14, 1, $noreg, 0, $noreg :: (load (s64))
@@ -41,7 +41,7 @@
   ; CHECK:   JCC_1 %bb.7, 5, implicit $eflags
   ; CHECK: bb.1:
   ; CHECK:   $ebp = XOR32rr undef $ebp, undef $ebp, implicit-def dead $eflags
-  ; CHECK:   RETQ $eax
+  ; CHECK:   RET64 $eax
   bb.0:
     successors: %bb.1(0x40000000), %bb.7(0x40000000)
 
@@ -113,6 +113,6 @@
 
   bb.16:
 
-    RETQ $eax
+    RET64 $eax
 
 ...
diff --git a/llvm/test/CodeGen/X86/tied-depbreak.mir b/llvm/test/CodeGen/X86/tied-depbreak.mir
--- a/llvm/test/CodeGen/X86/tied-depbreak.mir
+++ b/llvm/test/CodeGen/X86/tied-depbreak.mir
@@ -59,6 +59,6 @@
     ; Verify that XOR is untouched by the dependency breaker
     ; CHECK: $esi = XOR32rr undef $esi, undef $esi, implicit-def dead $eflags, implicit-def $rsi
     $esi = XOR32rr undef $esi, undef $esi, implicit-def dead $eflags, implicit-def $rsi
-    RETQ killed $eax
+    RET64 killed $eax
 
 ...
diff --git a/llvm/test/CodeGen/X86/twoaddr-dbg-value.mir b/llvm/test/CodeGen/X86/twoaddr-dbg-value.mir
--- a/llvm/test/CodeGen/X86/twoaddr-dbg-value.mir
+++ b/llvm/test/CodeGen/X86/twoaddr-dbg-value.mir
@@ -13,7 +13,7 @@
     %5:gr32 = COPY %4
     PUSH32r killed %1, implicit-def $esp, implicit $esp
     $eax = COPY killed %5
-    RETQ implicit killed $eax
+    RET64 implicit killed $eax
 
 ...
 
diff --git a/llvm/test/CodeGen/X86/update-terminator.mir b/llvm/test/CodeGen/X86/update-terminator.mir
--- a/llvm/test/CodeGen/X86/update-terminator.mir
+++ b/llvm/test/CodeGen/X86/update-terminator.mir
@@ -74,6 +74,6 @@
     JMP_1 %bb.2
 
   bb.4:
-    RETQ
+    RET64
 
 ...
diff --git a/llvm/test/CodeGen/X86/win64-eh-empty-block-2.mir b/llvm/test/CodeGen/X86/win64-eh-empty-block-2.mir
--- a/llvm/test/CodeGen/X86/win64-eh-empty-block-2.mir
+++ b/llvm/test/CodeGen/X86/win64-eh-empty-block-2.mir
@@ -173,7 +173,7 @@
     SEH_Epilogue
     $rsp = frame-destroy ADD64ri8 $rsp, 48, implicit-def dead $eflags
     $rbp = frame-destroy POP64r implicit-def $rsp, implicit $rsp
-    RETQ $eax
+    RET64 $eax
 
   bb.1.if.then:
     successors: %bb.2(0x7ffff800), %bb.7(0x00000800)
diff --git a/llvm/test/CodeGen/X86/xray-multiplerets-in-blocks.mir b/llvm/test/CodeGen/X86/xray-multiplerets-in-blocks.mir
--- a/llvm/test/CodeGen/X86/xray-multiplerets-in-blocks.mir
+++ b/llvm/test/CodeGen/X86/xray-multiplerets-in-blocks.mir
@@ -21,8 +21,8 @@
   bb.0:
     liveins: $edi
     ; CHECK: PATCHABLE_FUNCTION_ENTER
-    RETQ
+    RET64
     ; CHECK-NEXT: PATCHABLE_RET
-    RETQ
+    RET64
     ; CHECK-NEXT: PATCHABLE_RET
 ...
diff --git a/llvm/test/DebugInfo/MIR/InstrRef/dbg-phi-subregister-location.mir b/llvm/test/DebugInfo/MIR/InstrRef/dbg-phi-subregister-location.mir
--- a/llvm/test/DebugInfo/MIR/InstrRef/dbg-phi-subregister-location.mir
+++ b/llvm/test/DebugInfo/MIR/InstrRef/dbg-phi-subregister-location.mir
@@ -66,6 +66,6 @@
     DBG_INSTR_REF 2, 0, !12, !DIExpression(), debug-location !13
     renamable $rax = MOV64rm $rip, 1, $noreg, target-flags(x86-gotpcrel) @someglobal, $noreg, debug-location !13 :: (load (s64) from got)
     MOV8mr killed renamable $rax, 1, $noreg, 0, $noreg, renamable $dil, debug-location !13 :: (store (s8) into @someglobal)
-    RETQ debug-location !13
+    RET64 debug-location !13
 
 ...
diff --git a/llvm/test/DebugInfo/MIR/InstrRef/dbg-phis-in-ldv.mir b/llvm/test/DebugInfo/MIR/InstrRef/dbg-phis-in-ldv.mir
--- a/llvm/test/DebugInfo/MIR/InstrRef/dbg-phis-in-ldv.mir
+++ b/llvm/test/DebugInfo/MIR/InstrRef/dbg-phis-in-ldv.mir
@@ -157,6 +157,6 @@
     CFI_INSTRUCTION def_cfa_offset 16, debug-location !26
     $r14 = frame-destroy POP64r implicit-def $rsp, implicit $rsp, debug-location !26
     CFI_INSTRUCTION def_cfa_offset 8, debug-location !26
-    RETQ implicit $eax, debug-location !26
+    RET64 implicit $eax, debug-location !26
 
 ...
diff --git a/llvm/test/DebugInfo/MIR/InstrRef/dbg-phis-merging-in-ldv.mir b/llvm/test/DebugInfo/MIR/InstrRef/dbg-phis-merging-in-ldv.mir
--- a/llvm/test/DebugInfo/MIR/InstrRef/dbg-phis-merging-in-ldv.mir
+++ b/llvm/test/DebugInfo/MIR/InstrRef/dbg-phis-merging-in-ldv.mir
@@ -194,6 +194,6 @@
     CFI_INSTRUCTION def_cfa_offset 16, debug-location !31
     $r14 = frame-destroy POP64r implicit-def $rsp, implicit $rsp, debug-location !31
     CFI_INSTRUCTION def_cfa_offset 8, debug-location !31
-    RETQ implicit $eax, debug-location !31
+    RET64 implicit $eax, debug-location !31
 
 ...
diff --git a/llvm/test/DebugInfo/MIR/InstrRef/dbg-phis-with-loops.mir b/llvm/test/DebugInfo/MIR/InstrRef/dbg-phis-with-loops.mir
--- a/llvm/test/DebugInfo/MIR/InstrRef/dbg-phis-with-loops.mir
+++ b/llvm/test/DebugInfo/MIR/InstrRef/dbg-phis-with-loops.mir
@@ -200,6 +200,6 @@
     CFI_INSTRUCTION def_cfa_offset 16, debug-location !31
     $r14 = frame-destroy POP64r implicit-def $rsp, implicit $rsp, debug-location !31
     CFI_INSTRUCTION def_cfa_offset 8, debug-location !31
-    RETQ implicit $eax, debug-location !31
+    RET64 implicit $eax, debug-location !31
 
 ...
diff --git a/llvm/test/DebugInfo/MIR/InstrRef/follow-spill-of-live-value.mir b/llvm/test/DebugInfo/MIR/InstrRef/follow-spill-of-live-value.mir
--- a/llvm/test/DebugInfo/MIR/InstrRef/follow-spill-of-live-value.mir
+++ b/llvm/test/DebugInfo/MIR/InstrRef/follow-spill-of-live-value.mir
@@ -328,6 +328,6 @@
     CFI_INSTRUCTION def_cfa_offset 16
     $rbp = frame-destroy POP64r implicit-def $rsp, implicit $rsp
     CFI_INSTRUCTION def_cfa_offset 8
-    RETQ
+    RET64
 
 ...
diff --git a/llvm/test/DebugInfo/MIR/InstrRef/ignore-dbg-value-list.mir b/llvm/test/DebugInfo/MIR/InstrRef/ignore-dbg-value-list.mir
--- a/llvm/test/DebugInfo/MIR/InstrRef/ignore-dbg-value-list.mir
+++ b/llvm/test/DebugInfo/MIR/InstrRef/ignore-dbg-value-list.mir
@@ -69,6 +69,6 @@
     ; This clobber of $rax might cause LDV to re-issue a DBG_VALUE stating the
     ; variable location as $rbx. However, the preceeding DBG_VALUE_LIST should
     ; terminate the earlier location.
-    RETQ implicit $rbx, debug-location !13
+    RET64 implicit $rbx, debug-location !13
 
 ...
diff --git a/llvm/test/DebugInfo/MIR/InstrRef/instr-ref-roundtrip.mir b/llvm/test/DebugInfo/MIR/InstrRef/instr-ref-roundtrip.mir
--- a/llvm/test/DebugInfo/MIR/InstrRef/instr-ref-roundtrip.mir
+++ b/llvm/test/DebugInfo/MIR/InstrRef/instr-ref-roundtrip.mir
@@ -14,5 +14,5 @@
     $rbp = MOV64rr $rdi, debug-instr-number 1
     dead $rcx = MOV64ri 0
     CMP64ri8 renamable $rax, 1, implicit-def $eflags
-    RETQ $rax
+    RET64 $rax
 ...
diff --git a/llvm/test/DebugInfo/MIR/InstrRef/livedebugvalues_instrref_tolocs.mir b/llvm/test/DebugInfo/MIR/InstrRef/livedebugvalues_instrref_tolocs.mir
--- a/llvm/test/DebugInfo/MIR/InstrRef/livedebugvalues_instrref_tolocs.mir
+++ b/llvm/test/DebugInfo/MIR/InstrRef/livedebugvalues_instrref_tolocs.mir
@@ -154,5 +154,5 @@
     ; This is instruction 10 referred to in bb.10. However, as the variable
     ; location/value has been modified in the meantime, no DBG_VALUE should be
     ; generated here.
-    RETQ $eax, debug-location !17
+    RET64 $eax, debug-location !17
 ...
diff --git a/llvm/test/DebugInfo/MIR/InstrRef/livedebugvalues_recover_clobbers.mir b/llvm/test/DebugInfo/MIR/InstrRef/livedebugvalues_recover_clobbers.mir
--- a/llvm/test/DebugInfo/MIR/InstrRef/livedebugvalues_recover_clobbers.mir
+++ b/llvm/test/DebugInfo/MIR/InstrRef/livedebugvalues_recover_clobbers.mir
@@ -96,5 +96,5 @@
     ; CHECK-NEXT: CALL64pcrel32
     ; CHECK-NEXT: DBG_VALUE $ebx
 
-    RETQ $eax, debug-location !17
+    RET64 $eax, debug-location !17
 ...
diff --git a/llvm/test/DebugInfo/MIR/InstrRef/livedebugvalues_stackslot_subregs.mir b/llvm/test/DebugInfo/MIR/InstrRef/livedebugvalues_stackslot_subregs.mir
--- a/llvm/test/DebugInfo/MIR/InstrRef/livedebugvalues_stackslot_subregs.mir
+++ b/llvm/test/DebugInfo/MIR/InstrRef/livedebugvalues_stackslot_subregs.mir
@@ -52,5 +52,5 @@
     DBG_INSTR_REF 1, 0, !11, !DIExpression(), debug-location !12
     ; CHECK:      DBG_INSTR_REF
     ; CHECK-NEXT: DBG_VALUE $esi
-    RETQ $rsi, debug-location !12
+    RET64 $rsi, debug-location !12
 ...
diff --git a/llvm/test/DebugInfo/MIR/InstrRef/livedebugvalues_subreg_substitutions.mir b/llvm/test/DebugInfo/MIR/InstrRef/livedebugvalues_subreg_substitutions.mir
--- a/llvm/test/DebugInfo/MIR/InstrRef/livedebugvalues_subreg_substitutions.mir
+++ b/llvm/test/DebugInfo/MIR/InstrRef/livedebugvalues_subreg_substitutions.mir
@@ -105,5 +105,5 @@
     ; CHECK-NEXT: DBG_INSTR_REF 13, 0
     ; CHECK-NEXT: DBG_VALUE $noreg
     $rax = MOV64rm $rsp, 1, $noreg, 8, $noreg :: (load 8 from %stack.0)
-    RETQ $rax, debug-location !12
+    RET64 $rax, debug-location !12
 ...
diff --git a/llvm/test/DebugInfo/MIR/InstrRef/memory-operand-tracking.mir b/llvm/test/DebugInfo/MIR/InstrRef/memory-operand-tracking.mir
--- a/llvm/test/DebugInfo/MIR/InstrRef/memory-operand-tracking.mir
+++ b/llvm/test/DebugInfo/MIR/InstrRef/memory-operand-tracking.mir
@@ -81,5 +81,5 @@
     ; CHECK-NEXT: DBG_VALUE $noreg
 
     $rax = MOV64rm $rsp, 1, $noreg, 8, $noreg :: (load 8 from %stack.0)
-    RETQ $rax, debug-location !12
+    RET64 $rax, debug-location !12
 ...
diff --git a/llvm/test/DebugInfo/MIR/InstrRef/no-duplicates.mir b/llvm/test/DebugInfo/MIR/InstrRef/no-duplicates.mir
--- a/llvm/test/DebugInfo/MIR/InstrRef/no-duplicates.mir
+++ b/llvm/test/DebugInfo/MIR/InstrRef/no-duplicates.mir
@@ -36,5 +36,5 @@
     $rbp = MOV64rr $rdi, debug-instr-number 1, debug-location !12
     dead $rcx = MOV64ri 0, debug-instr-number 1, debug-location !12
     CMP64ri8 renamable $rax, 1, implicit-def $eflags
-    RETQ $rax
+    RET64 $rax
 ...
diff --git a/llvm/test/DebugInfo/MIR/InstrRef/no-metainstrs.mir b/llvm/test/DebugInfo/MIR/InstrRef/no-metainstrs.mir
--- a/llvm/test/DebugInfo/MIR/InstrRef/no-metainstrs.mir
+++ b/llvm/test/DebugInfo/MIR/InstrRef/no-metainstrs.mir
@@ -37,5 +37,5 @@
     $ebp = KILL killed $rbp, debug-instr-number 2, debug-location !12
     dead $rcx = MOV64ri 0
     CMP64ri8 renamable $rax, 1, implicit-def $eflags
-    RETQ $rax
+    RET64 $rax
 ...
diff --git a/llvm/test/DebugInfo/MIR/InstrRef/phi-coalesce-subreg.mir b/llvm/test/DebugInfo/MIR/InstrRef/phi-coalesce-subreg.mir
--- a/llvm/test/DebugInfo/MIR/InstrRef/phi-coalesce-subreg.mir
+++ b/llvm/test/DebugInfo/MIR/InstrRef/phi-coalesce-subreg.mir
@@ -156,6 +156,6 @@
     ADJCALLSTACKUP64 0, 0, implicit-def $rsp, implicit-def $eflags, implicit-def $ssp, implicit $rsp, implicit $ssp, debug-location !13
     %23:gr32 = MOVSX32rr16 %26, debug-location !13
     $eax = COPY %23, debug-location !13
-    RETQ implicit $eax, debug-location !13
+    RET64 implicit $eax, debug-location !13
 
 ...
diff --git a/llvm/test/DebugInfo/MIR/InstrRef/phi-coalescing.mir b/llvm/test/DebugInfo/MIR/InstrRef/phi-coalescing.mir
--- a/llvm/test/DebugInfo/MIR/InstrRef/phi-coalescing.mir
+++ b/llvm/test/DebugInfo/MIR/InstrRef/phi-coalescing.mir
@@ -155,6 +155,6 @@
     ADJCALLSTACKUP64 0, 0, implicit-def $rsp, implicit-def $eflags, implicit-def $ssp, implicit $rsp, implicit $ssp, debug-location !13
     %13:gr32 = COPY %14.sub_32bit, debug-location !13
     $eax = COPY %13, debug-location !13
-    RETQ implicit $eax, debug-location !13
+    RET64 implicit $eax, debug-location !13
 
 ...
diff --git a/llvm/test/DebugInfo/MIR/InstrRef/pick-vphi-in-shifting-loop.mir b/llvm/test/DebugInfo/MIR/InstrRef/pick-vphi-in-shifting-loop.mir
--- a/llvm/test/DebugInfo/MIR/InstrRef/pick-vphi-in-shifting-loop.mir
+++ b/llvm/test/DebugInfo/MIR/InstrRef/pick-vphi-in-shifting-loop.mir
@@ -123,6 +123,6 @@
     JCC_1 %bb.5, 6, implicit $eflags, debug-location !22
   
   bb.6:
-    RETQ debug-location !22
+    RET64 debug-location !22
 
 ...
diff --git a/llvm/test/DebugInfo/MIR/InstrRef/restore-to-rsp-crash.mir b/llvm/test/DebugInfo/MIR/InstrRef/restore-to-rsp-crash.mir
--- a/llvm/test/DebugInfo/MIR/InstrRef/restore-to-rsp-crash.mir
+++ b/llvm/test/DebugInfo/MIR/InstrRef/restore-to-rsp-crash.mir
@@ -61,6 +61,6 @@
     DBG_VALUE $rax, $noreg, !12, !DIExpression(), debug-location !13
     MOV64mr $rsp, 1, $noreg, -8, $noreg, renamable $rax :: (store 8 into %stack.0)
     $rsp = MOV64rm $rsp, 1, $noreg, 0, $noreg, debug-location !13 :: (load 8 from %stack.0)
-    RETQ implicit $rbx, debug-location !13
+    RET64 implicit $rbx, debug-location !13
 
 ...
diff --git a/llvm/test/DebugInfo/MIR/InstrRef/substitusions-roundtrip.mir b/llvm/test/DebugInfo/MIR/InstrRef/substitusions-roundtrip.mir
--- a/llvm/test/DebugInfo/MIR/InstrRef/substitusions-roundtrip.mir
+++ b/llvm/test/DebugInfo/MIR/InstrRef/substitusions-roundtrip.mir
@@ -22,5 +22,5 @@
     DBG_INSTR_REF 1, 0
     dead $rcx = MOV64ri 0
     CMP64ri8 renamable $rax, 1, implicit-def $eflags
-    RETQ $rax
+    RET64 $rax
 ...
diff --git a/llvm/test/DebugInfo/MIR/InstrRef/survives-livedebugvars.mir b/llvm/test/DebugInfo/MIR/InstrRef/survives-livedebugvars.mir
--- a/llvm/test/DebugInfo/MIR/InstrRef/survives-livedebugvars.mir
+++ b/llvm/test/DebugInfo/MIR/InstrRef/survives-livedebugvars.mir
@@ -41,7 +41,7 @@
 # FASTREG-NEXT:  JMP_1
 # FASTREG-LABEL: bb.4:
 # FASTREG:       DBG_INSTR_REF 5, 0
-# FASTREG-NEXT:  RETQ
+# FASTREG-NEXT:  RET64
 
 --- |
   ; ModuleID = 'tmp.ll'
@@ -137,6 +137,6 @@
   bb.4:
     $eax = COPY %5, debug-location !18
     DBG_INSTR_REF 5, 0, !9, !DIExpression(), debug-location !16
-    RETQ implicit $eax, debug-location !18
+    RET64 implicit $eax, debug-location !18
 
 ...
diff --git a/llvm/test/DebugInfo/MIR/InstrRef/x86-fixup-bw-inst-subreb.mir b/llvm/test/DebugInfo/MIR/InstrRef/x86-fixup-bw-inst-subreb.mir
--- a/llvm/test/DebugInfo/MIR/InstrRef/x86-fixup-bw-inst-subreb.mir
+++ b/llvm/test/DebugInfo/MIR/InstrRef/x86-fixup-bw-inst-subreb.mir
@@ -28,7 +28,7 @@
     $ax = MOV16rm killed $rax, 1, $noreg, 0, $noreg, debug-instr-number 1
     ; CHECK: $eax = MOVZX32rm16 killed $rax, {{.*}} debug-instr-number 2
 
-    RETQ $ax
+    RET64 $ax
 
 ...
 ---
@@ -55,11 +55,11 @@
     $ax = MOV16rm killed $rdi, 1, $noreg, 0, $noreg, implicit-def $eax, debug-instr-number 1
     ; CHECK: $eax = MOVZX32rm16 killed $rdi, {{.*}} debug-instr-number 2
     $ax = KILL $ax, implicit killed $eax
-    RETQ $ax
+    RET64 $ax
 
   bb.1:
     $eax = XOR32rr undef $eax, undef $eax, implicit-def dead $eflags
     $ax = KILL $ax, implicit killed $eax
-    RETQ $ax
+    RET64 $ax
 
 ...
diff --git a/llvm/test/DebugInfo/MIR/InstrRef/x86-lea-fixup-2.mir b/llvm/test/DebugInfo/MIR/InstrRef/x86-lea-fixup-2.mir
--- a/llvm/test/DebugInfo/MIR/InstrRef/x86-lea-fixup-2.mir
+++ b/llvm/test/DebugInfo/MIR/InstrRef/x86-lea-fixup-2.mir
@@ -18,7 +18,7 @@
 
     ; CHECK: $eax = ADD32ri8 {{.*}} debug-instr-number 2
     $eax = LEA32r killed $eax, 1, killed $ebp, -5, $noreg, debug-instr-number 1
-    RETQ $eax
+    RET64 $eax
 
 ...
 ---
@@ -38,7 +38,7 @@
 
     ; CHECK: $ebx = ADD32rr {{.*}} debug-instr-number 2
     $ebx = LEA32r killed $ebp, 1, $ebp, 0, $noreg, debug-instr-number 1
-    RETQ $ebx
+    RET64 $ebx
 
 ...
 ---
@@ -57,6 +57,6 @@
 
     ; CHECK: $ebx = ADD32rr {{.*}} debug-instr-number 2
     $ebx = LEA32r $ebp, 1, $ebp, 5, $noreg, debug-instr-number 1
-    RETQ $ebx
+    RET64 $ebx
 
 ...
diff --git a/llvm/test/DebugInfo/MIR/InstrRef/x86-lea-fixup.mir b/llvm/test/DebugInfo/MIR/InstrRef/x86-lea-fixup.mir
--- a/llvm/test/DebugInfo/MIR/InstrRef/x86-lea-fixup.mir
+++ b/llvm/test/DebugInfo/MIR/InstrRef/x86-lea-fixup.mir
@@ -24,7 +24,7 @@
 
     $ebp = LEA64_32r killed $rbp, 1, killed $rax, 0, $noreg, debug-instr-number 1
     ; COREI7: ADD32rr {{.*}} debug-instr-number 2
-    RETQ $ebp
+    RET64 $ebp
 
 ...
 ---
@@ -51,7 +51,7 @@
     renamable $eax = nsw LEA64_32r killed renamable $rdi, 4, renamable $rdi, 2, $noreg, debug-instr-number 2
     ; HASWELL: ADD32ri8 {{.*}} debug-instr-number 4
     renamable $eax = nsw IMUL32rr killed renamable $eax, killed renamable $ecx, implicit-def dead $eflags
-    RETQ $eax
+    RET64 $eax
 
 ...
 ---
@@ -72,6 +72,6 @@
     renamable $ecx = nsw ADD32rr renamable $ecx, renamable $eax, implicit-def dead $eflags, implicit killed $rax, implicit killed $rcx, implicit-def $rcx, debug-instr-number 1
     ; ATOM: LEA64_32r {{.*}} debug-instr-number 2
     renamable $eax = MOV32rm killed renamable $rcx, 1, $noreg, 0, $noreg :: (load (s32) from `i32 *undef`)
-    RETQ $eax
+    RET64 $eax
 
 ...
diff --git a/llvm/test/DebugInfo/MIR/X86/backup-entry-values-usage.mir b/llvm/test/DebugInfo/MIR/X86/backup-entry-values-usage.mir
--- a/llvm/test/DebugInfo/MIR/X86/backup-entry-values-usage.mir
+++ b/llvm/test/DebugInfo/MIR/X86/backup-entry-values-usage.mir
@@ -101,6 +101,6 @@
     $eax = XOR32rr undef $eax, undef $eax, implicit-def dead $eflags, debug-location !22
     $rcx = frame-destroy POP64r implicit-def $rsp, implicit $rsp, debug-location !22
     CFI_INSTRUCTION def_cfa_offset 8, debug-location !22
-    RETQ killed $eax, debug-location !22
+    RET64 killed $eax, debug-location !22
 
 ...
diff --git a/llvm/test/DebugInfo/MIR/X86/bit-piece-dh.mir b/llvm/test/DebugInfo/MIR/X86/bit-piece-dh.mir
--- a/llvm/test/DebugInfo/MIR/X86/bit-piece-dh.mir
+++ b/llvm/test/DebugInfo/MIR/X86/bit-piece-dh.mir
@@ -92,6 +92,6 @@
     $edi = SHR32ri killed $edi, 8, implicit-def dead $eflags, debug-location !17
     $eax = MOVSX32rr8 $dil, implicit killed $edi, debug-location !20
     $rbp = POP64r implicit-def $rsp, implicit $rsp, debug-location !20
-    RETQ $eax, debug-location !20
+    RET64 $eax, debug-location !20
 
 ...
diff --git a/llvm/test/DebugInfo/MIR/X86/call-site-gnu-vs-dwarf5-attrs.mir b/llvm/test/DebugInfo/MIR/X86/call-site-gnu-vs-dwarf5-attrs.mir
--- a/llvm/test/DebugInfo/MIR/X86/call-site-gnu-vs-dwarf5-attrs.mir
+++ b/llvm/test/DebugInfo/MIR/X86/call-site-gnu-vs-dwarf5-attrs.mir
@@ -191,7 +191,7 @@
     $rbx = frame-destroy POP64r implicit-def $rsp, implicit $rsp, debug-location !33
     DBG_VALUE $rdi, $noreg, !23, !DIExpression(DW_OP_LLVM_entry_value, 1), debug-location !25
     CFI_INSTRUCTION def_cfa_offset 8, debug-location !33
-    RETQ $eax, debug-location !33
+    RET64 $eax, debug-location !33
   
   bb.2.if.then:
     CFI_INSTRUCTION def_cfa_offset 16, debug-location !32
diff --git a/llvm/test/DebugInfo/MIR/X86/clobbered-fragments.mir b/llvm/test/DebugInfo/MIR/X86/clobbered-fragments.mir
--- a/llvm/test/DebugInfo/MIR/X86/clobbered-fragments.mir
+++ b/llvm/test/DebugInfo/MIR/X86/clobbered-fragments.mir
@@ -105,7 +105,7 @@
     CALL64pcrel32 @ext2, csr_64, implicit $rsp, implicit $ssp, implicit $edi, implicit killed $esi, implicit-def $rsp, implicit-def $ssp, debug-location !16
     $eax = MOV32ri 123, debug-location !17
     $rcx = frame-destroy POP64r implicit-def $rsp, implicit $rsp, debug-location !17
-    RETQ killed $eax, debug-location !17
+    RET64 killed $eax, debug-location !17
 
 ...
 
@@ -135,7 +135,7 @@
     CALL64pcrel32 @ext3, csr_64, implicit $rsp, implicit $ssp, implicit killed $edi, implicit $esi, implicit $edx, implicit-def $rsp, implicit-def $ssp, debug-location !20
     $eax = MOV32rr killed $ebx, debug-location !20
     $rbx = frame-destroy POP64r implicit-def $rsp, implicit $rsp, debug-location !20
-    RETQ killed $eax, debug-location !21
+    RET64 killed $eax, debug-location !21
 
 ...
 
diff --git a/llvm/test/DebugInfo/MIR/X86/complex-entryvalue.mir b/llvm/test/DebugInfo/MIR/X86/complex-entryvalue.mir
--- a/llvm/test/DebugInfo/MIR/X86/complex-entryvalue.mir
+++ b/llvm/test/DebugInfo/MIR/X86/complex-entryvalue.mir
@@ -48,6 +48,6 @@
     frame-setup PUSH64r killed $rbp, implicit-def $rsp, implicit $rsp
     $rbp = frame-setup MOV64rr $rsp
     $rbp = frame-destroy POP64r implicit-def $rsp, implicit $rsp, debug-location !16
-    RETQ debug-location !16
+    RET64 debug-location !16
 
 ...
diff --git a/llvm/test/DebugInfo/MIR/X86/dbg-call-site-spilled-arg-multiple-defs.mir b/llvm/test/DebugInfo/MIR/X86/dbg-call-site-spilled-arg-multiple-defs.mir
--- a/llvm/test/DebugInfo/MIR/X86/dbg-call-site-spilled-arg-multiple-defs.mir
+++ b/llvm/test/DebugInfo/MIR/X86/dbg-call-site-spilled-arg-multiple-defs.mir
@@ -132,6 +132,6 @@
     CFI_INSTRUCTION def_cfa_offset 16, debug-location !18
     $rbp = frame-destroy POP64r implicit-def $rsp, implicit $rsp, debug-location !18
     CFI_INSTRUCTION def_cfa_offset 8, debug-location !18
-    RETQ debug-location !18
+    RET64 debug-location !18
 
 ...
diff --git a/llvm/test/DebugInfo/MIR/X86/dbg-call-site-spilled-arg.mir b/llvm/test/DebugInfo/MIR/X86/dbg-call-site-spilled-arg.mir
--- a/llvm/test/DebugInfo/MIR/X86/dbg-call-site-spilled-arg.mir
+++ b/llvm/test/DebugInfo/MIR/X86/dbg-call-site-spilled-arg.mir
@@ -172,6 +172,6 @@
     $r14 = frame-destroy POP64r implicit-def $rsp, implicit $rsp, debug-location !20
     $r15 = frame-destroy POP64r implicit-def $rsp, implicit $rsp, debug-location !20
     $rbp = frame-destroy POP64r implicit-def $rsp, implicit $rsp, debug-location !20
-    RETQ debug-location !20
+    RET64 debug-location !20
 
 ...
diff --git a/llvm/test/DebugInfo/MIR/X86/dbg-stack-value-range.mir b/llvm/test/DebugInfo/MIR/X86/dbg-stack-value-range.mir
--- a/llvm/test/DebugInfo/MIR/X86/dbg-stack-value-range.mir
+++ b/llvm/test/DebugInfo/MIR/X86/dbg-stack-value-range.mir
@@ -177,6 +177,6 @@
     $rsp = frame-destroy ADD64ri8 $rsp, 16, implicit-def dead $eflags, debug-location !15
     $rbp = frame-destroy POP64r implicit-def $rsp, implicit $rsp, debug-location !15
     CFI_INSTRUCTION def_cfa $rsp, 8, debug-location !15
-    RETQ $eax, debug-location !15
+    RET64 $eax, debug-location !15
 
 ...
diff --git a/llvm/test/DebugInfo/MIR/X86/dbgcall-site-copy-super-sub.mir b/llvm/test/DebugInfo/MIR/X86/dbgcall-site-copy-super-sub.mir
--- a/llvm/test/DebugInfo/MIR/X86/dbgcall-site-copy-super-sub.mir
+++ b/llvm/test/DebugInfo/MIR/X86/dbgcall-site-copy-super-sub.mir
@@ -106,7 +106,7 @@
     $eax = MOV32rr killed $ebx, debug-location !32
     $rbx = frame-destroy POP64r implicit-def $rsp, implicit $rsp, debug-location !32
     CFI_INSTRUCTION def_cfa_offset 8, debug-location !32
-    RETQ killed $eax, debug-location !32
+    RET64 killed $eax, debug-location !32
 
 ...
 
diff --git a/llvm/test/DebugInfo/MIR/X86/dbgcall-site-interpretation.mir b/llvm/test/DebugInfo/MIR/X86/dbgcall-site-interpretation.mir
--- a/llvm/test/DebugInfo/MIR/X86/dbgcall-site-interpretation.mir
+++ b/llvm/test/DebugInfo/MIR/X86/dbgcall-site-interpretation.mir
@@ -199,6 +199,6 @@
     $r15 = frame-destroy POP64r implicit-def $rsp, implicit $rsp, debug-location !21
     DBG_VALUE $esi, $noreg, !15, !DIExpression(DW_OP_LLVM_entry_value, 1), debug-location !21
     CFI_INSTRUCTION def_cfa_offset 8, debug-location !21
-    RETQ $eax, debug-location !21
+    RET64 $eax, debug-location !21
 
 ...
diff --git a/llvm/test/DebugInfo/MIR/X86/dbgcall-site-lea-interpretation.mir b/llvm/test/DebugInfo/MIR/X86/dbgcall-site-lea-interpretation.mir
--- a/llvm/test/DebugInfo/MIR/X86/dbgcall-site-lea-interpretation.mir
+++ b/llvm/test/DebugInfo/MIR/X86/dbgcall-site-lea-interpretation.mir
@@ -135,6 +135,6 @@
     CFI_INSTRUCTION def_cfa_offset 16, debug-location !14
     $rbx = frame-destroy POP64r implicit-def $rsp, implicit $rsp, debug-location !14
     CFI_INSTRUCTION def_cfa_offset 8, debug-location !14
-    RETQ $eax, debug-location !14
+    RET64 $eax, debug-location !14
 
 ...
diff --git a/llvm/test/DebugInfo/MIR/X86/dbgcall-site-partial-describe.mir b/llvm/test/DebugInfo/MIR/X86/dbgcall-site-partial-describe.mir
--- a/llvm/test/DebugInfo/MIR/X86/dbgcall-site-partial-describe.mir
+++ b/llvm/test/DebugInfo/MIR/X86/dbgcall-site-partial-describe.mir
@@ -54,7 +54,7 @@
     CALL64pcrel32 @call, csr_64, implicit $rsp, implicit $ssp, implicit killed $edi, implicit undef $esi, implicit-def $rsp, implicit-def $ssp, debug-location !15
     $rax = frame-destroy POP64r implicit-def $rsp, implicit $rsp, debug-location !16
     CFI_INSTRUCTION def_cfa_offset 8, debug-location !16
-    RETQ debug-location !16
+    RET64 debug-location !16
 
 ...
 
diff --git a/llvm/test/DebugInfo/MIR/X86/dbgcall-site-reference.mir b/llvm/test/DebugInfo/MIR/X86/dbgcall-site-reference.mir
--- a/llvm/test/DebugInfo/MIR/X86/dbgcall-site-reference.mir
+++ b/llvm/test/DebugInfo/MIR/X86/dbgcall-site-reference.mir
@@ -112,6 +112,6 @@
     CALL64pcrel32 @_ZN1CC2E1B, csr_64, implicit $rsp, implicit $ssp, implicit $rdi, implicit $rsi, implicit-def $rsp, implicit-def $ssp, debug-location !36
     $rax = frame-destroy POP64r implicit-def $rsp, implicit $rsp, debug-location !36
     CFI_INSTRUCTION def_cfa_offset 8, debug-location !36
-    RETQ debug-location !36
+    RET64 debug-location !36
 
 ...
diff --git a/llvm/test/DebugInfo/MIR/X86/dbgcall-site-reg-shuffle.mir b/llvm/test/DebugInfo/MIR/X86/dbgcall-site-reg-shuffle.mir
--- a/llvm/test/DebugInfo/MIR/X86/dbgcall-site-reg-shuffle.mir
+++ b/llvm/test/DebugInfo/MIR/X86/dbgcall-site-reg-shuffle.mir
@@ -74,7 +74,7 @@
     CALL64pcrel32 @call2, csr_64, implicit $rsp, implicit $ssp, implicit $edi, implicit $esi, implicit-def $rsp, implicit-def $ssp, debug-location !15
     $rax = frame-destroy POP64r implicit-def $rsp, implicit $rsp, debug-location !16
     CFI_INSTRUCTION def_cfa_offset 8, debug-location !16
-    RETQ debug-location !16
+    RET64 debug-location !16
 
 ...
 
diff --git a/llvm/test/DebugInfo/MIR/X86/dbgcall-site-two-fwd-reg-defs.mir b/llvm/test/DebugInfo/MIR/X86/dbgcall-site-two-fwd-reg-defs.mir
--- a/llvm/test/DebugInfo/MIR/X86/dbgcall-site-two-fwd-reg-defs.mir
+++ b/llvm/test/DebugInfo/MIR/X86/dbgcall-site-two-fwd-reg-defs.mir
@@ -88,7 +88,7 @@
     renamable $eax = MOV32rm $rip, 1, $noreg, @a, $noreg, debug-location !16 :: (dereferenceable load (s32) from @a)
     $rbp = frame-destroy POP64r implicit-def $rsp, implicit $rsp, debug-location !16
     CFI_INSTRUCTION def_cfa $rsp, 8, debug-location !16
-    RETQ $eax, debug-location !16
+    RET64 $eax, debug-location !16
 
 ...
 ---
@@ -123,7 +123,7 @@
     $rbx = frame-destroy POP64r implicit-def $rsp, implicit $rsp, debug-location !22
     $rbp = frame-destroy POP64r implicit-def $rsp, implicit $rsp, debug-location !22
     CFI_INSTRUCTION def_cfa $rsp, 8, debug-location !22
-    RETQ $eax, debug-location !22
+    RET64 $eax, debug-location !22
 
 ...
 
diff --git a/llvm/test/DebugInfo/MIR/X86/debug-call-site-param.mir b/llvm/test/DebugInfo/MIR/X86/debug-call-site-param.mir
--- a/llvm/test/DebugInfo/MIR/X86/debug-call-site-param.mir
+++ b/llvm/test/DebugInfo/MIR/X86/debug-call-site-param.mir
@@ -190,6 +190,6 @@
     CFI_INSTRUCTION def_cfa_offset 16, debug-location !24
     $r15 = frame-destroy POP64r implicit-def $rsp, implicit $rsp, debug-location !24
     CFI_INSTRUCTION def_cfa_offset 8, debug-location !24
-    RETQ debug-location !24
+    RET64 debug-location !24
 
 ...
diff --git a/llvm/test/DebugInfo/MIR/X86/debug-entry-value-operation.mir b/llvm/test/DebugInfo/MIR/X86/debug-entry-value-operation.mir
--- a/llvm/test/DebugInfo/MIR/X86/debug-entry-value-operation.mir
+++ b/llvm/test/DebugInfo/MIR/X86/debug-entry-value-operation.mir
@@ -88,6 +88,6 @@
     MOV32mr $rip, 1, $noreg, @global, $noreg, killed renamable $edi, debug-location !18 :: (store (s32) into @global)
     INLINEASM &"", 1, 12, implicit-def dead early-clobber $edi, 12, implicit-def dead early-clobber $esi, 12, implicit-def dead early-clobber $edx, 12, implicit-def dead early-clobber $df, 12, implicit-def dead early-clobber $fpsw, 12, implicit-def dead early-clobber $eflags, !19, debug-location !18
     $eax = MOV32ri 123, debug-location !18
-    RETQ killed $eax, debug-location !18
+    RET64 killed $eax, debug-location !18
 
 ...
diff --git a/llvm/test/DebugInfo/MIR/X86/dvl-livedebugvalues-clobber.mir b/llvm/test/DebugInfo/MIR/X86/dvl-livedebugvalues-clobber.mir
--- a/llvm/test/DebugInfo/MIR/X86/dvl-livedebugvalues-clobber.mir
+++ b/llvm/test/DebugInfo/MIR/X86/dvl-livedebugvalues-clobber.mir
@@ -100,7 +100,7 @@
 
   bb.4:
     liveins: $rbx, $rsi
-    RETQ $rbx, debug-location !17
+    RET64 $rbx, debug-location !17
 
 ...
 
diff --git a/llvm/test/DebugInfo/MIR/X86/dvl-livedebugvalues-join.mir b/llvm/test/DebugInfo/MIR/X86/dvl-livedebugvalues-join.mir
--- a/llvm/test/DebugInfo/MIR/X86/dvl-livedebugvalues-join.mir
+++ b/llvm/test/DebugInfo/MIR/X86/dvl-livedebugvalues-join.mir
@@ -154,7 +154,7 @@
   bb.10:
     liveins: $rdi, $rsi
     ; Should _not_ be a live-in loc here.
-    RETQ
+    RET64
 
 ...
 
diff --git a/llvm/test/DebugInfo/MIR/X86/dvl-livedebugvalues-movements.mir b/llvm/test/DebugInfo/MIR/X86/dvl-livedebugvalues-movements.mir
--- a/llvm/test/DebugInfo/MIR/X86/dvl-livedebugvalues-movements.mir
+++ b/llvm/test/DebugInfo/MIR/X86/dvl-livedebugvalues-movements.mir
@@ -84,7 +84,7 @@
 
   bb.2:
     liveins: $rbx, $rbp
-    RETQ $rbp, debug-location !17
+    RET64 $rbp, debug-location !17
 
 ...
 
diff --git a/llvm/test/DebugInfo/MIR/X86/dvl-livedebugvalues-spillrestore.mir b/llvm/test/DebugInfo/MIR/X86/dvl-livedebugvalues-spillrestore.mir
--- a/llvm/test/DebugInfo/MIR/X86/dvl-livedebugvalues-spillrestore.mir
+++ b/llvm/test/DebugInfo/MIR/X86/dvl-livedebugvalues-spillrestore.mir
@@ -72,6 +72,6 @@
     $rax = COPY killed $rdi
     $rdi = MOV64ri 0
     $rdi = MOV64rm $rsp, 1, $noreg, -16, $noreg, debug-location !15 :: (load (s64) from %stack.0)
-    RETQ
+    RET64
 ...
 
diff --git a/llvm/test/DebugInfo/MIR/X86/dvl-livedebugvars-movements.mir b/llvm/test/DebugInfo/MIR/X86/dvl-livedebugvars-movements.mir
--- a/llvm/test/DebugInfo/MIR/X86/dvl-livedebugvars-movements.mir
+++ b/llvm/test/DebugInfo/MIR/X86/dvl-livedebugvars-movements.mir
@@ -105,5 +105,5 @@
 
     CALL64pcrel32 @foo, csr_64, implicit $rsp, implicit $ssp, implicit %3, implicit %5
 
-    RETQ
+    RET64
 ...
diff --git a/llvm/test/DebugInfo/MIR/X86/dvl-livedebugvars-stackptr.mir b/llvm/test/DebugInfo/MIR/X86/dvl-livedebugvars-stackptr.mir
--- a/llvm/test/DebugInfo/MIR/X86/dvl-livedebugvars-stackptr.mir
+++ b/llvm/test/DebugInfo/MIR/X86/dvl-livedebugvars-stackptr.mir
@@ -109,5 +109,5 @@
 
     CALL64pcrel32 @foo, csr_64, implicit $rsp, implicit $ssp, implicit %3, implicit %5
 
-    RETQ
+    RET64
 ...
diff --git a/llvm/test/DebugInfo/MIR/X86/empty-inline.mir b/llvm/test/DebugInfo/MIR/X86/empty-inline.mir
--- a/llvm/test/DebugInfo/MIR/X86/empty-inline.mir
+++ b/llvm/test/DebugInfo/MIR/X86/empty-inline.mir
@@ -109,13 +109,13 @@
     $rax = MOV64rm $rdi, 1, _, 0, _ :: (load (s64) from %ir.6, align 4)
     $al = MOV8rm killed $rax, 1, _, 0, _ :: (load (s8) from %ir.8)
     MOV8mr killed $rdi, 1, _, 8, _, killed $al, debug-location !14 :: (store (s8) into %ir.12)
-    RETQ undef $eax
+    RET64 undef $eax
 
   bb.1:
     liveins: $rdi
 
     $al = IMPLICIT_DEF debug-location !10
     MOV8mr killed $rdi, 1, _, 8, _, killed $al, debug-location !14 :: (store (s8) into %ir.12)
-    RETQ undef $eax
+    RET64 undef $eax
 
 ...
diff --git a/llvm/test/DebugInfo/MIR/X86/entry-value-of-modified-param.mir b/llvm/test/DebugInfo/MIR/X86/entry-value-of-modified-param.mir
--- a/llvm/test/DebugInfo/MIR/X86/entry-value-of-modified-param.mir
+++ b/llvm/test/DebugInfo/MIR/X86/entry-value-of-modified-param.mir
@@ -114,6 +114,6 @@
     renamable $al = SETCCr 12, implicit killed $eflags, implicit killed $eax, implicit-def $eax, debug-location !23
     $rbx = frame-destroy POP64r implicit-def $rsp, implicit $rsp, debug-location !26
     CFI_INSTRUCTION def_cfa_offset 8, debug-location !26
-    RETQ $eax, debug-location !26
+    RET64 $eax, debug-location !26
 
 ...
diff --git a/llvm/test/DebugInfo/MIR/X86/entry-values-diamond-bbs.mir b/llvm/test/DebugInfo/MIR/X86/entry-values-diamond-bbs.mir
--- a/llvm/test/DebugInfo/MIR/X86/entry-values-diamond-bbs.mir
+++ b/llvm/test/DebugInfo/MIR/X86/entry-values-diamond-bbs.mir
@@ -178,6 +178,6 @@
     CFI_INSTRUCTION def_cfa_offset 16, debug-location !34
     $rbp = frame-destroy POP64r implicit-def $rsp, implicit $rsp, debug-location !34
     CFI_INSTRUCTION def_cfa_offset 8, debug-location !34
-    RETQ killed $eax, debug-location !34
+    RET64 killed $eax, debug-location !34
 
 ...
diff --git a/llvm/test/DebugInfo/MIR/X86/kill-after-spill.mir b/llvm/test/DebugInfo/MIR/X86/kill-after-spill.mir
--- a/llvm/test/DebugInfo/MIR/X86/kill-after-spill.mir
+++ b/llvm/test/DebugInfo/MIR/X86/kill-after-spill.mir
@@ -382,6 +382,6 @@
     $r14 = POP64r implicit-def $rsp, implicit $rsp
     $r15 = POP64r implicit-def $rsp, implicit $rsp
     $rbp = POP64r implicit-def $rsp, implicit $rsp
-    RETQ $eax, debug-location !57
+    RET64 $eax, debug-location !57
 
 ...
diff --git a/llvm/test/DebugInfo/MIR/X86/kill-entry-value-after-diamond-bbs.mir b/llvm/test/DebugInfo/MIR/X86/kill-entry-value-after-diamond-bbs.mir
--- a/llvm/test/DebugInfo/MIR/X86/kill-entry-value-after-diamond-bbs.mir
+++ b/llvm/test/DebugInfo/MIR/X86/kill-entry-value-after-diamond-bbs.mir
@@ -180,7 +180,7 @@
     CFI_INSTRUCTION def_cfa_offset 16, debug-location !34
     $rbp = frame-destroy POP64r implicit-def $rsp, implicit $rsp, debug-location !34
     CFI_INSTRUCTION def_cfa_offset 8, debug-location !34
-    RETQ killed $eax, debug-location !34
+    RET64 killed $eax, debug-location !34
 
 ...
 
diff --git a/llvm/test/DebugInfo/MIR/X86/live-debug-values-3preds.mir b/llvm/test/DebugInfo/MIR/X86/live-debug-values-3preds.mir
--- a/llvm/test/DebugInfo/MIR/X86/live-debug-values-3preds.mir
+++ b/llvm/test/DebugInfo/MIR/X86/live-debug-values-3preds.mir
@@ -267,7 +267,7 @@
     $ecx = IMUL32rr killed $ecx, killed $edi, implicit-def dead $eflags, debug-location !36
     DBG_VALUE 0, 0, !13, !17, debug-location !25
     $eax = MOV32rr killed $ecx, debug-location !50
-    RETQ $eax, debug-location !50
+    RET64 $eax, debug-location !50
   
   bb.6.if.then.4:
     liveins: $ecx, $esi
@@ -278,7 +278,7 @@
     $ecx = IMUL32rr killed $ecx, killed $esi, implicit-def dead $eflags, debug-location !40
     DBG_VALUE 0, 0, !13, !17, debug-location !25
     $eax = MOV32rr killed $ecx, debug-location !50
-    RETQ $eax, debug-location !50
+    RET64 $eax, debug-location !50
   
   bb.8.if.then.8:
     successors: %bb.9.for.end(0)
@@ -294,6 +294,6 @@
   
     DBG_VALUE 0, 0, !13, !17, debug-location !25
     $eax = MOV32rr killed $ecx, debug-location !50
-    RETQ $eax, debug-location !50
+    RET64 $eax, debug-location !50
 
 ...
diff --git a/llvm/test/DebugInfo/MIR/X86/live-debug-values-bad-transfer.mir b/llvm/test/DebugInfo/MIR/X86/live-debug-values-bad-transfer.mir
--- a/llvm/test/DebugInfo/MIR/X86/live-debug-values-bad-transfer.mir
+++ b/llvm/test/DebugInfo/MIR/X86/live-debug-values-bad-transfer.mir
@@ -106,6 +106,6 @@
     $eax = MOV32rr killed $ebx, debug-location !10
     $rbx = frame-destroy POP64r implicit-def $rsp, implicit $rsp
     CFI_INSTRUCTION def_cfa_offset 8
-    RETQ $eax, debug-location !10
+    RET64 $eax, debug-location !10
 
 ...
diff --git a/llvm/test/DebugInfo/MIR/X86/live-debug-values-cutoffs.mir b/llvm/test/DebugInfo/MIR/X86/live-debug-values-cutoffs.mir
--- a/llvm/test/DebugInfo/MIR/X86/live-debug-values-cutoffs.mir
+++ b/llvm/test/DebugInfo/MIR/X86/live-debug-values-cutoffs.mir
@@ -114,6 +114,6 @@
     CALL64pcrel32 @use, csr_64, implicit $rsp, implicit $ssp, implicit killed $edi, implicit-def $eax, debug-location !14
     DBG_VALUE renamable $eax, $noreg, !11, !DIExpression(), debug-location !14
     $rcx = frame-destroy POP64r implicit-def $rsp, implicit $rsp, debug-location !15
-    RETQ implicit killed $eax, debug-location !15
+    RET64 implicit killed $eax, debug-location !15
 
 ...
diff --git a/llvm/test/DebugInfo/MIR/X86/live-debug-values-entry-transfer.mir b/llvm/test/DebugInfo/MIR/X86/live-debug-values-entry-transfer.mir
--- a/llvm/test/DebugInfo/MIR/X86/live-debug-values-entry-transfer.mir
+++ b/llvm/test/DebugInfo/MIR/X86/live-debug-values-entry-transfer.mir
@@ -118,6 +118,6 @@
     $eax = MOV32rr killed $ebx
     $rbx = frame-destroy POP64r implicit-def $rsp, implicit $rsp
     CFI_INSTRUCTION def_cfa_offset 8
-    RETQ $eax
+    RET64 $eax
 
 ...
diff --git a/llvm/test/DebugInfo/MIR/X86/live-debug-values-fragments.mir b/llvm/test/DebugInfo/MIR/X86/live-debug-values-fragments.mir
--- a/llvm/test/DebugInfo/MIR/X86/live-debug-values-fragments.mir
+++ b/llvm/test/DebugInfo/MIR/X86/live-debug-values-fragments.mir
@@ -20,7 +20,7 @@
 # CHECK-NEXT: DBG_VALUE $eax, $noreg, !{{[0-9]+}},
 # CHECK-SAME:                 !DIExpression(DW_OP_LLVM_fragment, 0, 32)
 # CHECK-NEXT: XOR32rr
-# CHECK-NEXT: RETQ
+# CHECK-NEXT: RET64
 #
 # CHECK-LABEL: bar
 # CHECK-LABEL: bb.0.entry:
@@ -51,7 +51,7 @@
 # CHECK-NEXT: DBG_VALUE $ax, $noreg, !{{[0-9]+}},
 # CHECK-SAME:                 !DIExpression(DW_OP_LLVM_fragment, 8, 16)
 # CHECK-NEXT: XOR32rr
-# CHECK-NEXT: RETQ
+# CHECK-NEXT: RET64
 
 # CHECK-LABEL: baz
 # CHECK-LABEL: bb.0.entry:
@@ -81,7 +81,7 @@
 # CHECK:      DBG_VALUE $ebx, $noreg, !{{[0-9]+}},
 # CHECK-SAME:                 !DIExpression(DW_OP_LLVM_fragment, 32, 32)
 # CHECK-NEXT: XOR32rr
-# CHECK-NEXT: RETQ
+# CHECK-NEXT: RET64
 
 --- |
   target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
@@ -178,7 +178,7 @@
   bb.3.bb3:
     liveins: $eax, $ebx
     $eax = XOR32rr killed $eax, killed $ebx, implicit-def $eflags
-    RETQ $eax, debug-location !8
+    RET64 $eax, debug-location !8
 
 ...
 ---
@@ -216,7 +216,7 @@
   bb.3.bb3:
     liveins: $eax, $ebx
     $eax = XOR32rr killed $eax, killed $ebx, implicit-def $eflags
-    RETQ $eax, debug-location !48
+    RET64 $eax, debug-location !48
 
 ...
 ---
@@ -254,6 +254,6 @@
   bb.3.bb3:
     liveins: $eax, $ebx
     $eax = XOR32rr killed $eax, killed $ebx, implicit-def $eflags
-    RETQ $eax, debug-location !88
+    RET64 $eax, debug-location !88
 
 ...
diff --git a/llvm/test/DebugInfo/MIR/X86/live-debug-values-restore-collide.mir b/llvm/test/DebugInfo/MIR/X86/live-debug-values-restore-collide.mir
--- a/llvm/test/DebugInfo/MIR/X86/live-debug-values-restore-collide.mir
+++ b/llvm/test/DebugInfo/MIR/X86/live-debug-values-restore-collide.mir
@@ -81,5 +81,5 @@
     ; Return faff
     $eax = MOV32ri 0
     $rsp = frame-destroy ADD64ri8 $rsp, 24, implicit-def dead $eflags
-    RETQ debug-location !10
+    RET64 debug-location !10
 ...
diff --git a/llvm/test/DebugInfo/MIR/X86/live-debug-values-restore.mir b/llvm/test/DebugInfo/MIR/X86/live-debug-values-restore.mir
--- a/llvm/test/DebugInfo/MIR/X86/live-debug-values-restore.mir
+++ b/llvm/test/DebugInfo/MIR/X86/live-debug-values-restore.mir
@@ -326,7 +326,7 @@
     liveins: $rdi, $rbx, $r12, $r13, $r14, $r15, $rbp
   
     renamable $eax = MOV32rm killed renamable $rdi, 1, $noreg, 4, $noreg, debug-location !23 :: (load (s32) from %ir.add.ptr, !tbaa !24)
-    RETQ $eax, debug-location !28
+    RET64 $eax, debug-location !28
 
 ...
 ---
@@ -401,7 +401,7 @@
 
     renamable $eax = MOV32rm killed renamable $rsi, 1, $noreg, 4, $noreg, debug-location !123 :: (load (s32) from %ir.add.ptr, !tbaa !24)
     $rdi = MOV64ri 0
-    RETQ $eax, debug-location !128
+    RET64 $eax, debug-location !128
 
 ...
 ---
@@ -507,7 +507,7 @@
     liveins: $rdi, $rbx, $r12, $r13, $r14, $r15, $rbp
   
     renamable $eax = MOV32rm killed renamable $rdi, 1, $noreg, 4, $noreg, debug-location !223 :: (load (s32) from %ir.add.ptr, !tbaa !24)
-    RETQ $eax, debug-location !228
+    RET64 $eax, debug-location !228
 
 
 
@@ -628,7 +628,7 @@
   
     renamable $rdi = MOV64rm $rsp, 1, $noreg, -8, $noreg :: (load (s64) from %stack.0)
     renamable $eax = MOV32rm killed renamable $rdi, 1, $noreg, 4, $noreg, debug-location !323 :: (load (s32) from %ir.add.ptr, !tbaa !24)
-    RETQ $eax, debug-location !328
+    RET64 $eax, debug-location !328
 
 ...
 ---
@@ -731,6 +731,6 @@
     liveins: $rdi, $rbx, $r12, $r13, $r14, $r15, $rbp
   
     renamable $eax = MOV32rm killed renamable $rdi, 1, $noreg, 4, $noreg, debug-location !414 :: (load (s32) from %ir.add.ptr, !tbaa !24)
-    RETQ $eax, debug-location !415
+    RET64 $eax, debug-location !415
 
 ...
diff --git a/llvm/test/DebugInfo/MIR/X86/live-debug-values-spill.mir b/llvm/test/DebugInfo/MIR/X86/live-debug-values-spill.mir
--- a/llvm/test/DebugInfo/MIR/X86/live-debug-values-spill.mir
+++ b/llvm/test/DebugInfo/MIR/X86/live-debug-values-spill.mir
@@ -467,6 +467,6 @@
     $r14 = POP64r implicit-def $rsp, implicit $rsp, debug-location !90
     $r15 = POP64r implicit-def $rsp, implicit $rsp, debug-location !90
     $rbp = POP64r implicit-def $rsp, implicit $rsp, debug-location !90
-    RETQ debug-location !90
+    RET64 debug-location !90
 
 ...
diff --git a/llvm/test/DebugInfo/MIR/X86/live-debug-values-stack-clobber.mir b/llvm/test/DebugInfo/MIR/X86/live-debug-values-stack-clobber.mir
--- a/llvm/test/DebugInfo/MIR/X86/live-debug-values-stack-clobber.mir
+++ b/llvm/test/DebugInfo/MIR/X86/live-debug-values-stack-clobber.mir
@@ -195,6 +195,6 @@
     $r14 = frame-destroy POP64r implicit-def $rsp, implicit $rsp, debug-location !28
     $r15 = frame-destroy POP64r implicit-def $rsp, implicit $rsp, debug-location !28
     $rbp = frame-destroy POP64r implicit-def $rsp, implicit $rsp, debug-location !28
-    RETQ $rax, debug-location !28
+    RET64 $rax, debug-location !28
 
 ...
diff --git a/llvm/test/DebugInfo/MIR/X86/live-debug-values.mir b/llvm/test/DebugInfo/MIR/X86/live-debug-values.mir
--- a/llvm/test/DebugInfo/MIR/X86/live-debug-values.mir
+++ b/llvm/test/DebugInfo/MIR/X86/live-debug-values.mir
@@ -252,6 +252,6 @@
     CALL64pcrel32 @printf, csr_64, implicit $rsp, implicit $rdi, implicit $esi, implicit $al, implicit-def $rsp, implicit-def dead $eax, debug-location !46
     $eax = XOR32rr undef $eax, undef $eax, implicit-def dead $eflags, debug-location !47
     $rbx = POP64r implicit-def $rsp, implicit $rsp, debug-location !47
-    RETQ $eax, debug-location !47
+    RET64 $eax, debug-location !47
 
 ...
diff --git a/llvm/test/DebugInfo/MIR/X86/livedebugvalues-ignores-metaInstructions.mir b/llvm/test/DebugInfo/MIR/X86/livedebugvalues-ignores-metaInstructions.mir
--- a/llvm/test/DebugInfo/MIR/X86/livedebugvalues-ignores-metaInstructions.mir
+++ b/llvm/test/DebugInfo/MIR/X86/livedebugvalues-ignores-metaInstructions.mir
@@ -60,5 +60,5 @@
     successors: %bb.3
     renamable $ebx = KILL $ebx
   bb.3.bb3:
-    RETQ $eax, debug-location !17
+    RET64 $eax, debug-location !17
 ...
diff --git a/llvm/test/DebugInfo/MIR/X86/livedebugvalues_basic_diamond.mir b/llvm/test/DebugInfo/MIR/X86/livedebugvalues_basic_diamond.mir
--- a/llvm/test/DebugInfo/MIR/X86/livedebugvalues_basic_diamond.mir
+++ b/llvm/test/DebugInfo/MIR/X86/livedebugvalues_basic_diamond.mir
@@ -63,5 +63,5 @@
     successors: %bb.3
     $eax = MOV32ri 0, debug-location !17
   bb.3.bb3:
-    RETQ $eax, debug-location !17
+    RET64 $eax, debug-location !17
 ...
diff --git a/llvm/test/DebugInfo/MIR/X86/livedebugvalues_basic_diamond_match_clobber.mir b/llvm/test/DebugInfo/MIR/X86/livedebugvalues_basic_diamond_match_clobber.mir
--- a/llvm/test/DebugInfo/MIR/X86/livedebugvalues_basic_diamond_match_clobber.mir
+++ b/llvm/test/DebugInfo/MIR/X86/livedebugvalues_basic_diamond_match_clobber.mir
@@ -63,5 +63,5 @@
     successors: %bb.3
     $ebx = MOV32ri 0, debug-location !17
   bb.3.bb3:
-    RETQ $eax, debug-location !17
+    RET64 $eax, debug-location !17
 ...
diff --git a/llvm/test/DebugInfo/MIR/X86/livedebugvalues_basic_diamond_match_move.mir b/llvm/test/DebugInfo/MIR/X86/livedebugvalues_basic_diamond_match_move.mir
--- a/llvm/test/DebugInfo/MIR/X86/livedebugvalues_basic_diamond_match_move.mir
+++ b/llvm/test/DebugInfo/MIR/X86/livedebugvalues_basic_diamond_match_move.mir
@@ -69,5 +69,5 @@
     $eax = MOV32ri 0, debug-location !17
     DBG_VALUE $eax, $noreg, !16, !DIExpression(), debug-location !17
   bb.3.bb3:
-    RETQ $eax, debug-location !17
+    RET64 $eax, debug-location !17
 ...
diff --git a/llvm/test/DebugInfo/MIR/X86/livedebugvalues_basic_diamond_one_clobber.mir b/llvm/test/DebugInfo/MIR/X86/livedebugvalues_basic_diamond_one_clobber.mir
--- a/llvm/test/DebugInfo/MIR/X86/livedebugvalues_basic_diamond_one_clobber.mir
+++ b/llvm/test/DebugInfo/MIR/X86/livedebugvalues_basic_diamond_one_clobber.mir
@@ -61,5 +61,5 @@
     successors: %bb.3
     $eax = MOV32ri 0, debug-location !17
   bb.3.bb3:
-    RETQ $eax, debug-location !17
+    RET64 $eax, debug-location !17
 ...
diff --git a/llvm/test/DebugInfo/MIR/X86/livedebugvalues_basic_diamond_one_move.mir b/llvm/test/DebugInfo/MIR/X86/livedebugvalues_basic_diamond_one_move.mir
--- a/llvm/test/DebugInfo/MIR/X86/livedebugvalues_basic_diamond_one_move.mir
+++ b/llvm/test/DebugInfo/MIR/X86/livedebugvalues_basic_diamond_one_move.mir
@@ -64,5 +64,5 @@
     successors: %bb.3
     $eax = MOV32ri 0, debug-location !17
   bb.3.bb3:
-    RETQ $eax, debug-location !17
+    RET64 $eax, debug-location !17
 ...
diff --git a/llvm/test/DebugInfo/MIR/X86/livedebugvalues_basic_loop.mir b/llvm/test/DebugInfo/MIR/X86/livedebugvalues_basic_loop.mir
--- a/llvm/test/DebugInfo/MIR/X86/livedebugvalues_basic_loop.mir
+++ b/llvm/test/DebugInfo/MIR/X86/livedebugvalues_basic_loop.mir
@@ -62,5 +62,5 @@
     $eax = MOV32ri 0, debug-location !17
     JCC_1 %bb.1, 4, implicit killed $eflags
   bb.3.bb3:
-    RETQ $eax, debug-location !17
+    RET64 $eax, debug-location !17
 ...
diff --git a/llvm/test/DebugInfo/MIR/X86/livedebugvalues_bb_to_bb.mir b/llvm/test/DebugInfo/MIR/X86/livedebugvalues_bb_to_bb.mir
--- a/llvm/test/DebugInfo/MIR/X86/livedebugvalues_bb_to_bb.mir
+++ b/llvm/test/DebugInfo/MIR/X86/livedebugvalues_bb_to_bb.mir
@@ -61,5 +61,5 @@
     successors: %bb.3
     $eax = MOV32ri 0, debug-location !17
   bb.3.bb3:
-    RETQ $eax, debug-location !17
+    RET64 $eax, debug-location !17
 ...
diff --git a/llvm/test/DebugInfo/MIR/X86/livedebugvalues_bb_to_bb_clobbered.mir b/llvm/test/DebugInfo/MIR/X86/livedebugvalues_bb_to_bb_clobbered.mir
--- a/llvm/test/DebugInfo/MIR/X86/livedebugvalues_bb_to_bb_clobbered.mir
+++ b/llvm/test/DebugInfo/MIR/X86/livedebugvalues_bb_to_bb_clobbered.mir
@@ -57,5 +57,5 @@
     successors: %bb.3
     $eax = MOV32ri 0, debug-location !17
   bb.3.bb3:
-    RETQ $eax, debug-location !17
+    RET64 $eax, debug-location !17
 ...
diff --git a/llvm/test/DebugInfo/MIR/X86/livedebugvalues_bb_to_bb_move_to_clobber.mir b/llvm/test/DebugInfo/MIR/X86/livedebugvalues_bb_to_bb_move_to_clobber.mir
--- a/llvm/test/DebugInfo/MIR/X86/livedebugvalues_bb_to_bb_move_to_clobber.mir
+++ b/llvm/test/DebugInfo/MIR/X86/livedebugvalues_bb_to_bb_move_to_clobber.mir
@@ -64,5 +64,5 @@
     successors: %bb.3
     $eax = MOV32ri 0, debug-location !17
   bb.3.bb3:
-    RETQ $eax, debug-location !17
+    RET64 $eax, debug-location !17
 ...
diff --git a/llvm/test/DebugInfo/MIR/X86/livedebugvalues_load_in_loop.mir b/llvm/test/DebugInfo/MIR/X86/livedebugvalues_load_in_loop.mir
--- a/llvm/test/DebugInfo/MIR/X86/livedebugvalues_load_in_loop.mir
+++ b/llvm/test/DebugInfo/MIR/X86/livedebugvalues_load_in_loop.mir
@@ -109,5 +109,5 @@
   liveins: $rax, $rbp
   bb.6:
   liveins: $rax, $rbp
-    RETQ $rax, debug-location !17
+    RET64 $rax, debug-location !17
 ...
diff --git a/llvm/test/DebugInfo/MIR/X86/livedebugvalues_loop_break.mir b/llvm/test/DebugInfo/MIR/X86/livedebugvalues_loop_break.mir
--- a/llvm/test/DebugInfo/MIR/X86/livedebugvalues_loop_break.mir
+++ b/llvm/test/DebugInfo/MIR/X86/livedebugvalues_loop_break.mir
@@ -70,5 +70,5 @@
     $eax = MOV32ri 0, debug-location !17
     JCC_1 %bb.1, 4, implicit killed $eflags
   bb.4.bb4:
-    RETQ $eax, debug-location !17
+    RET64 $eax, debug-location !17
 ...
diff --git a/llvm/test/DebugInfo/MIR/X86/livedebugvalues_loop_break_clobbered.mir b/llvm/test/DebugInfo/MIR/X86/livedebugvalues_loop_break_clobbered.mir
--- a/llvm/test/DebugInfo/MIR/X86/livedebugvalues_loop_break_clobbered.mir
+++ b/llvm/test/DebugInfo/MIR/X86/livedebugvalues_loop_break_clobbered.mir
@@ -62,5 +62,5 @@
     $eax = MOV32ri 0, debug-location !17
     JCC_1 %bb.1, 4, implicit killed $eflags
   bb.4.bb4:
-    RETQ $eax, debug-location !17
+    RET64 $eax, debug-location !17
 ...
diff --git a/llvm/test/DebugInfo/MIR/X86/livedebugvalues_loop_clobbered.mir b/llvm/test/DebugInfo/MIR/X86/livedebugvalues_loop_clobbered.mir
--- a/llvm/test/DebugInfo/MIR/X86/livedebugvalues_loop_clobbered.mir
+++ b/llvm/test/DebugInfo/MIR/X86/livedebugvalues_loop_clobbered.mir
@@ -59,5 +59,5 @@
     JCC_1 %bb.1, 4, implicit killed $eflags
 
   bb.3.bb3:
-    RETQ $eax, debug-location !17
+    RET64 $eax, debug-location !17
 ...
diff --git a/llvm/test/DebugInfo/MIR/X86/livedebugvalues_loop_diamond.mir b/llvm/test/DebugInfo/MIR/X86/livedebugvalues_loop_diamond.mir
--- a/llvm/test/DebugInfo/MIR/X86/livedebugvalues_loop_diamond.mir
+++ b/llvm/test/DebugInfo/MIR/X86/livedebugvalues_loop_diamond.mir
@@ -78,5 +78,5 @@
     $eax = MOV32ri 0, debug-location !17
     JCC_1 %bb.1, 4, implicit killed $eflags
   bb.5.bb5:
-    RETQ $eax, debug-location !17
+    RET64 $eax, debug-location !17
 ...
diff --git a/llvm/test/DebugInfo/MIR/X86/livedebugvalues_loop_diamond_clobber.mir b/llvm/test/DebugInfo/MIR/X86/livedebugvalues_loop_diamond_clobber.mir
--- a/llvm/test/DebugInfo/MIR/X86/livedebugvalues_loop_diamond_clobber.mir
+++ b/llvm/test/DebugInfo/MIR/X86/livedebugvalues_loop_diamond_clobber.mir
@@ -69,5 +69,5 @@
     $eax = MOV32ri 0, debug-location !17
     JCC_1 %bb.1, 4, implicit killed $eflags
   bb.5.bb5:
-    RETQ $eax, debug-location !17
+    RET64 $eax, debug-location !17
 ...
diff --git a/llvm/test/DebugInfo/MIR/X86/livedebugvalues_loop_diamond_move.mir b/llvm/test/DebugInfo/MIR/X86/livedebugvalues_loop_diamond_move.mir
--- a/llvm/test/DebugInfo/MIR/X86/livedebugvalues_loop_diamond_move.mir
+++ b/llvm/test/DebugInfo/MIR/X86/livedebugvalues_loop_diamond_move.mir
@@ -79,5 +79,5 @@
     $ebx = MOV32ri 0, debug-location !17
     JCC_1 %bb.1, 4, implicit killed $eflags
   bb.5.bb5:
-    RETQ $eax, debug-location !17
+    RET64 $eax, debug-location !17
 ...
diff --git a/llvm/test/DebugInfo/MIR/X86/livedebugvalues_loop_early_clobber.mir b/llvm/test/DebugInfo/MIR/X86/livedebugvalues_loop_early_clobber.mir
--- a/llvm/test/DebugInfo/MIR/X86/livedebugvalues_loop_early_clobber.mir
+++ b/llvm/test/DebugInfo/MIR/X86/livedebugvalues_loop_early_clobber.mir
@@ -56,5 +56,5 @@
     $eax = MOV32ri 0, debug-location !17
     JCC_1 %bb.1, 4, implicit killed $eflags
   bb.3.bb3:
-    RETQ $eax, debug-location !17
+    RET64 $eax, debug-location !17
 ...
diff --git a/llvm/test/DebugInfo/MIR/X86/livedebugvalues_loop_terminated.mir b/llvm/test/DebugInfo/MIR/X86/livedebugvalues_loop_terminated.mir
--- a/llvm/test/DebugInfo/MIR/X86/livedebugvalues_loop_terminated.mir
+++ b/llvm/test/DebugInfo/MIR/X86/livedebugvalues_loop_terminated.mir
@@ -63,5 +63,5 @@
     JCC_1 %bb.1, 4, implicit killed $eflags
 
   bb.3.bb3:
-    RETQ $eax, debug-location !17
+    RET64 $eax, debug-location !17
 ...
diff --git a/llvm/test/DebugInfo/MIR/X86/livedebugvalues_loop_two_backedge.mir b/llvm/test/DebugInfo/MIR/X86/livedebugvalues_loop_two_backedge.mir
--- a/llvm/test/DebugInfo/MIR/X86/livedebugvalues_loop_two_backedge.mir
+++ b/llvm/test/DebugInfo/MIR/X86/livedebugvalues_loop_two_backedge.mir
@@ -70,5 +70,5 @@
     $eax = MOV32ri 0, debug-location !17
     JCC_1 %bb.1, 4, implicit killed $eflags
   bb.4.bb4:
-    RETQ $eax, debug-location !17
+    RET64 $eax, debug-location !17
 ...
diff --git a/llvm/test/DebugInfo/MIR/X86/livedebugvalues_loop_two_backedge_clobbered.mir b/llvm/test/DebugInfo/MIR/X86/livedebugvalues_loop_two_backedge_clobbered.mir
--- a/llvm/test/DebugInfo/MIR/X86/livedebugvalues_loop_two_backedge_clobbered.mir
+++ b/llvm/test/DebugInfo/MIR/X86/livedebugvalues_loop_two_backedge_clobbered.mir
@@ -62,5 +62,5 @@
     $eax = MOV32ri 0, debug-location !17
     JCC_1 %bb.1, 4, implicit killed $eflags
   bb.4.bb4:
-    RETQ $eax, debug-location !17
+    RET64 $eax, debug-location !17
 ...
diff --git a/llvm/test/DebugInfo/MIR/X86/livedebugvalues_loop_within_loop.mir b/llvm/test/DebugInfo/MIR/X86/livedebugvalues_loop_within_loop.mir
--- a/llvm/test/DebugInfo/MIR/X86/livedebugvalues_loop_within_loop.mir
+++ b/llvm/test/DebugInfo/MIR/X86/livedebugvalues_loop_within_loop.mir
@@ -77,5 +77,5 @@
     $eax = MOV32ri 0, debug-location !17
     JCC_1 %bb.1, 4, implicit killed $eflags
   bb.5.bb5:
-    RETQ $eax, debug-location !17
+    RET64 $eax, debug-location !17
 ...
diff --git a/llvm/test/DebugInfo/MIR/X86/livedebugvalues_loop_within_loop_clobbered.mir b/llvm/test/DebugInfo/MIR/X86/livedebugvalues_loop_within_loop_clobbered.mir
--- a/llvm/test/DebugInfo/MIR/X86/livedebugvalues_loop_within_loop_clobbered.mir
+++ b/llvm/test/DebugInfo/MIR/X86/livedebugvalues_loop_within_loop_clobbered.mir
@@ -68,5 +68,5 @@
     $eax = MOV32ri 0, debug-location !17
     JCC_1 %bb.1, 4, implicit killed $eflags
   bb.5.bb5:
-    RETQ $eax, debug-location !17
+    RET64 $eax, debug-location !17
 ...
diff --git a/llvm/test/DebugInfo/MIR/X86/livedebugvalues_loop_within_loop_moved.mir b/llvm/test/DebugInfo/MIR/X86/livedebugvalues_loop_within_loop_moved.mir
--- a/llvm/test/DebugInfo/MIR/X86/livedebugvalues_loop_within_loop_moved.mir
+++ b/llvm/test/DebugInfo/MIR/X86/livedebugvalues_loop_within_loop_moved.mir
@@ -71,5 +71,5 @@
     $eax = MOV32ri 0, debug-location !17
     JCC_1 %bb.1, 4, implicit killed $eflags
   bb.5.bb5:
-    RETQ $eax, debug-location !17
+    RET64 $eax, debug-location !17
 ...
diff --git a/llvm/test/DebugInfo/MIR/X86/livedebugvalues_loop_within_loop_outer_moved.mir b/llvm/test/DebugInfo/MIR/X86/livedebugvalues_loop_within_loop_outer_moved.mir
--- a/llvm/test/DebugInfo/MIR/X86/livedebugvalues_loop_within_loop_outer_moved.mir
+++ b/llvm/test/DebugInfo/MIR/X86/livedebugvalues_loop_within_loop_outer_moved.mir
@@ -73,5 +73,5 @@
     DBG_VALUE $eax, $noreg, !16, !DIExpression(), debug-location !17
     JCC_1 %bb.1, 4, implicit killed $eflags
   bb.5.bb5:
-    RETQ $eax, debug-location !17
+    RET64 $eax, debug-location !17
 ...
diff --git a/llvm/test/DebugInfo/MIR/X86/livedebugvalues_many_loop_heads.mir b/llvm/test/DebugInfo/MIR/X86/livedebugvalues_many_loop_heads.mir
--- a/llvm/test/DebugInfo/MIR/X86/livedebugvalues_many_loop_heads.mir
+++ b/llvm/test/DebugInfo/MIR/X86/livedebugvalues_many_loop_heads.mir
@@ -191,6 +191,6 @@
  
   bb.18:
   liveins: $rsi, $rdi, $eflags
-    RETQ
+    RET64
 
 ...
diff --git a/llvm/test/DebugInfo/MIR/X86/livedebugvars-crossbb-interval.mir b/llvm/test/DebugInfo/MIR/X86/livedebugvars-crossbb-interval.mir
--- a/llvm/test/DebugInfo/MIR/X86/livedebugvars-crossbb-interval.mir
+++ b/llvm/test/DebugInfo/MIR/X86/livedebugvars-crossbb-interval.mir
@@ -133,6 +133,6 @@
   
   bb.4.exit:
     $eax = COPY %5, debug-location !18
-    RETQ implicit $eax, debug-location !18
+    RET64 implicit $eax, debug-location !18
 
 ...
diff --git a/llvm/test/DebugInfo/MIR/X86/multiple-param-dbg-value-entry.mir b/llvm/test/DebugInfo/MIR/X86/multiple-param-dbg-value-entry.mir
--- a/llvm/test/DebugInfo/MIR/X86/multiple-param-dbg-value-entry.mir
+++ b/llvm/test/DebugInfo/MIR/X86/multiple-param-dbg-value-entry.mir
@@ -80,6 +80,6 @@
     MOV32mr $rip, 1, $noreg, @global, $noreg, killed renamable $edi, debug-location !18 :: (store (s32) into @global)
     INLINEASM &"", 1, 12, implicit-def dead early-clobber $edi, 12, implicit-def dead early-clobber $esi, 12, implicit-def dead early-clobber $edx, 12, implicit-def dead early-clobber $df, 12, implicit-def dead early-clobber $fpsw, 12, implicit-def dead early-clobber $eflags, !19, debug-location !18
     $eax = MOV32ri 123, debug-location !18
-    RETQ killed $eax, debug-location !18
+    RET64 killed $eax, debug-location !18
 
 ...
diff --git a/llvm/test/DebugInfo/MIR/X86/piece-entryval.mir b/llvm/test/DebugInfo/MIR/X86/piece-entryval.mir
--- a/llvm/test/DebugInfo/MIR/X86/piece-entryval.mir
+++ b/llvm/test/DebugInfo/MIR/X86/piece-entryval.mir
@@ -49,6 +49,6 @@
     frame-setup PUSH64r killed $rbp, implicit-def $rsp, implicit $rsp
     $rbp = frame-setup MOV64rr $rsp
     $rbp = frame-destroy POP64r implicit-def $rsp, implicit $rsp, debug-location !16
-    RETQ debug-location !16
+    RET64 debug-location !16
 
 ...
diff --git a/llvm/test/DebugInfo/MIR/X86/propagate-entry-value-cross-bbs.mir b/llvm/test/DebugInfo/MIR/X86/propagate-entry-value-cross-bbs.mir
--- a/llvm/test/DebugInfo/MIR/X86/propagate-entry-value-cross-bbs.mir
+++ b/llvm/test/DebugInfo/MIR/X86/propagate-entry-value-cross-bbs.mir
@@ -171,6 +171,6 @@
     CFI_INSTRUCTION def_cfa_offset 16, debug-location !34
     $rbp = frame-destroy POP64r implicit-def $rsp, implicit $rsp, debug-location !34
     CFI_INSTRUCTION def_cfa_offset 8, debug-location !34
-    RETQ killed $eax, debug-location !34
+    RET64 killed $eax, debug-location !34
 
 ...
diff --git a/llvm/test/DebugInfo/MIR/X86/remove-entry-value-from-loop.mir b/llvm/test/DebugInfo/MIR/X86/remove-entry-value-from-loop.mir
--- a/llvm/test/DebugInfo/MIR/X86/remove-entry-value-from-loop.mir
+++ b/llvm/test/DebugInfo/MIR/X86/remove-entry-value-from-loop.mir
@@ -154,7 +154,7 @@
     liveins: $eax
   
     DBG_VALUE $eax, $noreg, !15, !DIExpression(), debug-location !17
-    RETQ $eax, debug-location !32
+    RET64 $eax, debug-location !32
   
   bb.3.if.then:
     liveins: $eax, $edi
@@ -162,6 +162,6 @@
     renamable $eax = nsw IMUL32rr killed renamable $eax, killed renamable $edi, implicit-def dead $eflags, debug-location !28
     DBG_VALUE $eax, $noreg, !15, !DIExpression(), debug-location !17
     DBG_VALUE $eax, $noreg, !15, !DIExpression(), debug-location !17
-    RETQ $eax, debug-location !32
+    RET64 $eax, debug-location !32
 
 ...
diff --git a/llvm/test/DebugInfo/MIR/X86/remove-redundant-dbg-vals.mir b/llvm/test/DebugInfo/MIR/X86/remove-redundant-dbg-vals.mir
--- a/llvm/test/DebugInfo/MIR/X86/remove-redundant-dbg-vals.mir
+++ b/llvm/test/DebugInfo/MIR/X86/remove-redundant-dbg-vals.mir
@@ -169,7 +169,7 @@
     $eax = XOR32rr undef $eax, undef $eax, implicit-def dead $eflags, debug-location !22
     $rcx = frame-destroy POP64r implicit-def $rsp, implicit $rsp, debug-location !22
     CFI_INSTRUCTION def_cfa_offset 8, debug-location !22
-    RETQ killed $eax, debug-location !22
+    RET64 killed $eax, debug-location !22
 
 ...
 ---
@@ -192,7 +192,7 @@
     $eax = XOR32rr undef $eax, undef $eax, implicit-def dead $eflags, debug-location !22
     $rcx = frame-destroy POP64r implicit-def $rsp, implicit $rsp, debug-location !22
     CFI_INSTRUCTION def_cfa_offset 8, debug-location !22
-    RETQ killed $eax, debug-location !22
+    RET64 killed $eax, debug-location !22
 
 ...
 ---
@@ -214,7 +214,7 @@
     DBG_VALUE $edi, $noreg, !13, !DIExpression(DW_OP_LLVM_fragment, 0, 32), debug-location !14
     $rcx = frame-destroy POP64r implicit-def $rsp, implicit $rsp, debug-location !22
     CFI_INSTRUCTION def_cfa_offset 8, debug-location !22
-    RETQ killed $eax, debug-location !22
+    RET64 killed $eax, debug-location !22
 
 ...
 ---
@@ -236,7 +236,7 @@
     DBG_VALUE $edi, $noreg, !13, !DIExpression(DW_OP_LLVM_fragment, 0, 32), debug-location !14
     $rcx = frame-destroy POP64r implicit-def $rsp, implicit $rsp, debug-location !22
     CFI_INSTRUCTION def_cfa_offset 8, debug-location !22
-    RETQ killed $eax, debug-location !22
+    RET64 killed $eax, debug-location !22
 
 ...
 ---
@@ -258,7 +258,7 @@
     DBG_VALUE $edi, $noreg, !13, !DIExpression(DW_OP_LLVM_fragment, 0, 32), debug-location !14
     $rcx = frame-destroy POP64r implicit-def $rsp, implicit $rsp, debug-location !22
     CFI_INSTRUCTION def_cfa_offset 8, debug-location !22
-    RETQ killed $eax, debug-location !22
+    RET64 killed $eax, debug-location !22
 
 ...
 ---
@@ -279,6 +279,6 @@
     $eax = XOR32rr undef $eax, undef $eax, implicit-def dead $eflags, debug-location !22
     $rcx = frame-destroy POP64r implicit-def $rsp, implicit $rsp, debug-location !22
     CFI_INSTRUCTION def_cfa_offset 8, debug-location !22
-    RETQ killed $eax, debug-location !22
+    RET64 killed $eax, debug-location !22
 
 ...
diff --git a/llvm/test/DebugInfo/MIR/X86/unreachable-block-call-site.mir b/llvm/test/DebugInfo/MIR/X86/unreachable-block-call-site.mir
--- a/llvm/test/DebugInfo/MIR/X86/unreachable-block-call-site.mir
+++ b/llvm/test/DebugInfo/MIR/X86/unreachable-block-call-site.mir
@@ -63,6 +63,6 @@
     $eax = XOR32rr undef $eax, undef $eax, implicit-def dead $eflags, debug-location !18
     $rcx = frame-destroy POP64r implicit-def $rsp, implicit $rsp, debug-location !18
     CFI_INSTRUCTION def_cfa_offset 8, debug-location !18
-    RETQ killed $eax, debug-location !18
+    RET64 killed $eax, debug-location !18
 
 ...
diff --git a/llvm/test/DebugInfo/X86/bbjoin.ll b/llvm/test/DebugInfo/X86/bbjoin.ll
--- a/llvm/test/DebugInfo/X86/bbjoin.ll
+++ b/llvm/test/DebugInfo/X86/bbjoin.ll
@@ -17,7 +17,7 @@
 ; CHECK:   DBG_VALUE 43, $noreg, ![[X]],
 ; CHECK: bb.2.if.end:
 ; CHECK-NOT:  DBG_VALUE 23, $noreg, ![[X]],
-; CHECK:   RETQ $eax
+; CHECK:   RET64 $eax
 
 target datalayout = "e-m:o-i64:64-f80:128-n8:16:32:64-S128"
 target triple = "x86_64-apple-macosx10.11.0"
diff --git a/llvm/test/DebugInfo/X86/dbg_entity_calc_ignores_KILL_instruction_at_return.mir b/llvm/test/DebugInfo/X86/dbg_entity_calc_ignores_KILL_instruction_at_return.mir
--- a/llvm/test/DebugInfo/X86/dbg_entity_calc_ignores_KILL_instruction_at_return.mir
+++ b/llvm/test/DebugInfo/X86/dbg_entity_calc_ignores_KILL_instruction_at_return.mir
@@ -71,6 +71,6 @@
     ; CHECK:  [0x0000000000000003,  0x0000000000000004): DW_OP_reg0 RAX)
     ; CHECK-NEXT: DW_AT_name    ("result")
     renamable $eax = KILL killed $eax, implicit-def $rax
-    RETQ killed $eax, debug-location !24
+    RET64 killed $eax, debug-location !24
 
 ...
diff --git a/llvm/test/DebugInfo/X86/dbg_entity_calc_ignores_KILL_instruction_still_clobbers.mir b/llvm/test/DebugInfo/X86/dbg_entity_calc_ignores_KILL_instruction_still_clobbers.mir
--- a/llvm/test/DebugInfo/X86/dbg_entity_calc_ignores_KILL_instruction_still_clobbers.mir
+++ b/llvm/test/DebugInfo/X86/dbg_entity_calc_ignores_KILL_instruction_still_clobbers.mir
@@ -74,6 +74,6 @@
     $edi = MOV32rr $eax, debug-location !24
     $eax = MOV32rr $eax, debug-location !24
     $edi = MOV32rr $eax, debug-location !24
-    RETQ killed $eax, debug-location !24
+    RET64 killed $eax, debug-location !24
 
 ...
diff --git a/llvm/test/DebugInfo/X86/dbg_value_list_clobbers.mir b/llvm/test/DebugInfo/X86/dbg_value_list_clobbers.mir
--- a/llvm/test/DebugInfo/X86/dbg_value_list_clobbers.mir
+++ b/llvm/test/DebugInfo/X86/dbg_value_list_clobbers.mir
@@ -80,5 +80,5 @@
     DBG_VALUE_LIST !12, !DIExpression(DW_OP_LLVM_arg, 0, DW_OP_LLVM_arg, 1, DW_OP_plus, DW_OP_stack_value, DW_OP_LLVM_fragment, 16, 16), $eax, $ecx, debug-location !15
     ; CHECK-NEXT: [{{.*}}): DW_OP_breg0 RAX+0, DW_OP_constu 0xffffffff, DW_OP_and, DW_OP_stack_value, DW_OP_piece 0x2, DW_OP_breg0 RAX+0, DW_OP_constu 0xffffffff, DW_OP_and, DW_OP_breg2 RCX+0, DW_OP_constu 0xffffffff, DW_OP_and, DW_OP_plus, DW_OP_stack_value, DW_OP_piece 0x2
 
-    RETQ debug-location !15
+    RET64 debug-location !15
 ...
diff --git a/llvm/test/DebugInfo/X86/dbg_value_list_emission.mir b/llvm/test/DebugInfo/X86/dbg_value_list_emission.mir
--- a/llvm/test/DebugInfo/X86/dbg_value_list_emission.mir
+++ b/llvm/test/DebugInfo/X86/dbg_value_list_emission.mir
@@ -97,5 +97,5 @@
     ; CHECK-NEXT:   DW_AT_name ("localh")
     ; CHECK-NOT:   DW_AT_location
 
-    RETQ debug-location !15
+    RET64 debug-location !15
 ...
diff --git a/llvm/test/DebugInfo/X86/debug-loc-asan.mir b/llvm/test/DebugInfo/X86/debug-loc-asan.mir
--- a/llvm/test/DebugInfo/X86/debug-loc-asan.mir
+++ b/llvm/test/DebugInfo/X86/debug-loc-asan.mir
@@ -341,6 +341,6 @@
     $rsp = MOV64rr $rbp, debug-location !12
     $rbp = frame-destroy POP64r implicit-def $rsp, implicit $rsp, debug-location !12
     CFI_INSTRUCTION def_cfa $rsp, 8, debug-location !12
-    RETQ implicit killed $eax, debug-location !12
+    RET64 implicit killed $eax, debug-location !12
 
 ...
diff --git a/llvm/test/DebugInfo/X86/debug-loc-offset.mir b/llvm/test/DebugInfo/X86/debug-loc-offset.mir
--- a/llvm/test/DebugInfo/X86/debug-loc-offset.mir
+++ b/llvm/test/DebugInfo/X86/debug-loc-offset.mir
@@ -207,7 +207,7 @@
     $esp = frame-destroy ADD32ri8 $esp, 4, implicit-def dead $eflags, debug-location !16
     $ebp = frame-destroy POP32r implicit-def $esp, implicit $esp, debug-location !16
     CFI_INSTRUCTION def_cfa $esp, 4, debug-location !16
-    RETL implicit killed $eax, debug-location !16
+    RET32 implicit killed $eax, debug-location !16
 
 ...
 ---
@@ -271,6 +271,6 @@
     $esp = frame-destroy ADD32ri8 $esp, 24, implicit-def dead $eflags, debug-location !30
     $ebp = frame-destroy POP32r implicit-def $esp, implicit $esp, debug-location !30
     CFI_INSTRUCTION def_cfa $esp, 4, debug-location !30
-    RETL debug-location !30
+    RET32 debug-location !30
 
 ...
diff --git a/llvm/test/DebugInfo/X86/dw_op_constu.mir b/llvm/test/DebugInfo/X86/dw_op_constu.mir
--- a/llvm/test/DebugInfo/X86/dw_op_constu.mir
+++ b/llvm/test/DebugInfo/X86/dw_op_constu.mir
@@ -73,7 +73,7 @@
     renamable $rcx = MOV64rm renamable $noreg, 1, $noreg, 0, $fs
     DBG_VALUE renamable $rcx, 0, !9, !DIExpression(DW_OP_constu, 18446744073709551614, DW_OP_minus), debug-location !14
 
-    RETQ debug-location !14
+    RET64 debug-location !14
 
 
   bb.1: ;-------------------------- DW_OP_plus -------------------------------
@@ -106,7 +106,7 @@
     renamable $rcx = MOV64rm renamable $noreg, 1, $noreg, 0, $fs
     DBG_VALUE renamable $rcx, 0, !9, !DIExpression(DW_OP_constu, 18446744073709551614, DW_OP_plus), debug-location !14
 
-    RETQ debug-location !14
+    RET64 debug-location !14
 
 
   bb.2: ;-------------------------- DW_OP_plus_uconst -------------------------------
@@ -139,7 +139,7 @@
     renamable $rcx = MOV64rm renamable $noreg, 1, $noreg, 0, $fs
     DBG_VALUE renamable $rcx, 0, !9, !DIExpression(DW_OP_plus_uconst, 18446744073709551614), debug-location !14
 
-    RETQ debug-location !14
+    RET64 debug-location !14
 
 ...
 
diff --git a/llvm/test/DebugInfo/X86/dw_op_minus.mir b/llvm/test/DebugInfo/X86/dw_op_minus.mir
--- a/llvm/test/DebugInfo/X86/dw_op_minus.mir
+++ b/llvm/test/DebugInfo/X86/dw_op_minus.mir
@@ -114,6 +114,6 @@
     MOV64mr killed renamable $rax, 1, $noreg, 0, $fs, killed renamable $rcx, debug-location !18 :: (store (s64) into @__safestack_unsafe_stack_ptr)
     $rsp = frame-destroy ADD64ri8 $rsp, 24, implicit-def dead $eflags, debug-location !18
     CFI_INSTRUCTION def_cfa_offset 8, debug-location !18
-    RETQ debug-location !18
+    RET64 debug-location !18
 
 ...
diff --git a/llvm/test/DebugInfo/X86/live-debug-values-constprop.mir b/llvm/test/DebugInfo/X86/live-debug-values-constprop.mir
--- a/llvm/test/DebugInfo/X86/live-debug-values-constprop.mir
+++ b/llvm/test/DebugInfo/X86/live-debug-values-constprop.mir
@@ -153,7 +153,7 @@
 
   bb.3.bb3:
     liveins: $rax
-    RETQ $eax, debug-location !9
+    RET64 $eax, debug-location !9
 
 ...
 ---
@@ -217,7 +217,7 @@
 
   bb.3.bb3:
     liveins: $rax
-    RETQ $eax, debug-location !42
+    RET64 $eax, debug-location !42
 
 ...
 ---
@@ -281,7 +281,7 @@
 
   bb.3.bb3:
     liveins: $rax
-    RETQ $eax, debug-location !82
+    RET64 $eax, debug-location !82
 
 ...
 ---
@@ -342,6 +342,6 @@
 
   bb.3.bb3:
     liveins: $rax
-    RETQ $eax, debug-location !122
+    RET64 $eax, debug-location !122
 
 ...
diff --git a/llvm/test/DebugInfo/X86/location-range-inlined-xblock.mir b/llvm/test/DebugInfo/X86/location-range-inlined-xblock.mir
--- a/llvm/test/DebugInfo/X86/location-range-inlined-xblock.mir
+++ b/llvm/test/DebugInfo/X86/location-range-inlined-xblock.mir
@@ -167,6 +167,6 @@
     $rbx = frame-destroy POP64r implicit-def $rsp, implicit $rsp, debug-location !40
     DBG_VALUE $edi, $noreg, !15, !DIExpression(DW_OP_LLVM_entry_value, 1), debug-location !16
     CFI_INSTRUCTION def_cfa_offset 8, debug-location !40
-    RETQ $eax, debug-location !40
+    RET64 $eax, debug-location !40
 
 ...
diff --git a/llvm/test/DebugInfo/X86/location-range.mir b/llvm/test/DebugInfo/X86/location-range.mir
--- a/llvm/test/DebugInfo/X86/location-range.mir
+++ b/llvm/test/DebugInfo/X86/location-range.mir
@@ -133,12 +133,12 @@
 
   bb.1.if.then:
     renamable $rax = MOV64rm $rip, 1, $noreg, @b, $noreg, debug-location !21 :: (dereferenceable load (s64) from @b)
-    RETQ $rax, debug-location !27
+    RET64 $rax, debug-location !27
 
   bb.2.if.end:
     DBG_VALUE 0, $noreg, !19, !DIExpression(), debug-location !27
     renamable $rax = MOV64rm $rip, 1, $noreg, @a, $noreg, debug-location !27 :: (dereferenceable load (s64) from @a)
-    RETQ $rax, debug-location !27
+    RET64 $rax, debug-location !27
 
 ...
 ---
@@ -147,6 +147,6 @@
   bb.0.entry:
     $eax = MOVZX32rm16 $noreg, 1, $noreg, 0, $noreg, debug-location !48 :: (load (s16) from `i16* null`, align 1)
     DBG_VALUE $ax, $noreg, !39, !DIExpression(), debug-location !51
-    RETQ $ax, debug-location !51
+    RET64 $ax, debug-location !51
 
 ...
diff --git a/llvm/test/DebugInfo/X86/pr19307.mir b/llvm/test/DebugInfo/X86/pr19307.mir
--- a/llvm/test/DebugInfo/X86/pr19307.mir
+++ b/llvm/test/DebugInfo/X86/pr19307.mir
@@ -219,6 +219,6 @@
     $rsp = frame-destroy ADD64ri8 $rsp, 32, implicit-def dead $eflags, debug-location !53
     $rbp = frame-destroy POP64r implicit-def $rsp, implicit $rsp, debug-location !53
     CFI_INSTRUCTION def_cfa $rsp, 8, debug-location !53
-    RETQ debug-location !53
+    RET64 debug-location !53
 
 ...
diff --git a/llvm/test/DebugInfo/X86/pr34545.ll b/llvm/test/DebugInfo/X86/pr34545.ll
--- a/llvm/test/DebugInfo/X86/pr34545.ll
+++ b/llvm/test/DebugInfo/X86/pr34545.ll
@@ -8,7 +8,7 @@
 ; CHECK: DBG_VALUE $eax
 ; CHECK: $eax = SHL32rCL killed renamable $eax
 ; CHECK: DBG_VALUE $eax
-; CHECK: RETQ $eax
+; CHECK: RET64 $eax
 
 target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
 target triple = "x86_64-unknown-linux-gnu"
diff --git a/llvm/test/DebugInfo/X86/single-location-2.mir b/llvm/test/DebugInfo/X86/single-location-2.mir
--- a/llvm/test/DebugInfo/X86/single-location-2.mir
+++ b/llvm/test/DebugInfo/X86/single-location-2.mir
@@ -88,5 +88,5 @@
     ;; end scope, end location range
     $esi = MOV32ri 2, debug-location !26
 
-    RETQ debug-location !15
+    RET64 debug-location !15
 ...
diff --git a/llvm/test/DebugInfo/X86/single-location-inlined-param.mir b/llvm/test/DebugInfo/X86/single-location-inlined-param.mir
--- a/llvm/test/DebugInfo/X86/single-location-inlined-param.mir
+++ b/llvm/test/DebugInfo/X86/single-location-inlined-param.mir
@@ -105,10 +105,10 @@
   bb.2.return:
     liveins: $eax
 
-    RETQ $eax, debug-location !36
+    RET64 $eax, debug-location !36
 
   bb.1.if.end:
     renamable $eax = MOV32ri 1
-    RETQ $eax, debug-location !36
+    RET64 $eax, debug-location !36
 
 ...
diff --git a/llvm/test/DebugInfo/X86/single-location-interrupted-scope.mir b/llvm/test/DebugInfo/X86/single-location-interrupted-scope.mir
--- a/llvm/test/DebugInfo/X86/single-location-interrupted-scope.mir
+++ b/llvm/test/DebugInfo/X86/single-location-interrupted-scope.mir
@@ -155,7 +155,7 @@
     TAILJMPd64 @ext, csr_64, implicit $rsp, implicit $ssp, implicit $rsp, implicit $ssp, implicit killed $al, debug-location !35
 
   bb.1.if.end:
-    RETQ debug-location !36
+    RET64 debug-location !36
 
 ...
 ---
@@ -177,6 +177,6 @@
     TAILJMPd64 @ext, csr_64, implicit $rsp, implicit $ssp, implicit $rsp, implicit $ssp, implicit killed $al, debug-location !49
 
   bb.1.if.end:
-    RETQ debug-location !50
+    RET64 debug-location !50
 
 ...
diff --git a/llvm/test/DebugInfo/X86/trim-var-locs.mir b/llvm/test/DebugInfo/X86/trim-var-locs.mir
--- a/llvm/test/DebugInfo/X86/trim-var-locs.mir
+++ b/llvm/test/DebugInfo/X86/trim-var-locs.mir
@@ -116,5 +116,5 @@
     $edi = MOV32ri 9, debug-location !26
 
     ; scope fun !7
-    RETQ debug-location !15
+    RET64 debug-location !15
 ...
diff --git a/llvm/test/Transforms/SampleProfile/pseudo-probe.mir b/llvm/test/Transforms/SampleProfile/pseudo-probe.mir
--- a/llvm/test/Transforms/SampleProfile/pseudo-probe.mir
+++ b/llvm/test/Transforms/SampleProfile/pseudo-probe.mir
@@ -19,11 +19,11 @@
   bb.2:
     PSEUDO_PROBE 6699318081062747564, 3, 0, 0
     PSEUDO_PROBE 6699318081062747564, 4, 0, 0
-    RETQ
+    RET64
   
   bb.1:
     PSEUDO_PROBE 6699318081062747564, 2, 0, 0
     PSEUDO_PROBE 6699318081062747564, 4, 0, 0
-    RETQ
+    RET64
 
 ...
diff --git a/llvm/unittests/CodeGen/InstrRefLDVTest.cpp b/llvm/unittests/CodeGen/InstrRefLDVTest.cpp
--- a/llvm/unittests/CodeGen/InstrRefLDVTest.cpp
+++ b/llvm/unittests/CodeGen/InstrRefLDVTest.cpp
@@ -487,7 +487,7 @@
 TEST_F(InstrRefLDVTest, MTransferDefs) {
   MachineFunction *MF = readMIRBlock(
    "    $rax = MOV64ri 0\n"
-   "    RETQ $rax\n");
+   "    RET64 $rax\n");
   setupLDVObj(MF);
 
   // We should start with only SP tracked.
@@ -519,7 +519,7 @@
   MF = readMIRBlock(
    "    $rax = MOV64ri 0\n"
    "    $al = MOV8ri 0\n"
-   "    RETQ $rax\n");
+   "    RET64 $rax\n");
   setupLDVObj(MF);
   TransferMap.clear();
   TransferMap.resize(1);
@@ -556,7 +556,7 @@
    "    $rdi = MOV64ri 0\n" // instr 4
    "    $rsi = MOV64ri 0\n" // instr 5
    "    CALL64r $rax, csr_64, implicit $rsp, implicit $ssp, implicit $rdi, implicit $rsi, implicit-def $rsp, implicit-def $ssp, implicit-def $rax, implicit-def $esp, implicit-def $sp\n\n\n\n" // instr 6
-   "    RETQ $rax\n"); // instr 7
+   "    RET64 $rax\n"); // instr 7
   setupLDVObj(MF);
   TransferMap.clear();
   TransferMap.resize(1);
@@ -590,7 +590,7 @@
   // When we DBG_PHI something, we should track all its subregs.
   MF = readMIRBlock(
    "    DBG_PHI $rdi, 0\n"
-   "    RETQ\n");
+   "    RET64\n");
   setupLDVObj(MF);
   TransferMap.clear();
   TransferMap.resize(1);
@@ -613,7 +613,7 @@
    "    $rax = MOV64ri 0\n"
    "    $rax = IMPLICIT_DEF\n"
    "    $rax = KILL killed $rax\n"
-   "    RETQ $rax\n");
+   "    RET64 $rax\n");
   setupLDVObj(MF);
   TransferMap.clear();
   TransferMap.resize(1);
@@ -632,7 +632,7 @@
   MachineFunction *MF = readMIRBlock(
    "    $rax = MOV64ri 0\n"
    "    MOV64mr $rsp, 1, $noreg, 16, $noreg, $rax :: (store 8 into %stack.0)\n"
-   "    RETQ $rax\n");
+   "    RET64 $rax\n");
   setupLDVObj(MF);
   TransferMap.clear();
   TransferMap.resize(1);
@@ -657,7 +657,7 @@
    "    $rax = MOV64ri 0\n"
    "    MOV64mr $rsp, 1, $noreg, 16, $noreg, $rax :: (store 8 into %stack.0)\n"
    "    $rbx = MOV64rm $rsp, 1, $noreg, 0, $noreg :: (load 8 from %stack.0)\n"
-   "    RETQ\n");
+   "    RET64\n");
   setupLDVObj(MF);
   TransferMap.clear();
   TransferMap.resize(1);
@@ -681,7 +681,7 @@
    "    $rax = MOV64ri 0\n"
    "    $rcx = COPY $rax\n"
    "    $rbx = MOV64rr $rcx\n"
-   "    RETQ\n");
+   "    RET64\n");
   setupLDVObj(MF);
   TransferMap.clear();
   TransferMap.resize(1);
@@ -711,7 +711,7 @@
   MF = readMIRBlock(
    "    $rax = MOV64ri 0\n"
    "    $ecx = COPY $eax\n"
-   "    RETQ\n");
+   "    RET64\n");
   setupLDVObj(MF);
   TransferMap.clear();
   TransferMap.resize(1);
@@ -741,7 +741,7 @@
    "    $rax = MOV64ri 0\n"
    "    MOV64mr $rsp, 1, $noreg, 16, $noreg, $rax :: (store 8 into %stack.0)\n"
    "    $rbx = MOV64rm $rsp, 1, $noreg, 0, $noreg :: (load 8 from %stack.0)\n"
-   "    RETQ\n");
+   "    RET64\n");
   setupLDVObj(MF);
   TransferMap.clear();
   TransferMap.resize(1);
@@ -788,7 +788,7 @@
    "    MOV64mr $rsp, 1, $noreg, 16, $noreg, $rax :: (store 8 into %stack.0)\n"
    "    MOV32mr $rsp, 1, $noreg, 16, $noreg, $eax :: (store 4 into %stack.0)\n"
    "    $rbx = MOV64rm $rsp, 1, $noreg, 0, $noreg :: (load 8 from %stack.0)\n"
-   "    RETQ\n");
+   "    RET64\n");
   setupLDVObj(MF);
   TransferMap.clear();
   TransferMap.resize(1);
@@ -839,7 +839,7 @@
    "    $xmm0 = IMPLICIT_DEF\n"
    "    MOVUPDmr $rsp, 1, $noreg, 16, $noreg, killed $xmm0 :: (store (s128) into %stack.0)\n"
    "    $rbx = MOV64rm $rsp, 1, $noreg, 0, $noreg :: (load 8 from %stack.0)\n"
-   "    RETQ\n");
+   "    RET64\n");
   setupLDVObj(MF);
   TransferMap.clear();
   TransferMap.resize(1);
@@ -874,7 +874,7 @@
    "    $rax = MOV64ri 0\n"
    "    MOV8mr $rsp, 1, $noreg, 16, $noreg, $ah :: (store 1 into %stack.0)\n"
    "    $al = MOV8rm $rsp, 1, $noreg, 0, $noreg :: (load 1 from %stack.0)\n"
-   "    RETQ\n");
+   "    RET64\n");
   setupLDVObj(MF);
   TransferMap.clear();
   TransferMap.resize(1);
diff --git a/llvm/unittests/tools/llvm-exegesis/X86/SnippetRepetitorTest.cpp b/llvm/unittests/tools/llvm-exegesis/X86/SnippetRepetitorTest.cpp
--- a/llvm/unittests/tools/llvm-exegesis/X86/SnippetRepetitorTest.cpp
+++ b/llvm/unittests/tools/llvm-exegesis/X86/SnippetRepetitorTest.cpp
@@ -71,7 +71,7 @@
   ASSERT_EQ(MF->getNumBlockIDs(), 1u);
   EXPECT_THAT(MF->getBlockNumbered(0)->instrs(),
               ElementsAre(HasOpcode(X86::NOOP), HasOpcode(X86::NOOP),
-                          HasOpcode(X86::NOOP), HasOpcode(X86::RETQ)));
+                          HasOpcode(X86::NOOP), HasOpcode(X86::RET64)));
 }
 
 TEST_F(X86SnippetRepetitorTest, Loop) {
@@ -90,7 +90,7 @@
                   LiveReg(State.getExegesisTarget().getLoopCounterRegister(
                       State.getTargetMachine().getTargetTriple()))));
   EXPECT_THAT(MF->getBlockNumbered(2)->instrs(),
-              ElementsAre(HasOpcode(X86::RETQ)));
+              ElementsAre(HasOpcode(X86::RET64)));
 }
 
 } // namespace