diff --git a/llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp b/llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp --- a/llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp +++ b/llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp @@ -4095,12 +4095,12 @@ // be found here: // https://software.intel.com/security-software-guidance/insights/deep-dive-load-value-injection#specialinstructions switch (Inst.getOpcode()) { - case X86::RETW: - case X86::RETL: - case X86::RETQ: - case X86::RETIL: - case X86::RETIQ: - case X86::RETIW: { + case X86::RET16: + case X86::RET32: + case X86::RET64: + case X86::RETI16: + case X86::RETI32: + case X86::RETI64: { MCInst ShlInst, FenceInst; bool Parse32 = is32BitMode() || Code16GCC; unsigned Basereg = diff --git a/llvm/lib/Target/X86/X86ExpandPseudo.cpp b/llvm/lib/Target/X86/X86ExpandPseudo.cpp --- a/llvm/lib/Target/X86/X86ExpandPseudo.cpp +++ b/llvm/lib/Target/X86/X86ExpandPseudo.cpp @@ -394,10 +394,10 @@ MachineInstrBuilder MIB; if (StackAdj == 0) { MIB = BuildMI(MBB, MBBI, DL, - TII->get(STI->is64Bit() ? X86::RETQ : X86::RETL)); + TII->get(STI->is64Bit() ? X86::RET64 : X86::RET32)); } else if (isUInt<16>(StackAdj)) { MIB = BuildMI(MBB, MBBI, DL, - TII->get(STI->is64Bit() ? X86::RETIQ : X86::RETIL)) + TII->get(STI->is64Bit() ? X86::RETI64 : X86::RETI32)) .addImm(StackAdj); } else { assert(!STI->is64Bit() && @@ -407,7 +407,7 @@ BuildMI(MBB, MBBI, DL, TII->get(X86::POP32r)).addReg(X86::ECX, RegState::Define); X86FL->emitSPUpdate(MBB, MBBI, DL, StackAdj, /*InEpilogue=*/true); BuildMI(MBB, MBBI, DL, TII->get(X86::PUSH32r)).addReg(X86::ECX); - MIB = BuildMI(MBB, MBBI, DL, TII->get(X86::RETL)); + MIB = BuildMI(MBB, MBBI, DL, TII->get(X86::RET32)); } for (unsigned I = 1, E = MBBI->getNumOperands(); I != E; ++I) MIB.add(MBBI->getOperand(I)); diff --git a/llvm/lib/Target/X86/X86FastISel.cpp b/llvm/lib/Target/X86/X86FastISel.cpp --- a/llvm/lib/Target/X86/X86FastISel.cpp +++ b/llvm/lib/Target/X86/X86FastISel.cpp @@ -1304,11 +1304,11 @@ MachineInstrBuilder MIB; if (X86MFInfo->getBytesToPopOnReturn()) { MIB = BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, - TII.get(Subtarget->is64Bit() ? X86::RETIQ : X86::RETIL)) + TII.get(Subtarget->is64Bit() ? X86::RETI64 : X86::RETI32)) .addImm(X86MFInfo->getBytesToPopOnReturn()); } else { MIB = BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, - TII.get(Subtarget->is64Bit() ? X86::RETQ : X86::RETL)); + TII.get(Subtarget->is64Bit() ? X86::RET64 : X86::RET32)); } for (unsigned i = 0, e = RetRegs.size(); i != e; ++i) MIB.addReg(RetRegs[i], RegState::Implicit); diff --git a/llvm/lib/Target/X86/X86IndirectThunks.cpp b/llvm/lib/Target/X86/X86IndirectThunks.cpp --- a/llvm/lib/Target/X86/X86IndirectThunks.cpp +++ b/llvm/lib/Target/X86/X86IndirectThunks.cpp @@ -212,7 +212,7 @@ MF.push_back(CallTarget); const unsigned CallOpc = Is64Bit ? X86::CALL64pcrel32 : X86::CALLpcrel32; - const unsigned RetOpc = Is64Bit ? X86::RETQ : X86::RETL; + const unsigned RetOpc = Is64Bit ? X86::RET64 : X86::RET32; Entry->addLiveIn(ThunkReg); BuildMI(Entry, DebugLoc(), TII->get(CallOpc)).addSym(TargetSym); diff --git a/llvm/lib/Target/X86/X86InstrControl.td b/llvm/lib/Target/X86/X86InstrControl.td --- a/llvm/lib/Target/X86/X86InstrControl.td +++ b/llvm/lib/Target/X86/X86InstrControl.td @@ -20,30 +20,30 @@ // ST1 arguments when returning values on the x87 stack. let isTerminator = 1, isReturn = 1, isBarrier = 1, hasCtrlDep = 1, FPForm = SpecialFP, SchedRW = [WriteJumpLd] in { - def RETL : I <0xC3, RawFrm, (outs), (ins variable_ops), + def RET32 : I <0xC3, RawFrm, (outs), (ins variable_ops), "ret{l}", []>, OpSize32, Requires<[Not64BitMode]>; - def RETQ : I <0xC3, RawFrm, (outs), (ins variable_ops), + def RET64 : I <0xC3, RawFrm, (outs), (ins variable_ops), "ret{q}", []>, OpSize32, Requires<[In64BitMode]>; - def RETW : I <0xC3, RawFrm, (outs), (ins), + def RET16 : I <0xC3, RawFrm, (outs), (ins), "ret{w}", []>, OpSize16; - def RETIL : Ii16<0xC2, RawFrm, (outs), (ins i16imm:$amt, variable_ops), + def RETI32 : Ii16<0xC2, RawFrm, (outs), (ins i16imm:$amt, variable_ops), "ret{l}\t$amt", []>, OpSize32, Requires<[Not64BitMode]>; - def RETIQ : Ii16<0xC2, RawFrm, (outs), (ins i16imm:$amt, variable_ops), + def RETI64 : Ii16<0xC2, RawFrm, (outs), (ins i16imm:$amt, variable_ops), "ret{q}\t$amt", []>, OpSize32, Requires<[In64BitMode]>; - def RETIW : Ii16<0xC2, RawFrm, (outs), (ins i16imm:$amt), + def RETI16 : Ii16<0xC2, RawFrm, (outs), (ins i16imm:$amt), "ret{w}\t$amt", []>, OpSize16; - def LRETL : I <0xCB, RawFrm, (outs), (ins), + def LRET32 : I <0xCB, RawFrm, (outs), (ins), "{l}ret{l|f}", []>, OpSize32; - def LRETQ : RI <0xCB, RawFrm, (outs), (ins), + def LRET64 : RI <0xCB, RawFrm, (outs), (ins), "{l}ret{|f}q", []>, Requires<[In64BitMode]>; - def LRETW : I <0xCB, RawFrm, (outs), (ins), + def LRET16 : I <0xCB, RawFrm, (outs), (ins), "{l}ret{w|f}", []>, OpSize16; - def LRETIL : Ii16<0xCA, RawFrm, (outs), (ins i16imm:$amt), - "{l}ret{l|f}\t$amt", []>, OpSize32; - def LRETIQ : RIi16<0xCA, RawFrm, (outs), (ins i16imm:$amt), - "{l}ret{|f}q\t$amt", []>, Requires<[In64BitMode]>; - def LRETIW : Ii16<0xCA, RawFrm, (outs), (ins i16imm:$amt), - "{l}ret{w|f}\t$amt", []>, OpSize16; + def LRETI32 : Ii16<0xCA, RawFrm, (outs), (ins i16imm:$amt), + "{l}ret{l|f}\t$amt", []>, OpSize32; + def LRETI64 : RIi16<0xCA, RawFrm, (outs), (ins i16imm:$amt), + "{l}ret{|f}q\t$amt", []>, Requires<[In64BitMode]>; + def LRETI16 : Ii16<0xCA, RawFrm, (outs), (ins i16imm:$amt), + "{l}ret{w|f}\t$amt", []>, OpSize16; // The machine return from interrupt instruction, but sometimes we need to // perform a post-epilogue stack adjustment. Codegen emits the pseudo form diff --git a/llvm/lib/Target/X86/X86InstrInfo.cpp b/llvm/lib/Target/X86/X86InstrInfo.cpp --- a/llvm/lib/Target/X86/X86InstrInfo.cpp +++ b/llvm/lib/Target/X86/X86InstrInfo.cpp @@ -82,7 +82,7 @@ (STI.isTarget64BitLP64() ? X86::ADJCALLSTACKUP64 : X86::ADJCALLSTACKUP32), X86::CATCHRET, - (STI.is64Bit() ? X86::RETQ : X86::RETL)), + (STI.is64Bit() ? X86::RET64 : X86::RET32)), Subtarget(STI), RI(STI.getTargetTriple()) { } @@ -9363,7 +9363,7 @@ // We're a normal call, so our sequence doesn't have a return instruction. // Add it in. - MachineInstr *retq = BuildMI(MF, DebugLoc(), get(X86::RETQ)); + MachineInstr *retq = BuildMI(MF, DebugLoc(), get(X86::RET64)); MBB.insert(MBB.end(), retq); } diff --git a/llvm/lib/Target/X86/X86LoadValueInjectionRetHardening.cpp b/llvm/lib/Target/X86/X86LoadValueInjectionRetHardening.cpp --- a/llvm/lib/Target/X86/X86LoadValueInjectionRetHardening.cpp +++ b/llvm/lib/Target/X86/X86LoadValueInjectionRetHardening.cpp @@ -76,7 +76,7 @@ bool Modified = false; for (auto &MBB : MF) { for (auto MBBI = MBB.begin(); MBBI != MBB.end(); ++MBBI) { - if (MBBI->getOpcode() != X86::RETQ) + if (MBBI->getOpcode() != X86::RET64) continue; unsigned ClobberReg = TRI->findDeadCallerSavedReg(MBB, MBBI); diff --git a/llvm/lib/Target/X86/X86MCInstLower.cpp b/llvm/lib/Target/X86/X86MCInstLower.cpp --- a/llvm/lib/Target/X86/X86MCInstLower.cpp +++ b/llvm/lib/Target/X86/X86MCInstLower.cpp @@ -421,7 +421,7 @@ } static unsigned getRetOpcode(const X86Subtarget &Subtarget) { - return Subtarget.is64Bit() ? X86::RETQ : X86::RETL; + return Subtarget.is64Bit() ? X86::RET64 : X86::RET32; } Optional diff --git a/llvm/lib/Target/X86/X86RegisterInfo.cpp b/llvm/lib/Target/X86/X86RegisterInfo.cpp --- a/llvm/lib/Target/X86/X86RegisterInfo.cpp +++ b/llvm/lib/Target/X86/X86RegisterInfo.cpp @@ -816,10 +816,10 @@ return 0; case TargetOpcode::PATCHABLE_RET: case X86::RET: - case X86::RETL: - case X86::RETQ: - case X86::RETIL: - case X86::RETIQ: + case X86::RET32: + case X86::RET64: + case X86::RETI32: + case X86::RETI64: case X86::TCRETURNdi: case X86::TCRETURNri: case X86::TCRETURNmi: diff --git a/llvm/lib/Target/X86/X86SchedBroadwell.td b/llvm/lib/Target/X86/X86SchedBroadwell.td --- a/llvm/lib/Target/X86/X86SchedBroadwell.td +++ b/llvm/lib/Target/X86/X86SchedBroadwell.td @@ -1110,7 +1110,7 @@ let NumMicroOps = 3; let ResourceCycles = [1,1,1]; } -def: InstRW<[BWWriteResGroup84], (instrs LRETQ, RETQ)>; +def: InstRW<[BWWriteResGroup84], (instrs LRET64, RET64)>; def BWWriteResGroup87 : SchedWriteRes<[BWPort4,BWPort23,BWPort237,BWPort06]> { let Latency = 7; diff --git a/llvm/lib/Target/X86/X86SchedHaswell.td b/llvm/lib/Target/X86/X86SchedHaswell.td --- a/llvm/lib/Target/X86/X86SchedHaswell.td +++ b/llvm/lib/Target/X86/X86SchedHaswell.td @@ -710,7 +710,7 @@ let NumMicroOps = 4; let ResourceCycles = [1, 2, 1]; } -def : InstRW<[HWWriteRETI], (instregex "RETI(L|Q|W)", "LRETI(L|Q|W)")>; +def : InstRW<[HWWriteRETI], (instregex "RETI(16|32|64)", "LRETI(16|32|64)")>; // BOUND. // r,m. @@ -1188,7 +1188,7 @@ let NumMicroOps = 3; let ResourceCycles = [1,1,1]; } -def: InstRW<[HWWriteResGroup41], (instrs LRETQ, RETL, RETQ)>; +def: InstRW<[HWWriteResGroup41], (instrs LRET64, RET32, RET64)>; def HWWriteResGroup44 : SchedWriteRes<[HWPort4,HWPort6,HWPort237,HWPort0156]> { let Latency = 3; diff --git a/llvm/lib/Target/X86/X86SchedIceLake.td b/llvm/lib/Target/X86/X86SchedIceLake.td --- a/llvm/lib/Target/X86/X86SchedIceLake.td +++ b/llvm/lib/Target/X86/X86SchedIceLake.td @@ -1444,7 +1444,7 @@ let NumMicroOps = 3; let ResourceCycles = [1,1,1]; } -def: InstRW<[ICXWriteResGroup104], (instrs LRETQ, RETQ)>; +def: InstRW<[ICXWriteResGroup104], (instrs LRET64, RET64)>; def ICXWriteResGroup106 : SchedWriteRes<[ICXPort4,ICXPort5,ICXPort237]> { let Latency = 7; diff --git a/llvm/lib/Target/X86/X86SchedSandyBridge.td b/llvm/lib/Target/X86/X86SchedSandyBridge.td --- a/llvm/lib/Target/X86/X86SchedSandyBridge.td +++ b/llvm/lib/Target/X86/X86SchedSandyBridge.td @@ -606,7 +606,7 @@ def: InstRW<[SBWriteResGroup2], (instrs FDECSTP, FINCSTP, FFREE, FFREEP, FNOP, LD_Frr, ST_Frr, ST_FPrr)>; def: InstRW<[SBWriteResGroup2], (instrs LOOP, LOOPE, LOOPNE)>; // FIXME: This seems wrong compared to other Intel CPUs. -def: InstRW<[SBWriteResGroup2], (instrs RETQ)>; +def: InstRW<[SBWriteResGroup2], (instrs RET64)>; def SBWriteResGroup4 : SchedWriteRes<[SBPort05]> { let Latency = 1; diff --git a/llvm/lib/Target/X86/X86SchedSkylakeClient.td b/llvm/lib/Target/X86/X86SchedSkylakeClient.td --- a/llvm/lib/Target/X86/X86SchedSkylakeClient.td +++ b/llvm/lib/Target/X86/X86SchedSkylakeClient.td @@ -1175,7 +1175,7 @@ let NumMicroOps = 3; let ResourceCycles = [1,1,1]; } -def: InstRW<[SKLWriteResGroup98], (instrs LRETQ, RETQ)>; +def: InstRW<[SKLWriteResGroup98], (instrs LRET64, RET64)>; def SKLWriteResGroup100 : SchedWriteRes<[SKLPort4,SKLPort23,SKLPort237,SKLPort06]> { let Latency = 7; diff --git a/llvm/lib/Target/X86/X86SchedSkylakeServer.td b/llvm/lib/Target/X86/X86SchedSkylakeServer.td --- a/llvm/lib/Target/X86/X86SchedSkylakeServer.td +++ b/llvm/lib/Target/X86/X86SchedSkylakeServer.td @@ -1436,7 +1436,7 @@ let NumMicroOps = 3; let ResourceCycles = [1,1,1]; } -def: InstRW<[SKXWriteResGroup104], (instrs LRETQ, RETQ)>; +def: InstRW<[SKXWriteResGroup104], (instrs LRET64, RET64)>; def SKXWriteResGroup106 : SchedWriteRes<[SKXPort4,SKXPort5,SKXPort237]> { let Latency = 7; diff --git a/llvm/lib/Target/X86/X86ScheduleAtom.td b/llvm/lib/Target/X86/X86ScheduleAtom.td --- a/llvm/lib/Target/X86/X86ScheduleAtom.td +++ b/llvm/lib/Target/X86/X86ScheduleAtom.td @@ -540,7 +540,7 @@ PUSH16rmr, PUSH32rmr, PUSH64rmr, PUSH16i8, PUSH32i8, PUSH64i8, PUSH64i32, XCH_F)>; -def : InstRW<[AtomWrite0_1_1], (instregex "RETI(L|Q|W)$", +def : InstRW<[AtomWrite0_1_1], (instregex "RETI(16|32|64)$", "IRET(16|32|64)?")>; def AtomWrite0_1_5 : SchedWriteRes<[AtomPort0, AtomPort1]> { @@ -819,8 +819,8 @@ let Latency = 79; let ResourceCycles = [79]; } -def : InstRW<[AtomWrite01_79], (instregex "RET(L|Q|W)?$", - "LRETI?(L|Q|W)")>; +def : InstRW<[AtomWrite01_79], (instregex "RET(16|32|64)?$", + "LRETI?(16|32|64)")>; def AtomWrite01_92 : SchedWriteRes<[AtomPort01]> { let Latency = 92; diff --git a/llvm/lib/Target/X86/X86ScheduleZnver1.td b/llvm/lib/Target/X86/X86ScheduleZnver1.td --- a/llvm/lib/Target/X86/X86ScheduleZnver1.td +++ b/llvm/lib/Target/X86/X86ScheduleZnver1.td @@ -697,7 +697,7 @@ def ZnWriteRET : SchedWriteRes<[ZnALU03]> { let NumMicroOps = 2; } -def : InstRW<[ZnWriteRET], (instregex "RET(L|Q|W)", "LRET(L|Q|W)", +def : InstRW<[ZnWriteRET], (instregex "RET(16|32|64)", "LRET(16|32|64)", "IRET(16|32|64)")>; //-- Logic instructions --// diff --git a/llvm/lib/Target/X86/X86ScheduleZnver2.td b/llvm/lib/Target/X86/X86ScheduleZnver2.td --- a/llvm/lib/Target/X86/X86ScheduleZnver2.td +++ b/llvm/lib/Target/X86/X86ScheduleZnver2.td @@ -697,7 +697,7 @@ def Zn2WriteRET : SchedWriteRes<[Zn2ALU03]> { let NumMicroOps = 2; } -def : InstRW<[Zn2WriteRET], (instregex "RET(L|Q|W)", "LRET(L|Q|W)", +def : InstRW<[Zn2WriteRET], (instregex "RET(16|32|64)", "LRET(16|32|64)", "IRET(16|32|64)")>; //-- Logic instructions --// diff --git a/llvm/test/CodeGen/X86/basic-block-sections-mir-parse.mir b/llvm/test/CodeGen/X86/basic-block-sections-mir-parse.mir --- a/llvm/test/CodeGen/X86/basic-block-sections-mir-parse.mir +++ b/llvm/test/CodeGen/X86/basic-block-sections-mir-parse.mir @@ -118,7 +118,7 @@ renamable $eax = MOV32rm $rbp, 1, $noreg, -8, $noreg :: (load (s32) from %ir.2) $rbp = frame-destroy POP64r implicit-def $rsp, implicit $rsp CFI_INSTRUCTION def_cfa $rsp, 8 - RETQ implicit $eax + RET64 implicit $eax ... diff --git a/llvm/test/CodeGen/X86/block-placement.mir b/llvm/test/CodeGen/X86/block-placement.mir --- a/llvm/test/CodeGen/X86/block-placement.mir +++ b/llvm/test/CodeGen/X86/block-placement.mir @@ -73,7 +73,7 @@ liveins: $rdi, $eax $rcx = POP64r implicit-def $rsp, implicit $rsp - RETQ $eax + RET64 $eax bb.2.null: liveins: $rdi diff --git a/llvm/test/CodeGen/X86/bug47278.mir b/llvm/test/CodeGen/X86/bug47278.mir --- a/llvm/test/CodeGen/X86/bug47278.mir +++ b/llvm/test/CodeGen/X86/bug47278.mir @@ -24,7 +24,7 @@ ; CHECK: $cl = IMPLICIT_DEF ; CHECK: renamable $eax = COPY renamable $edx ; CHECK: dead renamable $eax = SHRD32rrCL renamable $eax, killed renamable $edx, implicit-def dead $eflags, implicit killed $cl - ; CHECK: RETL + ; CHECK: RET32 %0:gr32 = IMPLICIT_DEF %1:gr32 = MOVZX32rm8 %0, 1, $noreg, 0, $noreg :: (load (s8) from `i168* undef` + 20, align 4, basealign 16) %2:gr32 = MOV32rm %0, 1, $noreg, 0, $noreg :: (load (s32) from `i168* undef` + 12, basealign 16) @@ -40,6 +40,6 @@ $cl = IMPLICIT_DEF %8:gr32 = COPY %1 %8:gr32 = SHRD32rrCL %8, %1, implicit-def dead $eflags, implicit $cl - RETL + RET32 ... diff --git a/llvm/test/CodeGen/X86/dbg-changes-codegen-branch-folding2.mir b/llvm/test/CodeGen/X86/dbg-changes-codegen-branch-folding2.mir --- a/llvm/test/CodeGen/X86/dbg-changes-codegen-branch-folding2.mir +++ b/llvm/test/CodeGen/X86/dbg-changes-codegen-branch-folding2.mir @@ -109,7 +109,7 @@ bb.3.for.cond.cleanup: liveins: $rdi, $xmm3, $xmm4, $xmm5, $xmm6, $xmm7, $xmm9, $xmm13, $xmm14 - RETQ + RET64 bb.4.for.body: successors: %bb.1, %bb.5 diff --git a/llvm/test/CodeGen/X86/dbg-value-superreg-copy.mir b/llvm/test/CodeGen/X86/dbg-value-superreg-copy.mir --- a/llvm/test/CodeGen/X86/dbg-value-superreg-copy.mir +++ b/llvm/test/CodeGen/X86/dbg-value-superreg-copy.mir @@ -44,7 +44,7 @@ bb.2: $ax = COPY %1 $dx = COPY %2 - RETQ killed $ax, killed $dx + RET64 killed $ax, killed $dx ... # This test case was created as a reproducer for a bug when we got incorrect diff --git a/llvm/test/CodeGen/X86/evex-to-vex-compress.mir b/llvm/test/CodeGen/X86/evex-to-vex-compress.mir --- a/llvm/test/CodeGen/X86/evex-to-vex-compress.mir +++ b/llvm/test/CodeGen/X86/evex-to-vex-compress.mir @@ -914,7 +914,7 @@ ; CHECK: $ymm0 = VPERM2I128rr $ymm0, $ymm1, 32 $ymm0 = VSHUFI64X2Z256rri $ymm0, $ymm1, 228 - RETQ + RET64 ... --- # CHECK-LABEL: name: evex_z128_to_vex_test @@ -1800,7 +1800,7 @@ ; CHECK: $xmm0 = VROUNDPSr $xmm0, 15, implicit $mxcsr $xmm0 = VRNDSCALEPSZ128rri $xmm0, 15, implicit $mxcsr - RETQ + RET64 ... --- # CHECK-LABEL: name: evex_scalar_to_vex_test @@ -2371,7 +2371,7 @@ ; CHECK: $xmm0 = VROUNDSSr_Int $xmm0, $xmm1, 15, implicit $mxcsr $xmm0 = VRNDSCALESSZr_Int $xmm0, $xmm1, 15, implicit $mxcsr - RETQ + RET64 ... --- # CHECK-LABEL: name: evex_z256_to_evex_test @@ -3285,7 +3285,7 @@ ; CHECK: $ymm16 = VSHUFI64X2Z256rri $ymm16, $ymm1, 228 $ymm16 = VSHUFI64X2Z256rri $ymm16, $ymm1, 228 - RETQ + RET64 ... --- # CHECK-LABEL: name: evex_z128_to_evex_test @@ -4179,7 +4179,7 @@ ; CHECK: $xmm0 = VRNDSCALEPSZ128rri $xmm0, 31, implicit $mxcsr $xmm0 = VRNDSCALEPSZ128rri $xmm0, 31, implicit $mxcsr - RETQ + RET64 ... --- # CHECK-LABEL: name: evex_scalar_to_evex_test @@ -4761,5 +4761,5 @@ ; CHECK: $xmm0 = VRNDSCALESSZr_Int $xmm0, $xmm1, 31, implicit $mxcsr $xmm0 = VRNDSCALESSZr_Int $xmm0, $xmm1, 31, implicit $mxcsr - RETQ + RET64 ... diff --git a/llvm/test/CodeGen/X86/expand-call-rvmarker.mir b/llvm/test/CodeGen/X86/expand-call-rvmarker.mir --- a/llvm/test/CodeGen/X86/expand-call-rvmarker.mir +++ b/llvm/test/CodeGen/X86/expand-call-rvmarker.mir @@ -34,7 +34,7 @@ # CHECK-NEXT: $rdi = MOV64rr $rax # CHECK-NEXT: CALL64pcrel32 @objc_retainAutoreleasedReturnValue, csr_64, implicit $rsp, implicit $ssp, implicit-def $rax # CHECK-NEXT: $rcx = frame-destroy POP64r implicit-def $rsp, implicit $rsp -# CHECK-NEXT: RETQ +# CHECK-NEXT: RET64 # name: test_objc_retainAutoreleaseReturnedValue @@ -66,7 +66,7 @@ # CHECK-NEXT: $rdi = MOV64rr $rax # CHECK-NEXT: CALL64pcrel32 @objc_unsafeClaimAutoreleasedReturnValue, csr_64, implicit $rsp, implicit $ssp, implicit-def $rax # CHECK-NEXT: $rcx = frame-destroy POP64r implicit-def $rsp, implicit $rsp -# CHECK-NEXT: RETQ +# CHECK-NEXT: RET64 # name: test_objc_unsafeClaimAutoreleasedReturnValue alignment: 16 @@ -99,7 +99,7 @@ # CHECK-NEXT: $rdi = MOV64rr $rax # CHECK-NEXT: CALL64pcrel32 @objc_retainAutoreleasedReturnValue, csr_64, implicit $rsp, implicit $ssp, implicit-def dead $rax # CHECK-NEXT: $rax = frame-destroy POP64r implicit-def $rsp, implicit $rsp -# CHECK-NEXT: RETQ +# CHECK-NEXT: RET64 # name: test_objc_unsafeClaimAutoreleasedReturnValue_2_args alignment: 16 @@ -133,7 +133,7 @@ # CHECK-NEXT: $rdi = MOV64rr $rax # CHECK-NEXT: CALL64pcrel32 @objc_retainAutoreleasedReturnValue, csr_64, implicit $rsp, implicit $ssp, implicit-def dead $rax # CHECK-NEXT: $rax = frame-destroy POP64r implicit-def $rsp, implicit $rsp -# CHECK-NEXT: RETQ +# CHECK-NEXT: RET64 # name: test_ret_void alignment: 16 diff --git a/llvm/test/CodeGen/X86/expand-vr64-gr64-copy.mir b/llvm/test/CodeGen/X86/expand-vr64-gr64-copy.mir --- a/llvm/test/CodeGen/X86/expand-vr64-gr64-copy.mir +++ b/llvm/test/CodeGen/X86/expand-vr64-gr64-copy.mir @@ -32,5 +32,5 @@ MMX_MOVQ64mr $rsp, 1, $noreg, -16, $noreg, killed $mm0 $xmm0 = MOVQI2PQIrm $rsp, 1, $noreg, -16, $noreg $xmm0 = PSHUFDri killed $xmm0, -44 - RETQ $xmm0 + RET64 $xmm0 ... diff --git a/llvm/test/CodeGen/X86/fast-regalloc-live-out-debug-values.mir b/llvm/test/CodeGen/X86/fast-regalloc-live-out-debug-values.mir --- a/llvm/test/CodeGen/X86/fast-regalloc-live-out-debug-values.mir +++ b/llvm/test/CodeGen/X86/fast-regalloc-live-out-debug-values.mir @@ -181,7 +181,7 @@ ; CHECK: $rbx = frame-destroy POP64r implicit-def $rsp, implicit $rsp, debug-location !45 ; CHECK: $rbp = frame-destroy POP64r implicit-def $rsp, implicit $rsp, debug-location !45 ; CHECK: CFI_INSTRUCTION def_cfa $rsp, 8, debug-location !45 - ; CHECK: RETQ implicit killed $eax, debug-location !45 + ; CHECK: RET64 implicit killed $eax, debug-location !45 bb.0.entry: liveins: $edi @@ -217,6 +217,6 @@ %7:gr64_nosp = IMPLICIT_DEF %8:gr32 = MOV32rm %3, 4, %7, 0, $noreg, debug-location !44 :: (load (s32) from %ir.arrayidx3) $eax = COPY %8, debug-location !45 - RETQ implicit $eax, debug-location !45 + RET64 implicit $eax, debug-location !45 ... diff --git a/llvm/test/CodeGen/X86/fixup-bw-copy.mir b/llvm/test/CodeGen/X86/fixup-bw-copy.mir --- a/llvm/test/CodeGen/X86/fixup-bw-copy.mir +++ b/llvm/test/CodeGen/X86/fixup-bw-copy.mir @@ -47,7 +47,7 @@ ; CHECK: $eax = MOV32rr undef $edi, implicit $dil $al = MOV8rr killed $dil - RETQ killed $al + RET64 killed $al ... @@ -62,7 +62,7 @@ ; CHECK: $eax = MOV32rr undef $edi, implicit $dil $al = MOV8rr $dil, implicit $edi - RETQ killed $al + RET64 killed $al ... @@ -77,7 +77,7 @@ ; CHECK: $eax = MOV32rr undef $edi, implicit $dil, implicit-def $rax $al = MOV8rr $dil, implicit-def $rax - RETQ killed $al + RET64 killed $al ... @@ -92,7 +92,7 @@ ; CHECK: $eax = MOV32rr undef $edi, implicit $dil $al = MOV8rr $dil, implicit-def $eax - RETQ killed $al + RET64 killed $al ... @@ -107,7 +107,7 @@ ; CHECK: $eax = MOV32rr undef $edi, implicit $dil $al = MOV8rr $dil, implicit-def $ax - RETQ killed $al + RET64 killed $al ... @@ -122,7 +122,7 @@ ; CHECK: $eax = MOV32rr undef $edi, implicit $di $ax = MOV16rr $di, implicit-def $eax - RETQ killed $ax + RET64 killed $ax ... @@ -137,6 +137,6 @@ ; CHECK: $eax = MOV32rr undef $edi, implicit $di, implicit-def $rax $ax = MOV16rr $di, implicit-def $rax - RETQ killed $ax + RET64 killed $ax ... diff --git a/llvm/test/CodeGen/X86/fixup-bw-inst.mir b/llvm/test/CodeGen/X86/fixup-bw-inst.mir --- a/llvm/test/CodeGen/X86/fixup-bw-inst.mir +++ b/llvm/test/CodeGen/X86/fixup-bw-inst.mir @@ -55,7 +55,7 @@ $ax = MOV16rm killed $rax, 1, $noreg, 0, $noreg ; CHECK: $eax = MOVZX32rm16 killed $rax - RETQ $ax + RET64 $ax ... --- @@ -76,7 +76,7 @@ bb.1: liveins: $rcx - RETQ $cl + RET64 $cl ... --- @@ -105,12 +105,12 @@ $ax = MOV16rm killed $rdi, 1, $noreg, 0, $noreg, implicit-def $eax :: (load (s16) from %ir.p) ; CHECK: $eax = MOVZX32rm16 killed $rdi, 1, $noreg, 0, $noreg, implicit-def $eax :: (load (s16) from %ir.p) $ax = KILL $ax, implicit killed $eax - RETQ $ax + RET64 $ax bb.1: $eax = XOR32rr undef $eax, undef $eax, implicit-def dead $eflags $ax = KILL $ax, implicit killed $eax - RETQ $ax + RET64 $ax ... --- @@ -130,7 +130,7 @@ ; CHECK: $r9b = MOV8rr undef $r10b, implicit-def $r9d, implicit killed $r9d, implicit-def $eflags $ax = OR16rr undef $ax, $r9w, implicit-def $eflags - RETQ $ax + RET64 $ax ... --- @@ -147,6 +147,6 @@ $cl = MOV8rr $bl, implicit-def $cx, implicit killed $ch, implicit-def $eflags ; CHECK: $cl = MOV8rr $bl, implicit-def $cx, implicit killed $ch, implicit-def $eflags - RETQ $cx + RET64 $cx ... diff --git a/llvm/test/CodeGen/X86/implicit-null-checks.mir b/llvm/test/CodeGen/X86/implicit-null-checks.mir --- a/llvm/test/CodeGen/X86/implicit-null-checks.mir +++ b/llvm/test/CodeGen/X86/implicit-null-checks.mir @@ -427,15 +427,15 @@ bb.2.ret_200: $eax = MOV32ri 200 - RETQ $eax + RET64 $eax bb.3.is_null: $eax = MOV32ri 42 - RETQ $eax + RET64 $eax bb.4.ret_100: $eax = MOV32ri 100 - RETQ $eax + RET64 $eax ... --- @@ -474,11 +474,11 @@ bb.3.is_null: liveins: $eax, $ah, $al, $ax, $bh, $bl, $bp, $bpl, $bx, $eax, $ebp, $ebx, $rax, $rbp, $rbx, $r12, $r13, $r14, $r15, $r12b, $r13b, $r14b, $r15b, $r12d, $r13d, $r14d, $r15d, $r12w, $r13w, $r14w, $r15w - RETQ $eax + RET64 $eax bb.4.ret_100: $eax = MOV32ri 100 - RETQ $eax + RET64 $eax ... --- @@ -511,15 +511,15 @@ bb.2.ret_200: $eax = MOV32ri 200 - RETQ $eax + RET64 $eax bb.3.is_null: $eax = MOV32ri 42 - RETQ $eax + RET64 $eax bb.4.ret_100: $eax = MOV32ri 100 - RETQ $eax + RET64 $eax ... --- @@ -551,15 +551,15 @@ bb.2.ret_200: $eax = MOV32ri 200 - RETQ $eax + RET64 $eax bb.3.is_null: $eax = MOV32ri 42 - RETQ $eax + RET64 $eax bb.4.ret_100: $eax = MOV32ri 100 - RETQ $eax + RET64 $eax ... --- @@ -592,15 +592,15 @@ bb.2.ret_200: $eax = MOV32ri 200 - RETQ $eax + RET64 $eax bb.3.is_null: $eax = MOV32ri 42 - RETQ $eax + RET64 $eax bb.4.ret_100: $eax = MOV32ri 100 - RETQ $eax + RET64 $eax ... --- @@ -635,12 +635,12 @@ CALL64pcrel32 @f, csr_64, implicit $rsp, implicit-def $rsp $eax = MOV32rm killed $rbx, 1, $noreg, 0, $noreg :: (load (s32) from %ir.ptr) $rbx = POP64r implicit-def $rsp, implicit $rsp - RETQ $eax + RET64 $eax bb.2.leave: $eax = XOR32rr undef $eax, undef $eax, implicit-def dead $eflags $rbx = POP64r implicit-def $rsp, implicit $rsp - RETQ $eax + RET64 $eax ... --- @@ -673,11 +673,11 @@ $esi = MOV32ri 3076 $eax = BEXTR32rm killed $rdi, 1, $noreg, 0, $noreg, killed $esi, implicit-def dead $eflags :: (load (s32) from %ir.ptr) $eax = ADD32rm killed $eax, killed $rcx, 1, $noreg, 0, $noreg, implicit-def dead $eflags :: (load (s32) from %ir.val) - RETQ $eax + RET64 $eax bb.2.is_null: $eax = XOR32rr undef $eax, undef $eax, implicit-def dead $eflags - RETQ $eax + RET64 $eax ... --- @@ -706,11 +706,11 @@ $rcx = MOV64rm killed $rsi, 1, $noreg, 0, $noreg $rcx = AND64rm killed $rcx, $rdi, 1, $noreg, 0, $noreg, implicit-def dead $eflags $rax = MOV64rm killed $rdi, 1, $noreg, 0, $noreg - RETQ $eax + RET64 $eax bb.2.is_null: $eax = XOR32rr undef $eax, undef $eax, implicit-def dead $eflags - RETQ $eax + RET64 $eax ... --- @@ -737,11 +737,11 @@ $rsi = ADD64rr $rsi, $rdi, implicit-def dead $eflags $eax = MOV32rm killed $rdi, 1, $noreg, 0, $noreg, implicit-def $rax :: (load (s32) from %ir.x) $eax = LEA64_32r killed $rax, 1, killed $rsi, 4, $noreg - RETQ $eax + RET64 $eax bb.1.is_null: $eax = MOV32ri 42 - RETQ $eax + RET64 $eax ... --- @@ -769,11 +769,11 @@ $rsi = ADD64rr $rsi, $rdi, implicit-def dead $eflags $esi = AND32rm killed $esi, $rdi, 1, $noreg, 0, $noreg, implicit-def dead $eflags $eax = MOV32rr $esi - RETQ $eax + RET64 $eax bb.1.is_null: $eax = MOV32ri 42 - RETQ $eax + RET64 $eax ... --- @@ -800,10 +800,10 @@ liveins: $rdi, $rsi MOV64mr killed $rdi, 1, $noreg, 0, $noreg, killed $rsi - RETQ + RET64 bb.2.is_null: - RETQ + RET64 ... --- @@ -830,10 +830,10 @@ liveins: $rdi, $rsi MOV64mr killed $rdi, 1, $noreg, 16, $noreg, killed $rsi - RETQ + RET64 bb.2.is_null: - RETQ + RET64 ... --- @@ -863,10 +863,10 @@ $esi = ADD32rr killed $esi, killed $esi, implicit-def dead $eflags MOV32mr killed $rdi, 1, $noreg, 16, $noreg, killed $esi - RETQ + RET64 bb.2.is_null: - RETQ + RET64 ... --- @@ -895,13 +895,13 @@ $esi = ADD32rr $esi, $esi, implicit-def dead $eflags MOV32mr killed $rdi, 1, $noreg, 0, $noreg, $esi $eax = MOV32rr killed $esi - RETQ $eax + RET64 $eax bb.2.is_null: liveins: $rsi $eax = MOV32rr killed $esi - RETQ $eax + RET64 $eax ... --- @@ -928,10 +928,10 @@ liveins: $rdi, $rsi MOV32mr killed $rdi, 1, $noreg, 0, $noreg, killed $esi :: (volatile store (s32) into %ir.ptr) - RETQ + RET64 bb.2.is_null: - RETQ + RET64 ... --- @@ -960,10 +960,10 @@ $esi = ADD32rr killed $esi, killed $esi, implicit-def dead $eflags $esi = ADD32ri killed $esi, 15, implicit-def dead $eflags MOV32mr killed $rdi, 1, $noreg, 16, $noreg, killed $esi - RETQ + RET64 bb.2.is_null: - RETQ + RET64 ... --- @@ -991,10 +991,10 @@ $rdi = ADD64rr killed $rdi, killed $rdi, implicit-def dead $eflags MOV32mr killed $rdi, 1, $noreg, 16, $noreg, killed $esi - RETQ + RET64 bb.2.is_null: - RETQ + RET64 ... --- @@ -1022,11 +1022,11 @@ $rax = MOV64rr $rdi MOV32mr killed $rdi, 1, $noreg, 16, $noreg, killed $esi - RETQ $eax + RET64 $eax bb.2.is_null: $rax = XOR64rr undef $rax, undef $rax, implicit-def dead $eflags - RETQ $eax + RET64 $eax ... --- @@ -1063,12 +1063,12 @@ MOV32mi $rbx, 1, $noreg, 0, $noreg, 20 $rax = MOV64rr killed $rbx $rbx = POP64r implicit-def $rsp, implicit $rsp - RETQ $eax + RET64 $eax bb.2.is_null: $eax = XOR32rr undef $eax, undef $eax, implicit-def dead $eflags $rbx = POP64r implicit-def $rsp, implicit $rsp - RETQ $eax + RET64 $eax ... --- @@ -1097,11 +1097,11 @@ $eax = MOV32rr $esi $esi = ADD32ri killed $esi, 15, implicit-def dead $eflags MOV32mr killed $rdi, 1, $noreg, 0, $noreg, killed $esi - RETQ $eax + RET64 $eax bb.2.is_null: $eax = XOR32rr undef $eax, undef $eax, implicit-def dead $eflags - RETQ $eax + RET64 $eax ... --- @@ -1129,11 +1129,11 @@ MOV32mi killed $rsi, 1, $noreg, 0, $noreg, 2 $eax = MOV32rm killed $rdi, 1, $noreg, 0, $noreg - RETQ $eax + RET64 $eax bb.2.is_null: $eax = XOR32rr undef $eax, undef $eax, implicit-def dead $eflags - RETQ $eax + RET64 $eax ... --- @@ -1161,11 +1161,11 @@ $eax = MOV32rm killed $rsi, 1, $noreg, 0, $noreg MOV32mi killed $rdi, 1, $noreg, 0, $noreg, 2 - RETQ $eax + RET64 $eax bb.2.is_null: $eax = XOR32rr undef $eax, undef $eax, implicit-def dead $eflags - RETQ $eax + RET64 $eax ... --- @@ -1193,10 +1193,10 @@ MOV32mi killed $rsi, 1, $noreg, 0, $noreg, 3 MOV32mi killed $rdi, 1, $noreg, 0, $noreg, 2 - RETQ + RET64 bb.2.is_null: - RETQ + RET64 ... --- @@ -1224,10 +1224,10 @@ $esi = ADD32rr $esi, $esi, implicit-def dead $eflags ADD32mr killed $rdi, 1, $noreg, 0, $noreg, killed $esi, implicit-def dead $eflags - RETQ + RET64 bb.2.is_null: - RETQ + RET64 ... --- @@ -1255,11 +1255,11 @@ MOV32mi killed $rsi, 1, $noreg, 0, $noreg, 3 :: (store (s32) into %ir.ptr2) $eax = MOV32rm killed $rdi, 1, $noreg, 0, $noreg :: (load (s32) from %ir.ptr) - RETQ $eax + RET64 $eax bb.2.is_null: $eax = XOR32rr undef $eax, undef $eax, implicit-def dead $eflags - RETQ $eax + RET64 $eax ... --- @@ -1287,11 +1287,11 @@ MOV32mi killed $rsi, 1, $noreg, 0, $noreg, 3 :: (store (s32) into %ir.ptr2) $eax = MOV32rm killed $rdi, 1, $noreg, 0, $noreg :: (load (s32) from %ir.ptr) - RETQ $eax + RET64 $eax bb.2.is_null: $eax = XOR32rr undef $eax, undef $eax, implicit-def dead $eflags - RETQ $eax + RET64 $eax ... --- @@ -1325,11 +1325,11 @@ MOV64mr $rsp, 1, $noreg, 0, $noreg, $rdi :: (store (s64) into %stack.0) $edi = MOV32rm $rdi, 1, $noreg, 8, $noreg :: (load (s32) from %ir.ptr) $eax = MOV32rr $edi - RETQ $eax + RET64 $eax bb.2.is_null: $eax = XOR32rr undef $eax, undef $eax, implicit-def dead $eflags - RETQ $eax + RET64 $eax ... --- @@ -1354,10 +1354,10 @@ $rcx = MOV64ri -9223372036854775808 $eax = MOV32rm killed $rdi, 2, $rcx, 0, $noreg, implicit-def $rax - RETQ $eax + RET64 $eax bb.1.is_null: $eax = MOV32ri 42 - RETQ $eax + RET64 $eax ... diff --git a/llvm/test/CodeGen/X86/implicit-null-chk-reg-rewrite.mir b/llvm/test/CodeGen/X86/implicit-null-chk-reg-rewrite.mir --- a/llvm/test/CodeGen/X86/implicit-null-chk-reg-rewrite.mir +++ b/llvm/test/CodeGen/X86/implicit-null-chk-reg-rewrite.mir @@ -41,9 +41,9 @@ liveins: $rdi, $rsi $rax = MOV64rm renamable $rdi, 1, $noreg, 4, $noreg - RETQ $eax + RET64 $eax bb.2.is_null: $eax = MOV32ri 200 - RETQ $eax + RET64 $eax ... diff --git a/llvm/test/CodeGen/X86/instr-symbols.mir b/llvm/test/CodeGen/X86/instr-symbols.mir --- a/llvm/test/CodeGen/X86/instr-symbols.mir +++ b/llvm/test/CodeGen/X86/instr-symbols.mir @@ -69,6 +69,6 @@ %7:gr64 = ADD64rr killed %4, killed %5, implicit-def $eflags %8:gr64 = ADD64rr killed %6, killed %7, implicit-def $eflags $rax = COPY %8 - RETQ implicit $rax + RET64 implicit $rax ... diff --git a/llvm/test/CodeGen/X86/invalid-liveness.mir b/llvm/test/CodeGen/X86/invalid-liveness.mir --- a/llvm/test/CodeGen/X86/invalid-liveness.mir +++ b/llvm/test/CodeGen/X86/invalid-liveness.mir @@ -25,5 +25,5 @@ bb.3: $eax = COPY %0 - RETQ $eax + RET64 $eax ... diff --git a/llvm/test/CodeGen/X86/leaFixup32.mir b/llvm/test/CodeGen/X86/leaFixup32.mir --- a/llvm/test/CodeGen/X86/leaFixup32.mir +++ b/llvm/test/CodeGen/X86/leaFixup32.mir @@ -110,9 +110,9 @@ ; CHECK: liveins: $eax, $ebp ; CHECK: $eax = ADD32rr $eax, $ebp, implicit-def $eflags ; CHECK: $eax = ADD32ri8 $eax, -5, implicit-def $eflags - ; CHECK: RETQ $eax + ; CHECK: RET64 $eax $eax = LEA32r killed $eax, 1, killed $ebp, -5, $noreg - RETQ $eax + RET64 $eax ... --- @@ -148,9 +148,9 @@ ; CHECK: liveins: $eax, $ebp ; CHECK: $ebp = ADD32rr $ebp, $eax, implicit-def $eflags ; CHECK: $ebp = ADD32ri8 $ebp, -5, implicit-def $eflags - ; CHECK: RETQ $ebp + ; CHECK: RET64 $ebp $ebp = LEA32r killed $ebp, 1, killed $eax, -5, $noreg - RETQ $ebp + RET64 $ebp ... --- @@ -185,9 +185,9 @@ ; CHECK-LABEL: name: test1add_ebp_32 ; CHECK: liveins: $eax, $ebp ; CHECK: $ebp = ADD32rr $ebp, $eax, implicit-def $eflags - ; CHECK: RETQ $ebp + ; CHECK: RET64 $ebp $ebp = LEA32r killed $ebp, 1, killed $eax, 0, $noreg - RETQ $ebp + RET64 $ebp ... --- @@ -224,9 +224,9 @@ ; CHECK: liveins: $eax, $ebp, $esi ; CHECK: $ebx = LEA32r killed $eax, 1, killed $ebp, 0, $noreg ; CHECK: $ebx = ADD32ri8 $ebx, -5, implicit-def $eflags - ; CHECK: RETQ $ebx + ; CHECK: RET64 $ebx $ebx = LEA32r killed $eax, 1, killed $ebp, -5, $noreg - RETQ $ebx + RET64 $ebx ... --- @@ -263,9 +263,9 @@ ; CHECK: liveins: $eax, $ebp ; CHECK: $ebx = LEA32r killed $eax, 1, killed $ebp, 0, $noreg ; CHECK: $ebx = ADD32ri8 $ebx, -5, implicit-def $eflags - ; CHECK: RETQ $ebx + ; CHECK: RET64 $ebx $ebx = LEA32r killed $ebp, 1, killed $eax, -5, $noreg - RETQ $ebx + RET64 $ebx ... --- @@ -301,9 +301,9 @@ ; CHECK-LABEL: name: test1lea_ebp_32 ; CHECK: liveins: $eax, $ebp ; CHECK: $ebx = LEA32r killed $eax, 1, killed $ebp, 0, $noreg - ; CHECK: RETQ $ebx + ; CHECK: RET64 $ebx $ebx = LEA32r killed $ebp, 1, killed $eax, 0, $noreg - RETQ $ebx + RET64 $ebx ... --- @@ -339,9 +339,9 @@ ; CHECK: liveins: $eax, $ebp ; CHECK: $eax = ADD32rr $eax, $ebp, implicit-def $eflags ; CHECK: $eax = ADD32ri $eax, 129, implicit-def $eflags - ; CHECK: RETQ $eax + ; CHECK: RET64 $eax $eax = LEA32r killed $eax, 1, killed $ebp, 129, $noreg - RETQ $eax + RET64 $eax ... --- @@ -378,9 +378,9 @@ ; CHECK: liveins: $eax, $ebp, $ebx ; CHECK: $ebx = MOV32rr $ebp ; CHECK: $ebx = ADD32rr $ebx, $ebp, implicit-def $eflags - ; CHECK: RETQ $ebx + ; CHECK: RET64 $ebx $ebx = LEA32r killed $ebp, 1, $ebp, 0, $noreg - RETQ $ebx + RET64 $ebx ... --- @@ -416,9 +416,9 @@ ; CHECK: liveins: $eax, $ebp, $ebx ; CHECK: $ebx = LEA32r $noreg, 1, $ebp, 5, $noreg ; CHECK: $ebx = ADD32rr $ebx, $ebp, implicit-def $eflags - ; CHECK: RETQ $ebx + ; CHECK: RET64 $ebx $ebx = LEA32r $ebp, 1, $ebp, 5, $noreg - RETQ $ebx + RET64 $ebx ... --- @@ -454,9 +454,9 @@ ; CHECK: liveins: $eax, $ebp, $ebx ; CHECK: $ebx = LEA32r $noreg, 4, $ebp, 5, $noreg ; CHECK: $ebx = ADD32rr $ebx, $ebp, implicit-def $eflags - ; CHECK: RETQ $ebx + ; CHECK: RET64 $ebx $ebx = LEA32r $ebp, 4, $ebp, 5, $noreg - RETQ $ebx + RET64 $ebx ... --- @@ -491,9 +491,9 @@ ; CHECK-LABEL: name: test_skip_opt_32 ; CHECK: liveins: $eax, $ebp, $ebx ; CHECK: $ebp = LEA32r killed $ebp, 4, killed $ebp, 0, $noreg - ; CHECK: RETQ $ebp + ; CHECK: RET64 $ebp $ebp = LEA32r killed $ebp, 4, killed $ebp, 0, $noreg - RETQ $ebp + RET64 $ebp ... --- @@ -529,23 +529,23 @@ ; CHECK: CMP32rr $eax, killed $ebx, implicit-def $eflags ; CHECK: $ebx = LEA32r killed $eax, 4, killed $eax, 5, $noreg ; CHECK: JCC_1 %bb.1, 4, implicit $eflags - ; CHECK: RETQ $ebx + ; CHECK: RET64 $ebx ; CHECK: bb.1: ; CHECK: liveins: $eax, $ebp, $ebx ; CHECK: $ebp = LEA32r killed $ebx, 4, killed $ebx, 0, $noreg ; CHECK: $ebp = ADD32ri8 $ebp, 5, implicit-def $eflags - ; CHECK: RETQ $ebp + ; CHECK: RET64 $ebp bb.0 (%ir-block.0): liveins: $eax, $ebp, $ebx CMP32rr $eax, killed $ebx, implicit-def $eflags $ebx = LEA32r killed $eax, 4, killed $eax, 5, $noreg JCC_1 %bb.1, 4, implicit $eflags - RETQ $ebx + RET64 $ebx bb.1: liveins: $eax, $ebp, $ebx $ebp = LEA32r killed $ebx, 4, killed $ebx, 5, $noreg - RETQ $ebp + RET64 $ebp ... diff --git a/llvm/test/CodeGen/X86/leaFixup64.mir b/llvm/test/CodeGen/X86/leaFixup64.mir --- a/llvm/test/CodeGen/X86/leaFixup64.mir +++ b/llvm/test/CodeGen/X86/leaFixup64.mir @@ -187,9 +187,9 @@ ; CHECK: liveins: $rax, $rbp ; CHECK: $eax = ADD32rr $eax, $ebp, implicit-def $eflags, implicit $rax, implicit $rbp ; CHECK: $eax = ADD32ri8 $eax, -5, implicit-def $eflags - ; CHECK: RETQ $eax + ; CHECK: RET64 $eax $eax = LEA64_32r killed $rax, 1, killed $rbp, -5, $noreg - RETQ $eax + RET64 $eax ... --- @@ -225,9 +225,9 @@ ; CHECK: liveins: $rax, $rbp ; CHECK: $ebp = ADD32rr $ebp, $eax, implicit-def $eflags, implicit $rbp, implicit $rax ; CHECK: $ebp = ADD32ri8 $ebp, -5, implicit-def $eflags - ; CHECK: RETQ $ebp + ; CHECK: RET64 $ebp $ebp = LEA64_32r killed $rbp, 1, killed $rax, -5, $noreg - RETQ $ebp + RET64 $ebp ... --- @@ -262,9 +262,9 @@ ; CHECK-LABEL: name: test1lea_rbp_64_32_1 ; CHECK: liveins: $rax, $rbp ; CHECK: $ebp = ADD32rr $ebp, $eax, implicit-def $eflags, implicit $rbp, implicit $rax - ; CHECK: RETQ $ebp + ; CHECK: RET64 $ebp $ebp = LEA64_32r killed $rbp, 1, killed $rax, 0, $noreg - RETQ $ebp + RET64 $ebp ... --- @@ -300,9 +300,9 @@ ; CHECK: liveins: $rax, $rbp ; CHECK: $rax = ADD64rr $rax, $rbp, implicit-def $eflags ; CHECK: $rax = ADD64ri8 $rax, -5, implicit-def $eflags - ; CHECK: RETQ $eax + ; CHECK: RET64 $eax $rax = LEA64r killed $rax, 1, killed $rbp, -5, $noreg - RETQ $eax + RET64 $eax ... --- @@ -338,9 +338,9 @@ ; CHECK: liveins: $rax, $rbp ; CHECK: $rbp = ADD64rr $rbp, $rax, implicit-def $eflags ; CHECK: $rbp = ADD64ri8 $rbp, -5, implicit-def $eflags - ; CHECK: RETQ $ebp + ; CHECK: RET64 $ebp $rbp = LEA64r killed $rbp, 1, killed $rax, -5, $noreg - RETQ $ebp + RET64 $ebp ... --- @@ -375,9 +375,9 @@ ; CHECK-LABEL: name: test1add_rbp_64 ; CHECK: liveins: $rax, $rbp ; CHECK: $rbp = ADD64rr $rbp, $rax, implicit-def $eflags - ; CHECK: RETQ $ebp + ; CHECK: RET64 $ebp $rbp = LEA64r killed $rbp, 1, killed $rax, 0, $noreg - RETQ $ebp + RET64 $ebp ... --- @@ -414,9 +414,9 @@ ; CHECK: liveins: $rax, $rbp ; CHECK: $ebx = LEA64_32r killed $rax, 1, killed $rbp, 0, $noreg ; CHECK: $ebx = ADD32ri8 $ebx, -5, implicit-def $eflags - ; CHECK: RETQ $ebx + ; CHECK: RET64 $ebx $ebx = LEA64_32r killed $rax, 1, killed $rbp, -5, $noreg - RETQ $ebx + RET64 $ebx ... --- @@ -453,9 +453,9 @@ ; CHECK: liveins: $rax, $rbp ; CHECK: $ebx = LEA64_32r killed $rax, 1, killed $rbp, 0, $noreg ; CHECK: $ebx = ADD32ri8 $ebx, -5, implicit-def $eflags - ; CHECK: RETQ $ebx + ; CHECK: RET64 $ebx $ebx = LEA64_32r killed $rbp, 1, killed $rax, -5, $noreg - RETQ $ebx + RET64 $ebx ... --- @@ -491,9 +491,9 @@ ; CHECK-LABEL: name: test1lea_rbp_64_32 ; CHECK: liveins: $rax, $rbp ; CHECK: $ebx = LEA64_32r killed $rax, 1, killed $rbp, 0, $noreg - ; CHECK: RETQ $ebx + ; CHECK: RET64 $ebx $ebx = LEA64_32r killed $rbp, 1, killed $rax, 0, $noreg - RETQ $ebx + RET64 $ebx ... --- @@ -530,9 +530,9 @@ ; CHECK: liveins: $rax, $rbp ; CHECK: $rbx = LEA64r killed $rax, 1, killed $rbp, 0, $noreg ; CHECK: $rbx = ADD64ri8 $rbx, -5, implicit-def $eflags - ; CHECK: RETQ $ebx + ; CHECK: RET64 $ebx $rbx = LEA64r killed $rax, 1, killed $rbp, -5, $noreg - RETQ $ebx + RET64 $ebx ... --- @@ -569,9 +569,9 @@ ; CHECK: liveins: $rax, $rbp ; CHECK: $rbx = LEA64r killed $rax, 1, killed $rbp, 0, $noreg ; CHECK: $rbx = ADD64ri8 $rbx, -5, implicit-def $eflags - ; CHECK: RETQ $ebx + ; CHECK: RET64 $ebx $rbx = LEA64r killed $rbp, 1, killed $rax, -5, $noreg - RETQ $ebx + RET64 $ebx ... --- @@ -607,9 +607,9 @@ ; CHECK-LABEL: name: test1lea_rbp_64 ; CHECK: liveins: $rax, $rbp ; CHECK: $rbx = LEA64r killed $rax, 1, killed $rbp, 0, $noreg - ; CHECK: RETQ $ebx + ; CHECK: RET64 $ebx $rbx = LEA64r killed $rbp, 1, killed $rax, 0, $noreg - RETQ $ebx + RET64 $ebx ... --- @@ -646,11 +646,11 @@ ; CHECK: $r13 = KILL $rdi, implicit-def $r13 ; CHECK: $r12 = LEA64r $noreg, 2, killed $r13, 5, $noreg ; CHECK: $r12 = ADD64rr $r12, killed $rbp, implicit-def $eflags - ; CHECK: RETQ $r12 + ; CHECK: RET64 $r12 $rbp = KILL $rbp, implicit-def $rbp $r13 = KILL $rdi, implicit-def $r13 $r12 = LEA64r killed $rbp, 2, killed $r13, 5, $noreg - RETQ $r12 + RET64 $r12 ... --- @@ -686,9 +686,9 @@ ; CHECK: liveins: $rax, $rbp ; CHECK: $eax = ADD32rr $eax, $ebp, implicit-def $eflags, implicit $rax, implicit $rbp ; CHECK: $eax = ADD32ri $eax, 129, implicit-def $eflags - ; CHECK: RETQ $eax + ; CHECK: RET64 $eax $eax = LEA64_32r killed $rax, 1, killed $rbp, 129, $noreg - RETQ $eax + RET64 $eax ... --- @@ -723,9 +723,9 @@ ; CHECK-LABEL: name: test1mov1add_rbp_64_32 ; CHECK: liveins: $rax, $rbp, $rbx ; CHECK: $ebx = LEA64_32r killed $rbp, 1, killed $rbp, 0, $noreg - ; CHECK: RETQ $ebx + ; CHECK: RET64 $ebx $ebx = LEA64_32r killed $rbp, 1, killed $rbp, 0, $noreg - RETQ $ebx + RET64 $ebx ... --- @@ -760,9 +760,9 @@ ; CHECK-LABEL: name: testleaadd_rbp_index_64_32 ; CHECK: liveins: $rax, $rbp, $rbx ; CHECK: $ebx = LEA64_32r killed $rbp, 1, killed $rbp, 5, $noreg - ; CHECK: RETQ $ebx + ; CHECK: RET64 $ebx $ebx = LEA64_32r killed $rbp, 1, killed $rbp, 5, $noreg - RETQ $ebx + RET64 $ebx ... --- @@ -797,9 +797,9 @@ ; CHECK-LABEL: name: testleaadd_rbp_index2_64_32 ; CHECK: liveins: $eax, $ebp, $ebx ; CHECK: $ebx = LEA64_32r killed $rbp, 4, killed $rbp, 5, $noreg - ; CHECK: RETQ $ebx + ; CHECK: RET64 $ebx $ebx = LEA64_32r killed $rbp, 4, killed $rbp, 5, $noreg - RETQ $ebx + RET64 $ebx ... --- @@ -835,9 +835,9 @@ ; CHECK: liveins: $rax, $rbp ; CHECK: $rax = ADD64rr $rax, $rbp, implicit-def $eflags ; CHECK: $rax = ADD64ri32 $rax, 129, implicit-def $eflags - ; CHECK: RETQ $eax + ; CHECK: RET64 $eax $rax = LEA64r killed $rax, 1, killed $rbp, 129, $noreg - RETQ $eax + RET64 $eax ... --- @@ -873,9 +873,9 @@ ; CHECK: liveins: $rax, $rbp, $rbx ; CHECK: $rbx = MOV64rr $rbp ; CHECK: $rbx = ADD64rr $rbx, $rbp, implicit-def $eflags - ; CHECK: RETQ $ebx + ; CHECK: RET64 $ebx $rbx = LEA64r killed $rbp, 1, $rbp, 0, $noreg - RETQ $ebx + RET64 $ebx ... --- @@ -911,9 +911,9 @@ ; CHECK: liveins: $rax, $rbp, $rbx ; CHECK: $rbx = LEA64r $noreg, 1, $rbp, 5, $noreg ; CHECK: $rbx = ADD64rr $rbx, $rbp, implicit-def $eflags - ; CHECK: RETQ $ebx + ; CHECK: RET64 $ebx $rbx = LEA64r $rbp, 1, $rbp, 5, $noreg - RETQ $ebx + RET64 $ebx ... --- @@ -949,9 +949,9 @@ ; CHECK: liveins: $rax, $rbp, $rbx ; CHECK: $rbx = LEA64r $noreg, 4, $rbp, 5, $noreg ; CHECK: $rbx = ADD64rr $rbx, $rbp, implicit-def $eflags - ; CHECK: RETQ $ebx + ; CHECK: RET64 $ebx $rbx = LEA64r $rbp, 4, $rbp, 5, $noreg - RETQ $ebx + RET64 $ebx ... --- @@ -986,9 +986,9 @@ ; CHECK-LABEL: name: test_skip_opt_64 ; CHECK: liveins: $rax, $rbp, $rbx ; CHECK: $rbp = LEA64r killed $rbp, 4, killed $rbp, 0, $noreg - ; CHECK: RETQ $ebp + ; CHECK: RET64 $ebp $rbp = LEA64r killed $rbp, 4, killed $rbp, 0, $noreg - RETQ $ebp + RET64 $ebp ... --- @@ -1024,23 +1024,23 @@ ; CHECK: CMP64rr $rax, killed $rbx, implicit-def $eflags ; CHECK: $rbx = LEA64r killed $rax, 4, killed $rax, 5, $noreg ; CHECK: JCC_1 %bb.1, 4, implicit $eflags - ; CHECK: RETQ $ebx + ; CHECK: RET64 $ebx ; CHECK: bb.1: ; CHECK: liveins: $rax, $rbp, $rbx ; CHECK: $rbp = LEA64r killed $rbx, 4, killed $rbx, 0, $noreg ; CHECK: $rbp = ADD64ri8 $rbp, 5, implicit-def $eflags - ; CHECK: RETQ $ebp + ; CHECK: RET64 $ebp bb.0 (%ir-block.0): liveins: $rax, $rbp, $rbx CMP64rr $rax, killed $rbx, implicit-def $eflags $rbx = LEA64r killed $rax, 4, killed $rax, 5, $noreg JCC_1 %bb.1, 4, implicit $eflags - RETQ $ebx + RET64 $ebx bb.1: liveins: $rax, $rbp, $rbx $rbp = LEA64r killed $rbx, 4, killed $rbx, 5, $noreg - RETQ $ebp + RET64 $ebp ... --- @@ -1075,9 +1075,9 @@ ; CHECK-LABEL: name: test_skip_opt_64_32 ; CHECK: liveins: $rax, $rbp, $rbx ; CHECK: $ebp = LEA64_32r killed $rbp, 4, killed $rbp, 0, $noreg - ; CHECK: RETQ $ebp + ; CHECK: RET64 $ebp $ebp = LEA64_32r killed $rbp, 4, killed $rbp, 0, $noreg - RETQ $ebp + RET64 $ebp ... --- @@ -1113,23 +1113,23 @@ ; CHECK: CMP64rr $rax, killed $rbx, implicit-def $eflags ; CHECK: $ebx = LEA64_32r killed $rax, 4, killed $rax, 5, $noreg ; CHECK: JCC_1 %bb.1, 4, implicit $eflags - ; CHECK: RETQ $ebx + ; CHECK: RET64 $ebx ; CHECK: bb.1: ; CHECK: liveins: $rax, $rbp, $rbx ; CHECK: $ebp = LEA64_32r killed $rbx, 4, killed $rbx, 0, $noreg ; CHECK: $ebp = ADD32ri8 $ebp, 5, implicit-def $eflags - ; CHECK: RETQ $ebp + ; CHECK: RET64 $ebp bb.0 (%ir-block.0): liveins: $rax, $rbp, $rbx CMP64rr $rax, killed $rbx, implicit-def $eflags $ebx = LEA64_32r killed $rax, 4, killed $rax, 5, $noreg JCC_1 %bb.1, 4, implicit $eflags - RETQ $ebx + RET64 $ebx bb.1: liveins: $rax, $rbp, $rbx $ebp = LEA64_32r killed $rbx, 4, killed $rbx, 5, $noreg - RETQ $ebp + RET64 $ebp ... --- @@ -1173,7 +1173,7 @@ ; CHECK: NOOP ; CHECK: NOOP ; CHECK: NOOP - ; CHECK: RETQ $ebp + ; CHECK: RET64 $ebp DBG_VALUE 0, $noreg NOOP NOOP @@ -1184,7 +1184,7 @@ NOOP NOOP NOOP - RETQ $ebp + RET64 $ebp ... ... diff --git a/llvm/test/CodeGen/X86/machine-copy-dbgvalue.mir b/llvm/test/CodeGen/X86/machine-copy-dbgvalue.mir --- a/llvm/test/CodeGen/X86/machine-copy-dbgvalue.mir +++ b/llvm/test/CodeGen/X86/machine-copy-dbgvalue.mir @@ -8,7 +8,7 @@ # CHECK-NEXT: $rax = MOV64ri 31 # CHECK-NEXT: DBG_VALUE $rax # CHECK-NEXT: DBG_VALUE_LIST 0, !DIExpression(DW_OP_LLVM_arg, 0, DW_OP_LLVM_arg, 1, DW_OP_constu, 4, DW_OP_mul, DW_OP_plus, DW_OP_stack_value), $rax, 0, 0 -# CHECK-NEXT: RETQ implicit killed $rax +# CHECK-NEXT: RET64 implicit killed $rax name: foo body: | bb.0: @@ -16,5 +16,5 @@ DBG_VALUE $rcx, 0, 0, 0, 0 DBG_VALUE_LIST 0, !DIExpression(DW_OP_LLVM_arg, 0, DW_OP_LLVM_arg, 1, DW_OP_constu, 4, DW_OP_mul, DW_OP_plus, DW_OP_stack_value), $rcx, 0, 0 $rax = COPY killed renamable $rcx - RETQ implicit killed $rax + RET64 implicit killed $rax ... diff --git a/llvm/test/CodeGen/X86/machine-outliner-cfi-tail-some.mir b/llvm/test/CodeGen/X86/machine-outliner-cfi-tail-some.mir --- a/llvm/test/CodeGen/X86/machine-outliner-cfi-tail-some.mir +++ b/llvm/test/CodeGen/X86/machine-outliner-cfi-tail-some.mir @@ -39,7 +39,7 @@ $edx = MOV32ri 2 $edi = MOV32ri 3 $eax = MOV32ri 4 - RETQ + RET64 ... --- name: bar @@ -63,7 +63,7 @@ $edx = MOV32ri 2 $edi = MOV32ri 3 $eax = MOV32ri 4 - RETQ + RET64 ... --- name: baz @@ -87,4 +87,4 @@ $edx = MOV32ri 2 $edi = MOV32ri 3 $eax = MOV32ri 4 - RETQ + RET64 diff --git a/llvm/test/CodeGen/X86/machine-outliner-cfi-tail.mir b/llvm/test/CodeGen/X86/machine-outliner-cfi-tail.mir --- a/llvm/test/CodeGen/X86/machine-outliner-cfi-tail.mir +++ b/llvm/test/CodeGen/X86/machine-outliner-cfi-tail.mir @@ -30,7 +30,7 @@ $edx = MOV32ri 2 $edi = MOV32ri 3 $eax = MOV32ri 4 - RETQ + RET64 ... --- name: bar @@ -52,7 +52,7 @@ $edx = MOV32ri 2 $edi = MOV32ri 3 $eax = MOV32ri 4 - RETQ + RET64 ... --- name: baz @@ -74,4 +74,4 @@ $edx = MOV32ri 2 $edi = MOV32ri 3 $eax = MOV32ri 4 - RETQ + RET64 diff --git a/llvm/test/CodeGen/X86/optimize-compare.mir b/llvm/test/CodeGen/X86/optimize-compare.mir --- a/llvm/test/CodeGen/X86/optimize-compare.mir +++ b/llvm/test/CodeGen/X86/optimize-compare.mir @@ -619,7 +619,7 @@ ; CHECK-NEXT: JMP_1 %bb.3 ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: bb.3: - ; CHECK-NEXT: RETQ + ; CHECK-NEXT: RET64 bb.0: %0:gr32 = COPY $eax CMP32ri %0, 20, implicit-def $eflags @@ -636,7 +636,7 @@ JMP_1 %bb.3 bb.3: - RETQ + RET64 ... --- name: opt_adjusted_imm_multiple_blocks_noopt @@ -663,7 +663,7 @@ ; CHECK-NEXT: $al = SETCCr 4, implicit $eflags ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: bb.3: - ; CHECK-NEXT: RETQ + ; CHECK-NEXT: RET64 bb.0: %0:gr32 = COPY $eax CMP32ri %0, 20, implicit-def $eflags @@ -681,5 +681,5 @@ $al = SETCCr 4, implicit $eflags bb.3: - RETQ + RET64 ... diff --git a/llvm/test/CodeGen/X86/patchpoint-verifiable.mir b/llvm/test/CodeGen/X86/patchpoint-verifiable.mir --- a/llvm/test/CodeGen/X86/patchpoint-verifiable.mir +++ b/llvm/test/CodeGen/X86/patchpoint-verifiable.mir @@ -38,5 +38,5 @@ ; CHECK: PATCHPOINT 5, 5, 0, 2, 0, $rdi, $rsi, csr_64, implicit-def dead early-clobber $r11, implicit-def $rsp, implicit-def dead $rax PATCHPOINT 5, 5, 0, 2, 0, $rdi, $rsi, csr_64, implicit-def dead early-clobber $r11, implicit-def $rsp, implicit-def dead $rax $rbp = POP64r implicit-def $rsp, implicit $rsp - RETQ + RET64 ... diff --git a/llvm/test/CodeGen/X86/phielim-undef.mir b/llvm/test/CodeGen/X86/phielim-undef.mir --- a/llvm/test/CodeGen/X86/phielim-undef.mir +++ b/llvm/test/CodeGen/X86/phielim-undef.mir @@ -52,7 +52,7 @@ ; CHECK-NEXT: JMP_1 %bb.2 ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: bb.5: - ; CHECK-NEXT: RETQ + ; CHECK-NEXT: RET64 ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: bb.6: bb.0: @@ -91,7 +91,7 @@ JMP_1 %bb.2 bb.6: - RETQ + RET64 bb.7: ... diff --git a/llvm/test/CodeGen/X86/post-ra-sched-with-debug.mir b/llvm/test/CodeGen/X86/post-ra-sched-with-debug.mir --- a/llvm/test/CodeGen/X86/post-ra-sched-with-debug.mir +++ b/llvm/test/CodeGen/X86/post-ra-sched-with-debug.mir @@ -330,6 +330,6 @@ $rbx = POP64r implicit-def $rsp, implicit $rsp $r14 = POP64r implicit-def $rsp, implicit $rsp $rbp = POP64r implicit-def $rsp, implicit $rsp - RETQ + RET64 ... diff --git a/llvm/test/CodeGen/X86/prologue-epilogue-remarks.mir b/llvm/test/CodeGen/X86/prologue-epilogue-remarks.mir --- a/llvm/test/CodeGen/X86/prologue-epilogue-remarks.mir +++ b/llvm/test/CodeGen/X86/prologue-epilogue-remarks.mir @@ -23,7 +23,7 @@ constants: body: | bb.0: - RETQ + RET64 ... --- @@ -41,7 +41,7 @@ constants: body: | bb.0: - RETQ + RET64 ... --- @@ -59,6 +59,6 @@ constants: body: | bb.0: - RETQ + RET64 ... diff --git a/llvm/test/CodeGen/X86/scavenger.mir b/llvm/test/CodeGen/X86/scavenger.mir --- a/llvm/test/CodeGen/X86/scavenger.mir +++ b/llvm/test/CodeGen/X86/scavenger.mir @@ -36,7 +36,7 @@ ; CHECK: NOOP implicit killed [[REG1]] NOOP implicit %2 NOOP implicit %1 - RETQ $eax + RET64 $eax ... --- # CHECK-LABEL: name: func3 diff --git a/llvm/test/CodeGen/X86/tail-merge-after-mbp.mir b/llvm/test/CodeGen/X86/tail-merge-after-mbp.mir --- a/llvm/test/CodeGen/X86/tail-merge-after-mbp.mir +++ b/llvm/test/CodeGen/X86/tail-merge-after-mbp.mir @@ -24,7 +24,7 @@ ; CHECK: bb.4: ; CHECK: $ebp = XOR32rr undef $ebp, undef $ebp, implicit-def dead $eflags ; CHECK: dead $eax = XOR32rr undef $eax, undef $eax, implicit-def dead $eflags, implicit-def $al - ; CHECK: RETQ $eax + ; CHECK: RET64 $eax ; CHECK: bb.6: ; CHECK: successors: %bb.1(0x30000000), %bb.7(0x50000000) ; CHECK: $rax = MOV64rm $r14, 1, $noreg, 0, $noreg :: (load (s64)) @@ -41,7 +41,7 @@ ; CHECK: JCC_1 %bb.7, 5, implicit $eflags ; CHECK: bb.1: ; CHECK: $ebp = XOR32rr undef $ebp, undef $ebp, implicit-def dead $eflags - ; CHECK: RETQ $eax + ; CHECK: RET64 $eax bb.0: successors: %bb.1(0x40000000), %bb.7(0x40000000) @@ -113,6 +113,6 @@ bb.16: - RETQ $eax + RET64 $eax ... diff --git a/llvm/test/CodeGen/X86/tied-depbreak.mir b/llvm/test/CodeGen/X86/tied-depbreak.mir --- a/llvm/test/CodeGen/X86/tied-depbreak.mir +++ b/llvm/test/CodeGen/X86/tied-depbreak.mir @@ -59,6 +59,6 @@ ; Verify that XOR is untouched by the dependency breaker ; CHECK: $esi = XOR32rr undef $esi, undef $esi, implicit-def dead $eflags, implicit-def $rsi $esi = XOR32rr undef $esi, undef $esi, implicit-def dead $eflags, implicit-def $rsi - RETQ killed $eax + RET64 killed $eax ... diff --git a/llvm/test/CodeGen/X86/twoaddr-dbg-value.mir b/llvm/test/CodeGen/X86/twoaddr-dbg-value.mir --- a/llvm/test/CodeGen/X86/twoaddr-dbg-value.mir +++ b/llvm/test/CodeGen/X86/twoaddr-dbg-value.mir @@ -13,7 +13,7 @@ %5:gr32 = COPY %4 PUSH32r killed %1, implicit-def $esp, implicit $esp $eax = COPY killed %5 - RETQ implicit killed $eax + RET64 implicit killed $eax ... diff --git a/llvm/test/CodeGen/X86/update-terminator.mir b/llvm/test/CodeGen/X86/update-terminator.mir --- a/llvm/test/CodeGen/X86/update-terminator.mir +++ b/llvm/test/CodeGen/X86/update-terminator.mir @@ -74,6 +74,6 @@ JMP_1 %bb.2 bb.4: - RETQ + RET64 ... diff --git a/llvm/test/CodeGen/X86/win64-eh-empty-block-2.mir b/llvm/test/CodeGen/X86/win64-eh-empty-block-2.mir --- a/llvm/test/CodeGen/X86/win64-eh-empty-block-2.mir +++ b/llvm/test/CodeGen/X86/win64-eh-empty-block-2.mir @@ -173,7 +173,7 @@ SEH_Epilogue $rsp = frame-destroy ADD64ri8 $rsp, 48, implicit-def dead $eflags $rbp = frame-destroy POP64r implicit-def $rsp, implicit $rsp - RETQ $eax + RET64 $eax bb.1.if.then: successors: %bb.2(0x7ffff800), %bb.7(0x00000800) diff --git a/llvm/test/CodeGen/X86/xray-multiplerets-in-blocks.mir b/llvm/test/CodeGen/X86/xray-multiplerets-in-blocks.mir --- a/llvm/test/CodeGen/X86/xray-multiplerets-in-blocks.mir +++ b/llvm/test/CodeGen/X86/xray-multiplerets-in-blocks.mir @@ -21,8 +21,8 @@ bb.0: liveins: $edi ; CHECK: PATCHABLE_FUNCTION_ENTER - RETQ + RET64 ; CHECK-NEXT: PATCHABLE_RET - RETQ + RET64 ; CHECK-NEXT: PATCHABLE_RET ... diff --git a/llvm/test/DebugInfo/MIR/InstrRef/dbg-phi-subregister-location.mir b/llvm/test/DebugInfo/MIR/InstrRef/dbg-phi-subregister-location.mir --- a/llvm/test/DebugInfo/MIR/InstrRef/dbg-phi-subregister-location.mir +++ b/llvm/test/DebugInfo/MIR/InstrRef/dbg-phi-subregister-location.mir @@ -66,6 +66,6 @@ DBG_INSTR_REF 2, 0, !12, !DIExpression(), debug-location !13 renamable $rax = MOV64rm $rip, 1, $noreg, target-flags(x86-gotpcrel) @someglobal, $noreg, debug-location !13 :: (load (s64) from got) MOV8mr killed renamable $rax, 1, $noreg, 0, $noreg, renamable $dil, debug-location !13 :: (store (s8) into @someglobal) - RETQ debug-location !13 + RET64 debug-location !13 ... diff --git a/llvm/test/DebugInfo/MIR/InstrRef/dbg-phis-in-ldv.mir b/llvm/test/DebugInfo/MIR/InstrRef/dbg-phis-in-ldv.mir --- a/llvm/test/DebugInfo/MIR/InstrRef/dbg-phis-in-ldv.mir +++ b/llvm/test/DebugInfo/MIR/InstrRef/dbg-phis-in-ldv.mir @@ -157,6 +157,6 @@ CFI_INSTRUCTION def_cfa_offset 16, debug-location !26 $r14 = frame-destroy POP64r implicit-def $rsp, implicit $rsp, debug-location !26 CFI_INSTRUCTION def_cfa_offset 8, debug-location !26 - RETQ implicit $eax, debug-location !26 + RET64 implicit $eax, debug-location !26 ... diff --git a/llvm/test/DebugInfo/MIR/InstrRef/dbg-phis-merging-in-ldv.mir b/llvm/test/DebugInfo/MIR/InstrRef/dbg-phis-merging-in-ldv.mir --- a/llvm/test/DebugInfo/MIR/InstrRef/dbg-phis-merging-in-ldv.mir +++ b/llvm/test/DebugInfo/MIR/InstrRef/dbg-phis-merging-in-ldv.mir @@ -194,6 +194,6 @@ CFI_INSTRUCTION def_cfa_offset 16, debug-location !31 $r14 = frame-destroy POP64r implicit-def $rsp, implicit $rsp, debug-location !31 CFI_INSTRUCTION def_cfa_offset 8, debug-location !31 - RETQ implicit $eax, debug-location !31 + RET64 implicit $eax, debug-location !31 ... diff --git a/llvm/test/DebugInfo/MIR/InstrRef/dbg-phis-with-loops.mir b/llvm/test/DebugInfo/MIR/InstrRef/dbg-phis-with-loops.mir --- a/llvm/test/DebugInfo/MIR/InstrRef/dbg-phis-with-loops.mir +++ b/llvm/test/DebugInfo/MIR/InstrRef/dbg-phis-with-loops.mir @@ -200,6 +200,6 @@ CFI_INSTRUCTION def_cfa_offset 16, debug-location !31 $r14 = frame-destroy POP64r implicit-def $rsp, implicit $rsp, debug-location !31 CFI_INSTRUCTION def_cfa_offset 8, debug-location !31 - RETQ implicit $eax, debug-location !31 + RET64 implicit $eax, debug-location !31 ... diff --git a/llvm/test/DebugInfo/MIR/InstrRef/follow-spill-of-live-value.mir b/llvm/test/DebugInfo/MIR/InstrRef/follow-spill-of-live-value.mir --- a/llvm/test/DebugInfo/MIR/InstrRef/follow-spill-of-live-value.mir +++ b/llvm/test/DebugInfo/MIR/InstrRef/follow-spill-of-live-value.mir @@ -328,6 +328,6 @@ CFI_INSTRUCTION def_cfa_offset 16 $rbp = frame-destroy POP64r implicit-def $rsp, implicit $rsp CFI_INSTRUCTION def_cfa_offset 8 - RETQ + RET64 ... diff --git a/llvm/test/DebugInfo/MIR/InstrRef/ignore-dbg-value-list.mir b/llvm/test/DebugInfo/MIR/InstrRef/ignore-dbg-value-list.mir --- a/llvm/test/DebugInfo/MIR/InstrRef/ignore-dbg-value-list.mir +++ b/llvm/test/DebugInfo/MIR/InstrRef/ignore-dbg-value-list.mir @@ -69,6 +69,6 @@ ; This clobber of $rax might cause LDV to re-issue a DBG_VALUE stating the ; variable location as $rbx. However, the preceeding DBG_VALUE_LIST should ; terminate the earlier location. - RETQ implicit $rbx, debug-location !13 + RET64 implicit $rbx, debug-location !13 ... diff --git a/llvm/test/DebugInfo/MIR/InstrRef/instr-ref-roundtrip.mir b/llvm/test/DebugInfo/MIR/InstrRef/instr-ref-roundtrip.mir --- a/llvm/test/DebugInfo/MIR/InstrRef/instr-ref-roundtrip.mir +++ b/llvm/test/DebugInfo/MIR/InstrRef/instr-ref-roundtrip.mir @@ -14,5 +14,5 @@ $rbp = MOV64rr $rdi, debug-instr-number 1 dead $rcx = MOV64ri 0 CMP64ri8 renamable $rax, 1, implicit-def $eflags - RETQ $rax + RET64 $rax ... diff --git a/llvm/test/DebugInfo/MIR/InstrRef/livedebugvalues_instrref_tolocs.mir b/llvm/test/DebugInfo/MIR/InstrRef/livedebugvalues_instrref_tolocs.mir --- a/llvm/test/DebugInfo/MIR/InstrRef/livedebugvalues_instrref_tolocs.mir +++ b/llvm/test/DebugInfo/MIR/InstrRef/livedebugvalues_instrref_tolocs.mir @@ -154,5 +154,5 @@ ; This is instruction 10 referred to in bb.10. However, as the variable ; location/value has been modified in the meantime, no DBG_VALUE should be ; generated here. - RETQ $eax, debug-location !17 + RET64 $eax, debug-location !17 ... diff --git a/llvm/test/DebugInfo/MIR/InstrRef/livedebugvalues_recover_clobbers.mir b/llvm/test/DebugInfo/MIR/InstrRef/livedebugvalues_recover_clobbers.mir --- a/llvm/test/DebugInfo/MIR/InstrRef/livedebugvalues_recover_clobbers.mir +++ b/llvm/test/DebugInfo/MIR/InstrRef/livedebugvalues_recover_clobbers.mir @@ -96,5 +96,5 @@ ; CHECK-NEXT: CALL64pcrel32 ; CHECK-NEXT: DBG_VALUE $ebx - RETQ $eax, debug-location !17 + RET64 $eax, debug-location !17 ... diff --git a/llvm/test/DebugInfo/MIR/InstrRef/livedebugvalues_stackslot_subregs.mir b/llvm/test/DebugInfo/MIR/InstrRef/livedebugvalues_stackslot_subregs.mir --- a/llvm/test/DebugInfo/MIR/InstrRef/livedebugvalues_stackslot_subregs.mir +++ b/llvm/test/DebugInfo/MIR/InstrRef/livedebugvalues_stackslot_subregs.mir @@ -52,5 +52,5 @@ DBG_INSTR_REF 1, 0, !11, !DIExpression(), debug-location !12 ; CHECK: DBG_INSTR_REF ; CHECK-NEXT: DBG_VALUE $esi - RETQ $rsi, debug-location !12 + RET64 $rsi, debug-location !12 ... diff --git a/llvm/test/DebugInfo/MIR/InstrRef/livedebugvalues_subreg_substitutions.mir b/llvm/test/DebugInfo/MIR/InstrRef/livedebugvalues_subreg_substitutions.mir --- a/llvm/test/DebugInfo/MIR/InstrRef/livedebugvalues_subreg_substitutions.mir +++ b/llvm/test/DebugInfo/MIR/InstrRef/livedebugvalues_subreg_substitutions.mir @@ -105,5 +105,5 @@ ; CHECK-NEXT: DBG_INSTR_REF 13, 0 ; CHECK-NEXT: DBG_VALUE $noreg $rax = MOV64rm $rsp, 1, $noreg, 8, $noreg :: (load 8 from %stack.0) - RETQ $rax, debug-location !12 + RET64 $rax, debug-location !12 ... diff --git a/llvm/test/DebugInfo/MIR/InstrRef/memory-operand-tracking.mir b/llvm/test/DebugInfo/MIR/InstrRef/memory-operand-tracking.mir --- a/llvm/test/DebugInfo/MIR/InstrRef/memory-operand-tracking.mir +++ b/llvm/test/DebugInfo/MIR/InstrRef/memory-operand-tracking.mir @@ -81,5 +81,5 @@ ; CHECK-NEXT: DBG_VALUE $noreg $rax = MOV64rm $rsp, 1, $noreg, 8, $noreg :: (load 8 from %stack.0) - RETQ $rax, debug-location !12 + RET64 $rax, debug-location !12 ... diff --git a/llvm/test/DebugInfo/MIR/InstrRef/no-duplicates.mir b/llvm/test/DebugInfo/MIR/InstrRef/no-duplicates.mir --- a/llvm/test/DebugInfo/MIR/InstrRef/no-duplicates.mir +++ b/llvm/test/DebugInfo/MIR/InstrRef/no-duplicates.mir @@ -36,5 +36,5 @@ $rbp = MOV64rr $rdi, debug-instr-number 1, debug-location !12 dead $rcx = MOV64ri 0, debug-instr-number 1, debug-location !12 CMP64ri8 renamable $rax, 1, implicit-def $eflags - RETQ $rax + RET64 $rax ... diff --git a/llvm/test/DebugInfo/MIR/InstrRef/no-metainstrs.mir b/llvm/test/DebugInfo/MIR/InstrRef/no-metainstrs.mir --- a/llvm/test/DebugInfo/MIR/InstrRef/no-metainstrs.mir +++ b/llvm/test/DebugInfo/MIR/InstrRef/no-metainstrs.mir @@ -37,5 +37,5 @@ $ebp = KILL killed $rbp, debug-instr-number 2, debug-location !12 dead $rcx = MOV64ri 0 CMP64ri8 renamable $rax, 1, implicit-def $eflags - RETQ $rax + RET64 $rax ... diff --git a/llvm/test/DebugInfo/MIR/InstrRef/phi-coalesce-subreg.mir b/llvm/test/DebugInfo/MIR/InstrRef/phi-coalesce-subreg.mir --- a/llvm/test/DebugInfo/MIR/InstrRef/phi-coalesce-subreg.mir +++ b/llvm/test/DebugInfo/MIR/InstrRef/phi-coalesce-subreg.mir @@ -156,6 +156,6 @@ ADJCALLSTACKUP64 0, 0, implicit-def $rsp, implicit-def $eflags, implicit-def $ssp, implicit $rsp, implicit $ssp, debug-location !13 %23:gr32 = MOVSX32rr16 %26, debug-location !13 $eax = COPY %23, debug-location !13 - RETQ implicit $eax, debug-location !13 + RET64 implicit $eax, debug-location !13 ... diff --git a/llvm/test/DebugInfo/MIR/InstrRef/phi-coalescing.mir b/llvm/test/DebugInfo/MIR/InstrRef/phi-coalescing.mir --- a/llvm/test/DebugInfo/MIR/InstrRef/phi-coalescing.mir +++ b/llvm/test/DebugInfo/MIR/InstrRef/phi-coalescing.mir @@ -155,6 +155,6 @@ ADJCALLSTACKUP64 0, 0, implicit-def $rsp, implicit-def $eflags, implicit-def $ssp, implicit $rsp, implicit $ssp, debug-location !13 %13:gr32 = COPY %14.sub_32bit, debug-location !13 $eax = COPY %13, debug-location !13 - RETQ implicit $eax, debug-location !13 + RET64 implicit $eax, debug-location !13 ... diff --git a/llvm/test/DebugInfo/MIR/InstrRef/pick-vphi-in-shifting-loop.mir b/llvm/test/DebugInfo/MIR/InstrRef/pick-vphi-in-shifting-loop.mir --- a/llvm/test/DebugInfo/MIR/InstrRef/pick-vphi-in-shifting-loop.mir +++ b/llvm/test/DebugInfo/MIR/InstrRef/pick-vphi-in-shifting-loop.mir @@ -123,6 +123,6 @@ JCC_1 %bb.5, 6, implicit $eflags, debug-location !22 bb.6: - RETQ debug-location !22 + RET64 debug-location !22 ... diff --git a/llvm/test/DebugInfo/MIR/InstrRef/restore-to-rsp-crash.mir b/llvm/test/DebugInfo/MIR/InstrRef/restore-to-rsp-crash.mir --- a/llvm/test/DebugInfo/MIR/InstrRef/restore-to-rsp-crash.mir +++ b/llvm/test/DebugInfo/MIR/InstrRef/restore-to-rsp-crash.mir @@ -61,6 +61,6 @@ DBG_VALUE $rax, $noreg, !12, !DIExpression(), debug-location !13 MOV64mr $rsp, 1, $noreg, -8, $noreg, renamable $rax :: (store 8 into %stack.0) $rsp = MOV64rm $rsp, 1, $noreg, 0, $noreg, debug-location !13 :: (load 8 from %stack.0) - RETQ implicit $rbx, debug-location !13 + RET64 implicit $rbx, debug-location !13 ... diff --git a/llvm/test/DebugInfo/MIR/InstrRef/substitusions-roundtrip.mir b/llvm/test/DebugInfo/MIR/InstrRef/substitusions-roundtrip.mir --- a/llvm/test/DebugInfo/MIR/InstrRef/substitusions-roundtrip.mir +++ b/llvm/test/DebugInfo/MIR/InstrRef/substitusions-roundtrip.mir @@ -22,5 +22,5 @@ DBG_INSTR_REF 1, 0 dead $rcx = MOV64ri 0 CMP64ri8 renamable $rax, 1, implicit-def $eflags - RETQ $rax + RET64 $rax ... diff --git a/llvm/test/DebugInfo/MIR/InstrRef/survives-livedebugvars.mir b/llvm/test/DebugInfo/MIR/InstrRef/survives-livedebugvars.mir --- a/llvm/test/DebugInfo/MIR/InstrRef/survives-livedebugvars.mir +++ b/llvm/test/DebugInfo/MIR/InstrRef/survives-livedebugvars.mir @@ -41,7 +41,7 @@ # FASTREG-NEXT: JMP_1 # FASTREG-LABEL: bb.4: # FASTREG: DBG_INSTR_REF 5, 0 -# FASTREG-NEXT: RETQ +# FASTREG-NEXT: RET64 --- | ; ModuleID = 'tmp.ll' @@ -137,6 +137,6 @@ bb.4: $eax = COPY %5, debug-location !18 DBG_INSTR_REF 5, 0, !9, !DIExpression(), debug-location !16 - RETQ implicit $eax, debug-location !18 + RET64 implicit $eax, debug-location !18 ... diff --git a/llvm/test/DebugInfo/MIR/InstrRef/x86-fixup-bw-inst-subreb.mir b/llvm/test/DebugInfo/MIR/InstrRef/x86-fixup-bw-inst-subreb.mir --- a/llvm/test/DebugInfo/MIR/InstrRef/x86-fixup-bw-inst-subreb.mir +++ b/llvm/test/DebugInfo/MIR/InstrRef/x86-fixup-bw-inst-subreb.mir @@ -28,7 +28,7 @@ $ax = MOV16rm killed $rax, 1, $noreg, 0, $noreg, debug-instr-number 1 ; CHECK: $eax = MOVZX32rm16 killed $rax, {{.*}} debug-instr-number 2 - RETQ $ax + RET64 $ax ... --- @@ -55,11 +55,11 @@ $ax = MOV16rm killed $rdi, 1, $noreg, 0, $noreg, implicit-def $eax, debug-instr-number 1 ; CHECK: $eax = MOVZX32rm16 killed $rdi, {{.*}} debug-instr-number 2 $ax = KILL $ax, implicit killed $eax - RETQ $ax + RET64 $ax bb.1: $eax = XOR32rr undef $eax, undef $eax, implicit-def dead $eflags $ax = KILL $ax, implicit killed $eax - RETQ $ax + RET64 $ax ... diff --git a/llvm/test/DebugInfo/MIR/InstrRef/x86-lea-fixup-2.mir b/llvm/test/DebugInfo/MIR/InstrRef/x86-lea-fixup-2.mir --- a/llvm/test/DebugInfo/MIR/InstrRef/x86-lea-fixup-2.mir +++ b/llvm/test/DebugInfo/MIR/InstrRef/x86-lea-fixup-2.mir @@ -18,7 +18,7 @@ ; CHECK: $eax = ADD32ri8 {{.*}} debug-instr-number 2 $eax = LEA32r killed $eax, 1, killed $ebp, -5, $noreg, debug-instr-number 1 - RETQ $eax + RET64 $eax ... --- @@ -38,7 +38,7 @@ ; CHECK: $ebx = ADD32rr {{.*}} debug-instr-number 2 $ebx = LEA32r killed $ebp, 1, $ebp, 0, $noreg, debug-instr-number 1 - RETQ $ebx + RET64 $ebx ... --- @@ -57,6 +57,6 @@ ; CHECK: $ebx = ADD32rr {{.*}} debug-instr-number 2 $ebx = LEA32r $ebp, 1, $ebp, 5, $noreg, debug-instr-number 1 - RETQ $ebx + RET64 $ebx ... diff --git a/llvm/test/DebugInfo/MIR/InstrRef/x86-lea-fixup.mir b/llvm/test/DebugInfo/MIR/InstrRef/x86-lea-fixup.mir --- a/llvm/test/DebugInfo/MIR/InstrRef/x86-lea-fixup.mir +++ b/llvm/test/DebugInfo/MIR/InstrRef/x86-lea-fixup.mir @@ -24,7 +24,7 @@ $ebp = LEA64_32r killed $rbp, 1, killed $rax, 0, $noreg, debug-instr-number 1 ; COREI7: ADD32rr {{.*}} debug-instr-number 2 - RETQ $ebp + RET64 $ebp ... --- @@ -51,7 +51,7 @@ renamable $eax = nsw LEA64_32r killed renamable $rdi, 4, renamable $rdi, 2, $noreg, debug-instr-number 2 ; HASWELL: ADD32ri8 {{.*}} debug-instr-number 4 renamable $eax = nsw IMUL32rr killed renamable $eax, killed renamable $ecx, implicit-def dead $eflags - RETQ $eax + RET64 $eax ... --- @@ -72,6 +72,6 @@ renamable $ecx = nsw ADD32rr renamable $ecx, renamable $eax, implicit-def dead $eflags, implicit killed $rax, implicit killed $rcx, implicit-def $rcx, debug-instr-number 1 ; ATOM: LEA64_32r {{.*}} debug-instr-number 2 renamable $eax = MOV32rm killed renamable $rcx, 1, $noreg, 0, $noreg :: (load (s32) from `i32 *undef`) - RETQ $eax + RET64 $eax ... diff --git a/llvm/test/DebugInfo/MIR/X86/backup-entry-values-usage.mir b/llvm/test/DebugInfo/MIR/X86/backup-entry-values-usage.mir --- a/llvm/test/DebugInfo/MIR/X86/backup-entry-values-usage.mir +++ b/llvm/test/DebugInfo/MIR/X86/backup-entry-values-usage.mir @@ -101,6 +101,6 @@ $eax = XOR32rr undef $eax, undef $eax, implicit-def dead $eflags, debug-location !22 $rcx = frame-destroy POP64r implicit-def $rsp, implicit $rsp, debug-location !22 CFI_INSTRUCTION def_cfa_offset 8, debug-location !22 - RETQ killed $eax, debug-location !22 + RET64 killed $eax, debug-location !22 ... diff --git a/llvm/test/DebugInfo/MIR/X86/bit-piece-dh.mir b/llvm/test/DebugInfo/MIR/X86/bit-piece-dh.mir --- a/llvm/test/DebugInfo/MIR/X86/bit-piece-dh.mir +++ b/llvm/test/DebugInfo/MIR/X86/bit-piece-dh.mir @@ -92,6 +92,6 @@ $edi = SHR32ri killed $edi, 8, implicit-def dead $eflags, debug-location !17 $eax = MOVSX32rr8 $dil, implicit killed $edi, debug-location !20 $rbp = POP64r implicit-def $rsp, implicit $rsp, debug-location !20 - RETQ $eax, debug-location !20 + RET64 $eax, debug-location !20 ... diff --git a/llvm/test/DebugInfo/MIR/X86/call-site-gnu-vs-dwarf5-attrs.mir b/llvm/test/DebugInfo/MIR/X86/call-site-gnu-vs-dwarf5-attrs.mir --- a/llvm/test/DebugInfo/MIR/X86/call-site-gnu-vs-dwarf5-attrs.mir +++ b/llvm/test/DebugInfo/MIR/X86/call-site-gnu-vs-dwarf5-attrs.mir @@ -191,7 +191,7 @@ $rbx = frame-destroy POP64r implicit-def $rsp, implicit $rsp, debug-location !33 DBG_VALUE $rdi, $noreg, !23, !DIExpression(DW_OP_LLVM_entry_value, 1), debug-location !25 CFI_INSTRUCTION def_cfa_offset 8, debug-location !33 - RETQ $eax, debug-location !33 + RET64 $eax, debug-location !33 bb.2.if.then: CFI_INSTRUCTION def_cfa_offset 16, debug-location !32 diff --git a/llvm/test/DebugInfo/MIR/X86/clobbered-fragments.mir b/llvm/test/DebugInfo/MIR/X86/clobbered-fragments.mir --- a/llvm/test/DebugInfo/MIR/X86/clobbered-fragments.mir +++ b/llvm/test/DebugInfo/MIR/X86/clobbered-fragments.mir @@ -105,7 +105,7 @@ CALL64pcrel32 @ext2, csr_64, implicit $rsp, implicit $ssp, implicit $edi, implicit killed $esi, implicit-def $rsp, implicit-def $ssp, debug-location !16 $eax = MOV32ri 123, debug-location !17 $rcx = frame-destroy POP64r implicit-def $rsp, implicit $rsp, debug-location !17 - RETQ killed $eax, debug-location !17 + RET64 killed $eax, debug-location !17 ... @@ -135,7 +135,7 @@ CALL64pcrel32 @ext3, csr_64, implicit $rsp, implicit $ssp, implicit killed $edi, implicit $esi, implicit $edx, implicit-def $rsp, implicit-def $ssp, debug-location !20 $eax = MOV32rr killed $ebx, debug-location !20 $rbx = frame-destroy POP64r implicit-def $rsp, implicit $rsp, debug-location !20 - RETQ killed $eax, debug-location !21 + RET64 killed $eax, debug-location !21 ... diff --git a/llvm/test/DebugInfo/MIR/X86/complex-entryvalue.mir b/llvm/test/DebugInfo/MIR/X86/complex-entryvalue.mir --- a/llvm/test/DebugInfo/MIR/X86/complex-entryvalue.mir +++ b/llvm/test/DebugInfo/MIR/X86/complex-entryvalue.mir @@ -48,6 +48,6 @@ frame-setup PUSH64r killed $rbp, implicit-def $rsp, implicit $rsp $rbp = frame-setup MOV64rr $rsp $rbp = frame-destroy POP64r implicit-def $rsp, implicit $rsp, debug-location !16 - RETQ debug-location !16 + RET64 debug-location !16 ... diff --git a/llvm/test/DebugInfo/MIR/X86/dbg-call-site-spilled-arg-multiple-defs.mir b/llvm/test/DebugInfo/MIR/X86/dbg-call-site-spilled-arg-multiple-defs.mir --- a/llvm/test/DebugInfo/MIR/X86/dbg-call-site-spilled-arg-multiple-defs.mir +++ b/llvm/test/DebugInfo/MIR/X86/dbg-call-site-spilled-arg-multiple-defs.mir @@ -132,6 +132,6 @@ CFI_INSTRUCTION def_cfa_offset 16, debug-location !18 $rbp = frame-destroy POP64r implicit-def $rsp, implicit $rsp, debug-location !18 CFI_INSTRUCTION def_cfa_offset 8, debug-location !18 - RETQ debug-location !18 + RET64 debug-location !18 ... diff --git a/llvm/test/DebugInfo/MIR/X86/dbg-call-site-spilled-arg.mir b/llvm/test/DebugInfo/MIR/X86/dbg-call-site-spilled-arg.mir --- a/llvm/test/DebugInfo/MIR/X86/dbg-call-site-spilled-arg.mir +++ b/llvm/test/DebugInfo/MIR/X86/dbg-call-site-spilled-arg.mir @@ -172,6 +172,6 @@ $r14 = frame-destroy POP64r implicit-def $rsp, implicit $rsp, debug-location !20 $r15 = frame-destroy POP64r implicit-def $rsp, implicit $rsp, debug-location !20 $rbp = frame-destroy POP64r implicit-def $rsp, implicit $rsp, debug-location !20 - RETQ debug-location !20 + RET64 debug-location !20 ... diff --git a/llvm/test/DebugInfo/MIR/X86/dbg-stack-value-range.mir b/llvm/test/DebugInfo/MIR/X86/dbg-stack-value-range.mir --- a/llvm/test/DebugInfo/MIR/X86/dbg-stack-value-range.mir +++ b/llvm/test/DebugInfo/MIR/X86/dbg-stack-value-range.mir @@ -177,6 +177,6 @@ $rsp = frame-destroy ADD64ri8 $rsp, 16, implicit-def dead $eflags, debug-location !15 $rbp = frame-destroy POP64r implicit-def $rsp, implicit $rsp, debug-location !15 CFI_INSTRUCTION def_cfa $rsp, 8, debug-location !15 - RETQ $eax, debug-location !15 + RET64 $eax, debug-location !15 ... diff --git a/llvm/test/DebugInfo/MIR/X86/dbgcall-site-copy-super-sub.mir b/llvm/test/DebugInfo/MIR/X86/dbgcall-site-copy-super-sub.mir --- a/llvm/test/DebugInfo/MIR/X86/dbgcall-site-copy-super-sub.mir +++ b/llvm/test/DebugInfo/MIR/X86/dbgcall-site-copy-super-sub.mir @@ -106,7 +106,7 @@ $eax = MOV32rr killed $ebx, debug-location !32 $rbx = frame-destroy POP64r implicit-def $rsp, implicit $rsp, debug-location !32 CFI_INSTRUCTION def_cfa_offset 8, debug-location !32 - RETQ killed $eax, debug-location !32 + RET64 killed $eax, debug-location !32 ... diff --git a/llvm/test/DebugInfo/MIR/X86/dbgcall-site-interpretation.mir b/llvm/test/DebugInfo/MIR/X86/dbgcall-site-interpretation.mir --- a/llvm/test/DebugInfo/MIR/X86/dbgcall-site-interpretation.mir +++ b/llvm/test/DebugInfo/MIR/X86/dbgcall-site-interpretation.mir @@ -199,6 +199,6 @@ $r15 = frame-destroy POP64r implicit-def $rsp, implicit $rsp, debug-location !21 DBG_VALUE $esi, $noreg, !15, !DIExpression(DW_OP_LLVM_entry_value, 1), debug-location !21 CFI_INSTRUCTION def_cfa_offset 8, debug-location !21 - RETQ $eax, debug-location !21 + RET64 $eax, debug-location !21 ... diff --git a/llvm/test/DebugInfo/MIR/X86/dbgcall-site-lea-interpretation.mir b/llvm/test/DebugInfo/MIR/X86/dbgcall-site-lea-interpretation.mir --- a/llvm/test/DebugInfo/MIR/X86/dbgcall-site-lea-interpretation.mir +++ b/llvm/test/DebugInfo/MIR/X86/dbgcall-site-lea-interpretation.mir @@ -135,6 +135,6 @@ CFI_INSTRUCTION def_cfa_offset 16, debug-location !14 $rbx = frame-destroy POP64r implicit-def $rsp, implicit $rsp, debug-location !14 CFI_INSTRUCTION def_cfa_offset 8, debug-location !14 - RETQ $eax, debug-location !14 + RET64 $eax, debug-location !14 ... diff --git a/llvm/test/DebugInfo/MIR/X86/dbgcall-site-partial-describe.mir b/llvm/test/DebugInfo/MIR/X86/dbgcall-site-partial-describe.mir --- a/llvm/test/DebugInfo/MIR/X86/dbgcall-site-partial-describe.mir +++ b/llvm/test/DebugInfo/MIR/X86/dbgcall-site-partial-describe.mir @@ -54,7 +54,7 @@ CALL64pcrel32 @call, csr_64, implicit $rsp, implicit $ssp, implicit killed $edi, implicit undef $esi, implicit-def $rsp, implicit-def $ssp, debug-location !15 $rax = frame-destroy POP64r implicit-def $rsp, implicit $rsp, debug-location !16 CFI_INSTRUCTION def_cfa_offset 8, debug-location !16 - RETQ debug-location !16 + RET64 debug-location !16 ... diff --git a/llvm/test/DebugInfo/MIR/X86/dbgcall-site-reference.mir b/llvm/test/DebugInfo/MIR/X86/dbgcall-site-reference.mir --- a/llvm/test/DebugInfo/MIR/X86/dbgcall-site-reference.mir +++ b/llvm/test/DebugInfo/MIR/X86/dbgcall-site-reference.mir @@ -112,6 +112,6 @@ CALL64pcrel32 @_ZN1CC2E1B, csr_64, implicit $rsp, implicit $ssp, implicit $rdi, implicit $rsi, implicit-def $rsp, implicit-def $ssp, debug-location !36 $rax = frame-destroy POP64r implicit-def $rsp, implicit $rsp, debug-location !36 CFI_INSTRUCTION def_cfa_offset 8, debug-location !36 - RETQ debug-location !36 + RET64 debug-location !36 ... diff --git a/llvm/test/DebugInfo/MIR/X86/dbgcall-site-reg-shuffle.mir b/llvm/test/DebugInfo/MIR/X86/dbgcall-site-reg-shuffle.mir --- a/llvm/test/DebugInfo/MIR/X86/dbgcall-site-reg-shuffle.mir +++ b/llvm/test/DebugInfo/MIR/X86/dbgcall-site-reg-shuffle.mir @@ -74,7 +74,7 @@ CALL64pcrel32 @call2, csr_64, implicit $rsp, implicit $ssp, implicit $edi, implicit $esi, implicit-def $rsp, implicit-def $ssp, debug-location !15 $rax = frame-destroy POP64r implicit-def $rsp, implicit $rsp, debug-location !16 CFI_INSTRUCTION def_cfa_offset 8, debug-location !16 - RETQ debug-location !16 + RET64 debug-location !16 ... diff --git a/llvm/test/DebugInfo/MIR/X86/dbgcall-site-two-fwd-reg-defs.mir b/llvm/test/DebugInfo/MIR/X86/dbgcall-site-two-fwd-reg-defs.mir --- a/llvm/test/DebugInfo/MIR/X86/dbgcall-site-two-fwd-reg-defs.mir +++ b/llvm/test/DebugInfo/MIR/X86/dbgcall-site-two-fwd-reg-defs.mir @@ -88,7 +88,7 @@ renamable $eax = MOV32rm $rip, 1, $noreg, @a, $noreg, debug-location !16 :: (dereferenceable load (s32) from @a) $rbp = frame-destroy POP64r implicit-def $rsp, implicit $rsp, debug-location !16 CFI_INSTRUCTION def_cfa $rsp, 8, debug-location !16 - RETQ $eax, debug-location !16 + RET64 $eax, debug-location !16 ... --- @@ -123,7 +123,7 @@ $rbx = frame-destroy POP64r implicit-def $rsp, implicit $rsp, debug-location !22 $rbp = frame-destroy POP64r implicit-def $rsp, implicit $rsp, debug-location !22 CFI_INSTRUCTION def_cfa $rsp, 8, debug-location !22 - RETQ $eax, debug-location !22 + RET64 $eax, debug-location !22 ... diff --git a/llvm/test/DebugInfo/MIR/X86/debug-call-site-param.mir b/llvm/test/DebugInfo/MIR/X86/debug-call-site-param.mir --- a/llvm/test/DebugInfo/MIR/X86/debug-call-site-param.mir +++ b/llvm/test/DebugInfo/MIR/X86/debug-call-site-param.mir @@ -190,6 +190,6 @@ CFI_INSTRUCTION def_cfa_offset 16, debug-location !24 $r15 = frame-destroy POP64r implicit-def $rsp, implicit $rsp, debug-location !24 CFI_INSTRUCTION def_cfa_offset 8, debug-location !24 - RETQ debug-location !24 + RET64 debug-location !24 ... diff --git a/llvm/test/DebugInfo/MIR/X86/debug-entry-value-operation.mir b/llvm/test/DebugInfo/MIR/X86/debug-entry-value-operation.mir --- a/llvm/test/DebugInfo/MIR/X86/debug-entry-value-operation.mir +++ b/llvm/test/DebugInfo/MIR/X86/debug-entry-value-operation.mir @@ -88,6 +88,6 @@ MOV32mr $rip, 1, $noreg, @global, $noreg, killed renamable $edi, debug-location !18 :: (store (s32) into @global) INLINEASM &"", 1, 12, implicit-def dead early-clobber $edi, 12, implicit-def dead early-clobber $esi, 12, implicit-def dead early-clobber $edx, 12, implicit-def dead early-clobber $df, 12, implicit-def dead early-clobber $fpsw, 12, implicit-def dead early-clobber $eflags, !19, debug-location !18 $eax = MOV32ri 123, debug-location !18 - RETQ killed $eax, debug-location !18 + RET64 killed $eax, debug-location !18 ... diff --git a/llvm/test/DebugInfo/MIR/X86/dvl-livedebugvalues-clobber.mir b/llvm/test/DebugInfo/MIR/X86/dvl-livedebugvalues-clobber.mir --- a/llvm/test/DebugInfo/MIR/X86/dvl-livedebugvalues-clobber.mir +++ b/llvm/test/DebugInfo/MIR/X86/dvl-livedebugvalues-clobber.mir @@ -100,7 +100,7 @@ bb.4: liveins: $rbx, $rsi - RETQ $rbx, debug-location !17 + RET64 $rbx, debug-location !17 ... diff --git a/llvm/test/DebugInfo/MIR/X86/dvl-livedebugvalues-join.mir b/llvm/test/DebugInfo/MIR/X86/dvl-livedebugvalues-join.mir --- a/llvm/test/DebugInfo/MIR/X86/dvl-livedebugvalues-join.mir +++ b/llvm/test/DebugInfo/MIR/X86/dvl-livedebugvalues-join.mir @@ -154,7 +154,7 @@ bb.10: liveins: $rdi, $rsi ; Should _not_ be a live-in loc here. - RETQ + RET64 ... diff --git a/llvm/test/DebugInfo/MIR/X86/dvl-livedebugvalues-movements.mir b/llvm/test/DebugInfo/MIR/X86/dvl-livedebugvalues-movements.mir --- a/llvm/test/DebugInfo/MIR/X86/dvl-livedebugvalues-movements.mir +++ b/llvm/test/DebugInfo/MIR/X86/dvl-livedebugvalues-movements.mir @@ -84,7 +84,7 @@ bb.2: liveins: $rbx, $rbp - RETQ $rbp, debug-location !17 + RET64 $rbp, debug-location !17 ... diff --git a/llvm/test/DebugInfo/MIR/X86/dvl-livedebugvalues-spillrestore.mir b/llvm/test/DebugInfo/MIR/X86/dvl-livedebugvalues-spillrestore.mir --- a/llvm/test/DebugInfo/MIR/X86/dvl-livedebugvalues-spillrestore.mir +++ b/llvm/test/DebugInfo/MIR/X86/dvl-livedebugvalues-spillrestore.mir @@ -72,6 +72,6 @@ $rax = COPY killed $rdi $rdi = MOV64ri 0 $rdi = MOV64rm $rsp, 1, $noreg, -16, $noreg, debug-location !15 :: (load (s64) from %stack.0) - RETQ + RET64 ... diff --git a/llvm/test/DebugInfo/MIR/X86/dvl-livedebugvars-movements.mir b/llvm/test/DebugInfo/MIR/X86/dvl-livedebugvars-movements.mir --- a/llvm/test/DebugInfo/MIR/X86/dvl-livedebugvars-movements.mir +++ b/llvm/test/DebugInfo/MIR/X86/dvl-livedebugvars-movements.mir @@ -105,5 +105,5 @@ CALL64pcrel32 @foo, csr_64, implicit $rsp, implicit $ssp, implicit %3, implicit %5 - RETQ + RET64 ... diff --git a/llvm/test/DebugInfo/MIR/X86/dvl-livedebugvars-stackptr.mir b/llvm/test/DebugInfo/MIR/X86/dvl-livedebugvars-stackptr.mir --- a/llvm/test/DebugInfo/MIR/X86/dvl-livedebugvars-stackptr.mir +++ b/llvm/test/DebugInfo/MIR/X86/dvl-livedebugvars-stackptr.mir @@ -109,5 +109,5 @@ CALL64pcrel32 @foo, csr_64, implicit $rsp, implicit $ssp, implicit %3, implicit %5 - RETQ + RET64 ... diff --git a/llvm/test/DebugInfo/MIR/X86/empty-inline.mir b/llvm/test/DebugInfo/MIR/X86/empty-inline.mir --- a/llvm/test/DebugInfo/MIR/X86/empty-inline.mir +++ b/llvm/test/DebugInfo/MIR/X86/empty-inline.mir @@ -109,13 +109,13 @@ $rax = MOV64rm $rdi, 1, _, 0, _ :: (load (s64) from %ir.6, align 4) $al = MOV8rm killed $rax, 1, _, 0, _ :: (load (s8) from %ir.8) MOV8mr killed $rdi, 1, _, 8, _, killed $al, debug-location !14 :: (store (s8) into %ir.12) - RETQ undef $eax + RET64 undef $eax bb.1: liveins: $rdi $al = IMPLICIT_DEF debug-location !10 MOV8mr killed $rdi, 1, _, 8, _, killed $al, debug-location !14 :: (store (s8) into %ir.12) - RETQ undef $eax + RET64 undef $eax ... diff --git a/llvm/test/DebugInfo/MIR/X86/entry-value-of-modified-param.mir b/llvm/test/DebugInfo/MIR/X86/entry-value-of-modified-param.mir --- a/llvm/test/DebugInfo/MIR/X86/entry-value-of-modified-param.mir +++ b/llvm/test/DebugInfo/MIR/X86/entry-value-of-modified-param.mir @@ -114,6 +114,6 @@ renamable $al = SETCCr 12, implicit killed $eflags, implicit killed $eax, implicit-def $eax, debug-location !23 $rbx = frame-destroy POP64r implicit-def $rsp, implicit $rsp, debug-location !26 CFI_INSTRUCTION def_cfa_offset 8, debug-location !26 - RETQ $eax, debug-location !26 + RET64 $eax, debug-location !26 ... diff --git a/llvm/test/DebugInfo/MIR/X86/entry-values-diamond-bbs.mir b/llvm/test/DebugInfo/MIR/X86/entry-values-diamond-bbs.mir --- a/llvm/test/DebugInfo/MIR/X86/entry-values-diamond-bbs.mir +++ b/llvm/test/DebugInfo/MIR/X86/entry-values-diamond-bbs.mir @@ -178,6 +178,6 @@ CFI_INSTRUCTION def_cfa_offset 16, debug-location !34 $rbp = frame-destroy POP64r implicit-def $rsp, implicit $rsp, debug-location !34 CFI_INSTRUCTION def_cfa_offset 8, debug-location !34 - RETQ killed $eax, debug-location !34 + RET64 killed $eax, debug-location !34 ... diff --git a/llvm/test/DebugInfo/MIR/X86/kill-after-spill.mir b/llvm/test/DebugInfo/MIR/X86/kill-after-spill.mir --- a/llvm/test/DebugInfo/MIR/X86/kill-after-spill.mir +++ b/llvm/test/DebugInfo/MIR/X86/kill-after-spill.mir @@ -382,6 +382,6 @@ $r14 = POP64r implicit-def $rsp, implicit $rsp $r15 = POP64r implicit-def $rsp, implicit $rsp $rbp = POP64r implicit-def $rsp, implicit $rsp - RETQ $eax, debug-location !57 + RET64 $eax, debug-location !57 ... diff --git a/llvm/test/DebugInfo/MIR/X86/kill-entry-value-after-diamond-bbs.mir b/llvm/test/DebugInfo/MIR/X86/kill-entry-value-after-diamond-bbs.mir --- a/llvm/test/DebugInfo/MIR/X86/kill-entry-value-after-diamond-bbs.mir +++ b/llvm/test/DebugInfo/MIR/X86/kill-entry-value-after-diamond-bbs.mir @@ -180,7 +180,7 @@ CFI_INSTRUCTION def_cfa_offset 16, debug-location !34 $rbp = frame-destroy POP64r implicit-def $rsp, implicit $rsp, debug-location !34 CFI_INSTRUCTION def_cfa_offset 8, debug-location !34 - RETQ killed $eax, debug-location !34 + RET64 killed $eax, debug-location !34 ... diff --git a/llvm/test/DebugInfo/MIR/X86/live-debug-values-3preds.mir b/llvm/test/DebugInfo/MIR/X86/live-debug-values-3preds.mir --- a/llvm/test/DebugInfo/MIR/X86/live-debug-values-3preds.mir +++ b/llvm/test/DebugInfo/MIR/X86/live-debug-values-3preds.mir @@ -267,7 +267,7 @@ $ecx = IMUL32rr killed $ecx, killed $edi, implicit-def dead $eflags, debug-location !36 DBG_VALUE 0, 0, !13, !17, debug-location !25 $eax = MOV32rr killed $ecx, debug-location !50 - RETQ $eax, debug-location !50 + RET64 $eax, debug-location !50 bb.6.if.then.4: liveins: $ecx, $esi @@ -278,7 +278,7 @@ $ecx = IMUL32rr killed $ecx, killed $esi, implicit-def dead $eflags, debug-location !40 DBG_VALUE 0, 0, !13, !17, debug-location !25 $eax = MOV32rr killed $ecx, debug-location !50 - RETQ $eax, debug-location !50 + RET64 $eax, debug-location !50 bb.8.if.then.8: successors: %bb.9.for.end(0) @@ -294,6 +294,6 @@ DBG_VALUE 0, 0, !13, !17, debug-location !25 $eax = MOV32rr killed $ecx, debug-location !50 - RETQ $eax, debug-location !50 + RET64 $eax, debug-location !50 ... diff --git a/llvm/test/DebugInfo/MIR/X86/live-debug-values-bad-transfer.mir b/llvm/test/DebugInfo/MIR/X86/live-debug-values-bad-transfer.mir --- a/llvm/test/DebugInfo/MIR/X86/live-debug-values-bad-transfer.mir +++ b/llvm/test/DebugInfo/MIR/X86/live-debug-values-bad-transfer.mir @@ -106,6 +106,6 @@ $eax = MOV32rr killed $ebx, debug-location !10 $rbx = frame-destroy POP64r implicit-def $rsp, implicit $rsp CFI_INSTRUCTION def_cfa_offset 8 - RETQ $eax, debug-location !10 + RET64 $eax, debug-location !10 ... diff --git a/llvm/test/DebugInfo/MIR/X86/live-debug-values-cutoffs.mir b/llvm/test/DebugInfo/MIR/X86/live-debug-values-cutoffs.mir --- a/llvm/test/DebugInfo/MIR/X86/live-debug-values-cutoffs.mir +++ b/llvm/test/DebugInfo/MIR/X86/live-debug-values-cutoffs.mir @@ -114,6 +114,6 @@ CALL64pcrel32 @use, csr_64, implicit $rsp, implicit $ssp, implicit killed $edi, implicit-def $eax, debug-location !14 DBG_VALUE renamable $eax, $noreg, !11, !DIExpression(), debug-location !14 $rcx = frame-destroy POP64r implicit-def $rsp, implicit $rsp, debug-location !15 - RETQ implicit killed $eax, debug-location !15 + RET64 implicit killed $eax, debug-location !15 ... diff --git a/llvm/test/DebugInfo/MIR/X86/live-debug-values-entry-transfer.mir b/llvm/test/DebugInfo/MIR/X86/live-debug-values-entry-transfer.mir --- a/llvm/test/DebugInfo/MIR/X86/live-debug-values-entry-transfer.mir +++ b/llvm/test/DebugInfo/MIR/X86/live-debug-values-entry-transfer.mir @@ -118,6 +118,6 @@ $eax = MOV32rr killed $ebx $rbx = frame-destroy POP64r implicit-def $rsp, implicit $rsp CFI_INSTRUCTION def_cfa_offset 8 - RETQ $eax + RET64 $eax ... diff --git a/llvm/test/DebugInfo/MIR/X86/live-debug-values-fragments.mir b/llvm/test/DebugInfo/MIR/X86/live-debug-values-fragments.mir --- a/llvm/test/DebugInfo/MIR/X86/live-debug-values-fragments.mir +++ b/llvm/test/DebugInfo/MIR/X86/live-debug-values-fragments.mir @@ -20,7 +20,7 @@ # CHECK-NEXT: DBG_VALUE $eax, $noreg, !{{[0-9]+}}, # CHECK-SAME: !DIExpression(DW_OP_LLVM_fragment, 0, 32) # CHECK-NEXT: XOR32rr -# CHECK-NEXT: RETQ +# CHECK-NEXT: RET64 # # CHECK-LABEL: bar # CHECK-LABEL: bb.0.entry: @@ -51,7 +51,7 @@ # CHECK-NEXT: DBG_VALUE $ax, $noreg, !{{[0-9]+}}, # CHECK-SAME: !DIExpression(DW_OP_LLVM_fragment, 8, 16) # CHECK-NEXT: XOR32rr -# CHECK-NEXT: RETQ +# CHECK-NEXT: RET64 # CHECK-LABEL: baz # CHECK-LABEL: bb.0.entry: @@ -81,7 +81,7 @@ # CHECK: DBG_VALUE $ebx, $noreg, !{{[0-9]+}}, # CHECK-SAME: !DIExpression(DW_OP_LLVM_fragment, 32, 32) # CHECK-NEXT: XOR32rr -# CHECK-NEXT: RETQ +# CHECK-NEXT: RET64 --- | target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128" @@ -178,7 +178,7 @@ bb.3.bb3: liveins: $eax, $ebx $eax = XOR32rr killed $eax, killed $ebx, implicit-def $eflags - RETQ $eax, debug-location !8 + RET64 $eax, debug-location !8 ... --- @@ -216,7 +216,7 @@ bb.3.bb3: liveins: $eax, $ebx $eax = XOR32rr killed $eax, killed $ebx, implicit-def $eflags - RETQ $eax, debug-location !48 + RET64 $eax, debug-location !48 ... --- @@ -254,6 +254,6 @@ bb.3.bb3: liveins: $eax, $ebx $eax = XOR32rr killed $eax, killed $ebx, implicit-def $eflags - RETQ $eax, debug-location !88 + RET64 $eax, debug-location !88 ... diff --git a/llvm/test/DebugInfo/MIR/X86/live-debug-values-restore-collide.mir b/llvm/test/DebugInfo/MIR/X86/live-debug-values-restore-collide.mir --- a/llvm/test/DebugInfo/MIR/X86/live-debug-values-restore-collide.mir +++ b/llvm/test/DebugInfo/MIR/X86/live-debug-values-restore-collide.mir @@ -81,5 +81,5 @@ ; Return faff $eax = MOV32ri 0 $rsp = frame-destroy ADD64ri8 $rsp, 24, implicit-def dead $eflags - RETQ debug-location !10 + RET64 debug-location !10 ... diff --git a/llvm/test/DebugInfo/MIR/X86/live-debug-values-restore.mir b/llvm/test/DebugInfo/MIR/X86/live-debug-values-restore.mir --- a/llvm/test/DebugInfo/MIR/X86/live-debug-values-restore.mir +++ b/llvm/test/DebugInfo/MIR/X86/live-debug-values-restore.mir @@ -326,7 +326,7 @@ liveins: $rdi, $rbx, $r12, $r13, $r14, $r15, $rbp renamable $eax = MOV32rm killed renamable $rdi, 1, $noreg, 4, $noreg, debug-location !23 :: (load (s32) from %ir.add.ptr, !tbaa !24) - RETQ $eax, debug-location !28 + RET64 $eax, debug-location !28 ... --- @@ -401,7 +401,7 @@ renamable $eax = MOV32rm killed renamable $rsi, 1, $noreg, 4, $noreg, debug-location !123 :: (load (s32) from %ir.add.ptr, !tbaa !24) $rdi = MOV64ri 0 - RETQ $eax, debug-location !128 + RET64 $eax, debug-location !128 ... --- @@ -507,7 +507,7 @@ liveins: $rdi, $rbx, $r12, $r13, $r14, $r15, $rbp renamable $eax = MOV32rm killed renamable $rdi, 1, $noreg, 4, $noreg, debug-location !223 :: (load (s32) from %ir.add.ptr, !tbaa !24) - RETQ $eax, debug-location !228 + RET64 $eax, debug-location !228 @@ -628,7 +628,7 @@ renamable $rdi = MOV64rm $rsp, 1, $noreg, -8, $noreg :: (load (s64) from %stack.0) renamable $eax = MOV32rm killed renamable $rdi, 1, $noreg, 4, $noreg, debug-location !323 :: (load (s32) from %ir.add.ptr, !tbaa !24) - RETQ $eax, debug-location !328 + RET64 $eax, debug-location !328 ... --- @@ -731,6 +731,6 @@ liveins: $rdi, $rbx, $r12, $r13, $r14, $r15, $rbp renamable $eax = MOV32rm killed renamable $rdi, 1, $noreg, 4, $noreg, debug-location !414 :: (load (s32) from %ir.add.ptr, !tbaa !24) - RETQ $eax, debug-location !415 + RET64 $eax, debug-location !415 ... diff --git a/llvm/test/DebugInfo/MIR/X86/live-debug-values-spill.mir b/llvm/test/DebugInfo/MIR/X86/live-debug-values-spill.mir --- a/llvm/test/DebugInfo/MIR/X86/live-debug-values-spill.mir +++ b/llvm/test/DebugInfo/MIR/X86/live-debug-values-spill.mir @@ -467,6 +467,6 @@ $r14 = POP64r implicit-def $rsp, implicit $rsp, debug-location !90 $r15 = POP64r implicit-def $rsp, implicit $rsp, debug-location !90 $rbp = POP64r implicit-def $rsp, implicit $rsp, debug-location !90 - RETQ debug-location !90 + RET64 debug-location !90 ... diff --git a/llvm/test/DebugInfo/MIR/X86/live-debug-values-stack-clobber.mir b/llvm/test/DebugInfo/MIR/X86/live-debug-values-stack-clobber.mir --- a/llvm/test/DebugInfo/MIR/X86/live-debug-values-stack-clobber.mir +++ b/llvm/test/DebugInfo/MIR/X86/live-debug-values-stack-clobber.mir @@ -195,6 +195,6 @@ $r14 = frame-destroy POP64r implicit-def $rsp, implicit $rsp, debug-location !28 $r15 = frame-destroy POP64r implicit-def $rsp, implicit $rsp, debug-location !28 $rbp = frame-destroy POP64r implicit-def $rsp, implicit $rsp, debug-location !28 - RETQ $rax, debug-location !28 + RET64 $rax, debug-location !28 ... diff --git a/llvm/test/DebugInfo/MIR/X86/live-debug-values.mir b/llvm/test/DebugInfo/MIR/X86/live-debug-values.mir --- a/llvm/test/DebugInfo/MIR/X86/live-debug-values.mir +++ b/llvm/test/DebugInfo/MIR/X86/live-debug-values.mir @@ -252,6 +252,6 @@ CALL64pcrel32 @printf, csr_64, implicit $rsp, implicit $rdi, implicit $esi, implicit $al, implicit-def $rsp, implicit-def dead $eax, debug-location !46 $eax = XOR32rr undef $eax, undef $eax, implicit-def dead $eflags, debug-location !47 $rbx = POP64r implicit-def $rsp, implicit $rsp, debug-location !47 - RETQ $eax, debug-location !47 + RET64 $eax, debug-location !47 ... diff --git a/llvm/test/DebugInfo/MIR/X86/livedebugvalues-ignores-metaInstructions.mir b/llvm/test/DebugInfo/MIR/X86/livedebugvalues-ignores-metaInstructions.mir --- a/llvm/test/DebugInfo/MIR/X86/livedebugvalues-ignores-metaInstructions.mir +++ b/llvm/test/DebugInfo/MIR/X86/livedebugvalues-ignores-metaInstructions.mir @@ -60,5 +60,5 @@ successors: %bb.3 renamable $ebx = KILL $ebx bb.3.bb3: - RETQ $eax, debug-location !17 + RET64 $eax, debug-location !17 ... diff --git a/llvm/test/DebugInfo/MIR/X86/livedebugvalues_basic_diamond.mir b/llvm/test/DebugInfo/MIR/X86/livedebugvalues_basic_diamond.mir --- a/llvm/test/DebugInfo/MIR/X86/livedebugvalues_basic_diamond.mir +++ b/llvm/test/DebugInfo/MIR/X86/livedebugvalues_basic_diamond.mir @@ -63,5 +63,5 @@ successors: %bb.3 $eax = MOV32ri 0, debug-location !17 bb.3.bb3: - RETQ $eax, debug-location !17 + RET64 $eax, debug-location !17 ... diff --git a/llvm/test/DebugInfo/MIR/X86/livedebugvalues_basic_diamond_match_clobber.mir b/llvm/test/DebugInfo/MIR/X86/livedebugvalues_basic_diamond_match_clobber.mir --- a/llvm/test/DebugInfo/MIR/X86/livedebugvalues_basic_diamond_match_clobber.mir +++ b/llvm/test/DebugInfo/MIR/X86/livedebugvalues_basic_diamond_match_clobber.mir @@ -63,5 +63,5 @@ successors: %bb.3 $ebx = MOV32ri 0, debug-location !17 bb.3.bb3: - RETQ $eax, debug-location !17 + RET64 $eax, debug-location !17 ... diff --git a/llvm/test/DebugInfo/MIR/X86/livedebugvalues_basic_diamond_match_move.mir b/llvm/test/DebugInfo/MIR/X86/livedebugvalues_basic_diamond_match_move.mir --- a/llvm/test/DebugInfo/MIR/X86/livedebugvalues_basic_diamond_match_move.mir +++ b/llvm/test/DebugInfo/MIR/X86/livedebugvalues_basic_diamond_match_move.mir @@ -69,5 +69,5 @@ $eax = MOV32ri 0, debug-location !17 DBG_VALUE $eax, $noreg, !16, !DIExpression(), debug-location !17 bb.3.bb3: - RETQ $eax, debug-location !17 + RET64 $eax, debug-location !17 ... diff --git a/llvm/test/DebugInfo/MIR/X86/livedebugvalues_basic_diamond_one_clobber.mir b/llvm/test/DebugInfo/MIR/X86/livedebugvalues_basic_diamond_one_clobber.mir --- a/llvm/test/DebugInfo/MIR/X86/livedebugvalues_basic_diamond_one_clobber.mir +++ b/llvm/test/DebugInfo/MIR/X86/livedebugvalues_basic_diamond_one_clobber.mir @@ -61,5 +61,5 @@ successors: %bb.3 $eax = MOV32ri 0, debug-location !17 bb.3.bb3: - RETQ $eax, debug-location !17 + RET64 $eax, debug-location !17 ... diff --git a/llvm/test/DebugInfo/MIR/X86/livedebugvalues_basic_diamond_one_move.mir b/llvm/test/DebugInfo/MIR/X86/livedebugvalues_basic_diamond_one_move.mir --- a/llvm/test/DebugInfo/MIR/X86/livedebugvalues_basic_diamond_one_move.mir +++ b/llvm/test/DebugInfo/MIR/X86/livedebugvalues_basic_diamond_one_move.mir @@ -64,5 +64,5 @@ successors: %bb.3 $eax = MOV32ri 0, debug-location !17 bb.3.bb3: - RETQ $eax, debug-location !17 + RET64 $eax, debug-location !17 ... diff --git a/llvm/test/DebugInfo/MIR/X86/livedebugvalues_basic_loop.mir b/llvm/test/DebugInfo/MIR/X86/livedebugvalues_basic_loop.mir --- a/llvm/test/DebugInfo/MIR/X86/livedebugvalues_basic_loop.mir +++ b/llvm/test/DebugInfo/MIR/X86/livedebugvalues_basic_loop.mir @@ -62,5 +62,5 @@ $eax = MOV32ri 0, debug-location !17 JCC_1 %bb.1, 4, implicit killed $eflags bb.3.bb3: - RETQ $eax, debug-location !17 + RET64 $eax, debug-location !17 ... diff --git a/llvm/test/DebugInfo/MIR/X86/livedebugvalues_bb_to_bb.mir b/llvm/test/DebugInfo/MIR/X86/livedebugvalues_bb_to_bb.mir --- a/llvm/test/DebugInfo/MIR/X86/livedebugvalues_bb_to_bb.mir +++ b/llvm/test/DebugInfo/MIR/X86/livedebugvalues_bb_to_bb.mir @@ -61,5 +61,5 @@ successors: %bb.3 $eax = MOV32ri 0, debug-location !17 bb.3.bb3: - RETQ $eax, debug-location !17 + RET64 $eax, debug-location !17 ... diff --git a/llvm/test/DebugInfo/MIR/X86/livedebugvalues_bb_to_bb_clobbered.mir b/llvm/test/DebugInfo/MIR/X86/livedebugvalues_bb_to_bb_clobbered.mir --- a/llvm/test/DebugInfo/MIR/X86/livedebugvalues_bb_to_bb_clobbered.mir +++ b/llvm/test/DebugInfo/MIR/X86/livedebugvalues_bb_to_bb_clobbered.mir @@ -57,5 +57,5 @@ successors: %bb.3 $eax = MOV32ri 0, debug-location !17 bb.3.bb3: - RETQ $eax, debug-location !17 + RET64 $eax, debug-location !17 ... diff --git a/llvm/test/DebugInfo/MIR/X86/livedebugvalues_bb_to_bb_move_to_clobber.mir b/llvm/test/DebugInfo/MIR/X86/livedebugvalues_bb_to_bb_move_to_clobber.mir --- a/llvm/test/DebugInfo/MIR/X86/livedebugvalues_bb_to_bb_move_to_clobber.mir +++ b/llvm/test/DebugInfo/MIR/X86/livedebugvalues_bb_to_bb_move_to_clobber.mir @@ -64,5 +64,5 @@ successors: %bb.3 $eax = MOV32ri 0, debug-location !17 bb.3.bb3: - RETQ $eax, debug-location !17 + RET64 $eax, debug-location !17 ... diff --git a/llvm/test/DebugInfo/MIR/X86/livedebugvalues_load_in_loop.mir b/llvm/test/DebugInfo/MIR/X86/livedebugvalues_load_in_loop.mir --- a/llvm/test/DebugInfo/MIR/X86/livedebugvalues_load_in_loop.mir +++ b/llvm/test/DebugInfo/MIR/X86/livedebugvalues_load_in_loop.mir @@ -109,5 +109,5 @@ liveins: $rax, $rbp bb.6: liveins: $rax, $rbp - RETQ $rax, debug-location !17 + RET64 $rax, debug-location !17 ... diff --git a/llvm/test/DebugInfo/MIR/X86/livedebugvalues_loop_break.mir b/llvm/test/DebugInfo/MIR/X86/livedebugvalues_loop_break.mir --- a/llvm/test/DebugInfo/MIR/X86/livedebugvalues_loop_break.mir +++ b/llvm/test/DebugInfo/MIR/X86/livedebugvalues_loop_break.mir @@ -70,5 +70,5 @@ $eax = MOV32ri 0, debug-location !17 JCC_1 %bb.1, 4, implicit killed $eflags bb.4.bb4: - RETQ $eax, debug-location !17 + RET64 $eax, debug-location !17 ... diff --git a/llvm/test/DebugInfo/MIR/X86/livedebugvalues_loop_break_clobbered.mir b/llvm/test/DebugInfo/MIR/X86/livedebugvalues_loop_break_clobbered.mir --- a/llvm/test/DebugInfo/MIR/X86/livedebugvalues_loop_break_clobbered.mir +++ b/llvm/test/DebugInfo/MIR/X86/livedebugvalues_loop_break_clobbered.mir @@ -62,5 +62,5 @@ $eax = MOV32ri 0, debug-location !17 JCC_1 %bb.1, 4, implicit killed $eflags bb.4.bb4: - RETQ $eax, debug-location !17 + RET64 $eax, debug-location !17 ... diff --git a/llvm/test/DebugInfo/MIR/X86/livedebugvalues_loop_clobbered.mir b/llvm/test/DebugInfo/MIR/X86/livedebugvalues_loop_clobbered.mir --- a/llvm/test/DebugInfo/MIR/X86/livedebugvalues_loop_clobbered.mir +++ b/llvm/test/DebugInfo/MIR/X86/livedebugvalues_loop_clobbered.mir @@ -59,5 +59,5 @@ JCC_1 %bb.1, 4, implicit killed $eflags bb.3.bb3: - RETQ $eax, debug-location !17 + RET64 $eax, debug-location !17 ... diff --git a/llvm/test/DebugInfo/MIR/X86/livedebugvalues_loop_diamond.mir b/llvm/test/DebugInfo/MIR/X86/livedebugvalues_loop_diamond.mir --- a/llvm/test/DebugInfo/MIR/X86/livedebugvalues_loop_diamond.mir +++ b/llvm/test/DebugInfo/MIR/X86/livedebugvalues_loop_diamond.mir @@ -78,5 +78,5 @@ $eax = MOV32ri 0, debug-location !17 JCC_1 %bb.1, 4, implicit killed $eflags bb.5.bb5: - RETQ $eax, debug-location !17 + RET64 $eax, debug-location !17 ... diff --git a/llvm/test/DebugInfo/MIR/X86/livedebugvalues_loop_diamond_clobber.mir b/llvm/test/DebugInfo/MIR/X86/livedebugvalues_loop_diamond_clobber.mir --- a/llvm/test/DebugInfo/MIR/X86/livedebugvalues_loop_diamond_clobber.mir +++ b/llvm/test/DebugInfo/MIR/X86/livedebugvalues_loop_diamond_clobber.mir @@ -69,5 +69,5 @@ $eax = MOV32ri 0, debug-location !17 JCC_1 %bb.1, 4, implicit killed $eflags bb.5.bb5: - RETQ $eax, debug-location !17 + RET64 $eax, debug-location !17 ... diff --git a/llvm/test/DebugInfo/MIR/X86/livedebugvalues_loop_diamond_move.mir b/llvm/test/DebugInfo/MIR/X86/livedebugvalues_loop_diamond_move.mir --- a/llvm/test/DebugInfo/MIR/X86/livedebugvalues_loop_diamond_move.mir +++ b/llvm/test/DebugInfo/MIR/X86/livedebugvalues_loop_diamond_move.mir @@ -79,5 +79,5 @@ $ebx = MOV32ri 0, debug-location !17 JCC_1 %bb.1, 4, implicit killed $eflags bb.5.bb5: - RETQ $eax, debug-location !17 + RET64 $eax, debug-location !17 ... diff --git a/llvm/test/DebugInfo/MIR/X86/livedebugvalues_loop_early_clobber.mir b/llvm/test/DebugInfo/MIR/X86/livedebugvalues_loop_early_clobber.mir --- a/llvm/test/DebugInfo/MIR/X86/livedebugvalues_loop_early_clobber.mir +++ b/llvm/test/DebugInfo/MIR/X86/livedebugvalues_loop_early_clobber.mir @@ -56,5 +56,5 @@ $eax = MOV32ri 0, debug-location !17 JCC_1 %bb.1, 4, implicit killed $eflags bb.3.bb3: - RETQ $eax, debug-location !17 + RET64 $eax, debug-location !17 ... diff --git a/llvm/test/DebugInfo/MIR/X86/livedebugvalues_loop_terminated.mir b/llvm/test/DebugInfo/MIR/X86/livedebugvalues_loop_terminated.mir --- a/llvm/test/DebugInfo/MIR/X86/livedebugvalues_loop_terminated.mir +++ b/llvm/test/DebugInfo/MIR/X86/livedebugvalues_loop_terminated.mir @@ -63,5 +63,5 @@ JCC_1 %bb.1, 4, implicit killed $eflags bb.3.bb3: - RETQ $eax, debug-location !17 + RET64 $eax, debug-location !17 ... diff --git a/llvm/test/DebugInfo/MIR/X86/livedebugvalues_loop_two_backedge.mir b/llvm/test/DebugInfo/MIR/X86/livedebugvalues_loop_two_backedge.mir --- a/llvm/test/DebugInfo/MIR/X86/livedebugvalues_loop_two_backedge.mir +++ b/llvm/test/DebugInfo/MIR/X86/livedebugvalues_loop_two_backedge.mir @@ -70,5 +70,5 @@ $eax = MOV32ri 0, debug-location !17 JCC_1 %bb.1, 4, implicit killed $eflags bb.4.bb4: - RETQ $eax, debug-location !17 + RET64 $eax, debug-location !17 ... diff --git a/llvm/test/DebugInfo/MIR/X86/livedebugvalues_loop_two_backedge_clobbered.mir b/llvm/test/DebugInfo/MIR/X86/livedebugvalues_loop_two_backedge_clobbered.mir --- a/llvm/test/DebugInfo/MIR/X86/livedebugvalues_loop_two_backedge_clobbered.mir +++ b/llvm/test/DebugInfo/MIR/X86/livedebugvalues_loop_two_backedge_clobbered.mir @@ -62,5 +62,5 @@ $eax = MOV32ri 0, debug-location !17 JCC_1 %bb.1, 4, implicit killed $eflags bb.4.bb4: - RETQ $eax, debug-location !17 + RET64 $eax, debug-location !17 ... diff --git a/llvm/test/DebugInfo/MIR/X86/livedebugvalues_loop_within_loop.mir b/llvm/test/DebugInfo/MIR/X86/livedebugvalues_loop_within_loop.mir --- a/llvm/test/DebugInfo/MIR/X86/livedebugvalues_loop_within_loop.mir +++ b/llvm/test/DebugInfo/MIR/X86/livedebugvalues_loop_within_loop.mir @@ -77,5 +77,5 @@ $eax = MOV32ri 0, debug-location !17 JCC_1 %bb.1, 4, implicit killed $eflags bb.5.bb5: - RETQ $eax, debug-location !17 + RET64 $eax, debug-location !17 ... diff --git a/llvm/test/DebugInfo/MIR/X86/livedebugvalues_loop_within_loop_clobbered.mir b/llvm/test/DebugInfo/MIR/X86/livedebugvalues_loop_within_loop_clobbered.mir --- a/llvm/test/DebugInfo/MIR/X86/livedebugvalues_loop_within_loop_clobbered.mir +++ b/llvm/test/DebugInfo/MIR/X86/livedebugvalues_loop_within_loop_clobbered.mir @@ -68,5 +68,5 @@ $eax = MOV32ri 0, debug-location !17 JCC_1 %bb.1, 4, implicit killed $eflags bb.5.bb5: - RETQ $eax, debug-location !17 + RET64 $eax, debug-location !17 ... diff --git a/llvm/test/DebugInfo/MIR/X86/livedebugvalues_loop_within_loop_moved.mir b/llvm/test/DebugInfo/MIR/X86/livedebugvalues_loop_within_loop_moved.mir --- a/llvm/test/DebugInfo/MIR/X86/livedebugvalues_loop_within_loop_moved.mir +++ b/llvm/test/DebugInfo/MIR/X86/livedebugvalues_loop_within_loop_moved.mir @@ -71,5 +71,5 @@ $eax = MOV32ri 0, debug-location !17 JCC_1 %bb.1, 4, implicit killed $eflags bb.5.bb5: - RETQ $eax, debug-location !17 + RET64 $eax, debug-location !17 ... diff --git a/llvm/test/DebugInfo/MIR/X86/livedebugvalues_loop_within_loop_outer_moved.mir b/llvm/test/DebugInfo/MIR/X86/livedebugvalues_loop_within_loop_outer_moved.mir --- a/llvm/test/DebugInfo/MIR/X86/livedebugvalues_loop_within_loop_outer_moved.mir +++ b/llvm/test/DebugInfo/MIR/X86/livedebugvalues_loop_within_loop_outer_moved.mir @@ -73,5 +73,5 @@ DBG_VALUE $eax, $noreg, !16, !DIExpression(), debug-location !17 JCC_1 %bb.1, 4, implicit killed $eflags bb.5.bb5: - RETQ $eax, debug-location !17 + RET64 $eax, debug-location !17 ... diff --git a/llvm/test/DebugInfo/MIR/X86/livedebugvalues_many_loop_heads.mir b/llvm/test/DebugInfo/MIR/X86/livedebugvalues_many_loop_heads.mir --- a/llvm/test/DebugInfo/MIR/X86/livedebugvalues_many_loop_heads.mir +++ b/llvm/test/DebugInfo/MIR/X86/livedebugvalues_many_loop_heads.mir @@ -191,6 +191,6 @@ bb.18: liveins: $rsi, $rdi, $eflags - RETQ + RET64 ... diff --git a/llvm/test/DebugInfo/MIR/X86/livedebugvars-crossbb-interval.mir b/llvm/test/DebugInfo/MIR/X86/livedebugvars-crossbb-interval.mir --- a/llvm/test/DebugInfo/MIR/X86/livedebugvars-crossbb-interval.mir +++ b/llvm/test/DebugInfo/MIR/X86/livedebugvars-crossbb-interval.mir @@ -133,6 +133,6 @@ bb.4.exit: $eax = COPY %5, debug-location !18 - RETQ implicit $eax, debug-location !18 + RET64 implicit $eax, debug-location !18 ... diff --git a/llvm/test/DebugInfo/MIR/X86/multiple-param-dbg-value-entry.mir b/llvm/test/DebugInfo/MIR/X86/multiple-param-dbg-value-entry.mir --- a/llvm/test/DebugInfo/MIR/X86/multiple-param-dbg-value-entry.mir +++ b/llvm/test/DebugInfo/MIR/X86/multiple-param-dbg-value-entry.mir @@ -80,6 +80,6 @@ MOV32mr $rip, 1, $noreg, @global, $noreg, killed renamable $edi, debug-location !18 :: (store (s32) into @global) INLINEASM &"", 1, 12, implicit-def dead early-clobber $edi, 12, implicit-def dead early-clobber $esi, 12, implicit-def dead early-clobber $edx, 12, implicit-def dead early-clobber $df, 12, implicit-def dead early-clobber $fpsw, 12, implicit-def dead early-clobber $eflags, !19, debug-location !18 $eax = MOV32ri 123, debug-location !18 - RETQ killed $eax, debug-location !18 + RET64 killed $eax, debug-location !18 ... diff --git a/llvm/test/DebugInfo/MIR/X86/piece-entryval.mir b/llvm/test/DebugInfo/MIR/X86/piece-entryval.mir --- a/llvm/test/DebugInfo/MIR/X86/piece-entryval.mir +++ b/llvm/test/DebugInfo/MIR/X86/piece-entryval.mir @@ -49,6 +49,6 @@ frame-setup PUSH64r killed $rbp, implicit-def $rsp, implicit $rsp $rbp = frame-setup MOV64rr $rsp $rbp = frame-destroy POP64r implicit-def $rsp, implicit $rsp, debug-location !16 - RETQ debug-location !16 + RET64 debug-location !16 ... diff --git a/llvm/test/DebugInfo/MIR/X86/propagate-entry-value-cross-bbs.mir b/llvm/test/DebugInfo/MIR/X86/propagate-entry-value-cross-bbs.mir --- a/llvm/test/DebugInfo/MIR/X86/propagate-entry-value-cross-bbs.mir +++ b/llvm/test/DebugInfo/MIR/X86/propagate-entry-value-cross-bbs.mir @@ -171,6 +171,6 @@ CFI_INSTRUCTION def_cfa_offset 16, debug-location !34 $rbp = frame-destroy POP64r implicit-def $rsp, implicit $rsp, debug-location !34 CFI_INSTRUCTION def_cfa_offset 8, debug-location !34 - RETQ killed $eax, debug-location !34 + RET64 killed $eax, debug-location !34 ... diff --git a/llvm/test/DebugInfo/MIR/X86/remove-entry-value-from-loop.mir b/llvm/test/DebugInfo/MIR/X86/remove-entry-value-from-loop.mir --- a/llvm/test/DebugInfo/MIR/X86/remove-entry-value-from-loop.mir +++ b/llvm/test/DebugInfo/MIR/X86/remove-entry-value-from-loop.mir @@ -154,7 +154,7 @@ liveins: $eax DBG_VALUE $eax, $noreg, !15, !DIExpression(), debug-location !17 - RETQ $eax, debug-location !32 + RET64 $eax, debug-location !32 bb.3.if.then: liveins: $eax, $edi @@ -162,6 +162,6 @@ renamable $eax = nsw IMUL32rr killed renamable $eax, killed renamable $edi, implicit-def dead $eflags, debug-location !28 DBG_VALUE $eax, $noreg, !15, !DIExpression(), debug-location !17 DBG_VALUE $eax, $noreg, !15, !DIExpression(), debug-location !17 - RETQ $eax, debug-location !32 + RET64 $eax, debug-location !32 ... diff --git a/llvm/test/DebugInfo/MIR/X86/remove-redundant-dbg-vals.mir b/llvm/test/DebugInfo/MIR/X86/remove-redundant-dbg-vals.mir --- a/llvm/test/DebugInfo/MIR/X86/remove-redundant-dbg-vals.mir +++ b/llvm/test/DebugInfo/MIR/X86/remove-redundant-dbg-vals.mir @@ -169,7 +169,7 @@ $eax = XOR32rr undef $eax, undef $eax, implicit-def dead $eflags, debug-location !22 $rcx = frame-destroy POP64r implicit-def $rsp, implicit $rsp, debug-location !22 CFI_INSTRUCTION def_cfa_offset 8, debug-location !22 - RETQ killed $eax, debug-location !22 + RET64 killed $eax, debug-location !22 ... --- @@ -192,7 +192,7 @@ $eax = XOR32rr undef $eax, undef $eax, implicit-def dead $eflags, debug-location !22 $rcx = frame-destroy POP64r implicit-def $rsp, implicit $rsp, debug-location !22 CFI_INSTRUCTION def_cfa_offset 8, debug-location !22 - RETQ killed $eax, debug-location !22 + RET64 killed $eax, debug-location !22 ... --- @@ -214,7 +214,7 @@ DBG_VALUE $edi, $noreg, !13, !DIExpression(DW_OP_LLVM_fragment, 0, 32), debug-location !14 $rcx = frame-destroy POP64r implicit-def $rsp, implicit $rsp, debug-location !22 CFI_INSTRUCTION def_cfa_offset 8, debug-location !22 - RETQ killed $eax, debug-location !22 + RET64 killed $eax, debug-location !22 ... --- @@ -236,7 +236,7 @@ DBG_VALUE $edi, $noreg, !13, !DIExpression(DW_OP_LLVM_fragment, 0, 32), debug-location !14 $rcx = frame-destroy POP64r implicit-def $rsp, implicit $rsp, debug-location !22 CFI_INSTRUCTION def_cfa_offset 8, debug-location !22 - RETQ killed $eax, debug-location !22 + RET64 killed $eax, debug-location !22 ... --- @@ -258,7 +258,7 @@ DBG_VALUE $edi, $noreg, !13, !DIExpression(DW_OP_LLVM_fragment, 0, 32), debug-location !14 $rcx = frame-destroy POP64r implicit-def $rsp, implicit $rsp, debug-location !22 CFI_INSTRUCTION def_cfa_offset 8, debug-location !22 - RETQ killed $eax, debug-location !22 + RET64 killed $eax, debug-location !22 ... --- @@ -279,6 +279,6 @@ $eax = XOR32rr undef $eax, undef $eax, implicit-def dead $eflags, debug-location !22 $rcx = frame-destroy POP64r implicit-def $rsp, implicit $rsp, debug-location !22 CFI_INSTRUCTION def_cfa_offset 8, debug-location !22 - RETQ killed $eax, debug-location !22 + RET64 killed $eax, debug-location !22 ... diff --git a/llvm/test/DebugInfo/MIR/X86/unreachable-block-call-site.mir b/llvm/test/DebugInfo/MIR/X86/unreachable-block-call-site.mir --- a/llvm/test/DebugInfo/MIR/X86/unreachable-block-call-site.mir +++ b/llvm/test/DebugInfo/MIR/X86/unreachable-block-call-site.mir @@ -63,6 +63,6 @@ $eax = XOR32rr undef $eax, undef $eax, implicit-def dead $eflags, debug-location !18 $rcx = frame-destroy POP64r implicit-def $rsp, implicit $rsp, debug-location !18 CFI_INSTRUCTION def_cfa_offset 8, debug-location !18 - RETQ killed $eax, debug-location !18 + RET64 killed $eax, debug-location !18 ... diff --git a/llvm/test/DebugInfo/X86/bbjoin.ll b/llvm/test/DebugInfo/X86/bbjoin.ll --- a/llvm/test/DebugInfo/X86/bbjoin.ll +++ b/llvm/test/DebugInfo/X86/bbjoin.ll @@ -17,7 +17,7 @@ ; CHECK: DBG_VALUE 43, $noreg, ![[X]], ; CHECK: bb.2.if.end: ; CHECK-NOT: DBG_VALUE 23, $noreg, ![[X]], -; CHECK: RETQ $eax +; CHECK: RET64 $eax target datalayout = "e-m:o-i64:64-f80:128-n8:16:32:64-S128" target triple = "x86_64-apple-macosx10.11.0" diff --git a/llvm/test/DebugInfo/X86/dbg_entity_calc_ignores_KILL_instruction_at_return.mir b/llvm/test/DebugInfo/X86/dbg_entity_calc_ignores_KILL_instruction_at_return.mir --- a/llvm/test/DebugInfo/X86/dbg_entity_calc_ignores_KILL_instruction_at_return.mir +++ b/llvm/test/DebugInfo/X86/dbg_entity_calc_ignores_KILL_instruction_at_return.mir @@ -71,6 +71,6 @@ ; CHECK: [0x0000000000000003, 0x0000000000000004): DW_OP_reg0 RAX) ; CHECK-NEXT: DW_AT_name ("result") renamable $eax = KILL killed $eax, implicit-def $rax - RETQ killed $eax, debug-location !24 + RET64 killed $eax, debug-location !24 ... diff --git a/llvm/test/DebugInfo/X86/dbg_entity_calc_ignores_KILL_instruction_still_clobbers.mir b/llvm/test/DebugInfo/X86/dbg_entity_calc_ignores_KILL_instruction_still_clobbers.mir --- a/llvm/test/DebugInfo/X86/dbg_entity_calc_ignores_KILL_instruction_still_clobbers.mir +++ b/llvm/test/DebugInfo/X86/dbg_entity_calc_ignores_KILL_instruction_still_clobbers.mir @@ -74,6 +74,6 @@ $edi = MOV32rr $eax, debug-location !24 $eax = MOV32rr $eax, debug-location !24 $edi = MOV32rr $eax, debug-location !24 - RETQ killed $eax, debug-location !24 + RET64 killed $eax, debug-location !24 ... diff --git a/llvm/test/DebugInfo/X86/dbg_value_list_clobbers.mir b/llvm/test/DebugInfo/X86/dbg_value_list_clobbers.mir --- a/llvm/test/DebugInfo/X86/dbg_value_list_clobbers.mir +++ b/llvm/test/DebugInfo/X86/dbg_value_list_clobbers.mir @@ -80,5 +80,5 @@ DBG_VALUE_LIST !12, !DIExpression(DW_OP_LLVM_arg, 0, DW_OP_LLVM_arg, 1, DW_OP_plus, DW_OP_stack_value, DW_OP_LLVM_fragment, 16, 16), $eax, $ecx, debug-location !15 ; CHECK-NEXT: [{{.*}}): DW_OP_breg0 RAX+0, DW_OP_constu 0xffffffff, DW_OP_and, DW_OP_stack_value, DW_OP_piece 0x2, DW_OP_breg0 RAX+0, DW_OP_constu 0xffffffff, DW_OP_and, DW_OP_breg2 RCX+0, DW_OP_constu 0xffffffff, DW_OP_and, DW_OP_plus, DW_OP_stack_value, DW_OP_piece 0x2 - RETQ debug-location !15 + RET64 debug-location !15 ... diff --git a/llvm/test/DebugInfo/X86/dbg_value_list_emission.mir b/llvm/test/DebugInfo/X86/dbg_value_list_emission.mir --- a/llvm/test/DebugInfo/X86/dbg_value_list_emission.mir +++ b/llvm/test/DebugInfo/X86/dbg_value_list_emission.mir @@ -97,5 +97,5 @@ ; CHECK-NEXT: DW_AT_name ("localh") ; CHECK-NOT: DW_AT_location - RETQ debug-location !15 + RET64 debug-location !15 ... diff --git a/llvm/test/DebugInfo/X86/debug-loc-asan.mir b/llvm/test/DebugInfo/X86/debug-loc-asan.mir --- a/llvm/test/DebugInfo/X86/debug-loc-asan.mir +++ b/llvm/test/DebugInfo/X86/debug-loc-asan.mir @@ -341,6 +341,6 @@ $rsp = MOV64rr $rbp, debug-location !12 $rbp = frame-destroy POP64r implicit-def $rsp, implicit $rsp, debug-location !12 CFI_INSTRUCTION def_cfa $rsp, 8, debug-location !12 - RETQ implicit killed $eax, debug-location !12 + RET64 implicit killed $eax, debug-location !12 ... diff --git a/llvm/test/DebugInfo/X86/debug-loc-offset.mir b/llvm/test/DebugInfo/X86/debug-loc-offset.mir --- a/llvm/test/DebugInfo/X86/debug-loc-offset.mir +++ b/llvm/test/DebugInfo/X86/debug-loc-offset.mir @@ -207,7 +207,7 @@ $esp = frame-destroy ADD32ri8 $esp, 4, implicit-def dead $eflags, debug-location !16 $ebp = frame-destroy POP32r implicit-def $esp, implicit $esp, debug-location !16 CFI_INSTRUCTION def_cfa $esp, 4, debug-location !16 - RETL implicit killed $eax, debug-location !16 + RET32 implicit killed $eax, debug-location !16 ... --- @@ -271,6 +271,6 @@ $esp = frame-destroy ADD32ri8 $esp, 24, implicit-def dead $eflags, debug-location !30 $ebp = frame-destroy POP32r implicit-def $esp, implicit $esp, debug-location !30 CFI_INSTRUCTION def_cfa $esp, 4, debug-location !30 - RETL debug-location !30 + RET32 debug-location !30 ... diff --git a/llvm/test/DebugInfo/X86/dw_op_constu.mir b/llvm/test/DebugInfo/X86/dw_op_constu.mir --- a/llvm/test/DebugInfo/X86/dw_op_constu.mir +++ b/llvm/test/DebugInfo/X86/dw_op_constu.mir @@ -73,7 +73,7 @@ renamable $rcx = MOV64rm renamable $noreg, 1, $noreg, 0, $fs DBG_VALUE renamable $rcx, 0, !9, !DIExpression(DW_OP_constu, 18446744073709551614, DW_OP_minus), debug-location !14 - RETQ debug-location !14 + RET64 debug-location !14 bb.1: ;-------------------------- DW_OP_plus ------------------------------- @@ -106,7 +106,7 @@ renamable $rcx = MOV64rm renamable $noreg, 1, $noreg, 0, $fs DBG_VALUE renamable $rcx, 0, !9, !DIExpression(DW_OP_constu, 18446744073709551614, DW_OP_plus), debug-location !14 - RETQ debug-location !14 + RET64 debug-location !14 bb.2: ;-------------------------- DW_OP_plus_uconst ------------------------------- @@ -139,7 +139,7 @@ renamable $rcx = MOV64rm renamable $noreg, 1, $noreg, 0, $fs DBG_VALUE renamable $rcx, 0, !9, !DIExpression(DW_OP_plus_uconst, 18446744073709551614), debug-location !14 - RETQ debug-location !14 + RET64 debug-location !14 ... diff --git a/llvm/test/DebugInfo/X86/dw_op_minus.mir b/llvm/test/DebugInfo/X86/dw_op_minus.mir --- a/llvm/test/DebugInfo/X86/dw_op_minus.mir +++ b/llvm/test/DebugInfo/X86/dw_op_minus.mir @@ -114,6 +114,6 @@ MOV64mr killed renamable $rax, 1, $noreg, 0, $fs, killed renamable $rcx, debug-location !18 :: (store (s64) into @__safestack_unsafe_stack_ptr) $rsp = frame-destroy ADD64ri8 $rsp, 24, implicit-def dead $eflags, debug-location !18 CFI_INSTRUCTION def_cfa_offset 8, debug-location !18 - RETQ debug-location !18 + RET64 debug-location !18 ... diff --git a/llvm/test/DebugInfo/X86/live-debug-values-constprop.mir b/llvm/test/DebugInfo/X86/live-debug-values-constprop.mir --- a/llvm/test/DebugInfo/X86/live-debug-values-constprop.mir +++ b/llvm/test/DebugInfo/X86/live-debug-values-constprop.mir @@ -153,7 +153,7 @@ bb.3.bb3: liveins: $rax - RETQ $eax, debug-location !9 + RET64 $eax, debug-location !9 ... --- @@ -217,7 +217,7 @@ bb.3.bb3: liveins: $rax - RETQ $eax, debug-location !42 + RET64 $eax, debug-location !42 ... --- @@ -281,7 +281,7 @@ bb.3.bb3: liveins: $rax - RETQ $eax, debug-location !82 + RET64 $eax, debug-location !82 ... --- @@ -342,6 +342,6 @@ bb.3.bb3: liveins: $rax - RETQ $eax, debug-location !122 + RET64 $eax, debug-location !122 ... diff --git a/llvm/test/DebugInfo/X86/location-range-inlined-xblock.mir b/llvm/test/DebugInfo/X86/location-range-inlined-xblock.mir --- a/llvm/test/DebugInfo/X86/location-range-inlined-xblock.mir +++ b/llvm/test/DebugInfo/X86/location-range-inlined-xblock.mir @@ -167,6 +167,6 @@ $rbx = frame-destroy POP64r implicit-def $rsp, implicit $rsp, debug-location !40 DBG_VALUE $edi, $noreg, !15, !DIExpression(DW_OP_LLVM_entry_value, 1), debug-location !16 CFI_INSTRUCTION def_cfa_offset 8, debug-location !40 - RETQ $eax, debug-location !40 + RET64 $eax, debug-location !40 ... diff --git a/llvm/test/DebugInfo/X86/location-range.mir b/llvm/test/DebugInfo/X86/location-range.mir --- a/llvm/test/DebugInfo/X86/location-range.mir +++ b/llvm/test/DebugInfo/X86/location-range.mir @@ -133,12 +133,12 @@ bb.1.if.then: renamable $rax = MOV64rm $rip, 1, $noreg, @b, $noreg, debug-location !21 :: (dereferenceable load (s64) from @b) - RETQ $rax, debug-location !27 + RET64 $rax, debug-location !27 bb.2.if.end: DBG_VALUE 0, $noreg, !19, !DIExpression(), debug-location !27 renamable $rax = MOV64rm $rip, 1, $noreg, @a, $noreg, debug-location !27 :: (dereferenceable load (s64) from @a) - RETQ $rax, debug-location !27 + RET64 $rax, debug-location !27 ... --- @@ -147,6 +147,6 @@ bb.0.entry: $eax = MOVZX32rm16 $noreg, 1, $noreg, 0, $noreg, debug-location !48 :: (load (s16) from `i16* null`, align 1) DBG_VALUE $ax, $noreg, !39, !DIExpression(), debug-location !51 - RETQ $ax, debug-location !51 + RET64 $ax, debug-location !51 ... diff --git a/llvm/test/DebugInfo/X86/pr19307.mir b/llvm/test/DebugInfo/X86/pr19307.mir --- a/llvm/test/DebugInfo/X86/pr19307.mir +++ b/llvm/test/DebugInfo/X86/pr19307.mir @@ -219,6 +219,6 @@ $rsp = frame-destroy ADD64ri8 $rsp, 32, implicit-def dead $eflags, debug-location !53 $rbp = frame-destroy POP64r implicit-def $rsp, implicit $rsp, debug-location !53 CFI_INSTRUCTION def_cfa $rsp, 8, debug-location !53 - RETQ debug-location !53 + RET64 debug-location !53 ... diff --git a/llvm/test/DebugInfo/X86/pr34545.ll b/llvm/test/DebugInfo/X86/pr34545.ll --- a/llvm/test/DebugInfo/X86/pr34545.ll +++ b/llvm/test/DebugInfo/X86/pr34545.ll @@ -8,7 +8,7 @@ ; CHECK: DBG_VALUE $eax ; CHECK: $eax = SHL32rCL killed renamable $eax ; CHECK: DBG_VALUE $eax -; CHECK: RETQ $eax +; CHECK: RET64 $eax target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" diff --git a/llvm/test/DebugInfo/X86/single-location-2.mir b/llvm/test/DebugInfo/X86/single-location-2.mir --- a/llvm/test/DebugInfo/X86/single-location-2.mir +++ b/llvm/test/DebugInfo/X86/single-location-2.mir @@ -88,5 +88,5 @@ ;; end scope, end location range $esi = MOV32ri 2, debug-location !26 - RETQ debug-location !15 + RET64 debug-location !15 ... diff --git a/llvm/test/DebugInfo/X86/single-location-inlined-param.mir b/llvm/test/DebugInfo/X86/single-location-inlined-param.mir --- a/llvm/test/DebugInfo/X86/single-location-inlined-param.mir +++ b/llvm/test/DebugInfo/X86/single-location-inlined-param.mir @@ -105,10 +105,10 @@ bb.2.return: liveins: $eax - RETQ $eax, debug-location !36 + RET64 $eax, debug-location !36 bb.1.if.end: renamable $eax = MOV32ri 1 - RETQ $eax, debug-location !36 + RET64 $eax, debug-location !36 ... diff --git a/llvm/test/DebugInfo/X86/single-location-interrupted-scope.mir b/llvm/test/DebugInfo/X86/single-location-interrupted-scope.mir --- a/llvm/test/DebugInfo/X86/single-location-interrupted-scope.mir +++ b/llvm/test/DebugInfo/X86/single-location-interrupted-scope.mir @@ -155,7 +155,7 @@ TAILJMPd64 @ext, csr_64, implicit $rsp, implicit $ssp, implicit $rsp, implicit $ssp, implicit killed $al, debug-location !35 bb.1.if.end: - RETQ debug-location !36 + RET64 debug-location !36 ... --- @@ -177,6 +177,6 @@ TAILJMPd64 @ext, csr_64, implicit $rsp, implicit $ssp, implicit $rsp, implicit $ssp, implicit killed $al, debug-location !49 bb.1.if.end: - RETQ debug-location !50 + RET64 debug-location !50 ... diff --git a/llvm/test/DebugInfo/X86/trim-var-locs.mir b/llvm/test/DebugInfo/X86/trim-var-locs.mir --- a/llvm/test/DebugInfo/X86/trim-var-locs.mir +++ b/llvm/test/DebugInfo/X86/trim-var-locs.mir @@ -116,5 +116,5 @@ $edi = MOV32ri 9, debug-location !26 ; scope fun !7 - RETQ debug-location !15 + RET64 debug-location !15 ... diff --git a/llvm/unittests/tools/llvm-exegesis/X86/SnippetRepetitorTest.cpp b/llvm/unittests/tools/llvm-exegesis/X86/SnippetRepetitorTest.cpp --- a/llvm/unittests/tools/llvm-exegesis/X86/SnippetRepetitorTest.cpp +++ b/llvm/unittests/tools/llvm-exegesis/X86/SnippetRepetitorTest.cpp @@ -71,7 +71,7 @@ ASSERT_EQ(MF->getNumBlockIDs(), 1u); EXPECT_THAT(MF->getBlockNumbered(0)->instrs(), ElementsAre(HasOpcode(X86::NOOP), HasOpcode(X86::NOOP), - HasOpcode(X86::NOOP), HasOpcode(X86::RETQ))); + HasOpcode(X86::NOOP), HasOpcode(X86::RET64))); } TEST_F(X86SnippetRepetitorTest, Loop) { @@ -90,7 +90,7 @@ LiveReg(State.getExegesisTarget().getLoopCounterRegister( State.getTargetMachine().getTargetTriple())))); EXPECT_THAT(MF->getBlockNumbered(2)->instrs(), - ElementsAre(HasOpcode(X86::RETQ))); + ElementsAre(HasOpcode(X86::RET64))); } } // namespace