diff --git a/clang/utils/TableGen/RISCVVEmitter.cpp b/clang/utils/TableGen/RISCVVEmitter.cpp --- a/clang/utils/TableGen/RISCVVEmitter.cpp +++ b/clang/utils/TableGen/RISCVVEmitter.cpp @@ -97,6 +97,8 @@ return ShortStr; } + unsigned getElementBitwidth() const { return ElementBitwidth; } + bool isValid() const { return Valid; } bool isScalar() const { return Scale.hasValue() && Scale.getValue() == 0; } bool isVector() const { return Scale.hasValue() && Scale.getValue() != 0; } @@ -134,13 +136,18 @@ using RVVTypePtr = RVVType *; using RVVTypes = std::vector; +using RISCVPredefinedMacroT = uint16_t; -enum RISCVExtension : uint8_t { +enum RISCVPredefinedMacro : RISCVPredefinedMacroT { Basic = 0, F = 1 << 1, D = 1 << 2, Zfh = 1 << 3, Zvlsseg = 1 << 4, + VectorMaxEew32 = 1 << 5, + VectorMaxEew64 = 1 << 6, + VectorMaxEewFp32 = 1 << 7, + VectorMaxEewFp64 = 1 << 8, }; // TODO refactor RVVIntrinsic class design after support all intrinsic @@ -164,7 +171,7 @@ // The types we use to obtain the specific LLVM intrinsic. They are index of // InputTypes. -1 means the return type. std::vector IntrinsicTypes; - uint8_t RISCVExtensions = 0; + RISCVPredefinedMacroT RISCVPredefinedMacros = 0; unsigned NF = 1; public: @@ -188,7 +195,7 @@ bool isMask() const { return IsMask; } StringRef getIRName() const { return IRName; } StringRef getManualCodegen() const { return ManualCodegen; } - uint8_t getRISCVExtensions() const { return RISCVExtensions; } + RISCVPredefinedMacroT getRISCVPredefinedMacros() const { return RISCVPredefinedMacros; } unsigned getNF() const { return NF; } const std::vector &getIntrinsicTypes() const { return IntrinsicTypes; @@ -251,7 +258,7 @@ // Emit the architecture preprocessor definitions. Return true when emits // non-empty string. - bool emitExtDefStr(uint8_t Extensions, raw_ostream &o); + bool emitExtDefStr(RISCVPredefinedMacroT Extensions, raw_ostream &o); // Slice Prototypes string into sub prototype string and process each sub // prototype string individually in the Handler. void parsePrototypes(StringRef Prototypes, @@ -788,14 +795,23 @@ // Init RISC-V extensions for (const auto &T : OutInTypes) { if (T->isFloatVector(16) || T->isFloat(16)) - RISCVExtensions |= RISCVExtension::Zfh; + RISCVPredefinedMacros |= RISCVPredefinedMacro::Zfh; else if (T->isFloatVector(32) || T->isFloat(32)) - RISCVExtensions |= RISCVExtension::F; + RISCVPredefinedMacros |= RISCVPredefinedMacro::F; else if (T->isFloatVector(64) || T->isFloat(64)) - RISCVExtensions |= RISCVExtension::D; + RISCVPredefinedMacros |= RISCVPredefinedMacro::D; + + if (T->getElementBitwidth() == 32) + RISCVPredefinedMacros |= RISCVPredefinedMacro::VectorMaxEew32; + if (T->getElementBitwidth() == 64) + RISCVPredefinedMacros |= RISCVPredefinedMacro::VectorMaxEew64; + if (T->isFloatVector(32)) + RISCVPredefinedMacros |= RISCVPredefinedMacro::VectorMaxEewFp32; + if (T->isFloatVector(64)) + RISCVPredefinedMacros |= RISCVPredefinedMacro::VectorMaxEewFp64; } if (RequiredExtension == "Zvlsseg") - RISCVExtensions |= RISCVExtension::Zvlsseg; + RISCVPredefinedMacros |= RISCVPredefinedMacro::Zvlsseg; // Init OutputType and InputTypes OutputType = OutInTypes[0]; @@ -978,7 +994,7 @@ // The same extension include in the same arch guard marco. llvm::stable_sort(Defs, [](const std::unique_ptr &A, const std::unique_ptr &B) { - return A->getRISCVExtensions() < B->getRISCVExtensions(); + return A->getRISCVPredefinedMacros() < B->getRISCVPredefinedMacros(); }); OS << "#define __rvv_ai static __inline__\n"; @@ -1276,10 +1292,10 @@ void RVVEmitter::emitArchMacroAndBody( std::vector> &Defs, raw_ostream &OS, std::function PrintBody) { - uint8_t PrevExt = (*Defs.begin())->getRISCVExtensions(); + RISCVPredefinedMacroT PrevExt = (*Defs.begin())->getRISCVPredefinedMacros(); bool NeedEndif = emitExtDefStr(PrevExt, OS); for (auto &Def : Defs) { - uint8_t CurExt = Def->getRISCVExtensions(); + RISCVPredefinedMacroT CurExt = Def->getRISCVPredefinedMacros(); if (CurExt != PrevExt) { if (NeedEndif) OS << "#endif\n\n"; @@ -1293,19 +1309,27 @@ OS << "#endif\n\n"; } -bool RVVEmitter::emitExtDefStr(uint8_t Extents, raw_ostream &OS) { - if (Extents == RISCVExtension::Basic) +bool RVVEmitter::emitExtDefStr(RISCVPredefinedMacroT Extents, raw_ostream &OS) { + if (Extents == RISCVPredefinedMacro::Basic) return false; OS << "#if "; ListSeparator LS(" && "); - if (Extents & RISCVExtension::F) + if (Extents & RISCVPredefinedMacro::F) OS << LS << "defined(__riscv_f)"; - if (Extents & RISCVExtension::D) + if (Extents & RISCVPredefinedMacro::D) OS << LS << "defined(__riscv_d)"; - if (Extents & RISCVExtension::Zfh) + if (Extents & RISCVPredefinedMacro::Zfh) OS << LS << "defined(__riscv_zfh)"; - if (Extents & RISCVExtension::Zvlsseg) + if (Extents & RISCVPredefinedMacro::Zvlsseg) OS << LS << "defined(__riscv_zvlsseg)"; + if (Extents & RISCVPredefinedMacro::VectorMaxEew32) + OS << LS << "(__riscv_v_max_eew >= 32)"; + if (Extents & RISCVPredefinedMacro::VectorMaxEew64) + OS << LS << "(__riscv_v_max_eew >= 64)"; + if (Extents & RISCVPredefinedMacro::VectorMaxEewFp32) + OS << LS << "(__riscv_v_max_eew_fp >= 32)"; + if (Extents & RISCVPredefinedMacro::VectorMaxEewFp64) + OS << LS << "(__riscv_v_max_eew_fp >= 64)"; OS << "\n"; return true; } diff --git a/llvm/lib/Target/RISCV/RISCVInstrInfoV.td b/llvm/lib/Target/RISCV/RISCVInstrInfoV.td --- a/llvm/lib/Target/RISCV/RISCVInstrInfoV.td +++ b/llvm/lib/Target/RISCV/RISCVInstrInfoV.td @@ -1508,32 +1508,29 @@ } // Predicates = [HasStdExtVIntegerEEW32] let Predicates = [HasStdExtZvlsseg] in { + +let Predicates = [HasStdExtVIntegerEEW32] in { foreach nf=2-8 in { def VLSEG#nf#E8_V : VUnitStrideSegmentLoad; def VLSEG#nf#E16_V : VUnitStrideSegmentLoad; def VLSEG#nf#E32_V : VUnitStrideSegmentLoad; - def VLSEG#nf#E64_V : VUnitStrideSegmentLoad; def VLSEG#nf#E8FF_V : VUnitStrideSegmentLoad; def VLSEG#nf#E16FF_V : VUnitStrideSegmentLoad; def VLSEG#nf#E32FF_V : VUnitStrideSegmentLoad; - def VLSEG#nf#E64FF_V : VUnitStrideSegmentLoad; def VSSEG#nf#E8_V : VUnitStrideSegmentStore; def VSSEG#nf#E16_V : VUnitStrideSegmentStore; def VSSEG#nf#E32_V : VUnitStrideSegmentStore; - def VSSEG#nf#E64_V : VUnitStrideSegmentStore; // Vector Strided Instructions def VLSSEG#nf#E8_V : VStridedSegmentLoad; def VLSSEG#nf#E16_V : VStridedSegmentLoad; def VLSSEG#nf#E32_V : VStridedSegmentLoad; - def VLSSEG#nf#E64_V : VStridedSegmentLoad; def VSSSEG#nf#E8_V : VStridedSegmentStore; def VSSSEG#nf#E16_V : VStridedSegmentStore; def VSSSEG#nf#E32_V : VStridedSegmentStore; - def VSSSEG#nf#E64_V : VStridedSegmentStore; // Vector Indexed Instructions def VLUXSEG#nf#EI8_V : VIndexedSegmentLoad; def VLUXSEG#nf#EI32_V : VIndexedSegmentLoad; - def VLUXSEG#nf#EI64_V : VIndexedSegmentLoad; def VLOXSEG#nf#EI8_V : VIndexedSegmentLoad; @@ -1551,8 +1546,6 @@ LSWidth16, "vloxseg"#nf#"ei16.v">; def VLOXSEG#nf#EI32_V : VIndexedSegmentLoad; - def VLOXSEG#nf#EI64_V : VIndexedSegmentLoad; def VSUXSEG#nf#EI8_V : VIndexedSegmentStore; @@ -1560,8 +1553,6 @@ LSWidth16, "vsuxseg"#nf#"ei16.v">; def VSUXSEG#nf#EI32_V : VIndexedSegmentStore; - def VSUXSEG#nf#EI64_V : VIndexedSegmentStore; def VSOXSEG#nf#EI8_V : VIndexedSegmentStore; @@ -1569,12 +1560,32 @@ LSWidth16, "vsoxseg"#nf#"ei16.v">; def VSOXSEG#nf#EI32_V : VIndexedSegmentStore; + } +} // Predicates = [HasStdExtVIntegerEEW32] +let Predicates = [HasStdExtVIntegerEEW64] in { + foreach nf=2-8 in { + def VLSEG#nf#E64_V : VUnitStrideSegmentLoad; + def VLSEG#nf#E64FF_V : VUnitStrideSegmentLoad; + def VSSEG#nf#E64_V : VUnitStrideSegmentStore; + + // Vector Strided Instructions + def VLSSEG#nf#E64_V : VStridedSegmentLoad; + def VSSSEG#nf#E64_V : VStridedSegmentStore; + + // Vector Indexed Instructions + def VLUXSEG#nf#EI64_V : VIndexedSegmentLoad; + def VLOXSEG#nf#EI64_V : VIndexedSegmentLoad; + def VSUXSEG#nf#EI64_V : VIndexedSegmentStore; def VSOXSEG#nf#EI64_V : VIndexedSegmentStore; } +} // Predicates = [HasStdExtVIntegerEEW64] } // Predicates = [HasStdExtZvlsseg] -let Predicates = [HasStdExtZvamo, HasStdExtA] in { +let Predicates = [HasStdExtZvamo, HasStdExtA, HasStdExtVIntegerEEW32] in { defm VAMOSWAPEI8 : VAMO; defm VAMOSWAPEI16 : VAMO; defm VAMOSWAPEI32 : VAMO; @@ -1610,9 +1621,9 @@ defm VAMOMAXUEI8 : VAMO; defm VAMOMAXUEI16 : VAMO; defm VAMOMAXUEI32 : VAMO; -} // Predicates = [HasStdExtZvamo, HasStdExtA] +} // Predicates = [HasStdExtZvamo, HasStdExtA, HasStdExtVIntegerEEW32] -let Predicates = [HasStdExtZvamo, HasStdExtA, IsRV64] in { +let Predicates = [HasStdExtZvamo, HasStdExtA, IsRV64, HasStdExtVIntegerEEW64] in { defm VAMOSWAPEI64 : VAMO; defm VAMOADDEI64 : VAMO; defm VAMOXOREI64 : VAMO; @@ -1622,6 +1633,6 @@ defm VAMOMAXEI64 : VAMO; defm VAMOMINUEI64 : VAMO; defm VAMOMAXUEI64 : VAMO; -} // Predicates = [HasStdExtZvamo, HasStdExtA, IsRV64] +} // Predicates = [HasStdExtZvamo, HasStdExtA, IsRV64, HasStdExtVIntegerEEW64] include "RISCVInstrInfoVPseudos.td" diff --git a/llvm/test/MC/RISCV/rvv/zvamo.s b/llvm/test/MC/RISCV/rvv/zvamo.s --- a/llvm/test/MC/RISCV/rvv/zvamo.s +++ b/llvm/test/MC/RISCV/rvv/zvamo.s @@ -1,874 +1,876 @@ -# RUN: llvm-mc -triple=riscv64 -show-encoding --mattr=+a,+experimental-zvamo %s \ +# RUN: llvm-mc -triple=riscv64 -show-encoding --mattr=+a,+experimental-zve64x,+experimental-zvamo %s \ # RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST # RUN: not llvm-mc -triple=riscv64 -show-encoding %s 2>&1 \ # RUN: | FileCheck %s --check-prefix=CHECK-ERROR -# RUN: llvm-mc -triple=riscv64 -filetype=obj --mattr=+a,+experimental-zvamo %s \ -# RUN: | llvm-objdump -d --mattr=+a,+experimental-zvamo - \ +# RUN: llvm-mc -triple=riscv64 -filetype=obj --mattr=+a,+experimental-zve64x,+experimental-zvamo %s \ +# RUN: | llvm-objdump -d --mattr=+a,+experimental-zve64x,+experimental-zvamo - \ # RUN: | FileCheck %s --check-prefix=CHECK-INST -# RUN: llvm-mc -triple=riscv64 -filetype=obj --mattr=+a,+experimental-zvamo %s \ +# RUN: llvm-mc -triple=riscv64 -filetype=obj --mattr=+a,+experimental-zve64x,+experimental-zvamo %s \ # RUN: | llvm-objdump -d - | FileCheck %s --check-prefix=CHECK-UNKNOWN vamoswapei8.v v8, (a0), v4, v8 # CHECK-INST: vamoswapei8.v v8, (a0), v4, v8 # CHECK-ENCODING: [0x2f,0x04,0x45,0x0e] -# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'Zvamo' (Vector AMO Operations) +# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors), 'Zvamo' (Vector AMO Operations) # CHECK-UNKNOWN: 2f 04 45 0e vamoswapei16.v v8, (a0), v4, v8 # CHECK-INST: vamoswapei16.v v8, (a0), v4, v8 # CHECK-ENCODING: [0x2f,0x54,0x45,0x0e] -# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'Zvamo' (Vector AMO Operations) +# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors), 'Zvamo' (Vector AMO Operations) # CHECK-UNKNOWN: 2f 54 45 0e vamoswapei32.v v8, (a0), v4, v8 # CHECK-INST: vamoswapei32.v v8, (a0), v4, v8 # CHECK-ENCODING: [0x2f,0x64,0x45,0x0e] -# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'Zvamo' (Vector AMO Operations) +# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors), 'Zvamo' (Vector AMO Operations) # CHECK-UNKNOWN: 2f 64 45 0e vamoswapei64.v v8, (a0), v4, v8 # CHECK-INST: vamoswapei64.v v8, (a0), v4, v8 # CHECK-ENCODING: [0x2f,0x74,0x45,0x0e] -# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'Zvamo' (Vector AMO Operations) +# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors), 'Zvamo' (Vector AMO Operations) # CHECK-UNKNOWN: 2f 74 45 0e vamoswapei8.v v8, (a0), v4, v8, v0.t # CHECK-INST: vamoswapei8.v v8, (a0), v4, v8, v0.t # CHECK-ENCODING: [0x2f,0x04,0x45,0x0c] -# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'Zvamo' (Vector AMO Operations) +# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors), 'Zvamo' (Vector AMO Operations) # CHECK-UNKNOWN: 2f 04 45 0c vamoswapei16.v v8, (a0), v4, v8, v0.t # CHECK-INST: vamoswapei16.v v8, (a0), v4, v8, v0.t # CHECK-ENCODING: [0x2f,0x54,0x45,0x0c] -# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'Zvamo' (Vector AMO Operations) +# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors), 'Zvamo' (Vector AMO Operations) # CHECK-UNKNOWN: 2f 54 45 0c vamoswapei32.v v8, (a0), v4, v8, v0.t # CHECK-INST: vamoswapei32.v v8, (a0), v4, v8, v0.t # CHECK-ENCODING: [0x2f,0x64,0x45,0x0c] -# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'Zvamo' (Vector AMO Operations) +# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors), 'Zvamo' (Vector AMO Operations) # CHECK-UNKNOWN: 2f 64 45 0c vamoswapei64.v v8, (a0), v4, v8, v0.t # CHECK-INST: vamoswapei64.v v8, (a0), v4, v8, v0.t # CHECK-ENCODING: [0x2f,0x74,0x45,0x0c] -# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'Zvamo' (Vector AMO Operations) +# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors), 'Zvamo' (Vector AMO Operations) # CHECK-UNKNOWN: 2f 74 45 0c vamoaddei8.v v8, (a0), v4, v8 # CHECK-INST: vamoaddei8.v v8, (a0), v4, v8 # CHECK-ENCODING: [0x2f,0x04,0x45,0x06] -# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'Zvamo' (Vector AMO Operations) +# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors), 'Zvamo' (Vector AMO Operations) # CHECK-UNKNOWN: 2f 04 45 06 vamoaddei16.v v8, (a0), v4, v8 # CHECK-INST: vamoaddei16.v v8, (a0), v4, v8 # CHECK-ENCODING: [0x2f,0x54,0x45,0x06] -# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'Zvamo' (Vector AMO Operations) +# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors), 'Zvamo' (Vector AMO Operations) # CHECK-UNKNOWN: 2f 54 45 06 vamoaddei32.v v8, (a0), v4, v8 # CHECK-INST: vamoaddei32.v v8, (a0), v4, v8 # CHECK-ENCODING: [0x2f,0x64,0x45,0x06] -# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'Zvamo' (Vector AMO Operations) +# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors), 'Zvamo' (Vector AMO Operations) # CHECK-UNKNOWN: 2f 64 45 06 vamoaddei64.v v8, (a0), v4, v8 # CHECK-INST: vamoaddei64.v v8, (a0), v4, v8 # CHECK-ENCODING: [0x2f,0x74,0x45,0x06] -# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'Zvamo' (Vector AMO Operations) +# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors), 'Zvamo' (Vector AMO Operations) # CHECK-UNKNOWN: 2f 74 45 06 vamoaddei8.v v8, (a0), v4, v8, v0.t # CHECK-INST: vamoaddei8.v v8, (a0), v4, v8, v0.t # CHECK-ENCODING: [0x2f,0x04,0x45,0x04] -# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'Zvamo' (Vector AMO Operations) +# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors), 'Zvamo' (Vector AMO Operations) # CHECK-UNKNOWN: 2f 04 45 04 vamoaddei16.v v8, (a0), v4, v8, v0.t # CHECK-INST: vamoaddei16.v v8, (a0), v4, v8, v0.t # CHECK-ENCODING: [0x2f,0x54,0x45,0x04] -# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'Zvamo' (Vector AMO Operations) +# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors), 'Zvamo' (Vector AMO Operations) # CHECK-UNKNOWN: 2f 54 45 04 vamoaddei32.v v8, (a0), v4, v8, v0.t # CHECK-INST: vamoaddei32.v v8, (a0), v4, v8, v0.t # CHECK-ENCODING: [0x2f,0x64,0x45,0x04] -# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'Zvamo' (Vector AMO Operations) +# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors), 'Zvamo' (Vector AMO Operations) # CHECK-UNKNOWN: 2f 64 45 04 vamoaddei64.v v8, (a0), v4, v8, v0.t # CHECK-INST: vamoaddei64.v v8, (a0), v4, v8, v0.t # CHECK-ENCODING: [0x2f,0x74,0x45,0x04] -# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'Zvamo' (Vector AMO Operations) +# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors), 'Zvamo' (Vector AMO Operations) # CHECK-UNKNOWN: 2f 74 45 04 vamoxorei8.v v8, (a0), v4, v8 # CHECK-INST: vamoxorei8.v v8, (a0), v4, v8 # CHECK-ENCODING: [0x2f,0x04,0x45,0x26] -# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'Zvamo' (Vector AMO Operations) +# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors), 'Zvamo' (Vector AMO Operations) # CHECK-UNKNOWN: 2f 04 45 26 vamoxorei16.v v8, (a0), v4, v8 # CHECK-INST: vamoxorei16.v v8, (a0), v4, v8 # CHECK-ENCODING: [0x2f,0x54,0x45,0x26] -# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'Zvamo' (Vector AMO Operations) +# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors), 'Zvamo' (Vector AMO Operations) # CHECK-UNKNOWN: 2f 54 45 26 vamoxorei32.v v8, (a0), v4, v8 # CHECK-INST: vamoxorei32.v v8, (a0), v4, v8 # CHECK-ENCODING: [0x2f,0x64,0x45,0x26] -# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'Zvamo' (Vector AMO Operations) +# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors), 'Zvamo' (Vector AMO Operations) # CHECK-UNKNOWN: 2f 64 45 26 vamoxorei64.v v8, (a0), v4, v8 # CHECK-INST: vamoxorei64.v v8, (a0), v4, v8 # CHECK-ENCODING: [0x2f,0x74,0x45,0x26] -# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'Zvamo' (Vector AMO Operations) +# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors), 'Zvamo' (Vector AMO Operations) # CHECK-UNKNOWN: 2f 74 45 26 vamoxorei8.v v8, (a0), v4, v8, v0.t # CHECK-INST: vamoxorei8.v v8, (a0), v4, v8, v0.t # CHECK-ENCODING: [0x2f,0x04,0x45,0x24] -# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'Zvamo' (Vector AMO Operations) +# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors), 'Zvamo' (Vector AMO Operations) # CHECK-UNKNOWN: 2f 04 45 24 vamoxorei16.v v8, (a0), v4, v8, v0.t # CHECK-INST: vamoxorei16.v v8, (a0), v4, v8, v0.t # CHECK-ENCODING: [0x2f,0x54,0x45,0x24] -# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'Zvamo' (Vector AMO Operations) +# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors), 'Zvamo' (Vector AMO Operations) # CHECK-UNKNOWN: 2f 54 45 24 vamoxorei32.v v8, (a0), v4, v8, v0.t # CHECK-INST: vamoxorei32.v v8, (a0), v4, v8, v0.t # CHECK-ENCODING: [0x2f,0x64,0x45,0x24] -# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'Zvamo' (Vector AMO Operations) +# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors), 'Zvamo' (Vector AMO Operations) # CHECK-UNKNOWN: 2f 64 45 24 vamoxorei64.v v8, (a0), v4, v8, v0.t # CHECK-INST: vamoxorei64.v v8, (a0), v4, v8, v0.t # CHECK-ENCODING: [0x2f,0x74,0x45,0x24] -# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'Zvamo' (Vector AMO Operations) +# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors), 'Zvamo' (Vector AMO Operations) # CHECK-UNKNOWN: 2f 74 45 24 vamoandei8.v v8, (a0), v4, v8 # CHECK-INST: vamoandei8.v v8, (a0), v4, v8 # CHECK-ENCODING: [0x2f,0x04,0x45,0x66] -# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'Zvamo' (Vector AMO Operations) +# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors), 'Zvamo' (Vector AMO Operations) # CHECK-UNKNOWN: 2f 04 45 66 vamoandei16.v v8, (a0), v4, v8 # CHECK-INST: vamoandei16.v v8, (a0), v4, v8 # CHECK-ENCODING: [0x2f,0x54,0x45,0x66] -# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'Zvamo' (Vector AMO Operations) +# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors), 'Zvamo' (Vector AMO Operations) # CHECK-UNKNOWN: 2f 54 45 66 vamoandei32.v v8, (a0), v4, v8 # CHECK-INST: vamoandei32.v v8, (a0), v4, v8 # CHECK-ENCODING: [0x2f,0x64,0x45,0x66] -# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'Zvamo' (Vector AMO Operations) +# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors), 'Zvamo' (Vector AMO Operations) # CHECK-UNKNOWN: 2f 64 45 66 vamoandei64.v v8, (a0), v4, v8 # CHECK-INST: vamoandei64.v v8, (a0), v4, v8 # CHECK-ENCODING: [0x2f,0x74,0x45,0x66] -# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'Zvamo' (Vector AMO Operations) +# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors), 'Zvamo' (Vector AMO Operations) # CHECK-UNKNOWN: 2f 74 45 66 vamoandei8.v v8, (a0), v4, v8, v0.t # CHECK-INST: vamoandei8.v v8, (a0), v4, v8, v0.t # CHECK-ENCODING: [0x2f,0x04,0x45,0x64] -# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'Zvamo' (Vector AMO Operations) +# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors), 'Zvamo' (Vector AMO Operations) # CHECK-UNKNOWN: 2f 04 45 64 vamoandei16.v v8, (a0), v4, v8, v0.t # CHECK-INST: vamoandei16.v v8, (a0), v4, v8, v0.t # CHECK-ENCODING: [0x2f,0x54,0x45,0x64] -# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'Zvamo' (Vector AMO Operations) +# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors), 'Zvamo' (Vector AMO Operations) # CHECK-UNKNOWN: 2f 54 45 64 vamoandei32.v v8, (a0), v4, v8, v0.t # CHECK-INST: vamoandei32.v v8, (a0), v4, v8, v0.t # CHECK-ENCODING: [0x2f,0x64,0x45,0x64] -# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'Zvamo' (Vector AMO Operations) +# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors), 'Zvamo' (Vector AMO Operations) # CHECK-UNKNOWN: 2f 64 45 64 vamoandei64.v v8, (a0), v4, v8, v0.t # CHECK-INST: vamoandei64.v v8, (a0), v4, v8, v0.t # CHECK-ENCODING: [0x2f,0x74,0x45,0x64] -# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'Zvamo' (Vector AMO Operations) +# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors), 'Zvamo' (Vector AMO Operations) # CHECK-UNKNOWN: 2f 74 45 64 vamoorei8.v v8, (a0), v4, v8 # CHECK-INST: vamoorei8.v v8, (a0), v4, v8 # CHECK-ENCODING: [0x2f,0x04,0x45,0x46] -# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'Zvamo' (Vector AMO Operations) +# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors), 'Zvamo' (Vector AMO Operations) # CHECK-UNKNOWN: 2f 04 45 46 vamoorei16.v v8, (a0), v4, v8 # CHECK-INST: vamoorei16.v v8, (a0), v4, v8 # CHECK-ENCODING: [0x2f,0x54,0x45,0x46] -# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'Zvamo' (Vector AMO Operations) +# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors), 'Zvamo' (Vector AMO Operations) # CHECK-UNKNOWN: 2f 54 45 46 vamoorei32.v v8, (a0), v4, v8 # CHECK-INST: vamoorei32.v v8, (a0), v4, v8 # CHECK-ENCODING: [0x2f,0x64,0x45,0x46] -# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'Zvamo' (Vector AMO Operations) +# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors), 'Zvamo' (Vector AMO Operations) # CHECK-UNKNOWN: 2f 64 45 46 vamoorei64.v v8, (a0), v4, v8 # CHECK-INST: vamoorei64.v v8, (a0), v4, v8 # CHECK-ENCODING: [0x2f,0x74,0x45,0x46] -# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'Zvamo' (Vector AMO Operations) +# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors), 'Zvamo' (Vector AMO Operations) # CHECK-UNKNOWN: 2f 74 45 46 vamoorei8.v v8, (a0), v4, v8, v0.t # CHECK-INST: vamoorei8.v v8, (a0), v4, v8, v0.t # CHECK-ENCODING: [0x2f,0x04,0x45,0x44] -# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'Zvamo' (Vector AMO Operations) +# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors), 'Zvamo' (Vector AMO Operations) # CHECK-UNKNOWN: 2f 04 45 44 vamoorei16.v v8, (a0), v4, v8, v0.t # CHECK-INST: vamoorei16.v v8, (a0), v4, v8, v0.t # CHECK-ENCODING: [0x2f,0x54,0x45,0x44] -# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'Zvamo' (Vector AMO Operations) +# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors), 'Zvamo' (Vector AMO Operations) # CHECK-UNKNOWN: 2f 54 45 44 vamoorei32.v v8, (a0), v4, v8, v0.t # CHECK-INST: vamoorei32.v v8, (a0), v4, v8, v0.t # CHECK-ENCODING: [0x2f,0x64,0x45,0x44] -# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'Zvamo' (Vector AMO Operations) +# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors), 'Zvamo' (Vector AMO Operations) # CHECK-UNKNOWN: 2f 64 45 44 vamoorei64.v v8, (a0), v4, v8, v0.t # CHECK-INST: vamoorei64.v v8, (a0), v4, v8, v0.t # CHECK-ENCODING: [0x2f,0x74,0x45,0x44] -# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'Zvamo' (Vector AMO Operations) +# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors), 'Zvamo' (Vector AMO Operations) # CHECK-UNKNOWN: 2f 74 45 44 vamominei8.v v8, (a0), v4, v8 # CHECK-INST: vamominei8.v v8, (a0), v4, v8 # CHECK-ENCODING: [0x2f,0x04,0x45,0x86] -# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'Zvamo' (Vector AMO Operations) +# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors), 'Zvamo' (Vector AMO Operations) # CHECK-UNKNOWN: 2f 04 45 86 vamominei16.v v8, (a0), v4, v8 # CHECK-INST: vamominei16.v v8, (a0), v4, v8 # CHECK-ENCODING: [0x2f,0x54,0x45,0x86] -# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'Zvamo' (Vector AMO Operations) +# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors), 'Zvamo' (Vector AMO Operations) # CHECK-UNKNOWN: 2f 54 45 86 vamominei32.v v8, (a0), v4, v8 # CHECK-INST: vamominei32.v v8, (a0), v4, v8 # CHECK-ENCODING: [0x2f,0x64,0x45,0x86] -# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'Zvamo' (Vector AMO Operations) +# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors), 'Zvamo' (Vector AMO Operations) # CHECK-UNKNOWN: 2f 64 45 86 vamominei64.v v8, (a0), v4, v8 # CHECK-INST: vamominei64.v v8, (a0), v4, v8 # CHECK-ENCODING: [0x2f,0x74,0x45,0x86] -# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'Zvamo' (Vector AMO Operations) +# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors), 'Zvamo' (Vector AMO Operations) # CHECK-UNKNOWN: 2f 74 45 86 vamominei8.v v8, (a0), v4, v8, v0.t # CHECK-INST: vamominei8.v v8, (a0), v4, v8, v0.t # CHECK-ENCODING: [0x2f,0x04,0x45,0x84] -# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'Zvamo' (Vector AMO Operations) +# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors), 'Zvamo' (Vector AMO Operations) # CHECK-UNKNOWN: 2f 04 45 84 vamominei16.v v8, (a0), v4, v8, v0.t # CHECK-INST: vamominei16.v v8, (a0), v4, v8, v0.t # CHECK-ENCODING: [0x2f,0x54,0x45,0x84] -# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'Zvamo' (Vector AMO Operations) +# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors), 'Zvamo' (Vector AMO Operations) # CHECK-UNKNOWN: 2f 54 45 84 vamominei32.v v8, (a0), v4, v8, v0.t # CHECK-INST: vamominei32.v v8, (a0), v4, v8, v0.t # CHECK-ENCODING: [0x2f,0x64,0x45,0x84] -# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'Zvamo' (Vector AMO Operations) +# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors), 'Zvamo' (Vector AMO Operations) # CHECK-UNKNOWN: 2f 64 45 84 vamominei64.v v8, (a0), v4, v8, v0.t # CHECK-INST: vamominei64.v v8, (a0), v4, v8, v0.t # CHECK-ENCODING: [0x2f,0x74,0x45,0x84] -# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'Zvamo' (Vector AMO Operations) +# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors), 'Zvamo' (Vector AMO Operations) # CHECK-UNKNOWN: 2f 74 45 84 vamomaxei8.v v8, (a0), v4, v8 # CHECK-INST: vamomaxei8.v v8, (a0), v4, v8 # CHECK-ENCODING: [0x2f,0x04,0x45,0xa6] -# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'Zvamo' (Vector AMO Operations) +# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors), 'Zvamo' (Vector AMO Operations) # CHECK-UNKNOWN: 2f 04 45 a6 vamomaxei16.v v8, (a0), v4, v8 # CHECK-INST: vamomaxei16.v v8, (a0), v4, v8 # CHECK-ENCODING: [0x2f,0x54,0x45,0xa6] -# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'Zvamo' (Vector AMO Operations) +# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors), 'Zvamo' (Vector AMO Operations) # CHECK-UNKNOWN: 2f 54 45 a6 vamomaxei32.v v8, (a0), v4, v8 # CHECK-INST: vamomaxei32.v v8, (a0), v4, v8 # CHECK-ENCODING: [0x2f,0x64,0x45,0xa6] -# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'Zvamo' (Vector AMO Operations) +# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors), 'Zvamo' (Vector AMO Operations) # CHECK-UNKNOWN: 2f 64 45 a6 vamomaxei64.v v8, (a0), v4, v8 # CHECK-INST: vamomaxei64.v v8, (a0), v4, v8 # CHECK-ENCODING: [0x2f,0x74,0x45,0xa6] -# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'Zvamo' (Vector AMO Operations) +# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors), 'Zvamo' (Vector AMO Operations) # CHECK-UNKNOWN: 2f 74 45 a6 vamomaxei8.v v8, (a0), v4, v8, v0.t # CHECK-INST: vamomaxei8.v v8, (a0), v4, v8, v0.t # CHECK-ENCODING: [0x2f,0x04,0x45,0xa4] -# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'Zvamo' (Vector AMO Operations) +# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors), 'Zvamo' (Vector AMO Operations) # CHECK-UNKNOWN: 2f 04 45 a4 vamomaxei16.v v8, (a0), v4, v8, v0.t # CHECK-INST: vamomaxei16.v v8, (a0), v4, v8, v0.t # CHECK-ENCODING: [0x2f,0x54,0x45,0xa4] -# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'Zvamo' (Vector AMO Operations) +# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors), 'Zvamo' (Vector AMO Operations) # CHECK-UNKNOWN: 2f 54 45 a4 vamomaxei32.v v8, (a0), v4, v8, v0.t # CHECK-INST: vamomaxei32.v v8, (a0), v4, v8, v0.t # CHECK-ENCODING: [0x2f,0x64,0x45,0xa4] -# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'Zvamo' (Vector AMO Operations) +# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors), 'Zvamo' (Vector AMO Operations) # CHECK-UNKNOWN: 2f 64 45 a4 vamomaxei64.v v8, (a0), v4, v8, v0.t # CHECK-INST: vamomaxei64.v v8, (a0), v4, v8, v0.t # CHECK-ENCODING: [0x2f,0x74,0x45,0xa4] -# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'Zvamo' (Vector AMO Operations) +# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors), 'Zvamo' (Vector AMO Operations) # CHECK-UNKNOWN: 2f 74 45 a4 vamominuei8.v v8, (a0), v4, v8 # CHECK-INST: vamominuei8.v v8, (a0), v4, v8 # CHECK-ENCODING: [0x2f,0x04,0x45,0xc6] -# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'Zvamo' (Vector AMO Operations) +# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors), 'Zvamo' (Vector AMO Operations) # CHECK-UNKNOWN: 2f 04 45 c6 vamominuei16.v v8, (a0), v4, v8 # CHECK-INST: vamominuei16.v v8, (a0), v4, v8 # CHECK-ENCODING: [0x2f,0x54,0x45,0xc6] -# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'Zvamo' (Vector AMO Operations) +# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors), 'Zvamo' (Vector AMO Operations) # CHECK-UNKNOWN: 2f 54 45 c6 vamominuei32.v v8, (a0), v4, v8 # CHECK-INST: vamominuei32.v v8, (a0), v4, v8 # CHECK-ENCODING: [0x2f,0x64,0x45,0xc6] -# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'Zvamo' (Vector AMO Operations) +# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors), 'Zvamo' (Vector AMO Operations) # CHECK-UNKNOWN: 2f 64 45 c6 vamominuei64.v v8, (a0), v4, v8 # CHECK-INST: vamominuei64.v v8, (a0), v4, v8 # CHECK-ENCODING: [0x2f,0x74,0x45,0xc6] -# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'Zvamo' (Vector AMO Operations) +# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors), 'Zvamo' (Vector AMO Operations) # CHECK-UNKNOWN: 2f 74 45 c6 vamominuei8.v v8, (a0), v4, v8, v0.t # CHECK-INST: vamominuei8.v v8, (a0), v4, v8, v0.t # CHECK-ENCODING: [0x2f,0x04,0x45,0xc4] -# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'Zvamo' (Vector AMO Operations) +# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors), 'Zvamo' (Vector AMO Operations) # CHECK-UNKNOWN: 2f 04 45 c4 vamominuei16.v v8, (a0), v4, v8, v0.t # CHECK-INST: vamominuei16.v v8, (a0), v4, v8, v0.t # CHECK-ENCODING: [0x2f,0x54,0x45,0xc4] -# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'Zvamo' (Vector AMO Operations) +# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors), 'Zvamo' (Vector AMO Operations) # CHECK-UNKNOWN: 2f 54 45 c4 vamominuei32.v v8, (a0), v4, v8, v0.t # CHECK-INST: vamominuei32.v v8, (a0), v4, v8, v0.t # CHECK-ENCODING: [0x2f,0x64,0x45,0xc4] -# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'Zvamo' (Vector AMO Operations) +# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors), 'Zvamo' (Vector AMO Operations) # CHECK-UNKNOWN: 2f 64 45 c4 vamominuei64.v v8, (a0), v4, v8, v0.t # CHECK-INST: vamominuei64.v v8, (a0), v4, v8, v0.t # CHECK-ENCODING: [0x2f,0x74,0x45,0xc4] -# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'Zvamo' (Vector AMO Operations) +# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors), 'Zvamo' (Vector AMO Operations) # CHECK-UNKNOWN: 2f 74 45 c4 vamomaxuei8.v v8, (a0), v4, v8 # CHECK-INST: vamomaxuei8.v v8, (a0), v4, v8 # CHECK-ENCODING: [0x2f,0x04,0x45,0xe6] -# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'Zvamo' (Vector AMO Operations) +# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors), 'Zvamo' (Vector AMO Operations) # CHECK-UNKNOWN: 2f 04 45 e6 vamomaxuei16.v v8, (a0), v4, v8 # CHECK-INST: vamomaxuei16.v v8, (a0), v4, v8 # CHECK-ENCODING: [0x2f,0x54,0x45,0xe6] -# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'Zvamo' (Vector AMO Operations) +# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors), 'Zvamo' (Vector AMO Operations) # CHECK-UNKNOWN: 2f 54 45 e6 vamomaxuei32.v v8, (a0), v4, v8 # CHECK-INST: vamomaxuei32.v v8, (a0), v4, v8 # CHECK-ENCODING: [0x2f,0x64,0x45,0xe6] -# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'Zvamo' (Vector AMO Operations) +# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors), 'Zvamo' (Vector AMO Operations) # CHECK-UNKNOWN: 2f 64 45 e6 vamomaxuei64.v v8, (a0), v4, v8 # CHECK-INST: vamomaxuei64.v v8, (a0), v4, v8 # CHECK-ENCODING: [0x2f,0x74,0x45,0xe6] -# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'Zvamo' (Vector AMO Operations) +# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors), 'Zvamo' (Vector AMO Operations) # CHECK-UNKNOWN: 2f 74 45 e6 vamomaxuei8.v v8, (a0), v4, v8, v0.t # CHECK-INST: vamomaxuei8.v v8, (a0), v4, v8, v0.t # CHECK-ENCODING: [0x2f,0x04,0x45,0xe4] -# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'Zvamo' (Vector AMO Operations) +# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors), 'Zvamo' (Vector AMO Operations) # CHECK-UNKNOWN: 2f 04 45 e4 vamomaxuei16.v v8, (a0), v4, v8, v0.t # CHECK-INST: vamomaxuei16.v v8, (a0), v4, v8, v0.t # CHECK-ENCODING: [0x2f,0x54,0x45,0xe4] -# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'Zvamo' (Vector AMO Operations) +# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors), 'Zvamo' (Vector AMO Operations) # CHECK-UNKNOWN: 2f 54 45 e4 vamomaxuei32.v v8, (a0), v4, v8, v0.t # CHECK-INST: vamomaxuei32.v v8, (a0), v4, v8, v0.t # CHECK-ENCODING: [0x2f,0x64,0x45,0xe4] -# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'Zvamo' (Vector AMO Operations) +# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors), 'Zvamo' (Vector AMO Operations) # CHECK-UNKNOWN: 2f 64 45 e4 vamomaxuei64.v v8, (a0), v4, v8, v0.t # CHECK-INST: vamomaxuei64.v v8, (a0), v4, v8, v0.t # CHECK-ENCODING: [0x2f,0x74,0x45,0xe4] -# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'Zvamo' (Vector AMO Operations) +# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors), 'Zvamo' (Vector AMO Operations) # CHECK-UNKNOWN: 2f 74 45 e4 vamoswapei8.v x0, (a0), v4, v24 # CHECK-INST: vamoswapei8.v x0, (a0), v4, v24 # CHECK-ENCODING: [0x2f,0x0c,0x45,0x0a] -# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'Zvamo' (Vector AMO Operations) +# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors), 'Zvamo' (Vector AMO Operations) # CHECK-UNKNOWN: 2f 0c 45 0a vamoswapei16.v x0, (a0), v4, v24 # CHECK-INST: vamoswapei16.v x0, (a0), v4, v24 # CHECK-ENCODING: [0x2f,0x5c,0x45,0x0a] -# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'Zvamo' (Vector AMO Operations) +# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors), 'Zvamo' (Vector AMO Operations) # CHECK-UNKNOWN: 2f 5c 45 0a vamoswapei32.v x0, (a0), v4, v24 # CHECK-INST: vamoswapei32.v x0, (a0), v4, v24 # CHECK-ENCODING: [0x2f,0x6c,0x45,0x0a] -# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'Zvamo' (Vector AMO Operations) +# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors), 'Zvamo' (Vector AMO Operations) # CHECK-UNKNOWN: 2f 6c 45 0a vamoswapei64.v x0, (a0), v4, v24 # CHECK-INST: vamoswapei64.v x0, (a0), v4, v24 # CHECK-ENCODING: [0x2f,0x7c,0x45,0x0a] -# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'Zvamo' (Vector AMO Operations) +# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors), 'Zvamo' (Vector AMO Operations) # CHECK-UNKNOWN: 2f 7c 45 0a vamoswapei8.v x0, (a0), v4, v24, v0.t # CHECK-INST: vamoswapei8.v x0, (a0), v4, v24, v0.t # CHECK-ENCODING: [0x2f,0x0c,0x45,0x08] -# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'Zvamo' (Vector AMO Operations) +# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors), 'Zvamo' (Vector AMO Operations) # CHECK-UNKNOWN: 2f 0c 45 08 vamoswapei16.v x0, (a0), v4, v24, v0.t # CHECK-INST: vamoswapei16.v x0, (a0), v4, v24, v0.t # CHECK-ENCODING: [0x2f,0x5c,0x45,0x08] -# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'Zvamo' (Vector AMO Operations) +# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors), 'Zvamo' (Vector AMO Operations) # CHECK-UNKNOWN: 2f 5c 45 08 vamoswapei32.v x0, (a0), v4, v24, v0.t # CHECK-INST: vamoswapei32.v x0, (a0), v4, v24, v0.t # CHECK-ENCODING: [0x2f,0x6c,0x45,0x08] -# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'Zvamo' (Vector AMO Operations) +# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors), 'Zvamo' (Vector AMO Operations) # CHECK-UNKNOWN: 2f 6c 45 08 vamoswapei64.v x0, (a0), v4, v24, v0.t # CHECK-INST: vamoswapei64.v x0, (a0), v4, v24, v0.t # CHECK-ENCODING: [0x2f,0x7c,0x45,0x08] -# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'Zvamo' (Vector AMO Operations) +# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors), 'Zvamo' (Vector AMO Operations) # CHECK-UNKNOWN: 2f 7c 45 08 vamoaddei8.v x0, (a0), v4, v24 # CHECK-INST: vamoaddei8.v x0, (a0), v4, v24 # CHECK-ENCODING: [0x2f,0x0c,0x45,0x02] -# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'Zvamo' (Vector AMO Operations) +# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors), 'Zvamo' (Vector AMO Operations) # CHECK-UNKNOWN: 2f 0c 45 02 vamoaddei16.v x0, (a0), v4, v24 # CHECK-INST: vamoaddei16.v x0, (a0), v4, v24 # CHECK-ENCODING: [0x2f,0x5c,0x45,0x02] -# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'Zvamo' (Vector AMO Operations) +# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors), 'Zvamo' (Vector AMO Operations) # CHECK-UNKNOWN: 2f 5c 45 02 vamoaddei32.v x0, (a0), v4, v24 # CHECK-INST: vamoaddei32.v x0, (a0), v4, v24 # CHECK-ENCODING: [0x2f,0x6c,0x45,0x02] -# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'Zvamo' (Vector AMO Operations) +# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors), 'Zvamo' (Vector AMO Operations) # CHECK-UNKNOWN: 2f 6c 45 02 vamoaddei64.v x0, (a0), v4, v24 # CHECK-INST: vamoaddei64.v x0, (a0), v4, v24 # CHECK-ENCODING: [0x2f,0x7c,0x45,0x02] -# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'Zvamo' (Vector AMO Operations) +# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors), 'Zvamo' (Vector AMO Operations) # CHECK-UNKNOWN: 2f 7c 45 02 vamoaddei8.v x0, (a0), v4, v24, v0.t # CHECK-INST: vamoaddei8.v x0, (a0), v4, v24, v0.t # CHECK-ENCODING: [0x2f,0x0c,0x45,0x00] -# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'Zvamo' (Vector AMO Operations) +# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors), 'Zvamo' (Vector AMO Operations) # CHECK-UNKNOWN: 2f 0c 45 00 vamoaddei16.v x0, (a0), v4, v24, v0.t # CHECK-INST: vamoaddei16.v x0, (a0), v4, v24, v0.t # CHECK-ENCODING: [0x2f,0x5c,0x45,0x00] -# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'Zvamo' (Vector AMO Operations) +# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors), 'Zvamo' (Vector AMO Operations) # CHECK-UNKNOWN: 2f 5c 45 00 vamoaddei32.v x0, (a0), v4, v24, v0.t # CHECK-INST: vamoaddei32.v x0, (a0), v4, v24, v0.t # CHECK-ENCODING: [0x2f,0x6c,0x45,0x00] -# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'Zvamo' (Vector AMO Operations) +# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors), 'Zvamo' (Vector AMO Operations) # CHECK-UNKNOWN: 2f 6c 45 00 vamoaddei64.v x0, (a0), v4, v24, v0.t # CHECK-INST: vamoaddei64.v x0, (a0), v4, v24, v0.t # CHECK-ENCODING: [0x2f,0x7c,0x45,0x00] -# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'Zvamo' (Vector AMO Operations) +# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors), 'Zvamo' (Vector AMO Operations) # CHECK-UNKNOWN: 2f 7c 45 00 vamoxorei8.v x0, (a0), v4, v24 # CHECK-INST: vamoxorei8.v x0, (a0), v4, v24 # CHECK-ENCODING: [0x2f,0x0c,0x45,0x22] -# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'Zvamo' (Vector AMO Operations) +# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors), 'Zvamo' (Vector AMO Operations) # CHECK-UNKNOWN: 2f 0c 45 22 vamoxorei16.v x0, (a0), v4, v24 # CHECK-INST: vamoxorei16.v x0, (a0), v4, v24 # CHECK-ENCODING: [0x2f,0x5c,0x45,0x22] -# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'Zvamo' (Vector AMO Operations) +# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors), 'Zvamo' (Vector AMO Operations) # CHECK-UNKNOWN: 2f 5c 45 22 vamoxorei32.v x0, (a0), v4, v24 # CHECK-INST: vamoxorei32.v x0, (a0), v4, v24 # CHECK-ENCODING: [0x2f,0x6c,0x45,0x22] -# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'Zvamo' (Vector AMO Operations) +# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors), 'Zvamo' (Vector AMO Operations) # CHECK-UNKNOWN: 2f 6c 45 22 vamoxorei64.v x0, (a0), v4, v24 # CHECK-INST: vamoxorei64.v x0, (a0), v4, v24 # CHECK-ENCODING: [0x2f,0x7c,0x45,0x22] -# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'Zvamo' (Vector AMO Operations) +# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors), 'Zvamo' (Vector AMO Operations) # CHECK-UNKNOWN: 2f 7c 45 22 vamoxorei8.v x0, (a0), v4, v24, v0.t # CHECK-INST: vamoxorei8.v x0, (a0), v4, v24, v0.t # CHECK-ENCODING: [0x2f,0x0c,0x45,0x20] -# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'Zvamo' (Vector AMO Operations) +# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors), 'Zvamo' (Vector AMO Operations) # CHECK-UNKNOWN: 2f 0c 45 20 vamoxorei16.v x0, (a0), v4, v24, v0.t # CHECK-INST: vamoxorei16.v x0, (a0), v4, v24, v0.t # CHECK-ENCODING: [0x2f,0x5c,0x45,0x20] -# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'Zvamo' (Vector AMO Operations) +# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors), 'Zvamo' (Vector AMO Operations) # CHECK-UNKNOWN: 2f 5c 45 20 vamoxorei32.v x0, (a0), v4, v24, v0.t # CHECK-INST: vamoxorei32.v x0, (a0), v4, v24, v0.t # CHECK-ENCODING: [0x2f,0x6c,0x45,0x20] -# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'Zvamo' (Vector AMO Operations) +# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors), 'Zvamo' (Vector AMO Operations) # CHECK-UNKNOWN: 2f 6c 45 20 vamoxorei64.v x0, (a0), v4, v24, v0.t # CHECK-INST: vamoxorei64.v x0, (a0), v4, v24, v0.t # CHECK-ENCODING: [0x2f,0x7c,0x45,0x20] -# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'Zvamo' (Vector AMO Operations) +# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors), 'Zvamo' (Vector AMO Operations) # CHECK-UNKNOWN: 2f 7c 45 20 vamoandei8.v x0, (a0), v4, v24 # CHECK-INST: vamoandei8.v x0, (a0), v4, v24 # CHECK-ENCODING: [0x2f,0x0c,0x45,0x62] -# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'Zvamo' (Vector AMO Operations) +# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors), 'Zvamo' (Vector AMO Operations) # CHECK-UNKNOWN: 2f 0c 45 62 vamoandei16.v x0, (a0), v4, v24 # CHECK-INST: vamoandei16.v x0, (a0), v4, v24 # CHECK-ENCODING: [0x2f,0x5c,0x45,0x62] -# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'Zvamo' (Vector AMO Operations) +# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors), 'Zvamo' (Vector AMO Operations) # CHECK-UNKNOWN: 2f 5c 45 62 vamoandei32.v x0, (a0), v4, v24 # CHECK-INST: vamoandei32.v x0, (a0), v4, v24 # CHECK-ENCODING: [0x2f,0x6c,0x45,0x62] -# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'Zvamo' (Vector AMO Operations) +# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors), 'Zvamo' (Vector AMO Operations) # CHECK-UNKNOWN: 2f 6c 45 62 vamoandei64.v x0, (a0), v4, v24 # CHECK-INST: vamoandei64.v x0, (a0), v4, v24 # CHECK-ENCODING: [0x2f,0x7c,0x45,0x62] -# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'Zvamo' (Vector AMO Operations) +# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors), 'Zvamo' (Vector AMO Operations) # CHECK-UNKNOWN: 2f 7c 45 62 vamoandei8.v x0, (a0), v4, v24, v0.t # CHECK-INST: vamoandei8.v x0, (a0), v4, v24, v0.t # CHECK-ENCODING: [0x2f,0x0c,0x45,0x60] -# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'Zvamo' (Vector AMO Operations) +# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors), 'Zvamo' (Vector AMO Operations) # CHECK-UNKNOWN: 2f 0c 45 60 vamoandei16.v x0, (a0), v4, v24, v0.t # CHECK-INST: vamoandei16.v x0, (a0), v4, v24, v0.t # CHECK-ENCODING: [0x2f,0x5c,0x45,0x60] -# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'Zvamo' (Vector AMO Operations) +# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors), 'Zvamo' (Vector AMO Operations) # CHECK-UNKNOWN: 2f 5c 45 60 vamoandei32.v x0, (a0), v4, v24, v0.t # CHECK-INST: vamoandei32.v x0, (a0), v4, v24, v0.t # CHECK-ENCODING: [0x2f,0x6c,0x45,0x60] -# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'Zvamo' (Vector AMO Operations) +# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors), 'Zvamo' (Vector AMO Operations) # CHECK-UNKNOWN: 2f 6c 45 60 vamoandei64.v x0, (a0), v4, v24, v0.t # CHECK-INST: vamoandei64.v x0, (a0), v4, v24, v0.t # CHECK-ENCODING: [0x2f,0x7c,0x45,0x60] -# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'Zvamo' (Vector AMO Operations) +# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors), 'Zvamo' (Vector AMO Operations) # CHECK-UNKNOWN: 2f 7c 45 60 vamoorei8.v x0, (a0), v4, v24 # CHECK-INST: vamoorei8.v x0, (a0), v4, v24 # CHECK-ENCODING: [0x2f,0x0c,0x45,0x42] -# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'Zvamo' (Vector AMO Operations) +# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors), 'Zvamo' (Vector AMO Operations) # CHECK-UNKNOWN: 2f 0c 45 42 vamoorei16.v x0, (a0), v4, v24 # CHECK-INST: vamoorei16.v x0, (a0), v4, v24 # CHECK-ENCODING: [0x2f,0x5c,0x45,0x42] -# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'Zvamo' (Vector AMO Operations) +# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors), 'Zvamo' (Vector AMO Operations) # CHECK-UNKNOWN: 2f 5c 45 42 vamoorei32.v x0, (a0), v4, v24 # CHECK-INST: vamoorei32.v x0, (a0), v4, v24 # CHECK-ENCODING: [0x2f,0x6c,0x45,0x42] -# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'Zvamo' (Vector AMO Operations) +# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors), 'Zvamo' (Vector AMO Operations) # CHECK-UNKNOWN: 2f 6c 45 42 vamoorei64.v x0, (a0), v4, v24 # CHECK-INST: vamoorei64.v x0, (a0), v4, v24 # CHECK-ENCODING: [0x2f,0x7c,0x45,0x42] -# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'Zvamo' (Vector AMO Operations) +# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors), 'Zvamo' (Vector AMO Operations) # CHECK-UNKNOWN: 2f 7c 45 42 + + vamoorei8.v x0, (a0), v4, v24, v0.t # CHECK-INST: vamoorei8.v x0, (a0), v4, v24, v0.t # CHECK-ENCODING: [0x2f,0x0c,0x45,0x40] -# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'Zvamo' (Vector AMO Operations) +# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors), 'Zvamo' (Vector AMO Operations) # CHECK-UNKNOWN: 2f 0c 45 40 vamoorei16.v x0, (a0), v4, v24, v0.t # CHECK-INST: vamoorei16.v x0, (a0), v4, v24, v0.t # CHECK-ENCODING: [0x2f,0x5c,0x45,0x40] -# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'Zvamo' (Vector AMO Operations) +# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors), 'Zvamo' (Vector AMO Operations) # CHECK-UNKNOWN: 2f 5c 45 40 vamoorei32.v x0, (a0), v4, v24, v0.t # CHECK-INST: vamoorei32.v x0, (a0), v4, v24, v0.t # CHECK-ENCODING: [0x2f,0x6c,0x45,0x40] -# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'Zvamo' (Vector AMO Operations) +# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors), 'Zvamo' (Vector AMO Operations) # CHECK-UNKNOWN: 2f 6c 45 40 vamoorei64.v x0, (a0), v4, v24, v0.t # CHECK-INST: vamoorei64.v x0, (a0), v4, v24, v0.t # CHECK-ENCODING: [0x2f,0x7c,0x45,0x40] -# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'Zvamo' (Vector AMO Operations) +# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors), 'Zvamo' (Vector AMO Operations) # CHECK-UNKNOWN: 2f 7c 45 40 vamominei8.v x0, (a0), v4, v24 # CHECK-INST: vamominei8.v x0, (a0), v4, v24 # CHECK-ENCODING: [0x2f,0x0c,0x45,0x82] -# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'Zvamo' (Vector AMO Operations) +# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors), 'Zvamo' (Vector AMO Operations) # CHECK-UNKNOWN: 2f 0c 45 82 vamominei16.v x0, (a0), v4, v24 # CHECK-INST: vamominei16.v x0, (a0), v4, v24 # CHECK-ENCODING: [0x2f,0x5c,0x45,0x82] -# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'Zvamo' (Vector AMO Operations) +# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors), 'Zvamo' (Vector AMO Operations) # CHECK-UNKNOWN: 2f 5c 45 82 vamominei32.v x0, (a0), v4, v24 # CHECK-INST: vamominei32.v x0, (a0), v4, v24 # CHECK-ENCODING: [0x2f,0x6c,0x45,0x82] -# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'Zvamo' (Vector AMO Operations) +# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors), 'Zvamo' (Vector AMO Operations) # CHECK-UNKNOWN: 2f 6c 45 82 vamominei64.v x0, (a0), v4, v24 # CHECK-INST: vamominei64.v x0, (a0), v4, v24 # CHECK-ENCODING: [0x2f,0x7c,0x45,0x82] -# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'Zvamo' (Vector AMO Operations) +# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors), 'Zvamo' (Vector AMO Operations) # CHECK-UNKNOWN: 2f 7c 45 82 vamominei8.v x0, (a0), v4, v24, v0.t # CHECK-INST: vamominei8.v x0, (a0), v4, v24, v0.t # CHECK-ENCODING: [0x2f,0x0c,0x45,0x80] -# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'Zvamo' (Vector AMO Operations) +# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors), 'Zvamo' (Vector AMO Operations) # CHECK-UNKNOWN: 2f 0c 45 80 vamominei16.v x0, (a0), v4, v24, v0.t # CHECK-INST: vamominei16.v x0, (a0), v4, v24, v0.t # CHECK-ENCODING: [0x2f,0x5c,0x45,0x80] -# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'Zvamo' (Vector AMO Operations) +# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors), 'Zvamo' (Vector AMO Operations) # CHECK-UNKNOWN: 2f 5c 45 80 vamominei32.v x0, (a0), v4, v24, v0.t # CHECK-INST: vamominei32.v x0, (a0), v4, v24, v0.t # CHECK-ENCODING: [0x2f,0x6c,0x45,0x80] -# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'Zvamo' (Vector AMO Operations) +# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors), 'Zvamo' (Vector AMO Operations) # CHECK-UNKNOWN: 2f 6c 45 80 vamominei64.v x0, (a0), v4, v24, v0.t # CHECK-INST: vamominei64.v x0, (a0), v4, v24, v0.t # CHECK-ENCODING: [0x2f,0x7c,0x45,0x80] -# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'Zvamo' (Vector AMO Operations) +# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors), 'Zvamo' (Vector AMO Operations) # CHECK-UNKNOWN: 2f 7c 45 80 vamomaxei8.v x0, (a0), v4, v24 # CHECK-INST: vamomaxei8.v x0, (a0), v4, v24 # CHECK-ENCODING: [0x2f,0x0c,0x45,0xa2] -# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'Zvamo' (Vector AMO Operations) +# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors), 'Zvamo' (Vector AMO Operations) # CHECK-UNKNOWN: 2f 0c 45 a2 vamomaxei16.v x0, (a0), v4, v24 # CHECK-INST: vamomaxei16.v x0, (a0), v4, v24 # CHECK-ENCODING: [0x2f,0x5c,0x45,0xa2] -# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'Zvamo' (Vector AMO Operations) +# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors), 'Zvamo' (Vector AMO Operations) # CHECK-UNKNOWN: 2f 5c 45 a2 vamomaxei32.v x0, (a0), v4, v24 # CHECK-INST: vamomaxei32.v x0, (a0), v4, v24 # CHECK-ENCODING: [0x2f,0x6c,0x45,0xa2] -# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'Zvamo' (Vector AMO Operations) +# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors), 'Zvamo' (Vector AMO Operations) # CHECK-UNKNOWN: 2f 6c 45 a2 vamomaxei64.v x0, (a0), v4, v24 # CHECK-INST: vamomaxei64.v x0, (a0), v4, v24 # CHECK-ENCODING: [0x2f,0x7c,0x45,0xa2] -# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'Zvamo' (Vector AMO Operations) +# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors), 'Zvamo' (Vector AMO Operations) # CHECK-UNKNOWN: 2f 7c 45 a2 vamomaxei8.v x0, (a0), v4, v24, v0.t # CHECK-INST: vamomaxei8.v x0, (a0), v4, v24, v0.t # CHECK-ENCODING: [0x2f,0x0c,0x45,0xa0] -# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'Zvamo' (Vector AMO Operations) +# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors), 'Zvamo' (Vector AMO Operations) # CHECK-UNKNOWN: 2f 0c 45 a0 vamomaxei16.v x0, (a0), v4, v24, v0.t # CHECK-INST: vamomaxei16.v x0, (a0), v4, v24, v0.t # CHECK-ENCODING: [0x2f,0x5c,0x45,0xa0] -# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'Zvamo' (Vector AMO Operations) +# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors), 'Zvamo' (Vector AMO Operations) # CHECK-UNKNOWN: 2f 5c 45 a0 vamomaxei32.v x0, (a0), v4, v24, v0.t # CHECK-INST: vamomaxei32.v x0, (a0), v4, v24, v0.t # CHECK-ENCODING: [0x2f,0x6c,0x45,0xa0] -# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'Zvamo' (Vector AMO Operations) +# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors), 'Zvamo' (Vector AMO Operations) # CHECK-UNKNOWN: 2f 6c 45 a0 vamomaxei64.v x0, (a0), v4, v24, v0.t # CHECK-INST: vamomaxei64.v x0, (a0), v4, v24, v0.t # CHECK-ENCODING: [0x2f,0x7c,0x45,0xa0] -# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'Zvamo' (Vector AMO Operations) +# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors), 'Zvamo' (Vector AMO Operations) # CHECK-UNKNOWN: 2f 7c 45 a0 vamominuei8.v x0, (a0), v4, v24 # CHECK-INST: vamominuei8.v x0, (a0), v4, v24 # CHECK-ENCODING: [0x2f,0x0c,0x45,0xc2] -# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'Zvamo' (Vector AMO Operations) +# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors), 'Zvamo' (Vector AMO Operations) # CHECK-UNKNOWN: 2f 0c 45 c2 vamominuei16.v x0, (a0), v4, v24 # CHECK-INST: vamominuei16.v x0, (a0), v4, v24 # CHECK-ENCODING: [0x2f,0x5c,0x45,0xc2] -# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'Zvamo' (Vector AMO Operations) +# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors), 'Zvamo' (Vector AMO Operations) # CHECK-UNKNOWN: 2f 5c 45 c2 vamominuei32.v x0, (a0), v4, v24 # CHECK-INST: vamominuei32.v x0, (a0), v4, v24 # CHECK-ENCODING: [0x2f,0x6c,0x45,0xc2] -# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'Zvamo' (Vector AMO Operations) +# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors), 'Zvamo' (Vector AMO Operations) # CHECK-UNKNOWN: 2f 6c 45 c2 vamominuei64.v x0, (a0), v4, v24 # CHECK-INST: vamominuei64.v x0, (a0), v4, v24 # CHECK-ENCODING: [0x2f,0x7c,0x45,0xc2] -# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'Zvamo' (Vector AMO Operations) +# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors), 'Zvamo' (Vector AMO Operations) # CHECK-UNKNOWN: 2f 7c 45 c2 vamominuei8.v x0, (a0), v4, v24, v0.t # CHECK-INST: vamominuei8.v x0, (a0), v4, v24, v0.t # CHECK-ENCODING: [0x2f,0x0c,0x45,0xc0] -# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'Zvamo' (Vector AMO Operations) +# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors), 'Zvamo' (Vector AMO Operations) # CHECK-UNKNOWN: 2f 0c 45 c0 vamominuei16.v x0, (a0), v4, v24, v0.t # CHECK-INST: vamominuei16.v x0, (a0), v4, v24, v0.t # CHECK-ENCODING: [0x2f,0x5c,0x45,0xc0] -# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'Zvamo' (Vector AMO Operations) +# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors), 'Zvamo' (Vector AMO Operations) # CHECK-UNKNOWN: 2f 5c 45 c0 vamominuei32.v x0, (a0), v4, v24, v0.t # CHECK-INST: vamominuei32.v x0, (a0), v4, v24, v0.t # CHECK-ENCODING: [0x2f,0x6c,0x45,0xc0] -# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'Zvamo' (Vector AMO Operations) +# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors), 'Zvamo' (Vector AMO Operations) # CHECK-UNKNOWN: 2f 6c 45 c0 vamominuei64.v x0, (a0), v4, v24, v0.t # CHECK-INST: vamominuei64.v x0, (a0), v4, v24, v0.t # CHECK-ENCODING: [0x2f,0x7c,0x45,0xc0] -# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'Zvamo' (Vector AMO Operations) +# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors), 'Zvamo' (Vector AMO Operations) # CHECK-UNKNOWN: 2f 7c 45 c0 vamomaxuei8.v x0, (a0), v4, v24 # CHECK-INST: vamomaxuei8.v x0, (a0), v4, v24 # CHECK-ENCODING: [0x2f,0x0c,0x45,0xe2] -# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'Zvamo' (Vector AMO Operations) +# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors), 'Zvamo' (Vector AMO Operations) # CHECK-UNKNOWN: 2f 0c 45 e2 vamomaxuei16.v x0, (a0), v4, v24 # CHECK-INST: vamomaxuei16.v x0, (a0), v4, v24 # CHECK-ENCODING: [0x2f,0x5c,0x45,0xe2] -# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'Zvamo' (Vector AMO Operations) +# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors), 'Zvamo' (Vector AMO Operations) # CHECK-UNKNOWN: 2f 5c 45 e2 vamomaxuei32.v x0, (a0), v4, v24 # CHECK-INST: vamomaxuei32.v x0, (a0), v4, v24 # CHECK-ENCODING: [0x2f,0x6c,0x45,0xe2] -# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'Zvamo' (Vector AMO Operations) +# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors), 'Zvamo' (Vector AMO Operations) # CHECK-UNKNOWN: 2f 6c 45 e2 vamomaxuei64.v x0, (a0), v4, v24 # CHECK-INST: vamomaxuei64.v x0, (a0), v4, v24 # CHECK-ENCODING: [0x2f,0x7c,0x45,0xe2] -# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'Zvamo' (Vector AMO Operations) +# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors), 'Zvamo' (Vector AMO Operations) # CHECK-UNKNOWN: 2f 7c 45 e2 vamomaxuei8.v x0, (a0), v4, v24, v0.t # CHECK-INST: vamomaxuei8.v x0, (a0), v4, v24, v0.t # CHECK-ENCODING: [0x2f,0x0c,0x45,0xe0] -# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'Zvamo' (Vector AMO Operations) +# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors), 'Zvamo' (Vector AMO Operations) # CHECK-UNKNOWN: 2f 0c 45 e0 vamomaxuei16.v x0, (a0), v4, v24, v0.t # CHECK-INST: vamomaxuei16.v x0, (a0), v4, v24, v0.t # CHECK-ENCODING: [0x2f,0x5c,0x45,0xe0] -# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'Zvamo' (Vector AMO Operations) +# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors), 'Zvamo' (Vector AMO Operations) # CHECK-UNKNOWN: 2f 5c 45 e0 vamomaxuei32.v x0, (a0), v4, v24, v0.t # CHECK-INST: vamomaxuei32.v x0, (a0), v4, v24, v0.t # CHECK-ENCODING: [0x2f,0x6c,0x45,0xe0] -# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'Zvamo' (Vector AMO Operations) +# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors), 'Zvamo' (Vector AMO Operations) # CHECK-UNKNOWN: 2f 6c 45 e0 vamomaxuei64.v x0, (a0), v4, v24, v0.t # CHECK-INST: vamomaxuei64.v x0, (a0), v4, v24, v0.t # CHECK-ENCODING: [0x2f,0x7c,0x45,0xe0] -# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'Zvamo' (Vector AMO Operations) +# CHECK-ERROR: instruction requires the following: 'A' (Atomic Instructions), 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors), 'Zvamo' (Vector AMO Operations) # CHECK-UNKNOWN: 2f 7c 45 e0 diff --git a/llvm/test/MC/RISCV/rvv/zvlsseg.s b/llvm/test/MC/RISCV/rvv/zvlsseg.s --- a/llvm/test/MC/RISCV/rvv/zvlsseg.s +++ b/llvm/test/MC/RISCV/rvv/zvlsseg.s @@ -14,3023 +14,3023 @@ vlseg2e8.v v8, (a0), v0.t # CHECK-INST: vlseg2e8.v v8, (a0), v0.t # CHECK-ENCODING: [0x07,0x04,0x05,0x20] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 04 05 20 vlseg2e8.v v8, (a0) # CHECK-INST: vlseg2e8.v v8, (a0) # CHECK-ENCODING: [0x07,0x04,0x05,0x22] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 04 05 22 vlseg2e16.v v8, (a0), v0.t # CHECK-INST: vlseg2e16.v v8, (a0), v0.t # CHECK-ENCODING: [0x07,0x54,0x05,0x20] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 54 05 20 vlseg2e16.v v8, (a0) # CHECK-INST: vlseg2e16.v v8, (a0) # CHECK-ENCODING: [0x07,0x54,0x05,0x22] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 54 05 22 vlseg2e32.v v8, (a0), v0.t # CHECK-INST: vlseg2e32.v v8, (a0), v0.t # CHECK-ENCODING: [0x07,0x64,0x05,0x20] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 64 05 20 vlseg2e32.v v8, (a0) # CHECK-INST: vlseg2e32.v v8, (a0) # CHECK-ENCODING: [0x07,0x64,0x05,0x22] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 64 05 22 vlseg2e64.v v8, (a0), v0.t # CHECK-INST: vlseg2e64.v v8, (a0), v0.t # CHECK-ENCODING: [0x07,0x74,0x05,0x20] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 74 05 20 vlseg2e64.v v8, (a0) # CHECK-INST: vlseg2e64.v v8, (a0) # CHECK-ENCODING: [0x07,0x74,0x05,0x22] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 74 05 22 vlseg2e8ff.v v8, (a0), v0.t # CHECK-INST: vlseg2e8ff.v v8, (a0), v0.t # CHECK-ENCODING: [0x07,0x04,0x05,0x21] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 04 05 21 vlseg2e8ff.v v8, (a0) # CHECK-INST: vlseg2e8ff.v v8, (a0) # CHECK-ENCODING: [0x07,0x04,0x05,0x23] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 04 05 23 vlseg2e16ff.v v8, (a0), v0.t # CHECK-INST: vlseg2e16ff.v v8, (a0), v0.t # CHECK-ENCODING: [0x07,0x54,0x05,0x21] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 54 05 21 vlseg2e16ff.v v8, (a0) # CHECK-INST: vlseg2e16ff.v v8, (a0) # CHECK-ENCODING: [0x07,0x54,0x05,0x23] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 54 05 23 vlseg2e32ff.v v8, (a0), v0.t # CHECK-INST: vlseg2e32ff.v v8, (a0), v0.t # CHECK-ENCODING: [0x07,0x64,0x05,0x21] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 64 05 21 vlseg2e32ff.v v8, (a0) # CHECK-INST: vlseg2e32ff.v v8, (a0) # CHECK-ENCODING: [0x07,0x64,0x05,0x23] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 64 05 23 vlseg2e64ff.v v8, (a0), v0.t # CHECK-INST: vlseg2e64ff.v v8, (a0), v0.t # CHECK-ENCODING: [0x07,0x74,0x05,0x21] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 74 05 21 vlseg2e64ff.v v8, (a0) # CHECK-INST: vlseg2e64ff.v v8, (a0) # CHECK-ENCODING: [0x07,0x74,0x05,0x23] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 74 05 23 vlsseg2e8.v v8, (a0), a1, v0.t # CHECK-INST: vlsseg2e8.v v8, (a0), a1, v0.t # CHECK-ENCODING: [0x07,0x04,0xb5,0x28] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 04 b5 28 vlsseg2e8.v v8, (a0), a1 # CHECK-INST: vlsseg2e8.v v8, (a0), a1 # CHECK-ENCODING: [0x07,0x04,0xb5,0x2a] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 04 b5 2a vlsseg2e16.v v8, (a0), a1, v0.t # CHECK-INST: vlsseg2e16.v v8, (a0), a1, v0.t # CHECK-ENCODING: [0x07,0x54,0xb5,0x28] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 54 b5 28 vlsseg2e16.v v8, (a0), a1 # CHECK-INST: vlsseg2e16.v v8, (a0), a1 # CHECK-ENCODING: [0x07,0x54,0xb5,0x2a] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 54 b5 2a vlsseg2e32.v v8, (a0), a1, v0.t # CHECK-INST: vlsseg2e32.v v8, (a0), a1, v0.t # CHECK-ENCODING: [0x07,0x64,0xb5,0x28] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 64 b5 28 vlsseg2e32.v v8, (a0), a1 # CHECK-INST: vlsseg2e32.v v8, (a0), a1 # CHECK-ENCODING: [0x07,0x64,0xb5,0x2a] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 64 b5 2a vlsseg2e64.v v8, (a0), a1, v0.t # CHECK-INST: vlsseg2e64.v v8, (a0), a1, v0.t # CHECK-ENCODING: [0x07,0x74,0xb5,0x28] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 74 b5 28 vlsseg2e64.v v8, (a0), a1 # CHECK-INST: vlsseg2e64.v v8, (a0), a1 # CHECK-ENCODING: [0x07,0x74,0xb5,0x2a] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 74 b5 2a vluxseg2ei8.v v8, (a0), v4, v0.t # CHECK-INST: vluxseg2ei8.v v8, (a0), v4, v0.t # CHECK-ENCODING: [0x07,0x04,0x45,0x24] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 04 45 24 vluxseg2ei8.v v8, (a0), v4 # CHECK-INST: vluxseg2ei8.v v8, (a0), v4 # CHECK-ENCODING: [0x07,0x04,0x45,0x26] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 04 45 26 vluxseg2ei16.v v8, (a0), v4, v0.t # CHECK-INST: vluxseg2ei16.v v8, (a0), v4, v0.t # CHECK-ENCODING: [0x07,0x54,0x45,0x24] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 54 45 24 vluxseg2ei16.v v8, (a0), v4 # CHECK-INST: vluxseg2ei16.v v8, (a0), v4 # CHECK-ENCODING: [0x07,0x54,0x45,0x26] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 54 45 26 vluxseg2ei32.v v8, (a0), v4, v0.t # CHECK-INST: vluxseg2ei32.v v8, (a0), v4, v0.t # CHECK-ENCODING: [0x07,0x64,0x45,0x24] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 64 45 24 vluxseg2ei32.v v8, (a0), v4 # CHECK-INST: vluxseg2ei32.v v8, (a0), v4 # CHECK-ENCODING: [0x07,0x64,0x45,0x26] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 64 45 26 vluxseg2ei64.v v8, (a0), v4, v0.t # CHECK-INST: vluxseg2ei64.v v8, (a0), v4, v0.t # CHECK-ENCODING: [0x07,0x74,0x45,0x24] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 74 45 24 vluxseg2ei64.v v8, (a0), v4 # CHECK-INST: vluxseg2ei64.v v8, (a0), v4 # CHECK-ENCODING: [0x07,0x74,0x45,0x26] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 74 45 26 vloxseg2ei8.v v8, (a0), v4, v0.t # CHECK-INST: vloxseg2ei8.v v8, (a0), v4, v0.t # CHECK-ENCODING: [0x07,0x04,0x45,0x2c] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 04 45 2c vloxseg2ei8.v v8, (a0), v4 # CHECK-INST: vloxseg2ei8.v v8, (a0), v4 # CHECK-ENCODING: [0x07,0x04,0x45,0x2e] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 04 45 2e vloxseg2ei16.v v8, (a0), v4, v0.t # CHECK-INST: vloxseg2ei16.v v8, (a0), v4, v0.t # CHECK-ENCODING: [0x07,0x54,0x45,0x2c] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 54 45 2c vloxseg2ei16.v v8, (a0), v4 # CHECK-INST: vloxseg2ei16.v v8, (a0), v4 # CHECK-ENCODING: [0x07,0x54,0x45,0x2e] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 54 45 2e vloxseg2ei32.v v8, (a0), v4, v0.t # CHECK-INST: vloxseg2ei32.v v8, (a0), v4, v0.t # CHECK-ENCODING: [0x07,0x64,0x45,0x2c] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 64 45 2c vloxseg2ei32.v v8, (a0), v4 # CHECK-INST: vloxseg2ei32.v v8, (a0), v4 # CHECK-ENCODING: [0x07,0x64,0x45,0x2e] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 64 45 2e vloxseg2ei64.v v8, (a0), v4, v0.t # CHECK-INST: vloxseg2ei64.v v8, (a0), v4, v0.t # CHECK-ENCODING: [0x07,0x74,0x45,0x2c] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 74 45 2c vloxseg2ei64.v v8, (a0), v4 # CHECK-INST: vloxseg2ei64.v v8, (a0), v4 # CHECK-ENCODING: [0x07,0x74,0x45,0x2e] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 74 45 2e vlseg3e8.v v8, (a0), v0.t # CHECK-INST: vlseg3e8.v v8, (a0), v0.t # CHECK-ENCODING: [0x07,0x04,0x05,0x40] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 04 05 40 vlseg3e8.v v8, (a0) # CHECK-INST: vlseg3e8.v v8, (a0) # CHECK-ENCODING: [0x07,0x04,0x05,0x42] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 04 05 42 vlseg3e16.v v8, (a0), v0.t # CHECK-INST: vlseg3e16.v v8, (a0), v0.t # CHECK-ENCODING: [0x07,0x54,0x05,0x40] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 54 05 40 vlseg3e16.v v8, (a0) # CHECK-INST: vlseg3e16.v v8, (a0) # CHECK-ENCODING: [0x07,0x54,0x05,0x42] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 54 05 42 vlseg3e32.v v8, (a0), v0.t # CHECK-INST: vlseg3e32.v v8, (a0), v0.t # CHECK-ENCODING: [0x07,0x64,0x05,0x40] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 64 05 40 vlseg3e32.v v8, (a0) # CHECK-INST: vlseg3e32.v v8, (a0) # CHECK-ENCODING: [0x07,0x64,0x05,0x42] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 64 05 42 vlseg3e64.v v8, (a0), v0.t # CHECK-INST: vlseg3e64.v v8, (a0), v0.t # CHECK-ENCODING: [0x07,0x74,0x05,0x40] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 74 05 40 vlseg3e64.v v8, (a0) # CHECK-INST: vlseg3e64.v v8, (a0) # CHECK-ENCODING: [0x07,0x74,0x05,0x42] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 74 05 42 vlseg3e8ff.v v8, (a0), v0.t # CHECK-INST: vlseg3e8ff.v v8, (a0), v0.t # CHECK-ENCODING: [0x07,0x04,0x05,0x41] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 04 05 41 vlseg3e8ff.v v8, (a0) # CHECK-INST: vlseg3e8ff.v v8, (a0) # CHECK-ENCODING: [0x07,0x04,0x05,0x43] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 04 05 43 vlseg3e16ff.v v8, (a0), v0.t # CHECK-INST: vlseg3e16ff.v v8, (a0), v0.t # CHECK-ENCODING: [0x07,0x54,0x05,0x41] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 54 05 41 vlseg3e16ff.v v8, (a0) # CHECK-INST: vlseg3e16ff.v v8, (a0) # CHECK-ENCODING: [0x07,0x54,0x05,0x43] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 54 05 43 vlseg3e32ff.v v8, (a0), v0.t # CHECK-INST: vlseg3e32ff.v v8, (a0), v0.t # CHECK-ENCODING: [0x07,0x64,0x05,0x41] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 64 05 41 vlseg3e32ff.v v8, (a0) # CHECK-INST: vlseg3e32ff.v v8, (a0) # CHECK-ENCODING: [0x07,0x64,0x05,0x43] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 64 05 43 vlseg3e64ff.v v8, (a0), v0.t # CHECK-INST: vlseg3e64ff.v v8, (a0), v0.t # CHECK-ENCODING: [0x07,0x74,0x05,0x41] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 74 05 41 vlseg3e64ff.v v8, (a0) # CHECK-INST: vlseg3e64ff.v v8, (a0) # CHECK-ENCODING: [0x07,0x74,0x05,0x43] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 74 05 43 vlsseg3e8.v v8, (a0), a1, v0.t # CHECK-INST: vlsseg3e8.v v8, (a0), a1, v0.t # CHECK-ENCODING: [0x07,0x04,0xb5,0x48] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 04 b5 48 vlsseg3e8.v v8, (a0), a1 # CHECK-INST: vlsseg3e8.v v8, (a0), a1 # CHECK-ENCODING: [0x07,0x04,0xb5,0x4a] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 04 b5 4a vlsseg3e16.v v8, (a0), a1, v0.t # CHECK-INST: vlsseg3e16.v v8, (a0), a1, v0.t # CHECK-ENCODING: [0x07,0x54,0xb5,0x48] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 54 b5 48 vlsseg3e16.v v8, (a0), a1 # CHECK-INST: vlsseg3e16.v v8, (a0), a1 # CHECK-ENCODING: [0x07,0x54,0xb5,0x4a] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 54 b5 4a vlsseg3e32.v v8, (a0), a1, v0.t # CHECK-INST: vlsseg3e32.v v8, (a0), a1, v0.t # CHECK-ENCODING: [0x07,0x64,0xb5,0x48] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 64 b5 48 vlsseg3e32.v v8, (a0), a1 # CHECK-INST: vlsseg3e32.v v8, (a0), a1 # CHECK-ENCODING: [0x07,0x64,0xb5,0x4a] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 64 b5 4a vlsseg3e64.v v8, (a0), a1, v0.t # CHECK-INST: vlsseg3e64.v v8, (a0), a1, v0.t # CHECK-ENCODING: [0x07,0x74,0xb5,0x48] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 74 b5 48 vlsseg3e64.v v8, (a0), a1 # CHECK-INST: vlsseg3e64.v v8, (a0), a1 # CHECK-ENCODING: [0x07,0x74,0xb5,0x4a] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 74 b5 4a vluxseg3ei8.v v8, (a0), v4, v0.t # CHECK-INST: vluxseg3ei8.v v8, (a0), v4, v0.t # CHECK-ENCODING: [0x07,0x04,0x45,0x44] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 04 45 44 vluxseg3ei8.v v8, (a0), v4 # CHECK-INST: vluxseg3ei8.v v8, (a0), v4 # CHECK-ENCODING: [0x07,0x04,0x45,0x46] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 04 45 46 vluxseg3ei16.v v8, (a0), v4, v0.t # CHECK-INST: vluxseg3ei16.v v8, (a0), v4, v0.t # CHECK-ENCODING: [0x07,0x54,0x45,0x44] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 54 45 44 vluxseg3ei16.v v8, (a0), v4 # CHECK-INST: vluxseg3ei16.v v8, (a0), v4 # CHECK-ENCODING: [0x07,0x54,0x45,0x46] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 54 45 46 vluxseg3ei32.v v8, (a0), v4, v0.t # CHECK-INST: vluxseg3ei32.v v8, (a0), v4, v0.t # CHECK-ENCODING: [0x07,0x64,0x45,0x44] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 64 45 44 vluxseg3ei32.v v8, (a0), v4 # CHECK-INST: vluxseg3ei32.v v8, (a0), v4 # CHECK-ENCODING: [0x07,0x64,0x45,0x46] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 64 45 46 vluxseg3ei64.v v8, (a0), v4, v0.t # CHECK-INST: vluxseg3ei64.v v8, (a0), v4, v0.t # CHECK-ENCODING: [0x07,0x74,0x45,0x44] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 74 45 44 vluxseg3ei64.v v8, (a0), v4 # CHECK-INST: vluxseg3ei64.v v8, (a0), v4 # CHECK-ENCODING: [0x07,0x74,0x45,0x46] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 74 45 46 vloxseg3ei8.v v8, (a0), v4, v0.t # CHECK-INST: vloxseg3ei8.v v8, (a0), v4, v0.t # CHECK-ENCODING: [0x07,0x04,0x45,0x4c] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 04 45 4c vloxseg3ei8.v v8, (a0), v4 # CHECK-INST: vloxseg3ei8.v v8, (a0), v4 # CHECK-ENCODING: [0x07,0x04,0x45,0x4e] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 04 45 4e vloxseg3ei16.v v8, (a0), v4, v0.t # CHECK-INST: vloxseg3ei16.v v8, (a0), v4, v0.t # CHECK-ENCODING: [0x07,0x54,0x45,0x4c] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 54 45 4c vloxseg3ei16.v v8, (a0), v4 # CHECK-INST: vloxseg3ei16.v v8, (a0), v4 # CHECK-ENCODING: [0x07,0x54,0x45,0x4e] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 54 45 4e vloxseg3ei32.v v8, (a0), v4, v0.t # CHECK-INST: vloxseg3ei32.v v8, (a0), v4, v0.t # CHECK-ENCODING: [0x07,0x64,0x45,0x4c] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 64 45 4c vloxseg3ei32.v v8, (a0), v4 # CHECK-INST: vloxseg3ei32.v v8, (a0), v4 # CHECK-ENCODING: [0x07,0x64,0x45,0x4e] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 64 45 4e vloxseg3ei64.v v8, (a0), v4, v0.t # CHECK-INST: vloxseg3ei64.v v8, (a0), v4, v0.t # CHECK-ENCODING: [0x07,0x74,0x45,0x4c] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 74 45 4c vloxseg3ei64.v v8, (a0), v4 # CHECK-INST: vloxseg3ei64.v v8, (a0), v4 # CHECK-ENCODING: [0x07,0x74,0x45,0x4e] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 74 45 4e vlseg4e8.v v8, (a0), v0.t # CHECK-INST: vlseg4e8.v v8, (a0), v0.t # CHECK-ENCODING: [0x07,0x04,0x05,0x60] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 04 05 60 vlseg4e8.v v8, (a0) # CHECK-INST: vlseg4e8.v v8, (a0) # CHECK-ENCODING: [0x07,0x04,0x05,0x62] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 04 05 62 vlseg4e16.v v8, (a0), v0.t # CHECK-INST: vlseg4e16.v v8, (a0), v0.t # CHECK-ENCODING: [0x07,0x54,0x05,0x60] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 54 05 60 vlseg4e16.v v8, (a0) # CHECK-INST: vlseg4e16.v v8, (a0) # CHECK-ENCODING: [0x07,0x54,0x05,0x62] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 54 05 62 vlseg4e32.v v8, (a0), v0.t # CHECK-INST: vlseg4e32.v v8, (a0), v0.t # CHECK-ENCODING: [0x07,0x64,0x05,0x60] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 64 05 60 vlseg4e32.v v8, (a0) # CHECK-INST: vlseg4e32.v v8, (a0) # CHECK-ENCODING: [0x07,0x64,0x05,0x62] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 64 05 62 vlseg4e64.v v8, (a0), v0.t # CHECK-INST: vlseg4e64.v v8, (a0), v0.t # CHECK-ENCODING: [0x07,0x74,0x05,0x60] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 74 05 60 vlseg4e64.v v8, (a0) # CHECK-INST: vlseg4e64.v v8, (a0) # CHECK-ENCODING: [0x07,0x74,0x05,0x62] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 74 05 62 vlseg4e8ff.v v8, (a0), v0.t # CHECK-INST: vlseg4e8ff.v v8, (a0), v0.t # CHECK-ENCODING: [0x07,0x04,0x05,0x61] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 04 05 61 vlseg4e8ff.v v8, (a0) # CHECK-INST: vlseg4e8ff.v v8, (a0) # CHECK-ENCODING: [0x07,0x04,0x05,0x63] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 04 05 63 vlseg4e16ff.v v8, (a0), v0.t # CHECK-INST: vlseg4e16ff.v v8, (a0), v0.t # CHECK-ENCODING: [0x07,0x54,0x05,0x61] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 54 05 61 vlseg4e16ff.v v8, (a0) # CHECK-INST: vlseg4e16ff.v v8, (a0) # CHECK-ENCODING: [0x07,0x54,0x05,0x63] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 54 05 63 vlseg4e32ff.v v8, (a0), v0.t # CHECK-INST: vlseg4e32ff.v v8, (a0), v0.t # CHECK-ENCODING: [0x07,0x64,0x05,0x61] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 64 05 61 vlseg4e32ff.v v8, (a0) # CHECK-INST: vlseg4e32ff.v v8, (a0) # CHECK-ENCODING: [0x07,0x64,0x05,0x63] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 64 05 63 vlseg4e64ff.v v8, (a0), v0.t # CHECK-INST: vlseg4e64ff.v v8, (a0), v0.t # CHECK-ENCODING: [0x07,0x74,0x05,0x61] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 74 05 61 vlseg4e64ff.v v8, (a0) # CHECK-INST: vlseg4e64ff.v v8, (a0) # CHECK-ENCODING: [0x07,0x74,0x05,0x63] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 74 05 63 vlsseg4e8.v v8, (a0), a1, v0.t # CHECK-INST: vlsseg4e8.v v8, (a0), a1, v0.t # CHECK-ENCODING: [0x07,0x04,0xb5,0x68] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 04 b5 68 vlsseg4e8.v v8, (a0), a1 # CHECK-INST: vlsseg4e8.v v8, (a0), a1 # CHECK-ENCODING: [0x07,0x04,0xb5,0x6a] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 04 b5 6a vlsseg4e16.v v8, (a0), a1, v0.t # CHECK-INST: vlsseg4e16.v v8, (a0), a1, v0.t # CHECK-ENCODING: [0x07,0x54,0xb5,0x68] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 54 b5 68 vlsseg4e16.v v8, (a0), a1 # CHECK-INST: vlsseg4e16.v v8, (a0), a1 # CHECK-ENCODING: [0x07,0x54,0xb5,0x6a] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 54 b5 6a vlsseg4e32.v v8, (a0), a1, v0.t # CHECK-INST: vlsseg4e32.v v8, (a0), a1, v0.t # CHECK-ENCODING: [0x07,0x64,0xb5,0x68] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 64 b5 68 vlsseg4e32.v v8, (a0), a1 # CHECK-INST: vlsseg4e32.v v8, (a0), a1 # CHECK-ENCODING: [0x07,0x64,0xb5,0x6a] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 64 b5 6a vlsseg4e64.v v8, (a0), a1, v0.t # CHECK-INST: vlsseg4e64.v v8, (a0), a1, v0.t # CHECK-ENCODING: [0x07,0x74,0xb5,0x68] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 74 b5 68 vlsseg4e64.v v8, (a0), a1 # CHECK-INST: vlsseg4e64.v v8, (a0), a1 # CHECK-ENCODING: [0x07,0x74,0xb5,0x6a] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 74 b5 6a vluxseg4ei8.v v8, (a0), v4, v0.t # CHECK-INST: vluxseg4ei8.v v8, (a0), v4, v0.t # CHECK-ENCODING: [0x07,0x04,0x45,0x64] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 04 45 64 vluxseg4ei8.v v8, (a0), v4 # CHECK-INST: vluxseg4ei8.v v8, (a0), v4 # CHECK-ENCODING: [0x07,0x04,0x45,0x66] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 04 45 66 vluxseg4ei16.v v8, (a0), v4, v0.t # CHECK-INST: vluxseg4ei16.v v8, (a0), v4, v0.t # CHECK-ENCODING: [0x07,0x54,0x45,0x64] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 54 45 64 vluxseg4ei16.v v8, (a0), v4 # CHECK-INST: vluxseg4ei16.v v8, (a0), v4 # CHECK-ENCODING: [0x07,0x54,0x45,0x66] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 54 45 66 vluxseg4ei32.v v8, (a0), v4, v0.t # CHECK-INST: vluxseg4ei32.v v8, (a0), v4, v0.t # CHECK-ENCODING: [0x07,0x64,0x45,0x64] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 64 45 64 vluxseg4ei32.v v8, (a0), v4 # CHECK-INST: vluxseg4ei32.v v8, (a0), v4 # CHECK-ENCODING: [0x07,0x64,0x45,0x66] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 64 45 66 vluxseg4ei64.v v8, (a0), v4, v0.t # CHECK-INST: vluxseg4ei64.v v8, (a0), v4, v0.t # CHECK-ENCODING: [0x07,0x74,0x45,0x64] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 74 45 64 vluxseg4ei64.v v8, (a0), v4 # CHECK-INST: vluxseg4ei64.v v8, (a0), v4 # CHECK-ENCODING: [0x07,0x74,0x45,0x66] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 74 45 66 vloxseg4ei8.v v8, (a0), v4, v0.t # CHECK-INST: vloxseg4ei8.v v8, (a0), v4, v0.t # CHECK-ENCODING: [0x07,0x04,0x45,0x6c] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 04 45 6c vloxseg4ei8.v v8, (a0), v4 # CHECK-INST: vloxseg4ei8.v v8, (a0), v4 # CHECK-ENCODING: [0x07,0x04,0x45,0x6e] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 04 45 6e vloxseg4ei16.v v8, (a0), v4, v0.t # CHECK-INST: vloxseg4ei16.v v8, (a0), v4, v0.t # CHECK-ENCODING: [0x07,0x54,0x45,0x6c] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 54 45 6c vloxseg4ei16.v v8, (a0), v4 # CHECK-INST: vloxseg4ei16.v v8, (a0), v4 # CHECK-ENCODING: [0x07,0x54,0x45,0x6e] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 54 45 6e vloxseg4ei32.v v8, (a0), v4, v0.t # CHECK-INST: vloxseg4ei32.v v8, (a0), v4, v0.t # CHECK-ENCODING: [0x07,0x64,0x45,0x6c] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 64 45 6c vloxseg4ei32.v v8, (a0), v4 # CHECK-INST: vloxseg4ei32.v v8, (a0), v4 # CHECK-ENCODING: [0x07,0x64,0x45,0x6e] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 64 45 6e vloxseg4ei64.v v8, (a0), v4, v0.t # CHECK-INST: vloxseg4ei64.v v8, (a0), v4, v0.t # CHECK-ENCODING: [0x07,0x74,0x45,0x6c] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 74 45 6c vloxseg4ei64.v v8, (a0), v4 # CHECK-INST: vloxseg4ei64.v v8, (a0), v4 # CHECK-ENCODING: [0x07,0x74,0x45,0x6e] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 74 45 6e vlseg5e8.v v8, (a0), v0.t # CHECK-INST: vlseg5e8.v v8, (a0), v0.t # CHECK-ENCODING: [0x07,0x04,0x05,0x80] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 04 05 80 vlseg5e8.v v8, (a0) # CHECK-INST: vlseg5e8.v v8, (a0) # CHECK-ENCODING: [0x07,0x04,0x05,0x82] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 04 05 82 vlseg5e16.v v8, (a0), v0.t # CHECK-INST: vlseg5e16.v v8, (a0), v0.t # CHECK-ENCODING: [0x07,0x54,0x05,0x80] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 54 05 80 vlseg5e16.v v8, (a0) # CHECK-INST: vlseg5e16.v v8, (a0) # CHECK-ENCODING: [0x07,0x54,0x05,0x82] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 54 05 82 vlseg5e32.v v8, (a0), v0.t # CHECK-INST: vlseg5e32.v v8, (a0), v0.t # CHECK-ENCODING: [0x07,0x64,0x05,0x80] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 64 05 80 vlseg5e32.v v8, (a0) # CHECK-INST: vlseg5e32.v v8, (a0) # CHECK-ENCODING: [0x07,0x64,0x05,0x82] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 64 05 82 vlseg5e64.v v8, (a0), v0.t # CHECK-INST: vlseg5e64.v v8, (a0), v0.t # CHECK-ENCODING: [0x07,0x74,0x05,0x80] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 74 05 80 vlseg5e64.v v8, (a0) # CHECK-INST: vlseg5e64.v v8, (a0) # CHECK-ENCODING: [0x07,0x74,0x05,0x82] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 74 05 82 vlseg5e8ff.v v8, (a0), v0.t # CHECK-INST: vlseg5e8ff.v v8, (a0), v0.t # CHECK-ENCODING: [0x07,0x04,0x05,0x81] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 04 05 81 vlseg5e8ff.v v8, (a0) # CHECK-INST: vlseg5e8ff.v v8, (a0) # CHECK-ENCODING: [0x07,0x04,0x05,0x83] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 04 05 83 vlseg5e16ff.v v8, (a0), v0.t # CHECK-INST: vlseg5e16ff.v v8, (a0), v0.t # CHECK-ENCODING: [0x07,0x54,0x05,0x81] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 54 05 81 vlseg5e16ff.v v8, (a0) # CHECK-INST: vlseg5e16ff.v v8, (a0) # CHECK-ENCODING: [0x07,0x54,0x05,0x83] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 54 05 83 vlseg5e32ff.v v8, (a0), v0.t # CHECK-INST: vlseg5e32ff.v v8, (a0), v0.t # CHECK-ENCODING: [0x07,0x64,0x05,0x81] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 64 05 81 vlseg5e32ff.v v8, (a0) # CHECK-INST: vlseg5e32ff.v v8, (a0) # CHECK-ENCODING: [0x07,0x64,0x05,0x83] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 64 05 83 vlseg5e64ff.v v8, (a0), v0.t # CHECK-INST: vlseg5e64ff.v v8, (a0), v0.t # CHECK-ENCODING: [0x07,0x74,0x05,0x81] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 74 05 81 vlseg5e64ff.v v8, (a0) # CHECK-INST: vlseg5e64ff.v v8, (a0) # CHECK-ENCODING: [0x07,0x74,0x05,0x83] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 74 05 83 vlsseg5e8.v v8, (a0), a1, v0.t # CHECK-INST: vlsseg5e8.v v8, (a0), a1, v0.t # CHECK-ENCODING: [0x07,0x04,0xb5,0x88] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 04 b5 88 vlsseg5e8.v v8, (a0), a1 # CHECK-INST: vlsseg5e8.v v8, (a0), a1 # CHECK-ENCODING: [0x07,0x04,0xb5,0x8a] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 04 b5 8a vlsseg5e16.v v8, (a0), a1, v0.t # CHECK-INST: vlsseg5e16.v v8, (a0), a1, v0.t # CHECK-ENCODING: [0x07,0x54,0xb5,0x88] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 54 b5 88 vlsseg5e16.v v8, (a0), a1 # CHECK-INST: vlsseg5e16.v v8, (a0), a1 # CHECK-ENCODING: [0x07,0x54,0xb5,0x8a] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 54 b5 8a vlsseg5e32.v v8, (a0), a1, v0.t # CHECK-INST: vlsseg5e32.v v8, (a0), a1, v0.t # CHECK-ENCODING: [0x07,0x64,0xb5,0x88] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 64 b5 88 vlsseg5e32.v v8, (a0), a1 # CHECK-INST: vlsseg5e32.v v8, (a0), a1 # CHECK-ENCODING: [0x07,0x64,0xb5,0x8a] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 64 b5 8a vlsseg5e64.v v8, (a0), a1, v0.t # CHECK-INST: vlsseg5e64.v v8, (a0), a1, v0.t # CHECK-ENCODING: [0x07,0x74,0xb5,0x88] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 74 b5 88 vlsseg5e64.v v8, (a0), a1 # CHECK-INST: vlsseg5e64.v v8, (a0), a1 # CHECK-ENCODING: [0x07,0x74,0xb5,0x8a] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 74 b5 8a vluxseg5ei8.v v8, (a0), v4, v0.t # CHECK-INST: vluxseg5ei8.v v8, (a0), v4, v0.t # CHECK-ENCODING: [0x07,0x04,0x45,0x84] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 04 45 84 vluxseg5ei8.v v8, (a0), v4 # CHECK-INST: vluxseg5ei8.v v8, (a0), v4 # CHECK-ENCODING: [0x07,0x04,0x45,0x86] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 04 45 86 vluxseg5ei16.v v8, (a0), v4, v0.t # CHECK-INST: vluxseg5ei16.v v8, (a0), v4, v0.t # CHECK-ENCODING: [0x07,0x54,0x45,0x84] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 54 45 84 vluxseg5ei16.v v8, (a0), v4 # CHECK-INST: vluxseg5ei16.v v8, (a0), v4 # CHECK-ENCODING: [0x07,0x54,0x45,0x86] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 54 45 86 vluxseg5ei32.v v8, (a0), v4, v0.t # CHECK-INST: vluxseg5ei32.v v8, (a0), v4, v0.t # CHECK-ENCODING: [0x07,0x64,0x45,0x84] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 64 45 84 vluxseg5ei32.v v8, (a0), v4 # CHECK-INST: vluxseg5ei32.v v8, (a0), v4 # CHECK-ENCODING: [0x07,0x64,0x45,0x86] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 64 45 86 vluxseg5ei64.v v8, (a0), v4, v0.t # CHECK-INST: vluxseg5ei64.v v8, (a0), v4, v0.t # CHECK-ENCODING: [0x07,0x74,0x45,0x84] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 74 45 84 vluxseg5ei64.v v8, (a0), v4 # CHECK-INST: vluxseg5ei64.v v8, (a0), v4 # CHECK-ENCODING: [0x07,0x74,0x45,0x86] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 74 45 86 vloxseg5ei8.v v8, (a0), v4, v0.t # CHECK-INST: vloxseg5ei8.v v8, (a0), v4, v0.t # CHECK-ENCODING: [0x07,0x04,0x45,0x8c] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 04 45 8c vloxseg5ei8.v v8, (a0), v4 # CHECK-INST: vloxseg5ei8.v v8, (a0), v4 # CHECK-ENCODING: [0x07,0x04,0x45,0x8e] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 04 45 8e vloxseg5ei16.v v8, (a0), v4, v0.t # CHECK-INST: vloxseg5ei16.v v8, (a0), v4, v0.t # CHECK-ENCODING: [0x07,0x54,0x45,0x8c] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 54 45 8c vloxseg5ei16.v v8, (a0), v4 # CHECK-INST: vloxseg5ei16.v v8, (a0), v4 # CHECK-ENCODING: [0x07,0x54,0x45,0x8e] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 54 45 8e vloxseg5ei32.v v8, (a0), v4, v0.t # CHECK-INST: vloxseg5ei32.v v8, (a0), v4, v0.t # CHECK-ENCODING: [0x07,0x64,0x45,0x8c] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 64 45 8c vloxseg5ei32.v v8, (a0), v4 # CHECK-INST: vloxseg5ei32.v v8, (a0), v4 # CHECK-ENCODING: [0x07,0x64,0x45,0x8e] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 64 45 8e vloxseg5ei64.v v8, (a0), v4, v0.t # CHECK-INST: vloxseg5ei64.v v8, (a0), v4, v0.t # CHECK-ENCODING: [0x07,0x74,0x45,0x8c] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 74 45 8c vloxseg5ei64.v v8, (a0), v4 # CHECK-INST: vloxseg5ei64.v v8, (a0), v4 # CHECK-ENCODING: [0x07,0x74,0x45,0x8e] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 74 45 8e vlseg6e8.v v8, (a0), v0.t # CHECK-INST: vlseg6e8.v v8, (a0), v0.t # CHECK-ENCODING: [0x07,0x04,0x05,0xa0] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 04 05 a0 vlseg6e8.v v8, (a0) # CHECK-INST: vlseg6e8.v v8, (a0) # CHECK-ENCODING: [0x07,0x04,0x05,0xa2] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 04 05 a2 vlseg6e16.v v8, (a0), v0.t # CHECK-INST: vlseg6e16.v v8, (a0), v0.t # CHECK-ENCODING: [0x07,0x54,0x05,0xa0] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 54 05 a0 vlseg6e16.v v8, (a0) # CHECK-INST: vlseg6e16.v v8, (a0) # CHECK-ENCODING: [0x07,0x54,0x05,0xa2] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 54 05 a2 vlseg6e32.v v8, (a0), v0.t # CHECK-INST: vlseg6e32.v v8, (a0), v0.t # CHECK-ENCODING: [0x07,0x64,0x05,0xa0] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 64 05 a0 vlseg6e32.v v8, (a0) # CHECK-INST: vlseg6e32.v v8, (a0) # CHECK-ENCODING: [0x07,0x64,0x05,0xa2] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 64 05 a2 vlseg6e64.v v8, (a0), v0.t # CHECK-INST: vlseg6e64.v v8, (a0), v0.t # CHECK-ENCODING: [0x07,0x74,0x05,0xa0] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 74 05 a0 vlseg6e64.v v8, (a0) # CHECK-INST: vlseg6e64.v v8, (a0) # CHECK-ENCODING: [0x07,0x74,0x05,0xa2] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 74 05 a2 vlseg6e8ff.v v8, (a0), v0.t # CHECK-INST: vlseg6e8ff.v v8, (a0), v0.t # CHECK-ENCODING: [0x07,0x04,0x05,0xa1] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 04 05 a1 vlseg6e8ff.v v8, (a0) # CHECK-INST: vlseg6e8ff.v v8, (a0) # CHECK-ENCODING: [0x07,0x04,0x05,0xa3] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 04 05 a3 vlseg6e16ff.v v8, (a0), v0.t # CHECK-INST: vlseg6e16ff.v v8, (a0), v0.t # CHECK-ENCODING: [0x07,0x54,0x05,0xa1] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 54 05 a1 vlseg6e16ff.v v8, (a0) # CHECK-INST: vlseg6e16ff.v v8, (a0) # CHECK-ENCODING: [0x07,0x54,0x05,0xa3] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 54 05 a3 vlseg6e32ff.v v8, (a0), v0.t # CHECK-INST: vlseg6e32ff.v v8, (a0), v0.t # CHECK-ENCODING: [0x07,0x64,0x05,0xa1] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 64 05 a1 vlseg6e32ff.v v8, (a0) # CHECK-INST: vlseg6e32ff.v v8, (a0) # CHECK-ENCODING: [0x07,0x64,0x05,0xa3] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 64 05 a3 vlseg6e64ff.v v8, (a0), v0.t # CHECK-INST: vlseg6e64ff.v v8, (a0), v0.t # CHECK-ENCODING: [0x07,0x74,0x05,0xa1] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 74 05 a1 vlseg6e64ff.v v8, (a0) # CHECK-INST: vlseg6e64ff.v v8, (a0) # CHECK-ENCODING: [0x07,0x74,0x05,0xa3] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 74 05 a3 vlsseg6e8.v v8, (a0), a1, v0.t # CHECK-INST: vlsseg6e8.v v8, (a0), a1, v0.t # CHECK-ENCODING: [0x07,0x04,0xb5,0xa8] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 04 b5 a8 vlsseg6e8.v v8, (a0), a1 # CHECK-INST: vlsseg6e8.v v8, (a0), a1 # CHECK-ENCODING: [0x07,0x04,0xb5,0xaa] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 04 b5 aa vlsseg6e16.v v8, (a0), a1, v0.t # CHECK-INST: vlsseg6e16.v v8, (a0), a1, v0.t # CHECK-ENCODING: [0x07,0x54,0xb5,0xa8] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 54 b5 a8 vlsseg6e16.v v8, (a0), a1 # CHECK-INST: vlsseg6e16.v v8, (a0), a1 # CHECK-ENCODING: [0x07,0x54,0xb5,0xaa] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 54 b5 aa vlsseg6e32.v v8, (a0), a1, v0.t # CHECK-INST: vlsseg6e32.v v8, (a0), a1, v0.t # CHECK-ENCODING: [0x07,0x64,0xb5,0xa8] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 64 b5 a8 vlsseg6e32.v v8, (a0), a1 # CHECK-INST: vlsseg6e32.v v8, (a0), a1 # CHECK-ENCODING: [0x07,0x64,0xb5,0xaa] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 64 b5 aa vlsseg6e64.v v8, (a0), a1, v0.t # CHECK-INST: vlsseg6e64.v v8, (a0), a1, v0.t # CHECK-ENCODING: [0x07,0x74,0xb5,0xa8] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 74 b5 a8 vlsseg6e64.v v8, (a0), a1 # CHECK-INST: vlsseg6e64.v v8, (a0), a1 # CHECK-ENCODING: [0x07,0x74,0xb5,0xaa] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 74 b5 aa vluxseg6ei8.v v8, (a0), v4, v0.t # CHECK-INST: vluxseg6ei8.v v8, (a0), v4, v0.t # CHECK-ENCODING: [0x07,0x04,0x45,0xa4] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 04 45 a4 vluxseg6ei8.v v8, (a0), v4 # CHECK-INST: vluxseg6ei8.v v8, (a0), v4 # CHECK-ENCODING: [0x07,0x04,0x45,0xa6] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 04 45 a6 vluxseg6ei16.v v8, (a0), v4, v0.t # CHECK-INST: vluxseg6ei16.v v8, (a0), v4, v0.t # CHECK-ENCODING: [0x07,0x54,0x45,0xa4] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 54 45 a4 vluxseg6ei16.v v8, (a0), v4 # CHECK-INST: vluxseg6ei16.v v8, (a0), v4 # CHECK-ENCODING: [0x07,0x54,0x45,0xa6] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 54 45 a6 vluxseg6ei32.v v8, (a0), v4, v0.t # CHECK-INST: vluxseg6ei32.v v8, (a0), v4, v0.t # CHECK-ENCODING: [0x07,0x64,0x45,0xa4] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 64 45 a4 vluxseg6ei32.v v8, (a0), v4 # CHECK-INST: vluxseg6ei32.v v8, (a0), v4 # CHECK-ENCODING: [0x07,0x64,0x45,0xa6] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 64 45 a6 vluxseg6ei64.v v8, (a0), v4, v0.t # CHECK-INST: vluxseg6ei64.v v8, (a0), v4, v0.t # CHECK-ENCODING: [0x07,0x74,0x45,0xa4] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 74 45 a4 vluxseg6ei64.v v8, (a0), v4 # CHECK-INST: vluxseg6ei64.v v8, (a0), v4 # CHECK-ENCODING: [0x07,0x74,0x45,0xa6] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 74 45 a6 vloxseg6ei8.v v8, (a0), v4, v0.t # CHECK-INST: vloxseg6ei8.v v8, (a0), v4, v0.t # CHECK-ENCODING: [0x07,0x04,0x45,0xac] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 04 45 ac vloxseg6ei8.v v8, (a0), v4 # CHECK-INST: vloxseg6ei8.v v8, (a0), v4 # CHECK-ENCODING: [0x07,0x04,0x45,0xae] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 04 45 ae vloxseg6ei16.v v8, (a0), v4, v0.t # CHECK-INST: vloxseg6ei16.v v8, (a0), v4, v0.t # CHECK-ENCODING: [0x07,0x54,0x45,0xac] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 54 45 ac vloxseg6ei16.v v8, (a0), v4 # CHECK-INST: vloxseg6ei16.v v8, (a0), v4 # CHECK-ENCODING: [0x07,0x54,0x45,0xae] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 54 45 ae vloxseg6ei32.v v8, (a0), v4, v0.t # CHECK-INST: vloxseg6ei32.v v8, (a0), v4, v0.t # CHECK-ENCODING: [0x07,0x64,0x45,0xac] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 64 45 ac vloxseg6ei32.v v8, (a0), v4 # CHECK-INST: vloxseg6ei32.v v8, (a0), v4 # CHECK-ENCODING: [0x07,0x64,0x45,0xae] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 64 45 ae vloxseg6ei64.v v8, (a0), v4, v0.t # CHECK-INST: vloxseg6ei64.v v8, (a0), v4, v0.t # CHECK-ENCODING: [0x07,0x74,0x45,0xac] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 74 45 ac vloxseg6ei64.v v8, (a0), v4 # CHECK-INST: vloxseg6ei64.v v8, (a0), v4 # CHECK-ENCODING: [0x07,0x74,0x45,0xae] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 74 45 ae vlseg7e8.v v8, (a0), v0.t # CHECK-INST: vlseg7e8.v v8, (a0), v0.t # CHECK-ENCODING: [0x07,0x04,0x05,0xc0] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 04 05 c0 vlseg7e8.v v8, (a0) # CHECK-INST: vlseg7e8.v v8, (a0) # CHECK-ENCODING: [0x07,0x04,0x05,0xc2] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 04 05 c2 vlseg7e16.v v8, (a0), v0.t # CHECK-INST: vlseg7e16.v v8, (a0), v0.t # CHECK-ENCODING: [0x07,0x54,0x05,0xc0] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 54 05 c0 vlseg7e16.v v8, (a0) # CHECK-INST: vlseg7e16.v v8, (a0) # CHECK-ENCODING: [0x07,0x54,0x05,0xc2] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 54 05 c2 vlseg7e32.v v8, (a0), v0.t # CHECK-INST: vlseg7e32.v v8, (a0), v0.t # CHECK-ENCODING: [0x07,0x64,0x05,0xc0] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 64 05 c0 vlseg7e32.v v8, (a0) # CHECK-INST: vlseg7e32.v v8, (a0) # CHECK-ENCODING: [0x07,0x64,0x05,0xc2] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 64 05 c2 vlseg7e64.v v8, (a0), v0.t # CHECK-INST: vlseg7e64.v v8, (a0), v0.t # CHECK-ENCODING: [0x07,0x74,0x05,0xc0] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 74 05 c0 vlseg7e64.v v8, (a0) # CHECK-INST: vlseg7e64.v v8, (a0) # CHECK-ENCODING: [0x07,0x74,0x05,0xc2] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 74 05 c2 vlseg7e8ff.v v8, (a0), v0.t # CHECK-INST: vlseg7e8ff.v v8, (a0), v0.t # CHECK-ENCODING: [0x07,0x04,0x05,0xc1] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 04 05 c1 vlseg7e8ff.v v8, (a0) # CHECK-INST: vlseg7e8ff.v v8, (a0) # CHECK-ENCODING: [0x07,0x04,0x05,0xc3] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 04 05 c3 vlseg7e16ff.v v8, (a0), v0.t # CHECK-INST: vlseg7e16ff.v v8, (a0), v0.t # CHECK-ENCODING: [0x07,0x54,0x05,0xc1] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 54 05 c1 vlseg7e16ff.v v8, (a0) # CHECK-INST: vlseg7e16ff.v v8, (a0) # CHECK-ENCODING: [0x07,0x54,0x05,0xc3] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 54 05 c3 vlseg7e32ff.v v8, (a0), v0.t # CHECK-INST: vlseg7e32ff.v v8, (a0), v0.t # CHECK-ENCODING: [0x07,0x64,0x05,0xc1] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 64 05 c1 vlseg7e32ff.v v8, (a0) # CHECK-INST: vlseg7e32ff.v v8, (a0) # CHECK-ENCODING: [0x07,0x64,0x05,0xc3] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 64 05 c3 vlseg7e64ff.v v8, (a0), v0.t # CHECK-INST: vlseg7e64ff.v v8, (a0), v0.t # CHECK-ENCODING: [0x07,0x74,0x05,0xc1] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 74 05 c1 vlseg7e64ff.v v8, (a0) # CHECK-INST: vlseg7e64ff.v v8, (a0) # CHECK-ENCODING: [0x07,0x74,0x05,0xc3] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 74 05 c3 vlsseg7e8.v v8, (a0), a1, v0.t # CHECK-INST: vlsseg7e8.v v8, (a0), a1, v0.t # CHECK-ENCODING: [0x07,0x04,0xb5,0xc8] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 04 b5 c8 vlsseg7e8.v v8, (a0), a1 # CHECK-INST: vlsseg7e8.v v8, (a0), a1 # CHECK-ENCODING: [0x07,0x04,0xb5,0xca] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 04 b5 ca vlsseg7e16.v v8, (a0), a1, v0.t # CHECK-INST: vlsseg7e16.v v8, (a0), a1, v0.t # CHECK-ENCODING: [0x07,0x54,0xb5,0xc8] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 54 b5 c8 vlsseg7e16.v v8, (a0), a1 # CHECK-INST: vlsseg7e16.v v8, (a0), a1 # CHECK-ENCODING: [0x07,0x54,0xb5,0xca] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 54 b5 ca vlsseg7e32.v v8, (a0), a1, v0.t # CHECK-INST: vlsseg7e32.v v8, (a0), a1, v0.t # CHECK-ENCODING: [0x07,0x64,0xb5,0xc8] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 64 b5 c8 vlsseg7e32.v v8, (a0), a1 # CHECK-INST: vlsseg7e32.v v8, (a0), a1 # CHECK-ENCODING: [0x07,0x64,0xb5,0xca] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 64 b5 ca vlsseg7e64.v v8, (a0), a1, v0.t # CHECK-INST: vlsseg7e64.v v8, (a0), a1, v0.t # CHECK-ENCODING: [0x07,0x74,0xb5,0xc8] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 74 b5 c8 vlsseg7e64.v v8, (a0), a1 # CHECK-INST: vlsseg7e64.v v8, (a0), a1 # CHECK-ENCODING: [0x07,0x74,0xb5,0xca] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 74 b5 ca vluxseg7ei8.v v8, (a0), v4, v0.t # CHECK-INST: vluxseg7ei8.v v8, (a0), v4, v0.t # CHECK-ENCODING: [0x07,0x04,0x45,0xc4] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 04 45 c4 vluxseg7ei8.v v8, (a0), v4 # CHECK-INST: vluxseg7ei8.v v8, (a0), v4 # CHECK-ENCODING: [0x07,0x04,0x45,0xc6] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 04 45 c6 vluxseg7ei16.v v8, (a0), v4, v0.t # CHECK-INST: vluxseg7ei16.v v8, (a0), v4, v0.t # CHECK-ENCODING: [0x07,0x54,0x45,0xc4] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 54 45 c4 vluxseg7ei16.v v8, (a0), v4 # CHECK-INST: vluxseg7ei16.v v8, (a0), v4 # CHECK-ENCODING: [0x07,0x54,0x45,0xc6] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 54 45 c6 vluxseg7ei32.v v8, (a0), v4, v0.t # CHECK-INST: vluxseg7ei32.v v8, (a0), v4, v0.t # CHECK-ENCODING: [0x07,0x64,0x45,0xc4] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 64 45 c4 vluxseg7ei32.v v8, (a0), v4 # CHECK-INST: vluxseg7ei32.v v8, (a0), v4 # CHECK-ENCODING: [0x07,0x64,0x45,0xc6] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 64 45 c6 vluxseg7ei64.v v8, (a0), v4, v0.t # CHECK-INST: vluxseg7ei64.v v8, (a0), v4, v0.t # CHECK-ENCODING: [0x07,0x74,0x45,0xc4] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 74 45 c4 vluxseg7ei64.v v8, (a0), v4 # CHECK-INST: vluxseg7ei64.v v8, (a0), v4 # CHECK-ENCODING: [0x07,0x74,0x45,0xc6] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 74 45 c6 vloxseg7ei8.v v8, (a0), v4, v0.t # CHECK-INST: vloxseg7ei8.v v8, (a0), v4, v0.t # CHECK-ENCODING: [0x07,0x04,0x45,0xcc] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 04 45 cc vloxseg7ei8.v v8, (a0), v4 # CHECK-INST: vloxseg7ei8.v v8, (a0), v4 # CHECK-ENCODING: [0x07,0x04,0x45,0xce] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 04 45 ce vloxseg7ei16.v v8, (a0), v4, v0.t # CHECK-INST: vloxseg7ei16.v v8, (a0), v4, v0.t # CHECK-ENCODING: [0x07,0x54,0x45,0xcc] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 54 45 cc vloxseg7ei16.v v8, (a0), v4 # CHECK-INST: vloxseg7ei16.v v8, (a0), v4 # CHECK-ENCODING: [0x07,0x54,0x45,0xce] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 54 45 ce vloxseg7ei32.v v8, (a0), v4, v0.t # CHECK-INST: vloxseg7ei32.v v8, (a0), v4, v0.t # CHECK-ENCODING: [0x07,0x64,0x45,0xcc] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 64 45 cc vloxseg7ei32.v v8, (a0), v4 # CHECK-INST: vloxseg7ei32.v v8, (a0), v4 # CHECK-ENCODING: [0x07,0x64,0x45,0xce] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 64 45 ce vloxseg7ei64.v v8, (a0), v4, v0.t # CHECK-INST: vloxseg7ei64.v v8, (a0), v4, v0.t # CHECK-ENCODING: [0x07,0x74,0x45,0xcc] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 74 45 cc vloxseg7ei64.v v8, (a0), v4 # CHECK-INST: vloxseg7ei64.v v8, (a0), v4 # CHECK-ENCODING: [0x07,0x74,0x45,0xce] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 74 45 ce vlseg8e8.v v8, (a0), v0.t # CHECK-INST: vlseg8e8.v v8, (a0), v0.t # CHECK-ENCODING: [0x07,0x04,0x05,0xe0] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 04 05 e0 vlseg8e8.v v8, (a0) # CHECK-INST: vlseg8e8.v v8, (a0) # CHECK-ENCODING: [0x07,0x04,0x05,0xe2] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 04 05 e2 vlseg8e16.v v8, (a0), v0.t # CHECK-INST: vlseg8e16.v v8, (a0), v0.t # CHECK-ENCODING: [0x07,0x54,0x05,0xe0] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 54 05 e0 vlseg8e16.v v8, (a0) # CHECK-INST: vlseg8e16.v v8, (a0) # CHECK-ENCODING: [0x07,0x54,0x05,0xe2] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 54 05 e2 vlseg8e32.v v8, (a0), v0.t # CHECK-INST: vlseg8e32.v v8, (a0), v0.t # CHECK-ENCODING: [0x07,0x64,0x05,0xe0] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 64 05 e0 vlseg8e32.v v8, (a0) # CHECK-INST: vlseg8e32.v v8, (a0) # CHECK-ENCODING: [0x07,0x64,0x05,0xe2] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 64 05 e2 vlseg8e64.v v8, (a0), v0.t # CHECK-INST: vlseg8e64.v v8, (a0), v0.t # CHECK-ENCODING: [0x07,0x74,0x05,0xe0] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 74 05 e0 vlseg8e64.v v8, (a0) # CHECK-INST: vlseg8e64.v v8, (a0) # CHECK-ENCODING: [0x07,0x74,0x05,0xe2] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 74 05 e2 vlseg8e8ff.v v8, (a0), v0.t # CHECK-INST: vlseg8e8ff.v v8, (a0), v0.t # CHECK-ENCODING: [0x07,0x04,0x05,0xe1] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 04 05 e1 vlseg8e8ff.v v8, (a0) # CHECK-INST: vlseg8e8ff.v v8, (a0) # CHECK-ENCODING: [0x07,0x04,0x05,0xe3] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 04 05 e3 vlseg8e16ff.v v8, (a0), v0.t # CHECK-INST: vlseg8e16ff.v v8, (a0), v0.t # CHECK-ENCODING: [0x07,0x54,0x05,0xe1] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 54 05 e1 vlseg8e16ff.v v8, (a0) # CHECK-INST: vlseg8e16ff.v v8, (a0) # CHECK-ENCODING: [0x07,0x54,0x05,0xe3] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 54 05 e3 vlseg8e32ff.v v8, (a0), v0.t # CHECK-INST: vlseg8e32ff.v v8, (a0), v0.t # CHECK-ENCODING: [0x07,0x64,0x05,0xe1] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 64 05 e1 vlseg8e32ff.v v8, (a0) # CHECK-INST: vlseg8e32ff.v v8, (a0) # CHECK-ENCODING: [0x07,0x64,0x05,0xe3] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 64 05 e3 vlseg8e64ff.v v8, (a0), v0.t # CHECK-INST: vlseg8e64ff.v v8, (a0), v0.t # CHECK-ENCODING: [0x07,0x74,0x05,0xe1] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 74 05 e1 vlseg8e64ff.v v8, (a0) # CHECK-INST: vlseg8e64ff.v v8, (a0) # CHECK-ENCODING: [0x07,0x74,0x05,0xe3] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 74 05 e3 vlsseg8e8.v v8, (a0), a1, v0.t # CHECK-INST: vlsseg8e8.v v8, (a0), a1, v0.t # CHECK-ENCODING: [0x07,0x04,0xb5,0xe8] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 04 b5 e8 vlsseg8e8.v v8, (a0), a1 # CHECK-INST: vlsseg8e8.v v8, (a0), a1 # CHECK-ENCODING: [0x07,0x04,0xb5,0xea] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 04 b5 ea vlsseg8e16.v v8, (a0), a1, v0.t # CHECK-INST: vlsseg8e16.v v8, (a0), a1, v0.t # CHECK-ENCODING: [0x07,0x54,0xb5,0xe8] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 54 b5 e8 vlsseg8e16.v v8, (a0), a1 # CHECK-INST: vlsseg8e16.v v8, (a0), a1 # CHECK-ENCODING: [0x07,0x54,0xb5,0xea] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 54 b5 ea vlsseg8e32.v v8, (a0), a1, v0.t # CHECK-INST: vlsseg8e32.v v8, (a0), a1, v0.t # CHECK-ENCODING: [0x07,0x64,0xb5,0xe8] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 64 b5 e8 vlsseg8e32.v v8, (a0), a1 # CHECK-INST: vlsseg8e32.v v8, (a0), a1 # CHECK-ENCODING: [0x07,0x64,0xb5,0xea] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 64 b5 ea vlsseg8e64.v v8, (a0), a1, v0.t # CHECK-INST: vlsseg8e64.v v8, (a0), a1, v0.t # CHECK-ENCODING: [0x07,0x74,0xb5,0xe8] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 74 b5 e8 vlsseg8e64.v v8, (a0), a1 # CHECK-INST: vlsseg8e64.v v8, (a0), a1 # CHECK-ENCODING: [0x07,0x74,0xb5,0xea] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 74 b5 ea vluxseg8ei8.v v8, (a0), v4, v0.t # CHECK-INST: vluxseg8ei8.v v8, (a0), v4, v0.t # CHECK-ENCODING: [0x07,0x04,0x45,0xe4] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 04 45 e4 vluxseg8ei8.v v8, (a0), v4 # CHECK-INST: vluxseg8ei8.v v8, (a0), v4 # CHECK-ENCODING: [0x07,0x04,0x45,0xe6] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 04 45 e6 vluxseg8ei16.v v8, (a0), v4, v0.t # CHECK-INST: vluxseg8ei16.v v8, (a0), v4, v0.t # CHECK-ENCODING: [0x07,0x54,0x45,0xe4] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 54 45 e4 vluxseg8ei16.v v8, (a0), v4 # CHECK-INST: vluxseg8ei16.v v8, (a0), v4 # CHECK-ENCODING: [0x07,0x54,0x45,0xe6] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 54 45 e6 vluxseg8ei32.v v8, (a0), v4, v0.t # CHECK-INST: vluxseg8ei32.v v8, (a0), v4, v0.t # CHECK-ENCODING: [0x07,0x64,0x45,0xe4] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 64 45 e4 vluxseg8ei32.v v8, (a0), v4 # CHECK-INST: vluxseg8ei32.v v8, (a0), v4 # CHECK-ENCODING: [0x07,0x64,0x45,0xe6] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 64 45 e6 vluxseg8ei64.v v8, (a0), v4, v0.t # CHECK-INST: vluxseg8ei64.v v8, (a0), v4, v0.t # CHECK-ENCODING: [0x07,0x74,0x45,0xe4] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 74 45 e4 vluxseg8ei64.v v8, (a0), v4 # CHECK-INST: vluxseg8ei64.v v8, (a0), v4 # CHECK-ENCODING: [0x07,0x74,0x45,0xe6] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 74 45 e6 vloxseg8ei8.v v8, (a0), v4, v0.t # CHECK-INST: vloxseg8ei8.v v8, (a0), v4, v0.t # CHECK-ENCODING: [0x07,0x04,0x45,0xec] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 04 45 ec vloxseg8ei8.v v8, (a0), v4 # CHECK-INST: vloxseg8ei8.v v8, (a0), v4 # CHECK-ENCODING: [0x07,0x04,0x45,0xee] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 04 45 ee vloxseg8ei16.v v8, (a0), v4, v0.t # CHECK-INST: vloxseg8ei16.v v8, (a0), v4, v0.t # CHECK-ENCODING: [0x07,0x54,0x45,0xec] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 54 45 ec vloxseg8ei16.v v8, (a0), v4 # CHECK-INST: vloxseg8ei16.v v8, (a0), v4 # CHECK-ENCODING: [0x07,0x54,0x45,0xee] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 54 45 ee vloxseg8ei32.v v8, (a0), v4, v0.t # CHECK-INST: vloxseg8ei32.v v8, (a0), v4, v0.t # CHECK-ENCODING: [0x07,0x64,0x45,0xec] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 64 45 ec vloxseg8ei32.v v8, (a0), v4 # CHECK-INST: vloxseg8ei32.v v8, (a0), v4 # CHECK-ENCODING: [0x07,0x64,0x45,0xee] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 64 45 ee vloxseg8ei64.v v8, (a0), v4, v0.t # CHECK-INST: vloxseg8ei64.v v8, (a0), v4, v0.t # CHECK-ENCODING: [0x07,0x74,0x45,0xec] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 74 45 ec vloxseg8ei64.v v8, (a0), v4 # CHECK-INST: vloxseg8ei64.v v8, (a0), v4 # CHECK-ENCODING: [0x07,0x74,0x45,0xee] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 07 74 45 ee vsseg2e8.v v24, (a0), v0.t # CHECK-INST: vsseg2e8.v v24, (a0), v0.t # CHECK-ENCODING: [0x27,0x0c,0x05,0x20] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 27 0c 05 20 vsseg2e8.v v24, (a0) # CHECK-INST: vsseg2e8.v v24, (a0) # CHECK-ENCODING: [0x27,0x0c,0x05,0x22] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 27 0c 05 22 vsseg2e16.v v24, (a0), v0.t # CHECK-INST: vsseg2e16.v v24, (a0), v0.t # CHECK-ENCODING: [0x27,0x5c,0x05,0x20] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 27 5c 05 20 vsseg2e16.v v24, (a0) # CHECK-INST: vsseg2e16.v v24, (a0) # CHECK-ENCODING: [0x27,0x5c,0x05,0x22] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 27 5c 05 22 vsseg2e32.v v24, (a0), v0.t # CHECK-INST: vsseg2e32.v v24, (a0), v0.t # CHECK-ENCODING: [0x27,0x6c,0x05,0x20] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 27 6c 05 20 vsseg2e32.v v24, (a0) # CHECK-INST: vsseg2e32.v v24, (a0) # CHECK-ENCODING: [0x27,0x6c,0x05,0x22] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 27 6c 05 22 vsseg2e64.v v24, (a0), v0.t # CHECK-INST: vsseg2e64.v v24, (a0), v0.t # CHECK-ENCODING: [0x27,0x7c,0x05,0x20] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 27 7c 05 20 vsseg2e64.v v24, (a0) # CHECK-INST: vsseg2e64.v v24, (a0) # CHECK-ENCODING: [0x27,0x7c,0x05,0x22] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 27 7c 05 22 vssseg2e8.v v24, (a0), a1, v0.t # CHECK-INST: vssseg2e8.v v24, (a0), a1, v0.t # CHECK-ENCODING: [0x27,0x0c,0xb5,0x28] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 27 0c b5 28 vssseg2e8.v v24, (a0), a1 # CHECK-INST: vssseg2e8.v v24, (a0), a1 # CHECK-ENCODING: [0x27,0x0c,0xb5,0x2a] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 27 0c b5 2a vssseg2e16.v v24, (a0), a1, v0.t # CHECK-INST: vssseg2e16.v v24, (a0), a1, v0.t # CHECK-ENCODING: [0x27,0x5c,0xb5,0x28] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 27 5c b5 28 vssseg2e16.v v24, (a0), a1 # CHECK-INST: vssseg2e16.v v24, (a0), a1 # CHECK-ENCODING: [0x27,0x5c,0xb5,0x2a] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 27 5c b5 2a vssseg2e32.v v24, (a0), a1, v0.t # CHECK-INST: vssseg2e32.v v24, (a0), a1, v0.t # CHECK-ENCODING: [0x27,0x6c,0xb5,0x28] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 27 6c b5 28 vssseg2e32.v v24, (a0), a1 # CHECK-INST: vssseg2e32.v v24, (a0), a1 # CHECK-ENCODING: [0x27,0x6c,0xb5,0x2a] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 27 6c b5 2a vssseg2e64.v v24, (a0), a1, v0.t # CHECK-INST: vssseg2e64.v v24, (a0), a1, v0.t # CHECK-ENCODING: [0x27,0x7c,0xb5,0x28] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 27 7c b5 28 vssseg2e64.v v24, (a0), a1 # CHECK-INST: vssseg2e64.v v24, (a0), a1 # CHECK-ENCODING: [0x27,0x7c,0xb5,0x2a] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 27 7c b5 2a vsuxseg2ei8.v v24, (a0), v4, v0.t # CHECK-INST: vsuxseg2ei8.v v24, (a0), v4, v0.t # CHECK-ENCODING: [0x27,0x0c,0x45,0x24] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 27 0c 45 24 vsuxseg2ei8.v v24, (a0), v4 # CHECK-INST: vsuxseg2ei8.v v24, (a0), v4 # CHECK-ENCODING: [0x27,0x0c,0x45,0x26] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 27 0c 45 26 vsuxseg2ei16.v v24, (a0), v4, v0.t # CHECK-INST: vsuxseg2ei16.v v24, (a0), v4, v0.t # CHECK-ENCODING: [0x27,0x5c,0x45,0x24] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 27 5c 45 24 vsuxseg2ei16.v v24, (a0), v4 # CHECK-INST: vsuxseg2ei16.v v24, (a0), v4 # CHECK-ENCODING: [0x27,0x5c,0x45,0x26] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 27 5c 45 26 vsuxseg2ei32.v v24, (a0), v4, v0.t # CHECK-INST: vsuxseg2ei32.v v24, (a0), v4, v0.t # CHECK-ENCODING: [0x27,0x6c,0x45,0x24] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 27 6c 45 24 vsuxseg2ei32.v v24, (a0), v4 # CHECK-INST: vsuxseg2ei32.v v24, (a0), v4 # CHECK-ENCODING: [0x27,0x6c,0x45,0x26] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 27 6c 45 26 vsuxseg2ei64.v v24, (a0), v4, v0.t # CHECK-INST: vsuxseg2ei64.v v24, (a0), v4, v0.t # CHECK-ENCODING: [0x27,0x7c,0x45,0x24] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 27 7c 45 24 vsuxseg2ei64.v v24, (a0), v4 # CHECK-INST: vsuxseg2ei64.v v24, (a0), v4 # CHECK-ENCODING: [0x27,0x7c,0x45,0x26] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 27 7c 45 26 vsoxseg2ei8.v v24, (a0), v4, v0.t # CHECK-INST: vsoxseg2ei8.v v24, (a0), v4, v0.t # CHECK-ENCODING: [0x27,0x0c,0x45,0x2c] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 27 0c 45 2c vsoxseg2ei8.v v24, (a0), v4 # CHECK-INST: vsoxseg2ei8.v v24, (a0), v4 # CHECK-ENCODING: [0x27,0x0c,0x45,0x2e] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 27 0c 45 2e vsoxseg2ei16.v v24, (a0), v4, v0.t # CHECK-INST: vsoxseg2ei16.v v24, (a0), v4, v0.t # CHECK-ENCODING: [0x27,0x5c,0x45,0x2c] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 27 5c 45 2c vsoxseg2ei16.v v24, (a0), v4 # CHECK-INST: vsoxseg2ei16.v v24, (a0), v4 # CHECK-ENCODING: [0x27,0x5c,0x45,0x2e] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 27 5c 45 2e vsoxseg2ei32.v v24, (a0), v4, v0.t # CHECK-INST: vsoxseg2ei32.v v24, (a0), v4, v0.t # CHECK-ENCODING: [0x27,0x6c,0x45,0x2c] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 27 6c 45 2c vsoxseg2ei32.v v24, (a0), v4 # CHECK-INST: vsoxseg2ei32.v v24, (a0), v4 # CHECK-ENCODING: [0x27,0x6c,0x45,0x2e] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 27 6c 45 2e vsoxseg2ei64.v v24, (a0), v4, v0.t # CHECK-INST: vsoxseg2ei64.v v24, (a0), v4, v0.t # CHECK-ENCODING: [0x27,0x7c,0x45,0x2c] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 27 7c 45 2c vsoxseg2ei64.v v24, (a0), v4 # CHECK-INST: vsoxseg2ei64.v v24, (a0), v4 # CHECK-ENCODING: [0x27,0x7c,0x45,0x2e] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 27 7c 45 2e vsseg3e8.v v24, (a0), v0.t # CHECK-INST: vsseg3e8.v v24, (a0), v0.t # CHECK-ENCODING: [0x27,0x0c,0x05,0x40] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 27 0c 05 40 vsseg3e8.v v24, (a0) # CHECK-INST: vsseg3e8.v v24, (a0) # CHECK-ENCODING: [0x27,0x0c,0x05,0x42] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 27 0c 05 42 vsseg3e16.v v24, (a0), v0.t # CHECK-INST: vsseg3e16.v v24, (a0), v0.t # CHECK-ENCODING: [0x27,0x5c,0x05,0x40] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 27 5c 05 40 vsseg3e16.v v24, (a0) # CHECK-INST: vsseg3e16.v v24, (a0) # CHECK-ENCODING: [0x27,0x5c,0x05,0x42] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 27 5c 05 42 vsseg3e32.v v24, (a0), v0.t # CHECK-INST: vsseg3e32.v v24, (a0), v0.t # CHECK-ENCODING: [0x27,0x6c,0x05,0x40] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 27 6c 05 40 vsseg3e32.v v24, (a0) # CHECK-INST: vsseg3e32.v v24, (a0) # CHECK-ENCODING: [0x27,0x6c,0x05,0x42] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 27 6c 05 42 vsseg3e64.v v24, (a0), v0.t # CHECK-INST: vsseg3e64.v v24, (a0), v0.t # CHECK-ENCODING: [0x27,0x7c,0x05,0x40] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 27 7c 05 40 vsseg3e64.v v24, (a0) # CHECK-INST: vsseg3e64.v v24, (a0) # CHECK-ENCODING: [0x27,0x7c,0x05,0x42] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 27 7c 05 42 vssseg3e8.v v24, (a0), a1, v0.t # CHECK-INST: vssseg3e8.v v24, (a0), a1, v0.t # CHECK-ENCODING: [0x27,0x0c,0xb5,0x48] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 27 0c b5 48 vssseg3e8.v v24, (a0), a1 # CHECK-INST: vssseg3e8.v v24, (a0), a1 # CHECK-ENCODING: [0x27,0x0c,0xb5,0x4a] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 27 0c b5 4a vssseg3e16.v v24, (a0), a1, v0.t # CHECK-INST: vssseg3e16.v v24, (a0), a1, v0.t # CHECK-ENCODING: [0x27,0x5c,0xb5,0x48] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 27 5c b5 48 vssseg3e16.v v24, (a0), a1 # CHECK-INST: vssseg3e16.v v24, (a0), a1 # CHECK-ENCODING: [0x27,0x5c,0xb5,0x4a] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 27 5c b5 4a vssseg3e32.v v24, (a0), a1, v0.t # CHECK-INST: vssseg3e32.v v24, (a0), a1, v0.t # CHECK-ENCODING: [0x27,0x6c,0xb5,0x48] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 27 6c b5 48 vssseg3e32.v v24, (a0), a1 # CHECK-INST: vssseg3e32.v v24, (a0), a1 # CHECK-ENCODING: [0x27,0x6c,0xb5,0x4a] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 27 6c b5 4a vssseg3e64.v v24, (a0), a1, v0.t # CHECK-INST: vssseg3e64.v v24, (a0), a1, v0.t # CHECK-ENCODING: [0x27,0x7c,0xb5,0x48] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 27 7c b5 48 vssseg3e64.v v24, (a0), a1 # CHECK-INST: vssseg3e64.v v24, (a0), a1 # CHECK-ENCODING: [0x27,0x7c,0xb5,0x4a] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 27 7c b5 4a vsuxseg3ei8.v v24, (a0), v4, v0.t # CHECK-INST: vsuxseg3ei8.v v24, (a0), v4, v0.t # CHECK-ENCODING: [0x27,0x0c,0x45,0x44] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 27 0c 45 44 vsuxseg3ei8.v v24, (a0), v4 # CHECK-INST: vsuxseg3ei8.v v24, (a0), v4 # CHECK-ENCODING: [0x27,0x0c,0x45,0x46] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 27 0c 45 46 vsuxseg3ei16.v v24, (a0), v4, v0.t # CHECK-INST: vsuxseg3ei16.v v24, (a0), v4, v0.t # CHECK-ENCODING: [0x27,0x5c,0x45,0x44] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 27 5c 45 44 vsuxseg3ei16.v v24, (a0), v4 # CHECK-INST: vsuxseg3ei16.v v24, (a0), v4 # CHECK-ENCODING: [0x27,0x5c,0x45,0x46] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 27 5c 45 46 vsuxseg3ei32.v v24, (a0), v4, v0.t # CHECK-INST: vsuxseg3ei32.v v24, (a0), v4, v0.t # CHECK-ENCODING: [0x27,0x6c,0x45,0x44] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 27 6c 45 44 vsuxseg3ei32.v v24, (a0), v4 # CHECK-INST: vsuxseg3ei32.v v24, (a0), v4 # CHECK-ENCODING: [0x27,0x6c,0x45,0x46] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 27 6c 45 46 vsuxseg3ei64.v v24, (a0), v4, v0.t # CHECK-INST: vsuxseg3ei64.v v24, (a0), v4, v0.t # CHECK-ENCODING: [0x27,0x7c,0x45,0x44] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 27 7c 45 44 vsuxseg3ei64.v v24, (a0), v4 # CHECK-INST: vsuxseg3ei64.v v24, (a0), v4 # CHECK-ENCODING: [0x27,0x7c,0x45,0x46] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 27 7c 45 46 vsoxseg3ei8.v v24, (a0), v4, v0.t # CHECK-INST: vsoxseg3ei8.v v24, (a0), v4, v0.t # CHECK-ENCODING: [0x27,0x0c,0x45,0x4c] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 27 0c 45 4c vsoxseg3ei8.v v24, (a0), v4 # CHECK-INST: vsoxseg3ei8.v v24, (a0), v4 # CHECK-ENCODING: [0x27,0x0c,0x45,0x4e] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 27 0c 45 4e vsoxseg3ei16.v v24, (a0), v4, v0.t # CHECK-INST: vsoxseg3ei16.v v24, (a0), v4, v0.t # CHECK-ENCODING: [0x27,0x5c,0x45,0x4c] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 27 5c 45 4c vsoxseg3ei16.v v24, (a0), v4 # CHECK-INST: vsoxseg3ei16.v v24, (a0), v4 # CHECK-ENCODING: [0x27,0x5c,0x45,0x4e] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 27 5c 45 4e vsoxseg3ei32.v v24, (a0), v4, v0.t # CHECK-INST: vsoxseg3ei32.v v24, (a0), v4, v0.t # CHECK-ENCODING: [0x27,0x6c,0x45,0x4c] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 27 6c 45 4c vsoxseg3ei32.v v24, (a0), v4 # CHECK-INST: vsoxseg3ei32.v v24, (a0), v4 # CHECK-ENCODING: [0x27,0x6c,0x45,0x4e] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 27 6c 45 4e vsoxseg3ei64.v v24, (a0), v4, v0.t # CHECK-INST: vsoxseg3ei64.v v24, (a0), v4, v0.t # CHECK-ENCODING: [0x27,0x7c,0x45,0x4c] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 27 7c 45 4c vsoxseg3ei64.v v24, (a0), v4 # CHECK-INST: vsoxseg3ei64.v v24, (a0), v4 # CHECK-ENCODING: [0x27,0x7c,0x45,0x4e] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 27 7c 45 4e vsseg4e8.v v24, (a0), v0.t # CHECK-INST: vsseg4e8.v v24, (a0), v0.t # CHECK-ENCODING: [0x27,0x0c,0x05,0x60] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 27 0c 05 60 vsseg4e8.v v24, (a0) # CHECK-INST: vsseg4e8.v v24, (a0) # CHECK-ENCODING: [0x27,0x0c,0x05,0x62] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 27 0c 05 62 vsseg4e16.v v24, (a0), v0.t # CHECK-INST: vsseg4e16.v v24, (a0), v0.t # CHECK-ENCODING: [0x27,0x5c,0x05,0x60] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 27 5c 05 60 vsseg4e16.v v24, (a0) # CHECK-INST: vsseg4e16.v v24, (a0) # CHECK-ENCODING: [0x27,0x5c,0x05,0x62] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 27 5c 05 62 vsseg4e32.v v24, (a0), v0.t # CHECK-INST: vsseg4e32.v v24, (a0), v0.t # CHECK-ENCODING: [0x27,0x6c,0x05,0x60] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 27 6c 05 60 vsseg4e32.v v24, (a0) # CHECK-INST: vsseg4e32.v v24, (a0) # CHECK-ENCODING: [0x27,0x6c,0x05,0x62] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 27 6c 05 62 vsseg4e64.v v24, (a0), v0.t # CHECK-INST: vsseg4e64.v v24, (a0), v0.t # CHECK-ENCODING: [0x27,0x7c,0x05,0x60] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 27 7c 05 60 vsseg4e64.v v24, (a0) # CHECK-INST: vsseg4e64.v v24, (a0) # CHECK-ENCODING: [0x27,0x7c,0x05,0x62] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 27 7c 05 62 vssseg4e8.v v24, (a0), a1, v0.t # CHECK-INST: vssseg4e8.v v24, (a0), a1, v0.t # CHECK-ENCODING: [0x27,0x0c,0xb5,0x68] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 27 0c b5 68 vssseg4e8.v v24, (a0), a1 # CHECK-INST: vssseg4e8.v v24, (a0), a1 # CHECK-ENCODING: [0x27,0x0c,0xb5,0x6a] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 27 0c b5 6a vssseg4e16.v v24, (a0), a1, v0.t # CHECK-INST: vssseg4e16.v v24, (a0), a1, v0.t # CHECK-ENCODING: [0x27,0x5c,0xb5,0x68] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 27 5c b5 68 vssseg4e16.v v24, (a0), a1 # CHECK-INST: vssseg4e16.v v24, (a0), a1 # CHECK-ENCODING: [0x27,0x5c,0xb5,0x6a] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 27 5c b5 6a vssseg4e32.v v24, (a0), a1, v0.t # CHECK-INST: vssseg4e32.v v24, (a0), a1, v0.t # CHECK-ENCODING: [0x27,0x6c,0xb5,0x68] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 27 6c b5 68 vssseg4e32.v v24, (a0), a1 # CHECK-INST: vssseg4e32.v v24, (a0), a1 # CHECK-ENCODING: [0x27,0x6c,0xb5,0x6a] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 27 6c b5 6a vssseg4e64.v v24, (a0), a1, v0.t # CHECK-INST: vssseg4e64.v v24, (a0), a1, v0.t # CHECK-ENCODING: [0x27,0x7c,0xb5,0x68] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 27 7c b5 68 vssseg4e64.v v24, (a0), a1 # CHECK-INST: vssseg4e64.v v24, (a0), a1 # CHECK-ENCODING: [0x27,0x7c,0xb5,0x6a] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 27 7c b5 6a vsuxseg4ei8.v v24, (a0), v4, v0.t # CHECK-INST: vsuxseg4ei8.v v24, (a0), v4, v0.t # CHECK-ENCODING: [0x27,0x0c,0x45,0x64] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 27 0c 45 64 vsuxseg4ei8.v v24, (a0), v4 # CHECK-INST: vsuxseg4ei8.v v24, (a0), v4 # CHECK-ENCODING: [0x27,0x0c,0x45,0x66] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 27 0c 45 66 vsuxseg4ei16.v v24, (a0), v4, v0.t # CHECK-INST: vsuxseg4ei16.v v24, (a0), v4, v0.t # CHECK-ENCODING: [0x27,0x5c,0x45,0x64] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 27 5c 45 64 vsuxseg4ei16.v v24, (a0), v4 # CHECK-INST: vsuxseg4ei16.v v24, (a0), v4 # CHECK-ENCODING: [0x27,0x5c,0x45,0x66] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 27 5c 45 66 vsuxseg4ei32.v v24, (a0), v4, v0.t # CHECK-INST: vsuxseg4ei32.v v24, (a0), v4, v0.t # CHECK-ENCODING: [0x27,0x6c,0x45,0x64] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 27 6c 45 64 vsuxseg4ei32.v v24, (a0), v4 # CHECK-INST: vsuxseg4ei32.v v24, (a0), v4 # CHECK-ENCODING: [0x27,0x6c,0x45,0x66] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 27 6c 45 66 vsuxseg4ei64.v v24, (a0), v4, v0.t # CHECK-INST: vsuxseg4ei64.v v24, (a0), v4, v0.t # CHECK-ENCODING: [0x27,0x7c,0x45,0x64] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 27 7c 45 64 vsuxseg4ei64.v v24, (a0), v4 # CHECK-INST: vsuxseg4ei64.v v24, (a0), v4 # CHECK-ENCODING: [0x27,0x7c,0x45,0x66] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 27 7c 45 66 vsoxseg4ei8.v v24, (a0), v4, v0.t # CHECK-INST: vsoxseg4ei8.v v24, (a0), v4, v0.t # CHECK-ENCODING: [0x27,0x0c,0x45,0x6c] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 27 0c 45 6c vsoxseg4ei8.v v24, (a0), v4 # CHECK-INST: vsoxseg4ei8.v v24, (a0), v4 # CHECK-ENCODING: [0x27,0x0c,0x45,0x6e] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 27 0c 45 6e vsoxseg4ei16.v v24, (a0), v4, v0.t # CHECK-INST: vsoxseg4ei16.v v24, (a0), v4, v0.t # CHECK-ENCODING: [0x27,0x5c,0x45,0x6c] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 27 5c 45 6c vsoxseg4ei16.v v24, (a0), v4 # CHECK-INST: vsoxseg4ei16.v v24, (a0), v4 # CHECK-ENCODING: [0x27,0x5c,0x45,0x6e] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 27 5c 45 6e vsoxseg4ei32.v v24, (a0), v4, v0.t # CHECK-INST: vsoxseg4ei32.v v24, (a0), v4, v0.t # CHECK-ENCODING: [0x27,0x6c,0x45,0x6c] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 27 6c 45 6c vsoxseg4ei32.v v24, (a0), v4 # CHECK-INST: vsoxseg4ei32.v v24, (a0), v4 # CHECK-ENCODING: [0x27,0x6c,0x45,0x6e] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 27 6c 45 6e vsoxseg4ei64.v v24, (a0), v4, v0.t # CHECK-INST: vsoxseg4ei64.v v24, (a0), v4, v0.t # CHECK-ENCODING: [0x27,0x7c,0x45,0x6c] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 27 7c 45 6c vsoxseg4ei64.v v24, (a0), v4 # CHECK-INST: vsoxseg4ei64.v v24, (a0), v4 # CHECK-ENCODING: [0x27,0x7c,0x45,0x6e] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 27 7c 45 6e vsseg5e8.v v24, (a0), v0.t # CHECK-INST: vsseg5e8.v v24, (a0), v0.t # CHECK-ENCODING: [0x27,0x0c,0x05,0x80] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 27 0c 05 80 vsseg5e8.v v24, (a0) # CHECK-INST: vsseg5e8.v v24, (a0) # CHECK-ENCODING: [0x27,0x0c,0x05,0x82] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 27 0c 05 82 vsseg5e16.v v24, (a0), v0.t # CHECK-INST: vsseg5e16.v v24, (a0), v0.t # CHECK-ENCODING: [0x27,0x5c,0x05,0x80] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 27 5c 05 80 vsseg5e16.v v24, (a0) # CHECK-INST: vsseg5e16.v v24, (a0) # CHECK-ENCODING: [0x27,0x5c,0x05,0x82] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 27 5c 05 82 vsseg5e32.v v24, (a0), v0.t # CHECK-INST: vsseg5e32.v v24, (a0), v0.t # CHECK-ENCODING: [0x27,0x6c,0x05,0x80] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 27 6c 05 80 vsseg5e32.v v24, (a0) # CHECK-INST: vsseg5e32.v v24, (a0) # CHECK-ENCODING: [0x27,0x6c,0x05,0x82] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 27 6c 05 82 vsseg5e64.v v24, (a0), v0.t # CHECK-INST: vsseg5e64.v v24, (a0), v0.t # CHECK-ENCODING: [0x27,0x7c,0x05,0x80] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 27 7c 05 80 vsseg5e64.v v24, (a0) # CHECK-INST: vsseg5e64.v v24, (a0) # CHECK-ENCODING: [0x27,0x7c,0x05,0x82] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 27 7c 05 82 vssseg5e8.v v24, (a0), a1, v0.t # CHECK-INST: vssseg5e8.v v24, (a0), a1, v0.t # CHECK-ENCODING: [0x27,0x0c,0xb5,0x88] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 27 0c b5 88 vssseg5e8.v v24, (a0), a1 # CHECK-INST: vssseg5e8.v v24, (a0), a1 # CHECK-ENCODING: [0x27,0x0c,0xb5,0x8a] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 27 0c b5 8a vssseg5e16.v v24, (a0), a1, v0.t # CHECK-INST: vssseg5e16.v v24, (a0), a1, v0.t # CHECK-ENCODING: [0x27,0x5c,0xb5,0x88] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 27 5c b5 88 vssseg5e16.v v24, (a0), a1 # CHECK-INST: vssseg5e16.v v24, (a0), a1 # CHECK-ENCODING: [0x27,0x5c,0xb5,0x8a] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 27 5c b5 8a vssseg5e32.v v24, (a0), a1, v0.t # CHECK-INST: vssseg5e32.v v24, (a0), a1, v0.t # CHECK-ENCODING: [0x27,0x6c,0xb5,0x88] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 27 6c b5 88 vssseg5e32.v v24, (a0), a1 # CHECK-INST: vssseg5e32.v v24, (a0), a1 # CHECK-ENCODING: [0x27,0x6c,0xb5,0x8a] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 27 6c b5 8a vssseg5e64.v v24, (a0), a1, v0.t # CHECK-INST: vssseg5e64.v v24, (a0), a1, v0.t # CHECK-ENCODING: [0x27,0x7c,0xb5,0x88] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 27 7c b5 88 vssseg5e64.v v24, (a0), a1 # CHECK-INST: vssseg5e64.v v24, (a0), a1 # CHECK-ENCODING: [0x27,0x7c,0xb5,0x8a] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 27 7c b5 8a vsuxseg5ei8.v v24, (a0), v4, v0.t # CHECK-INST: vsuxseg5ei8.v v24, (a0), v4, v0.t # CHECK-ENCODING: [0x27,0x0c,0x45,0x84] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 27 0c 45 84 vsuxseg5ei8.v v24, (a0), v4 # CHECK-INST: vsuxseg5ei8.v v24, (a0), v4 # CHECK-ENCODING: [0x27,0x0c,0x45,0x86] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 27 0c 45 86 vsuxseg5ei16.v v24, (a0), v4, v0.t # CHECK-INST: vsuxseg5ei16.v v24, (a0), v4, v0.t # CHECK-ENCODING: [0x27,0x5c,0x45,0x84] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 27 5c 45 84 vsuxseg5ei16.v v24, (a0), v4 # CHECK-INST: vsuxseg5ei16.v v24, (a0), v4 # CHECK-ENCODING: [0x27,0x5c,0x45,0x86] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 27 5c 45 86 vsuxseg5ei32.v v24, (a0), v4, v0.t # CHECK-INST: vsuxseg5ei32.v v24, (a0), v4, v0.t # CHECK-ENCODING: [0x27,0x6c,0x45,0x84] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 27 6c 45 84 vsuxseg5ei32.v v24, (a0), v4 # CHECK-INST: vsuxseg5ei32.v v24, (a0), v4 # CHECK-ENCODING: [0x27,0x6c,0x45,0x86] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 27 6c 45 86 vsuxseg5ei64.v v24, (a0), v4, v0.t # CHECK-INST: vsuxseg5ei64.v v24, (a0), v4, v0.t # CHECK-ENCODING: [0x27,0x7c,0x45,0x84] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 27 7c 45 84 vsuxseg5ei64.v v24, (a0), v4 # CHECK-INST: vsuxseg5ei64.v v24, (a0), v4 # CHECK-ENCODING: [0x27,0x7c,0x45,0x86] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 27 7c 45 86 vsoxseg5ei8.v v24, (a0), v4, v0.t # CHECK-INST: vsoxseg5ei8.v v24, (a0), v4, v0.t # CHECK-ENCODING: [0x27,0x0c,0x45,0x8c] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 27 0c 45 8c vsoxseg5ei8.v v24, (a0), v4 # CHECK-INST: vsoxseg5ei8.v v24, (a0), v4 # CHECK-ENCODING: [0x27,0x0c,0x45,0x8e] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 27 0c 45 8e vsoxseg5ei16.v v24, (a0), v4, v0.t # CHECK-INST: vsoxseg5ei16.v v24, (a0), v4, v0.t # CHECK-ENCODING: [0x27,0x5c,0x45,0x8c] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 27 5c 45 8c vsoxseg5ei16.v v24, (a0), v4 # CHECK-INST: vsoxseg5ei16.v v24, (a0), v4 # CHECK-ENCODING: [0x27,0x5c,0x45,0x8e] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 27 5c 45 8e vsoxseg5ei32.v v24, (a0), v4, v0.t # CHECK-INST: vsoxseg5ei32.v v24, (a0), v4, v0.t # CHECK-ENCODING: [0x27,0x6c,0x45,0x8c] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 27 6c 45 8c vsoxseg5ei32.v v24, (a0), v4 # CHECK-INST: vsoxseg5ei32.v v24, (a0), v4 # CHECK-ENCODING: [0x27,0x6c,0x45,0x8e] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 27 6c 45 8e vsoxseg5ei64.v v24, (a0), v4, v0.t # CHECK-INST: vsoxseg5ei64.v v24, (a0), v4, v0.t # CHECK-ENCODING: [0x27,0x7c,0x45,0x8c] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 27 7c 45 8c vsoxseg5ei64.v v24, (a0), v4 # CHECK-INST: vsoxseg5ei64.v v24, (a0), v4 # CHECK-ENCODING: [0x27,0x7c,0x45,0x8e] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 27 7c 45 8e vsseg6e8.v v24, (a0), v0.t # CHECK-INST: vsseg6e8.v v24, (a0), v0.t # CHECK-ENCODING: [0x27,0x0c,0x05,0xa0] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 27 0c 05 a0 vsseg6e8.v v24, (a0) # CHECK-INST: vsseg6e8.v v24, (a0) # CHECK-ENCODING: [0x27,0x0c,0x05,0xa2] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 27 0c 05 a2 vsseg6e16.v v24, (a0), v0.t # CHECK-INST: vsseg6e16.v v24, (a0), v0.t # CHECK-ENCODING: [0x27,0x5c,0x05,0xa0] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 27 5c 05 a0 vsseg6e16.v v24, (a0) # CHECK-INST: vsseg6e16.v v24, (a0) # CHECK-ENCODING: [0x27,0x5c,0x05,0xa2] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 27 5c 05 a2 vsseg6e32.v v24, (a0), v0.t # CHECK-INST: vsseg6e32.v v24, (a0), v0.t # CHECK-ENCODING: [0x27,0x6c,0x05,0xa0] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 27 6c 05 a0 vsseg6e32.v v24, (a0) # CHECK-INST: vsseg6e32.v v24, (a0) # CHECK-ENCODING: [0x27,0x6c,0x05,0xa2] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 27 6c 05 a2 vsseg6e64.v v24, (a0), v0.t # CHECK-INST: vsseg6e64.v v24, (a0), v0.t # CHECK-ENCODING: [0x27,0x7c,0x05,0xa0] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 27 7c 05 a0 vsseg6e64.v v24, (a0) # CHECK-INST: vsseg6e64.v v24, (a0) # CHECK-ENCODING: [0x27,0x7c,0x05,0xa2] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 27 7c 05 a2 vssseg6e8.v v24, (a0), a1, v0.t # CHECK-INST: vssseg6e8.v v24, (a0), a1, v0.t # CHECK-ENCODING: [0x27,0x0c,0xb5,0xa8] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 27 0c b5 a8 vssseg6e8.v v24, (a0), a1 # CHECK-INST: vssseg6e8.v v24, (a0), a1 # CHECK-ENCODING: [0x27,0x0c,0xb5,0xaa] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 27 0c b5 aa vssseg6e16.v v24, (a0), a1, v0.t # CHECK-INST: vssseg6e16.v v24, (a0), a1, v0.t # CHECK-ENCODING: [0x27,0x5c,0xb5,0xa8] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 27 5c b5 a8 vssseg6e16.v v24, (a0), a1 # CHECK-INST: vssseg6e16.v v24, (a0), a1 # CHECK-ENCODING: [0x27,0x5c,0xb5,0xaa] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 27 5c b5 aa vssseg6e32.v v24, (a0), a1, v0.t # CHECK-INST: vssseg6e32.v v24, (a0), a1, v0.t # CHECK-ENCODING: [0x27,0x6c,0xb5,0xa8] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 27 6c b5 a8 vssseg6e32.v v24, (a0), a1 # CHECK-INST: vssseg6e32.v v24, (a0), a1 # CHECK-ENCODING: [0x27,0x6c,0xb5,0xaa] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 27 6c b5 aa vssseg6e64.v v24, (a0), a1, v0.t # CHECK-INST: vssseg6e64.v v24, (a0), a1, v0.t # CHECK-ENCODING: [0x27,0x7c,0xb5,0xa8] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 27 7c b5 a8 vssseg6e64.v v24, (a0), a1 # CHECK-INST: vssseg6e64.v v24, (a0), a1 # CHECK-ENCODING: [0x27,0x7c,0xb5,0xaa] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 27 7c b5 aa vsuxseg6ei8.v v24, (a0), v4, v0.t # CHECK-INST: vsuxseg6ei8.v v24, (a0), v4, v0.t # CHECK-ENCODING: [0x27,0x0c,0x45,0xa4] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 27 0c 45 a4 vsuxseg6ei8.v v24, (a0), v4 # CHECK-INST: vsuxseg6ei8.v v24, (a0), v4 # CHECK-ENCODING: [0x27,0x0c,0x45,0xa6] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 27 0c 45 a6 vsuxseg6ei16.v v24, (a0), v4, v0.t # CHECK-INST: vsuxseg6ei16.v v24, (a0), v4, v0.t # CHECK-ENCODING: [0x27,0x5c,0x45,0xa4] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 27 5c 45 a4 vsuxseg6ei16.v v24, (a0), v4 # CHECK-INST: vsuxseg6ei16.v v24, (a0), v4 # CHECK-ENCODING: [0x27,0x5c,0x45,0xa6] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 27 5c 45 a6 vsuxseg6ei32.v v24, (a0), v4, v0.t # CHECK-INST: vsuxseg6ei32.v v24, (a0), v4, v0.t # CHECK-ENCODING: [0x27,0x6c,0x45,0xa4] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 27 6c 45 a4 vsuxseg6ei32.v v24, (a0), v4 # CHECK-INST: vsuxseg6ei32.v v24, (a0), v4 # CHECK-ENCODING: [0x27,0x6c,0x45,0xa6] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 27 6c 45 a6 vsuxseg6ei64.v v24, (a0), v4, v0.t # CHECK-INST: vsuxseg6ei64.v v24, (a0), v4, v0.t # CHECK-ENCODING: [0x27,0x7c,0x45,0xa4] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 27 7c 45 a4 vsuxseg6ei64.v v24, (a0), v4 # CHECK-INST: vsuxseg6ei64.v v24, (a0), v4 # CHECK-ENCODING: [0x27,0x7c,0x45,0xa6] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 27 7c 45 a6 vsoxseg6ei8.v v24, (a0), v4, v0.t # CHECK-INST: vsoxseg6ei8.v v24, (a0), v4, v0.t # CHECK-ENCODING: [0x27,0x0c,0x45,0xac] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 27 0c 45 ac vsoxseg6ei8.v v24, (a0), v4 # CHECK-INST: vsoxseg6ei8.v v24, (a0), v4 # CHECK-ENCODING: [0x27,0x0c,0x45,0xae] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 27 0c 45 ae vsoxseg6ei16.v v24, (a0), v4, v0.t # CHECK-INST: vsoxseg6ei16.v v24, (a0), v4, v0.t # CHECK-ENCODING: [0x27,0x5c,0x45,0xac] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 27 5c 45 ac vsoxseg6ei16.v v24, (a0), v4 # CHECK-INST: vsoxseg6ei16.v v24, (a0), v4 # CHECK-ENCODING: [0x27,0x5c,0x45,0xae] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 27 5c 45 ae vsoxseg6ei32.v v24, (a0), v4, v0.t # CHECK-INST: vsoxseg6ei32.v v24, (a0), v4, v0.t # CHECK-ENCODING: [0x27,0x6c,0x45,0xac] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 27 6c 45 ac vsoxseg6ei32.v v24, (a0), v4 # CHECK-INST: vsoxseg6ei32.v v24, (a0), v4 # CHECK-ENCODING: [0x27,0x6c,0x45,0xae] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 27 6c 45 ae vsoxseg6ei64.v v24, (a0), v4, v0.t # CHECK-INST: vsoxseg6ei64.v v24, (a0), v4, v0.t # CHECK-ENCODING: [0x27,0x7c,0x45,0xac] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 27 7c 45 ac vsoxseg6ei64.v v24, (a0), v4 # CHECK-INST: vsoxseg6ei64.v v24, (a0), v4 # CHECK-ENCODING: [0x27,0x7c,0x45,0xae] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 27 7c 45 ae vsseg7e8.v v24, (a0), v0.t # CHECK-INST: vsseg7e8.v v24, (a0), v0.t # CHECK-ENCODING: [0x27,0x0c,0x05,0xc0] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 27 0c 05 c0 vsseg7e8.v v24, (a0) # CHECK-INST: vsseg7e8.v v24, (a0) # CHECK-ENCODING: [0x27,0x0c,0x05,0xc2] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 27 0c 05 c2 vsseg7e16.v v24, (a0), v0.t # CHECK-INST: vsseg7e16.v v24, (a0), v0.t # CHECK-ENCODING: [0x27,0x5c,0x05,0xc0] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 27 5c 05 c0 vsseg7e16.v v24, (a0) # CHECK-INST: vsseg7e16.v v24, (a0) # CHECK-ENCODING: [0x27,0x5c,0x05,0xc2] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 27 5c 05 c2 vsseg7e32.v v24, (a0), v0.t # CHECK-INST: vsseg7e32.v v24, (a0), v0.t # CHECK-ENCODING: [0x27,0x6c,0x05,0xc0] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 27 6c 05 c0 vsseg7e32.v v24, (a0) # CHECK-INST: vsseg7e32.v v24, (a0) # CHECK-ENCODING: [0x27,0x6c,0x05,0xc2] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 27 6c 05 c2 vsseg7e64.v v24, (a0), v0.t # CHECK-INST: vsseg7e64.v v24, (a0), v0.t # CHECK-ENCODING: [0x27,0x7c,0x05,0xc0] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 27 7c 05 c0 vsseg7e64.v v24, (a0) # CHECK-INST: vsseg7e64.v v24, (a0) # CHECK-ENCODING: [0x27,0x7c,0x05,0xc2] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 27 7c 05 c2 vssseg7e8.v v24, (a0), a1, v0.t # CHECK-INST: vssseg7e8.v v24, (a0), a1, v0.t # CHECK-ENCODING: [0x27,0x0c,0xb5,0xc8] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 27 0c b5 c8 vssseg7e8.v v24, (a0), a1 # CHECK-INST: vssseg7e8.v v24, (a0), a1 # CHECK-ENCODING: [0x27,0x0c,0xb5,0xca] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 27 0c b5 ca vssseg7e16.v v24, (a0), a1, v0.t # CHECK-INST: vssseg7e16.v v24, (a0), a1, v0.t # CHECK-ENCODING: [0x27,0x5c,0xb5,0xc8] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 27 5c b5 c8 vssseg7e16.v v24, (a0), a1 # CHECK-INST: vssseg7e16.v v24, (a0), a1 # CHECK-ENCODING: [0x27,0x5c,0xb5,0xca] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 27 5c b5 ca vssseg7e32.v v24, (a0), a1, v0.t # CHECK-INST: vssseg7e32.v v24, (a0), a1, v0.t # CHECK-ENCODING: [0x27,0x6c,0xb5,0xc8] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 27 6c b5 c8 vssseg7e32.v v24, (a0), a1 # CHECK-INST: vssseg7e32.v v24, (a0), a1 # CHECK-ENCODING: [0x27,0x6c,0xb5,0xca] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 27 6c b5 ca vssseg7e64.v v24, (a0), a1, v0.t # CHECK-INST: vssseg7e64.v v24, (a0), a1, v0.t # CHECK-ENCODING: [0x27,0x7c,0xb5,0xc8] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 27 7c b5 c8 vssseg7e64.v v24, (a0), a1 # CHECK-INST: vssseg7e64.v v24, (a0), a1 # CHECK-ENCODING: [0x27,0x7c,0xb5,0xca] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 27 7c b5 ca vsuxseg7ei8.v v24, (a0), v4, v0.t # CHECK-INST: vsuxseg7ei8.v v24, (a0), v4, v0.t # CHECK-ENCODING: [0x27,0x0c,0x45,0xc4] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 27 0c 45 c4 vsuxseg7ei8.v v24, (a0), v4 # CHECK-INST: vsuxseg7ei8.v v24, (a0), v4 # CHECK-ENCODING: [0x27,0x0c,0x45,0xc6] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 27 0c 45 c6 vsuxseg7ei16.v v24, (a0), v4, v0.t # CHECK-INST: vsuxseg7ei16.v v24, (a0), v4, v0.t # CHECK-ENCODING: [0x27,0x5c,0x45,0xc4] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 27 5c 45 c4 vsuxseg7ei16.v v24, (a0), v4 # CHECK-INST: vsuxseg7ei16.v v24, (a0), v4 # CHECK-ENCODING: [0x27,0x5c,0x45,0xc6] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 27 5c 45 c6 vsuxseg7ei32.v v24, (a0), v4, v0.t # CHECK-INST: vsuxseg7ei32.v v24, (a0), v4, v0.t # CHECK-ENCODING: [0x27,0x6c,0x45,0xc4] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 27 6c 45 c4 vsuxseg7ei32.v v24, (a0), v4 # CHECK-INST: vsuxseg7ei32.v v24, (a0), v4 # CHECK-ENCODING: [0x27,0x6c,0x45,0xc6] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 27 6c 45 c6 vsuxseg7ei64.v v24, (a0), v4, v0.t # CHECK-INST: vsuxseg7ei64.v v24, (a0), v4, v0.t # CHECK-ENCODING: [0x27,0x7c,0x45,0xc4] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 27 7c 45 c4 vsuxseg7ei64.v v24, (a0), v4 # CHECK-INST: vsuxseg7ei64.v v24, (a0), v4 # CHECK-ENCODING: [0x27,0x7c,0x45,0xc6] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 27 7c 45 c6 vsoxseg7ei8.v v24, (a0), v4, v0.t # CHECK-INST: vsoxseg7ei8.v v24, (a0), v4, v0.t # CHECK-ENCODING: [0x27,0x0c,0x45,0xcc] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 27 0c 45 cc vsoxseg7ei8.v v24, (a0), v4 # CHECK-INST: vsoxseg7ei8.v v24, (a0), v4 # CHECK-ENCODING: [0x27,0x0c,0x45,0xce] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 27 0c 45 ce vsoxseg7ei16.v v24, (a0), v4, v0.t # CHECK-INST: vsoxseg7ei16.v v24, (a0), v4, v0.t # CHECK-ENCODING: [0x27,0x5c,0x45,0xcc] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 27 5c 45 cc vsoxseg7ei16.v v24, (a0), v4 # CHECK-INST: vsoxseg7ei16.v v24, (a0), v4 # CHECK-ENCODING: [0x27,0x5c,0x45,0xce] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 27 5c 45 ce vsoxseg7ei32.v v24, (a0), v4, v0.t # CHECK-INST: vsoxseg7ei32.v v24, (a0), v4, v0.t # CHECK-ENCODING: [0x27,0x6c,0x45,0xcc] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 27 6c 45 cc vsoxseg7ei32.v v24, (a0), v4 # CHECK-INST: vsoxseg7ei32.v v24, (a0), v4 # CHECK-ENCODING: [0x27,0x6c,0x45,0xce] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 27 6c 45 ce vsoxseg7ei64.v v24, (a0), v4, v0.t # CHECK-INST: vsoxseg7ei64.v v24, (a0), v4, v0.t # CHECK-ENCODING: [0x27,0x7c,0x45,0xcc] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 27 7c 45 cc vsoxseg7ei64.v v24, (a0), v4 # CHECK-INST: vsoxseg7ei64.v v24, (a0), v4 # CHECK-ENCODING: [0x27,0x7c,0x45,0xce] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 27 7c 45 ce vsseg8e8.v v24, (a0), v0.t # CHECK-INST: vsseg8e8.v v24, (a0), v0.t # CHECK-ENCODING: [0x27,0x0c,0x05,0xe0] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 27 0c 05 e0 vsseg8e8.v v24, (a0) # CHECK-INST: vsseg8e8.v v24, (a0) # CHECK-ENCODING: [0x27,0x0c,0x05,0xe2] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 27 0c 05 e2 vsseg8e16.v v24, (a0), v0.t # CHECK-INST: vsseg8e16.v v24, (a0), v0.t # CHECK-ENCODING: [0x27,0x5c,0x05,0xe0] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 27 5c 05 e0 vsseg8e16.v v24, (a0) # CHECK-INST: vsseg8e16.v v24, (a0) # CHECK-ENCODING: [0x27,0x5c,0x05,0xe2] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 27 5c 05 e2 vsseg8e32.v v24, (a0), v0.t # CHECK-INST: vsseg8e32.v v24, (a0), v0.t # CHECK-ENCODING: [0x27,0x6c,0x05,0xe0] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 27 6c 05 e0 vsseg8e32.v v24, (a0) # CHECK-INST: vsseg8e32.v v24, (a0) # CHECK-ENCODING: [0x27,0x6c,0x05,0xe2] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 27 6c 05 e2 vsseg8e64.v v24, (a0), v0.t # CHECK-INST: vsseg8e64.v v24, (a0), v0.t # CHECK-ENCODING: [0x27,0x7c,0x05,0xe0] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 27 7c 05 e0 vsseg8e64.v v24, (a0) # CHECK-INST: vsseg8e64.v v24, (a0) # CHECK-ENCODING: [0x27,0x7c,0x05,0xe2] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 27 7c 05 e2 vssseg8e8.v v24, (a0), a1, v0.t # CHECK-INST: vssseg8e8.v v24, (a0), a1, v0.t # CHECK-ENCODING: [0x27,0x0c,0xb5,0xe8] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 27 0c b5 e8 vssseg8e8.v v24, (a0), a1 # CHECK-INST: vssseg8e8.v v24, (a0), a1 # CHECK-ENCODING: [0x27,0x0c,0xb5,0xea] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 27 0c b5 ea vssseg8e16.v v24, (a0), a1, v0.t # CHECK-INST: vssseg8e16.v v24, (a0), a1, v0.t # CHECK-ENCODING: [0x27,0x5c,0xb5,0xe8] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 27 5c b5 e8 vssseg8e16.v v24, (a0), a1 # CHECK-INST: vssseg8e16.v v24, (a0), a1 # CHECK-ENCODING: [0x27,0x5c,0xb5,0xea] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 27 5c b5 ea vssseg8e32.v v24, (a0), a1, v0.t # CHECK-INST: vssseg8e32.v v24, (a0), a1, v0.t # CHECK-ENCODING: [0x27,0x6c,0xb5,0xe8] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 27 6c b5 e8 vssseg8e32.v v24, (a0), a1 # CHECK-INST: vssseg8e32.v v24, (a0), a1 # CHECK-ENCODING: [0x27,0x6c,0xb5,0xea] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 27 6c b5 ea vssseg8e64.v v24, (a0), a1, v0.t # CHECK-INST: vssseg8e64.v v24, (a0), a1, v0.t # CHECK-ENCODING: [0x27,0x7c,0xb5,0xe8] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 27 7c b5 e8 vssseg8e64.v v24, (a0), a1 # CHECK-INST: vssseg8e64.v v24, (a0), a1 # CHECK-ENCODING: [0x27,0x7c,0xb5,0xea] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 27 7c b5 ea vsuxseg8ei8.v v24, (a0), v4, v0.t # CHECK-INST: vsuxseg8ei8.v v24, (a0), v4, v0.t # CHECK-ENCODING: [0x27,0x0c,0x45,0xe4] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 27 0c 45 e4 vsuxseg8ei8.v v24, (a0), v4 # CHECK-INST: vsuxseg8ei8.v v24, (a0), v4 # CHECK-ENCODING: [0x27,0x0c,0x45,0xe6] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 27 0c 45 e6 vsuxseg8ei16.v v24, (a0), v4, v0.t # CHECK-INST: vsuxseg8ei16.v v24, (a0), v4, v0.t # CHECK-ENCODING: [0x27,0x5c,0x45,0xe4] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 27 5c 45 e4 vsuxseg8ei16.v v24, (a0), v4 # CHECK-INST: vsuxseg8ei16.v v24, (a0), v4 # CHECK-ENCODING: [0x27,0x5c,0x45,0xe6] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 27 5c 45 e6 vsuxseg8ei32.v v24, (a0), v4, v0.t # CHECK-INST: vsuxseg8ei32.v v24, (a0), v4, v0.t # CHECK-ENCODING: [0x27,0x6c,0x45,0xe4] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 27 6c 45 e4 vsuxseg8ei32.v v24, (a0), v4 # CHECK-INST: vsuxseg8ei32.v v24, (a0), v4 # CHECK-ENCODING: [0x27,0x6c,0x45,0xe6] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 27 6c 45 e6 vsuxseg8ei64.v v24, (a0), v4, v0.t # CHECK-INST: vsuxseg8ei64.v v24, (a0), v4, v0.t # CHECK-ENCODING: [0x27,0x7c,0x45,0xe4] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 27 7c 45 e4 vsuxseg8ei64.v v24, (a0), v4 # CHECK-INST: vsuxseg8ei64.v v24, (a0), v4 # CHECK-ENCODING: [0x27,0x7c,0x45,0xe6] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 27 7c 45 e6 vsoxseg8ei8.v v24, (a0), v4, v0.t # CHECK-INST: vsoxseg8ei8.v v24, (a0), v4, v0.t # CHECK-ENCODING: [0x27,0x0c,0x45,0xec] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 27 0c 45 ec vsoxseg8ei8.v v24, (a0), v4 # CHECK-INST: vsoxseg8ei8.v v24, (a0), v4 # CHECK-ENCODING: [0x27,0x0c,0x45,0xee] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 27 0c 45 ee vsoxseg8ei16.v v24, (a0), v4, v0.t # CHECK-INST: vsoxseg8ei16.v v24, (a0), v4, v0.t # CHECK-ENCODING: [0x27,0x5c,0x45,0xec] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 27 5c 45 ec vsoxseg8ei16.v v24, (a0), v4 # CHECK-INST: vsoxseg8ei16.v v24, (a0), v4 # CHECK-ENCODING: [0x27,0x5c,0x45,0xee] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 27 5c 45 ee vsoxseg8ei32.v v24, (a0), v4, v0.t # CHECK-INST: vsoxseg8ei32.v v24, (a0), v4, v0.t # CHECK-ENCODING: [0x27,0x6c,0x45,0xec] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 27 6c 45 ec vsoxseg8ei32.v v24, (a0), v4 # CHECK-INST: vsoxseg8ei32.v v24, (a0), v4 # CHECK-ENCODING: [0x27,0x6c,0x45,0xee] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 27 6c 45 ee vsoxseg8ei64.v v24, (a0), v4, v0.t # CHECK-INST: vsoxseg8ei64.v v24, (a0), v4, v0.t # CHECK-ENCODING: [0x27,0x7c,0x45,0xec] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 27 7c 45 ec vsoxseg8ei64.v v24, (a0), v4 # CHECK-INST: vsoxseg8ei64.v v24, (a0), v4 # CHECK-ENCODING: [0x27,0x7c,0x45,0xee] -# CHECK-ERROR: instruction requires the following: 'Zvlsseg' +# CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors) # CHECK-UNKNOWN: 27 7c 45 ee