diff --git a/llvm/lib/CodeGen/MachineOutliner.cpp b/llvm/lib/CodeGen/MachineOutliner.cpp --- a/llvm/lib/CodeGen/MachineOutliner.cpp +++ b/llvm/lib/CodeGen/MachineOutliner.cpp @@ -798,6 +798,7 @@ Last = std::next(CallInst.getReverse()); Iter != Last; Iter++) { MachineInstr *MI = &*Iter; + SmallSet InstrUseRegs; for (MachineOperand &MOP : MI->operands()) { // Skip over anything that isn't a register. if (!MOP.isReg()) @@ -806,7 +807,7 @@ if (MOP.isDef()) { // Introduce DefRegs set to skip the redundant register. DefRegs.insert(MOP.getReg()); - if (!MOP.isDead() && UseRegs.count(MOP.getReg())) + if (!MOP.isDead() && UseRegs.count(MOP.getReg()) && !InstrUseRegs.count(MOP.getReg())) // Since the regiester is modeled as defined, // it is not necessary to be put in use register set. UseRegs.erase(MOP.getReg()); @@ -814,6 +815,7 @@ // Any register which is not undefined should // be put in the use register set. UseRegs.insert(MOP.getReg()); + InstrUseRegs.insert(MOP.getReg()); } } if (MI->isCandidateForCallSiteEntry()) diff --git a/llvm/test/CodeGen/AArch64/machine-outliner-side-effect.mir b/llvm/test/CodeGen/AArch64/machine-outliner-side-effect-3.mir copy from llvm/test/CodeGen/AArch64/machine-outliner-side-effect.mir copy to llvm/test/CodeGen/AArch64/machine-outliner-side-effect-3.mir --- a/llvm/test/CodeGen/AArch64/machine-outliner-side-effect.mir +++ b/llvm/test/CodeGen/AArch64/machine-outliner-side-effect-3.mir @@ -1,6 +1,6 @@ # RUN: llc -mtriple=aarch64 -run-pass=machine-outliner -verify-machineinstrs %s -o - | FileCheck %s -# The test checks whether the compiler updates the side effect of function @OUTLINED_FUNCTION_0 by adding the use of register x20. +# The test checks whether the compiler updates the side effect of function @OUTLINED_FUNCTION_0 when passing register x0. --- | declare void @spam() local_unnamed_addr @@ -11,17 +11,17 @@ tracksRegLiveness: true body: | bb.0: - liveins: $x0, $x20 + liveins: $x0 - $x0 = COPY renamable $x20 + $w1 = MOVZWi 0, 0 BL @spam, csr_aarch64_aapcs, implicit-def dead $lr, implicit $sp, implicit $x0, implicit-def $sp, implicit-def $x0 renamable $x21 = COPY $x0 - $x0 = COPY renamable $x20 + $w1 = MOVZWi 0, 0 BL @spam, csr_aarch64_aapcs, implicit-def dead $lr, implicit $sp, implicit $x0, implicit-def $sp, implicit-def $x0 renamable $x22 = COPY $x0 - $x0 = COPY killed renamable $x20 + $w1 = MOVZWi 0, 0 BL @spam, csr_aarch64_aapcs, implicit-def dead $lr, implicit $sp, implicit $x0, implicit-def $sp, implicit-def $x0 renamable $x3 = COPY $x0 @@ -29,4 +29,4 @@ ... -# CHECK: BL @OUTLINED_FUNCTION_0, {{.*}}, implicit $x20, {{.*}} +# CHECK: BL @OUTLINED_FUNCTION_0, {{.*}}, implicit $x0{{.*}} diff --git a/llvm/test/CodeGen/AArch64/machine-outliner-side-effect.mir b/llvm/test/CodeGen/AArch64/machine-outliner-side-effect.mir --- a/llvm/test/CodeGen/AArch64/machine-outliner-side-effect.mir +++ b/llvm/test/CodeGen/AArch64/machine-outliner-side-effect.mir @@ -29,4 +29,4 @@ ... -# CHECK: BL @OUTLINED_FUNCTION_0, {{.*}}, implicit $x20, {{.*}} +# CHECK: BL @OUTLINED_FUNCTION_0, {{.*}}, implicit $x20{{.*}}