diff --git a/llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp b/llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp
--- a/llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp
+++ b/llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp
@@ -58,7 +58,7 @@
                                          createRISCVDisassembler);
 }
 
-static DecodeStatus DecodeGPRRegisterClass(MCInst &Inst, uint64_t RegNo,
+static DecodeStatus decodeGPRRegisterClass(MCInst &Inst, uint64_t RegNo,
                                            uint64_t Address,
                                            const void *Decoder) {
   const FeatureBitset &FeatureBits =
@@ -75,7 +75,7 @@
   return MCDisassembler::Success;
 }
 
-static DecodeStatus DecodeFPR16RegisterClass(MCInst &Inst, uint64_t RegNo,
+static DecodeStatus decodeFPR16RegisterClass(MCInst &Inst, uint64_t RegNo,
                                              uint64_t Address,
                                              const void *Decoder) {
   if (RegNo >= 32)
@@ -86,7 +86,7 @@
   return MCDisassembler::Success;
 }
 
-static DecodeStatus DecodeFPR32RegisterClass(MCInst &Inst, uint64_t RegNo,
+static DecodeStatus decodeFPR32RegisterClass(MCInst &Inst, uint64_t RegNo,
                                              uint64_t Address,
                                              const void *Decoder) {
   if (RegNo >= 32)
@@ -97,7 +97,7 @@
   return MCDisassembler::Success;
 }
 
-static DecodeStatus DecodeFPR32CRegisterClass(MCInst &Inst, uint64_t RegNo,
+static DecodeStatus decodeFPR32CRegisterClass(MCInst &Inst, uint64_t RegNo,
                                               uint64_t Address,
                                               const void *Decoder) {
   if (RegNo >= 8) {
@@ -108,7 +108,7 @@
   return MCDisassembler::Success;
 }
 
-static DecodeStatus DecodeFPR64RegisterClass(MCInst &Inst, uint64_t RegNo,
+static DecodeStatus decodeFPR64RegisterClass(MCInst &Inst, uint64_t RegNo,
                                              uint64_t Address,
                                              const void *Decoder) {
   if (RegNo >= 32)
@@ -119,7 +119,7 @@
   return MCDisassembler::Success;
 }
 
-static DecodeStatus DecodeFPR64CRegisterClass(MCInst &Inst, uint64_t RegNo,
+static DecodeStatus decodeFPR64CRegisterClass(MCInst &Inst, uint64_t RegNo,
                                               uint64_t Address,
                                               const void *Decoder) {
   if (RegNo >= 8) {
@@ -130,27 +130,27 @@
   return MCDisassembler::Success;
 }
 
-static DecodeStatus DecodeGPRNoX0RegisterClass(MCInst &Inst, uint64_t RegNo,
+static DecodeStatus decodeGPRNoX0RegisterClass(MCInst &Inst, uint64_t RegNo,
                                                uint64_t Address,
                                                const void *Decoder) {
   if (RegNo == 0) {
     return MCDisassembler::Fail;
   }
 
-  return DecodeGPRRegisterClass(Inst, RegNo, Address, Decoder);
+  return decodeGPRRegisterClass(Inst, RegNo, Address, Decoder);
 }
 
-static DecodeStatus DecodeGPRNoX0X2RegisterClass(MCInst &Inst, uint64_t RegNo,
+static DecodeStatus decodeGPRNoX0X2RegisterClass(MCInst &Inst, uint64_t RegNo,
                                                  uint64_t Address,
                                                  const void *Decoder) {
   if (RegNo == 2) {
     return MCDisassembler::Fail;
   }
 
-  return DecodeGPRNoX0RegisterClass(Inst, RegNo, Address, Decoder);
+  return decodeGPRNoX0RegisterClass(Inst, RegNo, Address, Decoder);
 }
 
-static DecodeStatus DecodeGPRCRegisterClass(MCInst &Inst, uint64_t RegNo,
+static DecodeStatus decodeGPRCRegisterClass(MCInst &Inst, uint64_t RegNo,
                                             uint64_t Address,
                                             const void *Decoder) {
   if (RegNo >= 8)
@@ -161,7 +161,7 @@
   return MCDisassembler::Success;
 }
 
-static DecodeStatus DecodeVRRegisterClass(MCInst &Inst, uint64_t RegNo,
+static DecodeStatus decodeVRRegisterClass(MCInst &Inst, uint64_t RegNo,
                                           uint64_t Address,
                                           const void *Decoder) {
   if (RegNo >= 32)
@@ -172,7 +172,7 @@
   return MCDisassembler::Success;
 }
 
-static DecodeStatus DecodeVRM2RegisterClass(MCInst &Inst, uint64_t RegNo,
+static DecodeStatus decodeVRM2RegisterClass(MCInst &Inst, uint64_t RegNo,
                                             uint64_t Address,
                                             const void *Decoder) {
   if (RegNo >= 32)
@@ -192,7 +192,7 @@
   return MCDisassembler::Success;
 }
 
-static DecodeStatus DecodeVRM4RegisterClass(MCInst &Inst, uint64_t RegNo,
+static DecodeStatus decodeVRM4RegisterClass(MCInst &Inst, uint64_t RegNo,
                                             uint64_t Address,
                                             const void *Decoder) {
   if (RegNo >= 32)
@@ -212,7 +212,7 @@
   return MCDisassembler::Success;
 }
 
-static DecodeStatus DecodeVRM8RegisterClass(MCInst &Inst, uint64_t RegNo,
+static DecodeStatus decodeVRM8RegisterClass(MCInst &Inst, uint64_t RegNo,
                                             uint64_t Address,
                                             const void *Decoder) {
   if (RegNo >= 32)
@@ -258,11 +258,11 @@
       Inst.getOpcode() == RISCV::C_FLDSP ||
       Inst.getOpcode() == RISCV::C_FSDSP ||
       Inst.getOpcode() == RISCV::C_ADDI4SPN) {
-    DecodeGPRRegisterClass(Inst, 2, Address, Decoder);
+    decodeGPRRegisterClass(Inst, 2, Address, Decoder);
   }
   if (Inst.getOpcode() == RISCV::C_ADDI16SP) {
-    DecodeGPRRegisterClass(Inst, 2, Address, Decoder);
-    DecodeGPRRegisterClass(Inst, 2, Address, Decoder);
+    decodeGPRRegisterClass(Inst, 2, Address, Decoder);
+    decodeGPRRegisterClass(Inst, 2, Address, Decoder);
   }
 }
 
@@ -369,7 +369,7 @@
 static DecodeStatus decodeRVCInstrRdSImm(MCInst &Inst, unsigned Insn,
                                          uint64_t Address,
                                          const void *Decoder) {
-  DecodeGPRRegisterClass(Inst, 0, Address, Decoder);
+  decodeGPRRegisterClass(Inst, 0, Address, Decoder);
   uint64_t SImm6 =
       fieldFromInstruction(Insn, 12, 1) << 5 | fieldFromInstruction(Insn, 2, 5);
   DecodeStatus Result = decodeSImmOperand<6>(Inst, SImm6, Address, Decoder);
@@ -381,7 +381,7 @@
 static DecodeStatus decodeRVCInstrRdRs1UImm(MCInst &Inst, unsigned Insn,
                                             uint64_t Address,
                                             const void *Decoder) {
-  DecodeGPRRegisterClass(Inst, 0, Address, Decoder);
+  decodeGPRRegisterClass(Inst, 0, Address, Decoder);
   Inst.addOperand(Inst.getOperand(0));
   uint64_t UImm6 =
       fieldFromInstruction(Insn, 12, 1) << 5 | fieldFromInstruction(Insn, 2, 5);
@@ -395,8 +395,8 @@
                                         uint64_t Address, const void *Decoder) {
   unsigned Rd = fieldFromInstruction(Insn, 7, 5);
   unsigned Rs2 = fieldFromInstruction(Insn, 2, 5);
-  DecodeGPRRegisterClass(Inst, Rd, Address, Decoder);
-  DecodeGPRRegisterClass(Inst, Rs2, Address, Decoder);
+  decodeGPRRegisterClass(Inst, Rd, Address, Decoder);
+  decodeGPRRegisterClass(Inst, Rs2, Address, Decoder);
   return MCDisassembler::Success;
 }
 
@@ -405,9 +405,9 @@
                                            const void *Decoder) {
   unsigned Rd = fieldFromInstruction(Insn, 7, 5);
   unsigned Rs2 = fieldFromInstruction(Insn, 2, 5);
-  DecodeGPRRegisterClass(Inst, Rd, Address, Decoder);
+  decodeGPRRegisterClass(Inst, Rd, Address, Decoder);
   Inst.addOperand(Inst.getOperand(0));
-  DecodeGPRRegisterClass(Inst, Rs2, Address, Decoder);
+  decodeGPRRegisterClass(Inst, Rs2, Address, Decoder);
   return MCDisassembler::Success;
 }
 
diff --git a/llvm/utils/TableGen/FixedLenDecoderEmitter.cpp b/llvm/utils/TableGen/FixedLenDecoderEmitter.cpp
--- a/llvm/utils/TableGen/FixedLenDecoderEmitter.cpp
+++ b/llvm/utils/TableGen/FixedLenDecoderEmitter.cpp
@@ -1803,9 +1803,9 @@
     Record = Record->getValueAsDef("RegClass");
 
   if (Record->isSubClassOf("RegisterClass")) {
-    Decoder = "Decode" + Record->getName().str() + "RegisterClass";
+    Decoder = "decode" + Record->getName().str() + "RegisterClass";
   } else if (Record->isSubClassOf("PointerLikeRegClass")) {
-    Decoder = "DecodePointerLikeRegClass" +
+    Decoder = "decodePointerLikeRegClass" +
       utostr(Record->getValueAsInt("RegClassKind"));
   }
 
@@ -1976,10 +1976,10 @@
       if (TypeRecord->isSubClassOf("RegisterOperand"))
         TypeRecord = TypeRecord->getValueAsDef("RegClass");
       if (TypeRecord->isSubClassOf("RegisterClass")) {
-        Decoder = "Decode" + TypeRecord->getName().str() + "RegisterClass";
+        Decoder = "decode" + TypeRecord->getName().str() + "RegisterClass";
         isReg = true;
       } else if (TypeRecord->isSubClassOf("PointerLikeRegClass")) {
-        Decoder = "DecodePointerLikeRegClass" +
+        Decoder = "decodePointerLikeRegClass" +
                   utostr(TypeRecord->getValueAsInt("RegClassKind"));
         isReg = true;
       }