[lldb] [DynamicRegisterInfo] Support value_regs with offset

[mgorny]

Summary

Support specifying an offset for value_regs[0], and add the offset
to the computed derived register offset. This makes it possible to
e.g. create the "ah" register on x86.

[labath]

lldb/unittests/Target/DynamicRegisterInfoTest.cpp

209–223

I don't know when this slipped through, but I think that the distinction between these two assert blocks is too subtle -- they're testing completely different things, so I think they deserve different names.

lldb/include/lldb/Target/DynamicRegisterInfo.h

struct Register {
     lldb::Encoding encoding = lldb::eEncodingUint;
     lldb::Format format = lldb::eFormatHex;
     uint32_t regnum_dwarf = LLDB_INVALID_REGNUM;
     uint32_t regnum_ehframe = LLDB_INVALID_REGNUM;
     uint32_t regnum_generic = LLDB_INVALID_REGNUM;
     uint32_t regnum_remote = LLDB_INVALID_REGNUM;
     std::vector<uint32_t> value_regs;
     std::vector<uint32_t> invalidate_regs;
+    uint32_t value_reg_offset = 0;
   };
 
   DynamicRegisterInfo() = default;
 
   DynamicRegisterInfo(const lldb_private::StructuredData::Dictionary &dict,
                       const lldb_private::ArchSpec &arch);
 
   virtual ~DynamicRegisterInfo() = default;

 
 protected:
   // Classes that inherit from DynamicRegisterInfo can see and modify these
   typedef std::vector<lldb_private::RegisterSet> set_collection;
   typedef std::vector<uint32_t> reg_num_collection;
   typedef std::vector<reg_num_collection> set_reg_num_collection;
   typedef std::vector<lldb_private::ConstString> name_collection;
   typedef std::map<uint32_t, reg_num_collection> reg_to_regs_map;
+  typedef std::map<uint32_t, uint32_t> reg_offset_map;
 
   llvm::Expected<uint32_t> ByteOffsetFromSlice(uint32_t index,
                                                llvm::StringRef slice_str,
                                                lldb::ByteOrder byte_order);
   llvm::Expected<uint32_t> ByteOffsetFromComposite(
       uint32_t index, lldb_private::StructuredData::Array &composite_reg_list,
       lldb::ByteOrder byte_order);
   llvm::Expected<uint32_t> ByteOffsetFromRegInfoDict(
       uint32_t index, lldb_private::StructuredData::Dictionary &reg_info_dict,
       lldb::ByteOrder byte_order);
 
   void MoveFrom(DynamicRegisterInfo &&info);
 
   void ConfigureOffsets();
 
   reg_collection m_regs;
   set_collection m_sets;
   set_reg_num_collection m_set_reg_nums;
   name_collection m_set_names;
   reg_to_regs_map m_value_regs_map;
   reg_to_regs_map m_invalidate_regs_map;
+  reg_offset_map m_value_reg_offset_map;
   size_t m_reg_data_byte_size = 0u; // The number of bytes required to store
                                     // all registers
   bool m_finalized = false;
   bool m_is_reconfigurable = false;
 };
 
 void addSupplementaryRegister(std::vector<DynamicRegisterInfo::Register> &regs,
                               DynamicRegisterInfo::Register new_reg_info);
 
 } // namespace lldb_private
 
 #endif // LLDB_TARGET_DYNAMICREGISTERINFO_H

lldb/source/Target/DynamicRegisterInfo.cpp

for (auto it : llvm::enumerate(regs)) {
 
     assert(reg.name);
     assert(reg.set_name);
 
     if (!reg.value_regs.empty())
       m_value_regs_map[local_regnum] = std::move(reg.value_regs);
     if (!reg.invalidate_regs.empty())
       m_invalidate_regs_map[local_regnum] = std::move(reg.invalidate_regs);
+    if (reg.value_reg_offset != 0) {
+      assert(reg.value_regs.size() == 1);
+      m_value_reg_offset_map[local_regnum] = reg.value_reg_offset;
+    }
 
     struct RegisterInfo reg_info {
       reg.name.AsCString(), reg.alt_name.AsCString(), reg.byte_size,
           reg.byte_offset, reg.encoding, reg.format,
           {reg.regnum_ehframe, reg.regnum_dwarf, reg.regnum_generic,
            reg.regnum_remote, local_regnum},
           // value_regs and invalidate_regs are filled by Finalize()
           nullptr, nullptr
void DynamicRegisterInfo::ConfigureOffsets() {
   // Now update all value_regs with each register info as needed
   for (auto &reg : m_regs) {
     if (reg.value_regs != nullptr) {
       // Assign a valid offset to all pseudo registers if not assigned by stub.
       // Pseudo registers with value_regs list populated will share same offset
       // as that of their corresponding primary register in value_regs list.
       if (reg.byte_offset == LLDB_INVALID_INDEX32) {
         uint32_t value_regnum = reg.value_regs[0];
-        if (value_regnum != LLDB_INVALID_INDEX32)
+        if (value_regnum != LLDB_INVALID_INDEX32) {
           reg.byte_offset = GetRegisterInfoAtIndex(value_regnum)->byte_offset;
+          auto it = m_value_reg_offset_map.find(reg.kinds[eRegisterKindLLDB]);
+          if (it != m_value_reg_offset_map.end())
+            reg.byte_offset += it->second;
+        }
       }
     }
 
     reg_offset = reg.byte_offset + reg.byte_size;
     if (m_reg_data_byte_size < reg_offset)
       m_reg_data_byte_size = reg_offset;
   }
 }

lldb/unittests/Target/DynamicRegisterInfoTest.cpp

uint32_t rax = AddTestRegister(
       [this](const DynamicRegisterInfo::Register &r) { m_regs.push_back(r); });
 
   // Add supplementary registers
   auto suppl_adder = [this](const DynamicRegisterInfo::Register &r) {
     addSupplementaryRegister(m_regs, r);
   };
   uint32_t eax = AddTestRegister("eax", "supplementary", 4, suppl_adder, {rax});
   uint32_t ax = AddTestRegister("ax", "supplementary", 2, suppl_adder, {rax});
+  uint32_t ah = AddTestRegister("ah", "supplementary", 1, suppl_adder, {rax});
   uint32_t al = AddTestRegister("al", "supplementary", 1, suppl_adder, {rax});
+  m_regs[ah].value_reg_offset = 1;
 
-  EXPECT_IN_REGS(rax, {}, {eax, ax, al});
-  EXPECT_IN_REGS(eax, {rax}, {rax, ax, al});
-  EXPECT_IN_REGS(ax, {rax}, {rax, eax, al});
-  EXPECT_IN_REGS(al, {rax}, {rax, eax, ax});
+  EXPECT_IN_REGS(rax, {}, {eax, ax, ah, al});
+  EXPECT_IN_REGS(eax, {rax}, {rax, ax, ah, al});
+  EXPECT_IN_REGS(ax, {rax}, {rax, eax, ah, al});
+  EXPECT_IN_REGS(ah, {rax}, {rax, eax, ax, al});
+  EXPECT_IN_REGS(al, {rax}, {rax, eax, ax, ah});
+
+  EXPECT_EQ(m_dyninfo.SetRegisterInfo(std::move(m_regs), ArchSpec()),
+            m_regs.size());
+  EXPECT_IN_DYNINFO(rax, 0, {}, {eax, ax, ah, al});
+  EXPECT_IN_DYNINFO(eax, 0, {rax}, {rax, ax, ah, al});
+  EXPECT_IN_DYNINFO(ax, 0, {rax}, {rax, eax, ah, al});
+  EXPECT_IN_DYNINFO(ah, 1, {rax}, {rax, eax, ax, al});
+  EXPECT_IN_DYNINFO(al, 0, {rax}, {rax, eax, ax, ah});
 }
 
 TEST_F(DynamicRegisterInfoRegisterTest, SetRegisterInfo) {
   auto adder = [this](const DynamicRegisterInfo::Register &r) {
     m_regs.push_back(r);
   };
   // Add regular registers
   uint32_t b1 = AddTestRegister("b1", "base", 8, adder);
   uint32_t b2 = AddTestRegister("b2", "other", 8, adder);