Index: clang/test/CodeGen/thinlto-distributed-newpm.ll =================================================================== --- clang/test/CodeGen/thinlto-distributed-newpm.ll +++ clang/test/CodeGen/thinlto-distributed-newpm.ll @@ -109,10 +109,11 @@ ; CHECK-O: Running analysis: PostDominatorTreeAnalysis on main ; CHECK-O: Running pass: MemCpyOptPass on main ; CHECK-O: Running pass: DSEPass on main -; CHECK-O: Running pass: LoopSimplifyPass on main -; CHECK-O: Running pass: LCSSAPass on main ; CHECK-O: Running pass: SimplifyCFGPass on main ; CHECK-O: Running pass: InstCombinePass on main +; CHECK-O: Running pass: LoopSimplifyPass on main +; CHECK-O: Running pass: LCSSAPass on main +; CHECK-O: Running pass: LICMPass on Loop ; CHECK-O: Invalidating analysis: DominatorTreeAnalysis on main ; CHECK-O: Invalidating analysis: BasicAA on main ; CHECK-O: Invalidating analysis: AAManager on main Index: llvm/lib/Passes/PassBuilderPipelines.cpp =================================================================== --- llvm/lib/Passes/PassBuilderPipelines.cpp +++ llvm/lib/Passes/PassBuilderPipelines.cpp @@ -544,9 +544,6 @@ FPM.addPass(MemCpyOptPass()); FPM.addPass(DSEPass()); - FPM.addPass(createFunctionToLoopPassAdaptor( - LICMPass(PTO.LicmMssaOptCap, PTO.LicmMssaNoAccForPromotionCap), - /*UseMemorySSA=*/true, /*UseBlockFrequencyInfo=*/true)); FPM.addPass(CoroElidePass()); @@ -556,6 +553,12 @@ FPM.addPass(SimplifyCFGPass( SimplifyCFGOptions().hoistCommonInsts(true).sinkCommonInsts(true))); FPM.addPass(InstCombinePass()); + // Instcombine can reverse some of the LICM's decisons. Run LICM after + // Instcombine and before rest of the pipeline which runs loop related + // optimizations like unrolling and vectorization. + FPM.addPass(createFunctionToLoopPassAdaptor( + LICMPass(PTO.LicmMssaOptCap, PTO.LicmMssaNoAccForPromotionCap), + /*UseMemorySSA=*/true, /*UseBlockFrequencyInfo=*/true)); invokePeepholeEPCallbacks(FPM, Level); if (EnableCHR && Level == OptimizationLevel::O3 && PGOOpt && @@ -982,9 +985,9 @@ } // Enhance/cleanup vector code. FPM.addPass(VectorCombinePass()); + FPM.addPass(InstCombinePass()); if (!IsFullLTO) { - FPM.addPass(InstCombinePass()); // Unroll small loops to hide loop backedge latency and saturate any // parallel execution resources of an out-of-order processor. We also then // need to clean up redundancies and loop invariant code. @@ -1003,17 +1006,14 @@ FPM.addPass(InstCombinePass()); FPM.addPass( RequireAnalysisPass()); - FPM.addPass(createFunctionToLoopPassAdaptor( - LICMPass(PTO.LicmMssaOptCap, PTO.LicmMssaNoAccForPromotionCap), - /*UseMemorySSA=*/true, /*UseBlockFrequencyInfo=*/true)); } + FPM.addPass(createFunctionToLoopPassAdaptor( + LICMPass(PTO.LicmMssaOptCap, PTO.LicmMssaNoAccForPromotionCap), + /*UseMemorySSA=*/true, /*UseBlockFrequencyInfo=*/true)); // Now that we've vectorized and unrolled loops, we may have more refined // alignment information, try to re-derive it here. FPM.addPass(AlignmentFromAssumptionsPass()); - - if (IsFullLTO) - FPM.addPass(InstCombinePass()); } ModulePassManager Index: llvm/test/Other/new-pm-defaults.ll =================================================================== --- llvm/test/Other/new-pm-defaults.ll +++ llvm/test/Other/new-pm-defaults.ll @@ -190,13 +190,13 @@ ; CHECK-O-NEXT: Running analysis: PostDominatorTreeAnalysis ; CHECK-O23SZ-NEXT: Running pass: MemCpyOptPass ; CHECK-O23SZ-NEXT: Running pass: DSEPass -; CHECK-O23SZ-NEXT: Running pass: LoopSimplifyPass -; CHECK-O23SZ-NEXT: Running pass: LCSSAPass -; CHECK-O23SZ-NEXT: Running pass: LICMPass ; CHECK-O23SZ-NEXT: Running pass: CoroElidePass ; CHECK-EP-SCALAR-LATE-NEXT: Running pass: NoOpFunctionPass ; CHECK-O-NEXT: Running pass: SimplifyCFGPass ; CHECK-O-NEXT: Running pass: InstCombinePass +; CHECK-O23SZ-NEXT: Running pass: LoopSimplifyPass +; CHECK-O23SZ-NEXT: Running pass: LCSSAPass +; CHECK-O23SZ-NEXT: Running pass: LICMPass ; CHECK-EP-PEEPHOLE-NEXT: Running pass: NoOpFunctionPass ; CHECK-O-NEXT: Running pass: CoroSplitPass ; CHECK-O-NEXT: Running pass: GlobalOptPass Index: llvm/test/Other/new-pm-lto-defaults.ll =================================================================== --- llvm/test/Other/new-pm-lto-defaults.ll +++ llvm/test/Other/new-pm-lto-defaults.ll @@ -121,8 +121,11 @@ ; CHECK-O3-NEXT: Running pass: SLPVectorizerPass on foo ; CHECK-OS-NEXT: Running pass: SLPVectorizerPass on foo ; CHECK-O23SZ-NEXT: Running pass: VectorCombinePass on foo -; CHECK-O23SZ-NEXT: Running pass: AlignmentFromAssumptionsPass on foo ; CHECK-O23SZ-NEXT: Running pass: InstCombinePass on foo +; CHECK-O23SZ-NEXT: Running pass: LoopSimplifyPass on foo +; CHECK-O23SZ-NEXT: Running pass: LCSSAPass on foo +; CHECK-O23SZ-NEXT: Running pass: LICMPass on Loop +; CHECK-O23SZ-NEXT: Running pass: AlignmentFromAssumptionsPass on foo ; CHECK-EP-Peephole-NEXT: Running pass: NoOpFunctionPass on foo ; CHECK-O23SZ-NEXT: Running pass: JumpThreadingPass on foo ; CHECK-O23SZ-NEXT: Running pass: LowerTypeTestsPass Index: llvm/test/Other/new-pm-thinlto-defaults.ll =================================================================== --- llvm/test/Other/new-pm-thinlto-defaults.ll +++ llvm/test/Other/new-pm-thinlto-defaults.ll @@ -176,12 +176,12 @@ ; CHECK-O-NEXT: Running analysis: PostDominatorTreeAnalysis ; CHECK-O23SZ-NEXT: Running pass: MemCpyOptPass ; CHECK-O23SZ-NEXT: Running pass: DSEPass -; CHECK-O23SZ-NEXT: Running pass: LoopSimplifyPass -; CHECK-O23SZ-NEXT: Running pass: LCSSAPass -; CHECK-O23SZ-NEXT: Running pass: LICMPass on Loop at depth 1 containing: %loop ; CHECK-O23SZ-NEXT: Running pass: CoroElidePass ; CHECK-O-NEXT: Running pass: SimplifyCFGPass ; CHECK-O-NEXT: Running pass: InstCombinePass +; CHECK-O23SZ-NEXT: Running pass: LoopSimplifyPass +; CHECK-O23SZ-NEXT: Running pass: LCSSAPass +; CHECK-O23SZ-NEXT: Running pass: LICMPass on Loop at depth 1 containing: %loop ; CHECK-O-NEXT: Running pass: CoroSplitPass ; CHECK-PRELINK-O-NEXT: Running pass: GlobalOptPass ; CHECK-POSTLINK-O-NEXT: Running pass: GlobalOptPass Index: llvm/test/Other/new-pm-thinlto-postlink-pgo-defaults.ll =================================================================== --- llvm/test/Other/new-pm-thinlto-postlink-pgo-defaults.ll +++ llvm/test/Other/new-pm-thinlto-postlink-pgo-defaults.ll @@ -148,12 +148,12 @@ ; CHECK-O-NEXT: Running pass: ADCEPass ; CHECK-O23SZ-NEXT: Running pass: MemCpyOptPass ; CHECK-O23SZ-NEXT: Running pass: DSEPass -; CHECK-O23SZ-NEXT: Running pass: LoopSimplifyPass -; CHECK-O23SZ-NEXT: Running pass: LCSSAPass -; CHECK-O23SZ-NEXT: Running pass: LICMPass ; CHECK-O23SZ-NEXT: Running pass: CoroElidePass ; CHECK-O-NEXT: Running pass: SimplifyCFGPass ; CHECK-O-NEXT: Running pass: InstCombinePass +; CHECK-O23SZ-NEXT: Running pass: LoopSimplifyPass +; CHECK-O23SZ-NEXT: Running pass: LCSSAPass +; CHECK-O23SZ-NEXT: Running pass: LICMPass ; CHECK-O-NEXT: Running pass: CoroSplitPass ; CHECK-O-NEXT: Running pass: GlobalOptPass ; CHECK-O-NEXT: Running pass: GlobalDCEPass Index: llvm/test/Other/new-pm-thinlto-postlink-samplepgo-defaults.ll =================================================================== --- llvm/test/Other/new-pm-thinlto-postlink-samplepgo-defaults.ll +++ llvm/test/Other/new-pm-thinlto-postlink-samplepgo-defaults.ll @@ -157,12 +157,12 @@ ; CHECK-O-NEXT: Running pass: ADCEPass ; CHECK-O23SZ-NEXT: Running pass: MemCpyOptPass ; CHECK-O23SZ-NEXT: Running pass: DSEPass -; CHECK-O23SZ-NEXT: Running pass: LoopSimplifyPass -; CHECK-O23SZ-NEXT: Running pass: LCSSAPass -; CHECK-O23SZ-NEXT: Running pass: LICMPass ; CHECK-O23SZ-NEXT: Running pass: CoroElidePass ; CHECK-O-NEXT: Running pass: SimplifyCFGPass ; CHECK-O-NEXT: Running pass: InstCombinePass +; CHECK-O23SZ-NEXT: Running pass: LoopSimplifyPass +; CHECK-O23SZ-NEXT: Running pass: LCSSAPass +; CHECK-O23SZ-NEXT: Running pass: LICMPass ; CHECK-O3-NEXT: Running pass: ControlHeightReductionPass on foo ; CHECK-O3-NEXT: Running analysis: RegionInfoAnalysis on foo ; CHECK-O3-NEXT: Running analysis: DominanceFrontierAnalysis on foo Index: llvm/test/Other/new-pm-thinlto-prelink-pgo-defaults.ll =================================================================== --- llvm/test/Other/new-pm-thinlto-prelink-pgo-defaults.ll +++ llvm/test/Other/new-pm-thinlto-prelink-pgo-defaults.ll @@ -188,12 +188,12 @@ ; CHECK-O-NEXT: Running pass: ADCEPass ; CHECK-O23SZ-NEXT: Running pass: MemCpyOptPass ; CHECK-O23SZ-NEXT: Running pass: DSEPass -; CHECK-O23SZ-NEXT: Running pass: LoopSimplifyPass -; CHECK-O23SZ-NEXT: Running pass: LCSSAPass -; CHECK-O23SZ-NEXT: Running pass: LICMPass ; CHECK-O23SZ-NEXT: Running pass: CoroElidePass ; CHECK-O-NEXT: Running pass: SimplifyCFGPass ; CHECK-O-NEXT: Running pass: InstCombinePass +; CHECK-O23SZ-NEXT: Running pass: LoopSimplifyPass +; CHECK-O23SZ-NEXT: Running pass: LCSSAPass +; CHECK-O23SZ-NEXT: Running pass: LICMPass ; CHECK-O3-NEXT: Running pass: ControlHeightReductionPass on foo ; CHECK-O3-NEXT: Running analysis: RegionInfoAnalysis on foo ; CHECK-O3-NEXT: Running analysis: DominanceFrontierAnalysis on foo Index: llvm/test/Other/new-pm-thinlto-prelink-samplepgo-defaults.ll =================================================================== --- llvm/test/Other/new-pm-thinlto-prelink-samplepgo-defaults.ll +++ llvm/test/Other/new-pm-thinlto-prelink-samplepgo-defaults.ll @@ -151,12 +151,12 @@ ; CHECK-O-NEXT: Running pass: ADCEPass ; CHECK-O23SZ-NEXT: Running pass: MemCpyOptPass ; CHECK-O23SZ-NEXT: Running pass: DSEPass -; CHECK-O23SZ-NEXT: Running pass: LoopSimplifyPass -; CHECK-O23SZ-NEXT: Running pass: LCSSAPass -; CHECK-O23SZ-NEXT: Running pass: LICMPass ; CHECK-O23SZ-NEXT: Running pass: CoroElidePass ; CHECK-O-NEXT: Running pass: SimplifyCFGPass ; CHECK-O-NEXT: Running pass: InstCombinePass +; CHECK-O23SZ-NEXT: Running pass: LoopSimplifyPass +; CHECK-O23SZ-NEXT: Running pass: LCSSAPass +; CHECK-O23SZ-NEXT: Running pass: LICMPass ; CHECK-O3-NEXT: Running pass: ControlHeightReductionPass on foo ; CHECK-O3-NEXT: Running analysis: RegionInfoAnalysis on foo ; CHECK-O3-NEXT: Running analysis: DominanceFrontierAnalysis on foo Index: llvm/test/Transforms/PhaseOrdering/X86/vdiv-nounroll.ll =================================================================== --- llvm/test/Transforms/PhaseOrdering/X86/vdiv-nounroll.ll +++ llvm/test/Transforms/PhaseOrdering/X86/vdiv-nounroll.ll @@ -17,16 +17,16 @@ define void @vdiv(float* %a, float %b) #0 { ; CHECK-LABEL: @vdiv( ; CHECK-NEXT: entry: -; CHECK-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <4 x float> poison, float [[B:%.*]], i32 0 +; CHECK-NEXT: [[TMP0:%.*]] = fdiv fast float 1.000000e+00, [[B:%.*]] +; CHECK-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <4 x float> poison, float [[TMP0]], i32 0 ; CHECK-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector <4 x float> [[BROADCAST_SPLATINSERT]], <4 x float> poison, <4 x i32> zeroinitializer -; CHECK-NEXT: [[TMP0:%.*]] = fdiv fast <4 x float> , [[BROADCAST_SPLAT]] ; CHECK-NEXT: br label [[VECTOR_BODY:%.*]] ; CHECK: vector.body: ; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[ENTRY:%.*]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ] ; CHECK-NEXT: [[TMP1:%.*]] = getelementptr inbounds float, float* [[A:%.*]], i64 [[INDEX]] ; CHECK-NEXT: [[TMP2:%.*]] = bitcast float* [[TMP1]] to <4 x float>* ; CHECK-NEXT: [[WIDE_LOAD:%.*]] = load <4 x float>, <4 x float>* [[TMP2]], align 4, !tbaa [[TBAA3:![0-9]+]] -; CHECK-NEXT: [[TMP3:%.*]] = fmul fast <4 x float> [[WIDE_LOAD]], [[TMP0]] +; CHECK-NEXT: [[TMP3:%.*]] = fmul fast <4 x float> [[WIDE_LOAD]], [[BROADCAST_SPLAT]] ; CHECK-NEXT: [[TMP4:%.*]] = bitcast float* [[TMP1]] to <4 x float>* ; CHECK-NEXT: store <4 x float> [[TMP3]], <4 x float>* [[TMP4]], align 4, !tbaa [[TBAA3]] ; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4 Index: llvm/test/Transforms/PhaseOrdering/X86/vdiv.ll =================================================================== --- llvm/test/Transforms/PhaseOrdering/X86/vdiv.ll +++ llvm/test/Transforms/PhaseOrdering/X86/vdiv.ll @@ -18,6 +18,7 @@ ; CHECK-NEXT: br i1 [[CMP1]], label [[FOR_BODY_PREHEADER:%.*]], label [[FOR_END:%.*]] ; CHECK: for.body.preheader: ; CHECK-NEXT: [[WIDE_TRIP_COUNT:%.*]] = zext i32 [[N]] to i64 +; CHECK-NEXT: [[TMP0:%.*]] = fdiv fast double 1.000000e+00, [[A:%.*]] ; CHECK-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i32 [[N]], 16 ; CHECK-NEXT: br i1 [[MIN_ITERS_CHECK]], label [[FOR_BODY_PREHEADER17:%.*]], label [[VECTOR_MEMCHECK:%.*]] ; CHECK: vector.memcheck: @@ -29,115 +30,199 @@ ; CHECK-NEXT: br i1 [[FOUND_CONFLICT]], label [[FOR_BODY_PREHEADER17]], label [[VECTOR_PH:%.*]] ; CHECK: vector.ph: ; CHECK-NEXT: [[N_VEC:%.*]] = and i64 [[WIDE_TRIP_COUNT]], 4294967280 -; CHECK-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <4 x double> poison, double [[A:%.*]], i32 0 +; CHECK-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <4 x double> poison, double [[TMP0]], i32 0 ; CHECK-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector <4 x double> [[BROADCAST_SPLATINSERT]], <4 x double> poison, <4 x i32> zeroinitializer -; CHECK-NEXT: [[BROADCAST_SPLATINSERT11:%.*]] = insertelement <4 x double> poison, double [[A]], i32 0 +; CHECK-NEXT: [[BROADCAST_SPLATINSERT11:%.*]] = insertelement <4 x double> poison, double [[TMP0]], i32 0 ; CHECK-NEXT: [[BROADCAST_SPLAT12:%.*]] = shufflevector <4 x double> [[BROADCAST_SPLATINSERT11]], <4 x double> poison, <4 x i32> zeroinitializer -; CHECK-NEXT: [[BROADCAST_SPLATINSERT13:%.*]] = insertelement <4 x double> poison, double [[A]], i32 0 +; CHECK-NEXT: [[BROADCAST_SPLATINSERT13:%.*]] = insertelement <4 x double> poison, double [[TMP0]], i32 0 ; CHECK-NEXT: [[BROADCAST_SPLAT14:%.*]] = shufflevector <4 x double> [[BROADCAST_SPLATINSERT13]], <4 x double> poison, <4 x i32> zeroinitializer -; CHECK-NEXT: [[BROADCAST_SPLATINSERT15:%.*]] = insertelement <4 x double> poison, double [[A]], i32 0 +; CHECK-NEXT: [[BROADCAST_SPLATINSERT15:%.*]] = insertelement <4 x double> poison, double [[TMP0]], i32 0 ; CHECK-NEXT: [[BROADCAST_SPLAT16:%.*]] = shufflevector <4 x double> [[BROADCAST_SPLATINSERT15]], <4 x double> poison, <4 x i32> zeroinitializer -; CHECK-NEXT: [[TMP0:%.*]] = fdiv fast <4 x double> , [[BROADCAST_SPLAT]] -; CHECK-NEXT: [[TMP1:%.*]] = fdiv fast <4 x double> , [[BROADCAST_SPLAT12]] -; CHECK-NEXT: [[TMP2:%.*]] = fdiv fast <4 x double> , [[BROADCAST_SPLAT14]] -; CHECK-NEXT: [[TMP3:%.*]] = fdiv fast <4 x double> , [[BROADCAST_SPLAT16]] +; CHECK-NEXT: [[TMP1:%.*]] = add nsw i64 [[N_VEC]], -16 +; CHECK-NEXT: [[TMP2:%.*]] = lshr exact i64 [[TMP1]], 4 +; CHECK-NEXT: [[TMP3:%.*]] = add nuw nsw i64 [[TMP2]], 1 +; CHECK-NEXT: [[XTRAITER:%.*]] = and i64 [[TMP3]], 1 +; CHECK-NEXT: [[TMP4:%.*]] = icmp eq i64 [[TMP1]], 0 +; CHECK-NEXT: br i1 [[TMP4]], label [[MIDDLE_BLOCK_UNR_LCSSA:%.*]], label [[VECTOR_PH_NEW:%.*]] +; CHECK: vector.ph.new: +; CHECK-NEXT: [[UNROLL_ITER:%.*]] = and i64 [[TMP3]], 2305843009213693950 ; CHECK-NEXT: br label [[VECTOR_BODY:%.*]] ; CHECK: vector.body: -; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ] -; CHECK-NEXT: [[TMP4:%.*]] = getelementptr inbounds double, double* [[Y]], i64 [[INDEX]] -; CHECK-NEXT: [[TMP5:%.*]] = bitcast double* [[TMP4]] to <4 x double>* -; CHECK-NEXT: [[WIDE_LOAD:%.*]] = load <4 x double>, <4 x double>* [[TMP5]], align 8, !tbaa [[TBAA3:![0-9]+]], !alias.scope !7 -; CHECK-NEXT: [[TMP6:%.*]] = getelementptr inbounds double, double* [[TMP4]], i64 4 -; CHECK-NEXT: [[TMP7:%.*]] = bitcast double* [[TMP6]] to <4 x double>* -; CHECK-NEXT: [[WIDE_LOAD8:%.*]] = load <4 x double>, <4 x double>* [[TMP7]], align 8, !tbaa [[TBAA3]], !alias.scope !7 -; CHECK-NEXT: [[TMP8:%.*]] = getelementptr inbounds double, double* [[TMP4]], i64 8 -; CHECK-NEXT: [[TMP9:%.*]] = bitcast double* [[TMP8]] to <4 x double>* -; CHECK-NEXT: [[WIDE_LOAD9:%.*]] = load <4 x double>, <4 x double>* [[TMP9]], align 8, !tbaa [[TBAA3]], !alias.scope !7 -; CHECK-NEXT: [[TMP10:%.*]] = getelementptr inbounds double, double* [[TMP4]], i64 12 -; CHECK-NEXT: [[TMP11:%.*]] = bitcast double* [[TMP10]] to <4 x double>* -; CHECK-NEXT: [[WIDE_LOAD10:%.*]] = load <4 x double>, <4 x double>* [[TMP11]], align 8, !tbaa [[TBAA3]], !alias.scope !7 -; CHECK-NEXT: [[TMP12:%.*]] = fmul fast <4 x double> [[WIDE_LOAD]], [[TMP0]] -; CHECK-NEXT: [[TMP13:%.*]] = fmul fast <4 x double> [[WIDE_LOAD8]], [[TMP1]] -; CHECK-NEXT: [[TMP14:%.*]] = fmul fast <4 x double> [[WIDE_LOAD9]], [[TMP2]] -; CHECK-NEXT: [[TMP15:%.*]] = fmul fast <4 x double> [[WIDE_LOAD10]], [[TMP3]] -; CHECK-NEXT: [[TMP16:%.*]] = getelementptr inbounds double, double* [[X]], i64 [[INDEX]] -; CHECK-NEXT: [[TMP17:%.*]] = bitcast double* [[TMP16]] to <4 x double>* -; CHECK-NEXT: store <4 x double> [[TMP12]], <4 x double>* [[TMP17]], align 8, !tbaa [[TBAA3]], !alias.scope !10, !noalias !7 -; CHECK-NEXT: [[TMP18:%.*]] = getelementptr inbounds double, double* [[TMP16]], i64 4 -; CHECK-NEXT: [[TMP19:%.*]] = bitcast double* [[TMP18]] to <4 x double>* -; CHECK-NEXT: store <4 x double> [[TMP13]], <4 x double>* [[TMP19]], align 8, !tbaa [[TBAA3]], !alias.scope !10, !noalias !7 -; CHECK-NEXT: [[TMP20:%.*]] = getelementptr inbounds double, double* [[TMP16]], i64 8 -; CHECK-NEXT: [[TMP21:%.*]] = bitcast double* [[TMP20]] to <4 x double>* -; CHECK-NEXT: store <4 x double> [[TMP14]], <4 x double>* [[TMP21]], align 8, !tbaa [[TBAA3]], !alias.scope !10, !noalias !7 -; CHECK-NEXT: [[TMP22:%.*]] = getelementptr inbounds double, double* [[TMP16]], i64 12 -; CHECK-NEXT: [[TMP23:%.*]] = bitcast double* [[TMP22]] to <4 x double>* -; CHECK-NEXT: store <4 x double> [[TMP15]], <4 x double>* [[TMP23]], align 8, !tbaa [[TBAA3]], !alias.scope !10, !noalias !7 -; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 16 -; CHECK-NEXT: [[TMP24:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]] -; CHECK-NEXT: br i1 [[TMP24]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP12:![0-9]+]] +; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH_NEW]] ], [ [[INDEX_NEXT_1:%.*]], [[VECTOR_BODY]] ] +; CHECK-NEXT: [[NITER:%.*]] = phi i64 [ [[UNROLL_ITER]], [[VECTOR_PH_NEW]] ], [ [[NITER_NSUB_1:%.*]], [[VECTOR_BODY]] ] +; CHECK-NEXT: [[TMP5:%.*]] = getelementptr inbounds double, double* [[Y]], i64 [[INDEX]] +; CHECK-NEXT: [[TMP6:%.*]] = bitcast double* [[TMP5]] to <4 x double>* +; CHECK-NEXT: [[WIDE_LOAD:%.*]] = load <4 x double>, <4 x double>* [[TMP6]], align 8, !tbaa [[TBAA3:![0-9]+]], !alias.scope !7 +; CHECK-NEXT: [[TMP7:%.*]] = getelementptr inbounds double, double* [[TMP5]], i64 4 +; CHECK-NEXT: [[TMP8:%.*]] = bitcast double* [[TMP7]] to <4 x double>* +; CHECK-NEXT: [[WIDE_LOAD8:%.*]] = load <4 x double>, <4 x double>* [[TMP8]], align 8, !tbaa [[TBAA3]], !alias.scope !7 +; CHECK-NEXT: [[TMP9:%.*]] = getelementptr inbounds double, double* [[TMP5]], i64 8 +; CHECK-NEXT: [[TMP10:%.*]] = bitcast double* [[TMP9]] to <4 x double>* +; CHECK-NEXT: [[WIDE_LOAD9:%.*]] = load <4 x double>, <4 x double>* [[TMP10]], align 8, !tbaa [[TBAA3]], !alias.scope !7 +; CHECK-NEXT: [[TMP11:%.*]] = getelementptr inbounds double, double* [[TMP5]], i64 12 +; CHECK-NEXT: [[TMP12:%.*]] = bitcast double* [[TMP11]] to <4 x double>* +; CHECK-NEXT: [[WIDE_LOAD10:%.*]] = load <4 x double>, <4 x double>* [[TMP12]], align 8, !tbaa [[TBAA3]], !alias.scope !7 +; CHECK-NEXT: [[TMP13:%.*]] = fmul fast <4 x double> [[WIDE_LOAD]], [[BROADCAST_SPLAT]] +; CHECK-NEXT: [[TMP14:%.*]] = fmul fast <4 x double> [[WIDE_LOAD8]], [[BROADCAST_SPLAT12]] +; CHECK-NEXT: [[TMP15:%.*]] = fmul fast <4 x double> [[WIDE_LOAD9]], [[BROADCAST_SPLAT14]] +; CHECK-NEXT: [[TMP16:%.*]] = fmul fast <4 x double> [[WIDE_LOAD10]], [[BROADCAST_SPLAT16]] +; CHECK-NEXT: [[TMP17:%.*]] = getelementptr inbounds double, double* [[X]], i64 [[INDEX]] +; CHECK-NEXT: [[TMP18:%.*]] = bitcast double* [[TMP17]] to <4 x double>* +; CHECK-NEXT: store <4 x double> [[TMP13]], <4 x double>* [[TMP18]], align 8, !tbaa [[TBAA3]], !alias.scope !10, !noalias !7 +; CHECK-NEXT: [[TMP19:%.*]] = getelementptr inbounds double, double* [[TMP17]], i64 4 +; CHECK-NEXT: [[TMP20:%.*]] = bitcast double* [[TMP19]] to <4 x double>* +; CHECK-NEXT: store <4 x double> [[TMP14]], <4 x double>* [[TMP20]], align 8, !tbaa [[TBAA3]], !alias.scope !10, !noalias !7 +; CHECK-NEXT: [[TMP21:%.*]] = getelementptr inbounds double, double* [[TMP17]], i64 8 +; CHECK-NEXT: [[TMP22:%.*]] = bitcast double* [[TMP21]] to <4 x double>* +; CHECK-NEXT: store <4 x double> [[TMP15]], <4 x double>* [[TMP22]], align 8, !tbaa [[TBAA3]], !alias.scope !10, !noalias !7 +; CHECK-NEXT: [[TMP23:%.*]] = getelementptr inbounds double, double* [[TMP17]], i64 12 +; CHECK-NEXT: [[TMP24:%.*]] = bitcast double* [[TMP23]] to <4 x double>* +; CHECK-NEXT: store <4 x double> [[TMP16]], <4 x double>* [[TMP24]], align 8, !tbaa [[TBAA3]], !alias.scope !10, !noalias !7 +; CHECK-NEXT: [[INDEX_NEXT:%.*]] = or i64 [[INDEX]], 16 +; CHECK-NEXT: [[TMP25:%.*]] = getelementptr inbounds double, double* [[Y]], i64 [[INDEX_NEXT]] +; CHECK-NEXT: [[TMP26:%.*]] = bitcast double* [[TMP25]] to <4 x double>* +; CHECK-NEXT: [[WIDE_LOAD_1:%.*]] = load <4 x double>, <4 x double>* [[TMP26]], align 8, !tbaa [[TBAA3]], !alias.scope !7 +; CHECK-NEXT: [[TMP27:%.*]] = getelementptr inbounds double, double* [[TMP25]], i64 4 +; CHECK-NEXT: [[TMP28:%.*]] = bitcast double* [[TMP27]] to <4 x double>* +; CHECK-NEXT: [[WIDE_LOAD8_1:%.*]] = load <4 x double>, <4 x double>* [[TMP28]], align 8, !tbaa [[TBAA3]], !alias.scope !7 +; CHECK-NEXT: [[TMP29:%.*]] = getelementptr inbounds double, double* [[TMP25]], i64 8 +; CHECK-NEXT: [[TMP30:%.*]] = bitcast double* [[TMP29]] to <4 x double>* +; CHECK-NEXT: [[WIDE_LOAD9_1:%.*]] = load <4 x double>, <4 x double>* [[TMP30]], align 8, !tbaa [[TBAA3]], !alias.scope !7 +; CHECK-NEXT: [[TMP31:%.*]] = getelementptr inbounds double, double* [[TMP25]], i64 12 +; CHECK-NEXT: [[TMP32:%.*]] = bitcast double* [[TMP31]] to <4 x double>* +; CHECK-NEXT: [[WIDE_LOAD10_1:%.*]] = load <4 x double>, <4 x double>* [[TMP32]], align 8, !tbaa [[TBAA3]], !alias.scope !7 +; CHECK-NEXT: [[TMP33:%.*]] = fmul fast <4 x double> [[WIDE_LOAD_1]], [[BROADCAST_SPLAT]] +; CHECK-NEXT: [[TMP34:%.*]] = fmul fast <4 x double> [[WIDE_LOAD8_1]], [[BROADCAST_SPLAT12]] +; CHECK-NEXT: [[TMP35:%.*]] = fmul fast <4 x double> [[WIDE_LOAD9_1]], [[BROADCAST_SPLAT14]] +; CHECK-NEXT: [[TMP36:%.*]] = fmul fast <4 x double> [[WIDE_LOAD10_1]], [[BROADCAST_SPLAT16]] +; CHECK-NEXT: [[TMP37:%.*]] = getelementptr inbounds double, double* [[X]], i64 [[INDEX_NEXT]] +; CHECK-NEXT: [[TMP38:%.*]] = bitcast double* [[TMP37]] to <4 x double>* +; CHECK-NEXT: store <4 x double> [[TMP33]], <4 x double>* [[TMP38]], align 8, !tbaa [[TBAA3]], !alias.scope !10, !noalias !7 +; CHECK-NEXT: [[TMP39:%.*]] = getelementptr inbounds double, double* [[TMP37]], i64 4 +; CHECK-NEXT: [[TMP40:%.*]] = bitcast double* [[TMP39]] to <4 x double>* +; CHECK-NEXT: store <4 x double> [[TMP34]], <4 x double>* [[TMP40]], align 8, !tbaa [[TBAA3]], !alias.scope !10, !noalias !7 +; CHECK-NEXT: [[TMP41:%.*]] = getelementptr inbounds double, double* [[TMP37]], i64 8 +; CHECK-NEXT: [[TMP42:%.*]] = bitcast double* [[TMP41]] to <4 x double>* +; CHECK-NEXT: store <4 x double> [[TMP35]], <4 x double>* [[TMP42]], align 8, !tbaa [[TBAA3]], !alias.scope !10, !noalias !7 +; CHECK-NEXT: [[TMP43:%.*]] = getelementptr inbounds double, double* [[TMP37]], i64 12 +; CHECK-NEXT: [[TMP44:%.*]] = bitcast double* [[TMP43]] to <4 x double>* +; CHECK-NEXT: store <4 x double> [[TMP36]], <4 x double>* [[TMP44]], align 8, !tbaa [[TBAA3]], !alias.scope !10, !noalias !7 +; CHECK-NEXT: [[INDEX_NEXT_1]] = add nuw i64 [[INDEX]], 32 +; CHECK-NEXT: [[NITER_NSUB_1]] = add i64 [[NITER]], -2 +; CHECK-NEXT: [[NITER_NCMP_1:%.*]] = icmp eq i64 [[NITER_NSUB_1]], 0 +; CHECK-NEXT: br i1 [[NITER_NCMP_1]], label [[MIDDLE_BLOCK_UNR_LCSSA]], label [[VECTOR_BODY]], !llvm.loop [[LOOP12:![0-9]+]] +; CHECK: middle.block.unr-lcssa: +; CHECK-NEXT: [[INDEX_UNR:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT_1]], [[VECTOR_BODY]] ] +; CHECK-NEXT: [[LCMP_MOD_NOT:%.*]] = icmp eq i64 [[XTRAITER]], 0 +; CHECK-NEXT: br i1 [[LCMP_MOD_NOT]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY_EPIL:%.*]] +; CHECK: vector.body.epil: +; CHECK-NEXT: [[TMP45:%.*]] = getelementptr inbounds double, double* [[Y]], i64 [[INDEX_UNR]] +; CHECK-NEXT: [[TMP46:%.*]] = bitcast double* [[TMP45]] to <4 x double>* +; CHECK-NEXT: [[WIDE_LOAD_EPIL:%.*]] = load <4 x double>, <4 x double>* [[TMP46]], align 8, !tbaa [[TBAA3]], !alias.scope !7 +; CHECK-NEXT: [[TMP47:%.*]] = getelementptr inbounds double, double* [[TMP45]], i64 4 +; CHECK-NEXT: [[TMP48:%.*]] = bitcast double* [[TMP47]] to <4 x double>* +; CHECK-NEXT: [[WIDE_LOAD8_EPIL:%.*]] = load <4 x double>, <4 x double>* [[TMP48]], align 8, !tbaa [[TBAA3]], !alias.scope !7 +; CHECK-NEXT: [[TMP49:%.*]] = getelementptr inbounds double, double* [[TMP45]], i64 8 +; CHECK-NEXT: [[TMP50:%.*]] = bitcast double* [[TMP49]] to <4 x double>* +; CHECK-NEXT: [[WIDE_LOAD9_EPIL:%.*]] = load <4 x double>, <4 x double>* [[TMP50]], align 8, !tbaa [[TBAA3]], !alias.scope !7 +; CHECK-NEXT: [[TMP51:%.*]] = getelementptr inbounds double, double* [[TMP45]], i64 12 +; CHECK-NEXT: [[TMP52:%.*]] = bitcast double* [[TMP51]] to <4 x double>* +; CHECK-NEXT: [[WIDE_LOAD10_EPIL:%.*]] = load <4 x double>, <4 x double>* [[TMP52]], align 8, !tbaa [[TBAA3]], !alias.scope !7 +; CHECK-NEXT: [[TMP53:%.*]] = fmul fast <4 x double> [[WIDE_LOAD_EPIL]], [[BROADCAST_SPLAT]] +; CHECK-NEXT: [[TMP54:%.*]] = fmul fast <4 x double> [[WIDE_LOAD8_EPIL]], [[BROADCAST_SPLAT12]] +; CHECK-NEXT: [[TMP55:%.*]] = fmul fast <4 x double> [[WIDE_LOAD9_EPIL]], [[BROADCAST_SPLAT14]] +; CHECK-NEXT: [[TMP56:%.*]] = fmul fast <4 x double> [[WIDE_LOAD10_EPIL]], [[BROADCAST_SPLAT16]] +; CHECK-NEXT: [[TMP57:%.*]] = getelementptr inbounds double, double* [[X]], i64 [[INDEX_UNR]] +; CHECK-NEXT: [[TMP58:%.*]] = bitcast double* [[TMP57]] to <4 x double>* +; CHECK-NEXT: store <4 x double> [[TMP53]], <4 x double>* [[TMP58]], align 8, !tbaa [[TBAA3]], !alias.scope !10, !noalias !7 +; CHECK-NEXT: [[TMP59:%.*]] = getelementptr inbounds double, double* [[TMP57]], i64 4 +; CHECK-NEXT: [[TMP60:%.*]] = bitcast double* [[TMP59]] to <4 x double>* +; CHECK-NEXT: store <4 x double> [[TMP54]], <4 x double>* [[TMP60]], align 8, !tbaa [[TBAA3]], !alias.scope !10, !noalias !7 +; CHECK-NEXT: [[TMP61:%.*]] = getelementptr inbounds double, double* [[TMP57]], i64 8 +; CHECK-NEXT: [[TMP62:%.*]] = bitcast double* [[TMP61]] to <4 x double>* +; CHECK-NEXT: store <4 x double> [[TMP55]], <4 x double>* [[TMP62]], align 8, !tbaa [[TBAA3]], !alias.scope !10, !noalias !7 +; CHECK-NEXT: [[TMP63:%.*]] = getelementptr inbounds double, double* [[TMP57]], i64 12 +; CHECK-NEXT: [[TMP64:%.*]] = bitcast double* [[TMP63]] to <4 x double>* +; CHECK-NEXT: store <4 x double> [[TMP56]], <4 x double>* [[TMP64]], align 8, !tbaa [[TBAA3]], !alias.scope !10, !noalias !7 +; CHECK-NEXT: br label [[MIDDLE_BLOCK]] ; CHECK: middle.block: ; CHECK-NEXT: [[CMP_N:%.*]] = icmp eq i64 [[N_VEC]], [[WIDE_TRIP_COUNT]] ; CHECK-NEXT: br i1 [[CMP_N]], label [[FOR_END]], label [[FOR_BODY_PREHEADER17]] ; CHECK: for.body.preheader17: ; CHECK-NEXT: [[INDVARS_IV_PH:%.*]] = phi i64 [ 0, [[VECTOR_MEMCHECK]] ], [ 0, [[FOR_BODY_PREHEADER]] ], [ [[N_VEC]], [[MIDDLE_BLOCK]] ] -; CHECK-NEXT: [[TMP25:%.*]] = xor i64 [[INDVARS_IV_PH]], -1 -; CHECK-NEXT: [[TMP26:%.*]] = add nsw i64 [[TMP25]], [[WIDE_TRIP_COUNT]] -; CHECK-NEXT: [[XTRAITER:%.*]] = and i64 [[WIDE_TRIP_COUNT]], 3 -; CHECK-NEXT: [[LCMP_MOD_NOT:%.*]] = icmp eq i64 [[XTRAITER]], 0 -; CHECK-NEXT: br i1 [[LCMP_MOD_NOT]], label [[FOR_BODY_PROL_LOOPEXIT:%.*]], label [[FOR_BODY_PROL_PREHEADER:%.*]] -; CHECK: for.body.prol.preheader: -; CHECK-NEXT: [[TMP27:%.*]] = fdiv fast double 1.000000e+00, [[A]] -; CHECK-NEXT: br label [[FOR_BODY_PROL:%.*]] +; CHECK-NEXT: [[TMP65:%.*]] = xor i64 [[INDVARS_IV_PH]], -1 +; CHECK-NEXT: [[TMP66:%.*]] = add nsw i64 [[TMP65]], [[WIDE_TRIP_COUNT]] +; CHECK-NEXT: [[XTRAITER18:%.*]] = and i64 [[WIDE_TRIP_COUNT]], 7 +; CHECK-NEXT: [[LCMP_MOD19_NOT:%.*]] = icmp eq i64 [[XTRAITER18]], 0 +; CHECK-NEXT: br i1 [[LCMP_MOD19_NOT]], label [[FOR_BODY_PROL_LOOPEXIT:%.*]], label [[FOR_BODY_PROL:%.*]] ; CHECK: for.body.prol: -; CHECK-NEXT: [[INDVARS_IV_PROL:%.*]] = phi i64 [ [[INDVARS_IV_NEXT_PROL:%.*]], [[FOR_BODY_PROL]] ], [ [[INDVARS_IV_PH]], [[FOR_BODY_PROL_PREHEADER]] ] -; CHECK-NEXT: [[PROL_ITER:%.*]] = phi i64 [ [[PROL_ITER_SUB:%.*]], [[FOR_BODY_PROL]] ], [ [[XTRAITER]], [[FOR_BODY_PROL_PREHEADER]] ] +; CHECK-NEXT: [[INDVARS_IV_PROL:%.*]] = phi i64 [ [[INDVARS_IV_NEXT_PROL:%.*]], [[FOR_BODY_PROL]] ], [ [[INDVARS_IV_PH]], [[FOR_BODY_PREHEADER17]] ] +; CHECK-NEXT: [[PROL_ITER:%.*]] = phi i64 [ [[PROL_ITER_SUB:%.*]], [[FOR_BODY_PROL]] ], [ [[XTRAITER18]], [[FOR_BODY_PREHEADER17]] ] ; CHECK-NEXT: [[ARRAYIDX_PROL:%.*]] = getelementptr inbounds double, double* [[Y]], i64 [[INDVARS_IV_PROL]] ; CHECK-NEXT: [[T0_PROL:%.*]] = load double, double* [[ARRAYIDX_PROL]], align 8, !tbaa [[TBAA3]] -; CHECK-NEXT: [[TMP28:%.*]] = fmul fast double [[T0_PROL]], [[TMP27]] +; CHECK-NEXT: [[TMP67:%.*]] = fmul fast double [[T0_PROL]], [[TMP0]] ; CHECK-NEXT: [[ARRAYIDX2_PROL:%.*]] = getelementptr inbounds double, double* [[X]], i64 [[INDVARS_IV_PROL]] -; CHECK-NEXT: store double [[TMP28]], double* [[ARRAYIDX2_PROL]], align 8, !tbaa [[TBAA3]] +; CHECK-NEXT: store double [[TMP67]], double* [[ARRAYIDX2_PROL]], align 8, !tbaa [[TBAA3]] ; CHECK-NEXT: [[INDVARS_IV_NEXT_PROL]] = add nuw nsw i64 [[INDVARS_IV_PROL]], 1 ; CHECK-NEXT: [[PROL_ITER_SUB]] = add i64 [[PROL_ITER]], -1 ; CHECK-NEXT: [[PROL_ITER_CMP_NOT:%.*]] = icmp eq i64 [[PROL_ITER_SUB]], 0 ; CHECK-NEXT: br i1 [[PROL_ITER_CMP_NOT]], label [[FOR_BODY_PROL_LOOPEXIT]], label [[FOR_BODY_PROL]], !llvm.loop [[LOOP14:![0-9]+]] ; CHECK: for.body.prol.loopexit: ; CHECK-NEXT: [[INDVARS_IV_UNR:%.*]] = phi i64 [ [[INDVARS_IV_PH]], [[FOR_BODY_PREHEADER17]] ], [ [[INDVARS_IV_NEXT_PROL]], [[FOR_BODY_PROL]] ] -; CHECK-NEXT: [[TMP29:%.*]] = icmp ult i64 [[TMP26]], 3 -; CHECK-NEXT: br i1 [[TMP29]], label [[FOR_END]], label [[FOR_BODY_PREHEADER17_NEW:%.*]] -; CHECK: for.body.preheader17.new: -; CHECK-NEXT: [[TMP30:%.*]] = fdiv fast double 1.000000e+00, [[A]] -; CHECK-NEXT: [[TMP31:%.*]] = fdiv fast double 1.000000e+00, [[A]] -; CHECK-NEXT: [[TMP32:%.*]] = fdiv fast double 1.000000e+00, [[A]] -; CHECK-NEXT: [[TMP33:%.*]] = fdiv fast double 1.000000e+00, [[A]] -; CHECK-NEXT: br label [[FOR_BODY:%.*]] +; CHECK-NEXT: [[TMP68:%.*]] = icmp ult i64 [[TMP66]], 7 +; CHECK-NEXT: br i1 [[TMP68]], label [[FOR_END]], label [[FOR_BODY:%.*]] ; CHECK: for.body: -; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ [[INDVARS_IV_UNR]], [[FOR_BODY_PREHEADER17_NEW]] ], [ [[INDVARS_IV_NEXT_3:%.*]], [[FOR_BODY]] ] +; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ [[INDVARS_IV_NEXT_7:%.*]], [[FOR_BODY]] ], [ [[INDVARS_IV_UNR]], [[FOR_BODY_PROL_LOOPEXIT]] ] ; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds double, double* [[Y]], i64 [[INDVARS_IV]] ; CHECK-NEXT: [[T0:%.*]] = load double, double* [[ARRAYIDX]], align 8, !tbaa [[TBAA3]] -; CHECK-NEXT: [[TMP34:%.*]] = fmul fast double [[T0]], [[TMP30]] +; CHECK-NEXT: [[TMP69:%.*]] = fmul fast double [[T0]], [[TMP0]] ; CHECK-NEXT: [[ARRAYIDX2:%.*]] = getelementptr inbounds double, double* [[X]], i64 [[INDVARS_IV]] -; CHECK-NEXT: store double [[TMP34]], double* [[ARRAYIDX2]], align 8, !tbaa [[TBAA3]] +; CHECK-NEXT: store double [[TMP69]], double* [[ARRAYIDX2]], align 8, !tbaa [[TBAA3]] ; CHECK-NEXT: [[INDVARS_IV_NEXT:%.*]] = add nuw nsw i64 [[INDVARS_IV]], 1 ; CHECK-NEXT: [[ARRAYIDX_1:%.*]] = getelementptr inbounds double, double* [[Y]], i64 [[INDVARS_IV_NEXT]] ; CHECK-NEXT: [[T0_1:%.*]] = load double, double* [[ARRAYIDX_1]], align 8, !tbaa [[TBAA3]] -; CHECK-NEXT: [[TMP35:%.*]] = fmul fast double [[T0_1]], [[TMP31]] +; CHECK-NEXT: [[TMP70:%.*]] = fmul fast double [[T0_1]], [[TMP0]] ; CHECK-NEXT: [[ARRAYIDX2_1:%.*]] = getelementptr inbounds double, double* [[X]], i64 [[INDVARS_IV_NEXT]] -; CHECK-NEXT: store double [[TMP35]], double* [[ARRAYIDX2_1]], align 8, !tbaa [[TBAA3]] +; CHECK-NEXT: store double [[TMP70]], double* [[ARRAYIDX2_1]], align 8, !tbaa [[TBAA3]] ; CHECK-NEXT: [[INDVARS_IV_NEXT_1:%.*]] = add nuw nsw i64 [[INDVARS_IV]], 2 ; CHECK-NEXT: [[ARRAYIDX_2:%.*]] = getelementptr inbounds double, double* [[Y]], i64 [[INDVARS_IV_NEXT_1]] ; CHECK-NEXT: [[T0_2:%.*]] = load double, double* [[ARRAYIDX_2]], align 8, !tbaa [[TBAA3]] -; CHECK-NEXT: [[TMP36:%.*]] = fmul fast double [[T0_2]], [[TMP32]] +; CHECK-NEXT: [[TMP71:%.*]] = fmul fast double [[T0_2]], [[TMP0]] ; CHECK-NEXT: [[ARRAYIDX2_2:%.*]] = getelementptr inbounds double, double* [[X]], i64 [[INDVARS_IV_NEXT_1]] -; CHECK-NEXT: store double [[TMP36]], double* [[ARRAYIDX2_2]], align 8, !tbaa [[TBAA3]] +; CHECK-NEXT: store double [[TMP71]], double* [[ARRAYIDX2_2]], align 8, !tbaa [[TBAA3]] ; CHECK-NEXT: [[INDVARS_IV_NEXT_2:%.*]] = add nuw nsw i64 [[INDVARS_IV]], 3 ; CHECK-NEXT: [[ARRAYIDX_3:%.*]] = getelementptr inbounds double, double* [[Y]], i64 [[INDVARS_IV_NEXT_2]] ; CHECK-NEXT: [[T0_3:%.*]] = load double, double* [[ARRAYIDX_3]], align 8, !tbaa [[TBAA3]] -; CHECK-NEXT: [[TMP37:%.*]] = fmul fast double [[T0_3]], [[TMP33]] +; CHECK-NEXT: [[TMP72:%.*]] = fmul fast double [[T0_3]], [[TMP0]] ; CHECK-NEXT: [[ARRAYIDX2_3:%.*]] = getelementptr inbounds double, double* [[X]], i64 [[INDVARS_IV_NEXT_2]] -; CHECK-NEXT: store double [[TMP37]], double* [[ARRAYIDX2_3]], align 8, !tbaa [[TBAA3]] -; CHECK-NEXT: [[INDVARS_IV_NEXT_3]] = add nuw nsw i64 [[INDVARS_IV]], 4 -; CHECK-NEXT: [[EXITCOND_NOT_3:%.*]] = icmp eq i64 [[INDVARS_IV_NEXT_3]], [[WIDE_TRIP_COUNT]] -; CHECK-NEXT: br i1 [[EXITCOND_NOT_3]], label [[FOR_END]], label [[FOR_BODY]], !llvm.loop [[LOOP16:![0-9]+]] +; CHECK-NEXT: store double [[TMP72]], double* [[ARRAYIDX2_3]], align 8, !tbaa [[TBAA3]] +; CHECK-NEXT: [[INDVARS_IV_NEXT_3:%.*]] = add nuw nsw i64 [[INDVARS_IV]], 4 +; CHECK-NEXT: [[ARRAYIDX_4:%.*]] = getelementptr inbounds double, double* [[Y]], i64 [[INDVARS_IV_NEXT_3]] +; CHECK-NEXT: [[T0_4:%.*]] = load double, double* [[ARRAYIDX_4]], align 8, !tbaa [[TBAA3]] +; CHECK-NEXT: [[TMP73:%.*]] = fmul fast double [[T0_4]], [[TMP0]] +; CHECK-NEXT: [[ARRAYIDX2_4:%.*]] = getelementptr inbounds double, double* [[X]], i64 [[INDVARS_IV_NEXT_3]] +; CHECK-NEXT: store double [[TMP73]], double* [[ARRAYIDX2_4]], align 8, !tbaa [[TBAA3]] +; CHECK-NEXT: [[INDVARS_IV_NEXT_4:%.*]] = add nuw nsw i64 [[INDVARS_IV]], 5 +; CHECK-NEXT: [[ARRAYIDX_5:%.*]] = getelementptr inbounds double, double* [[Y]], i64 [[INDVARS_IV_NEXT_4]] +; CHECK-NEXT: [[T0_5:%.*]] = load double, double* [[ARRAYIDX_5]], align 8, !tbaa [[TBAA3]] +; CHECK-NEXT: [[TMP74:%.*]] = fmul fast double [[T0_5]], [[TMP0]] +; CHECK-NEXT: [[ARRAYIDX2_5:%.*]] = getelementptr inbounds double, double* [[X]], i64 [[INDVARS_IV_NEXT_4]] +; CHECK-NEXT: store double [[TMP74]], double* [[ARRAYIDX2_5]], align 8, !tbaa [[TBAA3]] +; CHECK-NEXT: [[INDVARS_IV_NEXT_5:%.*]] = add nuw nsw i64 [[INDVARS_IV]], 6 +; CHECK-NEXT: [[ARRAYIDX_6:%.*]] = getelementptr inbounds double, double* [[Y]], i64 [[INDVARS_IV_NEXT_5]] +; CHECK-NEXT: [[T0_6:%.*]] = load double, double* [[ARRAYIDX_6]], align 8, !tbaa [[TBAA3]] +; CHECK-NEXT: [[TMP75:%.*]] = fmul fast double [[T0_6]], [[TMP0]] +; CHECK-NEXT: [[ARRAYIDX2_6:%.*]] = getelementptr inbounds double, double* [[X]], i64 [[INDVARS_IV_NEXT_5]] +; CHECK-NEXT: store double [[TMP75]], double* [[ARRAYIDX2_6]], align 8, !tbaa [[TBAA3]] +; CHECK-NEXT: [[INDVARS_IV_NEXT_6:%.*]] = add nuw nsw i64 [[INDVARS_IV]], 7 +; CHECK-NEXT: [[ARRAYIDX_7:%.*]] = getelementptr inbounds double, double* [[Y]], i64 [[INDVARS_IV_NEXT_6]] +; CHECK-NEXT: [[T0_7:%.*]] = load double, double* [[ARRAYIDX_7]], align 8, !tbaa [[TBAA3]] +; CHECK-NEXT: [[TMP76:%.*]] = fmul fast double [[T0_7]], [[TMP0]] +; CHECK-NEXT: [[ARRAYIDX2_7:%.*]] = getelementptr inbounds double, double* [[X]], i64 [[INDVARS_IV_NEXT_6]] +; CHECK-NEXT: store double [[TMP76]], double* [[ARRAYIDX2_7]], align 8, !tbaa [[TBAA3]] +; CHECK-NEXT: [[INDVARS_IV_NEXT_7]] = add nuw nsw i64 [[INDVARS_IV]], 8 +; CHECK-NEXT: [[EXITCOND_NOT_7:%.*]] = icmp eq i64 [[INDVARS_IV_NEXT_7]], [[WIDE_TRIP_COUNT]] +; CHECK-NEXT: br i1 [[EXITCOND_NOT_7]], label [[FOR_END]], label [[FOR_BODY]], !llvm.loop [[LOOP16:![0-9]+]] ; CHECK: for.end: ; CHECK-NEXT: ret void ; Index: llvm/test/Transforms/PhaseOrdering/lto-licm.ll =================================================================== --- llvm/test/Transforms/PhaseOrdering/lto-licm.ll +++ llvm/test/Transforms/PhaseOrdering/lto-licm.ll @@ -4,6 +4,7 @@ define void @hoist_fdiv(float* %a, float %b) { ; CHECK-LABEL: @hoist_fdiv( ; CHECK-NEXT: entry: +; CHECK-NEXT: [[TMP0:%.*]] = fdiv fast float 1.000000e+00, [[B:%.*]] ; CHECK-NEXT: br label [[FOR_COND:%.*]] ; CHECK: for.cond: ; CHECK-NEXT: [[I_0:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[INC:%.*]], [[FOR_INC:%.*]] ] @@ -12,9 +13,9 @@ ; CHECK: for.inc: ; CHECK-NEXT: [[IDXPROM:%.*]] = zext i32 [[I_0]] to i64 ; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds float, float* [[A:%.*]], i64 [[IDXPROM]] -; CHECK-NEXT: [[TMP0:%.*]] = load float, float* [[ARRAYIDX]], align 4 -; CHECK-NEXT: [[TMP1:%.*]] = fdiv fast float [[TMP0]], [[B:%.*]] -; CHECK-NEXT: store float [[TMP1]], float* [[ARRAYIDX]], align 4 +; CHECK-NEXT: [[TMP1:%.*]] = load float, float* [[ARRAYIDX]], align 4 +; CHECK-NEXT: [[TMP2:%.*]] = fmul fast float [[TMP1]], [[TMP0]] +; CHECK-NEXT: store float [[TMP2]], float* [[ARRAYIDX]], align 4 ; CHECK-NEXT: [[INC]] = add nuw nsw i32 [[I_0]], 1 ; CHECK-NEXT: br label [[FOR_COND]] ; CHECK: for.end: