diff --git a/llvm/lib/Target/AArch64/AArch64Combine.td b/llvm/lib/Target/AArch64/AArch64Combine.td
--- a/llvm/lib/Target/AArch64/AArch64Combine.td
+++ b/llvm/lib/Target/AArch64/AArch64Combine.td
@@ -213,6 +213,6 @@
                         icmp_to_true_false_known_bits, merge_unmerge,
                         select_combines, fold_merge_to_zext,
                         constant_fold, identity_combines,
-                        ptr_add_immed_chain]> {
+                        ptr_add_immed_chain, overlapping_and]> {
   let DisableRuleOption = "aarch64postlegalizercombiner-disable-rule";
 }
diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/opt-overlapping-and-postlegalize.mir b/llvm/test/CodeGen/AArch64/GlobalISel/opt-overlapping-and-postlegalize.mir
new file mode 100644
--- /dev/null
+++ b/llvm/test/CodeGen/AArch64/GlobalISel/opt-overlapping-and-postlegalize.mir
@@ -0,0 +1,30 @@
+# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
+# RUN: llc -debugify-and-strip-all-safe -mtriple arm64-apple-ios -O0 -run-pass=aarch64-postlegalizer-combiner --aarch64postlegalizercombinerhelper-only-enable-rule="overlapping_and" -global-isel -verify-machineinstrs %s -o - | FileCheck %s
+# REQUIRES: asserts
+
+# Test running the overlapping_and combine post-legalization.
+
+...
+---
+name:            test
+legalized:       true
+tracksRegLiveness: true
+body:             |
+  bb.0:
+    liveins: $w0
+    ; CHECK-LABEL: name: test
+    ; CHECK: liveins: $w0
+    ; CHECK-NEXT: {{  $}}
+    ; CHECK-NEXT: %copy:_(s32) = COPY $w0
+    ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 192
+    ; CHECK-NEXT: %and2:_(s32) = G_AND %copy, [[C]]
+    ; CHECK-NEXT: $w0 = COPY %and2(s32)
+    ; CHECK-NEXT: RET_ReallyLR implicit $w0
+    %copy:_(s32) = COPY $w0
+    %cst_neg_64:_(s32) = G_CONSTANT i32 -64
+    %and1:_(s32) = G_AND %copy, %cst_neg_64
+    %cst_255:_(s32) = G_CONSTANT i32 255
+    %and2:_(s32) = G_AND %and1, %cst_255
+    $w0 = COPY %and2(s32)
+    RET_ReallyLR implicit $w0
+...