Index: llvm/lib/Target/AArch64/AArch64MacroFusion.cpp
===================================================================
--- llvm/lib/Target/AArch64/AArch64MacroFusion.cpp
+++ llvm/lib/Target/AArch64/AArch64MacroFusion.cpp
@@ -100,7 +100,7 @@
   case AArch64::SUBWrr:
   case AArch64::SUBXri:
   case AArch64::SUBXrr:
-    return true;
+    return FirstMI->getOperand(0).getReg() == SecondMI.getOperand(0).getReg();
   case AArch64::ADDWrs:
   case AArch64::ADDXrs:
   case AArch64::ANDWrs:
@@ -110,7 +110,8 @@
   case AArch64::BICWrs:
   case AArch64::BICXrs:
     // Shift value can be 0 making these behave like the "rr" variant...
-    return !AArch64InstrInfo::hasShiftedReg(*FirstMI);
+    return !AArch64InstrInfo::hasShiftedReg(*FirstMI) &&
+           FirstMI->getOperand(0).getReg() == SecondMI.getOperand(0).getReg();
   }
 
   return false;
Index: llvm/test/CodeGen/AArch64/misched-fusion.ll
===================================================================
--- llvm/test/CodeGen/AArch64/misched-fusion.ll
+++ llvm/test/CodeGen/AArch64/misched-fusion.ll
@@ -1,6 +1,7 @@
 ; RUN: llc -o - %s -mtriple=aarch64-unknown -aarch64-enable-cond-br-tune=false -mattr=+arith-bcc-fusion | FileCheck %s --check-prefix=FUSEBCC
 ; RUN: llc -o - %s -mtriple=aarch64-unknown -aarch64-enable-cond-br-tune=false -mattr=+arith-cbz-fusion | FileCheck %s --check-prefix=FUSECBZ
 ; RUN: llc -o - %s -mtriple=aarch64-unknown -aarch64-enable-cond-br-tune=false -mcpu=cyclone            | FileCheck %s --check-prefix=FUSEBCC --check-prefix=FUSECBZ
+; RUN: llc -o - %s -mtriple=aarch64-unknown -aarch64-enable-cond-br-tune=false -mcpu=cortex-a55 -mattr=+arith-bcc-fusion,+arith-cbz-fusion| FileCheck %s --check-prefix=FUSEBCC --check-prefix=FUSECBZ
 
 target triple = "aarch64-unknown"