diff --git a/llvm/lib/CodeGen/TwoAddressInstructionPass.cpp b/llvm/lib/CodeGen/TwoAddressInstructionPass.cpp
--- a/llvm/lib/CodeGen/TwoAddressInstructionPass.cpp
+++ b/llvm/lib/CodeGen/TwoAddressInstructionPass.cpp
@@ -1661,10 +1661,12 @@
   }
 
   SmallVector<Register, 4> OrigRegs;
+  LiveInterval *DstLI = nullptr;
   if (LIS) {
     OrigRegs.push_back(MI.getOperand(0).getReg());
     for (unsigned i = 1, e = MI.getNumOperands(); i < e; i += 2)
       OrigRegs.push_back(MI.getOperand(i).getReg());
+    DstLI = &LIS->getInterval(DstReg);
   }
 
   bool DefEmitted = false;
@@ -1672,9 +1674,20 @@
     MachineOperand &UseMO = MI.getOperand(i);
     Register SrcReg = UseMO.getReg();
     unsigned SubIdx = MI.getOperand(i+1).getImm();
+
     // Nothing needs to be inserted for undef operands.
-    if (UseMO.isUndef())
+    if (UseMO.isUndef()) {
+      // Update LiveIntervals by removing any existing subrange for this subreg.
+      // If the subrange becomes empty it will be removed below.
+      if (DstLI) {
+        LaneBitmask LaneMask = TRI->getSubRegIndexLaneMask(SubIdx);
+        for (auto &S : DstLI->subranges()) {
+          if (S.LaneMask == LaneMask)
+            S.removeSegment(S.find(LIS->getInstructionIndex(MI)));
+        }
+      }
       continue;
+    }
 
     // Defer any kill flag to the last operand using SrcReg. Otherwise, we
     // might insert a COPY that uses SrcReg after is was killed.
@@ -1709,6 +1722,8 @@
 
     LLVM_DEBUG(dbgs() << "Inserted: " << *CopyMI);
   }
+  if (DstLI)
+    DstLI->removeEmptySubRanges();
 
   MachineBasicBlock::iterator EndMBBI =
       std::next(MachineBasicBlock::iterator(MI));
@@ -1726,7 +1741,7 @@
     MI.eraseFromParent();
   }
 
-  // Udpate LiveIntervals.
+  // Update LiveIntervals.
   if (LIS)
     LIS->repairIntervalsInRange(MBB, MBBI, EndMBBI, OrigRegs);
 }
diff --git a/llvm/test/CodeGen/AMDGPU/dead-lane.mir b/llvm/test/CodeGen/AMDGPU/dead-lane.mir
--- a/llvm/test/CodeGen/AMDGPU/dead-lane.mir
+++ b/llvm/test/CodeGen/AMDGPU/dead-lane.mir
@@ -1,4 +1,5 @@
 # RUN: llc -march=amdgcn -mcpu=tonga %s -start-before detect-dead-lanes -stop-before machine-scheduler -verify-machineinstrs -o - | FileCheck -check-prefix=GCN %s
+# RUN: llc -march=amdgcn -mcpu=tonga %s -start-before detect-dead-lanes -stop-before machine-scheduler -verify-machineinstrs -early-live-intervals -o - | FileCheck -check-prefix=GCN %s
 
 # GCN-LABEL: name: dead_lane
 # GCN:      bb.0: