Index: clang/lib/Sema/SemaChecking.cpp =================================================================== --- clang/lib/Sema/SemaChecking.cpp +++ clang/lib/Sema/SemaChecking.cpp @@ -3295,6 +3295,8 @@ case PPC::BI__builtin_ppc_insert_exp: case PPC::BI__builtin_ppc_extract_sig: case PPC::BI__builtin_ppc_addex: + case PPC::BI__builtin_darn: + case PPC::BI__builtin_darn_raw: return true; } return false; @@ -3473,6 +3475,11 @@ return SemaFeatureCheck(*this, TheCall, "isa-v207-instructions", diag::err_ppc_builtin_only_on_arch, "8") || SemaBuiltinConstantArgRange(TheCall, 1, 1, 16); + case PPC::BI__builtin_darn: + case PPC::BI__builtin_darn_raw: + case PPC::BI__builtin_darn_32: + return SemaFeatureCheck(*this, TheCall, "isa-v30-instructions", + diag::err_ppc_builtin_only_on_arch, "9"); #define CUSTOM_BUILTIN(Name, Intr, Types, Acc) \ case PPC::BI__builtin_##Name: \ return SemaBuiltinPPCMMACall(TheCall, Types); Index: clang/test/CodeGen/builtins-ppc-xlcompat-darn-32.c =================================================================== --- /dev/null +++ clang/test/CodeGen/builtins-ppc-xlcompat-darn-32.c @@ -0,0 +1,14 @@ +// RUN: %clang_cc1 -triple powerpc-unknown-unknown \ +// RUN: -emit-llvm %s -o - -target-cpu pwr9 | FileCheck %s +// RUN: %clang_cc1 -triple powerpcle-unknown-unknown \ +// RUN: -emit-llvm %s -o - -target-cpu pwr9 | FileCheck %s +// RUN: %clang_cc1 -triple powerpc-unknown-aix \ +// RUN: -emit-llvm %s -o - -target-cpu pwr9 | FileCheck %s + +// CHECK-LABEL: @testdarn_32( +// CHECK: [[TMP0:%.*]] = call i32 @llvm.ppc.darn32() +// CHECK-NEXT: ret i32 [[TMP0]] +// +int testdarn_32(void) { + return __darn_32(); +} Index: clang/test/CodeGen/builtins-ppc-xlcompat-darn.c =================================================================== --- clang/test/CodeGen/builtins-ppc-xlcompat-darn.c +++ clang/test/CodeGen/builtins-ppc-xlcompat-darn.c @@ -5,12 +5,6 @@ // RUN: -emit-llvm %s -o - -target-cpu pwr9 | FileCheck %s // RUN: %clang_cc1 -triple powerpc64-unknown-aix \ // RUN: -emit-llvm %s -o - -target-cpu pwr9 | FileCheck %s -// RUN: %clang_cc1 -triple powerpc-unknown-unknown \ -// RUN: -emit-llvm %s -o - -target-cpu pwr9 | FileCheck %s -// RUN: %clang_cc1 -triple powerpcle-unknown-unknown \ -// RUN: -emit-llvm %s -o - -target-cpu pwr9 | FileCheck %s -// RUN: %clang_cc1 -triple powerpc-unknown-aix \ -// RUN: -emit-llvm %s -o - -target-cpu pwr9 | FileCheck %s // The darn class of builtins are Power 9 and up and only darn_32 works in // 32 bit mode. @@ -30,11 +24,3 @@ long long testdarn_raw(void) { return __darn_raw(); } - -// CHECK-LABEL: @testdarn_32( -// CHECK: [[TMP0:%.*]] = call i32 @llvm.ppc.darn32() -// CHECK-NEXT: ret i32 [[TMP0]] -// -int testdarn_32(void) { - return __darn_32(); -} Index: clang/test/CodeGen/builtins-ppc-xlcompat-error.c =================================================================== --- clang/test/CodeGen/builtins-ppc-xlcompat-error.c +++ clang/test/CodeGen/builtins-ppc-xlcompat-error.c @@ -96,6 +96,14 @@ unsigned long long testdivdeu(unsigned long long dividend, unsigned long long divisor) { return __divdeu(dividend, divisor); //expected-error {{this builtin is only available on 64-bit targets}} } + +int test_darn() { + return __darn(); //expected-error {{this builtin is only available on 64-bit targets}} +} + +int test_darn_raw() { + return __darn_raw(); //expected-error {{this builtin is only available on 64-bit targets}} +} #endif unsigned long test_mfspr(void) { Index: clang/test/CodeGen/builtins-ppc.c =================================================================== --- clang/test/CodeGen/builtins-ppc.c +++ clang/test/CodeGen/builtins-ppc.c @@ -36,16 +36,3 @@ // CHECK: call double @llvm.ppc.setflm(double %1) res = __builtin_setflm(res); } - -void test_builtin_ppc_darn() { - volatile long res; - volatile int x; - // CHECK: call i64 @llvm.ppc.darn() - res = __builtin_darn(); - - // CHECK: call i64 @llvm.ppc.darnraw() - res = __builtin_darn_raw(); - - // CHECK: call i32 @llvm.ppc.darn32() - x = __builtin_darn_32(); -}