diff --git a/llvm/include/llvm/Analysis/TargetTransformInfo.h b/llvm/include/llvm/Analysis/TargetTransformInfo.h --- a/llvm/include/llvm/Analysis/TargetTransformInfo.h +++ b/llvm/include/llvm/Analysis/TargetTransformInfo.h @@ -1743,8 +1743,8 @@ InstructionCost getGEPCost(Type *PointeeType, const Value *Ptr, ArrayRef Operands, - enum TargetTransformInfo::TargetCostKind CostKind) override { - return Impl.getGEPCost(PointeeType, Ptr, Operands); + TargetTransformInfo::TargetCostKind CostKind) override { + return Impl.getGEPCost(PointeeType, Ptr, Operands, CostKind); } unsigned getInliningThresholdMultiplier() override { return Impl.getInliningThresholdMultiplier(); diff --git a/llvm/include/llvm/Analysis/TargetTransformInfoImpl.h b/llvm/include/llvm/Analysis/TargetTransformInfoImpl.h --- a/llvm/include/llvm/Analysis/TargetTransformInfoImpl.h +++ b/llvm/include/llvm/Analysis/TargetTransformInfoImpl.h @@ -47,10 +47,9 @@ const DataLayout &getDataLayout() const { return DL; } - InstructionCost - getGEPCost(Type *PointeeType, const Value *Ptr, - ArrayRef Operands, - TTI::TargetCostKind CostKind = TTI::TCK_SizeAndLatency) const { + InstructionCost getGEPCost(Type *PointeeType, const Value *Ptr, + ArrayRef Operands, + TTI::TargetCostKind CostKind) const { // In the basic model, we just assume that all-constant GEPs will be folded // into their uses via addressing modes. for (unsigned Idx = 0, Size = Operands.size(); Idx != Size; ++Idx) @@ -638,9 +637,10 @@ return 1; } - InstructionCost getExtendedAddReductionCost( - bool IsMLA, bool IsUnsigned, Type *ResTy, VectorType *Ty, - TTI::TargetCostKind CostKind = TTI::TCK_RecipThroughput) const { + InstructionCost + getExtendedAddReductionCost(bool IsMLA, bool IsUnsigned, Type *ResTy, + VectorType *Ty, + TTI::TargetCostKind CostKind) const { return 1; } @@ -862,10 +862,9 @@ public: using BaseT::getGEPCost; - InstructionCost - getGEPCost(Type *PointeeType, const Value *Ptr, - ArrayRef Operands, - TTI::TargetCostKind CostKind = TTI::TCK_SizeAndLatency) { + InstructionCost getGEPCost(Type *PointeeType, const Value *Ptr, + ArrayRef Operands, + TTI::TargetCostKind CostKind) { assert(PointeeType && Ptr && "can't get GEPCost of nullptr"); assert(cast(Ptr->getType()->getScalarType()) ->isOpaqueOrPointeeTypeMatches(PointeeType) && @@ -970,10 +969,10 @@ return TTI::TCC_Free; break; case Instruction::GetElementPtr: { - const GEPOperator *GEP = cast(U); + const auto *GEP = cast(U); return TargetTTI->getGEPCost(GEP->getSourceElementType(), GEP->getPointerOperand(), - Operands.drop_front()); + Operands.drop_front(), CostKind); } case Instruction::Add: case Instruction::FAdd: diff --git a/llvm/include/llvm/CodeGen/BasicTTIImpl.h b/llvm/include/llvm/CodeGen/BasicTTIImpl.h --- a/llvm/include/llvm/CodeGen/BasicTTIImpl.h +++ b/llvm/include/llvm/CodeGen/BasicTTIImpl.h @@ -364,8 +364,9 @@ } InstructionCost getGEPCost(Type *PointeeType, const Value *Ptr, - ArrayRef Operands) { - return BaseT::getGEPCost(PointeeType, Ptr, Operands); + ArrayRef Operands, + TTI::TargetCostKind CostKind) { + return BaseT::getGEPCost(PointeeType, Ptr, Operands, CostKind); } unsigned getEstimatedNumberOfCaseClusters(const SwitchInst &SI, @@ -748,8 +749,7 @@ unsigned getMaxInterleaveFactor(unsigned VF) { return 1; } InstructionCost getArithmeticInstrCost( - unsigned Opcode, Type *Ty, - TTI::TargetCostKind CostKind = TTI::TCK_RecipThroughput, + unsigned Opcode, Type *Ty, TTI::TargetCostKind CostKind, TTI::OperandValueKind Opd1Info = TTI::OK_AnyValue, TTI::OperandValueKind Opd2Info = TTI::OK_AnyValue, TTI::OperandValueProperties Opd1PropInfo = TTI::OP_None, @@ -1992,9 +1992,9 @@ /// \param RetTy Return value types. /// \param Tys Argument types. /// \returns The cost of Call instruction. - InstructionCost - getCallInstrCost(Function *F, Type *RetTy, ArrayRef Tys, - TTI::TargetCostKind CostKind = TTI::TCK_SizeAndLatency) { + InstructionCost getCallInstrCost(Function *F, Type *RetTy, + ArrayRef Tys, + TTI::TargetCostKind CostKind) { return 10; } @@ -2078,7 +2078,8 @@ // By default reductions need one shuffle per reduction level. ShuffleCost += NumReduxLevels * thisT()->getShuffleCost( TTI::SK_PermuteSingleSrc, Ty, None, 0, Ty); - ArithCost += NumReduxLevels * thisT()->getArithmeticInstrCost(Opcode, Ty); + ArithCost += + NumReduxLevels * thisT()->getArithmeticInstrCost(Opcode, Ty, CostKind); return ShuffleCost + ArithCost + thisT()->getVectorInstrCost(Instruction::ExtractElement, Ty, 0); } diff --git a/llvm/lib/Target/AArch64/AArch64TargetTransformInfo.h b/llvm/lib/Target/AArch64/AArch64TargetTransformInfo.h --- a/llvm/lib/Target/AArch64/AArch64TargetTransformInfo.h +++ b/llvm/lib/Target/AArch64/AArch64TargetTransformInfo.h @@ -183,8 +183,7 @@ InstructionCost getSpliceCost(VectorType *Tp, int Index); InstructionCost getArithmeticInstrCost( - unsigned Opcode, Type *Ty, - TTI::TargetCostKind CostKind = TTI::TCK_RecipThroughput, + unsigned Opcode, Type *Ty, TTI::TargetCostKind CostKind, TTI::OperandValueKind Opd1Info = TTI::OK_AnyValue, TTI::OperandValueKind Opd2Info = TTI::OK_AnyValue, TTI::OperandValueProperties Opd1PropInfo = TTI::OP_None, @@ -303,8 +302,7 @@ InstructionCost getInterleavedMemoryOpCost( unsigned Opcode, Type *VecTy, unsigned Factor, ArrayRef Indices, - Align Alignment, unsigned AddressSpace, - TTI::TargetCostKind CostKind = TTI::TCK_SizeAndLatency, + Align Alignment, unsigned AddressSpace, TTI::TargetCostKind CostKind, bool UseMaskForCond = false, bool UseMaskForGaps = false); bool @@ -322,9 +320,9 @@ bool isLegalToVectorizeReduction(const RecurrenceDescriptor &RdxDesc, ElementCount VF) const; - InstructionCost getArithmeticReductionCost( - unsigned Opcode, VectorType *Ty, Optional FMF, - TTI::TargetCostKind CostKind = TTI::TCK_RecipThroughput); + InstructionCost getArithmeticReductionCost(unsigned Opcode, VectorType *Ty, + Optional FMF, + TTI::TargetCostKind CostKind); InstructionCost getShuffleCost(TTI::ShuffleKind Kind, VectorType *Tp, ArrayRef Mask, int Index, diff --git a/llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.h b/llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.h --- a/llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.h +++ b/llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.h @@ -79,24 +79,21 @@ return TargetTransformInfo::TCC_Basic; } - static inline int getHalfRateInstrCost( - TTI::TargetCostKind CostKind = TTI::TCK_RecipThroughput) { + static inline int getHalfRateInstrCost(TTI::TargetCostKind CostKind) { return CostKind == TTI::TCK_CodeSize ? 2 : 2 * TargetTransformInfo::TCC_Basic; } // TODO: The size is usually 8 bytes, but takes 4x as many cycles. Maybe // should be 2 or 4. - static inline int getQuarterRateInstrCost( - TTI::TargetCostKind CostKind = TTI::TCK_RecipThroughput) { + static inline int getQuarterRateInstrCost(TTI::TargetCostKind CostKind) { return CostKind == TTI::TCK_CodeSize ? 2 : 4 * TargetTransformInfo::TCC_Basic; } // On some parts, normal fp64 operations are half rate, and others // quarter. This also applies to some integer operations. - int get64BitInstrCost( - TTI::TargetCostKind CostKind = TTI::TCK_RecipThroughput) const; + int get64BitInstrCost(TTI::TargetCostKind CostKind) const; public: explicit GCNTTIImpl(const AMDGPUTargetMachine *TM, const Function &F); @@ -152,8 +149,7 @@ bool getTgtMemIntrinsic(IntrinsicInst *Inst, MemIntrinsicInfo &Info) const; InstructionCost getArithmeticInstrCost( - unsigned Opcode, Type *Ty, - TTI::TargetCostKind CostKind = TTI::TCK_RecipThroughput, + unsigned Opcode, Type *Ty, TTI::TargetCostKind CostKind, TTI::OperandValueKind Opd1Info = TTI::OK_AnyValue, TTI::OperandValueKind Opd2Info = TTI::OK_AnyValue, TTI::OperandValueProperties Opd1PropInfo = TTI::OP_None, @@ -217,13 +213,13 @@ InstructionCost getArithmeticReductionCost( unsigned Opcode, VectorType *Ty, Optional FMF, - TTI::TargetCostKind CostKind = TTI::TCK_RecipThroughput); + TTI::TargetCostKind CostKind); InstructionCost getIntrinsicInstrCost(const IntrinsicCostAttributes &ICA, TTI::TargetCostKind CostKind); InstructionCost getMinMaxReductionCost( VectorType *Ty, VectorType *CondTy, bool IsUnsigned, - TTI::TargetCostKind CostKind = TTI::TCK_RecipThroughput); + TTI::TargetCostKind CostKind); }; } // end namespace llvm diff --git a/llvm/lib/Target/ARM/ARMTargetTransformInfo.h b/llvm/lib/Target/ARM/ARMTargetTransformInfo.h --- a/llvm/lib/Target/ARM/ARMTargetTransformInfo.h +++ b/llvm/lib/Target/ARM/ARMTargetTransformInfo.h @@ -231,8 +231,7 @@ const SCEV *Ptr); InstructionCost getArithmeticInstrCost( - unsigned Opcode, Type *Ty, - TTI::TargetCostKind CostKind = TTI::TCK_RecipThroughput, + unsigned Opcode, Type *Ty, TTI::TargetCostKind CostKind, TTI::OperandValueKind Op1Info = TTI::OK_AnyValue, TTI::OperandValueKind Op2Info = TTI::OK_AnyValue, TTI::OperandValueProperties Opd1PropInfo = TTI::OP_None, @@ -251,8 +250,7 @@ InstructionCost getInterleavedMemoryOpCost( unsigned Opcode, Type *VecTy, unsigned Factor, ArrayRef Indices, - Align Alignment, unsigned AddressSpace, - TTI::TargetCostKind CostKind = TTI::TCK_SizeAndLatency, + Align Alignment, unsigned AddressSpace, TTI::TargetCostKind CostKind, bool UseMaskForCond = false, bool UseMaskForGaps = false); InstructionCost getGatherScatterOpCost(unsigned Opcode, Type *DataTy, diff --git a/llvm/lib/Target/BPF/BPFTargetTransformInfo.h b/llvm/lib/Target/BPF/BPFTargetTransformInfo.h --- a/llvm/lib/Target/BPF/BPFTargetTransformInfo.h +++ b/llvm/lib/Target/BPF/BPFTargetTransformInfo.h @@ -56,12 +56,11 @@ } InstructionCost getArithmeticInstrCost( - unsigned Opcode, Type *Ty, - TTI::TargetCostKind CostKind = TTI::TCK_RecipThroughput, - TTI::OperandValueKind Opd1Info = TTI::OK_AnyValue, - TTI::OperandValueKind Opd2Info = TTI::OK_AnyValue, - TTI::OperandValueProperties Opd1PropInfo = TTI::OP_None, - TTI::OperandValueProperties Opd2PropInfo = TTI::OP_None, + unsigned Opcode, Type *Ty, TTI::TargetCostKind CostKind, + TTI::OperandValueKind Opd1Info = TTI::OK_AnyValue, + TTI::OperandValueKind Opd2Info = TTI::OK_AnyValue, + TTI::OperandValueProperties Opd1PropInfo = TTI::OP_None, + TTI::OperandValueProperties Opd2PropInfo = TTI::OP_None, ArrayRef Args = ArrayRef(), const Instruction *CxtI = nullptr) { int ISD = TLI->InstructionOpcodeToISD(Opcode); diff --git a/llvm/lib/Target/Hexagon/HexagonTargetTransformInfo.h b/llvm/lib/Target/Hexagon/HexagonTargetTransformInfo.h --- a/llvm/lib/Target/Hexagon/HexagonTargetTransformInfo.h +++ b/llvm/lib/Target/Hexagon/HexagonTargetTransformInfo.h @@ -121,10 +121,9 @@ MaybeAlign Alignment, unsigned AddressSpace, TTI::TargetCostKind CostKind, const Instruction *I = nullptr); - InstructionCost - getMaskedMemoryOpCost(unsigned Opcode, Type *Src, Align Alignment, - unsigned AddressSpace, - TTI::TargetCostKind CostKind = TTI::TCK_SizeAndLatency); + InstructionCost getMaskedMemoryOpCost(unsigned Opcode, Type *Src, + Align Alignment, unsigned AddressSpace, + TTI::TargetCostKind CostKind); InstructionCost getShuffleCost(TTI::ShuffleKind Kind, Type *Tp, ArrayRef Mask, int Index, Type *SubTp); InstructionCost getGatherScatterOpCost(unsigned Opcode, Type *DataTy, @@ -134,16 +133,14 @@ const Instruction *I); InstructionCost getInterleavedMemoryOpCost( unsigned Opcode, Type *VecTy, unsigned Factor, ArrayRef Indices, - Align Alignment, unsigned AddressSpace, - TTI::TargetCostKind CostKind = TTI::TCK_SizeAndLatency, + Align Alignment, unsigned AddressSpace, TTI::TargetCostKind CostKind, bool UseMaskForCond = false, bool UseMaskForGaps = false); InstructionCost getCmpSelInstrCost(unsigned Opcode, Type *ValTy, Type *CondTy, CmpInst::Predicate VecPred, TTI::TargetCostKind CostKind, const Instruction *I = nullptr); InstructionCost getArithmeticInstrCost( - unsigned Opcode, Type *Ty, - TTI::TargetCostKind CostKind = TTI::TCK_RecipThroughput, + unsigned Opcode, Type *Ty, TTI::TargetCostKind CostKind, TTI::OperandValueKind Opd1Info = TTI::OK_AnyValue, TTI::OperandValueKind Opd2Info = TTI::OK_AnyValue, TTI::OperandValueProperties Opd1PropInfo = TTI::OP_None, diff --git a/llvm/lib/Target/Lanai/LanaiTargetTransformInfo.h b/llvm/lib/Target/Lanai/LanaiTargetTransformInfo.h --- a/llvm/lib/Target/Lanai/LanaiTargetTransformInfo.h +++ b/llvm/lib/Target/Lanai/LanaiTargetTransformInfo.h @@ -91,8 +91,7 @@ } InstructionCost getArithmeticInstrCost( - unsigned Opcode, Type *Ty, - TTI::TargetCostKind CostKind = TTI::TCK_RecipThroughput, + unsigned Opcode, Type *Ty, TTI::TargetCostKind CostKind, TTI::OperandValueKind Opd1Info = TTI::OK_AnyValue, TTI::OperandValueKind Opd2Info = TTI::OK_AnyValue, TTI::OperandValueProperties Opd1PropInfo = TTI::OP_None, diff --git a/llvm/lib/Target/NVPTX/NVPTXTargetTransformInfo.h b/llvm/lib/Target/NVPTX/NVPTXTargetTransformInfo.h --- a/llvm/lib/Target/NVPTX/NVPTXTargetTransformInfo.h +++ b/llvm/lib/Target/NVPTX/NVPTXTargetTransformInfo.h @@ -94,8 +94,7 @@ unsigned getInliningThresholdMultiplier() { return 5; } InstructionCost getArithmeticInstrCost( - unsigned Opcode, Type *Ty, - TTI::TargetCostKind CostKind = TTI::TCK_RecipThroughput, + unsigned Opcode, Type *Ty, TTI::TargetCostKind CostKind, TTI::OperandValueKind Opd1Info = TTI::OK_AnyValue, TTI::OperandValueKind Opd2Info = TTI::OK_AnyValue, TTI::OperandValueProperties Opd1PropInfo = TTI::OP_None, diff --git a/llvm/lib/Target/PowerPC/PPCTargetTransformInfo.h b/llvm/lib/Target/PowerPC/PPCTargetTransformInfo.h --- a/llvm/lib/Target/PowerPC/PPCTargetTransformInfo.h +++ b/llvm/lib/Target/PowerPC/PPCTargetTransformInfo.h @@ -103,8 +103,7 @@ InstructionCost vectorCostAdjustment(InstructionCost Cost, unsigned Opcode, Type *Ty1, Type *Ty2); InstructionCost getArithmeticInstrCost( - unsigned Opcode, Type *Ty, - TTI::TargetCostKind CostKind = TTI::TCK_RecipThroughput, + unsigned Opcode, Type *Ty, TTI::TargetCostKind CostKind, TTI::OperandValueKind Opd1Info = TTI::OK_AnyValue, TTI::OperandValueKind Opd2Info = TTI::OK_AnyValue, TTI::OperandValueProperties Opd1PropInfo = TTI::OP_None, @@ -131,8 +130,7 @@ const Instruction *I = nullptr); InstructionCost getInterleavedMemoryOpCost( unsigned Opcode, Type *VecTy, unsigned Factor, ArrayRef Indices, - Align Alignment, unsigned AddressSpace, - TTI::TargetCostKind CostKind = TTI::TCK_SizeAndLatency, + Align Alignment, unsigned AddressSpace, TTI::TargetCostKind CostKind, bool UseMaskForCond = false, bool UseMaskForGaps = false); InstructionCost getIntrinsicInstrCost(const IntrinsicCostAttributes &ICA, TTI::TargetCostKind CostKind); diff --git a/llvm/lib/Target/SystemZ/SystemZTargetTransformInfo.h b/llvm/lib/Target/SystemZ/SystemZTargetTransformInfo.h --- a/llvm/lib/Target/SystemZ/SystemZTargetTransformInfo.h +++ b/llvm/lib/Target/SystemZ/SystemZTargetTransformInfo.h @@ -83,8 +83,7 @@ bool enableInterleavedAccessVectorization() { return true; } InstructionCost getArithmeticInstrCost( - unsigned Opcode, Type *Ty, - TTI::TargetCostKind CostKind = TTI::TCK_RecipThroughput, + unsigned Opcode, Type *Ty, TTI::TargetCostKind CostKind, TTI::OperandValueKind Opd1Info = TTI::OK_AnyValue, TTI::OperandValueKind Opd2Info = TTI::OK_AnyValue, TTI::OperandValueProperties Opd1PropInfo = TTI::OP_None, @@ -116,8 +115,7 @@ InstructionCost getInterleavedMemoryOpCost( unsigned Opcode, Type *VecTy, unsigned Factor, ArrayRef Indices, - Align Alignment, unsigned AddressSpace, - TTI::TargetCostKind CostKind = TTI::TCK_SizeAndLatency, + Align Alignment, unsigned AddressSpace, TTI::TargetCostKind CostKind, bool UseMaskForCond = false, bool UseMaskForGaps = false); InstructionCost getIntrinsicInstrCost(const IntrinsicCostAttributes &ICA, diff --git a/llvm/lib/Target/WebAssembly/WebAssemblyTargetTransformInfo.h b/llvm/lib/Target/WebAssembly/WebAssemblyTargetTransformInfo.h --- a/llvm/lib/Target/WebAssembly/WebAssemblyTargetTransformInfo.h +++ b/llvm/lib/Target/WebAssembly/WebAssemblyTargetTransformInfo.h @@ -60,8 +60,7 @@ unsigned getNumberOfRegisters(unsigned ClassID) const; TypeSize getRegisterBitWidth(TargetTransformInfo::RegisterKind K) const; InstructionCost getArithmeticInstrCost( - unsigned Opcode, Type *Ty, - TTI::TargetCostKind CostKind = TTI::TCK_SizeAndLatency, + unsigned Opcode, Type *Ty, TTI::TargetCostKind CostKind, TTI::OperandValueKind Opd1Info = TTI::OK_AnyValue, TTI::OperandValueKind Opd2Info = TTI::OK_AnyValue, TTI::OperandValueProperties Opd1PropInfo = TTI::OP_None, diff --git a/llvm/lib/Target/X86/X86TargetTransformInfo.h b/llvm/lib/Target/X86/X86TargetTransformInfo.h --- a/llvm/lib/Target/X86/X86TargetTransformInfo.h +++ b/llvm/lib/Target/X86/X86TargetTransformInfo.h @@ -122,8 +122,7 @@ unsigned getLoadStoreVecRegBitWidth(unsigned AS) const; unsigned getMaxInterleaveFactor(unsigned VF); InstructionCost getArithmeticInstrCost( - unsigned Opcode, Type *Ty, - TTI::TargetCostKind CostKind = TTI::TCK_RecipThroughput, + unsigned Opcode, Type *Ty, TTI::TargetCostKind CostKind, TTI::OperandValueKind Opd1Info = TTI::OK_AnyValue, TTI::OperandValueKind Opd2Info = TTI::OK_AnyValue, TTI::OperandValueProperties Opd1PropInfo = TTI::OP_None, @@ -150,10 +149,9 @@ MaybeAlign Alignment, unsigned AddressSpace, TTI::TargetCostKind CostKind, const Instruction *I = nullptr); - InstructionCost - getMaskedMemoryOpCost(unsigned Opcode, Type *Src, Align Alignment, - unsigned AddressSpace, - TTI::TargetCostKind CostKind = TTI::TCK_SizeAndLatency); + InstructionCost getMaskedMemoryOpCost(unsigned Opcode, Type *Src, + Align Alignment, unsigned AddressSpace, + TTI::TargetCostKind CostKind); InstructionCost getGatherScatterOpCost(unsigned Opcode, Type *DataTy, const Value *Ptr, bool VariableMask, Align Alignment, @@ -182,9 +180,9 @@ InstructionCost getIntrinsicInstrCost(const IntrinsicCostAttributes &ICA, TTI::TargetCostKind CostKind); - InstructionCost getArithmeticReductionCost( - unsigned Opcode, VectorType *Ty, Optional FMF, - TTI::TargetCostKind CostKind = TTI::TCK_SizeAndLatency); + InstructionCost getArithmeticReductionCost(unsigned Opcode, VectorType *Ty, + Optional FMF, + TTI::TargetCostKind CostKind); InstructionCost getMinMaxCost(Type *Ty, Type *CondTy, bool IsUnsigned); @@ -194,19 +192,18 @@ InstructionCost getInterleavedMemoryOpCost( unsigned Opcode, Type *VecTy, unsigned Factor, ArrayRef Indices, - Align Alignment, unsigned AddressSpace, - TTI::TargetCostKind CostKind = TTI::TCK_SizeAndLatency, + Align Alignment, unsigned AddressSpace, TTI::TargetCostKind CostKind, bool UseMaskForCond = false, bool UseMaskForGaps = false); InstructionCost getInterleavedMemoryOpCostAVX512( unsigned Opcode, FixedVectorType *VecTy, unsigned Factor, ArrayRef Indices, Align Alignment, unsigned AddressSpace, - TTI::TargetCostKind CostKind = TTI::TCK_SizeAndLatency, - bool UseMaskForCond = false, bool UseMaskForGaps = false); + TTI::TargetCostKind CostKind, bool UseMaskForCond = false, + bool UseMaskForGaps = false); InstructionCost getInterleavedMemoryOpCostAVX2( unsigned Opcode, FixedVectorType *VecTy, unsigned Factor, ArrayRef Indices, Align Alignment, unsigned AddressSpace, - TTI::TargetCostKind CostKind = TTI::TCK_SizeAndLatency, - bool UseMaskForCond = false, bool UseMaskForGaps = false); + TTI::TargetCostKind CostKind, bool UseMaskForCond = false, + bool UseMaskForGaps = false); InstructionCost getIntImmCost(int64_t);